Page 1
INTEGRATED CIRCUITS
74F166
8-bit bidirectional universal shift register
Product specification
IC15 Data Handbook
1991 Feb 14
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Philips Semiconductors Product specification
74F1668-bit bidirectional universal shift register
FEA TURES
• High impedance NPN base inputs for reduced loading
(20µA in high and low states)
• Synchronous parallel to serial applications
• Synchronous serial data input for easy expansion
• Clock enable for ”do nothing” mode
• Asynchronous master reset
• Expandable to 16 bits in 8–bit increments
• Industrial temperature range available (–40°C to +85°C)
For expansion of the register in parallel to serial converters,
the Q7 output is connected to the Ds input of the succeeding
stage. The clock input is gated OR structure which allows
one input to be used as an active–low clock enable (CE
input. The pin assignment for the CP and CE
inputs is
arbitrary and can be reversed for layout convenience. The
low–to–high transition of CE
input should only take place
while the CP is high for predictable operation. A low on the
master reset (MR
) input overrides all other inputs and clears
the register asynchronously , forcing all bit positions to a low
DESCRIPTION
state.
The 74F166 is a high speed 8–bit shift register that has fully
synchronous serial parallel data entry selected by an active
low parallel enable (PE
time before the low–to–high clock transition, parallel data is
entered into the register.
When PE
is high, data is entered into internal bit position Q0
) input. When the PE is low one setup
TYPE TYPICAL f
74F166 175MHz 50mA
max
TYPICAL SUPPL Y CUR-
RENT( TOTAL)
from serial data input (Ds), and the remaining bits are shifted
one place to the right (Q0 → Q1 → Q2, etc.) with each
positive going clock transition.
ORDERING INFORMATION
ORDER CODE
COMMERCIAL RANGE INDUSTRIAL RANGE
DESCRIPTION
16–pin plastic DIP N74F166N I74F166N SOT38-4
16–pin plastic SO N74F166D I74F166D SOT109-1
VCC = 5V ±10%, VCC = 5V ±10%,
T
= 0°C to +70°C T
amb
= –40°C to +85°C
amb
PKG DWG #
)
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS DESCRIPTION 74F (U.L.) HIGH/
D0 – D7 Parallel data inputs 1.0/0.033
Ds Serial data input (shift right) 2.0/0.066
CP Clock input (active rising edge) 1.0/0.033
CE Clock enable input (active low) 1.0/0.033
PE Parallel enable input (active low) 1.0/0.033
MR Master reset input (active low) 2.0/0.066
Q7 Data output 50/33
Note to input and output loading and fan out table
1. One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state.
LOW
LOAD VALUE HIGH/
LOW
20µA/20µA
40µA/40µA
20µA/20µA
20µA/20µA
20µA/20µA
40µA/40µA
1.0mA/20mA
Feb. 14, 1991 853–0349 01718
2
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Philips Semiconductors Product specification
74F1668-bit bidirectional universal shift register
PIN CONFIGURATION
1
Ds
2
D0
3
D1
4
D2
5
D3
6
CE
CP
GND
LOGIC SYMBOL
1234510111214
6
7
9
15
V
CC
GND = Pin 8
Ds D0 D1 D2 D3 D4 D5 D6 D7
CE
CP
MR
PE
= Pin 16
Q7
IEC/IEEE SYMBOL
16
V
CC
15
PE
14
D7
13
Q7
12
D6
11
D5
107
D4
98
MR
SP000283
13
SF00284
9
15
6
7
1
2
3
4
5
10
11
12
14
SRG 8
R
M1 [SHIFT]
M2 [LOAD]
1
1, 3D
2, 3D
2,3D
C3/1
13
SF00285
FUNCTION TABLE
INPUTS Qn REGISTER OUTPUT OPERATING MODE
PE CE CP DS D0 –D7 Q0 Q1 – Q6 Q7
l l ↑ X l – l L L – L L Parallel load
l l ↑ X h – h H H – H H
h l ↑ l X – X L q0 – q5 q6 Serial shift
h l ↑ h X – X H q0 – q5 q6
X h X X X – X qn q1 – q6 q7 Hold (do nothing)
Notes to function table
1. H = High–voltage level
2. h = High voltage level one setup time before the low–to–high clock transition
3. L = Low–voltage level
4. l = Low voltage level one setup time before the low–to–high clock transition
5. qn = Lower case letters indicate the state of the referenced input (or output) one setup time prior to the low–to–high clock transition
6. X = Don’t care
7. ↑ = Low–to–high clock transition
Feb. 14, 1991
3
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Philips Semiconductors Product specification
74F1668-bit bidirectional universal shift register
LOGIC DIAGRAM
9
MR
1
DS
D1
D2
PE
D0
15
2
3
4
RCP S
Q
RCP S
Q
RCP S
Q
V
= Pin 16
CC
GND = Pin 8
D3
D4
D5
D6
D7
CP
CE
RCP S
5
10
11
12
14
7
6
Q
RCP S
Q
RCP S
Q
RCP S
Q
RCP S
Q
13
Q7
SF00286
Feb. 14, 1991
4
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Philips Semiconductors Product specification
74F1668-bit bidirectional universal shift register
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the
operating free air temperature range.)
SYMBOL
V
V
I
IN
V
I
OUT
T
T
CC
IN
OUT
amb
stg
Supply voltage –0.5 to +7.0 V
Input voltage –0.5 to +7.0 V
Input current –30 to +5 mA
Voltage applied to output in high output state –0.5 to V
Current applied to output in low output state 40 mA
Operating free air temperature range Commercial range 0 to +70
Storage temperature range –65 to +150
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER LIMITS UNIT
V
V
V
I
I
I
T
CC
IN
IL
Ik
OH
OL
amb
Supply voltage 4.5 5.0 5.5 V
High–level input voltage 2.0 V
Low–level input voltage 0.8 V
Input clamp current –18 mA
High–level output current –1 mA
Low–level output current 20 mA
Operating free air temperature range Commercial range 0 +70
PARAMETER RATING UNIT
CC
V
°C
Industrial range –40 to +85
°C
°C
MIN NOM MAX
°C
Industrial range –40 +85
°C
Feb. 14, 1991
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Philips Semiconductors Product specification
74F1668-bit bidirectional universal shift register
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
V
OH
V
OL
V
IK
I
I
High–level output voltage VCC = MIN, VIL =
Low–level output voltage
Input clamp voltage VCC = MIN, II = I
Input current at maximum others VCC = 0.0V, VI = 7.0V 100 µA
input voltage CE, CP
I
IH
High–level input MR, Ds VCC = MAX, VI = 2.7V 40 µA
current Industrial others 40 µA
I
IL
I
OS
I
CC
Low–level input current others VCC = MAX, VI = 0.5V -20 µA
Short–circuit output current
Supply current (total)
Notes to DC electrical characteristics
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
3. When testing CP, CE
4. Not more than one output should be shorted at a time. For testing I
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
PARAMETER TEST LIMITS UNIT
MAX,
VIH = MIN
VCC = MIN, VIL =
MAX,
VIH = MIN
3
CONDITIONS
IK
I
OH
I
OL
1
= MAX
= MAX
±10%V
±5%V
±10%V
±5%V
MIN TYP2MAX
2.5 V
CC
2.7 3.4 V
CC
CC
CC
0.30 0.50 V
0.30 0.50 V
-0.73 -1.2 V
others 20 µA
only MR, Ds 80 µA
MR, Ds -40 µA
4
= 5V, T
CC
must remain in high state, whereas CP must remain in high state when testing CE.
OS
= 25°C.
amb
tests should be performed last.
VCC = MAX -60 -150 mA
VCC = MAX, PE = CE = Dn = GND,
MR = Ds = 4.5V, CP = ↑
, the use of high-speed test apparatus and/or sample-and-hold
OS
50 70 mA
AC ELECTRICAL CHARACTERISTICS
T
= +25°C T
amb
SYMBOL PARAMETER TEST VCC = +5.0V
CONDITION CL = 50pF,
R
= 500Ω
L
MIN TYP MAX MIN MAX MIN MAX
f
max
t
PLH
t
PHL
t
PHL
Feb. 14, 1991
Maximum clock frequency Waveform 1 135 175 110 100 ns
Propagation delay
CP to Q7
Propagation delay
MR to Q7
Waveform 1
Waveform 2 4.0 6.5 8.5 4.0 9.5 4.0 9.5 ns
5.0
4.0
7.5
6.0
6
LIMITS
amb
= 0°C to
T
amb
+70°C
VCC = +5.0V ± 10% VCC = +5.0V ± 10%
CL = 50pF,
R
= 500Ω
L
10.0
8.0
5.0
3.5
12.0
9.0
= –40°C to +85°C
CL = 50pF,
R
= 500Ω
L
5.0
3.5
13.0
9.0
UNIT
ns
Page 7
Philips Semiconductors Product specification
74F1668-bit bidirectional universal shift register
AC SETUP REQUIREMENTS
LIMITS
T
= +25°C T
amb
SYMBOL PARAMETER TEST VCC = +5.0V
CONDITION CL = 50pF,
= 500Ω
R
L
MIN TYP MAX MIN MAX MIN MAX
t
(H)
su
tsu(L)
t
(H)
h
t
(L)
h
t
(H)
h
t
(L)
h
tsu(L)
t
(H)
h
t
(H)
su
tsu(L)
t
(H)
h
t
(L)
h
t
(H)
w
t
(L)
w
t
(L) MR pulse width, low Waveform 2 4.0 4.0 4.0 ns
w
t
rec
Setup time, high or low
Dn, Ds to CP, CE
Hold time, high or low
Dn, Ds to CP
Hold time, high or low
Dn, Ds to CE
Setup time, low
CE to CP
Hold time, high
CE to CP
Setup time, high or low
PE to CP, CE
Hold time, high or low
PE to CP
CP pulse width,
high or low
,
Recovery time
MR to CP Waveform 2 4.0 4.5 4.5 ns
Waveform 3
Waveform 3
Waveform 3
3.0
2.5
0.0
0.0
1.5
0.0
Waveform 3 5.0 6.0 6.0 ns
Waveform 3 0.0 0.0 0.0 ns
Waveform 3
Waveform 3
Waveform 1
3.0
3.0
0.0
0.0
3.0
4.5
amb
= 0°C to
T
= –40°C to +85°C
amb
+70°C
VCC = +5.0V ± 10% VCC = +5.0V ± 10%
CL = 50pF,
= 500Ω
R
L
4.0
3.0
1.0
0.0
2.0
0.0
4.0
4.0
0.0
0.0
3.5
5.0
CL = 50pF,
= 500Ω
R
L
4.0
3.0
1.0
0.0
2.0
0.0
4.0
6.0
0.0
0.0
3.5
6.0
UNIT
ns
ns
ns
ns
ns
ns
AC WAVEFORMS
1/f
MAX
CP
Q7
Waveform 1. Propagation delay for clock input to output,
V
M
t
PHL
tW(H)
V
M
tW(L)
V
M
V
M
t
PLH
V
M
SF00287
clock pulse width, and maximum clock frequency
Q7
MR
CP
V
M
t
PHL
(L)
t
w
V
M
t
rec
V
M
V
M
SF00288
SF00288
Waveform 2. Master reset pulse width, master reset to output
delay and master reset to clock recovery time
Feb. 14, 1991
7
Page 8
Philips Semiconductors Product specification
74F1668-bit bidirectional universal shift register
CE
PE
Dn
CP, CE
V
M
V
M
V
M
Ds
V
M
tsu(L) th = 0 tsu(L) tsu(H) th = 0th = 0
V
M
tsu(L) th = 0 tsu(H) th = 0
stable
t
su
V
M
th = 0
V
M
V
V
V
M
M
M
stable
t
su
V
M
V
M
V
M
th = 0
V
M
V
M
Waveform 3. Setup and hold times
Notes to AC waveforms
1. For all waveforms, V
2. The shaded areas indicate when the input is permitted to change for predictable output performance.
= 1.5V.
M
TEST CIRCUIT AND WAVEFORMS
t
w
)
PULSE
GENERATOR
V
CC
NEGATIVE
PULSE
V
IN
D.U.T.
V
OUT
90%
V
M
10%
t
THL (tf
V
M
t
TLH (tr
V
M
SF00289
V
10%
)
AMP (V)
90%
M
0V
R
R
T
C
L
L
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
= Load resistor;
R
L
see AC ELECTRICAL CHARACTERISTICS for value.
C
= Load capacitance includes jig and probe capacitance;
L
see AC ELECTRICAL CHARACTERISTICS for value.
R
= Termination resistance should be equal to Z
T
pulse generators.
OUT
of
POSITIVE
PULSE
family
74F
10%
amplitude
3.0V 1.5V
)
V
90%
M
t
TLH (tr
t
)
THL (tf
90%
V
M
t
w
Input Pulse Definition
INPUT PULSE REQUIREMENTS
V
M
rep. rate
t
w
1MHz 500ns
10%
t
TLHtTHL
2.5ns 2.5ns
AMP (V)
0V
SF00006
Feb. 14, 1991
8
Page 9
Philips Semiconductors Product specification
8-bit bidirectional universal shift register
DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4
74F166
1991 Feb 14
9
Page 10
Philips Semiconductors Product specification
8-bit bidirectional universal shift register
SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
74F166
1991 Feb 14
10
Page 11
Philips Semiconductors Product specification
8-bit bidirectional universal shift register
NOTES
74F166
1991 Feb 14
11
Page 12
Philips Semiconductors Product specification
8-bit bidirectional universal shift register
Data sheet status
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1]
74F166
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code Date of release: 10-98
Document order number: 9397-750-05086
yyyy mmm dd
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