Datasheet MM1145BF, MM1145AF Datasheet (MITSMI)

MITSUMI
System Reset (with built-in watchdog timer) MM1145
System Reset (with built-in watchdog timer)
Monolithic IC MM1145
Outline
This IC has a built-in watchdog timer, with 2 channels for a clock monitoring function that monitors the microcomputer and outputs an intermittent reset signal if the microcomputer runs wild. Also, it has a power supply voltage monitoring function (system reset function) which generates a reset signal if power supply voltage is momentarily interrupted or drops, and performs power ON reset during normal power supply recovery and when power is turned on.
Features
1. Built-in edge trigger input watchdog timer
2. 2 clock pulse monitoring
3. Power ON reset time (T
PR) and watchdog timer monitoring time (TWD) can be set individually with external
elements (R, C)
4. Excellent watchdog timer monitoring time (T
WD) precision A type : ±20%
B type : ±30%
5. Watchdog function stop pin allows use as system reset IC
6. Accurate power supply voltage drop detection 4.2V±3.5%
7. Detection voltage has hysteresis 100mV typ. ±0.14%/°C
8. Low reset minimum voltage
9. Low current consumption 150µA typ.
Package
SOP-8C (MM1145AF, MM1145BF)
Applications
Voltage detection for CPUs, microcomputers, etc. and clock pulse monitoring
Series Table
Model VSL TPR TWA TWR
MM1145A
4.2
100mS 50mS 10mS
MM1145B 40mS 110mS 10mS
*
CT=0.02µF, RCT=1M
V
SL : Reset detection voltage
T
PR :Reset hold time during Vcc rise
T
WD :Watchdog timer monitoring time
T
WR : Reset time
MITSUMI
System Reset (with built-in watchdog timer) MM1145
1432
8567
SOP-8C
Pin Assignment
Pin Description
Block Diagram
1 TC
2 CK1
3 CK2
4 GND
5 V
CC
6 RCT
7 V
S
8 RESET
----------------------------------------------
Pin No.
Pin name
Function
1 TC
2 CK1
3 CK2
4 GND
5 V
CC
6 RCT
7 V
S
8 RESET
----------------------------------------------------------------------------------------------------------
TWD, TWR, TPR time setting pins. Time determined by external capacitor.
Clock input pin 1 Clock input from logic system
Clock input pin 2 Clock input from logic system
GND pin
Power supply pin Detection voltage 4.2V
Watchdog timer stop pin and T
WD adjustment pin
Operation modes : Operation Vcc, Stop GND
T
WD time determined by external resistor RRCT and CT
Detection voltage adjustment pin
Reset output pin (low output)
MITSUMI
System Reset (with built-in watchdog timer) MM1145
Absolute Maximum Ratings
Item Symbol Rating Units
Power supply voltage V
CC max.
-
0.3~+7.5 V
CK pin input voltage V
CK
-
0.3~VCC+0.3 (
<
=
+7.5) V
VS pin input voltage V
VS
-
0.3~VCC+0.3 (
<
=
+7.5) V
Voltage applied to RCT pin V
RCT
-
0.3~VCC+0.3 (
<
=
+7.5) V
Voltage applied to RESET
----------------------------------------------
pin VOH
-
0.3~VCC+0.3 (
<
=
+7.5) V
Allowable loss Pd 300 mW
Storage temperature T
STG
-
40~+125
°
C
Recommended Operating Conditions
Item Symbol Rating Units
Power supply voltage V
CC +2.2~+7.0 V
RESET sync current
I
OL 0~4.0 mA
Clock monitoring time setting T
WD 1.95~10000 mS
Power supply voltage rise and fall times
tFV, tRV <300 µS
Clock rise and fall times t
FC, tRC <100 µS
C
T pin capacitance CT 0.002~2 µF
RCT pin resistance Rr
CT 0.39~2 M
Operating temperature T
OP
-
25~+75
°
C
Item Symbol Measurement conditions Min. Typ. Max. Units
Consumption current I
CC During watchdog timer operation 150 180 µA
Detection voltage
V
SL 4.05 4.20 4.35
V
V
SH 4.15 4.30 4.45
Detection voltage
±0.01 %/
°
C
temperature coefficient
Hysteresis voltage V
HYS 50 100 150 mV
CK input threshold V
TH 0.8 1.2 2 V
CK input current
I
IH VCK=5.0V 0 1
µA
I
IL VCK=0V
-
14.5-8.5
-
4.5
Output voltage (High) V
OH I=
-
1µA, VS=OPEN 4.0 4.5 V
Output voltage (Low)
V
OL1 I =0.5mA, VS=0V 0.10 0.20
V
V
OL2 I =2.0mA, VS=0V 0.15 0.35
Output sync current I
OL V =1.0V, VS=0V 2 4 mA
MM1145A
I
CT1 During watchdog timer operation
-
0.40-0.48-0.60 µA
C
T charge MM1145B
-
0.17-0.22-0.30
current MM1145A
I
CT2 During power ON reset operation
-
0.21-0.31-0.62 µA
MM1145B
-
0.62-0.93-2.33
Minimum operating power supply
VCCL 0.8 1.0 V
voltage to ensure RESET
-----------------------------------------------
RESET
--------------------------------------------
RESET
--------------------------------------------
RESET
--------------------------------------------
RESET
--------------------------------------------
VS=OPEN, VCC
VS=OPEN, VCC
VSH-VSL, VCC
V =0.4V
I =0.1mA
RESET
--------------------------------------------
RESET
--------------------------------------------
VS
T
Electrical Characteristics (DC)
(Except where noted otherwise, Ta=25°C, Vcc=5.0V)
MITSUMI
System Reset (with built-in watchdog timer) MM1145
Electrical Characteristics (DC)
(Except where noted otherwise, Ta=25°C, Vcc=5.0V)
Item Symbol Measurement conditions Min. Typ. Max. Units
V
CC input pulse width TPI S
CK input pulse width
T
CKW1
T
CKW2
S
CK input cycle
*
7
T
CK1
T
CK2
200 µS
Watchdog timer MM1145A
T
WD CT=0.02µF, RRCT=1M
40 50 60
mS
monitoring time
*
1 MM1145B 80 110 140
Watchdog timer MM1145A
T
WR CT=0.02µF, RRCT=1M
51015
mS
reset time
*
2 MM1145B 51015
Reset hold time for
MM1145A
T
PR
50 100 150
mS
power supply rise *3
MM1145B 20 40 60
Output delay time from V
CC
*
4
TPD
RESET
--------------------------------------------------------------------------------------
pin
, RL=10k, CL=20pF 2 10 µS
Output rise time
*
5 tR
RESET
--------------------------------------------------------------------------------------
pin
, RL=10k, CL=20pF 2.0 4.0 µS
Output fall time
*
5 tF
RESET
--------------------------------------------------------------------------------------
pin
, RL=10k, CL=20pF 0.2 1.0 µS
VCC
5.0V
4.0V
CK or
CT=0.02µF
R
RCT=1M
or
Notes:
*
1 Monitoring time is the time from the last pulse (negative edge) of the timer clear clock pulse until reset
pulse output. In other words, reset output is output if a clock pulse is not input during this time.
*
2 Reset time means reset pulse width. However, this does not apply to power ON reset.
*
3 Reset hold time is the time from when VCC exceeds detection voltage (VSHR) during power ON reset until
reset release (RESET
------------------------------------------------
output high).
*
4 Output delay time is the time from when power supply voltage drops below detection voltage (VSL) until
reset state occurs (RESET
------------------------------------------------
output low).
*
5 The voltage range when measuring output rise and fall time is 10~90%.
*
7 1 Set CK1 and CK2 input cycles within the following range.
T
CK1
< =
nTCK2<TWD (mS) (n
<
=
1)
RESET
------------------------------------------------
output may go low even if CK1 and CK2 are input without these conditions being met.
(Recommended use is for T
CK1
<
=
nT
CK2)
2 T
CK1, TCK2
< =
200 µS results in the following operation.
Discharge switches to charging with the CK2 pulse (negative edge) that inputs 200µS after C
T switches
from charging to discharge by the CK2 pulse (negative edge). RESET
------------------------------------------------
output stays high while this
operation is being repeated. (However, T
CK1, TCK2
>
=
20µS.)
V
CC
MITSUMI
System Reset (with built-in watchdog timer) MM1145
Formula for CTPin External Constant
Watchdog timer monitoring time (TWD), watchdog timer reset time (TWR) and reset hold time (TPR) during power supply rise can be changed by varying C
T capacitance. TWD also can be changed with RRCT.
The variable times are expressed by the following.
1. MM1145A 2. MM1145B
T
PR (mS)
. =.5000 CT (µF) TPR (mS) .=.2000 CT (µF)
T
WD (mS)
. =
.
2500 CT (µF) RRCT (M)TWD (mS)
. =
.
5500 CT (µF) RRCT (M)
T
WR (mS)
. =.500 CT (µF) TWR (mS) .=.500 CT (µF)
Example : when C
T=0.02µF, RRCT=1M Example : when CT=0.02µF, RRCT=1M
T
PR
. =.100mS TPR.=.40mS
T
WD
. =.50mS TWD.=.110mS
T
WR
. =.10mS TWR.=.10mS
The ratio between T
PR and TWD can be changed within the range below by adjusting TWD with RRCT.
1. MM1145A 2. MM1145B
T
WD/TPR
.
=.2.0 R
RCT (0.39 (M)
< =
RRCT
<
=
2 (M)) T
WD/TPR
. =.2.75 R
RCT (0.39 (M)
< =
RRCT
< =
2 (MΩ)
Formula for Watchdog Timer Monitoring Time (TWD) Adjustment
How to Use RCT Pin
Example 1 Example 2
1. Watchdog timer operates when RCT pin is open.
2. Watchdog timer stops operating when RCT pin is connected to ground.
Description of Operation
1. RESET
--------------------------------------------
goes low when VCC rises to approximately 0.8V.
Approximately 1µA (V
CC=0.8V) of pull up current is output from RESET.
2. Capacitor C
T charging starts when VCC rises to VSH (
. =.4.3V). Output is in reset state at this time.
3. Output reset is released (RESET
-------------------------------------------
goes high) after a certain time (TPR), from when CT starts charging until
discharge (the time from when C
T voltage reaches a certain threshold value VT1 (
.
=.1.4V) until CT voltage drops to a certain threshold value VT2 (.=.0.2V). Reset hold time : T
PR is as follows.
T
PR (mS)
. =.5000 CT (µF)
C
T charging starts again after reset release, and watchdog timer operation begins.
Clock input during power ON reset time (T
PR) will cause mis-operation.
4. If CK1 and CK2 are input in that order (or simultaneously) during C
T charging, CK2 negative edge trigger
causes the TC pin to switch from charging to discharge.
5. Discharge switches to charging when C
T voltage drops to threshold value VT2 (
. =. 0.2V). Steps 4 and 5 are
repeated while a normal clock is input from the logic system.
MITSUMI
System Reset (with built-in watchdog timer) MM1145
6. Operation is as follows if either clock CK1 or CK2 ceases (the figure shows CK1). Output goes to reset state (RESET
-------------------------------------------
goes low) when CT voltage reaches reset ON threshold value VT1 (.=. 1.4V). The formula for C
T charging time (TWD : watchdog timer monitoring time) until reset is output is as follows.
T
WD (mS)
. =.2500 CT (µF)
7. Watchdog timer reset time T
WR is the discharge time until CT voltage drops to reset OFF threshold value
VT2 from reset ON threshold value VT1. The formula is as follows. T
WR (mS)
. =.500 CT (µF)
After reset OFF threshold value is reached, output reset is released and C
T starts charging. Thereafter,
steps 4 and 5 are repeated if a normal clock is input, and when one of the clocks ceases, 6 and 7 are repeated. In the same way, 6 and 7 are repeated if both clocks CK1 and CK2 cease.
8. Reset is output when V
CC drops to VSL (
. =.4.2V). CT is charged simultaneously.
9. C
T charging starts when VCC rises to VSH.
When V
CC drops momentarily, CT charging begins after the charge is first discharged, if the time from VCC
dropping below VSL until it rises to VSH is longer than the VCC input pulse width standard value TPI.
10.Output reset is released after V
CC goes above VSH and after TPR, and the watchdog timer starts.
11.Watchdog timer operation can be stopped by switching R
CT voltage from high to low. (Clocks CK1 and
CK2 are invalid. Regardless of status, TC pin voltage discharges quickly and goes to 0V.) This operation can be applied from any timing. In this state the IC functions as a reset IC with power ON reset.
12.Watchdog timer operation re-starts when R
CT voltage switches to high.
13.When power is OFF, reset is output if V
CC goes below VSL.
14.When Vcc drops to 0V, reset output is held until V
CC reaches 0.8V.
Measuring Circuit
Measuring Circuit 1
MITSUMI
System Reset (with built-in watchdog timer) MM1145
Timing Chart
VCC
RCT
CK1
CK2
C
T
VH
VL
0.8
RESET
VT1
VT2
T
PR
TWD
TWR
1 2 3 4 5 6 7 8 9 10 11 12 13 14
Basic Circuit Diagram
Measuring Circuit 2
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