System Reset (with built-in watchdog timer) MM1096
System Reset (with built-in watchdog timer)
Monolithic IC MM1096
Outline
This IC functions in a variety of CPU systems and other logic systems to generate a reset signal and reset the
system accurately during momentary interruption or lowering of power supply voltage.
It also has a built-in watchdog timer for operation diagnosis. This prevents the system from running wild by
generating an intermittent reset pulse during system mis-operation.
can be stopped by
connecting the RCT
pin to GND. Then it
functions as a voltage
detection circuit.)
Timing Chart
Page 7
MITSUMI
System Reset (with built-in watchdog timer) MM1096
Description of Operation
-------------------------------------------------
1. RESET
Approximately 1µA (V
2. Capacitor CT charging starts when VCC rises to VSH (MM1096A .=.3.25V, MM1096B .=.4.3V). Output is in
reset state at this time.
3. Output reset is released (RESET
discharge (the time from when C
drops to a certain threshold value 2 (.=. 0.2V).
Reset hold time : T
T
C
Clock input to the CK pin during C
4. If a clock is input (negative edge trigger) to the CK pin during C
discharge.
5. Discharge switches to charging when C
5 are repeated while a normal clock is input from the logic system.
6. Output goes to reset state (RESET
threshold value (.=.1.4V).
The formula for C
T
7. Watchdog timer reset time T
(.=.0.2V). The formula is as follows.
T
After reset OFF threshold value is reached, output reset is released and C
steps 4 and 5 are repeated if a normal clock is input, and when the clock ceases, 6 and 7 are repeated.
8. Reset is output when V
simultaneously.
9. C
When V
dropping below VSL until it rises to VSH is longer than the Vcc input pulse width standard value TPI.
10.Output reset is released after V
8~10 are repeated when V
11.When power is OFF, reset is output if V
12.When V
goes low when VCC rises to approximately 0.8V.
CC=0.8V) of pull up current is output from RESET
-----------------------------------------------
PR (mS)
T charging starts again after reset release, and watchdog timer operation begins.
WD (mS)
WR (mS)
T charging starts when VCC rises to VSH.
.
=. 500 CT (µF)
.
=.2500 CT (µF)
.
=.100 CT (µF)
CC drops momentarily, CT charging begins after the charge is first discharged, if the time from VCC
CC drops to 0V, reset output is held until VCC reaches 0.8V.
PR is as follows.
T charging time (TWD : watchdog timer monitoring time) until reset is output is as follows.
CC drops to VSL (MM1096A
goes high) after a certain time (TPR), from when CT starts charging until
T voltage reaches a certain threshold value 1 (
T charging will cause mis-operation.
T voltage drops to a certain threshold value (
-----------------------------------------------
CC goes below VSL.
goes low) when the clock ceases and CT voltage reaches reset ON
WR is the discharge time until CT voltage drops to reset OFF threshold value
.
=.3.2V, MM1096B .=.4.2V). CT is charged
CC goes above VSH and after TPR, and the watchdog timer starts. Thereafter,
CC goes below VSL.
-------------------------------------------------
.
=. 1.4V) until CT voltage
T charging, C switches from charging to
.
=.0.2V). Steps 4 and
T starts charging. Thereafter,
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