System Reset (with built-in watchdog timer) MM1035
System Reset (with built-in watchdog timer)
Monolithic IC MM1035
Outline
This IC functions in a variety of CPU systems and other logic systems to generate a reset signal and reset the
system accurately during momentary interruption or lowering of power supply voltage.
It also has a built-in watchdog timer for operation diagnosis. This prevents the system from running wild by
generating an intermittent reset pulse during system mis-operation.
Features
1. Built-in watchdog timer
2. Low minimum operating voltageV
3. Both positive and negative logic reset output can be extracted
4. Accurate detection of drop in power supply voltage
5. Detection voltage has hysteresis
6. Few external parts1 capacitor
CC=0.8V typ.
Package
DIP-8A (MM1035XD)
SOP-8A (MM1035XF)
Applications
Microcomputers
Absolute Maximum Ratings
ItemSymbolRatingUnits
Storage temperatureT
Operating temperatureT
Power supply voltageV
Voltage applied to VS & CK pinsV
Voltage applied to RESET, RESET pin
Allowable lossPd400mW
(Ta=25°C)
STG
OPR
CC max.
VS & VCK
VOH
-
40~+125
-
20~+70
-
0.3~+10V
-
0.3~+10V
-
0.3~+10V
°
C
°
C
Page 2
MITSUMI
System Reset (with built-in watchdog timer) MM1035
Electrical Characteristics 1 (DC)
ItemSymbol
Consumption currentI
Detection voltage
Detection voltage
temperature coefficient
Hysteresis voltageV
CK input threshold V
CK input current
Output voltage (High)
Output voltage (Low)
V
S/ T1±0.01%/°C
V
V
V
V
V
Measurement
circuit
CC1
V
SL14.054.204.35
SH14.154.304.45
V
HYS150100150mV
TH10.81.22V
I
IH1VCK=5V01
IL1VCK=0V
I
OH11 I=
OH21IRESET=
OL11I=3mA, VS=0V0.20.4
OL21I=10mA, VS=0V0.30.5
OL31 IRESET=0.5mA, VS=OPEN0.20.4
(Except where noted otherwise, Ta=25°C, VCC=5V, measurement circuit 1)
Measurement conditionsMin. Typ. Max.Units
During watchdog timer operation
VS=OPEN, VCC
0.71.0mA
V
VS=OPEN, VCC
VSH-VSL, VCC
µA
-
-----------------------------------------
RESET
20-10
-
5µA, VS=OPEN4.54.8
-
3
V
-
5µA, VS=0V4.54.8
-----------------------------------------
RESET
-----------------------------------------
RESET
V
V
OL41IRESET=1mA, VS=OPEN0.30.5
I
OL11V=1.0V, VS=0V1016
Output sink current
I
OL21 VRESET=1.0V, VS=OPEN12
CT11
I
C
T charge current
ICT21
Minimum operating power
supply voltage to ensure RESET
------------------------------------------------
VCCL110.81.0V
Minimum operating power
supply voltage to ensure RESET
------------------------------------------------
VCCL21
-------------------------------------------
RESET
VTC= 1.0V during watchdog
timer operation
VTV= 1.0V during power
on reset operation
--------------------------------------------
RESET
V=0.4V
------------------------------------------------
RESET
I=0.2mA
I
RESET=VCC
R
L
2 (between Pin 2 and GND) =1MΩ
-
0.1V
-
8
-
12-24µA
-
0.8-1.2-2.4µA
0.81.0V
mA
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MITSUMI
System Reset (with built-in watchdog timer) MM1035
Electrical Characteristics 2 (AC)
(Except where noted otherwise, Ta=25°C, VCC=5V, measurement circuit 2)
Measurement
ItemSymbol
Measurement conditionsMin. Typ. Max.Units
circuit
5V
CC input pulse widthTPI28µS
V
VCC
4V
CK input pulse widthT
CK input cycleT
CKW23µS
CK220µS
CKor
Watchdog timer
WD2CT=0.1µF51015mS
monitoring time
1
*
T
Reset time for
WR2CT=0.1µF123mS
watchdog timer
2
*
T
Reset hold time for
power supply rise
Output delay time from V
3
*
CC
T
PD12
T
CT=0.1µF, VCC
---------------------------------------
RESET
pin
RL1=2.2kΩ, CL1=100pF
210
PR250100150mS
µS
4
*
Output rise time
5
*
PD22
T
R12
t
R22
t
RESET pin
L2=10kΩ, CL2=20pF
R
----------------------------------------
RESET
pin
RL1=2.2kΩ, CL1=100pF
RESET pin
L2=10kΩ, CL2=20pF
R
310
1.01.5
µS
1.01.5µS
Notes :
1: Monitoring time is the time from the last pulse (negative edge) of the timer clear clock pulse, until reset
*
pulse output. In other words, reset output is output if a clock pulse is not input during this time.
2: Reset time means reset pulse width. However, this does not apply to power on reset.
*
3: Reset hold time is the time from when VCC exceeds detection voltage (VSH) during power on reset, until
*
---------------------------------------
RESET
4: Output delay time is the time from when power supply voltage drops below detection voltage (VSL), until
*
---------------------------------------
RESET
5: Voltage range when measuring output rise and fall is 10~90%.
*
6: Watchdog timer monitoring time (TWD), watchdog timer reset time (TWR) and reset hold time (TPR) during
*
power supply rise can be changed by varying C
formulae. The recommended range for C
output goes high (reset release).
output goes low (reset status).
PR (mS)
T
T
WD (mS)
T
WR (mS)
.
=. 1000 CT (µF)Example : When CT=0.1µF
.
=. 100 CT (µF)TPR.=. 100mS
.
=. 20 CT (µF)TWD
T capacitance. The times are expressed by the following
T is 0.001~10µF.
.
=. 10mS
.
T
WR
=. 2mS
Page 4
MITSUMI
VCC
CK
C
T
RESET
RESET
V
SH
VSL
TCK
TPR
TWD
TWR
1432
8567
Block Diagram
System Reset (with built-in watchdog timer) MM1035
Note 1: CP = 0.1µF approx.
Note 2: C 1000pF.
~
-
Note 3: The watchdog timer can be stopped by connecting the RCT pin to GND.
(Then it functions as a voltage detection circuit.)
Timing Chart
Pin Assignment
1TC
2RESET
3CK
4GND
5V
CC
6RCT
7V
S
-----------------------------------------
8RESET
Page 5
MITSUMI
Pin Description
Pin No.Pin NameFunction
System Reset (with built-in watchdog timer) MM1035
1T
2RESETReset output pin (High output)
3CKClock input pin (inputs clock from logic system)