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MK3711
LOW COST 8 - 16 MHZ 3.3 VOLT VCXO
Description
The MK3711 series of devices include the original
MK3711S, MK3711A, and the new MK3711B and
MK3711D. The MK3711D and MK3711B are drop-in
replacements for the MK371 1S and MK371 1A devices.
Compared to these earlier devices the MK3711D and
MK3711B offer a wider operating frequency range and
improved power supply noise rejection.
The MK3711 series combines the functions of a VCXO
(Voltage Controlled Crystal Oscillator) and PLL (Phase
Locked Loop) frequency doubler onto a single chip.
Used in conjunction with an external pullable quartz
crystal, this monolithic integrated circuit replaces more
costly hybrid (canned) VCXO devices. The MK3711 is
designed primarily for data and clock recovery
applications within end products such as ADSL
modems, set-top box receivers, and telecom systems.
The MK3711D exhibits a moderate VCXO gain of
120ppm/V typical, when used with a high quality
external pullable quartz crystal. The MK3711B offers a
higher VCXO gain of 150ppm/V, similar to the earlier
MK3711A. The higher intrinsic VCXO gain of the
MK3711C may help compensate for the reduced
pullability of a low quality crystal used in some
applications. However, higher VCXO gain may also
increase clock output phase noise.
The frequency of the on-chip VCXO is adjusted by an
external co ntrol volt ag e inpu t in to pi n VI N. Si nce VIN is
a high impedance input, it can be driven directly from
an PWM RC integrator circuit. Frequency output
increases with VIN voltage input. The usable range of
VIN is 0 to 3V.
Features
• MK3711D and MK3711B are drop-in replacements
for the earlier MK3711S and MK3711A devices
• MK3711D and MK3711B offer 24-36 MHz output
frequency range (output frequency = 2x crystal
frequency) and improved power supply noise
rejection
• Uses an inexpensive 12 to 18 MHz external crystal
• Ideal for ADSL application s usi ng 17.664 MHz
external pullable crystal to generate locked 35.328
MHz clock physical layer clock
• Ideal for set-top box applications using 13.5 MHz
external pullable crystal to generate lock 27 MHz
clock transport video clock
• On-chip VCXO with guaranteed pull range of ±115
ppm minimum (MK3711D)
• VCXO tuning voltage 0 to 3.3 V
• Packaged in 8 pin SOIC (150 mil wide)
MK3711D is Recommended for New Designs
Block Diagram
VDD
VIN
8-1 6 M Hz
P ulla b le
C rystal
MDS 371 1 F 1 Revision 070301
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95 126 ● tel (408) 295-9800 ● www.icst.com
X1
X2
Voltage
Controlled
C rystal
O scilla to r
8-16 M Hz
GND
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Pin Assignment
X1
VDD
VIN
DC
GND
REF
DC
X21
2
3
4
8
7
6
5
MK3711S
MK3711A
MK3711B
MK3711D
8 Pin (150 mil) SOIC
MK3711
LOW COST 8 - 16 MHZ 3.3 VOLT VCXO
Pin Descriptions
Pin
Number
1 XI Input Crystal connection. Connect to the external pullable crystal.
2 VDD Power Connect to +3.3 V (0.01uf decoupling capacitor recommended).
3 VIN Input Voltage input to VCXO -- 0 to 3.3 V analog input which controls the
4 GND Power Connect to ground.
5 DC -- Do not connect anything to this pin.
6 REF Output VCXO CMOS level clock output matches the nominal frequency of the
7 DC -- Do not connect anything to this pin.
8 X2 Input Crystal connection. Connect to the external pullable crystal.
Pin
Name
Pin
Type
Pin Description
oscillation frequency of the VCXO.
crystal.
MDS 3711 F 2 Revision 070301
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 295-9800 ● www.icst.com
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MK3711
LOW COST 8 - 16 MHZ 3.3 VOLT VCXO
External Component Selection
The MK3711 requires a minimum number of external
components for proper operation.
Decoupling Capacitor
A decoupling capacitor of 0.01µF must be connected
between VDD (pin 2) and GND (pin 4), as close to
these pins as possible. For optimum device
performance, the decoupling capacitor should be
mounted on the component side of the PCB. Avoid the
use of vias in the decoupling circuit.
Series Termination Resistor
When the PCB trace between the clock output (CLK,
pin 5) and the load is over 1 inch, series termination
should be used. To series terminate a 50Ω trace (a
commonly used trace impedance) place a 33Ω resistor
in series with the clock line, as close to the clock output
pin as possible. The nominal impedance of the clock
output is 20Ω.
Quartz Crystal
The MK3711 VCXO function consists of the external
crystal and the integrated VCXO oscillator circuit. To
assure the best system performance (frequency pull
range) and reliability, a crystal device with the
recommended parameters (shown below) must be
used, and the layout guidelines discussed in the
following section shown must be followed.
The frequency of oscillation of a quartz crystal is
determined by its “cut” and by the load capacitors
connected to it. The MK3711 incorporates on-chip
variable load capacitors that “pull” (change) the
frequency of the crystal. The crystal specified for use
with the MK3711 is designed to have zero frequency
error when the total of on-chip + stray capacitance is
14pF.
For crystal frequencies between 13.5MHz and 16MHz,
the nominal crystal load capacitance specification
should be 14pF. Contact ICS MicroClock applications
regarding the use of a crystal below 13.5MHz.
The extern al crys tal must be co nne cte d as cl ose t o th e
chip as possible and should be on the same side of the
PCB as the MK3711. There should be no via’s between
the crystal pins and the X1 and X2 device pins. There
should be no signal traces underneath or close to the
crystal.
Crystal Tuning Load Capacitors
The crystal traces should include pads for small fixed
capacitors, one between X1 and ground, and another
between X2 and ground. Stuffing of these capacitors
on the PCB is optional. The need for these capacitors
is determined at system prototype evaluation, and is
influenced by the particular crystal used (manufacture
and frequency) and by PCB layout. The typical required
capacitor value is 1 to 4 pF.
To determine the need for and value of the crystal
adjustment capacitors, you will need a PC board of
your final layout, a frequency counter capable of about
1 ppm resolution and accuracy, two power supplies,
and some samples of the crystals which you plan to
use in production, along with measured initial accuracy
for each crystal at the specified crystal load
capacitance, CL.
To determine the value of the crystal capacitors:
1. Connect VDD of the MK3711 to 3.3V. Connect pin 3
of the MK3711 to the second power supply. Adjust the
voltage on pin 3 to 0V. Measure and record the
frequency of the CLK output.
2. Adjust the voltage on pin 3 to 3.3V. Measure and
record the frequency of the same output.
To calculate the centering error:
Recommended Crystal Parameters:
Initial Accuracy at 25
°C±20 ppm
Temperature Stability ±30 ppm
Error 106x
–()f0Vf
3.0Vftetarg
-----------------------------------------------------------------------------f
tetarg
–()+
tetarg
–=
error
xtal
f
Aging ±20 ppm
Load Capacitance 14 pf
Shunt Capacitance, C0 7 pF Max
C0/C1 Ratio 250 Max
Equivalent Series Resistance 35 Ω Max
Where:
MDS 3711 F 3 Revision 070301
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 295-9800 ● www.icst.com
Page 4
f
= nominal crystal frequency
target
error
being measured
If the centering error is less than ±25 ppm, no
adjustment is needed. If the centering error is more
than 25ppm negative, the PC board has excessive
stray capacitance and a new PCB layout should be
considered to reduce stray capacitance. (Alternately,
the crystal may be re-specified to a higher load
capacitance. Contact ICS MicroClock for details.) If the
centering error is more than 25ppm positive, add
=actual initial accuracy (in ppm) of the crystal
xtal
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the MK3711. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only . Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
MK3711
LOW COST 8 - 16 MHZ 3.3 VOLT VCXO
identical fixed centering capacitors from each crystal
pin to ground. The value for each of these caps (in pF)
is given by:
External Capacitor =
2 x (centering error)/(trim sensitivity)
Trim sensitivity is a parameter which can be supplied
by your crystal vendor. If you do not know the value,
assume it is 30 ppm/pF. After any changes, repeat the
measurement to verify that the remaining error is
acceptably low (typically less than ±25ppm).
Item Rating
Supply Voltage, VDD 7V
All Inputs and Outputs -0.5V to VDD+0.5V
Ambient Operating Temperature 0 to +70°C
Storage Temperature -65 to +150°C
Soldering Temperature 260°C
Recommended Operation Conditions
Parameter Min. Typ. Max. Units
Ambient Operating Temperature 0 – +70
Power Supply Voltage (measured in respect to GND) +3.15 +3.45 V
Reference crystal parameters Refer to page 3
C
°
MDS 3711 F 4 Revision 070301
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 295-9800 ● www.icst.com
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DC Electrical Characteristics
MK3711
LOW COST 8 - 16 MHZ 3.3 VOLT VCXO
VDD=3.3V ±5% , Ambient temperature 0 to +70
Parameter Symbol Conditions Min. Typ. Max. Units
Operating Voltage VDD 3.15 3.45 V
Output High Voltage V
Output Low Voltage V
Output High Voltage (CMOS
Level)
Operating Supply Current IDD Output = 12 MHz,
Short Circuit Current I
VIN, VCXO Control Voltage V
AC Electrical Characteristics
VDD = 3.3V ±5%, Ambient Temperature 0 to +70
Parameter Symbol Conditions Min. Typ. Max. Units
Output Frequency
MK3711D and
MK3711B
MK3711A and
MK3711S
Crystal Pullability
MK3711D and
MK3711B
MK3711A and
MK3711S
VCXO Gain
MK3711D VIN = VDD/2 +
MK3711B VIN = VDD/2 +
MK3711A VIN = VDD/2 +
MK3711S VIN = VDD/2 +
Output Rise Time t
Output Fall Time t
Output Clock Duty Cycle t
Maximum Output Jitter,
short term
F
F
F
F
OR
OF
C, unless stated otherwise
°
I
OH
OL
V
OH
= -12 mA 2.4 V
OH
IOL = 12 mA 0.4 V
I
= -4 mA VDD-0.4 V
OH
7mA
no load
OS
IA
C, unless stated otherwise
°
O
O
VCXO Crystal frequency =
03.3V
±50 mA
816MHz
12 MHz
12 MHz
P
P
0V< VIN < 3.3V, Note 1 + 115 ppm
0V< VIN < 3.3V, Note 1 + 100 ppm
1V, Note 1 120 ppm/V
1V, Note 1 150 ppm/V
1V, Note 1 170 ppm/V
1V, Note 1 100 ppm/V
0.8 to 2.0V , CL=15pF 1.5 ns
2.0 to 0.8V , CL=15pF 1.5 ns
D
t
J
Measured at 1.4V, CL=15pF 40 50 60 %
CL=15pF 100 ps
Note 1: External crystal device must conform with Pullable Crystal Specifications listed on page 3.
MDS 3711 F 5 Revision 070301
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 295-9800 ● www.icst.com
Page 6
MK3711
LOW COST 8 - 16 MHZ 3.3 VOLT VCXO
Package Outline and Package Dimensions (8 pin SOIC, 150 Mil. Narrow Body)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters Inches
Symbol MinMaxMinMax
A 1.35 1.75 0.0532 0.0688
A1 1.10 0.25 0.0040 0.0098
B 0.33 0.51 0.013 0.020
Index
Area
Pin 1
EH
0
D
h x 45
C 0.19 0.25 0.0075 0.0098
D 4.80 5.00 .1890 .1968
E 3.80 4.00 0.1497 0.1574
e 1.27 Basic 0.050 Basic
H 5.80 6.20 0.2284 0.2440
h 0.25 0.50 0.010 0.020
L 0.40 1.27 0.016 0.050
a0°8
°
0
°
8
°
A
Q
be
c
Ordering Information
Part / Order Number
(Note 1)
MK3711D MK3711D Tubes 8 pin SOIC 0 to +70° C
MK3711DTR MK3711D Tape and Reel 8 pin SOIC 0 to +70° C
MK3711B MK3711B Tubes 8 pin SOIC 0 to +70° C
MK3711BTR MK3711B Tape and Reel 8 pin SOIC 0 to +70° C
MK3711A MK3711A Tubes 8 pin SOIC 0 to +70° C
MK3711ATR MK3711A Tape and Reel 8 pin SOIC 0 to +70° C
MK3711S MK3711S Tubes 8 pin SOIC 0 to +70° C
MK3711STR MK3711S Tape and Reel 8 pin SOIC 0 to +70° C
Note 1: MK3711D is recommended for new designs.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS)
assumes no responsibility for either its use or for the infringement of any patent s or other rights of t hird parties, which would
result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial
applications. Any oth er ap pl ic ations such as those req uiri ng extended tempera ture ran ge, high reliabilit y, or other extraordinary
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any
circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or
critical medical instruments.
Marking Shipping
packaging
Package Temperature
MDS 3711 F 6 Revision 070301
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 295-9800 ● www.icst.com
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