Datasheet MJ10009 Datasheet (MOTOROLA)

1

Motorola Bipolar Power Transistor Device Data

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The MJ10009 Darlington transistor is designed for high–voltage, high–speed,
power switching in Inductive circuits where fall time is critical. It is particularly suited
for line operated switchmode applications such as:

• Switching Regulators

• Inverters

• Solenoid and Relay Drivers

• Motor Controls

• Deflection Circuits

Fast Turn–Off Times

1.6 µs (max) Inductive Crossover Time – 10 A, 100_C

3.5 µs (max) Inductive Storage Time – 10 A, 100_C

Operating Temperature Range –65 to +200_C
100_C Performance Specified for:

Reversed Biased SOA with Inductive Loads
Switching Times with Inductive Loads
Saturation Voltages
Leakage Currents

MAXIMUM RATINGS

Rating

Symbol

Value

Unit

Collector–Emitter Voltage

V

CEO

500

Vdc

Collector–Emitter Voltage

VCEX

500

Vdc

Collector–Emitter Voltage

V

CEV

700

Vdc

Emitter Base Voltage

V

EB

8

Vdc

Collector Current — Continuous

— Peak (1)

I

C

I

CM

20
30

Adc

Base Current — Continuous

— Peak (1)

I

B

I

BM

2.5
5

Adc

Total Power Dissipation @ TC = 25_C

@ TC = 100_C

Derate above 25_C

P

D

175
100

1

Watts

W/_C

Operating and Storage Junction Temperature Range

TJ, T

stg

–65 to +200

_

C

THERMAL CHARACTERISTICS

Characteristic

Symbol

Max

Unit

Thermal Resistance, Junction to Case

R

θJC

1

_

C/W

Maximum Lead Temperature for Soldering Purposes: 1/8″ from Case for 5 Seconds

T

L

275

_

C

(1) Pulse Test: Pulse Width = 5 ms, Duty Cycle v 10%.

Designer’s and SWITCHMODE are trademarks of Motorola, Inc.
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit

curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
Preferred devices are Motorola recommended choices for future use and best overall value.



SEMICONDUCTOR TECHNICAL DATA

Order this document

by MJ10009/D

 Motorola, Inc. 1995

20 AMPERE

NPN SILICON

POWER DARLINGTON

TRANSISTORS

450 and 500 VOLTS

175 WATTS



CASE 1–07

TO–204AA

(TO–3)



*Motorola Preferred Device

≈

100≈ 15

REV 2

MJ10009

2

Motorola Bipolar Power Transistor Device Data

ELECTRICAL CHARACTERISTICS (T

C

= 25_C unless otherwise noted)

Characteristic

Symbol

Min

Typ

Max

Unit

OFF CHARACTERISTICS

Collector Emitter Sustaining Voltage (Table 1)

(IC = 100 mA, IB = 0, V

clamp

= Rated V

CEO

)

V

CEO(sus)

500

—

—

Vdc

Collector Emitter Sustaining Voltage (Table 1, Figure 12)

(IC = 2 A, V

clamp

= Rated V

CEX

, TC = 100_C, V

BE(off)

= 5 V)

(IC = 10 A, V

clamp

= Rated V

CEX

, TC = 100_C, V

BE(off)

= 5 V)

V

CEX(sus)

500
375

—
—

—
—

Vdc

Collector Cutoff Current

(V

CEV

= Rated Value, V

BE(off)

= 1.5 Vdc)

(V

CEV

= Rated Value, V

BE(off)

= 1.5 Vdc, TC = 150_C)

I

CEV

—
—

—
—

0.25
5

mAdc

Collector Cutoff Current

(VCE = Rated V

CEV

, RBE = 50 Ω, TC = 100_C)

I

CER

—

—

5

mAdc

Emitter Cutoff Current

(VEB = 2 Vdc, IC = 0)

I

EBO

—

—

175

mAdc

SECOND BREAKDOWN

Second Breakdown Collector Current with base forward biased

I

S/b

See Figure 11

ON CHARACTERISTICS (2)

DC Current Gain

(IC = 5 Adc, VCE = 5 Vdc)
(IC = 10 Adc, VCE = 5 Vdc)

h

FE

40
30

—
—

400
300

—

Collector–Emitter Saturation Voltage

(IC = 10 Adc, IB = 500 mAdc)
(IC = 20 Adc, IB = 2 Adc)
(IC = 10 Adc, IB = 500 mAdc, TC = 100_C)

V

CE(sat)

—
—
—

—
—
—

2

3.5

2.5

Vdc

Base–Emitter Saturation Voltage

(IC = 10 Adc, IB = 500 mAdc)
(IC = 10 Adc, IB = 500 mAdc, TC = 100_C)

V

BE(sat)

—
—

—
—

2.5

2.5

Vdc

Diode Forward Voltage (1)

(IF = 10 Adc)

V

f

—

3

5

Vdc

DYNAMIC CHARACTERISTICS

Small–Signal Current Gain

(IC = 1 Adc, VCE = 10 Vdc, f

test

= 1 MHz)

h

fe

8

—

—

—

Output Capacitance

(VCB = 10 Vdc, IE = 0, f

test

= 100 kHz)

C

ob

100

—

325

pF

SWITCHING CHARACTERISTICS

Resistive Load (Table 1)

Delay Time

t

d

—

0.12

0.25

µs

Rise Time

t

r

—

0.5

1.5

µs

Storage Time

IB1 = 500 mA, V

BE(off)

= 5 Vdc, tp = 25 µs

Duty Cycle v 2%).

t

s

—

0.8

2.0

µs

Fall Time

v

2%).

t

f

—

0.2

0.6

µs

Inductive Load, Clamped (Table 1)

Storage Time

C

= 10 A(pk), V

clamp

= 250 V, IB1 = 500 mA,

t

sv

—

1.5

3.5

µs

Crossover Time

(IC = 10 A(pk), V

clamp

= 250 V, IB1 = 500 mA,

V

BE(off)

= 5 Vdc, TC = 100_C)

t

c

—

0.36

1.6

µs

Storage Time

C

= 10 A(pk), V

clamp

= 250 V, IB1 = 500 mA,

t

sv

—

0.8

—

µs

Crossover Time

(IC = 10 A(pk), V

clamp

= 250 V, IB1 = 500 mA,

V

BE(off)

= 5 Vdc)

t

c

—

0.18

—

µs

(1) The internal Collector–to–Emitter diode can eliminate the need for an external diode to clamp inductive loads.

(1) Tests have shown that the Forward Recovery Voltage (Vf) of this diode is comparable to that of typical fast recovery rectifiers.

(2) Pulse Test: PW = 300 µs, Duty Cycle ≤ 2%.

(I

(I

(VCC = 250 Vdc, IC = 10 A,

MJ10009

3

Motorola Bipolar Power Transistor Device Data

Figure 1. DC Current Gain

IC, COLLECTOR CURRENT (AMP)

20

0.2 1 2

200

100

60

Figure 2. Collector Saturation Region

3

0.03
IB, BASE CURRENT (AMP)

1

0.05 0.1 0.2 0.5 1 2 3

2.6

2.2

1.8

1.4
TJ = 25°C

400

h

FE

, DC CURRENT GAIN

TJ = 150°C

VCE = 5 V

40

0.5 5 10 20

25°C

IC = 5 A 10 A 20 A

V, VOLTAGE (VOLTS)

VBE, BASE–EMITTER VOLTAGE (VOLTS)

10

4

10

3

10

2

10

1

, COLLECTOR CURRENT ( A)I

C

10

0

0 +0.2–0.2

VCE = 250 V

TJ = 125°C

100°C

25°C

Figure 3. Collector–Emitter Saturation Voltage

2.4

0.2
IC, COLLECTOR CURRENT (AMP)

0.4

0.3 0.5 0.7 1 2 5 20

2

1.6

1.2

0.8

IC/IB = 10

TJ = – 55°C

73

Figure 4. Base-Emitter Voltage

2.8

IC, COLLECTOR CURRENT (AMP)

0.8

0.2 0.3 0.5 0.7

2.4

2

1.6

1.2

Figure 5. Collector Cutoff Region

0.4

Figure 6. Output Capacitance

VR, REVERSE VOLTAGE (VOLTS)

50

1 2 20 60100.6

200

70

TJ = 25°C

C

ob

1000

500

100

100 200 400

V, VOLTAGE (VOLTS)

10

25°C

150°C

2 5 2073 101

25°C

150°C

25°C

TJ = – 55°C

V

BE(sat)

@ IC/IB = 10

V

BE(on)

@ VCE = 3 V

75°C

µ

10

–1

+0.4 +0.8+0.6

4 6 40

700

300

C

ob

, OUTPUT CAPACITANCE (pF)

REVERSE

FORWARD

TYPICAL CHARACTERISTICS

, COLLECTOR–EMITTER VOLTAGE (VOLTS)

CE

V

MJ10009

4

Motorola Bipolar Power Transistor Device Data

t

t

1

t

f

t

I

C

V

CE

TEST CIRCUITS

CIRCUIT

VALUES

INPUT

CONDITIONS

V

CEO(sus)

RBSOA AND INDUCTIVE SWITCHING RESISTIVE SWITCHING

L

coil

= 10 mH, VCC = 10 V

R

coil

= 0.7 Ω

V

clamp

= V

CEO(sus)

L

coil

= 180 µH

R

coil

= 0.05 Ω

VCC = 20 V

V

clamp

= Rated V

CEX

Value

VCC = 250 V
RL = 25 Ω
Pulse Width = 25 µs

t

2

TIME

tf CLAMPED

VCE or
V

clamp

tf UNCLAMPED

[

t

2

20

1

0

PW Varied to Attain
IC = 100 mA

2

DRIVER SCHEMATIC

INDUCTIVE TEST CIRCUIT

t1 Adjusted to
Obtain I

C

Test Equipment

Scope — Tektronix

475 or Equivalent

RESISTIVE TEST CIRCUITOUTPUT WAVEFORMS

For inductive loads pulse width
is adjusted to obtain specified I

C

+

10

µ

F

0.05

µ

F

1
2

HP214

– 38 V

PG

IN

50

10

1000

0.005

µ

F

10

2.0

µ

F

2N3762

10

100

+ V DRIVE

RB

0.005

MTP3055E

50

MTP3055E

– V

off

DRIVE

–

+ –

IB1 adjusted to

obtain the forced

hFE desired

TURN–OFF TIME

Use inductive switching

driver as the input to

the resistive test circuit.

I

B1

1
2

1

INPUT

2

R

coil

L

coil

V

CC

V

clamp

RS =

0.1

Ω

1N4937

OR

EQUIVALENT

TUT

SEE ABOVE FOR
DETAILED CONDITIONS

1
2

TUT

R

L

V

CC

t1 ≈

L

coil (IC

pk

)

V

CC

t2 ≈

L

coil (IC

pk

)

V

Clamp

Table 1. Test Conditions for Dynamic Performance

90% V

CEM

I

C

90% I

CM

I

CM

V

CEM

t

c

90% I

B1

V

CE

I

B

10% V

CEM

10%
I

CM

2% I

C

t

sv

t

rv

t

fi

t

ti

Figure 7. Inductive Switching Measurements

TIME

V

clamp

SWITCHING TIMES NOTE

In resistive switching circuits, rise, fall, and storage times
have been defined and apply to both current and voltage wa­veforms since they are in phase. However, for inductive
loads which are common to SWITCHMODE power supplies
and hammer drivers, current and voltage waveforms are not
in phase. Therefore, separate measurements must be made
on each waveform to determine the total switching time. For
this reason, the following new terms have been defined.

tsv = Voltage Storage Time, 90% IB1 to 10% V

clamp

trv = Voltage Rise Time, 10–90% V

clamp

tfi = Current Fall Time, 90–10% I

C

tti = Current Tail, 10–2% I

C

tc = Crossover Time, 10% V

clamp

to 10% I

C

I

C(pk)

MJ10009

5

Motorola Bipolar Power Transistor Device Data

TYPICAL CHARACTERISTICS

SWITCHING TIMES NOTE (continued)

For the designer, there is minimal switching loss during
storage time and the predominant switching power losses
occur during the crossover interval and can be obtained us­ing the standard equation from AN–222.

P

SWT

= 1/2 VCC IC (tc) f

Typical inductive switching waveforms are shown in Fig-

ure 7. In general, trv + tfi ] tc. However, at lower test cur­rents this relationship may not be valid.

As is common with most switching transistors, resistive
switching is specified at 25_C and has become a benchmark
for designers. However, for designers of high frequency con­verter circuits, the user oriented specifications which make
this a “SWITCHMODE” transistor are the inductive switching
speeds (tc and tsv) which are guaranteed at 100_C.

2

Figure 8. Turn-On Time

IC, COLLECTOR CURRENT (AMP)

t, TIME ( s)

µ

0.1

VCC = 250 V
IC/IB = 20
TJ = 25°C

t

d

t

r

1.0

Figure 9. Turn-Off Time

IC, COLLECTOR CURRENT (AMP)

t, TIME ( s)

µ

0.5

0.1

0.05

VCC = 250 V
IC/IB = 20
V

BE(off)

= 5 V

TJ = 25

°

C

t

f

t

s

0.2

tP = 25 µs, DUTY CYCLE v 2%

tP = 25 µs, DUTY CYCLE v 2%

1

0.2

0.5

201 52 10 201 52 10

RESISTIVE SWITCHING PERFORMANCE

Figure 10. Thermal Response

t, TIME (ms)

1.0

0.01

0.01

0.7

0.5

0.3

0.2

0.1

0.07

0.05

0.03

0.02

0.02 0.05 0.1 0.2 0.5 1.0 2.0 5.0 10 20 50 100 200 1 k500

Z

θ

JC

(t) = r(t) R

θ

JC

R

θ

JC

= 1.0

°

C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t

1

T

J(pk)

– TC = P

(pk)

Z

θ

JC(t)

P

(pk)

t

1

t

2

DUTY CYCLE, D = t1/t

2

D = 0.5

0.2

0.05

0.02

0.01

SINGLE PULSE

0.1

r(t), TRANSIENT THERMAL RESISTANCE

(NORMALIZED)

MJ10009

6

Motorola Bipolar Power Transistor Device Data

The Safe Operating Area figures shown in Figures 11 and 12 are
specified ratings for these devices under the test conditions
shown.

50

Figure 11. Forward Bias Safe Operating Area

VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)

20

5

1

0.5

0.1

0.005
6 10 20 600

BONDING WIRE LIMIT
THERMAL LIMIT @ TC = 25

°

C

(SINGLE PULSE)

SECOND BREAKDOWN LIMIT

50

0.05

I

C

, COLLECTOR CURRENT (AMP)

dc

0.2

100 200 450

100 µs

10 µs

20

0

Figure 12. Reverse Bias Switching

Safe Operating Area (MJ10009)

VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)

16

12

0

500

4

I

C

, COLLECTOR CURRENT (AMP)

8

300 400100 200

V

BE(off)

= 5 V

1 ms

MJ10009

V

BE(off)

= 2 V

V

BE(off)

= 0 V

TC = 100°C
IC/IB1

≥

20

10

2

0.02

0.01

500

18

14

10

6

2

SAFE OPERATING AREA INFORMATION

FORWARD BIAS

There are two limitations on the power handling ability of a
transistor: average junction temperature and second break­down. Safe operating area curves indicate IC – VCE limits of
the transistor that must be observed for reliable operation,
i.e., the transistor must not be subjected to greater dissipa­tion than the curves indicate.

The data of Figure 11 is based on TC = 25_C; T

J(pk)

is
variable depending on power level. Second breakdown pulse
limits are valid for duty cycles to 10% but must be derated
when TC ≥ 25_C. Second breakdown limitations do not der­ate the same as thermal limitations. Allowable current at the
voltages shown on Figure 11 may be found at any case tem­perature by using the appropriate curve on Figure 13.

T

J(pk)

may be calculated from the data in Figure 10. At
high case temperatures, thermal limitations will reduce the
power that can be handled to values less than the limitations
imposed by second breakdown.

REVERSE BIAS

For inductive loads, high voltage and high current must be
sustained simultaneously during turn–off, in most cases, with
the base to e mitter junction reverse biased. Under these
conditions the collector voltage must be held to a safe level
at or below a specific value of collector current. This can be
accomplished by several means such as active clamping,
RC snubbing, load line shaping, etc. The safe level for these
devices is specified as V

CEX(sus)

at a given collector current
and represents a voltage–current condition that can be sus­tained during reverse biased turn–off. This rating is verified
under clamped conditions so that the device is never sub­jected to an avalanche mode. Figure 12 gives the complete
reverse bias safe operating area characteristics. See Table 1
for circuit conditions.

10

0

Figure 13. Power Derating

V

BE(off)

, REVERSE BASE CURRENT (VOLTS)

7

5

0

2 5 87

2

I

B2(pk)

, BASE CURRENT (AMP)

IC = 10 A

1

SEE TABLE 1 FOR CONDITIONS,
FIGURE 7 FOR WAVESHAPE.

100

80

60

20

0

0 40 80 120 200

Figure 14. Reverse Base Current versus

V

BE(off)

with No External Base Resistance

TC, CASE TEMPERATURE (°C)

POWER DERATING FACTOR (%)

THERMAL DERATING

FORWARD BIAS
SECOND BREAKDOWN
DERATING

160

40

MJ10009

7

Motorola Bipolar Power Transistor Device Data

PACKAGE DIMENSIONS

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. ALL RULES AND NOTES ASSOCIATED WITH
REFERENCED TO–204AA OUTLINE SHALL APPLY.

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A 1.550 REF 39.37 REF
B ––– 1.050 ––– 26.67
C 0.250 0.335 6.35 8.51
D 0.038 0.043 0.97 1.09
E 0.055 0.070 1.40 1.77

G 0.430 BSC 10.92 BSC

H 0.215 BSC 5.46 BSC
K 0.440 0.480 11.18 12.19
L 0.665 BSC 16.89 BSC
N ––– 0.830 ––– 21.08

Q 0.151 0.165 3.84 4.19

U 1.187 BSC 30.15 BSC
V 0.131 0.188 3.33 4.77

A

N

E

C

K

–T–

SEATING
PLANE

2 PLD

M

Q

M

0.13 (0.005) Y

M

T

M

Y

M

0.13 (0.005) T

–Q–

–Y–

2

1

U

L

G

B

V

H

CASE 1–07

TO–204AA (TO–3)

ISSUE Z

STYLE 1:

PIN 1. BASE

2. EMITTER

CASE: COLLECTOR

MJ10009

8

Motorola Bipolar Power Transistor Device Data

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MJ10009/D

*MJ10009/D*

◊