Datasheet MCP19035 Datasheet

MCP19035
MCP19035
3x3 DFN*
COMP
FB
V
IN
PHASE
BOOT
1
2
3
4
10
9
8
7
LDRV
HDRVSHDN
* Includes Exposed Thermal Pad (EP); see Ta b l e 3 - 1.
EP
11
6
PWRGD
+V
CC
5
High-Speed Synchronous Buck Controller
Features:
• Input Voltage Range: from 4.5V to 30V
• Targeted for Low-Voltage Power Trains with Output Current up to 20A
• High-Speed Voltage Mode, Analog Pulse-Width Modulation Control
• Internal Oscillator, Reference Voltage and Overcurrent Limit Threshold for Stand-Alone Applications.
• Multiple Switching Frequency Options (F
- 300 kHz
-600kHz
• Integrated Synchronous MOSFET Drivers
• Multiple Dead-Time Options
• Internal Blocking Device for Bootstrap Circuit
• Integrated Current Sense Capability for Short Circuit Protection
• Internal Overtemperature Protection
• Under Voltage Lockout (UVLO)
• Integrated Linear Voltage Regulator
• 10-LD 3X3mm DFN Package
SW
):
General Description
The MCP19035 is an application-optimized, high­speed synchronous buck controller that operates from input voltage sources up to 30V. This controller implements a voltage-mode control architecture with a fixed switching frequency of 300 kHz or 600 kHz. The high-switching frequency facilitates the use of smaller passive components, including the inductor and input/output capacitors, allowing a compact, high­performance power supply solution. The MCP19035 implements an adaptive anti-cross conduction scheme to prevent shoot-through in the external power MOSFETs. Furthermore, the MCP19035 offers multiple dead-time options, enabling an additional degree of optimization, allowing a higher efficiency power supply design.
The MCP19035 controller is intended to be used for applications providing up to 20A of output currents across a wide input voltage range, up to 30V.
The SHDN While turned off, the current consumption is minimized.
The MCP19035 offers a Power Good feature (PWRGD), enabling fault detection and simplifying sequencing.
input is used to turn the device on and off.
Applications:
• Point of Loads
• Set-Top Boxes
• DSL Cable Modems
• FPGA’s/DSP’s Power Supply
• PC’s Graphic/Audio Cards
2012-2013 Microchip Technology Inc. DS22326B-page 1
Package Types
MCP19035
C
IN
C
OUT
L
Q
1
Q
2
MCP19035
HDRV
LDRV
PHASE
BOOT
+V
CC
C
BOOT
C
VCC
+V
OUT
V
IN
PWRGD
COMP
FB
R
1
R
3
C
1
R
2
C
3
R
4
C
2
ON
OFF
SHDN
GND
+
V
IN
Typical Application
DS22326B-page 2 2012-2013 Microchip Technology Inc.
MCP19035
1.0 ELECTRICAL
CHARACTERISTICS
† Notice: Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those
Absolute Maximum Ratings †
VIN - V
V
BOOT
VHDRV, HDRV Pin................. +V
VLDRV, LDRV Pin.....................+ (V
Max. Voltage on Any Pin........... + (V
Storage Temperature ....................................-65°C to +150°C
Maximum Junction Temperature................................. +150°C
ESD protection on all pins (HBM) ....................................2 kV
ESD protection on all pins (MM) .....................................200V
........................................................ -0.3V to +32V
GND
................................................................-0.3V to +37V
-0.3V to V
PHASE
-0.3V) to (VCC+0.3V)
GND
-0.3V) to (VCC+0.3V)
GND
BOOT
+0.3V
indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, V
values), T
= -40°C to +125°C (for minimum and maximum).
A
Parameters Symbol Min Typ Max Units Conditions
Inputs
Input Voltage Range V
UVLO (V
Rising) UVLO
IN
UVLO (VIN Falling) UVLO
UVLO Hysteresis UVLO
Input Quiescent Current I(V
Shutdown Current I
IN_SHDN
IN
ON
OFF
HYST
)—68 mA
IN
4.5 30 V
44.24.4 V
3.4 3.6 3.8 V
600 mV
25 50 µA SHDN = GND.
Linear Regulator
Output Voltage V
Output Current I
Short-Circuit
VCC-OUT
I
VCC-OUT_SC
CC
4.875 5 5.125 V 6V VIN < 30V 50 mA 6.5V VIN < 30V, Note 2
100 mA VIN = 6V, R
Output Current
Load Regulation 0.1 % Note 1 Line Regulation 0.05 % Note 1
Dropout Voltage 0.75 1.3 V I
Power Supply
PSRR 70 dB f 1000 Hz,
Rejection Ratio
Internal Oscillator
Switching Frequency F
SW
255 300 345 kHz 2 options, see Section 4.4,
510 600 690 kHz
Ramp Signal Amplitude V
RAMP
0.911.1V
Reference Voltage
Reference Voltage
V
REF
585 600 615 mV
Generator
Note 1: Ensured by design. Not production tested.
2: Limited by the maximum power dissipation of the case. 3: Possibility to be adjusted for high volumes.
= 12V, FSW = 300 kHz, CIN = 1.0 µF, TA = +25°C (for typical
IN
Internal Voltage Regulator is also disabled
VCC_OUT
I
VCC_OUT
= 0 µF,
C
IN
C
VCC-OUT
Internal Oscillator Note 1
PP
< 0.1
LOAD
= 50 mA
= 50 mA
= 4.7 µF, Note 1
2012-2013 Microchip Technology Inc. DS22326B-page 3
MCP19035
DC ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise noted, V
values), T
= -40°C to +125°C (for minimum and maximum).
A
Parameters Symbol Min Typ Max Units Conditions
Error Amplifier
Gain Bandwidth Product GBP 6.5 10 MHz Note 1
Open Loop Gain A
Input Offset Voltage V
Input Bias Current
I
OL
OS
BIAS
70 80 dB Note 1
-5 0.1 5 mV Note 1
—— 5 nANote 1
(FB Pin)
Error Amplifier
I
SINK
—5— mANote 1
Sink Current
Error Amplifier
I
SOURCE
—5— mANote 1
Source Current
PWM Section
Maximum Duty Cycle DC
Minimum ON time t
ON(MIN)
MAX
85 % Note 1 50 100 ns 6V VIN < 30V, Note 1
Soft Start
Soft Start Time t
SS
—8— ms
Shutdown
Logic Low-to-High
SHDN
HI
0.85 V 4.5V VIN < 30V, VCC goes
Threshold
Logic High-to-Low
SHDN
LO
0.4 V 4.5V VIN < 30V, VCC goes
Threshold
Power Goo d
Power Good
PG
TH-H
—9396% of V
Threshold High
Power Good
PG
TH-LOW
88 90 % of V
Threshold Low
Power Good
PG
TH-HYS
—3—% of V
Threshold Hysteresis
Power Good Delay t
Power Good Active
t
PG-DELAY
PG-TIME-OUT
150 us VFB = (PG
120 ms VFB = (PG
Time-O ut Period
MOSFET Drivers
High-Side Driver Pull-up
R
HI-SOURCE
—23.5 V
Resistance
High-Side Driver Pull-
R
HI-SINK
—23.5 V
Down Resistance
Low-Side Driver Pull-Up
R
LO-SOURCE
—23.5 VCC = 5V, Note 1
Resistance
Low-Side Driver Pull-
R
LO-SINK
—12.5 VCC = 5V, Note 1
Down Resistance
HDRV Rise Time t
HDRV Fall Time t
LDRV Rise Time t
RH
FH
RL
—1535 nsC
—1535 nsC
—1025 nsC
Note 1: Ensured by design. Not production tested.
2: Limited by the maximum power dissipation of the case. 3: Possibility to be adjusted for high volumes.
= 12V, FSW = 300 kHz, CIN = 1.0 µF, TA = +25°C (for typical
IN
from 0V to 5V
from 5V to 0V
REF
REF
REF
(PG
TH-LOW
(PG
TH-HI
BOOT–VPHASE
I
HDRV
BOOT–VPHASE
I
HDRV
LOAD
LOAD
LOAD
+ 100 mV) to
TH-HI
– 100 mV)
– 100 mV) to
TH-HI
+ 100 mV)
= 4.5V,
= 100 mA, Note 1
= 4.5V,
= 100 mA, Note 1
= 1.0 nF, Note 1 = 1.0 nF, No te 1 = 1.0 nF, No te 1
DS22326B-page 4 2012-2013 Microchip Technology Inc.
MCP19035
DC ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise noted, V
values), T
= -40°C to +125°C (for minimum and maximum).
A
Parameters Symbol Min Typ Max Units Conditions
LDRV Fall Time t
Dead Time t
FL
DT
—1025 nsC
20 ns Two Dead-Time options, see
—12—
Short Circuit Protection
High-Side Over Current
OC
TH-HI
430 480 530 mV Note 1, V
Threshold Voltage
Low-Side Over Current
OC
TH-LO
130 180 230 mV Note 1, Note 3
Threshold Voltage
Minimum Pulse Width
t
SS-MIN
800 ns Note 1
During Short Circuit
Off-Time Between
t
SS-HT
30 60 ms Note 1
Restart Attempts (Hick­Up Time)
Thermal Shutdown
Thermal Shutdown TSHD 150 °C Note 1
Thermal Shutdown
TSHD_HYS 15 °C Note 1
Hysteresis
Note 1: Ensured by design. Not production tested.
2: Limited by the maximum power dissipation of the case. 3: Possibility to be adjusted for high volumes.
= 12V, FSW = 300 kHz, CIN = 1.0 µF, TA = +25°C (for typical
IN
LOAD
Section 5.2.2, Dead Time Selection, Note 1
= 1.0 nF, No te 1
= 5V
CBOOT
TEMPERATURE SPECIFICATIONS
Electrica l Character istics: Unless otherwise indicated, V
Parameters Sym Min Typ Max Units Conditions
Temperature Ranges
Specified Temperature Range T
Maximum Junction Temperature T
J-MAX
Operating Temperature Range T
Storage Temperature Range T
Thermal Package Resistances
Thermal Resistance, 10L-3x3 DFN
-40 +125 °C
A
——+15C
-40 +125 °C
A
-65 +150 °C
A
JA
53.3 °C/W Typical 4-Layer board with
= 6.0V to 30V, FSW = 300 kHz
IN
interconnecting vias
2012-2013 Microchip Technology Inc. DS22326B-page 5
MCP19035
NOTES:
DS22326B-page 6 2012-2013 Microchip Technology Inc.
MCP19035
5.0
6.0
7.0
iescent Current (mA)
fSW= 300 kHz
fSW= 600 kHz
4.0
0 5 10 15 20 25 30 35
Input Qu
Input Voltage (V)
4.0
6.0
8.0
10.0
escent Current (mA)
0.0
2.0
-50 0 50 100 150
Input Qu
i
Junction Temperature (°C)
-4.0
-2.0
0.0
2.0
4.0
scillator Frequency
ariation (%)
f
S
W
= 300 kHz
fSW= 600 kHz
-10.0
-8.0
-6.0
-50 0 50 100 150
Relative
O
V
Junction Temperature (°C)
4.99
5.01
5.03
5.05
utput Voltage (V)
I
LOAD
= 20 mA
4.95
4.97
0 10203040
LDO
O
Input Voltage (V)
4.99
5.01
5.03
5.05
Output Voltage (V)
4.95
4.97
0 204060
LDO
Load Current (mA)
0.75
1
1.25
1.5
opout Voltage (V)
I
LOAD
= 50 mA
0
0.25
0.5
-50 0 50 100 150
LDO D
r
Junction Temperature (°C)

2.0 TYPICAL PERFORMANCE CURVES

Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, T
=+25°C, VIN = 12V, V
A

FIGURE 2-1: Input Quiescent Current vs. Input Voltage.

= 1.8V, fSW = 300 kHz, C
OUT
FIGURE 2-4: +V Input Voltage.
= 4.7 uF.
VCC
CC-OUT
Regulation vs.

FIGURE 2-2: Input Quiescent Current vs. Temperature.

FIGURE 2-3: Relative Oscillator Frequency Variation vs. Temperature.

2012-2013 Microchip Technology Inc. DS22326B-page 7
FIGURE 2-5: +V
CC-OUT
Regulation vs.
Load Current.

FIGURE 2-6: LDO Regulator Dropout Voltage vs. Temperature.

MCP19035
-50.0
-30.0
-10.0
DO PSRR (dB)
-90.0
-70.0
10 1000 100000
L
Frequency (Hz)
0
0.1
0.2
e Reference Voltage
Variation (%)
-0.2
-0.1
-50 0 50 100 150
Relati
v
Junction Temperature (°C)
4
5
Volatge Lockout
resholds (V)
VINRising
VINFalling
2
3
-50 0 50 100 150
Under
T
h
Junction Temperature (°C)
8.0
9.0
10.0
11.0
12.0
Start Time (ms)
I
OUT
= 1 A
fSW= 600 kHz
=
5.0
6.0
7.0
-50 0 50 100 150
Sof
t
Junction Temperature (°C)
fSW300 kHz
500
600
Side Overcurrent
reshold (mV)
V
CBOOT
= 5V
300
400
-50 0 50 100 150
High-
T
h
Junction Temperature (°C)
-100
0
Side Overcurrent
hreshold (mV)
-200
-50 0 50 100 150
Low
-
T
Junction Temperature (°C)
Note: Unless otherwise indicated, T
FIGURE 2-7: +V
CC-OUT
LDO PSRR vs.
Frequency.
=+25°C, VIN = 12V, V
A
= 1.8V, fSW = 300 kHz, C
OUT
VCC
= 4.7 uF.

FIGURE 2-10: Soft Start Time vs. Temperature.

FIGURE 2-8: Relative Reference Voltage Variation vs. Temperature.

FIGURE 2-9: UVLO Thresholds vs. Temperature.

DS22326B-page 8 2012-2013 Microchip Technology Inc.

FIGURE 2-11: High-Side Overcurrent Threshold vs. Temperature.

FIGURE 2-12: Low-Side Overcurrent Threshold vs. Temperature.

MCP19035
-10
0
10
20
30
40
50
e Driver PMOS R
DSon
ive Variation (%)
-50
-40
-30
-
20
-50 0 50 100 150
High-Si
d
Rela
t
Junction Temperature (°C)
-10
0
10
20
30
40
50
Driver NMOS R
DSon
ive Variation (%)
-50
-40
-30
-20
-50 0 50 100 150
High-Sid
e
Rela
t
Junction Temperature (°C)
-10
0
10
20
30
40
50
Driver PMOS R
DSon
ive Variation (%)
-50
-40
-30
-20
-50 0 50 100 150
Low-Sid
e
Relea
t
Junction Temperature (°C)
-10
0
10
20
30
40
50
Driver NMOS R
DSon
ive Variation (%)
-50
-40
-30
-20
-50 0 50 100 150
Low-Sid
e
Rela
t
Junction Temperature (°C)
120
130
140
150
ood Active Timeout
(ms)
100
110
-50 0 50 100 150
Power
G
Junction Temperature (°C)
90
100
Good Thresholds
eference Voltage)
PWRGD = Low
PWRGD = High
80
-50 0 50 100 150
Powe
(% of
R
Junction Temperature (°C)
Note: Unless otherwise indicated, T
A
FIGURE 2-13: HDRV P-Ch R Variation vs. Temperature.
=+25°C, VIN = 12V, V
Relative
DSon
= 1.8V, fSW = 300 kHz, C
OUT
VCC
FIGURE 2-16: LDRV N-Ch R Variation vs. Temperature
= 4.7 uF.
DSon
Relative
FIGURE 2-14: HDRV N-Ch R Variation vs. Temperature.
FIGURE 2-15: LDRV P-Ch R Variation vs. Temperature.
2012-2013 Microchip Technology Inc. DS22326B-page 9
DSon
DSon
Relative
Relative

FIGURE 2-17: PG Active Time Out Period vs. Temperature.

FIGURE 2-18: PG Thresholds Voltage vs. Temperature.

MCP19035
NOTES:
DS22326B-page 10 2012-2013 Microchip Technology Inc.

3.0 PIN DESCRIPTION

Description of the pins are listed in Ta bl e 3- 1.

TABLE 3-1: PIN DESCRIPTION TABLE

MCP19035
3x3 DFN
Symbol Description
MCP19035
1 SHDN
2 FB Feedback voltage input pin
3 COMP Internal error amplifier output pin
4V
5 PWRGD Power good pin
6+V
7 LDRV Lower gate drive output pin
8 BOOT Floating bootstrap supply pin
9 PHASE Switching node pin
10 HDRV Upper gate drive output pin
11 EP Exposed Thermal Pad, must be connected to GND
IN
CC
Device shutdown input pin
Input voltage pin
+5.0V output voltage pin

3.1 Shutdown Input Pin (SHDN)

This pin enables or disables the MCP19035 device. When logic “High” is applied to this pin, the device is enabled. A logic “Low” will disable the device. When the device is disabled, both the LDRV and HDRV pins are held low. The internal LDO regulator is also dis­abled when the SHDN pin float. If not used, connect to V resistor.
pin is pulled low. Do not let this
using a 100 k
IN

3.2 Feedback Voltage Input Pin (FB)

This is the internal error amplifier’s negative input, and is used to sense the output voltage. The positive input to the amplifier is connected to the internal reference voltage.

3.5 Power Good Pin (PWRGD)

The power good pin is an open drain output. This pin is pulled low when the output is 90% less than the typical value. Connect this pin to +VCC pin through a pull-up resistor. The recommended value for the pull-up resis­tor is 100 k.

3.6 LDO Output Voltage Pin (+VCC)

This pin is the output of the internal voltage regulator (LDO). The internal circuitry of the controller is powered from this pin (+5.0V). External low noise loads can be powered from this pin, but the sum of the external load current and the internal circuitry current should not exceed 50 mA. A 4.7 F ceramic capacitor must be connected between this pin and GND.

3.3 Internal Error Amplifier Pin (COMP)

This is the output of the internal error amplifier. The compensation network is connected between this pin and the FB pin.

3.7 Lower Gate Pin (LDRV)

This pin is the drive output for the low-side N-Channel MOSFET (synchronous rectifier). The LDRV drive is capable of sourcing 1A and sinking 1.5A.

3.8 Bootstrap Supply Pin (BOOT)

3.4 Input Voltage Pin (VIN)

This pin is the input power for the controller. A bypass capacitor must be connected between this pin and the GND pin. The input of an internal voltage regulator (LDO) is connected to this pin to generate the +5V V used for internal circuitry bias.
2012-2013 Microchip Technology Inc. DS22326B-page 11
CC
The BOOT pin is the floating bootstrap power supply pin for the high-side MOSFET gate driver. A capacitor connected between this pin and the PHASE pin pro­vides the necessary charge to turn on the external high-side MOSFET.
MCP19035

3.9 Switching Node Pin (PHASE)

This pin provides a return path for the high-side gate driver. It also provides a path for the charging of the BOOT capacitor, used while turning on the high-side MOSFET. This pin also senses the switching transition to eliminate cross conduction (shoot-through).

3.10 Upper Gate Drive Pin (HDRV)

This pin is the high-side N-channel MOSFET (control transistor) gate drive output. The HDRV drive is capable of sourcing and sinking 1A.

3.11 Exposed Thermal Pad (EP)

Analog ground and power ground are both connected to this pin.
DS22326B-page 12 2012-2013 Microchip Technology Inc.
MCP19035
HDRV
LDRV
Oscillator
BOOT
Control
Logic
SHDN
V
IN
PWRGD
COMP
FB
PHASE
Cross
Conduction
Protection
HD
LD
Voltage
Regulator
Comp
Dead Time
Generator
+
-
V
CC
Power-Good
Circuit
Shut-Down
Circuit
+
-
SD
EA
SD
UVLO
Circuit
Over-Current
Detection Circuit
Reference
Voltage
Generator
Soft Start
Circuit
FB
SD
GND
V
REF
PWM
Over-Temperature
Detection Circuit
OT
OT
V
IN
V
CC
V
CC
V
CC
V
CC

4.0 DETAILED DESCRIPTION

4.1 Device Overview

The MCP19035 family of devices are high­performance controllers providing all the necessary functions to construct a high-performance DC/DC converter, while keeping costs and design effort to a minimum:
• Support for pre-biased outputs eliminates con-
cerns about damaging sensitive loads during startup.
• Strong gate drivers for the high-side and rectifier
N-Channel MOSFETs decrease switching losses, yielding increases in efficiency.
• Adaptive gate drive timing prevents shoot-through
and minimizes body diode conduction in the syn­chronous rectifier MOSFET, which also increases the efficiency.
• Dead-Time optimization options of the MCP19035 assist in improving the power conversion effi­ciency, when used with high-speed, low Figure of Merit MOSFETs.
• Overcurrent protection circuits in both high and low-side switches, and a short circuit hiccup­recovery mode increase design flexibility and min­imize power dissipation in the event of prolonged output faults.
• The dedicated SHDN be placed in a low quiescent current state.
• Internal fixed converter switching frequency and soft-start reduce the external component count, simplifying design and layout, as well as reducing footprint and size.
• The 3 mm × 3 mm DFN package size also mini­mizes the overall converter footprint.
pin allows the converter to

FIGURE 4-1: Internal Block Diagram.

2012-2013 Microchip Technology Inc. DS22326B-page 13
MCP19035
PG
TH-LOW
t
PG-TIMEOUT
PG
V
FB
t
PG-DELAY
PG
TH-HI
PG
V-LOW

4.2 PWM Circuitry

The MCP19035 controller implements a fixed frequency, voltage-mode control scheme. The internal PWM generator is comprised of an oscillator, error amplifier, high-speed comparator and a latch. The error amplifier generates the control voltage by amplifying the difference between voltage reference (600 mV, internally generated) and the voltage of the FB pin (feedback voltage). This control voltage is compared by the high-speed comparator to an artificially generated ramp signal; the result is a PWM signal. An SR latch (Set-Reset flip-flop) is used to prevent the PWM circuitry from turning on the external switch until the beginning of the next clock cycle.
An external Compensation Network (Type-II or Type-III) must be used to stabilize the control system.
4.3 Internal Reference Voltage V
REF
An integrated, precision voltage reference is provided by the MCP19035. An external resistor divider is used to program the converter’s output voltage. The nominal value of this internal reference voltage is 600 mV.

4.4 Internal Oscillator

The MCP19035 device provides two switching frequency options: 300 kHz and 600 kHz.

4.5 Under Voltage Lockout Circuit (UVLO)

A 100 k pull-up resistor is recommended between the SHDN pin and VIN pin. Note that the SHDN input is a high-impedance pin. Noise generated by the circuits located near this pin may inadvertently shut down the controller. To improve the noise immunity of this input pin, we recommend placing a small capacitor between GND and SHDN
, or decrease the value of the pull-up resistor. The Shutdown input pin should not be left floating.

4.7 Power Good Output (PWRGD)

This open drain output provides an indication that the output voltage is 92% (typical) of its regulated value. This output is also low for other existing conditions that signal the possibility that the output of the power supply is out of regulation. The conditions are:
• Feedback pin (FB) voltage differs more than ±8%
from its nominal value (600 mV)
• Soft-start period is active
• Undervoltage condition detected
• Overcurrent condition detected, on either the High
Side or Low Side
• Die temperature is above the thermal shutdown
threshold (+150°C)
The active high power good signal has a fixed time delay of approximately 120 ms (t typically a 150 s delay (t
PG-DELAY
signal high-to-low transition.
PG-TIMEOUT
) on the power good
). There is
An integrated Under Voltage Lockout Circuit (UVLO) prevents the converter from starting until the input volt­age is high enough for normal operation. The converter will typically start at 4.2V and operate down to 3.6V. Hysteresis is added to prevent starting and stopping during startup, as a result of loading the input voltage source.

4.6 Shutdown Input

The Shutdown input pin (SHDN) is used to enable and disable the controller. When the SHDN low, the MCP19035 is placed in Shutdown mode. During Shutdown, most of the internal circuits (including the LDO) are disabled, to minimize current consumption.
pin is pulled

FIGURE 4-2: Power Good Signal.

DS22326B-page 14 2012-2013 Microchip Technology Inc.
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