Datasheet MCP1710 Datasheet

MCP1710

MCP1710

2 x 2 DFN*

GND

V

OUT

GND

V

IN

FB

1
2
3

4

8
7
6

5

GND

SHDNGND

* Includes Exposed Thermal Pad (EP); see Table 3-1.

EP

9

Ultra-Low Quiescent Current LDO Regulator

Features

• Ultra-Low 20 nA (typical) Quiescent Current

• Ultra-Low Shutdown Supply Current:

0.1 nA (typical)

• 200 mA Output Current Capability for
V

<3.5V

OUT

• 100 mA Output Current Capability for
V

>3.5V

OUT

• Input Operating Voltage Range: 2.7V to 5.5V

• Standard Output Voltages:

- 1.2V, 1.8V, 2.5V, 3.3V, 4.2V

• Low-Dropout Voltage: 450 mV Maximum at
200 mA

• Stable with 1.0 µF Ceramic Output Capacitor

• Overcurrent Protection

• Space Saving, 8-Lead Plastic 2 x 2 VDFN-8

Applications

• Energy harvesting

• Long-life battery powered applications

• Smart cards

• Ultra-Low consumption “Green” products

• Portable electronics

Description

The MCP1710 is a 200 mA for V

> 3.5V, low dropout (LDO) linear regulator that

V

OUT

provides high-current and low-output voltages, while
maintaining an ultra-low 20 nA of quiescent current
during device op erati on . In add iti on, the MC P1 710 can
be shut down for an even lower 0.1 nA (typical) supply
current draw. The MCP1710 comes in five standard
fixed output voltage versions: 1.2V, 1.8V, 2.5V, 3.3V
and 4.2V. The 200 mA output current capability,
combined with the low output-voltage capability, make
the MCP1710 a good c hoice for new ult ra-long-life LDO
applications that have high current demands, but
require ultra-low power consumption during sleep
states.

The MCP1710 is stable using ceramic output
capacitors that inherently provide lower output noise
and reduce the size and cost of the entire regulator
solution. Only 1 µF (2.2 µF recommended) of output
capacitance is needed to stabilize the LDO.

The MCP1710’s ultra-low quiescent and shutdown
current allows it to be paired with oth er ultra-low current
draw devices, such as Microchip’s nanoWatt XLP
technology devices, for a complete ultra-low power
solution.

< 3.5V , 100 mA for

OUT

Package Type

 2012 Microchip Technology Inc. DS25158B-page 1

MCP1710

V

IN

V

OUT

FB

GND

LOAD

C

IN

C

OUT

SHDN

+

-

V

IN

+

-

SHDN

Voltage
Reference

Overcurrent

GND

SHDN

FB

OUT

V

Typical Application

Functional Block Diagram

DS25158B-page 2  2012 Microchip Technology Inc.

MCP1710

1.0 ELECTRICAL

CHARACTERISTICS

† Notice: Stresses above those listed under “Maximum

Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of
the device at tho se or any oth er conditions ab ove those

Absolute Maximum Ratings †

Input Voltage, VIN.............................................................6.0V

Maximum Voltage on Any Pin...............(GND – 0.3V) to 6.0V

Output Short Circuit Duration...................................Unlimited

Storage temperature....... .. .... .. .. .. .... ..... .. .... .. -65°C to +150°C

Maximum Junction Temperature, T
Operating Junction Tempe rature, T
ESD protection on all pins

  2kV HBM

...........................+150°C

J

...............-40°C to +85°C

J

indicated in the operational listings of this specification
is not implied. Exposure to maximum rating conditions
for extended periods may affect device reliability.

AC/DC CHARACTERISTICS

Electrical Specifications: Unless otherwise noted, VIN=VR+ 800 mV, V

Note 1, I

=1mA, CIN=C

OUT

temperatures, T

(Note 4) of -40°C to +85°C

J

= 2.2 µF (X7R Ceramic), TA=+25°C. Boldface type applies for junction

OUT

IN(min)=VR

Parameters Sym Min Typ Max Units Conditions

Input Operating Voltage V
Output V oltage Range V
Input Quiescent Current I

Input Quiescent Current

I

SHDN

IN

OUT

q

2.7 — 5.5 V

1.2 — 4.2 V

—20— nAVIN = VR+ 0.8V to 5.5V,

— 0.1 — nA SHDN =GND

for SHDN Mode
Maximum Continuous

I

OUT

200 ——mAVIN=VR+ 0.8V to 5.5V

Output Current

100 ——mAV

Current Limit I

OUT

—250— mAV

—175— mAV

Output V oltage Regulation V

Line Regulation V

(V

OUT

OUT

OUT

x VIN)

VR–4% — VR+4% VVR<1.8V (Note 2)

–2% — VR+4% V1.8V<VR<5.5V (Note 2)

V

R

/

-2 0.5 2 %/V (Note 1) V

-1 — 1 %/V (Note 1)  V

Load Regulation V

OUT/VOUT

-2 1 2 %VIN= to 5.5V,

-2 1 2 %3.5V<V

Note 1: The minimum V

must meet two conditions: VIN 2.7V and VIN VR V

IN

2: VR is the nominal regulator output voltage. VR= 1.2V, 2.5V, etc.
3: Dropout volt age is defined as the in put- to-ou tput voltage dif ferential at which the out put voltage drop s 3%

below its nominal value that was measured with an input voltage of VIN=V

4: The junction temperature is approximated by soaking the device under test at an ambient temperature

equal to the desired junction temperature. The test time is small enough such that the rise in the junction
temperature over the ambient temperature is not significant.

+ 0.3V, V

I

OUT

1.2V  V

IN=VR

3.5V  V

OUT

IN(max)

=0

 3.5V

R

+ 0.8V to 5.5V

 5.5V

R

=0.9xV

1.2V  VR 3.5V
=0.9xV

OUT

3.5V  VR 5.5V

< 1.8V, I

V

R

V

= 1.8V to 4.2V

R

I

OUT

1.2V < V

I

OUT

I

OUT

DROPOUT(MAX).

OUT(MAX)+VDROPOUT(MAX)

IN

OUT

IN

=50mA

<3.5V

R

= 1 mA to 200 mA,

<5.5V

R

= 1 mA to 100 mA,

=5.5V,

R

R

 5V

=50mA

 5V

.

 2012 Microchip Technology Inc. DS25158B-page 3

MCP1710

AC/DC CHARACTERISTICS (CONTINUED)

Electrical Specifications: Unless otherwise noted, VIN=VR+ 800 mV, V

Note 1, I

=1mA, CIN=C

OUT

temperatures, T

Parameters Sym Min Typ Max Units Conditions

(Note 4) of -40°C to +85°C

J

= 2.2 µF (X7R Ceramic), TA=+25°C. Boldface type applies for junction

OUT

IN(min)=VR

+ 0.3V, V

IN(max)

=5.5V,

Dropout Voltage V

DROPOUT

——450 mV I

——400 mV I

= 200 mA

OUT

1.2V  V
= 100mA

out

3.5V  V

 3.5V, Note 3

R

 5.5V, Note 3

R

Shutdown Input

Logic High Input V
Logic Low Input V

SHDN-HIGH
SHDN-LOW

70 ——%VINVIN= 2.7V to 5.5V
——30 %VINVIN= 2.7V to 5.5V

AC Performance

Output Delay From SHDN

Output Noise e

Power Supply Ripple Rejec-

PSRR — 22 — dB f = 100 Hz, I

tion Ratio

Note 1: The minimum V

must meet two conditions: VIN 2.7V and VIN VR V

IN

T

OR

N

— 30 — ms SHDN = GND to VIN,

= GND to 95% VR

V

OUT

—0.37—µV/Hz I

=50mA, f=1kHz,

OUT

C

= 2.2 µF (X7R Ceramic)

OUT

=2.5V

V

OUT

OUT

=200mV pk-pk,

V

INAC

C

=0µF

IN

DROPOUT(MAX).

2: VR is the nominal regulator output voltage. VR= 1.2V, 2.5V, etc.
3: Dropout volt age is defined as the in put- to-ou tput voltage dif ferential at which the out put voltage drop s 3%

below its nominal value that was measured with an input voltage of VIN=V

OUT(MAX)+VDROPOUT(MAX)

4: The junction temperature is approximated by soaking the device under test at an ambient temperature

equal to the desired junction temperature. The test time is small enough such that the rise in the junction
temperature over the ambient temperature is not significant.

=10mA,

.

TEMPERATURE SPECIFICATIONS

Electrical Specifications: Unless otherwise noted, VIN=VR+800mV, V

Note 1, I

temperatures, TJ (Note 4) of -40°C to +85°C

Temperature Ranges

Operating Junction
Temperature Range

Maximum Juncti on
Temperature

Storage Temperature Range T

Thermal Package Resistances

Thermal Resistance,
2x2 VDFN-8

=1mA, CIN=C

OUT

= 2.2 µF (X7R Ceramic), TA=+25°C. Boldface type applies for junction

OUT

Parameters Sym Min Typ Max Units Conditions

T

T

A



JA



JC

-40 — +85 °C Steady State

J

J

——+150 °C Transient

-65 — +150 °C

— 73.1 — °C/W FR4 Board Only
—10.7—°C/W

IN(min)=VR

+ 0.3V, V

IN(max)

=5.5V,

1 oz. Copper JEDEC Standard Board
with Thermal Vias

DS25158B-page 4  2012 Microchip Technology Inc.

MCP1710

1.210

1.215

1.220

1.225

1.230

1.235

1.240

put Voltage (V)

TJ= +25°C

I

OUT

= 0.1 mA

TJ= -40°C

1.195

1.200

1.205

2.5 3.0 3.5 4.0 4.5 5.0 5.5

Ou

t

Input Voltage (V)

TJ= +85°C

2.500

2.502

2.504

2.506

2.508

2.510

put Voltage (V)

TJ= +25°C

I

OUT

= 0.1 mA

TJ= -40°C

2.494

2.496

2.498

2.5 3.0 3.5 4.0 4.5 5.0 5.5

Ou

t

Input Voltage (V)

TJ= +85°C

4.240

4.244

4.248

4.252

tput Voltage (V)

TJ= -40°C

TJ= +25°C

I

OUT

= 0.1 mA

4.232

4.236

4.50 4.75 5.00 5.25 5.50

O

u

Input Voltage (V)

T

J

= +

85°C

1.185

1.190

1.195

1.200

1.205

put Voltage (V)

TJ= +25°C

TJ= +85°C

VIN= 2.5V

1.170

1.175

1.180

0 50 100 150 200

Ou

t

Load Current (mA)

TJ= -40°C

2.4950

2.4975

2.5000

2.5025

tput Voltage (V)

TJ= +25°C

TJ= +85°C

VIN= 3.3V

TJ= -40°C

2.4900

2.4925

0 20406080100

O

u

Load Current (mA)

4.21

4.22

4.23

4.24

4.25

tput Voltage (V)

TJ= +25°C

TJ= +85°C

VIN= 4.15V

TJ= -40°C

4.19

4.20

0 20406080100

O

u

Load Current (mA)

2.0 TYPICAL PERFORMANCE CURVES

Note: The graphs and tables provid ed follo wing this no te are a st atis tical summa ry bas ed on a lim ited nu mber of

samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.

Note: Unless otherwise indicated, C
Temperature = +25°C, VIN=V

OUT

= 2.2 µF Ceramic (X7R), CIN= 2.2 µF Ceramic (X7R), I

OUT

+ 0.8V, SHDN =1M pullup to VIN.

FIGURE 2-1: Output Voltage vs. Input
Voltage (V

=1.2V).

R

=1mA,

OUT

FIGURE 2-4: Output Voltage vs. Load
Current (V

=1.2V).

R

FIGURE 2-2: Output Voltage vs. Input
Voltage (V

FIGURE 2-3: Output Voltage vs. Input
Voltage (V

 2012 Microchip Technology Inc. DS25158B-page 5

=2.5V).

R

=4.2V).

R

FIGURE 2-5: Output Voltage vs. Load
Current (V

=2.5V).

R

FIGURE 2-6: Output Voltage vs. Load
Current (V

=4.2V).

R

MCP1710

0.10

0.15

0.20

0.25

0.30

pout Voltage (V)

TJ= +85°C

TJ= -40°C

TJ= +25°C

V

OUT

= 2.5V

-0.05

0.00

0.05

0 20406080100

Dr

o

Load Current (mA)

0.08

0.10

0.12

0.14

0.16

0.18

0.20

pout Voltage (V)

TJ= +85°C

TJ= -40°C

TJ= +25°C

V

OUT

= 4.2V

0.00

0.02

0.04

0.06

0 20406080100

Dr

o

Load Current (mA)

t Noise (μV/Hz)

V

IN

= 5.2V

V

OUT

= 4.2V

I

OUT

= 50 mA

1

10

V

IN

= 3.5V

V

OUT

= 2.5V

I

OUT

= 50 mA

V

IN

= 2.8V

V

OUT

= 1.8V

I

OUT

= 50 mA

Outp

u

Frequency (kHz)

0.0

0.1

0.01

0.1

1

10

100

1000

-

-50

-40

-30

-20

-10

0

10

PSRR (dB)

VIN= 2.5V
I

OUT

= 10 mA

-100

-90

-80

-70

60

0.01 0.1 1 10 100 1000
Frequency (kHz)

-60

-50

-40

-30

-20

-10

0

10

PSRR (dB)

VIN= 3.5V
I

OUT

= 10 mA

-100

-90

-80

-70

0.01 0.1 1 10 100 1000
Frequency (kHz)

-60

-50

-40

-30

-20

-10

0

10

PSRR (dB)

VIN= 5.2V
I

OUT

= 10 mA

-100

-90

-80

-70

0.01 0.1 1 10 100 1000
Frequency (kHz)

Note: Unless otherwise indicated, C
Temperature = +25°C, VIN=V

OUT

= 2.2 µF Ceramic (X7R), CIN= 2.2 µF Ceramic (X7R), I

OUT

+ 0.8V, SHDN =1M pullup to VIN.

FIGURE 2-7: Dropout Voltage vs. Load
Current (V

=2.5V).

R

=1mA,

OUT

FIGURE 2-10: Power Supply Ripple
Rejection vs. Frequency (V

=1.2V).

R

FIGURE 2-8: Dropout Voltage vs. Load
Current (V

=4.2V).

R

FIGURE 2-9: Noise vs. Frequency.

DS25158B-page 6  2012 Microchip Technology Inc.

FIGURE 2-11: Power Supply Ripple
Rejection vs. Frequency (V

=2.5V).

R

FIGURE 2-12: Power Supply Ripple
Rejection vs. Frequency (V

=4.2V).

R

MCP1710

V

OUT

= 1.2V

I

OUT

= 100 nA to 10 mA

AC1M 200 mV/div 10 mA/div

200 µs/div

V

OUT

= 2.5V

I

OUT

= 100 nA to 10 mA

AC1M 200 mV/div 10 mA/div

200 µs/div

V

OUT

= 4.2V

I

OUT

= 100 nA to 10 mA

AC1M 200 mV/div 10 mA/div

200 µs/div

I

OUT

= 10 mA

V

IN

= 2.5V to 3.5V

2 V/div 1 V/div

V

OUT

= 1.2V

10 ms/div

I

OUT

= 10 mA

V

IN

= 3.5V to 4.5V

2 V/div 1 V/div

V

OUT

= 2.5V

10 ms/div

I

OUT

= 10 mA

V

N

= 4.5V to 5.5V

2 V/div 1 V/div

V

OUT

= 4.2V

10 ms/div

Note: Unless otherwise indicated, C
Temperature = +25°C, VIN=V

OUT

= 2.2 µF Ceramic (X7R), CIN= 2.2 µF Ceramic (X7R), I

OUT

+ 0.8V, SHDN =1M pullup to VIN.

FIGURE 2-13: Dynamic Load Step
(V

=1.2V).

R

=1mA,

OUT

FIGURE 2-16: Dynamic Line Step
(V

=1.2V).

R

FIGURE 2-14: Dynamic Load Step
(V

=2.5V).

R

FIGURE 2-15: Dynamic Load Step
(V

=4.2V).

R

FIGURE 2-17: Dynamic Line Step
(V

=2.5V).

R

FIGURE 2-18: Dynamic Line Step
(V

=4.2V).

R

 2012 Microchip Technology Inc. DS25158B-page 7

MCP1710

I

OUT

= 100 nA

V

IN

= 2.5V

2 V/div 2 V/div

V

OUT

= 1.2V

10 ms/div

I

OUT

= 100 nA

V

IN

= 3.5V

2 V/div 2 V/div

V

OUT

= 2.5V

10 ms/div

I

OUT

= 100 nA

V

IN

= 5.2V

2 V/div 2 V/div

V

OUT

= 4.2V

10 ms/div

I

OUT

= 10 mA

SHDN

Signal

2 V/div 1 V/div

V

OUT

= 1.2V

5 ms/div

I

OUT

= 10 mA

SHDN

Signal

2 V/div 1 V/div

V

OUT

= 2.5V

5 ms/div

I

OUT

= 10 mA

SHDN

Signal

2 V/div 1 V/div

V

OUT

= 4.2V

5 ms/div

Note: Unless otherwise indicated, C
Temperature = +25°C, VIN=V

OUT

+ 0.8V, SHDN =1M pullup to VIN.

OUT

FIGURE 2-19: Startup From VIN
(V

=1.2V).

R

= 2.2 µF Ceramic (X7R), CIN= 2.2 µF Ceramic (X7R), I

FIGURE 2-22: Startup From SHDN (VR=1.2V).

OUT

=1mA,

FIGURE 2-20: Startup From V
(V

=2.5V).

R

FIGURE 2-21: Startup From V
(V

=4.2V).

R

IN

IN

FIGURE 2-23: Startup F rom SHDN
(V

=2.5V).

R

FIGURE 2-24: Startup F rom SHDN
(V

=4.2V).

R

DS25158B-page 8  2012 Microchip Technology Inc.

MCP1710

0.50

1.00

1.50

2.00

d Regulation (%)

VIN= 2.5V

VIN= 4.0V

I

OUT

= 0 mA to 100 mA

-0.50

0.00

-40-1510356085

Lo

a

Junction Temperature (°C)

V

IN

=5.

5V

-0.10

0.00

0.10

0.20

0.30

Regulation (%)

VIN= 2.8V

I

OUT

= 0 mA to 100 mA

VIN= 4.0V

-0.40

-0.30

-

0.20

-40 -15 10 35 60 85

Loa

d

Junction Temperature (°C)

VIN= 5.5V

0.01

0.02

0.03

0.04

0.05

Regulation (%)

VIN= 5.0V

I

OUT

= 0 mA to 100 mA

VIN= 4.5V

VIN= 5.5V

-0.01

0.00

-40-1510356085

Loa

d

Junction Temperature (°C)

0.30

0.35

0.40

0.45

0.50

Regulation (%)

I

OUT

= 1 mA

VR= 2.5V

VR= 1.2V

0.15

0.20

0.25

-40-1510356085

Line

Junction Temperature (°C)

VR= 4.2V

Note: Unless otherwise indicated, C
Temperature = +25°C, VIN=V

OUT

= 2.2 µF Ceramic (X7R), CIN= 2.2 µF Ceramic (X7R), I

OUT

+ 0.8V, SHDN =1M pullup to VIN.

FIGURE 2-25: Load Regulation vs.
Junction Temperature (V

=1.2V).

R

=1mA,

OUT

FIGURE 2-27: Load Regulation vs.
Junction Temperature (V

=4.2V).

R

FIGURE 2-26: Load Regulation vs.
Junction Temperature (V

 2012 Microchip Technology Inc. DS25158B-page 9

=2.5V).

R

FIGURE 2-28: Line Regulation vs. Junction Temperature.

MCP1710

20

25

30

35

40

45

50

ent Current (nA)

TJ= +85°C

TJ= -40°C

V

OUT

= 1.2V

0

5

10

15

2.5 3 3.5 4 4.5 5 5.5

Quies

c

Input Voltage (V)

TJ= +25°C

0.65

0.70

0.75

0.80

0.85

0.90

0.95

und Current (µA)

VIN= 2.5V
V

OUT

= 1.2V

I

OUT

= 0.1mA

0.50

0.55

0.60

-50 -25 0 25 50 75 100

Gr

o

Junction Temperature (°C)

60

80

100

120

140

160

nd Current (µA)

TJ= +85°C

TJ= +25°C

TJ= -40°C

VIN= 4.0V
V

OUT

= 1.2V

0

20

40

0 20406080100

Gro

u

Load Current (mA)

Note: Unless otherwise indicated, C
Temperature = +25°C, VIN=V

OUT

= 2.2 µF Ceramic (X7R), CIN= 2.2 µF Ceramic (X7R), I

OUT

+ 0.8V, SHDN =1M pullup to VIN.

FIGURE 2-29: Quiescent Current vs. Input Voltage.

=1mA,

OUT

FIGURE 2-31: Ground Current vs. Load Current.

FIGURE 2-30: Ground Current vs. Junction Temperature.

DS25158B-page 10  2012 Microchip Technology Inc.

3.0 PIN DESCRIPTION

The descriptions of the pins are listed in Table 3-1.

TABLE 3-1: PIN FUNCTION TABLE

MCP1710

VDFN

1, 3, 4, 5, GND Ground

2V
6 FB Output Voltage Feedback Input
7V

8 SHDN
9EP

Name Description

OUT

IN

Regulated Output Voltage

Input Voltage Supply
Shutdown Control Input (active-low)

Exposed Pad, connected to GND.

MCP1710

3.1 Ground Pin (GND)

For optimal Noise and Power Supply Rejection Ratio
(PSRR) performance, the GND pin of the LDO should
be tied to an electrically quiet circuit ground. This will
help the LDO power supply rejection ratio and noise
performance. The gro und pin of the LDO onl y conduct s
the ground current, so a heavy trace is not required.
For applications that have switch ing or noisy inputs, tie
the GND pin to the return of the output capacitor.
Ground planes help lower the inductance and voltage
spikes caused by fast transient load currents.

3.2 Regulated Output Voltage Pin
(V

)

OUT

The V
LDO. A minimum output capacitance of 1.0 µF is
required for LDO stability. The MCP1710 is stable with
ceramic, tantalum and aluminum-electrolytic
capacitors. See Section 4.2 “Output Capacitor” for
output capac itor selection guidance.

pin is the regulated output voltage of the

OUT

3.3 Feedback Pin (FB)

The output voltage is connected to the FB input. This
sets the output voltage regulation value.

3.4 Input Voltage Supply Pin (VIN)

Connect the unregulated or regulated input voltage
source to V
several inches away fro m th e LDO , o r the i nput source
is a batter y, it is recomme nded t hat an input capaci tor
be used. A typical in put capacitance v alue of 1 µF to
10 µF should be sufficient for mos t applications (2 .2 µF ,
typical). The type of capacitor used can be ceramic,
tantalum, or aluminum electrolytic. The low ESR
characteristics of the ceramic capacitor will yield better
noise and PSRR performance at high frequency.

. If the input voltage source is located

IN

3.5 Shutdown Control Input (SHDN )

The SHDN input is used to turn the LDO output vol tage
on and off. When the SHDN
level, the LDO output voltage is enabled. When the
SHDN input is pulled to a logic-low level, the LDO
output voltage is disabled. When the SHDN
pulled low, the LDO enters a low-quiescent current
shutdown state, where the typical quiescent current is

0.1 nA.

input is at a logic-high

input is

3.6 Exposed Pad Pin (EP)

The VDFN-8 package has an exposed metal pad on
the bottom of the package. The exposed metal pad
gives the device better thermal characteristics by
providing a good thermal p ath to either the PCB or heat
sink, to remove heat from the de vice. The exposed pad
of the package is at ground potential.

 2012 Microchip Technology Inc. DS25158B-page 11

MCP1710

NOTES:

DS25158B-page 12  2012 Microchip Technology Inc.

MCP1710

SHDN

V

OUT

30 ms

10 µs

T

OR

20 ns (typic al)

4.0 DEVICE OVERVIEW

The MCP1710 is a 100 mA/200 mA output current, low
dropout (LDO) voltage regulator. The low dropout
voltage of 450 mV maximum at 200 mA of current
makes it ideal for battery-powered applications. The
input voltage rang e is 2.7V to 5.5V. The MCP1710 adds
a shutdown-control input pin. The MCP1710 is
available in five standard fixed-output voltage options:

1.2V, 1.8V, 2.5V, 3.3V and 4.2V. The MCP1710 uses a

proprietary voltage reference and sensing scheme to
maintain the ultra-low 20 nA qui escent current.

4.1 Output Current and Current Limiting

The MCP1710 LDO is tested and ensured to supply a
minimum of 200 mA of output current for the 1.2V to

3.5V output range, and 100mA of output current for the

3.5V to 4.2V output range . The MCP1 710 has no m in i-

mum output load, so the output load current can go to
0 mA and the LDO will continue to regulate the output
voltage within the specified tolerance.

The MCP1710 also incorporates an output current li mit.
The current limit is set to 250 mA typical for the

1.2V  V

3.5V  V

4.2 Output Capacitor

The MCP1710 requ ires a m in im um o utp ut ca p ac itance
of 1 µF for output voltage stability. Ceramic capacitors
are recommended because of their size, cost and
robust environmental qualities.

Aluminum-electrolytic and tantalum capacitors can be
used on th e LDO output as we ll. T he ou tput ca pacito r
should be located as close to the LDO output as is
practical. Ceramic materials X7R and X5R have low
temperature coefficients and are well within the
acceptable ESR range required. A typical 1 µF X7R
0805 capacitor has an ESR of 50 m.

 3.5V range, and 175 mA typical for the

R

 5.5V range.

R

For applications that have output step load
requirements, the inp ut ca p ac itance of the LDO is very
important. The input capacitance provides the LDO
with a good local low-impedance source to pull the
transient currents from. This will allow the LDO to
respond quickly to the out put load ste p. For good ste p­response performance, the input capacitor should be of
equivalent or higher value than the output capacitor.
The capacitor sh oul d be pl ac ed as close to the inp ut of
the LDO as is practical. Larger inp ut capacitors will als o
help reduce any hi gh-f requency noise on t he i npu t an d
output of the LDO, and reduce the effects of any
inductance that exists between the input source
voltage and the input capacitance of the LDO.

4.4 Shutdown Input (SHDN)

The SHDN input is an ac tiv e-low i np ut s ig nal th at turns
the LDO on and off. The SHDN
percentage of the input voltage. The maximum input­low logic leve l is 30% of V
level is 70% of V

On the rising edge of the SHDN
circuitry has a 30 ms (typical) delay before allo wing the
LDO output to turn on. This delay helps to reject any
false turn-on signal or noise on the SHDN
After the 30 ms delay , the LDO outp ut enters its c urrent
limited soft -start period as it ri ses from 0V to its final
regulation value. If the SHDN
during the 30 ms delay period, the timer will be reset
and the delay time will start over again on the next ris­ing edge of the SHDN

input going high (turn-on) to the LDO output

SHDN
being in regulation is typically 30 ms. See Figure 4-1
for a timing diagram of the SHDN input.

.

IN

and the minimum high logic

IN

input. The total time from the

threshold is a

input, the shutdown

input signal.

input signal is pulled low

4.3 Input Capacitor

Low input-source impedan ce is nec essa r y for the LDO
output to operate properly. When operating from
batteries, or in applications with long lead length
(> 10 inches) between the input source and the LDO,
some input capacitance is recommended. A minimum
of 1.0 µF to 4.7 µF is recommended for most
applications.

 2012 Microchip Technology Inc. DS25158B-page 13

FIGURE 4-1: Shutdown Input Timing Diagram.

MCP1710

4.5 Dropout Voltage

Dropout voltage is defined as the input-to-output
voltage differential at which the output voltage drops
3% below the nominal value that was meas ure d wi th a

+ 0.8V differential applied. The MCP1710 LDO has

V

R

a low-dropout voltage specification of 450 mV for the

1.2V  V
400mV for the 3.5V  V
100 mA out. See Section 1.0 “Electrical

Characteristics” for maximum dropout voltage

specifications.

 3.5V range (typical) at 200 mA out, and

R

 5.5V range (typical) at

R

DS25158B-page 14  2012 Microchip Technology Inc.

MCP1710

V

IN

V

OUT

FB

GND

LOAD

C

IN

C

OUT

SHDN

+

-

P

LDO

V

IN MAXVOUT MIN

–I

OUT MAX

=

Where:

P

LDO

= LDO Pass device internal power

dissipation

V

IN(MAX)

= Maximum input voltage

V

OUT(MIN)

= LDO minimum output voltage

I

OUT(MAX)

= M aximum output current

P

IGNDVIN MAXIGND

=

Where:

P

I(GND)

= Power dissipation due to the

quiescent current of the LDO

V

IN(MAX)

= Maximum input voltage

I

GND

= Current flowing in the GND pin

T

JMAXPTOTAL

R

JA

T

AMAX

+=

Where:

T

J(MAX)

= Maximum continuous junction

temperature

P

TOTAL

= Total device power dissipation

RJA= Thermal resistance from junction to

ambient

T

AMAX

= Maximum ambient temperature

P

DMAX

T

JMAXTAMAX

–

R



JA

---------------------------------------------------=

Where:

P

D(MAX)

= Maximum device power dissipation

T

J(MAX)

= Maximum continuous junction

temperature

T

A(MAX)

= Maximum ambient temperatur e

R

JA

= Thermal resistance from

junction-to-ambient

5.0 APPLICATION CIRCUITS/ISSUES

5.1 Typical Application

The MCP1710 is used for applications that require
ultra-low quiescent current draw.

FIGURE 5-1: Typical Application Circuit.

5.2 Power Calculations

5.2.1 POW ER DISS IPAT ION

The internal power dis sipat ion within th e MCP1710 is a
function of input voltage, output voltage, output current
and quiescent current. Equation 5-1 can be used to
calculate the internal power dissipation for the LDO.

The total power dissipated within the MCP1710 is the
sum of the power dissipated in the LDO pass device
and the P(I
construction, the typical I
200 µA at full load. Operatin g at a maximum V

) term. Because of the CMOS

GND

for the MCP1710 is

GND

of 5.5V

IN

results in a power dissipation of 1.1 mW. For most
applications, this is small compared to the LDO pass
device power dissipation, and can be neglected.

The maximum continuous operating junction
temperature specified for the MCP1710 is +85°C

. To

estimate the internal junction temperature of the
MCP1710, the total internal power dissipation is
multiplied by the thermal resistance from junction-to­ambient (R

) of the device. The thermal resistance

JA

from junction-to-ambient for the 2 x 2 VDFN-8 package
is estimated at 73.1°C/W.

EQUATION 5-3:

EQUATION 5-1:

In addition to the LDO p ass ele ment po wer diss ipa tion,
there is power dissipation within the MCP1710 as a
result of quiescent or ground current. The power
dissipation as a result of the ground current can be
calculated using Equation 5-2:

EQUATION 5-2:

 2012 Microchip Technology Inc. DS25158B-page 15

The maximum power dissipation capability for a
package can be calculated given the junction-to­ambient thermal resistance and the maximum ambient
temperature for the application. Equation 5-4 can be
used to determine the package maximum internal
power dissipation.

EQUATION 5-4:

MCP1710

T

JRISEPDMAX

R

JA

=

T

J(RISE)

= Rise in device junction temperature

over the ambient temperature

P

D(MAX)

= Maximum device power dissipation

RJA= Thermal resistance from junction -to-

ambient

TJT

JRISETA

+=

TJ= Junction temperature

T

J(RISE)

= Rise in device junction temperature

over the ambient temperature

T

A

= Ambient temperature

EQUATION 5-5:

EQUATION 5-6:

5.3 Typical Application Examples

Internal power dissipation, junction temperature rise,
junction temperature and maximum power dissipation
are calculated in the followi ng example. The powe r dis­sipation as a result of ground current is small enough to
be neglected.

5.3.1 POW ER DISS IPAT ION EXA MPLE

5.3.1.1 Device Junction Temperatur e Rise

The internal junction temperature rise is a function of
internal power dissipation and the thermal resistance
from junction-to-ambient for the application. The
thermal resistance from junction-to-ambient (R

JA

) is
derived from EIA/JEDEC standards for measuring
thermal resistance. The EIA/JEDEC specification is
JESD51. The standard describes the test method and
board specifications for measuring the thermal
resistance from junction-to-ambient. The actual
thermal resistance for a particular application can vary
depending on many factors such as copper area and
thickness. Refer to AN792, “A Method to Determine

How Much Power a SOT-23 Can Dissipate in an
Application” (DS00792), for more information rega rding

this subject.

EXAMPLE 5-2:

T

=P

J(RISE)

T

JRISE

T

JRISE

TOTAL

= 0.206W x 73.1°C/W
=15.1°C

xR

JA

5.3.1.2 Junction Temperature Estimate

To estimate the internal junction temperature, the
calculated temperature rise is added to the ambient or
offset temperature. For this example, the worst-case
junction temperature is estimated below:

EXAMPLE 5-1:

Package

Package Type = 2 x 2 VDFN-8

Input Voltage

=3.3V±5%

V

IN

LDO Output Voltage and Current

V

=2.5V

OUT

=200mA

I

OUT

Maximum Ambient Temperature

T

=+60°C

A(MAX)

Internal Power Dissipation

P

LDO(MAX)

P

P

=(V

IN(MAX)

= ((3.3V x 1.05) – (2.5V x 0.975))

LDO

x200mA

= 0.206 Watts

LDO

– V

OUT(MIN)

)xI

OUT(MAX)

EXAMPLE 5-3:

TJ =T

JRISE+TA(MAX)

TJ = 15.1°C + 60.0°C

=75.1°C

T

J

5.3.1.3 Maximum Package Power

Dissipation at +60°C Ambient
Temperature

EXAMPLE 5-4:

2x2 DFN-8 (73.1°C/W R

P
P

= (85°C – 60°C)/73.1°C/W

D(MAX)

= 0.342W

D(MAX)

JA

):

DS25158B-page 16  2012 Microchip Technology Inc.

6.0 PACKAGING INFORMATION

Legend: XX...X Customer-specific information

Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceabili ty code
Pb-free JEDEC designator for Matte Tin (Sn)
* This package is Pb-free. The Pb-free JEDEC desi gnator ( )

can be found on the outer packaging for this package.

Note: In the event the full Microchip part nu mber ca nnot be m arked on one line , it will

be carried over to the next line, thus limiting the number of available
characters for customer-specific information.

3

e

3

e

8-Lead VDFN (2 x 2 x 0.9)

Example:

Part Number Code

MCP1710T-12I/LZ AAA
MCP1710T-18I/LZ AAB
MCP1710T-25I/LZ AAC
MCP1710T-33I/LZ AAD
MCP1710T-42I/LZ AAE

AAA

256

6.1 Package Marking Information

MCP1710

 2012 Microchip Technology Inc. DS25158B-page 17

MCP1710

DS25158B-page 18  2012 Microchip Technology Inc.

MCP1710

 2012 Microchip Technology Inc. DS25158B-page 19

MCP1710

DS25158B-page 20  2012 Microchip Technology Inc.

APPENDIX A: REVISION HISTORY

Revision B (November 2012)

• Updated the performance curves for Dynamic
Load Step, Dynamic Line Step, Startup From V
and Startup From SHDN

24).

(Figure 2-13 — Figure 2-

Revision A (September 2012)

• Original Release of this Document.

IN

MCP1710

,

 2012 Microchip Technology Inc. DS25158B-page 21

MCP1710

NOTES:

DS25158B-page 22  2012 Microchip Technology Inc.

PRODUCT IDENTIFICATION SYSTEM

Device: MCP1710 T: 200 mA Low Dro pou t Regul a tor

Tape and Reel

Output Voltage*: 12 = 1.2V “Standard”

18 = 1.8V “Standard”
25 = 2.5V “Standard”
33 = 3.3V “Standard”
42 = 4.2V “Standard”

*Contact factory for other output voltage options

Temperature: I= -40C to +85C (Industrial)

Package Type: LZ = Very Thin Dual Flatpack, No Lead (VDFN), 8-Lead

PART NO. -XX

Output

Device

Voltage

X/

Temp.XXPackage

Examples:

a) MCP 1710T-12I/LZ: Tape and Reel,

1.2V Output Voltage,
Industrial Temp.,
8-LD VDFN package

b) MCP1710T- 18I/ LZ: Tape and Reel,

1.8V Output Voltage,
Industrial Temp.,
8-LD VDFN package

c) MCP1710T-25I/LZ: Tape and Reel,

2.5V Output Voltage,
Industrial Temp.,
8-LD VDFN package

d) MCP1710T- 33I/ LZ: Tape and Reel,

3.3V Output Voltage,
Industrial Temp.,
8-LD VDFN package

e) MCP 1710T-42I/LZ: Tape and Reel,

4.2V Output Voltage,
Industrial Temp .,
8-LD VDFN package

T

Tape and

Reel

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

MCP1710

 2012 Microchip Technology Inc. DS25158B-page 23

MCP1710

NOTES:

DS25158B-page 24  2012 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices:

YSTEM

CERTIFIED BY DNV

== ISO/TS 16949 ==

• Microchip products meet the specification contained in their particular Microchip Data Sheet.

• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are com mitted to continuously improving the c ode prot ection f eatures of our
products. Attempts to break Microchip’s code protection feature may be a violation of t he Digit al Mill ennium Copyright Act. If such act s
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device
applications and t he lik e is provided only for yo ur c onvenience
and may be su perseded by updat es . It is y our responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life supp ort and/or safety ap plications is entir ely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless M icrochip from any and all dama ges, claims,
suits, or expenses re sulting from such use. No licens es are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.

Trademarks

The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, K
PICSTART, PIC
and UNI/O are registered trademarks of Microchip T echnology
Incorporated in the U.S.A. and other countries.

FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MTP, SEEVAL and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.

Silicon Storage Technology is a registered trademark of
Microchip Te chnology Inc. in other countries.

Analog-for-the-Digital Age, Application Maestro, BodyCom,
chipKIT, chipKI T logo, CodeGuard, dsPICDEM ,
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,
Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA
and Z-Scale are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.

SQTP is a service mark of Microchip T echnology Incorporated
in the U.S.A.

GestIC and ULPP are registered trademarks of Microchip
Tec hnology Germ any II Gm bH & Co. & KG, a subsidiary of
Microchip T echnology Inc., in other countries.

All other trademarks mentioned herein are property of their
respective companies.

© 2012, Microchip Technology Incorporat ed, Printed in the
U.S.A., All Rights Reserved.

Printed on recycled paper.

ISBN: 978-1-62076-654-5

EELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,

32

logo, rfPIC, SST, SST Logo, SuperFlash

QUALITY MANAGEMENT S

 2012 Microchip Technology Inc. DS25158B-page 25

Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.

®

MCUs and dsPIC® DSCs, KEELOQ

®

code hopping

Worldwide Sales and Service

AMERICAS

Corporate Office

2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: [phone]
Fax: [phone]
Techn ica l Support:

http://www.microchip.com/
support

Web Address:

www.microchip.com

Atlanta

Duluth, GA
Tel: [phone]
Fax: [phone]

Boston

Westborough, MA
Tel: [phone]
Fax: [phone]

Chicago

Itasca, IL
Tel: [phone]
Fax: [phone]

Cleveland

Independence, OH
Tel: [phone]
Fax: [phone]

Dallas

Addison, TX
Tel: [phone]
Fax: [phone]

Detroit

Farmington Hills, MI
Tel: [phone]
Fax: [phone]

Indianapolis

Noblesville, IN
Tel: [phone]
Fax: [phone]

Los Angeles

Mission Viejo, CA
Tel: [phone]
Fax: [phone]

Santa Clara

Santa Clara, CA
Tel: [phone]
Fax: [phone]

Toronto

Mississauga, Ontario,
Canada
Tel: [phone]
Fax: [phone]

ASIA/PACIFIC

Asia Pacific Office

Suites 3707-14, 37th Floor
Tower 6, The Gateway
Harbour City, Kowloon
Hong Kong
Tel: [phone]
Fax: [phone]

Australia - Sydney

Tel: [phone]
Fax: [phone]

China - Beijing

Tel: [phone]
Fax: [phone]

China - Chengdu

Tel: [phone]
Fax: [phone]

China - Chongqing

Tel: [phone]
Fax: [phone]

China - Hangzhou

Tel: [phone]
Fax: [phone]

China - Hong Kong SAR

Tel: [phone]
Fax: [phone]

China - Nanjing

Tel: [phone]
Fax: [phone]

China - Qingdao

Tel: [phone]
Fax: [phone]

China - Shanghai

Tel: [phone]
Fax: [phone]

China - Shenyang

Tel: [phone]
Fax: [phone]

China - Shenzhen

Tel: [phone]
Fax: [phone]

China - Wuhan

Tel: [phone]
Fax: [phone]

China - Xian

Tel: [phone]
Fax: [phone]

China - Xiamen

Tel: [phone]
Fax: [phone]

China - Zhuhai

Tel: [phone]
Fax: [phone]

ASIA/PACIFIC

India - Bangalore

Tel: [phone]
Fax: [phone]

India - New Delhi

Tel: [phone]
Fax: [phone]

India - Pune

Tel: [phone]
Fax: [phone]

Japan - Osaka

Tel: [phone]
Fax: [phone]

Japan - Yokohama

Tel: [phone]
Fax: [phone]

Korea - Daegu

Tel: [phone]
Fax: [phone]

Korea - Seoul

Tel: [phone]
Fax: [phone] or
82-2-558-5934

Malaysia - Kuala Lumpur

Tel: [phone]
Fax: [phone]

Malaysia - Penang

Tel: [phone]
Fax: [phone]

Philippines - Manila

Tel: [phone]
Fax: [phone]

Singapore

Tel: [phone]
Fax: [phone]

Tai wan - Hsin Chu

Tel: [phone]
Fax: [phone]

Taiwan - Kaohsiung

Tel: [phone]
Fax: [phone]

Taiwan - Taipei

Tel: [phone]
Fax: [phone]

Thailand - Bangkok

Tel: [phone]
Fax: [phone]

EUROPE

Austria - Wels

Tel: [phone]
Fax: [phone]

Denmark - Copenhagen

Tel: [phone]
Fax: [phone]

France - Paris

Tel: [phone]
Fax: [phone]

Germany - Munich

Tel: [phone]
Fax: [phone]

Italy - Milan

Tel: [phone]
Fax: [phone]

Netherlands - Drunen

Tel: [phone]
Fax: [phone]

Spain - Madrid

Tel: [phone]
Fax: [phone]

UK - Wokingham

Tel: [phone]
Fax: [phone]

10/26/12

DS25158B-page 26  2012 Microchip Technology Inc.