Datasheet LCX018AK Datasheet (Sony)

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1.8cm (0.7-inch) NTSC/PAL/WID Color LCD Panel

Description

The LCX018AK is a 1.8cm diagonal active matrix TFT-LCD panel addressed by the polycrystalline silicon super thin film transistors with built-in peripheral driving circuit. This panel provides fullcolor representation in NTSC/PAL/WID mode. RGB dots are arranged in a delta pattern featuring high picture quality of no fixed color patterns, which is inherent in vertical stripes and mosaic pattern arrangements.

Features

• Number of active dots: 240,000 (0.7-inch; 1.8cm in diagonal)

• Horizontal resolution: 400 TV lines

• High optical transmittance: 4.4% (typ.)

• High contrast ratio with normally white mode: 200 (typ.)

• Built-in H and V driving circuit (built-in input level conversion circuit, TTL drive possible)

• High quality picture representation with RGB delta arranged color filters

• Full-color representation

• NTSC/PAL/WID compatible

• Up/down and/or right/left inverse display function

• Side-black function

• 16:9 and 4:3 aspect switching function

Element Structure

• Dots

16:9 display: 1068.5 (H) × 225 (V) = 240,412 4:3 display: 803.5 (H) × 225 (V) = 180,787

• Built-in peripheral driving circuit using the polycrystalline silicon super thin film transistors.

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E98521-PS

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

LCX018AK

For the availability of this product, please contact the sales office.

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LCX018AK

Block Diagram

H Shift Register (Bidirectional Scanning)

Input Signal Level Shifter

Up/Down and/or

Right/Left Inversion

4:3/16:9 Control Circuit

V Shift Register

(Bidirectional Scanning)

Side-Black

Control Circuit

PSIG

HST

HCK1

HCK2

WID

RGT

VST

VCK1

SIG1

SIG2

SIG3

COM

Pad

PCG

DWN

VCK2

V Shift Register

(Bidirectional Scanning)

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LCX018AK

Absolute Maximum Ratings (Vss = 0V)

• H driver supply voltage HVDD –1.0 to +17 V

• V driver supply voltage VVDD –1.0 to +17 V

• H driver input pin voltage HST, HCK1, HCK2 –1.0 to +17 V

RGT

• V driver input pin voltage VST, VCK1, VCK2 –1.0 to +17 V CLR, EN

• Video signal input pin voltage GREEN, RED, BLUE –1.0 to +15 V

• Operating temperature Topr –10 to +70 °C

• Storage temperature Tstg –30 to +85 °C

Operating Conditions (Vss = 0V)

• Supply voltage

HVDD 13.5 ± 0.5 V VVDD 13.5 ± 0.5 V

• Input pulse voltage (Vp-p of all input pins except video signal input pins) Vin 3.0V or more

Pin Description

Pin No.

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20

COM PSIG SIG1 SIG2 SIG3 HVDD WID RGT HST HCK1 HCK2 VSS EN VCK2 VCK1 VST DWN PCG VVDD SOUT

Common voltage of panel Improvement signal for uniformity Video signal (Green) to panel Video signal (Red) to panel Video signal (Blue) to panel Power supply for H driver Aspect-ratio switching (H: 16:9, L: 4:3) Drive direction pulse for H shift register (H: normal, L: reverse) Start pulse for H shift register drive Clock pulse for H shift register drive Clock pulse for H shift register drive GND (H, V drivers) Enable pulse for gate selection Clock pulse for V shift register drive Clock pulse for V shift register drive Start pulse for V shift register drive Drive direction pulse for V shift register (H: normal, L: reverse) Improvement pulse for uniformity Power supply for V driver H, V shift register drive confirmation

Symbol

Description

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LCX018AK

Input Equivalent Circuit

To prevent static charges, protective diodes are provided for each pin except the power supply. In addition, protective resistors are added to all pins except video signal input. The equivalent circuit of each input pin is shown below. (The resistor value: typ.)

VVDD

250Ω

Level conversion circuit

(2-phase input)

HCK1

HCK2

1MΩ

2.5kΩ2.5kΩ

Input

Level conversion circuit

(single-phase input)

250Ω250Ω

Input

From H driver

Signal line

(1) SIG1, SIG2, SIG3, SID

(2) HCK1, HCK2

(3) HST

(4) RGT, WID

(5) VCK1, VCK2

2.5kΩ

Input

(6) VST, DWN, EN

1MΩ

VVDD

250Ω

VCK1

VCK2

1MΩ

(7) PCG

250Ω250Ω

Input

1MΩ

Input

(8) COM

1MΩ

VVDD

Level conversion circuit

(single-phase input)

Level conversion circuit

(2-phase input)

Level conversion circuit

(single-phase input)

Level conversion circuit

(single-phase input)

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LCX018AK

Input Signals

1.Input signal voltage conditions (Vss = 0V)

Item

H driver input voltage (HST, HCK1, HCK2, RGT, WID)

(Low) (High) (Low) (High)

VHIL VHIH VVIL VVIH VVC VCOM

–0.30

2.7

–0.30

2.7

5.8

VVC – 0.4

0.0 3

6.0

VVC – 0.25

0.30

5.5

0.3

5.5

6.2

VVC – 0.1

V V V V V V

V driver input voltage (VST, VCK1, VCK2, DWN, PCG, EN)

Video signal center voltage Common voltage of panel

Symbol Min. Typ. Max. Unit

Item

Video signal input range

∗1

Uniformity improvement signal PSIG input voltage Video signal and uniformity improvement signal

input white level

Vsig Vpsig

VsigL

VVC – 4.0 VVC – 4.0

0.5

VVC + 4.0 VVC + 4.0

V V

Symbol Min. Typ. Max. Unit

(VDD = 12.0V)

∗1

Video input signal should be symmetrical to VVC.

Supplement) Video signal and uniformity improvement signal input range are set within the range shown

below for VDD and VSS. Also, video signal white level is defined for VVC as shown below.

VsigL

White level VsigL

Video signal input range Max. VDD – 1.8 [V] Min. VSS + 1.3 [V]

VDD

VDD – 1.8

VVC

DD + 1.3

AAA AAA AAA

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LCX018AK

2. Clock timing conditions (Ta = 25°C)

Hst rise time Hst fall time Hst data set-up time Hst data hold time Hckn∗2rise time Hckn∗2fall time Hck1 fall to Hck2 rise time Hck1 rise to Hck2 fall time Vst rise time Vst fall time Vst data set-up time Vst data hold time Vckn∗2rise time Vckn∗2fall time Vck1 fall to Vck2 rise time Vck1 rise to Vck2 fall time Enb rise time Enb fall time Vck rise/fall to Enb rise time Enb pulse width Pcg rise time Pcg fall time Pcg fall to Vck rise/fall time Pcg pulse width

trHst tfHst tdHst thHst trHckn tfHckn to1Hck to2Hck trVst tfVst tdVst thVst trVckn tfVckn to1Vck to2Vck trEnb tfEnb tdEnb twEnb trPcg tfPcg toVck twPcg

35 80

–15 –15

–5.5

–20 –20

—

— 2150 5950

—

–1050

2450

45 90

0 0

4.5 59

0 — —

2200 6000

— —

–1000

2500

30 30 55

100

30 30 15

15 100 100

14.5 69

100 100

20 20

100

100 2250 6050

20 –950 2550

µs

Item Symbol Min. Typ. Max. Unit

HST

HCK

VST

VCK

ENB

PCG

∗2

Hckn and Vckn mean Hck1, Hck2 and Vck1, Vck2. (fHckn = 3.72MHz, fVckn = 7.81kHz)

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LCX018AK

Hst rise time

HST

HCK

Hst fall time

Hst data set-up time

Hst data hold time

Hckn∗2rise time

Hckn∗2fall time

Hck1 fall to Hck2 rise time

Hck1 rise to Hck2 fall time

• Hckn

∗2

duty cycle 50% to1Hck = 0ns to2Hck = 0ns

• Hckn

∗2

duty cycle 50% to1Hck = 0ns to2Hck = 0ns

• Hckn

∗2

duty cycle 50% to1Hck = 0ns to2Hck = 0ns tdHst = 60ns thHst = –120ns

• tdHst = 60ns thHst = –120ns

trHst

tfHst

tdHst

thHst

trHckn

tfHckn

to1Hck

to2Hck

Item Symbol Waveform Conditions

90%

10%

90%

Hst

trHst tfHst

Hst

Hck1

tdHst

thHst

∗2

Hckn

10%

90%

trHckn tfHckn

50%

∗3

Hck1

to2Hck to1Hck

50%

Hck2

50%

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LCX018AK

Vst rise time

VST

VCK

ENB

Vst fall time

Vst data set-up time

Vst data hold time

Vckn∗2rise time

Vckn∗2fall time

Vck1 fall to Vck2 rise time

Vck1 rise to Vck2 fall time

Enb rise time

Enb fall time

Vck rise/fall to Enb rise time

Enb pulse width

• Vckn

∗2

duty cycle 50% to1Vck = 0ns to2Vck = 0ns

• Vckn

∗2

duty cycle 50% to1Vck = 0ns to2Vck = 0ns

• Vckn

∗2

duty cycle 50% to1Vck = 0ns to2Vck = 0ns tdVst = 32µs thVst = –32µs

• tdVst = 32µs thVst = –32µs

trVst

tfVst

tdVst

thVst

trVckn

tfVckn

to1Vck

to2Vck

trEnb

tfEnb

tdEnb

twEnb

90%

10%

90%

Vst

trVst tfVst

50%

∗3

Vst

Vck1

tdVst thVst

50%

Vckn

10%

90%

trVckn tfVckn

50%

∗3

Vck1

to2Vck to1Vck

50%

Vck2

90%

10%

tfEn trEn

Enb

50%

twEnb

tdEnb

Vck

∗

∗3

Definitions: The right-pointing arrow ( ) means +.

The left-pointing arrow ( ) means –. The black dot at an arrow ( ) indicates the start of measurement.

Item Symbol Waveform Conditions

PCG

Pcg rise time

trPcg

Pcg fall time

tfPcg

Pcg fall to Vck rise/fall time

toVck

Pcg pulse width

twPcg

Pcg

50%

twPcg toVck

Vck

∗

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LCX018AK

Electrical Characteristics (Ta = 25°C, HVDD = 13.5V, VVDD = 13.5V)

1. Horizontal drivers

Item

Input pin capacitance Hckn

Hst

Input pin current Hck1

Hck2

Hst, Wid, Rgt

Video signal input pin capacitance

Current consumption

CHckn CHst IHck1 IHck2 IRgt

Csig IH

Hck1 = GND Hck2 = GND Hst, Wid, Rgt = GND

Hckn: Hck1, Hck2 (3.72MHz)

–450 –900 –130

8 –190 –200

–25 150

3.5

13 13

200

pF pF µA µA µA

Symbol Min. Typ. Max. Unit Condition

2. Vertical drivers

Item

Input pin capacitance Vckn

Vst

Input pin current Vck1

Vck2

Vst, En, Dwn, Pcg

Current consumption

CVckn CVst IVck1 IVck2 IVst,

IEn IV

–450 –900

–130

8 –190 –200

–25

1.0

13 13

2.0

pF pF µA µA

µA

Symbol Min. Typ. Max. Unit Condition

3. Total power consumption of the panel

Item

Total power consumption of the panel (NTSC) PWR 60 120 mW

Symbol Min. Typ. Max. Unit

4. COM input resistance

Item

COM – Vss input resistance Rcom 0.5 1 MΩ

Symbol Min. Typ. Max. Unit

5. Improvement signal for uniformity

Item

Improvement signal for uniformity

CPSIGon — 7 10 nF

Symbol Min. Typ. Max. Unit

Vck1 = GND Vck2 = GND

Vst, En, Dwn, Pcg = GND Vckn: Vck1, Vck2 (7.87kHz)

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LCX018AK

Electro-optical Characteristics (Ta = 25°C, NTSC mode)

Item

Contrast ratio

25°C 60°C

X Y X Y X

Y 25°C 60°C 25°C 60°C 25°C 60°C

R vs. G

B vs. G

0°C

25°C

0°C 25°C 60°C

60min.

CR25 CR60 T Rx Ry Gx Gy Bx By V90-25 V90-60 V50-25 V50-60 V10-25 V10-60 V50RG V50BG ton0 ton25 toff0 toff25 F YT60 Vcomopt

80 80

3.8

0.580

0.300

0.250

0.550

0.105

0.070

1.1

1.0

1.5

1.4

2.2

2.1 — — — — — — — —

5.60

200 200

4.4

0.620

0.340

0.290

0.590

0.140

0.110

1.5

1.3

2.0

1.8

2.7

2.5

–0.10

0.10 25

8 65 20 — —

5.75

— — —

0.660

0.380

0.330

0.630

0.175

0.150

2.2

2.1

2.5

2.4

3.2

3.1

–0.25

0.45 100

150

–40

5.90

7 8 9

—

CIE standards

Optical transmittance

Chromaticity

V90

V50

V10

ON time

OFF time

V-T characteristics

Half tone color reproduction range

Response time

Flicker Image retention time Optimum Vcom voltage

Symbol

Measurement method

Min. Typ.

Max. Unit

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LCX018AK

<Electro-optical Characteristics Measurement>

Basic measurement conditions

(1) Driving voltage HVDD = 13.5V, VVDD = 13.5V VVC = 6.0V, Vcom = 5.75V (2) Measurement temperature 25°C unless otherwise specified. (3) Measurement point One point in the center of screen unless otherwise specified. (4) Measurement systems Two types of measurement system are used as shown below. (5) RGB input signal voltage (Vsig) Vsig = 6 ± VAC [V] (VAC: signal amplitude)

Back Light

∗ Measurement system I

∗ Measurement system II

LCD panel

Luminance Meter

Measurement Equipment

Light Detector

Measurement Equipment

Back light: color temperature 8500K, +0.004uV (25°C)

∗

Back light spectrum (reference) is listed on another page.

Optical fiber

LCD panel

Light receptor lens

Drive Circuit

Light Source

3.5mm

Back light

1. Contrast Ratio

Contrast Ratio (CR) is given by the following formula (1).

CR =

L (White)

... (1)

L (Black)

L (White): Surface luminance of the TFT-LCD panel at the RGB signal amplitude VAC = 0.5V. L (Black): Surface luminance of the panel at VAC = 4.5V Both luminosities are measured by System I.

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LCX018AK

2. Optical Transmittance

Optical Transmittance (T) is given by the following formula (2).

T = × 100 [%] ... (2)

L (White) is the same expression as defined in the "Contrast Ratio" section.

3. Chromaticity

Chromaticity of the panels are measured by System I. Raster modes of each color are defined by the representations at the input signal amplitude conditions shown in the table below. System I uses Chromaticity of x and y on the CIE standards here.

Signal amplitudes (VAC) supplied to each input

R input G input B input

Raster

0.5

4.5

0.5

4.5

0.5 (Unit: V)

4. V-T Characteristics

V-T characteristics, the relationship between signal amplitude and the transmittance of the panels, are measured by System II. V90, V50 and V10 correspond to the each voltage which defines 90%, 50% and 10% of transmittance respectively.

5. Half Tone Color Reproduction Range

Half tone color reproduction range of the LCD panels is characterized by the differences between the V-T characteristics of R, G and B. The differences of these V-T characteristics are measured by System II. System II defines signal voltages of each R, G, B raster modes which correspond to 50% of transmittance, V50R, V50G and V50B respectively. V50RG and V50BG, the voltage differences between V50R and V50G, V50B and V50G, are simply given by the following formula (3) and (4) respectively.

V50RG = V50R – V50G ... (3) V50BG = V50B – V50G ... (4)

90 V50 V10

VAC – Signal amplitude [V]

Transmittance [%]

100

50R V50B

V50G

VAC – Signal amplitude [V]

Transmittance [%]

V50RG

V50BG

G raster

B raster

R raster

L (White)

Luminance of Back Light

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LCX018AK

6. Response Time

Response time ton and toff are defined by the formula (5) and (6) respectively. ton = t1 – tON ... (5) toff = t2 – tOFF ... (6) t1: time which gives 10% transmittance of

the panel.

t2: time which gives 90% transmittance of

the panel. The relationships between t1, t2, tON and tOFF are shown in the right figure.

7. Flicker

Flicker (F) is given by the formula (7). DC and AC (NTSC: 30Hz, rms, PAL: 25Hz, rms) components of the panel output signal for gray raster∗mode are measured by a DC voltmeter and a spectrum analyzer in System II.

component

F [dB] = 20 log

{ }

...

(7)

DC component

8. Image Retention Time

Image retention time is given by the following procedures: Apply monoscope signal to the LCD panel for 60 minutes and then change monoscope signal∗to gray scale signal (Vsig = 6 ± VAC (V); VAC = 3 to 4V) so as to give the maximum image retention. Hold input signal VAC. The time of the residual image to disappear gives the image retention time.

∗

Monoscope signal conditions:

Vsig = 6 ± 4.5 or 6 ±2.0 [V] (shown in the right figure) Vcom = 5.6V

Input signal voltage (waveform applied to the measured pixels)

4.5V

0.5V

Light transmission output waveform

100%

90%

10%

tON t1

ton

tOFF t2

toff

∗

R, G, B input signal condition for gray raster mode is given by Vsig = 6 ± V50 [V] where: V50 is the signal amplitude which gives 50% of

transmittance in V-T curve.

Black level

White level

Vsig waveform

4.5V

2.0V

4.5V

2.0V

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LCX018AK

9. Method of Measuring the Optimum Vcom

There are two methods of measuring the optimum Vcom using the photoelectric element.

9-1. Method of Measuring Flicker

In the field invert drive mode, adjust the flicker level of the half tone (Vsig = 1.5 to 2.5V) using the photoelectric element and oscilloscope so that its 30Hz component becomes minimum. The Vcom value at this time is taken to be the optimum Vcom.

9-2. Method of Measuring Contrast

In the normal 1H invert drive mode, adjust the optical output voltage of the half tone (Vsig = 1.5 to 2.5V) so that it becomes minimum. The Vcom value at this time is taken to be the optimum Vcom.

Example of Back Light Spectrum (Reference)

0.6

0.4

0.2

380 480 580 680 780

Wave length 380 – 780 [nm]

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LCX018AK

Description of Operation

1. Color Coding

The shaded area is used for the dark border around the display.

LCX018AK Dot Arrangement (16:9)

GATE SW

DL1

GATE SW

DL2

GATE SW

GATE SW GATE SW GATE SW GATE SW GATE SW GATE SW GATE SW GATE SW GATE SW GATE SW

355

GATE SW GATE SW

356

GATE SW

357

GATE SW

DR1

GATE SW

DR2

EVEN = 7 dots

ODD = 8 dots

EVEN = 1083 dots

ODD = 1083 dots

EVEN = 7 dots

ODD = 7 dots

224

225

123

2 dots

225 dots

(Effective 8.775mm)

2 dots

B G B G B G B G B G B G B G B G B G B G B G B G B G B G B G B G B G B G B G BR R R R R R R R R R R R R R R R R R R

B G B G B G B G B G B G B G B G B G B G B G B G B G B G B G B G B G B G BR G R R R R R R R R R R R R R R R R R R R