Dual Up-Counter
High-Voltage Silicon-Gate CMOS
The IW4518B Dual BCD Up-Counter consists two identical,
internally synchronous 4-stage counters. The counter stages are D-type
flip-flops having interchangeable CLOCK and ENABLE lines for
incrementing on either the positive-going or negative-going transition.
For single-unit operation the ENABLE input is maintained high and
the counter advances on each positive-going transition of the CLOCK.
The counters are cleared by high levels on their RESET lines.
The counter can be cascaded in the ripple mode by connecting Q4
to the enable input of the subsequent counter while the CLOCK input
of the latter is held low.
•
Operating Voltage Range: 3.0 to 18 V
•
Maximum input current of 1 µA at 18 V over full package-
temperature range; 100 nA at 18 V and 25°C
•
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
TECHNICAL DATA
IW4518B
ORDERING INFORMATION
IW4518BN Plastic
IW4518BD SOIC
TA = -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 16=V
PIN 8= GND
CC
FUNCTION TABLE
Inputs Outputs
CLOCK ENABLE RESET Mode
H L Increment Counter
L L Increment Counter
X L No Change
X L No Change
L L No Change
H L No Change
XXHQ1 thru Q4=L
X = don’t care
163
IW4518B
MAXIMUM RATINGS
*
Symbol Parameter Value Unit
V
CC
V
V
OUT
I
IN
P
P
DC Supply Voltage (Referenced to GND) -0.5 to +20 V
DC Input Voltage (Referenced to GND) -0.5 to VCC +0.5 V
IN
DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V
DC Input Current, per Pin
Power Dissipation in Still Air, Plastic DIP+
D
SOIC Package+
Power Dissipation per Output Transistor 100 mW
D
±
10
750
500
Tstg Storage Temperature -65 to +150
T
Lead Temperature, 1 mm from Case for 10 Seconds
L
260
(Plastic DIP or SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
VIN, V
T
CC
A
DC Supply Voltage (Referenced to GND) 3.0 18 V
DC Input Voltage, Output Voltage (Referenced to GND) 0 V
OUT
Operating Temperature, All Package Types -55 +125
CC
mA
mW
°
C
°
C
V
°
C
This device c ontains p rote ction ci rcuitr y to guard a gainst damage d ue to high st atic voltages or electr ic
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V
GND≤(V
IN
or V
OUT
)≤VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
and V
IN
should be constrained to the range
OUT
CC
Unused outputs must be left open.
164
).
IW4518B
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
Symbol Parameter Test Conditions V
V
V
V
IH
IL
OH
Minimum High-Level
Input Voltage
Maximum Low -Level
Input Voltage
Minimum High-Level
V
= 0.5 V or V
OUT
V
= 1.0 V or V
OUT
V
= 1.5 V or V
OUT
V
= 0.5 V or V
OUT
V
= 1.0 V or V
OUT
V
= 1.5 V or V
OUT
VIN=GND or V
CC
CC
CC
CC
CC
CC
CC
- 0.5V
- 1.0 V
- 1.5V
- 0.5V
- 1.0 V
- 1.5V
Output Voltage
V
OL
Maximum Low-Level
VIN=GND or V
CC
Output Voltage
I
IN
Maximum Input
VIN= GND or V
CC
Leakage Current
I
CC
Maximum Quiescent
VIN= GND or V
CC
Supply Current
(per Package)
I
OL
I
OH
Minimum Output Low
(Sink) Current
Minimum Output
High (Source) Current
VIN= GND or V
UOL=0.4 V
U
=0.5 V
OL
U
=1.5 V
OL
VIN= GND or V
UOH=2.5 V
U
=4.6 V
OH
U
=9.5 V
OH
U
=13.5 V
OH
CC
CC
V
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
18
5.0
10
15
20
5.0
10
15
5.0
5.0
10
15
CC
≥
14.95
Guaranteed Limit
-55°C25°C
3.5
7
11
1.5
3
4
4.95
9.95
3.5
7
11
1.5
3
4
4.95
9.95
14.95
0.05
0.05
0.05
±
0.1
5
10
20
100
0.64
1.6
4.2
-2
-0.64
-1.6
-4.2
0.05
0.05
0.05
±
0.1
5
10
20
100
0.51
1.3
3.4
-1.6
-0.51
-1.3
-3.4
≤
125
°
C
3.5
7
11
1.5
3
4
4.95
9.95
14.95
0.05
0.05
0.05
±
1.0
150
300
600
3000
0.36
0.9
2.4
-1.15
-0.36
-0.9
-2.4
Unit
V
V
V
V
µ
A
µ
A
mA
mA
165
IW4518B
AC ELECTRICAL CHARACTERISTICS
(CL=50pF, RL=200kΩ, Input tr=tf=20 ns)
Symbol Parameter V
t
PHL
f
max
, t
Maximum Clock Frequency, (Fi gure 1) 5.0
Maximum Propagati on Delay, Clock or Enable
PLH
to Output (Figures 1,3)
t
PHL
Maximum Propagation Delay, Reset to Output
(Figure 2)
t
THL
, t
Maximum Output Transition Time, Any Output
TLH
(Figure 1)
C
IN
TIMING REQUIREMENTS
Maximum Input Capacitance - 7.5 pF
(CL=50pF, RL=200 kΩ, Input tr=tf=20 ns)
Symbol Parameter V
t
t
t
tr, t
w
w
w
Minimum Pulse Width, Clock (Figure 1) 5.0
Minimum Pulse Width, Reset (Figure 2) 5.0
Minimum Pulse Width, Enable (Figur e 3) 5.0
Maximum Input Rise and Fall Times
f
(Figure 1)
V
10
15
5.0
10
15
5.0
10
15
5.0
10
15
V
10
15
10
15
10
15
5.0
10
15
CC
≥
CC
≥
Guaranteed Limit
-55°C25°C
1.5
3
4
560
230
160
650
225
170
200
100
80
1.5
3
4
560
230
160
650
225
170
200
100
80
Guaranteed Limit
-55°C25°C
200
100
70
250
110
80
400
200
140
15
5
5
200
100
70
250
110
80
400
200
140
15
5
5
≤
125°C
0.75
1.5
1120
460
320
1300
450
340
400
200
160
≤
125°C
400
200
140
500
220
160
800
400
280
15
Unit
MHz
2
ns
ns
ns
Unit
ns
ns
ns
µ
s
5
5
166
Figure 1. Switching Waveforms Figure 2. Switching Waveforms
Figure 3. Switching Waveforms
TIMING DIAGRAM
IW4518B
EXPANDED LOGIC DIAGRAM
(1/2 of the Device)
167
Loading...