Datasheet IRS21531-DS-PbF Datasheet (IOR)

Data Sheet No. PD60238 revE

IRS2153(1)D(S)PbF

Features Product Summary

Integrated 600 V half-bridge gate driver

  C

, RT programmable oscillator

T

 15.4 V Zener clamp on V  Micropower startup  Non-latched shutdown on C

Internal bootstrap FET

  Excellent latch immunity on all inputs and outputs

 +/- 50 V/ns dV/dt immunity  ESD protection on all pins

 8-lead SOIC or PDIP package

 Internal deadtime

CC

SELF-OSCILLATING HALF-BRIDGE DRIVER IC

pin (1/6th V

T



)

CC

V

600 V Max

OFFSET

Duty cycle 50%

Driver source/sink

current

V

15.4 V typ.

clamp

Deadtime

180 mA/260 mA typ.

1.1 µs typ. (IRS2153D)

0.6 µs typ. (IRS21531D)

Description

The IRS2153(1)D is based on the popular IR2153 selfoscillating half-bridge gate driver IC using a more advanced silicon platform, and incorporates a high voltage half-bridge gate driver with a front end oscillator similar to the industry standard CMOS 555 timer. HVIC and latch immune CMOS technologies enable rugged monolithic construction. The output driver features a high pulse current buffer stage designed for minimum driver cross-conduction. Noise immunity is achieved with low di/dt peak of the gate drivers.

Typical Connection Diagram

+ AC Rectified Line

RVCC

VCC

1

RT

2

RT

CT

CVCC

CT

COM

3

4

Package

IRS2153(1)DPbF IRS2153(1)DSPbF

8

7

6

IRS2153(1)D

5

PDIP8 SO8

VB

CBOOT

HO

VS

LO

MHS

L

MLS

RL

- AC Rectified Line

1

IRS2153(1)D

Absolute Maximum Ratings

Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions.

Parameter

Symbol Definition Min. Max. Units

VB

VS

VHO High side floating output voltage

VLO Low side output voltage -0.3

IRT RT pin current

VRT RT pin voltage

VCT CT pin voltage

ICC

I

OMAX

dVS/dt

PD

R

thJA

R

thJA

TJ

TS

TL

High side floating supply voltage -0.3 625

High side floating supply offset voltage

VB - 25 VB + 0.3

V

– 0.3 VB + 0.3

S

V

+ 0.3

CC

-5 5 mA

-0.3

VCC + 0.3

Supply current (Note 1) --- 20

Maximum allowable current at LO and HO due to external power transistor Miller effect.

-500 500

Allowable offset voltage slew rate -50 50 V/ns

Maximum power dissipation @ T

Thermal resistance, junction to ambient, 8-Pin DIP --- 85

Thermal resistance, junction to ambient, 8-Pin SOIC --- 128

≤ +25 ºC, 8-Pin DIP

A

≤ +25 ºC, 8-Pin SOIC

A

--- 1.0

--- 0.625

Junction temperature -55 150

Storage temperature -55 150

Lead temperature (soldering, 10 seconds) --- 300

V

mA

W

ºC/W

ºC

Note 1:

This IC contains a zener clamp structure between the chip V

and COM which has a nominal

CC

breakdown voltage of 15.4 V. Please note that this supply pin should not be driven by a DC, low impedance power source greater than the V

specified in the Electrical Characteristics section.

CLAMP

2

IRS2153(1)D

Recommended Operating Conditions

For proper operation the device should be used within the recommended conditions.

Parameter

Symbol Definition Min. Max. Units

VBS

VS

VCC

ICC

TJ

High side floating supply voltage

Steady state side floating supply offset voltage -3.0 (Note 2) 600

Supply voltage

Supply current (Note 3) 5 mA

Junction temperature -40 125 ºC

Note 2:

Note 3:

It is recommended to avoid output switching conditions where the negative-going spikes at the V node would decrease V

Enough current should be supplied to the

below ground by more than -5 V.

S

pin of the IC to keep the internal 15.6 V zener diode

V

CC

clamping the voltage at this pin.

Recommended Component Values

Parameter

Symbol Component Min. Max. Units

RT

CT CT pin capacitor value

Timing resistor value 1

V

BIAS

(VCC, V

) = 14 V, V

BS

=0 V and T

S

= 25 °C, CLO = CHO = 1 nF.

A

VCC - 0.7 V

+

V

CCUV

+0.1 V

CLAMP

V

CC CLAMP

---

330 --- pF

V

kΩ

S

Frequency vs. RT

1,000,000

CT Values

100,000

10,000

1,000

Frequency (Hz)

100

10

1,000 10,000 100,000 1,000,000

RT (O h m)

For further information, see Fig. 12.

330pf

470pF

1nF

2.2nF

4.7nF

10nF

3

IRS2153(1)D

Electrical Characteristics

V

(VCC, V

BIAS

referenced to COM and are applicable to the respective output leads: HO or LO. CLO = CHO = 1 nF.

Symbol Definition Min Typ Max Units

Low Voltage Supply Characteristics

V

CCUV

V

CCUV

V

CCUVHYS

I

QCCUV

IQCC Quiescent

ICC

V

CC

Floating Supply Characteristics

I

QBS

V

BSUV+

V

BSUV-

) = 14 V, CT = 1 nF, V

BS

=0 V and T

S

= 25 °C unless otherwise specified. The output voltage and current (VO and IO) parameters are

A

Test Conditions

Rising VCC undervoltage lockout threshold 10.0 11.0 12.0

+

-

Falling VCC undervoltage lockout threshold 8.0 9.0 10.0

VCC undervoltage lockout hysteresis 1.6 2.0 2.4

Micropower startup V

supply current --- 800 1000

V

CC

supply current --- 1.8 --- mA

V

CC

VCC zener clamp voltage 14.4 15.4 16.8 V ICC = 5 mA

CLAMP

supply current --- 130 170

CC

V

µA

Quiescent VBS supply current --- 60 80 µA

V

supply undervoltage positive going

BS

threshold

8.0 9.0 9.5

V

supply undervoltage negative going

BS

threshold

7.0 8.0 9.0

V

≤ V

CC

R

= 36.9 kΩ

T

CCUV-

ILK Offset supply leakage current --- --- 50

Oscillator I/O Characteristics

f

OSC

Oscillator frequency

18.4 19.0 19.6

88 93 100

d RT pin duty cycle --- 50 --- %

ICT CT pin current ---

I

UV-mode CT pin pulldown current 0.20 0.30 0.6 mA

CTUV

V

Upper CT ramp voltage threshold --- 9.32 ---

CT+

V

Lower CT ramp voltage threshold --- 4.66 ---

CT-

V

CT voltage shutdown threshold 2.2 2.3 2.4

CTSD

V

High-level RT output voltage, VCC - VRT

RT+

V

Low-level RT output voltage

RT-

V

UV-mode RT output voltage

RTUV

--- 10 50 I

--- 100 300 I

--- 10 50 I

--- 100 300 I

--- 0 100

0.02

1.0

--- 10 50

V

SD-mode RT output voltage, VCC - VRT

RTSD

--- 100 300

µA

kHz

µA

V

mV

VB = VS = 600 V

R

= 36.5 kΩ

T

R

= 7.15 kΩ

T

fo < 100 kHz

VCC = 7 V

CCUV-

RT = -100 µA

RT = -1 mA

RT = 100 µA

RT = 1 mA

≤ V

V

CC

I

RT = -100 µA,

VCT = 0 V

I

RT = -1 mA,

VCT = 0 V

4

IRS2153(1)D

Electrical Characteristics

(VCC, V

V

BIAS

parameters are referenced to COM and are applicable to the respective output leads: HO or LO. CLO = CHO = 1 nF.

Symbol Definition Min Typ Max Units

Gate Driver Output Characteristics

VOH

VOL

V

OL_UV

tr

tf

tsd

td

IO+ Output source current --- 180 ---

IO- Output sink current --- 260 ---

)

= 14 V, C

BS

High-level output voltage ---

= 1 nF, VS=0 V and T

T

= 25 °C unless otherwise specified. The output voltage and current (V

A

VCC

Low-level output voltage --- COM ---

UV-mode output voltage --- COM ---

Output rise time --- 120 220

Output fall time --- 50 80

Shutdown propagation delay --- 350 ---

Output deadtime (HO or LO) (IRS2153D) 0.65 1.1 1.75

Output deadtime (HO or LO) (IRS21531D) 0.35 0.6 0.85

---

V

ns

µs

mA

and IO)

O

Test Conditions

≤ V

,

CCUV-

I

V

CC

I

O = 0 A

Bootstrap FET Characteristics

V

VB when the bootstrap FET is on --- 13.7 --- V

B_ON

I

VB source current when FET is on 40 55 ---

B_CAP

I

VB source current when FET is on 10 12 ---

B_10V

CBS=0.1 uF

mA

VB=10 V

5

IRS2153(1)D

Lead Definitions

VCC

COM

1

RT

2

CT

3

4

IRS2153(1)D

VB

8

HO

7

VS

6

LO

5

Lead

Symbol Description

VCC Logic and internal gate drive supply voltage

RT Oscillator timing resistor input

CT Oscillator timing capacitor input

COM IC power and signal ground

LO Low-side gate driver output

V

High voltage floating supply return

S

HO High-side gate driver output

VB High side gate driver floating supply

6

Functional Block Diagram

2

RT

IRS2153(1)D

8

VB

CT

R

+

-

R

RQ

+

S

-

R/2

UV

DETECT

S R1 R2

+

3

-

R/2

M1

DEAD

TIME

Q

DEAD

TIME

Q

PULSE

GEN

HV LEVEL SHIFT

PULSE FILTER

DELAY

BOOTSTRAP

DRIVE

R

S

15.4V

Q

HO

7

6

VS

VCC

1

LO

5

4

COM

7

IRS2153(1)D

Timing Diagram

Operating Mode

VCCUV+

VCC

2/3 VCC

VCT

1/3 VCC 1/6 VCC

VCC

LO

VCC

DT

Fault Mode: CT <1/6*VCC

HO

DT

VCC

VRT

IRT

Switching Time Waveform Deadtime Waveform

90%

LO

tr tf

10%

DTLO

90%

HO

DTHO

HO LO

10%

8

IRS2153(1)D

Functional Description

Under-voltage Lock-Out Mode (UVLO)

The under-voltage lockout mode (UVLO) is defined as the state the IC is in when V IRS2153(1)D under voltage lock-out is designed to maintain an ultra low supply current of less than 170 IC is fully functional before the high and low side output drivers are activated. During under voltage lock-out mode, the high and low-side driver outputs HO and LO are both low.

Supply voltage

+ AC Rectified Line

RVCC

CVCC

- AC Rectified Line

Fig. 1 shows an example of supply voltage. The start-up capacitor

) is charged by current through supply resistor (R

(C

VCC

the start-up current drawn by the IC. This resistor is chosen to provide sufficient current to supply the IRS2153(1)D from the DC bus. C

should be large enough to hold the voltage at Vcc

VCC

above the UVLO threshold for one half cycle of the line voltage as it will only be charged at the peak, typically 0.1 uF. It will be necessary for R

The use of a two diode charge pump made of DC1, DC2 and CVS (Fig. 2) from the half bridge (V the above approach is simplest and the dissipation in R not be unacceptably high.

+ AC Rectified Line

is below the turn-on threshold of the IC. The

CC

µA, and to guarantee the

VCC

1

RT

2

RT

CT

3

CT

COM

4

IRS2153(1)D

Fig. 1 Typical Connection Diagram

to dissipate around 1 W.

VCC

VB

8

CBOOT

HO

7

VS

6

LO

5

MLS

) is also possible however

S

MHS

L

VCC

RL

) minus

should

Bootstrap MOSFET

The internal bootstrap FET and supply capacitor (C the supply voltage for the high side driver circuitry. The internal boostrap FET only turns on when LO is high. To guarantee that the high-side supply is charged up before the first pulse on pin HO, the first pulse from the output drivers comes from the LO pin.

) comprise

BOOT

Normal operating mode

Once the V increases to approximately V capacitor starts charging. Once the CT voltage reaches V (about 1/3 of V turns on with a delay equivalent to the deadtime (t voltage reaches V goes down to approximately ground (V discharges and the deadtime circuit is activated. At the end of the deadtime, HO goes high. Once the CT voltage reaches V goes low, RT goes high again, the deadtime is activated. At the end of the deadtime, LO goes high and the cycle starts over again.

The following equation provides the oscillator frequency:

threshold is passed, the MOSFET M1 opens, RT

CCUV+

), established by an internal resistor ladder, LO

CC

(approximately 2/3 of VCC), LO goes low, RT

CT+

~

(VCC-V

CC

and the external CT

RT+)

), the CT capacitor

RT-

1

). Once the CT

d

CT-,

CTRTf××453.1

This equation can vary slightly from actual measurements due to internal comparator over- and under-shoot delays. For a more accurate determination of the output frequency, the frequency characteristic curves should be used (RT vs. Frequency, page 3).

Shut-down

If CT is pulled down below an external circuit, CT doesn’t charge up and oscillation stops.

LO is held low and the bootstrap FET is off. Oscillation will resume once CT is able to charge up again to V

(approximately 1/6 of V

V

CTSD

CT-

CC

.

CT

HO

) by

-

RVCC

CVCC

- AC Rectified Line

VCC

1

RT

2

RT

CT

3

CT

COM

4

IRS2153(1)D

VB

8

CBOOT

HO

7

VS

6

LO

5

MHS

DC2

MLS

Fig. 2 Charge pump circuit

The supply resistor (R

) must be selected such that enough

VCC

supply current is available over all operating conditions.

Once the capacitor voltage on V

, the IC turns on and HO and LO begin to oscillate.

V

CCUV+

reaches the start-up threshold

CC

L

CVS

DC1

RL

9

)

IRS2153(1)D

19

18.8

18.6

18.4

Frequency (kHz

18.2

18

11 12 13 14 15 16

VCC(V)

FREQ vs VCC

Fig. 3 Fig. 4

1.4

1.3

1.2

100

98

96

94

Frequency (kHz

92

90

-25 0 25 50 75 100 125

Temperatur e(C)

FREQ vs TEMP

1.25

1.15

1.05

DT(uS)

1.1

1

0.9 11 12 13 14 15 16

V CC(V )

DT vs VCC

Fig. 5 (IRS2153D) Fig. 6 (IRS2153D)

90

80

70

60

50

40

30

Temperature(C)

20

10

0

20 70 120

Frequency (kHz)

Tj vs. Frequency (S OIC)

DT(uS)

0.95

0.85

0.75

-25 0 25 50 75 100 125

Temperatur e(C)

DT vs TEMP

17

16

VCC (V)

15

-25 0 25 50 75 100 125

Temperature (°C)

VCC CLAMP vs TEMP

Fig. 7 Fig. 8

10

)

V)

IRS2153(1)D

300

250

200

150

100

HOCurrent (mA

50

0

-25 0 25 50 75 100 125

Isink HO

IsourceHO

Temperature( C)

IsourceHO,Isink HO vs Temp

Fig. 9 Fig. 10

80

70

60

50

40

30

20

IB_CAP, IBS_10V (mA)

10

0

-25 0 25 50 75 100 125

IB_ CA P

IBS_10V

VOH_HO (V)

Temperature(C)

IBCAP, IBS10V vs TEMP

T=25°C, VS=0V, CHO = 1nF

Fig. 11 Fig. 12

VOH_HO vs. Frequency vs. Temp

VCC=14V, CHO=1nF, VS=0V

300

250

200

150

100

LO Cur rent (mA)

50

0

-25 0 25 50 75 100 125

IsinkLO

IsourceLO

Temperature( C)

IsourceLO,IsinkLO vs Temp

VOH_HO vs. Frequency

With Ext ernal BS diode

16

14

12

10

8

6

4

2

0

0 50 100 150 200 250 300 350 400

Frequency (kHz)

No ext ernal BS diode

14

12

10

8

6

VOH_HO(

4

2

0

1.46Khz

T=-25c

K

20

K

50

75

Frequency (kHz)

T=25 c

10

0K

T=75 c

5K

12

Fig. 13

15

0K

0

2

T=125c

11

IRS2153(1)D

IRS2153(1)DPbF

IRS2153(1)DSPbF

12

E

N

IRS2153(1)D

LOADED TAPE FEED DIRECTION

B

F

OTE : CONTROLLING

DIMENSION IN MM

CARRIER TAPE DIMENSION FOR 8SOICN

Code Min Max Min Max A 7.90 8.10 0.311 0.318 B 3.90 4.10 0.153 0.161 C 11.70 12.30 0.46 0.484 D 5.45 5.55 0.214 0.218 E 6.30 6.50 0.248 0.255 F 5.10 5.30 0.200 0.208 G 1.50 n/a 0.059 n/a H 1.50 1.60 0.059 0.062

F

E

G

H

REEL DIMENSIONS FOR 8SOICN

Code Min Max Min Max A 329.60 330.25 12.976 13.001 B 20.95 21.45 0.824 0.844 C 12.80 13.20 0.503 0.519 D 1.95 2.45 0.767 0.096 E 98.00 102.00 3.858 4.015 F n/a 18.40 n/a 0.724 G 14.50 17.10 0.570 0.673 H 12.40 14.40 0.488 0.566

Metric Imperial

C

Metric Imperial

A

H

D

C

G

B

D

A

13

IRS2153(1)D

PART MARKING INFORMATION

ORDER INFORMATION

8-Lead PDIP IRS2153DPbF

8-Lead PDIP IRS21531DPbF

8-Lead SOIC IRS2153DSPbF

8-Lead SOIC IRS21531DSPbF

8-Lead SOIC Tape & Reel IRS2153DSTRPbF

8-Lead SOIC Tape & Reel IRS21531DSTRPbF

This product has been designed and qualified for the industrial level.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 252-7105

Qualification standards can be found at www.irf.com

Data and specifications subject to change without notice. 6/27/2006

The SOIC-8 is MSL2 qualified.

<http://www.irf.com>

14