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PD - 91278
IRF1010N
HEXFET® Power MOSFET
l Advanced Process Technology
l Ultra Low On-Resistance
l Dynamic dv/dt Rating
l 175°C Operating Temperature
l Fast Switching
l Fully Avalanche Rated
G
D
V
R
DS(on)
= 55V
DSS
= 11mΩ
ID = 85A
S
Description
®
Advanced HEXFET
Power MOSFETs from International
Rectifier utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET power MOSFETs are well
known for, provides the designer with an extremely efficient
and reliable device for use in a wide variety of applications.
The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 50 watts. The low thermal
resistance and low package cost of the TO-220 contribute
TO-220AB
to its wide acceptance throughout the industry.
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 85
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 60 A
I
DM
PD @TC = 25°C Power Dissipation 180 W
V
GS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt 3.6 V/ns
T
J
T
STG
Pulsed Drain Current 290
Linear Derating Factor 1.2 W/°C
Gate-to-Source Voltage ± 20 V
Avalanche Current 43 A
Repetitive Avalanche Energy 18 mJ
Operating Junction and -55 to + 175
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torque, 6-32 or M3 srew 10 lbf•in (1.1N•m)
°C
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θCS
R
θJA
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Junction-to-Case ––– 0.85
Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W
Junction-to-Ambient ––– 62
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IRF1010N
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
E
AS
Drain-to-Source Breakdown Voltage 55 – –– ––– V VGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– 0.058 ––– V/°C Reference to 25°C, ID = 1mA
J
Static Drain-to-Source On-Resistance ––– ––– 11 mΩ VGS = 10V, ID = 43A
Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
Forward Transconductance 32 ––– ––– S VDS = 25V, ID = 43A
Drain-to-Source Leakage Current
––– ––– 25
––– ––– 250 VDS = 44V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100
VDS = 55V, VGS = 0V
µA
nA
VGS = -20V
Total Gate Charge ––– ––– 120 ID = 43A
Gate-to-Source Charge ––– ––– 19 nC VDS = 44V
Gate-to-Drain ("Miller") Charge ––– ––– 41 VGS = 10V, See Fig. 6 and 13
Turn-On Delay Time ––– 13 ––– VDD = 28V
Rise Time ––– 76 ––– ID = 43A
Turn-Off Delay Time ––– 39 ––– RG = 3.6Ω
ns
Fall Time ––– 48 ––– VGS = 10V, See Fig. 10
4.5
Internal Drain Inductance
Internal Source Inductance ––– –––
––– –––
7.5
Between lead,
6mm (0.25in.)
nH
from package
and center of die contact
Input Capacitance ––– 3210 ––– VGS = 0V
Output Capacitance ––– 690 ––– VDS = 25V
Reverse Transfer Capacitance ––– 140 ––– pF ƒ = 1.0MHz, See Fig. 5
Single Pulse Avalanche Energy ––– 1030250 mJ I
= 4.3A, L = 270µH
AS
D
G
S
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode)
––– –––
––– –––
85
290
showing the
A
p-n junction diode.
G
Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 43A, VGS = 0V
Reverse Recovery Time ––– 69 100 ns TJ = 25°C, IF = 43A
Reverse Recovery Charge ––– 220 230 nC di/dt = 100A/µs
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Starting T
RG = 25Ω, I
= 25°C, L = 270µH
J
= 43A, VGS=10V (See Figure 12)
AS
≤ 43A, di/dt ≤ 210A/µs, V
SD
TJ ≤ 175°C
Pulse width ≤ 400µs; duty cycle ≤ 2%.
This is a typical value at device destruction and represents
operation outside rated limits.
This is a calculated value limited to T
DD
≤ V
(BR)DSS
= 175°C .
J
,
I
Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 75A.
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D
S
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IRF1010N
1000
100
10
D
I , Drain-to-Source Current (A)
1
0.1 1 10 100
100
VGS
TOP
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM
4.5V
4.5V
20µs PULSE WIDTH
T = 25 C
J
V , Drain-to-Source Voltage (V)
DS
°
T = 25 C
J
°
T = 175 C
J
1000
100
10
D
I , Drain-to-Source Current (A)
1
0.1 1 10 100
VGS
TOP
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM
4.5V
4.5V
20µs PULSE WIDTH
T = 175 C
J
V , Drain-to-Source Voltage (V)
DS
°
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
2.5
2.0
°
I =
D
85A
1.5
10
1.0
(Normalized)
D
I , Drain-to-Source Current (A)
V = 25V
DS
1
4 6 8 10 12
V , Gate-to-Source Voltage (V)
GS
20µs PULSE WIDTH
Fig 3. Typical Transfer Characteristics
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Junction Temperature( C)
J
Fig 4. Normalized On-Resistance
V =
GS
°
10V
Vs. Temperature
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IRF1010N
6000
5000
4000
3000
2000
C, Capacitance(pF)
1000
0
1 10 100
V
= 0V, f = 1 MHZ
GS
C
= C
= C
= C
+ Cgd, C
gs
gd
+ C
ds
gd
iss
C
rss
C
oss
Ciss
Coss
Crss
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
SHORTED
ds
20
I =
43A
D
V = 44V
DS
V = 27V
16
12
8
4
GS
V , Gate-to-Source Voltage (V)
0
0 20 40 60 80 100 120
Q , Total Gate Charge (nC)
G
DS
V = 11V
DS
FOR TEST CIRCUIT
SEE FIGURE
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
OPERATION IN THIS AREA
LIMITED BY RDS(on)
13
100
°
T = 175 C
J
10
1
SD
I , Reverse Drain Current (A)
0.1
0.0 0.6 1.2 1.8 2.4
V ,Source-to-Drain Voltage (V)
SD
°
T = 25 C
J
V = 0 V
GS
Fig 7. Typical Source-Drain Diode
100
100µsec
10
, Drain-to-Source Current (A)
D
Tc = 25°C
I
Tj = 175°C
Single Pulse
1
1 10 100 1000
V
, Drain-toSource Voltage (V)
DS
1msec
10msec
Fig 8. Maximum Safe Operating Area
Forward Voltage
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IRF1010N
)
100
LIMITED BY PACKAGE
80
60
40
D
I , Drain Current (A)
20
0
25 50 75 100 125 150 175
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Case Temperature
1
R
V
DS
V
GS
R
G
V
GS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
D
D.U.T.
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)tr
t
d(off)tf
Fig 10b. Switching Time Waveforms
+
V
DD
-
D = 0.50
thJC
0.20
0.10
0.1
0.05
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
Thermal Response (Z )
Notes:
1. Duty factor D = t / t
2. Peak T =P x Z + T
0.01
0.00001 0.0001 0.001 0.01 0.1
t , Rectangular Pulse Duration (sec
1
J DM thJC C
P
DM
t
1 2
1
t
2
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRF1010N
A
15V
DRIVER
+
-
V
DD
R
20V
V
DS
G
V
GS
L
D.U.T
I
AS
0.01
t
p
Ω
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
I
AS
Fig 12b. Unclamped Inductive Waveforms
500
TOP
400
300
200
100
AS
E , Single Pulse Avalanche Energy (mJ)
0
25 50 75 100 125 150 175
Starting T , Junction Temperature( C)
J
BOTTOM
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Current Regulator
Same Type as D.U.T.
I
18A
30A
43A
°
D
50KΩ
Q
G
V
GS
Q
GS
V
G
Q
GD
Charge
Fig 13a. Basic Gate Charge Waveform
12V
Fig 13b. Gate Charge Test Circuit
.2µF
V
GS
.3µF
D.U.T.
3mA
I
G
Current Sampling Resistors
I
D
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+
V
DS
-
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IRF1010N
Peak Diode Recovery dv/dt Test Circuit
D.U.T*
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
+
-
-
+
R
G
V
GS
• dv/dt controlled by R
G
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
+
V
DD
-
* Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
D =
P.W.
Period
VGS=10V
[ ] ***
D.U.T. ISDWaveform
Reverse
Recovery
Current
Re-Applied
Voltage
D.U.T. VDSWaveform
Inductor Curent
*** V
= 5.0V for Logic Level and 3V Drive Devices
GS
Fig 14. For N-channel HEXFET
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple ≤ 5%
®
power MOSFETs
V
DD
[ ]
I
[ ]
SD
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IRF1010N
A
Package Outline
TO-220AB
Dimensions are shown in millimeters (inches)
10.54 (.415)
2.87 (.113)
2.62 (.103)
15.24 (.600)
14.84 (.584)
14.09 (.555)
13.47 (.530)
10.29 (.405)
1 2 3
6.47 (.255)
6.10 (.240)
4
1.15 (.045)
MIN
4.06 (.160)
3.55 (.140)
3.78 (.149)
3.54 (.139)
- A -
4.69 (.185)
4.20 (.165)
- B -
1.32 (.052)
1.22 (.048)
LEAD ASSIGNMENTS
1 - G A TE
2 - D R A IN
3 - SOURCE
4 - D R A IN
1.40 (.055)
3X
1.15 (.045)
2.54 (.100)
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
2 CON TR O LL ING D IME N S IO N : INC H 4 H E ATS INK & L E A D M E A S U R E M E N T S DO N OT INCLUDE BURRS.
2X
Part Marking Information
TO-220AB
EXAMPLE : THIS IS AN IRF1010
WITH ASSEMBLY
LOT CODE 9B1 M
This product has been designed and qualified for the automotive [Q101] market.
0.93 (.037)
3X
0.69 (.027)
0.36 (.014) M B A M
INT ER NA TIONA L
R E C T IF IE R
LOG O
AS SEMBLY
LOT CODE
Data and specifications subject to change without notice.
0.55 (.022)
3X
0.46 (.018)
2.92 (.115)
2.64 (.104)
PART NUMBER
IRF1010
9246
9B 1M
DATE CODE
(YYW W)
YY = YEAR
WW = WEEK
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 3/01
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