Page 1
Philips Semiconductors Product specification
PowerMOS transistor IRF730
Avalanche energy rated
FEATURES SYMBOL QUICK REFERENCE DATA
• Repetitive Avalanche Rated
• Fast switching V
d
= 400 V
DSS
• High thermal cycling performance
• Low thermal resistance I
g
s
= 7.2 A
D
R
DS(ON)
≤ 1 Ω
GENERAL DESCRIPTION PINNING SOT78 (TO220AB)
N-channel, enhancement mode PIN DESCRIPTION
field-effect power transistor,
intendedforuse in off-line switched 1 gate
mode power supplies, T.V. and
computer monitor power supplies, 2 drain
d.c.tod.c.converters,motorcontrol
circuits and general purpose 3 source
switching applications.
tab drain
The IRF730 is supplied in the
SOT78 (TO220AB) conventional
leaded package.
tab
123
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DSS
V
DGR
V
GS
I
D
I
DM
P
D
Tj, T
Drain-source voltage Tj = 25 ˚C to 150˚C - 400 V
Drain-gate voltage Tj = 25 ˚C to 150˚C; RGS = 20 kΩ - 400 V
Gate-source voltage - ± 30 V
Continuous drain current Tmb = 25 ˚C; VGS = 10 V - 7.2 A
Tmb = 100 ˚C; VGS = 10 V - 4.6 A
Pulsed drain current Tmb = 25 ˚C - 29 A
Total dissipation Tmb = 25 ˚C - 125 W
Operating junction and - 55 150 ˚C
stg
storage temperature range
AVALANCHE ENERGY LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
E
AS
E
AR
IAS, I
1 pulse width and repetition rate limited by Tj max.
March 1999 1 Rev 1.000
Non-repetitive avalanche Unclamped inductive load, IAS = 4.8 A; - 290 mJ
energy tp = 0.23 ms; Tj prior to avalanche = 25˚C;
VDD ≤ 50 V; RGS = 50 Ω ; VGS = 10 V; refer
to fig:17
Repetitive avalanche energy1IAR = 7.2 A; tp = 2.5 µ s; Tj prior to - 9.4 mJ
avalanche = 25˚C; RGS = 50 Ω ; VGS = 10 V;
refer to fig:18
Repetitive and non-repetitive - 7.2 A
AR
avalanche current
Page 2
Philips Semiconductors Product specification
PowerMOS transistor IRF730
Avalanche energy rated
THERMAL RESISTANCES
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
R
th j-mb
R
th j-a
ELECTRICAL CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(BR)DSS
∆ V
(BR)DSS
∆ T
j
R
DS(ON)
V
GS(TO)
g
fs
I
DSS
I
GSS
Q
g(tot)
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
d
L
d
L
s
C
iss
C
oss
C
rss
Thermal resistance junction - - 1 K/W
to mounting base
Thermal resistance junction in free air - 60 - K/W
to ambient
Drain-source breakdown VGS = 0 V; ID = 0.25 mA 400 - - V
voltage
/ Drain-source breakdown VDS = VGS; ID = 0.25 mA - 0.1 - %/K
voltage temperature
coefficient
Drain-source on resistance VGS = 10 V; ID = 3.6 A - 0.7 1 Ω
Gate threshold voltage VDS = VGS; ID = 0.25 mA 2.0 3.0 4.0 V
Forward transconductance VDS = 30 V; ID = 3.6 A 2 4 - S
Drain-source leakage current VDS = 400 V; VGS = 0 V - 1 25 µ A
VDS = 320 V; VGS = 0 V; Tj = 125 ˚C - 30 250 µ A
Gate-source leakage current VGS = ± 30 V; VDS = 0 V - 10 200 nA
Total gate charge ID = 7.2 A; V
Gate-source charge - 3 5 nC
= 320 V; VGS = 10 V - 52 62 nC
DD
Gate-drain (Miller) charge - 26 30 nC
Turn-on delay time VDD = 200 V; RD = 27 Ω ; - 12 - ns
Turn-on rise time RG = 12 Ω -3 3-n s
Turn-off delay time - 93 - ns
Turn-off fall time - 42 - ns
Internal drain inductance Measured from tab to centre of die - 3.5 - nH
Internal drain inductance Measured from drain lead to centre of die - 4.5 - nH
Internal source inductance Measured from source lead to source - 7.5 - nH
bond pad
Input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 620 - pF
Output capacitance - 108 - pF
Feedback capacitance - 63 - pF
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
I
S
I
SM
V
SD
t
rr
Q
rr
March 1999 2 Rev 1.000
Continuous source current Tmb = 25˚C - - 7.2 A
(body diode)
Pulsed source current (body Tmb = 25˚C - - 29 A
diode)
Diode forward voltage IS = 7.2 A; VGS = 0 V - - 1.2 V
Reverse recovery time IS = 7.2 A; VGS = 0 V; dI/dt = 100 A/µ s - 270 - ns
Reverse recovery charge - 3.3 - µ C
Page 3
Philips Semiconductors Product specification
PowerMOS transistor IRF730
Avalanche energy rated
PD%
120
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140
Normalised Power Derating
Tmb / C
Fig.1. Normalised power dissipation.
PD% = 100⋅PD/P
ID%
120
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140
Tmb / C
= f(Tmb)
D 25 ˚C
Normalised Current Derating
Fig.2. Normalised continuous drain current.
ID% = 100⋅ID/I
= f(Tmb); conditions: VGS ≥ 10 V
D 25 ˚C
Zth j-mb, Transient thermal impedance (K/W)
1
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
single pulse
0.001
1us
10us 100us
1ms 1s
tp, pulse width (s)
P
D
10ms 100ms
PHP3N60
t
D =
p
T
t
t
p
T
Fig.4. Transient thermal impedance.
Z
= f(t); parameter D = tp/T
th j-mb
ID, Drain current (Amps)
20
Tj = 25 C
15
10
5
0
0 5 10 15 20 25 30
VDS, Drain-Source voltage (Volts)
PHP5N40
10 V
VGS = 4.5 V
Fig.5. Typical output characteristics
ID = f(VDS); parameter V
GS
7 V
6.5 V
6 V
5.5 V
5 V
.
7 V
GS
PHP5N40
10 V
.
ID, Drain current (Amps)
100
10
RDS(ON) = VDS/ID
1
DC
0.1
10 100 1000 10000
VDS, Drain-source voltage (Volts)
tp = 10 us
100 us
1 ms
10 ms
PHP3N50
Fig.3. Safe operating area. Tmb = 25 ˚C
ID & IDM = f(VDS); IDM single pulse; parameter t
RDS(on), Drain-Source on resistance (Ohms)
2.5
4.5 V
2
1.5
1
0.5
0
0 5 10 15 20
5.5 V
5 V
ID, Drain current (Amps)
VGS = 6 V Tj = 25 C
6.5 V
Fig.6. Typical on-state resistance
R
p
= f(ID); parameter V
DS(ON)
March 1999 3 Rev 1.000
Page 4
Philips Semiconductors Product specification
PowerMOS transistor IRF730
Avalanche energy rated
ID, Drain current (Amps)
20
VDS > ID x RDS(on)max
15
10
5
0
024681 0
VGS, Gate-Source voltage (Volts)
Tj = 25 C
PHP5N40
Tj = 150 C
Fig.7. Typical transfer characteristics.
ID = f(VGS); parameter T
gfs, Transconductance (S)
7
VDS > ID x RDS(on)max
6
5
4
3
Tj = 25 C
150 C
j
PHP5N40
VGS(TO) / V
4
3
2
1
0
-60 -40 -20 0 20 40 60 80 100 120 140
max.
typ.
min.
Tj / C
Fig.10. Gate threshold voltage
V
= f(Tj); conditions: ID = 0.25 mA; VDS = V
GS(TO)
1E-01
1E-02
1E-03
1E-04
ID / A
SUB-THRESHOLD CONDUCTION
2 %
typ
.
GS
98 %
2
1
0
0 5 10 15 20
Fig.8. Typical transconductance
a
2
1
0
-60 -40 -20 0 20 40 60 80 100 120 140
ID, Drain current (A)
gfs = f(ID); parameter T
Normalised RDS(ON) = f(Tj)
Tj / C
.
j
Fig.9. Normalised drain-source on-state resistance.
a = R
DS(ON)/RDS(ON)25 ˚C
= f(Tj); ID = 3.6 A; VGS = 10 V
1E-05
1E-06
0 1 2 3 4
VGS / V
Fig.11. Sub-threshold drain current.
ID = f(V
Junction capacitances (pF)
1000
100
10
1 10 100 1000
Fig.12. Typical capacitances, C
C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
; conditions: Tj = 25 ˚C; VDS = V
GS)
Ciss
Coss
Crss
VDS, Drain-Source voltage (Volts)
, C
iss
PHP5N40
oss
, C
GS
rss
.
March 1999 4 Rev 1.000
Page 5
Philips Semiconductors Product specification
PowerMOS transistor IRF730
Avalanche energy rated
VGS, Gate-Source voltage (Volts)
15
ID = 7.2 A
Tj = 25 C
10
5
0
0 1 02 03 04 05 06 07 08 0
Qg, Gate charge (nC)
240 V
80 V
PHP5N40
VDD = 320 V
Fig.13. Typical turn-on gate-charge characteristics.
V
= f(QG); parameter V
GS
Switching times (ns)
1000
VDD = 200 V
VGS = 10 V
RD = 27 Ohms
Tj = 25 C
100
td(off)
tf
tr
td(on)
10
0 1 02 03 04 05 06 0
RG, Gate resistance (Ohms)
Fig.14. Typical switching times; t
d(on)
DS
, tr, t
PHP5N40
, tf = f(RG)
d(off)
IF, Source-Drain diode current (Amps)
20
VGS = 0 V
15
10
150 C
5
0
0 0.2 0.4 0.6 0.8 1 1.2 1.4
VSDS, Source-Drain voltage (Volts)
Tj = 25 C
PHP5N40
Fig.16. Source-Drain diode characteristic.
IF = f(V
Non-repetitive Avalanche current, IAS (A)
10
Tj prior to avalanche = 125 C
1
VDS
tp
ID
0.1
1E-06 1E-05 1E-04 1E-03 1E-02
); parameter T
SDS
Avalanche time, tp (s)
j
25 C
PHP7N40E
Fig.17. Maximum permissible non-repetitive
avalanche current (IAS) versus avalanche time (tp);
unclamped inductive load
Normalised Drain-source breakdown voltage
1.15
V(BR)DSS @ Tj
V(BR)DSS @ 25 C
1.1
1.05
1
0.95
0.9
0.85
-100 -50 0 50 100 150
Tj, Junction temperature (C)
Fig.15. Normalised drain-source breakdown voltage
V
(BR)DSS/V(BR)DSS 25 ˚C
= f(Tj)
;
Maximum Repetitive Avalanche Current, IAR (A)
10
Tj prior to avalanche = 25 C
1
0.1
0.01
1E-06 1E-05 1E-04 1E-03 1E-02
125 C
PHP7N40E
Avalanche time, tp (s)
Fig.18. Maximum permissible repetitive avalanche
current (IAR) versus avalanche time (tp)
March 1999 5 Rev 1.000
Page 6
Philips Semiconductors Product specification
PowerMOS transistor IRF730
Avalanche energy rated
MECHANICAL DATA
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220 SOT78
A E
P
A
1
D
1
D
(1)
L
2
b
1
L
DIMENSIONS (mm are the original dimensions)
b
A
UNIT
mm
Note
1. Terminals in this zone are not tinned.
OUTLINE
VERSION
SOT78 TO-220
A
1
4.5
1.39
4.1
1.27
b
c
1
0.9
0.7
IEC JEDEC EIAJ
0.7
1.3
0.4
1.0
123
e
e
0 5 10 mm
D
D
1
15.8
6.4
15.2
5.9
REFERENCES
q
L
1
Q
L
2
max.
3.0
(1)
c
P
qQ
3.8
3.0
3.6
2.7
EUROPEAN
PROJECTION
2.6
2.2
ISSUE DATE
97-06-11
b
scale
e
10.3
9.7
E
2.54
15.0
13.5
L
L
1
3.30
2.79
Fig.19. SOT78 (TO220AB); pin 2 connected to mounting base (Net mass:2g)
Notes
1. This product is supplied in anti-static packaging. The gate-source input must be protected against static
discharge during transport or handling.
2. Refer to mounting instructions for SOT78 (TO220AB) package.
3. Epoxy meets UL94 V0 at 1/8".
March 1999 6 Rev 1.000
Page 7
Philips Semiconductors Product specification
PowerMOS transistor IRF730
Avalanche energy rated
DEFINITIONS
Data sheet status
Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V. 1999
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.
March 1999 7 Rev 1.000