Datasheet IMP1233MZ-55T, IMP1233MZ-5T, IMP1233MZ-3T Datasheet (IMP)

2000 © IMP, Inc. 408-432-9100/www.impweb.com 1

IMP1

IMP1

233M

233M

POWER MANAGEMENT

Key Features

Applications

◆ Set-top boxes

◆ Cellular phones

◆ PDAs

◆ Energy management systems

◆ Embedded control systems

◆ Printers

◆ Single board computers

◆

Improved Dallas DS1233M replacement
— 60% lower maximum supply current

◆

Low Supply Current
— 20µA maximum (5.5V)
— 15µA maximum (3.6V)

◆

Automatically restarts a microprocessor after
power failure

◆

350ms reset delay after VCCreturns to an
in-tolerance condition

◆

Active LOW power-up reset, 5kΩ internal pull-up

◆

Precision temperature-compensated voltage
reference and comparator

◆

Eliminates external components

◆

Pin function compatible with the Motorola
MC33064, MC34064, MC33164 and MC34164

◆

Motorola 68xxx and HC16 compatible

◆

Compact surface mount SO-8 package

◆

Operating temperature –40°C to +85°C

Block Diagram

–

+

1233M_01.eps

V

CC

RESET

GND

5.0k

W

Supply

Tolerance

Bias

IMP1233M

Delay

350ms Typical

Reference

Lo

Lo

w P

w Poowwerer

, 5V/3.0V

, 5V/3.0V µµ

P R

P R

eset

eset

– A

– A

ctiv

ctiv

e L

e LOOWW

, Open-Dr

, Open-Dr

ain Output

ain Output

– 350ms R

– 350ms R

eset P

eset Perer

iod

iod

The IMP1233M supply voltage monitor is an improved, low-power
replacement for the Dallas Semiconductor DS1233M. Maximum supply
current over temperature is a low 20µA, representing 60 percent lower
power as compared to the DS1233M.

The IMP1233M issues an active LOW reset signal whenever the moni­tored supply is out-of-tolerance. A precision reference and comparator
circuit monitor power supply (V

CC

) level. Tolerance level options are
5- and 10-percent for a 5V power supply. The tolerance is 15-percent for
the 3.3V, IMP1233M. When an out-of-tolerance condition is detected, an
internal power-fail signal is generated which forces an active LOW reset
signal. After V

CC

returns to an in-tolerance condition, the reset signal
remains active for 350ms to allow the power supply and system micro­processor to stabilize.

The IMP1233M is designed with a open-drain output stage and operates
over the extended industrial temperature range. Devices are available in
the compact surface mount SO-8 package.

Other low power products in this family include the IMP1810/11/12/15/
16/17 and IMP1233D.

Typical Application

IMP1233M

Microprocessor

RESET

RESET

1233M_02.eps

V

CC

GND

traP

egatloVTESER

)V(

emiTTESER

)sm(

tuptuO

egatS

TESER

ytiraloP

0181PMI021.4,073.4,026.4051lluP-hsuPWOL
1181PMI031.4,053.4,026.4051niarD-nepOWOL
2181PMI031.4,053.4,026.4051lluP-hsuPHGIH
5181PMI055.2,088.2,060.3051lluP-hsuPWOL
6181PMI055.2,088.2,060.3051niarD-nepOWOL
7181PMI055.2,088.2,060.3051lluP-hsuPHGIH

D3321PMI521.4,573.4,526.4053niarD-nepOWOL
M3321PMI027.2,573.4,526.4053niarD-nepOWOL

Family Selection Guide

IMP1

IMP1

233M

233M

2 408-432-9100/www.impweb.com 2000 © IMP, Inc.

!

Pin Configuration

Pin Descriptions

1233M_03.eps

4GND

3NC

2V

CC

1RESET

5NC

6NC

7NC

8NC

IMP1233M

Ordering Information

SO-8

yrammuSeciveD

**traP

rebmuN

TESER

tuptuO
egatloV

)V(

TESER

ecnareloT

)%(

TESER
emiT
)sm(

egatStuptuO

8-OS

egakcaP

TESER

ytiraloP

*niarD-nepOlluP-hsuP

T/55-SM3321PMI526.45053

""

WOL

T/5-SM3321PMI573.401053

""

WOL

T/3-SM3321PMI027.251053

""

WOL

k5lanretnI* Ω .pulluprotsiser

.leeRdnaepaTsetacidniT/**

spe.30t_M3321

srebmuNniP

emaNnoitcnuF

8-OS29-OT

11TESERtuptuoteserWOLevitcA
22V

CC

tupniylppusrewoP

8dna7,6,5,3 — CNnoitcennocoN

43DNGdnuorG

IMP1

IMP1

233M

233M

2000 © IMP, Inc. Microprocessor Supervisor 3

Notes: 1. A 1k

Ω

external resistor maybe required in some applications for proper operation of the microprocessor reset control circuit.

Absolute Maximum Ratings

Electrical Characteristics

Voltage on VCC . . . . . . . . . . . . . . . . . . . . . . . . –0.5V to 6.5V

Voltage on RESET . . . . . . . . . . . . . . . . . . . . . –0.5V to V

CC

+ 0.5V

Operating Temperature Range . . . . . . . . . . . –40°C to 85°C

Soldering Temperature . . . . . . . . . . . . . . . . . . 260°C for 10 seconds

Storage Temperature . . . . . . . . . . . . . . . . . . . –55°C to 125°C

Voltages measured with respect to ground.
These are stress ratings only and functional operation is not implied.

Parameter Symbol Conditions Min Typ Max Units

Supply Voltage V

CC

1.2 5.5 V

Output Voltage V

OH

I

OUT

< 500µAV

CC

– 0.5V VCC– 0.1V V

Output Current I

OL

Output = 0.4V, VCC≥ 2.7V +8 mA

Operating Current I

CC

VCC< 5.5V, RESET output open 8 20 µA

Operating Current I

CC

VCC≤ 3.6V, RESET output open 6 15 µA

VCCTrip Point (IMP1233M-5) V

CCTP

4.25 4.375 4.49 V

VCCTrip Point (IMP1233M-55) V

CCTP

4.5 4.625 4.75 V

VCCTrip Point (IMP1233M-3) V

CCTP

2.64 2.72 2.8 V

Voltage High Trip Level V

HTL

4.75 V
IMP1233M-5
IMP1233M-55

Voltage Low Trip Level V

LTL

4.00 V
IMP1233M-5

IMP1233M-55

Voltage High Trip Level V

HTL

3.14 V
IMP1233M-3

Voltage Low Trip Level V

LTL

2.48 V
IMP1233M-3

Internal Pull-Up Resistor R

P

3.5 5.0 7.5 kΩ

Output Capacitance C

OUT

10 pF

VCCDetect to RESET Low t

RPD

210µs

V

CC

Slew Rate t

F

300 µs

(V

HTL

- V

LTL

)

VCCSlew Rate t

R

0ns

(V

LTL

- V

HTL

)

VCCDetect to RESET High t

RPU

tR= 5µs 200 350 500 ms

Unless otherwise noted, VCC= 1.2V to 5.5V and specifications are over the operating temperature range of –40°C to +85°C.
All voltages are referenced to ground.

IMP1

IMP1

233M

233M

4 408-432-9100/www.impweb.com 2000 © IMP, Inc.

!

Operation – Power Monitor

The IMP1233M detects out-of-tolerance power supply conditions.
It resets a processor during power-up and issues a reset to the
system processor when the monitored power supply voltage
is below the reset threshold (power-down). When an out-of­tolerance V

CC

voltage is detected, the RESET signal is asserted. On
power-up, RESET is kept active (LOW) for approximately 350ms
after the power supply voltage has reached the selected tolerance.
This allows the power supply and microprocessor to stabilize
before RESET is released.

Figure 1. Timing Diagram: Power-Up

Figure 2. Timing Diagram: Power-Down

V

HTL

V

CCTP

V

LTL

V

CC

RESET

t

R

t

RPU

V

OH

1233M_05.eps

V

HTL

V

CCTP

V

LTL

V

CC

RESET

t

F

V

OL

t

RPD

1233M_06.eps

Application Information

IMP1

IMP1

233M

233M

2000 © IMP, Inc. Microprocessor Supervisor 5

Absolute Maximum Ratings

Plastic SO-8 (8-Pin)

L

0°– 8°

C

H

E

e

D

B

A1

A

SO (8-Pin).eps

sehcnIsretemilliM

niMxaMniMxaM

)niP-8(8-OScitsalP

A350.0960.053.157.1

1A400.0010.001.052.0
B310.0020.033.015.0
C700.0010.091.052.0

e050.072.1
E051.0751.008.300.4
H822.0442.008.502.6

L610.0050.004.072.1
D981.0791.008.400.2

spe.5t_M3321

IMP, Inc.
Corporate Headquarters
2830 N. First Street
San Jose, CA 95134-2071
Tel: [phone]
Tel: [phone]
Fax: [phone]
e-mail: [e-mail]
http://www.impweb.com

The IMP logo is a registered trademark of IMP, Inc.

All other company and product names are trademarks of their respective owners.

2000 ©IMP, Inc.
Printed in USA
Publication #: 1013
Revision: B
Issue Date: 06/01/00
Type: Preliminary

IMP1

IMP1

233M

233M