Page 1
OTP CMOS 256K×8-Bit EPROM
Features
•
Operating voltage: +3.3V
•
Programming voltage
–
VPP=12.5V±0.2V
–
VCC=6.0V±0.2V
•
High-reliability CMOS technology
•
Latch-up immunity to 100mA from -1.0V to
V
+1.0V
CC
•
CMOS and TTL compatible I/O
•
Low power consumption
–
Active: 15mA max.
–
Standby: 1µA typ.
•
256K×8-bit organization
General Description
The HT27LC020 chip family is a low-power,
2048K (2,097,152) bit, +3.3V electrically onetime programmable (OTP ) rea d-only me morie s
(EPROM). Organized into 256K words with 8
bits per word, it features a fast singl e address
location programming, typically at 75
byte. Any byte can be accessed in less than
µs per
HT27LC020
•
Fast read access time: -120ns
•
Fast programming algorithm
•
Programming time 75µs typ.
•
Commercial and industrial temperature range
•
Two line controls (OE and CE)
•
Standard product identification code
•
Package type
–
32-pin DIP/SOP
–
32-pin PLCC
•
Commercial temperature ranges
(0
°C to +70°C)
120ns with respect to Spec. This eliminates the
need for WAIT states in high-performance microprocessor systems. The HT27LC020 has
separate Output Enable (
(
CE) controls which eliminate bus contention
issues.
OE) and Chip Enable
Block Diagram
1 7th May ’99
Page 2
Pin Assignment
Pin Description
HT27LC020
Pin Name I/O/C/P Description
A0~A17 I Address input s
DQ0~DQ7 I/O Data inputs/outputs
CE C Chip enable
OE C Output enable
PGM C Program strobe
NC — No connection
VPP P Program voltage supply
2 7th May ’99
Page 3
HT27LC020
Absolu te Maximum Ra tin g
Operation Temperature Commercial ...................................................................................0°C to +70°C
Storage Temperature.................................... .... .... .... .... .... .... .... .... .... .... .... .... .... .... .... .... .... .–65
Applied VCC Voltage with Respect to GND.................... .. .. .................... .. .. .................... .. . –0.6V to 7.0V
Applied Voltage on Input Pin with Respect to GND ......................................................... –0.6V to 7.0V
Applied Voltage on Output Pin with Respect to GND ............................. .. .. .. .. .. .. .. .. –0.6V to V
Applied Voltage on A9 Pin with Respect to GND..................................................... ...... . –0.6V to 13.5V
Applied VPP Voltage with Respect to GND............................................................ .... .... ..–0.6V to 13.5V
Applied READ V o ltage (Functionality is guaranteed between these limits) .................+3.0V to +3.6V
Note: These are stress ratings only. Stresses exceeding the range specified under “Absolute M axi-
mum Ratings” may cause substantial damage to the device. Functional operation of this device
at other conditions beyond those listed in the specification is not implied and prolonged
exposure to extreme condition s may affect device reliability.
D.C. Characteristics
Read operation
Symbol Parameter
V
V
V
V
I
LI
I
LO
I
CC
I
SB1
I
SB2
I
PP
Output High Level 3.3V IOH=–0.4mA 2.4 — — V
OH
Output Low Level 3.3V IOL=2.0mA — — 0.45 V
OL
Input High Level 3.3V — 2.0 — VCC+0.5 V
IH
Input Low Level 3.3V — –0.3 — 0.8 V
IL
Input Leakage Current 3.3V VIN=0 to 3.6V –5 — 5 µA
Output Leakage Current 3.3V V
VCC Active Current 3.3V
Standby Current (CMOS) 3.3V CE=V
Standby Current (TTL) 3.3V CE=V
VPP Read/Standby Current 3.3V CE=OE=VIL, VPP=V
Test Conditions
V
CC
OUT
CE=VIL, f=5MHz,
I
OUT
Conditions
Min. Typ. Max. Unit
=0 to 3.6V –10 — 10 µA
=0mA
±0.3V — — 10 µA
CC
IH
—— 15 mA
— — 0.6 mA
—— 100 µA
CC
°C to 125°C
+0.5V
CC
3 7th May ’99
Page 4
Programming operation
Symbol Parameter
V
OH
V
OL
V
IH
V
IL
I
LI
V
H
I
CC
I
PP
Output High Level 6V IOH=–0.4mA 2.4 — — V
Output Low Level 6V IOL=2.0mA — — 0.45 V
Input High Level 6V — 0.7V
Input Low Level 6V — –0.5 — 0.8 V
Input Load Current 6V VIN=VIL, V
A9 Product ID Voltage 6V — 11.5 — 12.5 V
VCC Supply Current 6V — — — 40 mA
VPP Supply Current 6V CE=V
Capacitance
Symbol Parameter
C
C
C
IN
OUT
VPP
Input Capacitance 3.3V VIN=0V — 8 12 pF
Output Capacitance 3.3V V
VPP Capacitance 3.3V VPP=0V — 18 25 pF
Test Conditions
V
CC
Conditions
Test Conditions
V
CC
HT27LC020
Min. T yp. Max. Unit
—VCC+0.5 V
CC
IH
IL
Conditions
=0V — 8 12 pF
OUT
— — 5.0 µA
——10mA
Min. Typ. Max. Unit
A.C. Characteristics
Read operation
Symbol Parameter
t
ACC
t
CE
t
OE
t
DF
t
OH
Address to Output Delay 3.3V CE=OE=V
Chip Enable to Output Delay 3.3V OE=V
Output Enable to Outpu t Delay 3.3V CE=V
CE or OE High to Output Float,
Whichever Occurred First
Output Hold from Address, CE or
OE, Whichever Occurred First
Test Conditions –120
V
CC
Conditions Min. Max.
IL
IL
IL
—120ns
—120ns
—45ns
Unit
3.3V — — 40 ns
3.3V — 0 — ns
4 7th May ’99
Page 5
HT27LC020
Programming operation Ta=+25°C±5°C
Symbol Parameter
t
AS
t
OES
t
DS
t
AH
t
DH
t
DFP
t
VPS
t
PW
t
VCS
t
CES
t
OE
t
PRT
Address Set up Time 6V — 2 — — µs
OE Setup Time 6V — 2 — — µs
Data Setup Time 6V — 2 — — µs
Address Hold Time 6V — 0 — — µs
Data Hold Time 6V — 2 — — µs
Output Enable to Output Float
Delay
VPP Setup Time 6V — 2 — — µs
PGM Program Pulse Width 6V — 30 75 105 µs
VCC Setup Time 6V — 2 — — µs
CE Setup Time 6V — 2 — — ns
Data Valid from OE 6V — — — 150 µs
VPP Pulse Rise Time Dur ing
Programming
Test waveforms and measurements
Test Conditions
V
CC
Conditions
Min. Typ. Max. Unit
6V — 0 — 130 ns
6V — 2 — —
µs
tR, tF< 20ns (10% to 90%)
Output test loa d
Note: CL=100pF including jig capacitance.
5 7th May ’99
Page 6
Product Identification Code
HT27LC020
Code
Pins
A0 A1 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
Hex
Data
Manufacturer 0 1 000111001C
Device Type 1 1 0000001002
Continuation
00011111117F
10011111117F
Functional Description
Operation mode
All the operation mo des are shown in the table following.
Mode CE OE PGM A0 A1 A9 VPP Output
Read V
Output Disable V
Standby (TTL) V
Standby (CMOS) V
CC
Program V
Program Verify V
Product Inhi bi t V
Manufacturer Code (3) V
Device Code (3) V
IL
IL
IH
± 0.3V X X X X X V
IL
IL
IH
IL
IL
V
V
X (2) X X X V
IL
IH
XXXXVCCHigh Z
CC
Dout
XXXX XVCCHigh Z
High Z
CC
V
V
IH
IL
V
IL
V
IH
XXXVPPD
XXXVPPD
OUT
XXXX XVPPHigh Z
V
IL
V
IL
XVILV
XVIHV
IH
IH
VH (1) V
VH (1) V
CC
CC
1C
02
IN
Notes: (1) V
= 12.0V ± 0.5V
H
(2) X=Either V
IH
or V
IL
(3) For Manufacturer Code and Device Code, A1=VIH, When A1=VIL, both codes will read 7F
6 7th May ’99
Page 7
HT27LC020
Programming of t he HT27LC0 20
When the HT27LC020 is delivered, the chip has
all 2048K bits in the “ONE”, or HIGH state.
“ZEROs” are loaded into the HT27LC020
through programming.
The programming mode is entered when
12.5
±0.2V is applied to the VPP pin, OE is at V
and
CE and PGM are VIL. For programming, the
IH
data to be programmed is applied with 8 bits in
parallel to the data pins.
The programming flowchart in Figure 3
shows the fast interactive programming algorithm. The interacti ve al gor i th m reduces programming time by using 30
µs to 105µs
programming pulses and giving each address
only as many pulses as is necessary in order to
reliably program the data. After each pulse is
applied to a given address, the data in that
address is verified. If the data is not verified,
additional pulses are given until it is verified or
until the maximum number of pulses is
reached while sequencing through each address of the HT27LC020. This process is repeated while sequencing through each address
of the HT27LC020. This part of the programming algorithm is done at V
=6.0V to assure
CC
that each EPROM bit is programmed to a sufficiently high threshold voltage. This ensures
that all bits have sufficient margin. After the
final address is completed, the entire EPROM
memory is read at V
CC=VPP
=5.25±0.25V to ver-
ify the entire memory.
Program inhibi t mode
Programming of multiple HT27LC020 in parallel
with different data is also easily accomplished by
using the Program Inhibit Mode. Except for
CE,
all like inputs of the parallel HT27LC020 may be
common. A TTL low-level program pulse applied to
an HT27LC020
CE input with Vpp=12.5±0.2V,
PGM LOW, and OE HIGH will program that
HT27LC020. A high-level
CE input inhibits the
HT27LC020 from being programmed.
Program verify mode
Verification should be performed on the programmed bits to determi ne whether the y were
correctly programmed. T he verification should
be performed with
V
, and VPP at its programming voltage.
IH
,
Auto product identification
OE and CE at VIL, PGM at
The Auto Product Identification mode allows
the reading out of a binary code from an
EPROM that will identify its manufacturer and
the type. This mode is intended for programming to automatically match the device to be
programmed with its corresponding programming algorithm. This mod e is functional in the
25
°C±5°C ambient temperature range that is
required when programming the HT27LC020.
To activate this mode, the programming equip-
ment must force 12.0
±0.5V on the address line A9
of the HT27LC020. T wo identifier by tes may then
be sequenced from the device outputs by toggling
address line A0 from V
to VIH, when A1=VIH. All
IL
other address lines must be held at V
Auto Product Identification mode.
Byte 0 (A0=V
code, and byte 1 (A0=V
) represents the manufacture r
IL
), the device code. For
IH
HT27LC020, these two identifier bytes are given
in the Mode Select Table. All identifiers for the
manufacturer and device codes will possess odd
parity, with the MSB (DQ7) defined as the parity
bit. When A1=V
, the HT27LC020 will read out
IL
the binary code of 7F, continuation code, to signify
the unavailability of manufacturer ID codes.
Read mode
The HT27LC020 has two control functions, both
of which must be logically satisfie d in order to
obtain data at outputs. Chip Enable (
power control and should be used for device
selection. Output Enable (
OE) is the output control and should be used to gate data to the
output pins, independent of device selection.
Assuming that addresses are stable, address
access time (t
to output (t
(t
) after the falling edge of OE, assuming the
OE
) is equal to t he del ay fr om CE
ACC
). Data is available at the outputs
CE
CE has been LOW and addresses have been
stable for at least t
ACC–tOE
.
during
IH
CE) is the
7 7th May ’99
Page 8
HT27LC020
Standby mode
The HT27LC020 has CMOS standby mode
which reduces the maximum VCC current to
10
µA. It is placed in CMOS standby when CE is
at V
±0.3V. The HT27LC020 also has a TTL-
CC
standby mode which reduces the maximum
VCC current to 0.6mA. It is placed in TTLstandby when
CE is at VIH. When in standby
mode, the outputs are in a high-impedance
state, independent of the
Two-line output control function
OE input.
To accommodate multiple memory connections,
a two-line control functi on is provi ded to allow
for:
•
Low memory power dissipation
•
Assurance that output bus contention will not
occur
It is recommended that
CE be decoded an d used
as the primary device-selecti on functio n, while
OE be made a common connection to the READ
line from the system control bus. Th is assures
that all deselected me mo ry de vices are in the ir
low-power standby mode and that the output
pins are only active when data is desired from a
particular memory device.
System considerations
During the switch betwe en active and standby
conditions, transient current peaks are produced on th e rising and fall ing edges of Chip
Enable. T he magn itude o f these tra nsient current peaks is dependent on the output capacitance loading of the device. At a minimum, a
0.1
µF ceramic capacitor (high frequency, low
inherent inductance) should be used on each
device between VCC and VPP to minimize transient effects. In addition, to overco me the voltage drop cause d by the inductive effects of the
printed circuit board traces on EPR OM arrays,
a 4.7
µF bulk electrolytic capacitor should be
used between VCC and VPP for each eight devices. The location of the capacitor should be
close to where the power supply is connected to
the array.
8 7th May ’99
Page 9
Figure 1. A.C. waveforms for read operation
HT27LC020
Figure 2. Programming waveforms
9 7th May ’99
Page 10
HT27LC020
Figure 3. Fast programming flowchart
10 7th May ’99
Page 11
HT27LC020
Holtek Semiconductor Inc. (Headquarters)
No.3 Creation Rd. II, Science-based Industrial Park, Hsinchu, Taiwan, R.O.C.
Tel: 886-3-563-1999
Fax: 886-3-563-1189
Holtek Semiconductor Inc. (Taipei Office)
5F, No.576, Sec.7 Chung Hsiao E. Rd., Taipei, Taiwan, R.O.C.
Tel: 886-2-2782-9635
Fax: 886-2-2782-9636
Fax: 886-2-2782-7128 (International sales hotline)
Holtek Microelectronics Enterprises Ltd.
RM.711, Tower 2, Cheung Sha Wan Plaza, 833 Cheung Sha Wan Rd., Kowloon, Hong Kong
Tel: 852-2-745-8288
Fax: 852-2-742-8657
Copyright © 1999 by HOLTEK SEMICONDUCTOR INC.
The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek
assumes no responsibility arising from the use of the specif ications descri bed. The applications mentioned herein are
used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications
will be suitable without further modification, nor recommends the use of its products for appli cation that may present
a risk to human life due to malfunction or otherwise. Holtek reserves the right to alter its products without prior
notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw.
11 7th May ’99
Loading...