Page 1
Features
•
Operating voltage: 2.7V ~5.5V
•
Low power consumption
–
Operation: 25mA Max. (VCC=5V)
10mA Max. (V
–
Standby: 30µA Max. (VCC=5V)
10
•
Access time:150ns Max. (VCC=5V)
µA Max. (V
250ns Max. (V
CC
CC
=3V)
CC
=3V)
=3V)
General Description
The HT23C128 is a read-only memory with
high performance CMOS storage device whose
128K of memory is arrange d into 16384 wo rds
by 8 bits.
For applica tion flexibility, the chip enable and
output enabl e control pins can be selected a s
active high or active low. This flexibility not
only allows easy interface with most microproc-
HT23C128
CMOS 16K×8-Bit Mask ROM
•
16384×8 bits of mask ROM
•
Mask options: chip enable CE/CE/OE2/OE 2
and output enable OE/
OE1/NC
•
TTL compatible inputs and outputs
•
Tristate outputs
•
Fully static operation
•
Package type: 28-pin DIP/SOP
essors, but also eliminates bus contention in
multiple bus mi cropro cessor syste ms. An add itional feature of the HT23C128 is its ability to
enter the standb y mode wh enever the chip enable (CE/
CE) is inactive, thus reducing current
consumption to below 30
these functions makes the chip suitable for high
density low power memory applications.
OE/NC & OE1/
µA. The combination of
Block Diagram
1 24th Aug ’98
Page 2
Pin Assignment
Pin Description
Pin Name I/O Description
NC — No connection
A0~A13 I Address inputs
D0~D7 O Data outputs
VSS I Negative power supply
CE/
CE/OE2/OE2 I Chip enable/Output enable input
OE/
OE/NC I Output enable input
OE1/
OE1/NC I Output enable input
VCC I Positive power supply
HT23C128
Operation Truth Table
Mode CE/CE OE/OE OE1/OE1 A0~A13 D0~D7
Read H/L H/L H/L Valid Data Out
Deselect H/L L/H X X High Z
Deselect H/L X L/H X High Z
Standby L/H X X X High Z
Note: H=V
, L=VIL, X=VIH or V
IH
IL
2 24th Aug ’98
Page 3
HT23C128
Absolu te Maxim um Ratings *
Supply Voltage.................................–0.3V to 6V Storage Temperature.................–50°C to 125°C
Input Voltage........................–0.3V to V
*Note: These are stress ra tings on ly. Stresses exceeding the range specified under “Abso lute Maxi -
mum Ratings” ma y cause substantial damage to the device. Functional operation of this
device at other conditions beyond those listed in the specification is not implied and prolonged
exposure to extreme condition s may affect device reliability.
D.C. Characteristics
Supply voltage: 2.7V~3.6V Ta=–40°C to 85°C
+0.3V Operating Temperature...............–40°C to 85°C
CC
Symbol Parameter
V
CC
I
CC
V
IL
V
IH
V
OL
V
OH
I
LI
I
LO
I
STB1
I
STB2
C
IN
C
OUT
Operating Voltage — — 2.7 — 3.6 V
Operating Current 3V
Input Low Voltage 3 V — V
Input High Voltage 3V — 2.0 — V
Output Low Voltage 3V IOL=2.1mA — — 0.4 V
Output High Voltage 3V IOH=–0.4mA 2.4 — V
Input Leakage Current 3V VIN=0 to V
Output Leakage Current 3V V
Standby Current 3V
Standby Current 3V
Input Capacitance (See note) — f=1MHz — — 10 pF
Output Capacitance (See note) — f=1MHz — — 10 pF
Test Conditions
V
CC
Conditions
O/P Unload,
f=5MHz
OUT
CE=V
CE=V
≤0.2V
CE
CE≥VCC-0.2V
=0 to V
IL
IH
CC
Min. Typ. Max. Unit
——10mA
— 0.4 V
SS
——10µA
CC
——10µA
——500µA
——10
CC
CC
V
V
µA
Note: These parameters are periodically sampled but not 100% tested.
Supply voltage: 4.5V~5.5V Ta=–40°C to 85°C
Symbol Parameter
V
CC
I
CC
V
IL
V
IH
Operating Voltage — — 4.5 — 5.5 V
Operating Current 5V
Input Low Voltage 5 V — V
Input High Voltage 5V — 2.2 — V
Test Conditions
V
CC
Conditions
O/P Unload,
f=5MHz
Min. Typ. Max. Unit
——25mA
— 0.8 V
SS
V
CC
3 24th Aug ’98
Page 4
HT23C128
Symbol Parameter
V
OL
V
OH
I
LI
I
LO
I
STB1
I
STB2
C
IN
C
OUT
Output Low Voltage 5V IOL=3.2mA — — 0.4 V
Output High Voltage 5V IOH=–1mA 2.4 — V
Input Leakage Current 5V VIN=0 to V
Output Leakage Current 5V V
Standby Current 5V
Standby Current 5V
Input Capacitance (See note) — f=1MHz — — 10 pF
Output Capacitance (See note) — f=1MHz — — 10 pF
Test Conditions
V
CC
Conditions
OUT
CE=V
CE=V
≤0.2V
CE
CE≥VCC-0.2V
=0 to V
IL
IH
CC
Min. Typ. Max. Unit
——10µA
CC
——10µA
— — 1.5 mA
——30
CC
V
µA
Note: These parameters are periodically sampled but not 100% tested.
A.C. Characteristics Ta=–40°C to 85°C
=2.7V~3.6V VCC=4.5V~5.5V
V
Symbol Parameter
t
CYC
t
AA
t
ACE
t
AOE
t
OH
t
OD
t
OE
Cycle Time 250 — 150 — ns
Address Access Time — 250 — 150 ns
Chip Enable Access Time — 250 — 150 ns
Output Enable Access Time — 150 — 80 ns
Output Hold Time — — 10 — ns
Output Disable Time (See Note) — — — 70 ns
Output Enable Time (See Note) — — 10 — ns
CC
Min. Max. Min. Max.
Unit
Note: These parameters are periodically sampled but not 100% tested.
A.C. test conditions
Output load: see figure right
Input rise and fall time: 10ns
Input pulse levels : 0.4V to 2.4V
Input and output timing reference levels:
0.8V and 2.0V (V
1.5V (V
CC
=3V)
CC
=5V)
Output load circuit
4 24th Aug ’98
Page 5
Functional Description
The HT23C128 has two modes, namely data
read mode and standby mode, controlled by
CE/
CE/OE2/OE2, OE/OE/NC and OE1/OE1/NC
inputs.
•
Standby mode
The HT23C128 has lower current consumption,
controlled by the chip enable input (CE/
When a low/high level is applied to the CE/CEB
input regardless of the output enable
(OE/
OE/NC and OE 1/OE1/NC) states, the chip
will enter the standby mode.
CE).
•
Data read mode
When both the chip enable (CE/
and the output enable (OE/
OE1/
OE1/NC) are active, the ch ip is in data
read mode. Otherwise, active CE/
active OE/
deselect mode. The output will remain in Hi-Z
state.
OE/NC or OE1/OE1/NC result in
Timing Diagrams
•
Propagation delay due to address (CE/CE/OE2/OE2, OE/OE and OE1/OE1 are active)
HT23C128
CE/OE2/OE2)
OE/NC and
CE and in-
•
Propagation delay due to chip enable and output enable (address valid)
5 24th Aug ’98
Page 6
Characteristic Curves
HT23C128
6 24th Aug ’98
Page 7
HT23C128
7 24th Aug ’98
Page 8
HT23C128 MASK ROM ORDERING SHEET
Custom:
Input Medium:
EPROM DISK File (Mail Address: romfile@holtek.com.tw) OTHER
HT23C128
User No. Type/Ref. Name Q’ty Check Sum
Control Pin and Package Form Option:
(a) 28 Pi n T ype Pin 20:
Pin 22:
Pin 27:
(b) Package Form:
Companion User No.
Package Marking :
Delivery Date : Q’ty:
CUSTOM CONFIRMED BY :
(1) CE (2) CE (3) OE2 (4) OE2
(1) OE (2) OE (3) NC
(1) OE1 (2) OE1 (3) NC
(1) Chip Form (2) 28 DIP (3) 28 SOP
Memory Address
Start End
(NAME, DATE, POSITION & CO. CHOP)
HOLTEK CONFIRMED BY:
(SALES) (SALES MANAGER)
8 24th Aug ’98
Loading...