Datasheet HD74ACT107, HD74AC107 Datasheet (HIT)

HD74AC107/HD74ACT107

Dual JK Flip-Flop (with Separate Clear and Clock)

Description

The HD74AC107/HD74ACT107 dual JK master/slave flip-flops have a separate clock for each flip-flop.
Inputs to the master section are controlled by the clock pulse. The clock pulse also regulates the state of the
coupling transistors which connect the master and slave sections. The sequence of operation is as follows:

1) isolate slave from master; 2) enter information from J and K inputs to master; 3) disable J and K inputs;

4) transfer information from master to slave.

Features

• Outputs Source/Sink 24 mA

• HD74ACT107 has TTL-Compatible Inputs

Pin Arrangement

J

Q1

Q1

K

Q

Q

GND

1

1

2

3

4

1

5

2

6

2

7

(Top view)

14

13

12

11

10

V

CC

C

D1

CP

1

K

2

C

D2

CP

9

2

J

8

2

HD74AC107/HD74ACT107

Logic Symbol

Q

1

Q

1

38

= Pin14

V

CC

9

112

J

2

CP

K

Q

2

Q

2

C

D2

6

2

5

2

12

1

J

1

CP

1

4

K

1

C

D1

13 10

GND = Pin7

Pin Names

J1, J2, K1, K

CP1, CP
CD1, C

2

D2

Q1, Q2, Q1, Q 2Outputs

Data Inputs

2

Clock Pulse Inputs (Active Falling Edge)
Direct Clear Inputs (Active Low)

Truth Table

Inputs Outputs
@ t

n

JK Q

LL Qn
LH L
HL H
HH Qn

H : High Voltage Level
L : Low Voltage Level
t

: Bit time before clock pulse.

n

t

: Bit time after clock pulse.

n + 1

@ t

n + 1

2

Logic Diagram

HD74AC107/HD74ACT107

C

D

J

#CP

#CP

K

CP

#CP

CP

CP

CP

CP

#CP

CP

CP

DC Characteristics (unless otherwise specified)

Item Symbol Max Unit Condition

Maximum quiescent supply current I

Maximum quiescent supply current I

Maximum additional ICC/input
(HD74ACT107)

CC

CC

I

CCT

80 µAV

8.0 µAV

1.5 mA VIN = VCC – 2.1 V, VCC = 5.5 V

= VCC or ground, VCC = 5.5 V,

IN

Ta = Worst case

= VCC or ground, VCC = 5.5 V,

IN

Ta = 25°C

Ta = Worst case

Q

Q

3

HD74AC107/HD74ACT107

AC Characteristics: HD74AC107

Item Symbol V

Maximum clock f

max

Ta = +25°C
C

= 50 pF

L

(V)*1Min Typ Max Min Max Unit

CC

3.3 125 — — 100 — MHz

Ta = –40°C to +85°C
CL = 50 pF

frequency 5.0 150 — — 125 —
Propagation delay t

C

to Q or Q 5.0 1.0 7.5 10.0 1.0 11.0

P

Propagation delay t

C

to Q or Q 5.0 1.0 8.0 10.5 1.0 11.5

P

Propagation delay t

C

to Q 5.0 1.0 7.5 10.0 1.0 11.0

D

Propagation delay t

C

to Q 5.0 1.0 7.5 10.0 1.0 11.0

D

PLH

PHL

PLH

PHL

3.3 1.0 9.5 13.0 1.0 14.0 ns

3.3 1.0 10.0 13.5 1.0 14.5 ns

3.3 1.0 9.5 13.0 1.0 14.0 ns

3.3 1.0 9.5 13.0 1.0 14.0 ns

Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V

Voltage Range 5.0 is 5.0 V ± 0.5 V

Operating Requirements: HD74AC107

Ta = –40°C

Ta = +25°C
C

= 50 pF

L

Item Symbol V

Setup time t
J or k to C

P

Hold time t

C

to J or k 5.0 –0.5 0.0 0.0

P

Pulse width t

C

or C

P

D

Recovery time t

C

to C

D

P

su

h

w

rec

(V)*1Typ Guaranteed Minimum Unit

CC

3.3 3.0 5.5 6.0 ns

5.0 2.0 4.0 4.5

3.3 –1.5 0.0 0.0

3.3 2.0 5.5 7.5

5.0 2.0 4.5 5.0

3.3 –2.5 0.0 0.0

5.0 –1.5 0.0 0.0

Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V

Voltage Range 5.0 is 5.0 V ± 0.5 V

to +85°C
CL = 50 pF

4

AC Characteristics: HD74ACT107

HD74AC107/HD74ACT107

Ta = +25°C
C

L

Item Symbol V

Maximum clock

f

max

(V)*1Min Typ Max Min Max Unit

CC

5.0 100 — — 80 — MHz

frequency
Propagation delay

C

to Q or Q

P

Propagation delay

C

to Q or Q

P

Propagation delay

C

to Q

D

Propagation delay

C

to Q

D

t

PLH

t

PHL

t

PLH

t

PHL

5.0 1.0 9.5 12.5 1.0 13.5 ns

5.0 1.0 10.5 13.0 1.0 14.0

5.0 1.0 8.5 11.0 1.0 12.0

5.0 1.0 8.5 11.0 1.0 12.0

Note: 1. Voltage Range 5.0 is 5.0 V ± 0.5 V

Operating Requirements: HD74ACT107

Item Symbol V

Setup time
J or k to C

P

Hold time

C

to J or k

P

Pulse width

C

or C

P

D

Recovery time

C

to C

D

P

t

su

t

h

t

w

t

rec

Note: 1. Voltage Range 5.0 is 5.0 V ± 0.5 V

(V)*1Typ Guaranteed Minimum Unit

CC

5.0 2.5 7.0 8.0 ns

5.0 0.0 1.5 1.5

5.0 4.5 7.0 8.0

5.0 — 3.0 3.0

= 50 pF

Ta = +25°C
C

= 50 pF

L

Ta = –40°C to +85°C
CL = 50 pF

Ta = –40°C
to +85°C
CL = 50 pF

Capacitance

Item Symbol Typ Unit Condition

Input capacitance C
Power dissipation capacitance C

IN

PD

4.5 pF VCC = 5.5 V

35.0 pF VCC = 5.0 V

5

1

19.20

20.32 Max

1.30

Unit: mm

814

6.30

7.40 Max

7

2.54 ± 0.25

2.39 Max

0.48 ± 0.10

2.54 Min 5.06 Max

0.51 Min

Hitachi Code
JEDEC
EIAJ
Weight

7.62

+ 0.10

0.25

– 0.05

0° – 15°

(reference value)

DP-14
Conforms
Conforms

0.97 g

14

1.27

10.5 Max

1

10.06

1.42 Max

Unit: mm

8

5.5

7

+ 0.20

7.80

– 0.30

2.20 Max
*0.22 ± 0.05

1.15

0.20 ± 0.04
0° – 8°

0.70 ± 0.20

*0.42 ± 0.08

0.40 ± 0.06

*Dimension including the plating thickness

Base material dimension

0.12

0.10 ± 0.10

0.15

M

Hitachi Code
JEDEC
EIAJ

(reference value)

Weight

FP-14DA
—
Conforms

0.23 g

9.05 Max

14

Unit: mm

8.65

8

*Pd plating

1

0.635 Max

1.27

*0.40 ± 0.06

7

+ 0.11

0.25

3.95

– 0.04

0.14

0.15

1.75 Max

M

6.10

1.08

*0.20 ± 0.05

0.60

Hitachi Code
JEDEC
EIAJ
Weight

+ 0.10
– 0.30

0° – 8°

+ 0.67
– 0.20

(reference value)

FP-14DN
Conforms
Conforms

0.13 g

14 8

17

+0.08

*0.22

–0.07

0.20 ± 0.06

5.00

5.30 Max

0.83 Max

0.65

0.13

Unit: mm

4.40

1.0

M

6.40 ± 0.20

0.10

1.10 Max

*Dimension including the plating thickness

Base material dimension

0.15 ± 0.04

*0.17 ± 0.05

+0.03

–0.04

0.07

0° – 8°

Hitachi Code
JEDEC
EIAJ

(reference value)

Weight

0.50 ± 0.10

TTP-14D
—
—

0.05 g

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