Page 1
HD74AC670
4 × 4 Register File with 3-State Output
Description
The HD74AC670 contains 16 high speed, low power, transparent D-type latches arranged as four words of
four bits each, to function as a 4 × 4 register file. Separate read and write inputs, both address and enable,
allow simultaneous read and write operation. The 3-state outputs make it possible to connect up to 128
outputs to increase the word capacity up to 512 words. Any number of these devices can be operated in
parallel to generate an n-bit length.
Features
• 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
• Outputs Source/Sink 24 mA
Pin Arrangement
D
D3
D4
RA1
RA0
O4
O3
GND
1
2
2
3
4
5
6
7
8
(Top view)
16
15
14
13
12
11
10
CC
V
D1
WA0
WA1
WE
OE
1
O
9
O2
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HD74AC670
Logic Symbol
12 15 1 2 3
14
13
WE D
WA0
WA1
5
4
RA0
RA0
OE O1 O2 O3 O4
1 D2 D3 D4
11
10 9 7 6
VCC=Pin 16
GND=Pin 8
Pin Names
D1 to D
4
WA0, WA
WE Write Enable Input (Active Low)
RA0, RA
1
OE 3-State Output Enable Input (Active Low)
O1 to O
4
Data Inputs
Write Address Inputs
1
Read Address Inputs
Data Outputs
Write Function Table
Write Inputs
WE WA
L L L Word 0
L L H Word 1
L H L Word 2
L H H Word 3
H X X None (hold)
H : High Voltage Level
L : Low Voltage Level
X : Immaterial
2
1
WA
0
D Inputs to
Page 3
Read Function Table
Read Inputs
OE RA
L L L Word 0
L L H Word 1
L H L Word 2
L H H Word 3
H X X None (HIGH Z)
H : High Voltage Level
L : Low Voltage Level
X : Immaterial
1
RA
0
Outputs from
HD74AC670
3
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HD74AC670
Logic Diagram
WE
WA
WA0
Word
Word
Word
3
D1
0
1
2
D4
1
GD
Q
GD
Q
GD
Q
GD
Q
GD
Q
GD
Q
GD
Q
GD
Q
D3
GD
Q
GD
Q
GD
Q
GD
Q
D2
GD
Q
GD
Q
GD
Q
Word
GD
Q
RA1
OE
RA
0
O4
O3
O2
DC Characteristics (unless otherwise specified)
Item Symbol Max Unit Condition
Maximum quiescent supply current I
Maximum quiescent supply current I
CC
CC
80 µAV
8.0 µAV
= VCC or ground, VCC = 5.5 V,
IN
Ta = Worst case
= VCC or ground, VCC = 5.5 V,
IN
Ta = 25°C
O1
4
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AC Characteristics: HD74AC670
HD74AC670
Item Symbol V
Propagation delay t
W
to O
E
n
Propagation delay t
W
to O
E
n
Propagation delay t
RA1 or RA0 to O
n
Propagation delay t
RA1 or RA0 to O
n
Propagation delay t
Data to O
n
Propagation delay t
Data to O
n
Enable time t
OE to O
n
Enable time t
OE to O
n
Disable time t
OE to O
n
Disable time t
OE to O
n
PLH
PHL
PLH
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
(V)*1Min Typ Max Min Max Unit
CC
3.3 1.0 14.0 17.5 1.0 19.0 ns
5.0 1.0 11.5 13.5 1.0 15.0
3.3 1.0 13.5 17.0 1.0 18.5 ns
5.0 1.0 11.0 13.0 1.0 14.5
3.3 1.0 12.5 15.5 1.0 17.0 ns
5.0 1.0 10.0 12.0 1.0 13.0
3.3 1.0 12.5 15.5 1.0 17.0 ns
5.0 1.0 10.0 12.0 1.0 13.0
3.3 1.0 12.0 15.0 1.0 16.5 ns
5.0 1.0 9.5 11.5 1.0 12.5
3.3 1.0 11.5 14.5 1.0 16.0 ns
5.0 1.0 9.0 11.0 1.0 12.0
3.3 1.0 8.0 11.0 1.0 12.0 ns
5.0 1.0 6.0 8.5 1.0 9.5
3.3 1.0 10.0 12.0 1.0 13.0 ns
5.0 1.0 7.5 9.5 1.0 10.5
3.3 1.0 8.0 11.0 1.0 12.0 ns
5.0 1.0 6.0 8.5 1.0 9.5
3.3 1.0 9.0 11.5 1.0 12.5 ns
5.0 1.0 7.0 9.0 1.0 10.0
Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
Ta = +25°C
C
= 50 pF
L
Ta = –40°C to +85°C
CL = 50 pF
5
Page 6
HD74AC670
AC Operating Requirements: HD74AC670
Ta = –40°C
Ta = +25°C
C
= 50 pF
L
Item Symbol V
Setup time t
Data to W
E
su
(V)*1Typ Guaranteed Minimum Unit
CC
3.3 3.0 5.5 6.0 ns
5.0 2.0 4.0 4.5
Setup time 3.3 3.0 5.5 6.0 ns
WA1 or WA0 to W
Hold time t
W
to Data 5.0 2.5 4.0 4.0
E
E
h
5.0 2.0 4.5 4.5
3.3 3.0 4.0 4.0 ns
Hold time 3.3 3.0 4.0 4.0 ns
W
to WA1 or W
E
Pulse width t
W
E
Latch width t
W
to 1 5.0 0.5 10.0 10.0
E
A2
w
latch
5.0 2.5 4.0 4.0
3.3 3.5 5.5 7.0 ns
5.0 2.5 4.5 5.0
3.3 0.5 10.0 10.0 ns
Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
to +85°C
CL = 50 pF
Capacitance
Item Symbol Typ Unit Condition
Input capacitance C
Power dissipation capacitance C
IN
PD
4.5 pF VCC = 5.5 V
60 pF VCC = 5.0 V
6
Page 7
19.20
20.00 Max
16 9
1.3
Unit: mm
6.30
7.40 Max
81
1.11 Max
2.54 ± 0.25
0.48 ± 0.10
5.06 Max
2.54 Min
0.51 Min
Hitachi Code
JEDEC
EIAJ
Weight
7.62
+ 0.13
0.25
– 0.05
0° – 15°
(reference value)
DP-16
Conforms
Conforms
1.07 g
Page 8
16
Unit: mm
10.06
10.5 Max
9
5.5
1
0.80 Max
1.27
*0.42 ± 0.08
0.40 ± 0.06
*Dimension including the plating thickness
Base material dimension
8
0.12
0.10 ± 0.10
0.15
M
2.20 Max
7.80
0.20 ± 0.04
*0.22 ± 0.05
0.70 ± 0.20
Hitachi Code
JEDEC
EIAJ
(reference value)
Weight
+ 0.20
– 0.30
1.15
0° – 8°
FP-16DA
—
Conforms
0.24 g
Page 9
16
Unit: mm
9.9
10.3 Max
9
1
1.27
0.635 Max
*0.42 ± 0.08
0.40 ± 0.06
*Dimension including the plating thickness
Base material dimension
8
0.25
+ 0.11
– 0.04
0.14
0.15
3.95
1.75 Max
M
6.10
1.08
0.20 ± 0.03
*0.22 ± 0.03
+ 0.67
0.60
– 0.20
Hitachi Code
JEDEC
EIAJ
Weight
+ 0.10
– 0.30
0° – 8°
(reference value)
FP-16DN
Conforms
Conforms
0.15 g
Page 10
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
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Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan.
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