The HD74AC166/HD74ACT166 is an 8-bit, serial or parallel-in, serial-out shift register using edge
triggered D-type flip-flops. Serial and parallel entry are synchronous, with state changes initiated by the
rising edge of the clock. An asynchronous Master Reset overrides other inputs and clears all flip-flops.
The circuit can be clocked from two sources or one CP input can be used to trigger the other.
Features
• Outputs Source/Sink 24 mA
• HD74ACT166 has TTL-Compatible Inputs
Pin Arrangement
D
P0
P1
P2
P3
CP2
CP1
GND
1
S
2
3
4
5
6
7
8
(Top view)
16
15
14
13
12
11
10
CC
V
PE
7
P
Q7
P6
P5
P4
9
MR
Page 2
HD74AC166/HD74ACT166
Logic Symbol
15
234510 11 12 14
P
0
PE P
1 P2 P3 P4 P5 P6 P7
1
71
6
2
DS
CP
MR
913
V
CC=Pin16
GND=Pin8
7
Q
Pin Names
CP1, CP2Clock Pulse Inputs (Active Rising Edge)
D
S
Serial Data Input
PEParallel Enable Input (Active Low)
P0 to P
Parallel Data Inputs
7
MRAsynchronous Master Reset Input (Active Low)
Q
7
Last Stage Output
Functional Description
Operation is synchronous (except for Master Reset) and state changes are initiated by the rising edge of
either clock input if the other clock input is Low. When one of the clock inputs is used as an active High
clock inhibt, it should attain the High state while the other clock is still in the High state following the
previous operation. When the Parallel Enable (PE) input is Low, data is loaded into the register from the
Parallel Data (P0 to P7) inputs on the next rising edge of the clock. When PE is High, information is shifted
from the Serial Data (DS) input to Q0 and all data in the register is shifted one bit position (i.e., Q0 → Q1, Q
→ Q2, etc.) on the rising edge of the clock.
1
2
Page 3
HD74AC166/HD74ACT166
Truth Table
Inputs
ParallelInternal OutputsOutput
MRPECP
2
LXXXXXL LL
HXLLXXQA0Q
HL LXa ··· habh
HH LHXHQAnQ
HH LLXLQAnQ
HX HXXQA0Q
H :High Voltage Level
L :Low Voltage Level
X :Immaterial
: Low-to-High Clock Transition
Logic Diagram
CP
1
D
S
P0 to P
Q
7
0
Q
6
B0
B0
Q
7
Q
H0
Gn
Gn
Q
H0
P
0P1P2P3P4P5P6P7
RCP
C
D
S
S
Q
MRPED
RCPS
C
D
Q
Q
CP
12
7
3
Page 4
HD74AC166/HD74ACT166
DC Characteristics (unless otherwise specified)
ItemSymbol MaxUnitCondition
Maximum quiescent supply currentI
Maximum quiescent supply currentI
Maximum additional ICC/input
CC
CC
I
CCT
(HD74ACT166)
AC Characteristics: HD74AC166
80µAV
8.0µAV
1.5mAVIN = VCC – 2.1 V, VCC = 5.5 V,
= VCC or ground, VCC = 5.5 V,
IN
Ta = Worst case
= VCC or ground, VCC = 5.5 V,
IN
Ta = 25°C
Ta = Worst case
ItemSymbolV
Maximum clockf
max
Ta = +25°C
C
= 50 pF
L
(V)*1MinTypMaxMinMaxUnit
CC
3.375——65—MHz
Ta = –40°C to +85°C
CL = 50 pF
frequency5.0100——80—
Propagation delayt
CP1 or CP2 to Q
7
Propagation delayt
CP1 or CP2 to Q
7
Propagation delayt
MR to Q
7
PLH
PHL
PHL
3.31.011.014.51.015.5ns
5.01.09.511.51.012.5
3.31.010.514.01.015.0
5.01.09.011.01.012.0
3.31.09.512.01.013.0
5.01.06.59.01.010.0
Note:1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
4
Page 5
HD74AC166/HD74ACT166
AC Operating Requirements: HD74AC166
Ta = –40°C
Ta = +25°C
C
= 50 pF
L
ItemSymbolV
Setup timet
PE or Pn or DS to CP
n
Hold timet
CPn to PE or Pn or D
S
Pulse widtht
su
h
w
(V)*1TypGuaranteed MinimumUnit
CC
3.33.05.56.0ns
5.02.04.04.5
3.3–1.53.03.0
5.0–0.53.03.0
3.32.05.57.0
CPn or MR5.02.04.55.0
Recovery timet
MR to CP
n
rec
3.3–2.50.00.0
5.0–1.50.00.0
Note:1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
AC Characteristics: HD74ACT166
to +85°C
CL = 50 pF
ItemSymbolV
Maximum clock
f
max
(V)*1MinTypMaxMinMaxUnit
CC
5.0100——80—MHz
frequency
Propagation delay
CP
to Q
n
7
Propagation delay
CP
to Q
n
7
Propagation delay
MR to Q
7
t
PLH
t
PHL
t
PHL
5.01.010.012.51.013.5ns
5.01.09.512.01.013.0
5.01.08.511.01.012.0
Note:1. Voltage Range 5.0 is 5.0 V ± 0.5 V
Ta = +25°C
C
= 50 pF
L
Ta = –40°C to +85°C
CL = 50 pF
5
Page 6
HD74AC166/HD74ACT166
AC Operating Requirements: HD74ACT166
Ta = –40°C
Ta = +25°C
C
= 50 pF
L
ItemSymbolV
Setup time
PE or P
or DS to CP
n
n
Hold time
CP
to PE or Pn or D
n
S
Pulse width CPn or MRt
Recovery time MR to CP
t
su
t
h
w
t
n
rec
(V)*1TypGuaranteed MinimumUnit
CC
5.02.57.08.0ns
5.00.01.51.5
5.04.57.08.0
5.0–2.50.50.5
Note:1. Voltage Range 5.0 is 5.0 V ± 0.5 V
Capacitance
ItemSymbolTypUnitCondition
Input capacitanceC
Power dissipation capacitanceC
IN
PD
4.5pFVCC = 5.5 V
35.0pFVCC = 5.0 V
to +85°C
CL = 50 pF
6
Page 7
19.20
20.00 Max
169
1.3
Unit: mm
6.30
7.40 Max
81
1.11 Max
2.54 ± 0.25
0.48 ± 0.10
5.06 Max
2.54 Min
0.51 Min
Hitachi Code
JEDEC
EIAJ
Weight
7.62
+ 0.13
0.25
– 0.05
0° – 15°
(reference value)
DP-16
Conforms
Conforms
1.07 g
Page 8
16
Unit: mm
10.06
10.5 Max
9
5.5
1
0.80 Max
1.27
*0.42 ± 0.08
0.40 ± 0.06
*Dimension including the plating thickness
Base material dimension
8
0.12
0.10 ± 0.10
0.15
M
2.20 Max
7.80
0.20 ± 0.04
*0.22 ± 0.05
0.70 ± 0.20
Hitachi Code
JEDEC
EIAJ
(reference value)
Weight
+ 0.20
– 0.30
1.15
0° – 8°
FP-16DA
—
Conforms
0.24 g
Page 9
16
Unit: mm
9.9
10.3 Max
9
1
1.27
0.635 Max
*0.42 ± 0.08
0.40 ± 0.06
*Dimension including the plating thickness
Base material dimension
8
0.25
+ 0.11
– 0.04
0.14
0.15
3.95
1.75 Max
M
6.10
1.08
0.20 ± 0.03
*0.22 ± 0.03
+ 0.67
0.60
– 0.20
Hitachi Code
JEDEC
EIAJ
Weight
+ 0.10
– 0.30
0° – 8°
(reference value)
FP-16DN
Conforms
Conforms
0.15 g
Page 10
169
18
+ 0.08
*0.22
– 0.07
0.20 ± 0.06
5.00
5.30 Max
0.65 Max
0.65
0.13
Unit: mm
4.40
1.0
M
6.40 ± 0.20
0.10
1.10 Max
*Dimension including the plating thickness
Base material dimension
0.15 ± 0.04
*0.17 ± 0.05
+0.03
–0.04
0.07
0° – 8°
Hitachi Code
JEDEC
EIAJ
(reference value)
Weight
0.50 ± 0.10
TTP-16DA
—
—
0.05 g
Page 11
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
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Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan.
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