Datasheet HA-2556-883 Datasheet (Intersil Corporation)

Page 1
July 1994
HA2556/883
Wideband Four Quadrant Analog
Multiplier (Voltage Output)
Features
• High Speed Voltage Output. . . . . . . . . . . 450V/µs (Typ)
• Low Multiplication error . . . . . . . . . . . . . . . . 1.5% (Typ)
• Input Bias Currents . . . . . . . . . . . . . . . . . . . . . 8µA (Typ)
• Signal Input Feedthrough . . . . . . . . . . . . . . -50dB (Typ)
• Wide Y Channel Bandwidth . . . . . . . . . . . 57MHz (Typ)
• Wide X Channel Bandwidth . . . . . . . . . . . 52MHz (Typ)
• 0.1dB Gain Flatness (V
). . . . . . . . . . . . . . 5.0MHz (Typ)
Y
Applications
• Military Avionics
• Missile Guidance Systems
• Medical Imaging Displays
• Video Mixers
• Sonar AGC Processors
• Radar Signal Conditioning
• Voltage Controlled Amplifier
• Vector Generator
Description
The suitability for precision video applications is demonstrated further by the Y Channel 0.1dB gain flatness to 5.0MHz, 1.5% multiplication error, -50dB feedthrough and differential inputs with 8µA bias current. The HA-2556 also has low differential gain (0.1%) and phase (0.1
o
) errors.
The HA-2556/883 is well suited for AGC circuits as well as mixer applications for sonar, radar, and medical imaging equipment. The HA-2556/883 is not limited to multiplication applications only; frequency doubling, power detection, as well as many other configurations are possible.
Ordering Information
TEMPERATURE
PART NUMBER
HA1-2556/883 -55oC to +125oC 16 Lead CerDIP
RANGE PACKAGE
Pinout
Simplified Schematic
HA-2556/883
(CERDIP)
TOP VIEW
V
XIO
VX-
BIAS
B
+
-
8-7
GND
+
V
Y
REF
V
AV
YIO
16
V
1
GND
V
REF
V
YIO
V
YIO
V
V
V
OUT
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207
REF
2 3
B
4
A
5
+
Y
Y
6
-
Y
7
V-
8
X
+
-
Σ
Z
A
XIO
15
B
V
XIO
14
NC
13
+
V
X
V
12
-
X
V+
11 10
VZ-
9
+
V
Z
VX+
V
AV
XIO
| Copyright © Intersil Corporation 1999
VY-
YIO
V+
V
BIAS
+
V
Z
B
VZ-
V+
OUT
V-
Spec Number 511063-883
File Number 3619
Page 2
Specifications HA2556/883
Absolute Maximum Ratings Thermal Information
Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±40mA
ESD Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .< 2000V
Lead Temperature (Soldering 10s). . . . . . . . . . . . . . . . . . . . +300oC
Storage Temperature Range . . . . . . . . . . . . . .-65oCTA≤ +150oC
Max Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Operating Conditions
Operating Supply Voltage (±VS) . . . . . . . . . . . . . . . . . . . . . . . . . . ±15V Operating Temperature Range . . . . . . . . . . . . -55oC TA≤ +125oC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Tested at: V
PARAMETERS SYMBOL CONDITIONS
Multiplication Error ME VY, VX = ±5V 1 +25oC -3 3 %FS
Linearity Error LE4V VY, VX = ±4V 1 +25oC -0.5 0.5 %FS
Input Offset Voltage (VX)V
Input Bias Current (VX)I
Input Offset Current (VX)IIO (VX)VX = 0V, VY = 5V 1 +25oC-22µA
Common Mode (VX) Rejection Ratio
Power Supply (VX) Rejection Ratio
Input Offset Voltage (VY)V
Input Bias Current (VY)I
Input Offset Current (VY)IIO (VY)VY = 0V, VX = 5V 1 +25oC-22µA
Common Mode (VY) Rejection Ratio
Power Supply (VY) Rejection Ratio
= ±15V, RF = 50, RL = 1k, CL = 20pF, Unless Otherwise Specified.
SUPPLY
LE5V VY, VX = ±5V 1 +25oC -1 1 %FS
XIO
(VX)VX = 0V, VY = 5V 1 +25oC -15 15 µA
B
VY = ±5V 1 +25oC -15 15 mV
CMRR (VX)VXCM = ±10V
VY = 5V
+PSRR (VX)VCC = +12V to +17V
VY = 5V
-PSRR (VX)VEE = -12V to -17V VY= 5V
YIO
(VY)VY = 0V, VX = 5V 1 +25oC -15 15 µA
B
VX = ±5V 1 +25oC -15 15 mV
CMRR (VY)VYCM = +9V, -10V
VX = 5V
+PSRR (VY)VCC = +12V to +17V
VX = 5V
-PSRR (VY)VEE = -12V to -17V VX= 5V
Thermal Resistance θ
JA
CerDIP Package . . . . . . . . . . . . . . . . . . . 82oC/W 27oC/W
Maximum Package Power Dissipation at +75oC
CerDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.22W
Package Power Dissipation Derating Factor above +75oC
CerDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12mW/oC
GROUP A
SUBGROUPS TEMPERATURE
LIMITS
UNITSMIN MAX
2, 3 +125oC, -55oC -6 6 %FS
2, 3 +125oC, -55oC -25 25 mV
2, 3 +125oC, -55oC -25 25 µA
2, 3 +125oC, -55oC-33µA
1 +25oC65-dB
2, 3 +125oC, -55oC65-dB
1 +25oC65-dB
2, 3 +125oC, -55oC65-dB
1 +25oC45-dB
2, 3 +125oC, -55oC45-dB
2, 3 +125oC, -55oC -25 25 mV
2, 3 +125oC, -55oC -25 25 µA
2, 3 +125oC, -55oC-33µA
1 +25oC65-dB
2, 3 +125oC, -55oC65-dB
1 +25oC65-dB
2, 3 +125oC, -55oC65-dB
1 +25oC45-dB
2, 3 +125oC, -55oC45-dB
θ
JC
8-8
Spec Number 511063-883
Page 3
Specifications HA2556/883
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
Device Tested at: V
PARAMETERS SYMBOL CONDITIONS
Input Offset Voltage (VZ)V
Input Bias Current (VZ)I
Input Offset Current (VZ)IIO (VZ)VX= 0V, VY= 0V 1 +25oC-22µA
Common Mode (VZ) Rejection Ratio
Power Supply (VZ) Rejection Ratio
Output Current +I
Output Voltage Swing +V
Supply Current ±I
= ±15V, RF = 50, RL = 1k, CL = 20pF, Unless Otherwise Specified.
SUPPLY
GROUP A
SUBGROUPS TEMPERATURE
ZIO
VX = 0V, VY = 0V 1 +25oC -15 15 mV
2, 3 +125oC, -55oC -25 25 mV
(VZ)VX = 0V, VY = 0V 1 +25oC -15 15 µA
B
2, 3 +125oC, -55oC -25 25 µA
2, 3 +125oC, -55oC-33µA
CMRR (VZ)VZCM = ±10V
VX = 0V, VY = 0V
+PSRR (VZ)VCC = +12V to +17V
VX = 0V, VY = 0V
-PSRR (VZ)VEE = -12V to -17V VX= 0V, VY = 0V
V
OUT
= 5V, RL = 250 1 +25oC20-mA
OUT
1 +25oC65-dB
2, 3 +125oC, -55oC65-dB
1 +25oC65-dB
2, 3 +125oC, -55oC65-dB
1 +25oC45-dB
2, 3 +125oC, -55oC45-dB
2, 3 +125oC, -55oC20-mA
-I
OUT
V
= 5V, RL = 250 1 +25oC - -20 mA
OUT
2, 3 +125oC, -55oC - -20 mA
OUT
RL = 250 1 +25oC5-V
2, 3 +125oC, -55oC5-V
-V
OUT
RL = 250 1 +25oC - -5 V
2, 3 +125oC, -55oC - -5 V
CC
VX, VY = 0V 1 +25oC - 22 mA
2, 3 +125oC, -55oC - 22 mA
LIMITS
UNITSMIN MAX
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
Table 2 Intentionally Left Blank. See AC Specifications in Table 3.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Tested: at V
= ±15V, RF = 50, RL = 1k, CL = 20pF, Unless Otherwise Specified.
SUPPLY
PARAMETERS SYMBOL CONDITIONS NOTES TEMPERATURE
VY, VZ CHARACTERISTICS (NOTE 2) Bandwidth BW(VY) -3dB, VX = 5V,
VY≤ 200mV
P-P
Gain Flatness GF(VY) 0.1dB, VX = 5V,
AC Feedthrough V
ISO
VY≤ 200mV fO = 5MHz,
VY = 200mV
P-P
P-P
1 +25oC 30 - MHz
1 +25oC 4.0 - MHz
1, 3 +25oC - -45 dB
VX = Nulled
Rise and Fall Time TR, T
VY = 200mV Step,
F
VX = 5V, 10% to 90% pts
1 +25oC - 9.5 ns 1 +125oC, -55oC - 10 ns
8-9
LIMITS
UNITSMIN MAX
Spec Number 511063-883
Page 4
Specifications HA2556/883
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
Device Tested: at V
PARAMETERS SYMBOL CONDITIONS NOTES TEMPERATURE
Overshoot +OS, -OS VY = 200mV step,
Slew Rate +SR, -SR VY = 10V step,
Differential Input Resistance
VX CHARACTERISTICS Bandwidth BW (VX) -3dB, VY = 5V,
Gain Flatness GF (VX) 0.1dB, VY = 5V,
AC Feedthrough V
Rise & Fall Time TR, T
Overshoot +OS, -OS VX = 200mV step,
Slew Rate +SR, -SR VX = 10V step,
Differential Input Resistance
OUTPUT CHARACTERISTICS Output Resistance R
NOTES:
1. Parameters listed in Table 3 are controlled via design or process parameters and are not directly tested at final production. These param­eters are lab characterized upon initial design release, or upon design changes. These parameters are guaranteed by characterization based upon data from multiple production runs which reflect lot to lot and within lot variation.
2. VZ AC characteristics may be implied from VY due to the use of VZ as feedback in the test circuit.
3. Offset voltage applied to minimize feedthrough signal.
= ±15V, RF = 50, RL = 1k, CL = 20pF, Unless Otherwise Specified.
SUPPLY
1 +25oC - 35 %
VX = 5V
1 +125oC, -55oC - 50 % 1 +25oC 410 - V/µs
VX = 5V
1 +125oC, -55oC 360 - V/µs
RIN (VY)VY = ±5V, VX = 0V 1 +25oC 650 - k
1 +25oC 30 - MHz
VX≤ 200mV
P-P
1 +25oC 2.0 - MHz
ISO
VX≤ 200mV fO = 5MHz,
VX = 200mV
P-P
1, 3 +25oC--45dB
P-P
VY = Nulled VX = 200mV step,
F
VY = 5V, 10% to 90% pts
1 +25oC - 9.5 ns 1 +125oC, -55oC - 10 ns
1 +25oC - 35 %
VY = 5V
1 +125oC, -55oC - 50 % 1 +25oC 410 - V/µs
VY = 5V
1 +125oC, -55oC 360 - V/µs
RIN (VX)VX = ±5V, VY = 0V 1 +25oC 650 - k
OUT
VY = ±5V, VX = 5V
1 +25oC-1
RL = 1k to 250
LIMITS
UNITSMIN MAX
TABLE 4. ELECTRICAL TEST REQUIREMENTS
MIL-STD-883 TEST REQUIREMENTS SUBGROUPS (SEE TABLE 1)
Interim Electrical Parameters (Pre Burn-In) -
Final Electrical Test Parameters 1 (Note 1), 2, 3
Group A Test Requirements 1, 2, 3
Groups C and D Endpoints 1
NOTE:
1. PDA applies to Subgroup 1 only. No other subgroups are included in PDA.
8-10
Spec Number 511063-883
Page 5
Die Characteristics
DIE DIMENSIONS:
71mils x 100mils x 19mils ± 1mils
METALLIZATION:
Type: Al, 1% Cu Thickness: 16k
GLASSIVATION:
Type: Nitride (Si Silox Thickness: 12k Nitride Thickness: 3.5kÅ ± 1.5kÅ
TRANSISTOR COUNT: 84 SUBSTRATE POTENTIAL: V-
Å ±2kÅ
) over Silox (SiO2, 5% Phos)
3N4
Å ± 2kÅ
HA2556/883
WORST CASE CURRENT DENSITY:
0.47 x 105A/cm
2
Metallization Mask Layout
V
B (3)
YIO
V
A(4)
YIO
V
+(5)
Y
HA-2556/883
V
GND
REF
(2)
(1)
V
XIO
(16)
V
XIO
(15)
B
+(13)
V
X
-(12)
V
X
A
-(6)
V
Y
V+(11)
(7) V-
(8)
V
OUT
(9)
(10)
V
+
VZ-
Z
Spec Number 511063-883
8-11
Page 6
Test Waveforms
HA2556/883
LARGE AND SMALL SIGNAL RESPONSE TEST CIRCUIT
1 NC NC NC
VY+
-15V
2
3
4
5
6
7
8
LARGE SIGNAL RESPONSE SMALL SIGNAL RESPONSE
0ns 500ns 1µs
8
4
REF
+
-
50
16
NC
15
NC
14
NC
13
V
+
+
-
+
-
-
Σ
+
X
12 11
+15 V
VZ-
10
9
VZ+
1K
0ns 250ns 500ns
200
100
V
OUT
20pF
0
OUTPUT (V)
-4
= ±4V PULSE
V
X
= 5V
V
Y
-8
DC
Burn-In Circuit
0
OUTPUT (mV)
-100
-200
VY = ±100mV PULSE
= 5V
V
X
DC
2V/DIV; 100ns/DIV 50mV/DIV; 50ns/DIV
HA-2556/883 CERAMIC DIP
NC
16
NC
15 14
NC
+
V
13
+
-
12 11
+
10
-
-
Σ
+
9
VZ-
V
X
+15.5V ±0.5V
D2
+
Z
0.01µF
-15.5V
±0.5V
D1
V
Y
NC NC NC
+
0.01µF
V
OUT
1
REF
2 3 4 5
+
-
6 7 8
D1 = D2 = 1N4002 OR EQUIVALENT (PER BOARD)
8-12
Spec Number 511063-883
Page 7
HA2556/883
Packaging
c1
LEAD FINISH
-A-
-B-
S
bbb C A - B
BASE
PLANE
SEATING
PLANE
S1 b2
b
ccc C A - BMD
D
A
A
e
S
S
NOTES:
1. Index area: A notch or a pin one identification mark shall be locat­ed adjacent to pin one and shall be located within the shaded area shown. The manufacturer’s identification shall not be used as a pin one identification mark.
2. The maximum limits of lead dimensions b and c or M shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied.
3. Dimensions b1 and c1 apply to lead base metal only. Dimension M applies to lead plating and finish thickness.
4. Corner leads (1, N, N/2, and N/2+1) may be configured with a partial lead paddle. For this configuration dimension b3 replaces dimension b1.
5. This dimension allows for off-center lid, meniscus, and glass overrun.
6. Dimension Q shall be measured from the seating plane to the base plane.
7. Measure dimension S1 at all four corners.
8. N is the maximum number of terminal positions.
9. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
10. Controlling Dimension: Inch.
11. Lead Finish: Type A.
12. Materials: Compliant to MIL-I-38535.
-D­BASE
M
SECTION A-A
eA/2
METAL
b1
M
(b)
α
S
e
A
c
D
E
S
S
D
Q
A
-C­L
M
aaa C A - B
F16.3 MIL-STD-1835 GDIP1-T16 (D-2, CONFIGURATION A)
16 LEAD DUAL-IN-LINE FRIT-SEAL CERAMIC PACKAGE
(c)
SYMBOL
A - 0.200 - 5.08 -
b 0.014 0.026 0.36 0.66 2 b1 0.014 0.023 0.36 0.58 3 b2 0.045 0.065 1.14 1.65 ­b3 0.023 0.045 0.58 1.14 4
c 0.008 0.018 0.20 0.46 2
c1 0.008 0.015 0.20 0.38 3
D - 0.840 - 21.34 5
E 0.220 0.310 5.59 7.87 5
e 0.100 BSC 2.54 BSC ­eA 0.300 BSC 7.62 BSC -
S
eA/2 0.150 BSC 3.81 BSC -
L 0.125 0.200 3.18 5.08 -
Q 0.015 0.060 0.38 1.52 6 S1 0.005 - 0.13 - 7 S2 0.005 - 0.13 - -
α
aaa - 0.015 - 0.38 ­bbb - 0.030 - 0.76 -
ccc - 0.010 - 0.25 -
M - 0.0015 - 0.038 2
N16 168
INCHES MILLIMETERS
90
o
105
o
90
o
105
NOTESMIN MAX MIN MAX
o
-
8-13
Spec Number 511063-883
Page 8
Semiconductor
HA2556
DESIGN INFORMATION
August 1999
Wideband Four Quadrant
Analog Multiplier
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied.
Typical Performance Curves
X CHANNEL MULTIPLIER ERROR X CHANNEL MULTIPLIER ERROR
1
0.5 Y = 0
0
ERROR %FS
-0.5
-1
-6 -4 -2 0 2 4 6
Y = 4
Y = 1
Y = 3
Y = 2
Y = 5
X INPUT (V)
1.5 Y = -4
1
0.5
0
-0.5
ERROR %FS
-1
-1.5
-6 -4 -2 0 2 4 6
Y = -2 Y = -1
Y = 0
Y = -5
Y = -3
X INPUT (V)
Y CHANNEL MULTIPLIER ERROR Y CHANNEL MULTIPLIER ERROR
1.5 X = -3
1
X = -4
0.5
ERROR% FS
-0.5
X = -1 X = 0
0
X = -5
-1
-6 -4 -2 0 2 4 6
X = -2
Y INPUT (V)
1
0.5
0
-0.5
ERROR%FS
-1
-1.5
-6 -4 -2 0 2 4 6
X = 0
X = 5
X = 1
X = 2
X = 4
X = 3
Y INPUT (V)
Y CHANNEL FULL POWER BANDWIDTH Y CHANNEL FULL POWER BANDWIDTH
4 3
2 1
0
-1
GAIN (dB)
-2
-3
-4
Y CHANNEL = 10V X CHANNEL = 5V
P-P
DC
1M 10M100K10K
FREQUENCY (Hz)
-3dB AT 32.5MHz
GAIN (dB)
4 3 2 1 0
-1
-2
-3
-4
Y CHANNEL = 4V X CHANNEL = 5V
P-P DC
1M 10M100K10K
FREQUENCY (Hz)
8-14
Spec Number 511063-883
Page 9
HA2556
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied.
Typical Performance Curves
X CHANNEL FULL POWER BANDWIDTH X CHANNEL FULL POWER BANDWIDTH
X CHANNEL = 10V
4
Y CHANNEL = 5V
3 2 1 0
-1
GAIN (dB)
-2
-3
-4
Y CHANNEL BANDWIDTH vs X CHANNEL X CHANNEL BANDWIDTH vs Y CHANNEL
0
-6
P-P
DC
1M 10M100K10K
FREQUENCY (Hz)
VX = 5V
DC
(Continued)
4 3 2 1 0
GAIN (dB)
-1
-2
-3
-4
0
-6
X CHANNEL = 4V Y CHANNEL = 5V
VY = 5V
P-P DC
1M 10M100K10K
FREQUENCY (Hz)
DC
-12
GAIN (dB)
-18
-24
10K 100K
0
-10
-20
-30
-40
-50
-60
CMRR (dB)
-70
-80
VY = 2V
VX = 2V
DC
VX = 0.5V
DC
FREQUENCY (Hz)
VY = 200mV
10M 100M1M
P-P
-12
GAIN (dB)
-18
-24
10K 100K
DC
VY = 0.5V
DC
FREQUENCY (Hz)
Y CHANNEL CMRR vs FREQUENCY X CHANNEL CMRR vs FREQUENCY
0 VY+, VY- = 200mV VX = 5V
DC
RMS
1M 100M100K10K
FREQUENCY (Hz)
5MHz
-38.8dB
10M
CMRR (dB)
VX+, VX- = 200mV
-10 VY = 5V
-20
-30
-40
-50
-60
-70
-80
RMS
DC
1M 100M100K10K
FREQUENCY (Hz)
VX = 200mV
10M 100M1M
5MHz
-26.2dB
10M
P-P
8-15
Spec Number 511063-883
Page 10
HA2556
0
OFFSET
VOLTAGE
(
V)
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied.
Typical Performance Curves
(Continued)
FEEDTHROUGH vs FREQUENCY FEEDTRHOUGH vs FREQUENCY
0
VX = 200mV
-10 VY = NULLED
-20
-30
-40
-50
-60
-70
FEEDTHROUGH (dB)
-80
P-P
FREQUENCY (Hz)
-52.6dB at 5MHz
1M 100M100K10K
10M
OFFSET VOLTAGE vs TEMPERATURE INPUT BIAS CURRENT (VX, VY, VZ) vs TEMPERATURE
8
7
6
m
5
4
3
2
1
0
-100 -50 0 50 100 15
|VIOZ|
|VIOX|
|VIOY|
TEMPERATURE (oC)
0
VY = 200mV
-10 VX = NULLED
-20
-30
-40
-50
-60
-70
FEEDTHROUGH (dB)
-80
14 13 12 11 10
9 8 7
BIAS CURRENT (uA)
6 5 4
-100 -50 0 50 100 150
P-P
-49dB
at 5MHz
1M 100M100K10K
FREQUENCY (Hz)
TEMPERATURE (oC)
10M
SCALE FACTOR ERROR vs TEMPERATURE INPUT VOLTAGE RANGE vs SUPPLY VOLTAGE
2
1.5
1
0.5
0
-0.5
SCALE FACTOR ERROR (%)
-1
-100 -50 0 50 100 150 TEMPERATURE (oC)
6
5
X INPUT
4
3
2
INPUT VOLTAGE RANGE (V)
1
46810121416
Y INPUT
± SUPPLY VOLTAGE (V)
Spec Number 511063-883
8-16
Page 11
HA2556
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied.
Typical Performance Curves
(Continued)
INPUT COMMON MODE RANGE vs SUPPLY VOLTAGE SUPPLY CURRENT vs SUPPLY VOLTAGE
15
10
5
0
CMR (V)
-5
-10
-15
4 6 8 10121416
±SUPPLY VOLTAGE (V)
X INPUT
Y INPUT
X & Y INPUT
OUTPUT VOLTAGE vs R
5.0
4.8
25
20
I
CC
I
EE
15
10
5
SUPPLY CURRENT (mA)
0
0 5 10 15 20
LOAD
±SUPPLY VOLTAGE (V)
4.6
4.4
MAX OUTPUT VOLTAGE (V)
4.2
100 300 500 700 900 1100
Functional Block Diagram
VX+
+
-
-
V
X
1/SF
+
V
Y
+
-
-
V
Y
NOTE: The transfer equation for the HA-2556 is: (VX+ - VX-) (VY+ - VY-) = SF (VZ+ - VZ-), where SF = Scale Factor = 5V VX, VY, VZ = Differential Inputs
X
Y
R
LOAD
HA-2556
()
+
V
OUT
A
-
+
V
Z
Z
+
-
-
V
Z
8-17
Spec Number
511063-883
Page 12
HA2556
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied.
Applications Information
Operation at Reduced Supply Voltages
The HA-2556 will operate over a range of supply voltages, ±5V to ±15V. Use of supply voltages below ±12V will reduce input and output voltage ranges. See “Typical Performance Curves” for more information.
Offset Adjustment
X and Y channel offset voltages may be nulled by using a 20K potentiometer between the V
YIO
or V
adjust pin A
XIO
and B and connecting the wiper to V-. Reducing the channel offset voltage will reduce AC feedthrough and improve the multiplication error. Output offset voltage can also be nulled by connecting V
- to the wiper of a potentiometer which is
Z
tied between V+ and V-.
Capacitive Drive Capability
When driving capacitive loads >20pF a 50 resistor should be connected between V
and VZ+, using VZ+ as the out-
OUT
Theory of Operation
The HA-2556 creates an output voltage that is the product of the X and Y input voltages divided by a constant scale factor of 5V. The resulting output has the correct polarity in each of the four quadrants defined by the combinations of positive and negative X and Y inputs. The Z stage provides the means for negative feedback (in the multiplier configuration) and an input for summation into the output. This results in the following equation, where X, Y and Z are high imped­ance differential inputs
NC NC NC
+
V
Y
-15V
.
1
REF
2 3 4 5
+
-
6 7 8
50
16
NC
15
NC
14
NC
13
+
-
+
-
-
Σ
+
VX+ 12 11
+15 V
VZ-
10
9
V
+
Z
1K
V
OUT
20pF
To accomplish this the differential input voltages are first con­verted into differential currents by the X and Y input transcon­ductance stages. The currents are then scaled by a constant reference and combined in the multiplier core. The multiplier core is a basic Gilbert Cell that produces a differential output current proportional to the product of X and Y input signal cur­rents. This current becomes the output for the HA-2557.
The HA-2556 takes the output current of the core and feeds it to a transimpedance amplifier, that converts the current to a voltage. In the multiplier configuration, negative feedback is provided with the Z transconductance amplifier by con­necting V
to the Z input. The Z stage converts V
OUT
OUT
to a current which is subtracted from the multiplier core before being applied to the high gain transimpedance amp. The Z stage, by virtue of it’s similarity to the X and Y stages, also cancels second order errors introduced by the dependence of V
on collector current in the X and Y stages.
BE
pin. The
REF
scale factor is used to maintain the output of the multiplier within the normal operating range of ±5V when full scale inputs are applied.
The Balance Concept
The open loop transfer equation for the HA-2556 is:

V
X+VX-
V
OUT

A
--------------------------------------------------------------------------- VZ+VZ-–
where;
A = Output Amplifier Open Loop Gain V
, VY, VZ = Differential Input Voltages
X
5V = Fixed Scale Factor
An understanding of the transfer function can be gained by assuming that the open loop gain, A, of the output amplifier is infinite. With this assumption, any value of V generated with an infinitesimally small value for the terms within the brackets. Therefore we can write the equation:
V
()V
0
X+VX-
---------------------------------------------------------------- - V
which simplifies to:
V
()V
X+VX-

V
×
Y+VY-

5
()×
Y+VY-
5
()× 5V
Y+VY-

=

can be
OUT
()=
Z+VZ-
()=
Z+VZ-
FIGURE 1. DRIVING CAPACITIVE LOAD
V
OUT
XxY
---------- Z=
5
This form of the transfer equation provides a useful tool to analyze multiplier application circuits and will be called the Balance Concept.
Spec Number 511063-883
8-18
Page 13
HA2556
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied.
Let’s first examine the Balance Concept as it applies to the standard multiplier configuration (Figure 2).
Signals A and B are input to the multiplier and the signal W is the result. By substituting the signal values into the Bal­ance equation you get:
A
() B()× 5W()=
And solving for W:
AB
----------- -=
HA-2556
+
×
5
V
OUT
A
-
Z
+
V
Z
+
-
-
V
Z
W
W
A
B
VX+
V
X
VY+
V
Y
-
-
1/5V
+
-
X
Y
+
-
FIGURE 2. MULTIPLIER
Notice that the output (W) enters the equation in the feed­back to the Z stage. The Balance Equation does not test for stability, so remember that you must provide negative feed­back. In the multiplier configuration, the feedback path is connected to V
+ input, not VZ-. This is due to the inversion
Z
that takes place at the summing node just prior to the output amplifier. Feedback is not restricted to the Z stage, other feedback paths are possible as in the Divider Configuration shown in Figure 3.
VX+
+
-
V
X
1/5V
B
VY+
V
Y
+
-
HA-2556
-
X
+
-
Y
Z
-
V
OUT
A
+
V
Z
+
-
-
V
Z
W
A
Signals may be applied to more than one input at a time as in the Squaring configuration in Figure 4:
Here the Balance equation will appear as:
A
() A()× 5W()=
A
VX+
V
X
VY+
V
Y
­1/5V
-
HA-2556
+
-
X
+
-
Y
+
-
Z
V
OUT
A
+
V
Z
+
-
-
V
Z
W
FIGURE 4. SQUARE
Which simplifies to:
2
A
W
-----=
5
The last basic configuration is the Square Root as shown in Figure 5. Here feedback is provided to both X and Y inputs.
VX+
-
V
X
1/5V
+
V
Y
-
V
Y
FIGURE 5. SQUARE ROOT (FOR A > 0)
HA-2556
+
-
X
+
-
Y
+
-
Z
V
OUT
A
+
V
Z
+
-
V
-
Z
W
A
The Balance equation takes the form:
W() W()× 5A()=
Which equates to:
W5A=
FIGURE 3. DIVIDER
Inserting the signal values A, B and W into the Balance Equation for the divider configuration yields:
W() B()× 5V A()×=
Solving for W yields:
5A
W
-----=
B
Notice that, in the divider configuration, signal B must remain 0 (positive) for the feedback to be negative. If signal B is negative, then it will be multiplied by the V
input to produce
X-
positive feedback and the output will swing into the rail.
Application Circuits
The four basic configurations (Multiply, Divide, Square and Square Root) as well as variations of these basic circuits have many uses.
Frequency Doubler
For example, if ACos(ωτ) is substituted for signal A in the Square function, then it becomes a Frequency Doubler and the equation takes the form:
ACos ωτ()()ACos ωτ()()× 5W()=
And using some trigonometric identities gives the result:
2
A
-----
W
8-19
10
1Cos2ωτ()+()=
Spec Number 511063-883
Page 14
HA2556
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied.
Square Root
The Square Root function can serve as a precision/wide bandwidth compander for audio or video applications. A compander improves the Signal to Noise Ratio for your sys­tem by amplifying low level signals while attenuating or com­pressing large signals (refer to Figure 17; X provides for better low level signal immunity to noise during transmission. On the receiving end the original signal may be reconstructed with the standard Square function.
VX+
τ)
ACos(ω
Α
AUDIO
CCos(ω CARRIER
W
VX-
V
τ)
Y
C
V
Y
AC
------
Cos ω
10
1/5V
+
-
FIGURE 6. AM SIGNAL GENERATION
AM SIGNAL
CARRIER
LIKE THE FREQUENCY DOUBLER YOU GET AUDIO CENTERED AT DC AND 2F
VX+
VX-
1/5V
+
V
Y
-
V
Y
.
C
FIGURE 7. SYNCHRONOUS AM DETECTION
ACos(ωτ)
ACos(ωτ+φ)
VX+
VX-
1/5V
+
V
Y
-
V
Y
2
A
-----
W
10
DC COMPONENT IS PROPORTIONAL TO Cos(f).
FIGURE 8. PHASE DETECTION
HA-2556
+
-
X
+
Y
+
-
()τ Cos ω
A
HA-2556
+
-
X
Y
+
-
HA-2556
+
-
X
Y
+
-
Cos φ() Cos 2ωτ φ+()+()=
-
Z
+
-
Z
+
-
Z
0.5
curve). This
V
OUT
A
VZ+
+
-
V
-
Z
ω
+()τ+()=
C
V
OUT
A
+
V
Z
+
-
V
-
Z
V
OUT
A
+
V
Z
+
-
V
-
Z
W
A
W
W
Communications
The Multiplier configuration has applications in AM Signal Gener­ation, Synchronous AM Detection and Phase Detection to men­tion a few. These circuit configurations are shown in Figure 6, Figure 7 and Figure 8. The HA-2556 is particularly useful in applications that require high speed signals on all inputs.
Each input X, Y and Z has similar wide bandwidth and input characteristics. This is unlike earlier products where one input was dedicated to a slow moving control function as is required for Automatic Gain Control. The HA-2556 is versa­tile enough for both.
Although the X and Y inputs have similar AC characteristics, they are not the same. The designer should consider input parame­ters such as small signal bandwidth, ac feedthrough and 0.1dB gain flatness to get the most performance from the HA-2556. The Y channel is the faster of the two inputs with a small signal bandwidth of typically 57MHz verses 52MHz for the X channel. Therefore in AM Signal Generation, the best performance will be obtained with the Carrier applied to the Y channel and the modu­lation signal (lower frequency) applied to the X channel.
Scale Factor Control
The HA-2556 is able to operate over a wide supply voltage range ±5V to ±17.5V . The ±5V range is particularly useful in video appli­cations. At ±5V the input voltage range is reduced to ±1.4V. The output cannot reach its full scale value with this restricted input, so it may become necessary to modify the scale factor. Adjusting the scale factor may also be useful when the input signal itself is restricted to a small portion of the full scale level. Here we can make use of the high gain output amplifier by adding external gain resistors. Generating the maximum output possible for a given input signal will improve the Signal to Noise Ratio and Dynamic Range of the system. For example, let’s assume that the input signals are 1V the HA-2556 will be 200mV . (1V x 1V / (5V) = 200mV. It would be nice to have the output at the same full scale as our input, so let’s add a gain of 5 as shown in Figure 9.
A
B
VX+
+
-
-
V
X
1/5V
VY+
+
-
-
V
Y
ExternalGain
FIGURE 9. EXTERNAL GAIN OF 5
One caveat is that the output bandwidth will also drop by this factor of 5. The multiplier equation then becomes:
W
each. Then the maximum output for
PEAK
HA-2556
X
+
-
Y
R
------ 1+=
R
5AB
-------- - AB×==
5
Z
V
OUT
A
+
V
Z
+
-
-
V
F
Z
G
1k
R
F
250
R
G
W
8-20
Spec Number 511063-883
Page 15
HA2556
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied.
Current Output
NC
CONVERT
output impedance of typically 1M. The equation for I
and provides an
OUT
becomes:
AB×
----------- -
I
OUT
VX+
A
B
VX-
V
V
+
-
1/5V
+
Y
+
-
-
Y
HA-2556
X
Y
×=
5
+
-
Z
FIGURE 10. CURRENT OUTPUT
1
-------------------------- -
R
CONVERT
V
OUT
A
+
V
Z
+
-
V
-
Z
R
CONVERT
I
OUT
CH A CH B
A
B
5K
5K
V VY-
1
REF
2 3 4 5
+
-
6 7 8
50
Y
NC NC NC
+
-15V
FIGURE 11. VIDEO FADER
VX+
V
X
V
Y
V
Y
-
+
-
1/5V
+
-
+
-
HA-2556
X
Y Z
16
NC
15
NC
14
V
+
X
V
VZ-
V
Z
+
-
+15V
(0V to 5V)
+
+
V
Z
-
V
Z
MIX
V
OUT
W = 5(A2-B2)
5K
5K
13
+
-
12 11
+
10
-
-
Σ
+
9
A
+
-
Video Fader
The Video Fader circuit provides a unique function. Here Ch B is applied to the minus Z input in addition to the minus Y input. In this way, the function in Figure 11 is generated. V will control the percentage of Ch A and Ch B that are mixed together to produce a resulting video image or other signal.
The Balance equation looks like:
()ChA ChB()× 5V
V
MIX
OUT
Which simplifies to:
V
MIX
-----------
5
ChA ChB()+=
= Ch B and
OUT
When V
V
OUT
is 0V the equation becomes V
MIX
ChB
Ch A is removed, conversely when VMIX is 5V the equation becomes V
= Ch A eliminating Ch B. For VMIX values 0V
OUT
VMIX 5V the output is a blend of Ch A and Ch B.
MIX
ChB()=
FIGURE 12. DIFFERENCE OF SQUARES
95K
R2
R1 5K
A
V
VX+
VY+
V
Y
-
X
1/5V
-
HA-2556
+
-
X
+
-
Y
+
-
Z
V
OUT
A
+
V
Z
+
-
V
-
Z
W = 100
A - B
B
R1 and R2 set scale to 1V/%, other scale factors possible for A 0V.
FIGURE 13. PERCENTAGE DEVIATION
5K 5K
V
VX+
VY+
V
-
X
1/5V
-
Y
HA-2556
+
-
X
+
-
Y
+
-
Z
V
OUT
A
+
V
Z
+
-
-
V
Z
W = 10
A - B B + A
B A
A
FIGURE 14. DIFFERENCE DIVIDED BY SUM (FOR A + B0V)
Spec Number 511063-883
8-21
Page 16
HA2556
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied.
Other Applications
Of course the HA-2556 is also well suited to standard multi­plier applications such as Automatic Gain Control and Volt­age Controlled Amplifier.
Automatic Gain Control
Figure 15 shows the HA-2556 configured in an Automatic Gain Control or AGC application. The HA-5127 low noise amplifier provides the gain control signal to the X input. This control signal sets the peak output voltage of the multiplier to match the preset reference level. The feedback network around the HA-5127 provides a response time adjustment. High frequency changes in the peak are rejected as noise or the desired signal to be transmitted. These signals do not indicate a change in the average peak value and therefore no gain adjustment is needed. Lower frequency changes in the peak value are given a gain of -1 for feedback to the control input. At DC the circuit is an integrator automatically compensating for Offset and other constant error terms.
This multiplier has the advantage over other AGC circuits, in that the signal bandwidth is not affected by the control signal gain adjustment.
HA-2556
+
-
Σ
10k
X
Z
0.01µF
-
+
HA-5127
16 15 14 13 12 11 10
9
0.1µF
NC NC NC
+V
5.6V
V
OUT
1N914
5k
20k
NC NC NC
VY+
-V
10k
+15V
1
REF
2 3 4 5
Y
6 7 8
50
0.1µF
HA-2556
16
1
REF
2
NC
3
NC
4
NC
5
Y
6 7
-V 8
V
OUT
HFA0002
+
-
Σ
5k
-
+
NC NC
15 14
NC
VX+ (V
13
X
12 11
+ V
10
Z
9
500
GAIN
)
V
IN
FIGURE 16. VOLTAGE CONTROLLED AMPLIFIER
Voltage Controlled Amplifier
A wide range of gain adjustment is available with the Voltage Controlled Amplifier configuration shown in Figure 16. Here the gain of the HFA0002 can be swept from 20V/V to a gain of almost 1000V/V with a DC voltage from 0 to 5V.
Wave Shaping Circuits
Wave shaping or curve fitting is another class of application for the analog multiplier. For example, where a non-linear sensor requires corrective curve fitting to improve linearity the HA-2556 can provide nonintegral powers in the range 1 to 2 or nonintegral roots in the range 0.5 to 1.0 (refer to Fur­ther Reading). This effect is displayed in Figure 17.
1
0.5
0.8
0.7
0.6
0.4
OUTPUT (V)
0.2
0
X
0 0.2 0.4 0.6 0.8 1
FIGURE 17. EFFECT OF NONINTEGRAL POWERS / ROOTS
X
INPUT (V)
1.5
X
2
X
FIGURE 15. AUTOMATIC GAIN CONTROL
Spec Number 511063-883
8-22
Page 17
HA2556
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied.
Well, OK a multiplier can’t do nonintegral roots “exactly” but we can get very close. We can approximate nonintegral roots with equations of the form:
12
IN
0.5
+ 0.5VIN.
IN
0.7
X
INPUT (V)
2
IN
0.5X
+=
+=
OUT
0.5
αV
αV
+ 0.5X
IN
IN
= V
IN
0.7
to the
V
o
V
o
1 α()V
1 α()V
Figure 18 compares the function V approximation V
1
0.8
0.6
0.4
OUTPUT (V)
0.2
0
0 0.2 0.4 0.6 0.8 1
OUT
= 0.5V
X
FIGURE 18. COMPARE APPROXIMATION TO NONINTEGRAL
ROOT
This function can be easily built using an HA-2556 and a potentiometer for easy adjustment as shown in Figures 19 and 20. If a fixed nonintegral power is desired, the circuit shown in Figure 21 eliminates the need for the output buffer amp. These circuits approximate the function is the desired nonintegral power or root.
HA-2556
16
NC NC
15 14
NC
+
13
X
12
-
11
+V
+
+
10
-
Σ
Z
9
-
NC NC NC
-V
1
REF
2 3 4
+
5
Y
6
-
7 8
V
M IN
where M
V
IN
1-α
α
NC NC NC
-V
1.0 M 2.0
0V VIN≤ 1V
FIGURE 20. NONINTEGRAL POWERS - ADJUSTABLE
V
OUT
1.2 M 2.0
0V VIN≤ 1V
1

V
OUT
--
5

Setting:
1
R3

1 α
--
----- 1+
= α
5

R4
1 2 3 4 5 6 7 8
NC NC NC
-V
R3
----- 1+
R4
REF
+
Y
-
HA-2556
+
-
Σ
HA-2556
1
REF
2 3 4
+
5
Y
6
-
7 8
2
V
IN
NC
16
NC
15 14
NC
+
13
X
12
-
+V
11
+
10
Z
9
-
-
+
16 15 14
+
13
X
12
-
11
+
+
10
-
Σ
Z
9
-
R3
R3

----- 1+
+=

R4
R3

=
----- 1+

R4
V
IN
1-α
α
V
OUT
HA-5127
NC NC NC
+V
R4

---------------- -

R1 R2+
V
IN
R1
R2
R2
 
V
R2
---------------- -
R1 R2+
IN
0.5 M 1.0
0V VIN≤ 1V
-
+
HA-5127
FIGURE 19. NONINTEGRAL ROOTS - ADJUSTABLE
FIGURE 21. NONINTEGRAL POWERS - FIXED
V
OUT
Spec Number 511063-883
8-23
Page 18
HA2556
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied.
Values for α to give a desired M root or power are as follows:
ROOTS - FIGURE 19 POWERS - FIGURE 20
M α M α
0.5 0 1.0 1
0.6 0.25 1.2 0.75
0.7 0.50 1.4 0.5
0.8 0.70 1.6 0.3
0.9 0.85 1.8 0.15
1.0 1 2.0 0
Sine Function Generators
Similar functions can be formulated to approximate a SINE function converter as shown in Figure 22. With a linearly changing (0 to 5V) input the output will follow 0 sine function (0 to 5V) output. This configuration is theoreti­cally capable of ±2.1% maximum error to full scale.
o
to 90o of a
23.1K
10K
V
IN
+
X
-
X
HA-2556
+
Y
-
Y
V
OUT
+
Z
-
Z
71.5K
+
X
-
X
HA-2556
+
Y
-
Y
V
V
OUT
+
Z
-
Z
OUT
5.71K
10K
By adding a second HA-2556 to the circuit an improved fit may be achieved with a theoretical maximum error of 0.5% as shown in Figure 23. Figure 23 has the added benefit that it will work for positive and negative input signals. This makes a convenient triangle (±5V input) to sine wave (±5V output) converter.
HA-2556
NC
+
Σ
X
-
Z
IN
IN
---------------- -=
R5 R6+
+
-
+
-
R6
16
NC
15 14
NC 13 12
+V
11 10
9
5sin
R2
R6 470
470
R1
R5
262
1410
R4 1K
V

π
IN
--
------ -

2
5
R2
---------------- -=
R1 R2+
1 NC NC
V
IN
V
OUT
V
OUT
for; 0V VIN 5V max theoretical error = 2.1%FS where:
0.6082
NC
=
V
IN
---------------- -= 5 0.1284()
R3 R4+
REF
2
3
4
+
5
Y
6
-
7
-V 8
R3
644
10.1284V
()
--------------------------------------- -
0.6082 0.05V
()
R4
;
50.05()
3 IN
2 IN

π
=
--
5sin

2
V
IN
------- -
5
V
OUT
5V
----------------------------------------------------
3.18167 0.0177919V
IN
0.05494V
– +
-5V VIN≤ 5V max theoretical error = 0.5%FS
FIGURE 23. BIPOLAR SINE-FUNCTION GENERATOR
Further Reading
1. Pacifico Cofrancesco, “RF Mixers and ModulatorsMade with a Monolithic Four-Quadrant Multiplier” Microwave Journal, December 1991 pg. 58 - 70.
2. Richard Goller, “IC Generates Nonintegral Roots” Elec­tronic Design, December 3, 1992.
FIGURE 22. SINE-FUNCTION GENERATOR
Spec Number 511063-883
8-24
Page 19
HA2556
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied.
TYPICAL PERFORMANCE CHARACTERISTICS
Device Tested at Supply Voltage = ±15V, RF = 50, RL = 1k, CL = 20pF, Unless Otherwise Specified.
PARAMETERS SYMBOL CONDITIONS TEMP TYP UNITS
Multiplication Error ME VY, VX = ±5V +25oC ±1.5 %FS
+125oC, -55oC ±3.0 %FS Multiplication Error Drift VY, VX = ±5V +125oC, -55oC ±0.003 %FS/oC Linearity Error LE3V VY, VX = ±3V +25oC ±0.02 %FS
LE4V VY, VX = ±4V +25oC ±0.05 %FS
LE5V VY, VX = ±5V +25oC ±0.2 %FS Differential Gain DG f = 4.43MHz, VY = 300mV Differential Phase DP f = 4.43MHz, VY = 300mV Scale Factor SF +25oC5V Voltage Noise EN (1kHz) f = 1kHz, VX = 0V, VY = 0V +25oC 150 nV/Hz
EN (100kHz) f = 100kHz, VX = 0V, VY = 0V +25oC 40 nV/Hz
Positive Power Supply
+PSRR VS+ = +12V to +15V, VS- = -15V +25oC80dB
Rejection Ratio Negative Power Supply
-PSRR VS- = -12V to -15V, VS+ = +15V +25oC55dB
Rejection Ratio Supply Current I
CC
VX, VY = 0V +25oC18mA
INPUT CHARACTERISTICS Input Offset Voltage V
IO
VY = ±5V +25oC ±3mV
Input Offset Voltage Drift VIOTC VY = ±5V +125oC, -55oC ±45 µV/oC Input Bias Current I
Input Offset Current I
B
IO
VX = 0V, VY = 5V +25oC ±8 µA
VX = 0V, VY = 5V +25oC ±0.5 µA
Differential Input Range +25oC ±5V Common Mode Range (VX) CMR (VX) +25oC ±10 V Common Mode Range (VY) CMR (VY) +25oC +9, -10 V Common Mode (VX)
CMRR (VX)VXCM = ±10V, VY = 5V +25oC78dB
Rejection Ratio Common Mode (VY)
CMRR (VY)VYCM = +9V, -10V, VX = 5V +25oC78dB
Rejection Ratio Common Mode (VZ)
CMRR (VZ)VZCM = ±10V, VX = 0V, VY = 0V +25oC78dB
Rejection Ratio VY, VZCHARACTERISTICS (Note 1)
Bandwidth BW (VY) -3dB, VX = 5V, VY≤ 200mV Gain Flatness GF (VY) 0.1dB, VX = 5V, VY≤ 200mV AC Feedthrough V
Rise and Fall Time TR, T
(1MHz) fO = 1MHz, VY = 200mV
ISO
V
(5MHz) fO = 5MHz, VY = 200mV
ISO
VY = 200mV step, VX = 5V, 10% to 90% pts +25oC8ns
F
, VX = 5V +25oC 0.1 %
P-P
, VX = 5V +25oC 0.1 Deg.
P-P
+125oC, -55oC80 dB
+125oC, -55oC55 dB
+125oC, -55oC18 mA
+125oC, -55oC ±8mV
+125oC, -55oC ±12 µA
+125oC, -55oC ±1.0 µA
+125oC, -55oC78 dB
+125oC, -55oC78 dB
+125oC, -55oC78 dB
P-P
P-P
, VX = nulled (Note 2) +25oC -65 dB
P-P
, VX = nulled (Note 2) +25oC -50 dB
P-P
+25oC 57 MHz +25oC 5.0 MHz
+125oC, -55oC8 ns
8-25
Spec Number 511063-883
Page 20
HA2556
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied.
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
Device Tested at Supply Voltage = ±15V, RF = 50, RL = 1k, CL = 20pF, Unless Otherwise Specified.
PARAMETERS SYMBOL CONDITIONS TEMP TYP UNITS
Overshoot +OS, -OS VY = 200mV step, VX = 5V +25oC17%
+125oC, -55oC17 %
Slew Rate +SR, -SR VY = 10V step, VX = 5V +25oC 450 V/µs
+125oC, -55oC 450 V/µs Differential Input Resistance RIN (VY)VY = ±5V, VX = 0V +25oC1M VX CHARACTERISTICS Bandwidth BW (VX) -3dB, VY = 5V, VX≤ 200mV Gain Flatness GF (VX) 0.1dB, VY = 5V, VX≤ 200mV AC Feedthrough V
Rise & Fall Time TR, T
(1MHz) fO = 1MHz, VX = 200mV
ISO
V
(5MHz) fO = 5MHz, VX = 200mV
ISO
VX = 200mV step, VY = 5V, 10% to 90% pts +25oC8ns
F
P-P
P-P
= nulled (Note 2) +25oC -65 dB
P-P,VY
= nulled (Note 2) +25oC -50 dB
P-P,VY
Overshoot +OS, -OS VX = 200mV step, VY = 5V +25oC17%
Slew Rate +SR, -SR VX = 10V step, VY = 5V +25oC 450 V/µs
Differential Input Resistance RIN (VX)VX = ±5V, VY = 0V +25oC1M OUTPUT CHARACTERISTICS Output Resistance R Output Current I
Output Voltage Swing +V
OUT
OUT
OUT
VY = ±5V, VX = 5V, RL = 1k to 250 +25oC 0.7 V
= 5V, RL = 250 +25oC ±45 mA
OUT
RL = 250 +25oC ±6.05 V
NOTES:
1. VZ AC characteristics may be implied from VY due to the use of VZ as feedback in the test circuit.
2. Offset voltage applied to minimize feedthrough signal.
+25oC 52 MHz +25oC 4.0 MHz
+125oC, -55oC8 ns
+125oC, -55oC17 %
+125oC, -55oC 450 V/µs
+125oC, -55oC ±45 mA
+125oC, -55oC ±6.05 V
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Spec Number 511063-883
8-26
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