The HA-2556/883 is a monolithic, high speed, four quadrant,
analog multiplier constructed in Intersil’ Dielectrically
Isolated High Frequency Process. The voltage output
simplifies many designs by eliminating the current-to-voltage
conversion stage required for current output multipliers. The
HA-2556/883 provides a 450V/µs output slew rate and
maintains 52MHz and 57MHz bandwidths for the X and Y
channels respectively, making it an ideal part for use in video
systems.
The suitability for precision video applications is
demonstrated further by the Y Channel 0.1dB gain flatness
to 5.0MHz, 1.5% multiplication error, -50dB feedthrough and
differential inputs with 8µA bias current. The HA-2556 also
has low differential gain (0.1%) and phase (0.1
o
) errors.
The HA-2556/883 is well suited for AGC circuits as well as
mixer applications for sonar, radar, and medical imaging
equipment. The HA-2556/883 is not limited to multiplication
applications only; frequency doubling, power detection, as
well as many other configurations are possible.
Ordering Information
TEMPERATURE
PART NUMBER
HA1-2556/883-55oC to +125oC16 Lead CerDIP
RANGEPACKAGE
Pinout
Simplified Schematic
HA-2556/883
(CERDIP)
TOP VIEW
V
XIO
VX-
BIAS
B
+
-
8-7
GND
+
V
Y
REF
V
AV
YIO
16
V
1
GND
V
REF
V
YIO
V
YIO
V
V
V
OUT
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
1. Parameters listed in Table 3 are controlled via design or process parameters and are not directly tested at final production. These parameters are lab characterized upon initial design release, or upon design changes. These parameters are guaranteed by characterization
based upon data from multiple production runs which reflect lot to lot and within lot variation.
2. VZ AC characteristics may be implied from VY due to the use of VZ as feedback in the test circuit.
3. Offset voltage applied to minimize feedthrough signal.
1. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded
area shown. The manufacturer’s identification shall not be used
as a pin one identification mark.
2. The maximum limits of lead dimensions b and c or M shall be
measured at the centroid of the finished lead surfaces, when
solder dip or tin plate lead finish is applied.
3. Dimensions b1 and c1 apply to lead base metal only. Dimension
M applies to lead plating and finish thickness.
4. Corner leads (1, N, N/2, and N/2+1) may be configured with a
partial lead paddle. For this configuration dimension b3 replaces
dimension b1.
5. This dimension allows for off-center lid, meniscus, and glass overrun.
6. Dimension Q shall be measured from the seating plane to the
base plane.
7. Measure dimension S1 at all four corners.
8. N is the maximum number of terminal positions.
9. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
10. Controlling Dimension: Inch.
11. Lead Finish: Type A.
12. Materials: Compliant to MIL-I-38535.
-DBASE
M
SECTION A-A
eA/2
METAL
b1
M
(b)
α
S
e
A
c
D
E
S
S
D
Q
A
-CL
M
aaaC A - B
F16.3 MIL-STD-1835 GDIP1-T16 (D-2, CONFIGURATION A)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
Typical Performance Curves
X CHANNEL MULTIPLIER ERRORX CHANNEL MULTIPLIER ERROR
1
0.5
Y = 0
0
ERROR %FS
-0.5
-1
-6-4-20246
Y = 4
Y = 1
Y = 3
Y = 2
Y = 5
X INPUT (V)
1.5
Y = -4
1
0.5
0
-0.5
ERROR %FS
-1
-1.5
-6-4-20246
Y = -2
Y = -1
Y = 0
Y = -5
Y = -3
X INPUT (V)
Y CHANNEL MULTIPLIER ERRORY CHANNEL MULTIPLIER ERROR
1.5
X = -3
1
X = -4
0.5
ERROR% FS
-0.5
X = -1
X = 0
0
X = -5
-1
-6-4-20246
X = -2
Y INPUT (V)
1
0.5
0
-0.5
ERROR%FS
-1
-1.5
-6-4-20246
X = 0
X = 5
X = 1
X = 2
X = 4
X = 3
Y INPUT (V)
Y CHANNEL FULL POWER BANDWIDTHY CHANNEL FULL POWER BANDWIDTH
4
3
2
1
0
-1
GAIN (dB)
-2
-3
-4
Y CHANNEL = 10V
X CHANNEL = 5V
P-P
DC
1M10M100K10K
FREQUENCY (Hz)
-3dB
AT 32.5MHz
GAIN (dB)
4
3
2
1
0
-1
-2
-3
-4
Y CHANNEL = 4V
X CHANNEL = 5V
P-P
DC
1M10M100K10K
FREQUENCY (Hz)
8-14
Spec Number 511063-883
Page 9
HA2556
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
Typical Performance Curves
X CHANNEL FULL POWER BANDWIDTHX CHANNEL FULL POWER BANDWIDTH
X CHANNEL = 10V
4
Y CHANNEL = 5V
3
2
1
0
-1
GAIN (dB)
-2
-3
-4
Y CHANNEL BANDWIDTH vs X CHANNELX CHANNEL BANDWIDTH vs Y CHANNEL
0
-6
P-P
DC
1M10M100K10K
FREQUENCY (Hz)
VX = 5V
DC
(Continued)
4
3
2
1
0
GAIN (dB)
-1
-2
-3
-4
0
-6
X CHANNEL = 4V
Y CHANNEL = 5V
VY = 5V
P-P
DC
1M10M100K10K
FREQUENCY (Hz)
DC
-12
GAIN (dB)
-18
-24
10K100K
0
-10
-20
-30
-40
-50
-60
CMRR (dB)
-70
-80
VY = 2V
VX = 2V
DC
VX = 0.5V
DC
FREQUENCY (Hz)
VY = 200mV
10M100M1M
P-P
-12
GAIN (dB)
-18
-24
10K100K
DC
VY = 0.5V
DC
FREQUENCY (Hz)
Y CHANNEL CMRR vs FREQUENCYX CHANNEL CMRR vs FREQUENCY
0
VY+, VY- = 200mV
VX = 5V
DC
RMS
1M100M100K10K
FREQUENCY (Hz)
5MHz
-38.8dB
10M
CMRR (dB)
VX+, VX- = 200mV
-10
VY = 5V
-20
-30
-40
-50
-60
-70
-80
RMS
DC
1M100M100K10K
FREQUENCY (Hz)
VX = 200mV
10M100M1M
5MHz
-26.2dB
10M
P-P
8-15
Spec Number 511063-883
Page 10
HA2556
0
OFFSET
VOLTAGE
(
V)
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
Typical Performance Curves
(Continued)
FEEDTHROUGH vs FREQUENCYFEEDTRHOUGH vs FREQUENCY
0
VX = 200mV
-10
VY = NULLED
-20
-30
-40
-50
-60
-70
FEEDTHROUGH (dB)
-80
P-P
FREQUENCY (Hz)
-52.6dB
at 5MHz
1M100M100K10K
10M
OFFSET VOLTAGE vs TEMPERATUREINPUT BIAS CURRENT (VX, VY, VZ) vs TEMPERATURE
8
7
6
m
5
4
3
2
1
0
-100-5005010015
|VIOZ|
|VIOX|
|VIOY|
TEMPERATURE (oC)
0
VY = 200mV
-10
VX = NULLED
-20
-30
-40
-50
-60
-70
FEEDTHROUGH (dB)
-80
14
13
12
11
10
9
8
7
BIAS CURRENT (uA)
6
5
4
-100-50050100150
P-P
-49dB
at 5MHz
1M100M100K10K
FREQUENCY (Hz)
TEMPERATURE (oC)
10M
SCALE FACTOR ERROR vs TEMPERATUREINPUT VOLTAGE RANGE vs SUPPLY VOLTAGE
2
1.5
1
0.5
0
-0.5
SCALE FACTOR ERROR (%)
-1
-100-50050100150
TEMPERATURE (oC)
6
5
X INPUT
4
3
2
INPUT VOLTAGE RANGE (V)
1
46810121416
Y INPUT
± SUPPLY VOLTAGE (V)
Spec Number 511063-883
8-16
Page 11
HA2556
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
Typical Performance Curves
(Continued)
INPUT COMMON MODE RANGE vs SUPPLY VOLTAGESUPPLY CURRENT vs SUPPLY VOLTAGE
15
10
5
0
CMR (V)
-5
-10
-15
4 6 8 10121416
±SUPPLY VOLTAGE (V)
X INPUT
Y INPUT
X & Y INPUT
OUTPUT VOLTAGE vs R
5.0
4.8
25
20
I
CC
I
EE
15
10
5
SUPPLY CURRENT (mA)
0
05101520
LOAD
±SUPPLY VOLTAGE (V)
4.6
4.4
MAX OUTPUT VOLTAGE (V)
4.2
1003005007009001100
Functional Block Diagram
VX+
+
-
-
V
X
1/SF
+
V
Y
+
-
-
V
Y
NOTE:
The transfer equation for the HA-2556 is:
(VX+ - VX-) (VY+ - VY-) = SF (VZ+ - VZ-),
where SF = Scale Factor = 5V VX, VY, VZ = Differential Inputs
X
Y
R
LOAD
HA-2556
(Ω)
+
V
OUT
A
∑
-
+
V
Z
Z
+
-
-
V
Z
8-17
Spec Number
511063-883
Page 12
HA2556
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
Applications Information
Operation at Reduced Supply Voltages
The HA-2556 will operate over a range of supply voltages,
±5V to ±15V. Use of supply voltages below ±12V will reduce
input and output voltage ranges. See “Typical Performance
Curves” for more information.
Offset Adjustment
X and Y channel offset voltages may be nulled by using a
20K potentiometer between the V
YIO
or V
adjust pin A
XIO
and B and connecting the wiper to V-. Reducing the channel
offset voltage will reduce AC feedthrough and improve the
multiplication error. Output offset voltage can also be nulled
by connecting V
- to the wiper of a potentiometer which is
Z
tied between V+ and V-.
Capacitive Drive Capability
When driving capacitive loads >20pF a 50Ω resistor should
be connected between V
and VZ+, using VZ+ as the out-
OUT
put (see Figure 1). This will prevent the multiplier from going
unstable and reduce gain peaking at high frequencies. The
50Ω resistor will dampen the resonance formed with the
capacitive load and the inductance of the output at pin 8.
Gain accuracy will be maintained because the resistor is
inside the feedback loop.
Theory of Operation
The HA-2556 creates an output voltage that is the product of
the X and Y input voltages divided by a constant scale factor
of 5V. The resulting output has the correct polarity in each of
the four quadrants defined by the combinations of positive
and negative X and Y inputs. The Z stage provides the
means for negative feedback (in the multiplier configuration)
and an input for summation into the output. This results in
the following equation, where X, Y and Z are high impedance differential inputs
NC
NC
NC
+
V
Y
-15V
.
1
REF
2
3
4
5
+
-
6
7
8
50Ω
16
NC
15
NC
14
NC
13
+
-
+
-
-
Σ
+
VX+
12
11
+15 V
VZ-
10
9
V
+
Z
1K
V
OUT
20pF
To accomplish this the differential input voltages are first converted into differential currents by the X and Y input transconductance stages. The currents are then scaled by a constant
reference and combined in the multiplier core. The multiplier
core is a basic Gilbert Cell that produces a differential output
current proportional to the product of X and Y input signal currents. This current becomes the output for the HA-2557.
The HA-2556 takes the output current of the core and feeds
it to a transimpedance amplifier, that converts the current to
a voltage. In the multiplier configuration, negative feedback
is provided with the Z transconductance amplifier by connecting V
to the Z input. The Z stage converts V
OUT
OUT
to a
current which is subtracted from the multiplier core before
being applied to the high gain transimpedance amp. The Z
stage, by virtue of it’s similarity to the X and Y stages, also
cancels second order errors introduced by the dependence
of V
on collector current in the X and Y stages.
BE
The purpose of the reference circuit is to provide a stable
current, used in setting the scale factor to 5V. This is
achieved with a bandgap reference circuit to produce a temperature stable voltage of 1.2V which is forced across a NiCr
resistor. Slight adjustments to scale factor may be possible
by overriding the internal reference with the V
pin. The
REF
scale factor is used to maintain the output of the multiplier
within the normal operating range of ±5V when full scale
inputs are applied.
The Balance Concept
The open loop transfer equation for the HA-2556 is:
An understanding of the transfer function can be gained by
assuming that the open loop gain, A, of the output amplifier
is infinite. With this assumption, any value of V
generated with an infinitesimally small value for the terms
within the brackets. Therefore we can write the equation:
This form of the transfer equation provides a useful tool to
analyze multiplier application circuits and will be called the
Balance Concept.
Spec Number 511063-883
8-18
Page 13
HA2556
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
Let’s first examine the Balance Concept as it applies to the
standard multiplier configuration (Figure 2).
Signals A and B are input to the multiplier and the signal W
is the result. By substituting the signal values into the Balance equation you get:
A
()B()×5W()=
And solving for W:
AB
----------- -=
HA-2556
+
×
5
V
OUT
A
∑
-
Z
+
V
Z
+
-
-
V
Z
W
W
A
B
VX+
V
X
VY+
V
Y
-
-
1/5V
+
-
X
Y
+
-
FIGURE 2. MULTIPLIER
Notice that the output (W) enters the equation in the feedback to the Z stage. The Balance Equation does not test for
stability, so remember that you must provide negative feedback. In the multiplier configuration, the feedback path is
connected to V
+ input, not VZ-. This is due to the inversion
Z
that takes place at the summing node just prior to the output
amplifier. Feedback is not restricted to the Z stage, other
feedback paths are possible as in the Divider Configuration
shown in Figure 3.
VX+
+
-
V
X
1/5V
B
VY+
V
Y
+
-
HA-2556
-
X
+
∑
-
Y
Z
-
V
OUT
A
+
V
Z
+
-
-
V
Z
W
A
Signals may be applied to more than one input at a time as
in the Squaring configuration in Figure 4:
Here the Balance equation will appear as:
A
()A()×5W()=
A
VX+
V
X
VY+
V
Y
1/5V
-
HA-2556
+
-
X
+
∑
-
Y
+
-
Z
V
OUT
A
+
V
Z
+
-
-
V
Z
W
FIGURE 4. SQUARE
Which simplifies to:
2
A
W
-----=
5
The last basic configuration is the Square Root as shown in
Figure 5. Here feedback is provided to both X and Y inputs.
VX+
-
V
X
1/5V
+
V
Y
-
V
Y
FIGURE 5. SQUARE ROOT (FOR A > 0)
HA-2556
+
-
X
+
∑
-
Y
+
-
Z
V
OUT
A
+
V
Z
+
-
V
-
Z
W
A
The Balance equation takes the form:
W()W–()×5A–()=
Which equates to:
W5A=
FIGURE 3. DIVIDER
Inserting the signal values A, B and W into the Balance
Equation for the divider configuration yields:
W–() B()×5VA–()×=
Solving for W yields:
5A
W
-----=
B
Notice that, in the divider configuration, signal B must remain
≥0 (positive) for the feedback to be negative. If signal B is
negative, then it will be multiplied by the V
input to produce
X-
positive feedback and the output will swing into the rail.
Application Circuits
The four basic configurations (Multiply, Divide, Square and
Square Root) as well as variations of these basic circuits
have many uses.
Frequency Doubler
For example, if ACos(ωτ) is substituted for signal A in the
Square function, then it becomes a Frequency Doubler and
the equation takes the form:
ACos ωτ()()ACos ωτ()()×5W()=
And using some trigonometric identities gives the result:
2
A
-----
W
8-19
10
1Cos2ωτ()+()=
Spec Number 511063-883
Page 14
HA2556
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
Square Root
The Square Root function can serve as a precision/wide
bandwidth compander for audio or video applications. A
compander improves the Signal to Noise Ratio for your system by amplifying low level signals while attenuating or compressing large signals (refer to Figure 17; X
provides for better low level signal immunity to noise during
transmission. On the receiving end the original signal may
be reconstructed with the standard Square function.
VX+
τ)
ACos(ω
Α
AUDIO
CCos(ω
CARRIER
W
VX-
V
τ)
Y
C
V
Y
AC
------
Cos ωCω
10
1/5V
+
-
FIGURE 6. AM SIGNAL GENERATION
AM SIGNAL
CARRIER
LIKE THE FREQUENCY DOUBLER YOU GET AUDIO CENTERED AT DC
AND 2F
VX+
VX-
1/5V
+
V
Y
-
V
Y
.
C
FIGURE 7. SYNCHRONOUS AM DETECTION
ACos(ωτ)
ACos(ωτ+φ)
VX+
VX-
1/5V
+
V
Y
-
V
Y
2
A
-----
W
10
DC COMPONENT IS PROPORTIONAL TO Cos(f).
FIGURE 8. PHASE DETECTION
HA-2556
+
-
X
+
Y
+
-
–()τCos ω
A
HA-2556
+
-
X
Y
+
-
HA-2556
+
-
X
Y
+
-
Cos φ() Cos 2ωτφ+()+()=
∑
-
Z
+
∑
-
Z
+
∑
-
Z
0.5
curve). This
V
OUT
A
VZ+
+
-
V
-
Z
ω
+()τ+()=
C
V
OUT
A
+
V
Z
+
-
V
-
Z
V
OUT
A
+
V
Z
+
-
V
-
Z
W
A
W
W
Communications
The Multiplier configuration has applications in AM Signal Generation, Synchronous AM Detection and Phase Detection to mention a few. These circuit configurations are shown in Figure 6,
Figure 7 and Figure 8. The HA-2556 is particularly useful in
applications that require high speed signals on all inputs.
Each input X, Y and Z has similar wide bandwidth and input
characteristics. This is unlike earlier products where one
input was dedicated to a slow moving control function as is
required for Automatic Gain Control. The HA-2556 is versatile enough for both.
Although the X and Y inputs have similar AC characteristics, they
are not the same. The designer should consider input parameters such as small signal bandwidth, ac feedthrough and 0.1dB
gain flatness to get the most performance from the HA-2556.
The Y channel is the faster of the two inputs with a small signal
bandwidth of typically 57MHz verses 52MHz for the X channel.
Therefore in AM Signal Generation, the best performance will be
obtained with the Carrier applied to the Y channel and the modulation signal (lower frequency) applied to the X channel.
Scale Factor Control
The HA-2556 is able to operate over a wide supply voltage range
±5V to ±17.5V . The ±5V range is particularly useful in video applications. At ±5V the input voltage range is reduced to ±1.4V. The
output cannot reach its full scale value with this restricted input,
so it may become necessary to modify the scale factor. Adjusting
the scale factor may also be useful when the input signal itself is
restricted to a small portion of the full scale level. Here we can
make use of the high gain output amplifier by adding external
gain resistors. Generating the maximum output possible for a
given input signal will improve the Signal to Noise Ratio and
Dynamic Range of the system. For example, let’s assume that
the input signals are 1V
the HA-2556 will be 200mV . (1V x 1V / (5V) = 200mV. It would be
nice to have the output at the same full scale as our input, so let’s
add a gain of 5 as shown in Figure 9.
A
B
VX+
+
-
-
V
X
1/5V
VY+
+
-
-
V
Y
ExternalGain
FIGURE 9. EXTERNAL GAIN OF 5
One caveat is that the output bandwidth will also drop by this
factor of 5. The multiplier equation then becomes:
W
each. Then the maximum output for
PEAK
HA-2556
X
+
∑
-
Y
R
------1+=
R
5AB
-------- -AB×==
5
Z
V
OUT
A
+
V
Z
+
-
-
V
F
Z
G
1kΩ
R
F
250Ω
R
G
W
8-20
Spec Number 511063-883
Page 15
HA2556
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
Current Output
NC
Another useful circuit for low voltage applications allows the
user to convert the voltage output of the HA2556 to an output current. The HA-2557 is a current output version offering
100MHz of bandwidth, but its scale factor is fixed and does
not have an output amplifier for additional scaling. Fortunately the circuit in Figure 10 provides an output current that
can be scaled with the value of R
CONVERT
output impedance of typically 1MΩ. The equation for I
and provides an
OUT
becomes:
AB×
----------- -
I
OUT
VX+
A
B
VX-
V
V
+
-
1/5V
+
Y
+
-
-
Y
HA-2556
X
Y
×=
5
+
∑
-
Z
FIGURE 10. CURRENT OUTPUT
1
-------------------------- -
R
CONVERT
V
OUT
A
+
V
Z
+
-
V
-
Z
R
CONVERT
I
OUT
CH A
CH B
A
B
5K
5K
V
VY-
1
REF
2
3
4
5
+
-
6
7
8
50Ω
Y
NC
NC
NC
+
-15V
FIGURE 11. VIDEO FADER
VX+
V
X
V
Y
V
Y
-
+
-
1/5V
+
-
+
-
HA-2556
X
YZ
16
NC
15
NC
14
V
+
X
V
VZ-
V
Z
+
-
+15V
(0V to 5V)
+
+
V
Z
-
V
Z
MIX
V
OUT
W = 5(A2-B2)
5K
5K
13
+
-
12
11
+
10
-
-
Σ
+
9
A
+
∑
-
Video Fader
The Video Fader circuit provides a unique function. Here Ch
B is applied to the minus Z input in addition to the minus Y
input. In this way, the function in Figure 11 is generated. V
will control the percentage of Ch A and Ch B that are mixed
together to produce a resulting video image or other signal.
The Balance equation looks like:
()ChAChB–()×5V
V
MIX
OUT
Which simplifies to:
V
MIX
-----------
5
ChAChB–()+=
= Ch B and
OUT
When V
V
OUT
is 0V the equation becomes V
MIX
ChB
Ch A is removed, conversely when VMIX is 5V the equation
becomes V
= Ch A eliminating Ch B. For VMIX values 0V
OUT
≤ VMIX ≤ 5V the output is a blend of Ch A and Ch B.
MIX
ChB–()=
FIGURE 12. DIFFERENCE OF SQUARES
95K
R2
R1
5K
A
V
VX+
VY+
V
Y
-
X
1/5V
-
HA-2556
+
-
X
+
∑
-
Y
+
-
Z
V
OUT
A
+
V
Z
+
-
V
-
Z
W = 100
A - B
B
R1 and R2 set scale to 1V/%, other scale factors possible
for A ≥ 0V.
FIGURE 13. PERCENTAGE DEVIATION
5K
5K
V
VX+
VY+
V
-
X
1/5V
-
Y
HA-2556
+
-
X
+
∑
-
Y
+
-
Z
V
OUT
A
+
V
Z
+
-
-
V
Z
W = 10
A - B
B + A
B
A
A
FIGURE 14. DIFFERENCE DIVIDED BY SUM (FOR A + B ≥ 0V)
Spec Number 511063-883
8-21
Page 16
HA2556
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
Other Applications
As shown above, a function may contain several different
operators at the same time and use only one HA-2556.
Some other possible multi-operator functions are shown in
Figure 12, Figure 13 and Figure 14.
Of course the HA-2556 is also well suited to standard multiplier applications such as Automatic Gain Control and Voltage Controlled Amplifier.
Automatic Gain Control
Figure 15 shows the HA-2556 configured in an Automatic
Gain Control or AGC application. The HA-5127 low noise
amplifier provides the gain control signal to the X input. This
control signal sets the peak output voltage of the multiplier to
match the preset reference level. The feedback network
around the HA-5127 provides a response time adjustment.
High frequency changes in the peak are rejected as noise or
the desired signal to be transmitted. These signals do not
indicate a change in the average peak value and therefore
no gain adjustment is needed. Lower frequency changes in
the peak value are given a gain of -1 for feedback to the
control input. At DC the circuit is an integrator automatically
compensating for Offset and other constant error terms.
This multiplier has the advantage over other AGC circuits, in
that the signal bandwidth is not affected by the control signal
gain adjustment.
HA-2556
+
-
Σ
10kΩ
X
Z
0.01µF
-
+
HA-5127
16
15
14
13
12
11
10
9
0.1µF
NC
NC
NC
+V
5.6V
V
OUT
1N914
5kΩ
20kΩ
NC
NC
NC
VY+
-V
10kΩ
+15V
1
REF
2
3
4
5
Y
6
7
8
50Ω
0.1µF
HA-2556
16
1
REF
2
NC
3
NC
4
NC
5
Y
6
7
-V
8
V
OUT
HFA0002
+
-
Σ
5kΩ
-
+
NC
NC
15
14
NC
VX+ (V
13
X
12
11
+ V
10
Z
9
500Ω
GAIN
)
V
IN
FIGURE 16. VOLTAGE CONTROLLED AMPLIFIER
Voltage Controlled Amplifier
A wide range of gain adjustment is available with the Voltage
Controlled Amplifier configuration shown in Figure 16. Here
the gain of the HFA0002 can be swept from 20V/V to a gain
of almost 1000V/V with a DC voltage from 0 to 5V.
Wave Shaping Circuits
Wave shaping or curve fitting is another class of application
for the analog multiplier. For example, where a non-linear
sensor requires corrective curve fitting to improve linearity
the HA-2556 can provide nonintegral powers in the range 1
to 2 or nonintegral roots in the range 0.5 to 1.0 (refer to Further Reading). This effect is displayed in Figure 17.
1
0.5
0.8
0.7
0.6
0.4
OUTPUT (V)
0.2
0
X
00.20.40.60.81
FIGURE 17. EFFECT OF NONINTEGRAL POWERS / ROOTS
X
INPUT (V)
1.5
X
2
X
FIGURE 15. AUTOMATIC GAIN CONTROL
Spec Number 511063-883
8-22
Page 17
HA2556
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
Well, OK a multiplier can’t do nonintegral roots “exactly” but
we can get very close. We can approximate nonintegral
roots with equations of the form:
12⁄
IN
0.5
+ 0.5VIN.
IN
0.7
X
INPUT (V)
2
IN
0.5X
+=
+=
OUT
0.5
αV
αV
+ 0.5X
IN
IN
= V
IN
0.7
to the
V
o
V
o
1α–()V
1α–()V
Figure 18 compares the function V
approximation V
1
0.8
0.6
0.4
OUTPUT (V)
0.2
0
00.20.40.60.81
OUT
= 0.5V
X
FIGURE 18. COMPARE APPROXIMATION TO NONINTEGRAL
ROOT
This function can be easily built using an HA-2556 and a
potentiometer for easy adjustment as shown in Figures 19
and 20. If a fixed nonintegral power is desired, the circuit
shown in Figure 21 eliminates the need for the output buffer
amp. These circuits approximate the function
is the desired nonintegral power or root.
HA-2556
16
NC
NC
15
14
NC
+
13
X
12
-
11
+V
+
+
10
-
Σ
Z
9
-
NC
NC
NC
-V
1
REF
2
3
4
+
5
Y
6
-
7
8
V
M
IN
where M
V
IN
1-α
α
NC
NC
NC
-V
1.0 ≤ M ≤ 2.0
0V ≤ VIN≤ 1V
FIGURE 20. NONINTEGRAL POWERS - ADJUSTABLE
V
OUT
1.2 ≤ M ≤ 2.0
0V ≤ VIN≤ 1V
1
V
OUT
--
5
Setting:
1
R3
1α–
--
-----1+
=α
5
R4
1
2
3
4
5
6
7
8
NC
NC
NC
-V
R3
-----1+
R4
REF
+
Y
-
HA-2556
+
-
Σ
HA-2556
1
REF
2
3
4
+
5
Y
6
-
7
8
2
V
IN
NC
16
NC
15
14
NC
+
13
X
12
-
+V
11
+
10
Z
9
-
-
+
16
15
14
+
13
X
12
-
11
+
+
10
-
Σ
Z
9
-
R3
R3
-----1+
+=
R4
R3
=
-----1+
R4
V
IN
1-α
α
V
OUT
HA-5127
NC
NC
NC
+V
R4
---------------- -
R1R2+
V
IN
R1
R2
R2
V
R2
---------------- -
R1R2+
IN
0.5 ≤ M ≤ 1.0
0V ≤ VIN≤ 1V
-
+
HA-5127
FIGURE 19. NONINTEGRAL ROOTS - ADJUSTABLE
FIGURE 21. NONINTEGRAL POWERS - FIXED
V
OUT
Spec Number 511063-883
8-23
Page 18
HA2556
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
Values for α to give a desired M root or power are as follows:
ROOTS - FIGURE 19POWERS - FIGURE 20
MαMα
0.501.01
0.6≈0.251.2≈0.75
0.7≈0.501.4≈0.5
0.8≈0.701.6≈0.3
0.9≈0.851.8≈0.15
1.012.00
Sine Function Generators
Similar functions can be formulated to approximate a SINE
function converter as shown in Figure 22. With a linearly
changing (0 to 5V) input the output will follow 0
sine function (0 to 5V) output. This configuration is theoretically capable of ±2.1% maximum error to full scale.
o
to 90o of a
23.1K
10K
V
IN
+
X
-
X
HA-2556
+
Y
-
Y
V
OUT
+
Z
-
Z
71.5K
+
X
-
X
HA-2556
+
Y
-
Y
V
V
OUT
+
Z
-
Z
OUT
5.71K
10K
By adding a second HA-2556 to the circuit an improved fit
may be achieved with a theoretical maximum error of 0.5%
as shown in Figure 23. Figure 23 has the added benefit that
it will work for positive and negative input signals. This
makes a convenient triangle (±5V input) to sine wave (±5V
output) converter.
1. Pacifico Cofrancesco, “RF Mixers and ModulatorsMade
with a Monolithic Four-Quadrant Multiplier” Microwave
Journal, December 1991 pg. 58 - 70.
2. Richard Goller, “IC Generates Nonintegral Roots” Electronic Design, December 3, 1992.
FIGURE 22. SINE-FUNCTION GENERATOR
Spec Number 511063-883
8-24
Page 19
HA2556
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
TYPICAL PERFORMANCE CHARACTERISTICS
Device Tested at Supply Voltage = ±15V, RF = 50Ω, RL = 1kΩ, CL = 20pF, Unless Otherwise Specified.
EN (100kHz)f = 100kHz, VX = 0V, VY = 0V+25oC40nV/√Hz
Positive Power Supply
+PSRRVS+ = +12V to +15V, VS- = -15V+25oC80dB
Rejection Ratio
Negative Power Supply
-PSRRVS- = -12V to -15V, VS+ = +15V+25oC55dB
Rejection Ratio
Supply CurrentI
CC
VX, VY = 0V+25oC18mA
INPUT CHARACTERISTICS
Input Offset VoltageV
IO
VY = ±5V+25oC±3mV
Input Offset Voltage DriftVIOTCVY = ±5V+125oC, -55oC±45µV/oC
Input Bias CurrentI
Input Offset CurrentI
B
IO
VX = 0V, VY = 5V+25oC±8µA
VX = 0V, VY = 5V+25oC±0.5µA
Differential Input Range+25oC±5V
Common Mode Range (VX)CMR (VX)+25oC±10V
Common Mode Range (VY)CMR (VY)+25oC+9, -10V
Common Mode (VX)
CMRR (VX)VXCM = ±10V, VY = 5V+25oC78dB
Rejection Ratio
Common Mode (VY)
CMRR (VY)VYCM = +9V, -10V, VX = 5V+25oC78dB
Rejection Ratio
Common Mode (VZ)
CMRR (VZ)VZCM = ±10V, VX = 0V, VY = 0V+25oC78dB
Rejection Ratio
VY, VZCHARACTERISTICS (Note 1)
BandwidthBW (VY)-3dB, VX = 5V, VY≤ 200mV
Gain FlatnessGF (VY)0.1dB, VX = 5V, VY≤ 200mV
AC FeedthroughV
Rise and Fall TimeTR, T
(1MHz)fO = 1MHz, VY = 200mV
ISO
V
(5MHz)fO = 5MHz, VY = 200mV
ISO
VY = 200mV step, VX = 5V, 10% to 90% pts+25oC8ns
F
, VX = 5V+25oC0.1%
P-P
, VX = 5V+25oC0.1Deg.
P-P
+125oC, -55oC80dB
+125oC, -55oC55dB
+125oC, -55oC18 mA
+125oC, -55oC±8mV
+125oC, -55oC±12µA
+125oC, -55oC±1.0µA
+125oC, -55oC78dB
+125oC, -55oC78dB
+125oC, -55oC78dB
P-P
P-P
, VX = nulled (Note 2)+25oC-65dB
P-P
, VX = nulled (Note 2)+25oC-50dB
P-P
+25oC57MHz
+25oC5.0MHz
+125oC, -55oC8ns
8-25
Spec Number 511063-883
Page 20
HA2556
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
Device Tested at Supply Voltage = ±15V, RF = 50Ω, RL = 1kΩ, CL = 20pF, Unless Otherwise Specified.
1. VZ AC characteristics may be implied from VY due to the use of VZ as feedback in the test circuit.
2. Offset voltage applied to minimize feedthrough signal.
+25oC52MHz
+25oC4.0MHz
+125oC, -55oC8ns
+125oC, -55oC17%
+125oC, -55oC450V/µs
+125oC, -55oC±45mA
+125oC, -55oC±6.05V
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Spec Number 511063-883
8-26
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