Page 1
February 1999
FDR858P
Single P-Channel, Logic Level, PowerTrenchTM MOSFET
General Description Features
The SuperSOT-8 family of P-Channel Logic Level
MOSFETs have been designed to provide a low profile,
small footprint alternative to industry standard SO-8 little
foot type product.
This P-Channel Logic Level MOSFET is produced
using Fairchild Semiconductor's advanced PowerTrench
process that has been especially tailored to minimize the
on-state resistance and yet maintain low gate charge for
superior switching performance.
These devices are well suited for notebook computer
applications: load switching and power management,
battery charging circuits, and DC/DC conversion.
SOT-23
SuperSOTTM-6
SuperSOTTM-8
-8 A, -30 V. R
R
= 0.019 Ω @ VGS = -10 V,
DS(ON)
= 0.028 Ω @ VGS = -4.5 V.
DS(ON)
Low gate charge (21nC typical).
High performance trench technology for extremely low
R
.
DS(ON)
SuperSOTTM-8 package: small footprint (40%) less than
SO-8); low profile (1mm thick); maximum power
comperable to SO-8.
SO-8
SOT-223
SOIC-16
S
D
D
S
G
SuperSOT -8
Mark: 858P
TM
Absolute Maximum Ratings T
D
D
D
= 25oC unless otherwise noted
A
Symbol Parameter Ratings Units
V
DSS
V
GSS
I
D
Drain-Source Voltage -30 V
Gate-Source Voltage ±20 V
Draint Current - Continuous (Note 1) -8 A
- Pulsed -50
P
D
TJ,T
Maximum Power Dissipation (Note 1a) 1.8
(Note 1b)
(Note 1c)
Operating and Storage Temperature Range -55 to 150 °C
STG
THERMAL CHARACTERISTICS
R
JA
θ
R
JC
θ
Thermal Resistance, Junction-to-Ambient (Note 1a) 70 °C/W
Thermal Resistance, Junction-to-Case (Note 1) 20 °C/W
5
6
7
8
4
3
2
1
W
1
0.9
© 1999 Fairchild Semiconductor Corporation
FDR858P Rev.C
Page 2
Electrical Characteristics (T
= 25OC unless otherwise noted )
A
Symbol Parameter Conditions Min Typ Max Units
OFF CHARACTERISTICS
BV
∆BV
I
DSS
I
GSS
I
GSS
DSS
DSS
Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA -30 V
Breakdown Voltage Temp. Coefficient ID = -50 µA, Referenced to 25 oC -22 mV /oC
/∆T
J
Zero Gate Voltage Drain Current VDS = -24 V, V
Gate - Body Leakage Current VGS = 20 V, V
Gate - Body Leakage, Reverse VGS = -20 V, V
ON CHARACTERISTICS (Note 2)
V
∆V
R
GS(th)
GS(th)
DS(ON)
Gate Threshold Voltage VDS = VGS, ID = -250 µA -1 -1.7 -3 V
Gate Threshold Voltage Temp.Coefficient ID = -50 µA, Referenced to 25 oC 4 mV /oC
/∆T
J
Static Drain-Source On-Resistance VGS = -10 V, ID = -8 A 0.0155 0.019
VGS = -4.5 V, ID = -6.3 A 0.022 0.028
I
D(ON)
g
FS
On-State Drain Current VGS = -10 V, VDS = -5 V -50 A
Forward Transconductance VDS = -10 V, ID = -3.2 A 25 S
DYNAMIC CHARACTERISTICS
C
iss
C
oss
C
rss
Input Capacitance VDS = -15 V, VGS = 0 V,
Output Capacitance 590 pF
f = 1.0 MHz
Reverse Transfer Capacitance 260 pF
SWITCHING CHARACTERISTICS (Note 2)
t
t
t
t
Q
Q
Q
D(on)
r
D(off)
f
g
gs
gd
Turn - On Delay Time VDD = -15 V, ID = -1 A, 12 22 ns
Turn - On Rise Time
VGS = -10V, R
Turn - Off Delay Time 100 140 ns
Turn - Off Fall Time 55 80 ns
Total Gate Charge VDS = -15 V, ID = -8 A, 21 30 nC
Gate-Source Charge VGS = 5 V 6 nC
Gate-Drain Charge 8 nC
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
= 0 V -1 µA
GS
TJ = 55°C -10 µA
= 0 V 100 nA
DS
= 0 V -100 nA
DS
TJ = 125°C 0.021 0.03
2010 pF
GEN
= 6 Ω
15 27 ns
Ω
I
S
V
SD
Notes:
1. R
JA
θ
by design while R
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
Maximum Continuous Drain-Source Diode Forward Current -0.67 A
Drain-Source Diode Forward Voltage VGS = 0 V, IS = -0.67 A (Note 2) -0.7 -1.2 V
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
is determined by the user's board design.
CA
θ
a. 70OC/W on a 1 in2 pad of 2oz
copper.
b. 125OC/W on a 0.026 in2 of pad
of 2oz copper.
c. 135OC/W on a 0.005 in2 of pad
of 2oz copper.
is guaranteed
JC
θ
FDR858P Rev.C
Page 3
Typical Electrical Characteristics
60
V = -10V
GS
48
36
24
12
D
- I , DRAIN-SOURCE CURRENT (A)
0
0 1 2 3 4 5
Figure 1. On-Region Characteristics.
1.6
I = -8.0A
D
V = -10V
GS
1.4
1.2
1
DS(ON)
R , NORMALIZED
0.8
DRAIN-SOURCE ON-RESISTANCE
0.6
-50 -25 0 25 50 75 100 125 150
-6.0V
-4.5V
-4.0V
-3.5V
-3.0V
- V , DRAIN-SOURCE VOLTAGE (V)
DS
T , JUNCTION TEMPERATURE (°C)
J
2.5
V = -3.5 V
2
GS
-4.0V
1.5
DS(on)
R , NORMALIZED
1
DRAIN-SOURCE ON-RESISTANCE
0.5
0 10 20 30 40 50
-4.5V
-5.5V
-7.0V
- I , DRAIN CURRENT (A)
D
-10V
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.08
0.06
0.04
0.02
DS(ON)
R , ON-RESISTANCE (OHM)
0
0 2 4 6 8 10
- V , GATE TO SOURCE VOLTAGE (V)
GS
I =-4.0A
D
T =125°C
A
25°C
Figure 3. On-Resistance Variation
with Temperature.
50
V = -5V
DS
40
30
20
D
- I , DRAIN CURRENT (A)
10
0
1 2 3 4 5
-V , GATE TO SOURCE VOLTAGE (V)
GS
Figure 5. Transfer Characteristics.
T = -55°C
J
125°C
25°C
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
50
V = 0V
GS
10
1
0.1
0.01
0.001
S
-I , REVERSE DRAIN CURRENT (A)
0.0001
0 0.2 0.4 0.6 0.8 1 1.2 1.4
T = 125°C
J
25°C
-55°C
-V , BODY DIODE FORWARD VOLTAGE (V)
SD
Figure 6. Body Diode Forward Voltage
Variation with Source Current
and Temperature.
FDR858P Rev.C
Page 4
Typical Electrical Characteristics
(continued)
10
I = -8A
D
8
V = -5V
DS
-15V
6
4
2
GS
-V , GATE-SOURCE VOLTAGE (V)
0
0 8 16 24 32 40
Q , GATE CHARGE (nC)
g
Figure 7. Gate Charge Characteristics.
80
20
RDS(ON) LIMIT
5
0.5
V = -10V
D
- I , DRAIN CURRENT (A)
0.05
0.01
GS
SINGLE PULSE
R = 135°C/W
JA
θ
A
T = 25°C
A
0.1 0.2 0.5 1 2 5 10 20 30 50
- V , DRAIN-SOURCE VOLTAGE (V)
DS
10s
DC
100us
1ms
10ms
100ms
1s
-10V
4000
C
2000
1000
500
CAPACITANCE (pF)
f = 1 MHz
V = 0 V
GS
200
0.1 0.3 1 3 10 15 30
-V , DRAIN TO SOURCE VOLTAGE (V)
DS
iss
C
oss
C
rss
Figure 8. Capacitance Characteristics.
50
40
30
20
POWER (W)
10
0
0.0001 0.001 0.01 0.1 1 10 100 300
SINGLE PULSE TIME (SEC)
SINGLE PULSE
R = 135°C/W
JA
θ
T = 25°C
A
Figure 9. Maximum Safe Operating Area.
1
D = 0.5
0.5
0.3
0.2
0.2
0.1
0.05
0.03
r(t), NORMALIZED EFFECTIVE
0.02
TRANSIENT THERMAL RESISTANCE
0.01
0.1
0.05
0.02
0.01
Single Pulse
0.0001 0.001 0.01 0.1 1 10 100 300
t , TIME (sec)
1
Figure 10. Single Pulse Maximum Power
Dissipation.
R (t) = r(t) * R
JA
θ
R = 135°C/W
JA
θ
P(pk)
t
1
t
T - T = P * R (t)
J
A
Duty Cycle, D = t / t
θ
2
JA
θ
1
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in note 1c.
Transient thermal response will change depending on the circuit board design.
JA
2
FDR858P Rev.C
Page 5
SuperSOTTM-8 Tape and Reel Data and Package Dimensions
SSOT-8 Packaging
Configuration: Figure 1.0
Customized Label
F63TNR Label
Emboss ed Carrier Tape
Antistatic Cover Tape
Static Dissi pative
852
F
831N
Packaging Description:
SSOT-8 parts are shipped in tape. The carrier tape is
made from a di ssipative (carbo n filled) po lycarbonate
resin. The cov er tap e is a mu lt ilayer film (Heat Act ivat ed
Adhesiv e in nat ure) prim aril y c omp osed of po lyes ter film ,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standar d option are ship ped wi th
3,000 u n i t s pe r 13" o r 330c m d ia m et er r e el. Th e r e el s ar e
dark blue in color and is made of po ly s t yr ene plas t ic (antistatic c oated). Other option comes in 500 units per 7" or
177c m diam eter reel. This and s ome o ther opt ion s are
furth er described in the Packaging Information table.
These fu ll reels are individu ally barcode labeled and
placed in side a standard intermediat e box (illus trated in
figur e 1.0) made of recyclable cor rugated brow n paper.
One box cont ains t wo reels maxi mum. And t hese bo xes
are placed ins ide a barc ode labeled shipp ing bo x whic h
co m e s i n di ffe re n t s i z es depe nd in g on t he nu m b e r of part s
sh i ppe d.
852
852
F
831N
F
831N
852
F
831N
852
F
831N
Pin 1
SSOT-8 Packaging Information
Packaging Option
Packaging type
Qty per Reel/Tube/Bag
Reel Size
Box Dimension (mm)
Max qty per Box
Weight per unit (gm)
Weight per Reel (kg)
Note/Comments
184mm x 187mm x 47mm
Stan dard
(no flow c ode )
3,000 500
13" Dia
343x64x343 184x187x47
6,000 1,000
0.0416 0.0416
0.5615 0.0980
TNR
D84Z
TNR
7" Dia
F63TNR
Label
Pizza Box for D84Z Option
SSOT-8 Tape Leader and Trailer
Configuration: Figur e 2.0
F63TNR
Label
SSOT-8 Unit Orientation
343mm x 342mm x 64mm
Inter mediate box for Standar d
and L 99Z Options
F63TNR Label sampl e
LOT: CBVK7 41B019
FSID: FDR835N
D/C1: D9842 QTY1: SPEC REV:
D/C2: QTY2: CPN:
F63TNR Label
QTY: 3000
SPEC:
N/F: F (F63TNR)3
Carrier Tape
Cover Tape
Tr ailer Tape
300mm mi ni mum or
38 empty pockets
Components
Leader Tape
500mm mi ni mum or
62 empty pock ets
August 1999, Rev. C
Page 6
SuperSOTTM-8 Tape and Reel Data and Package Dimensions, continued
SSOT-8 Embossed Carrier Tape
Configuration: Figur e 3.0
T
K0
Wc
B0
P0
D0
E1
F
W
E2
Tc
A0
P1
D1
User Direction of Feed
Dimensions are in millimeter
Pkg type
SSOT-8
(12mm)
Notes: A0, B0, and K0 dimensions are determined with r espect to t he EIA/Jedec RS-481
SSOT-8 Reel Configuration: Figur e 4.0
A0 B0 W D0 D1 E1 E2 F P1 P0 K0 T Wc Tc
4.47
5.00
12.0
1.55
1.50
1.75
10.25
+/-0.10
+/-0.10
+/-0.3
+/-0.05
+/-0.10
+/-0.10
5.50
min
+/-0.05
rotational and lateral movement requi rements (see sketches A, B, and C).
20 deg maximum
Typical
component
cavity
center line
Typical
component
center line
A0
Dim A
Max
20 deg maximum component rotation
Sketc h A (Side or Front Sec tional Vi ew)
Component Rotation
B0
Sketc h B (Top View)
Component Rotation
W1 Measured at Hub
8.0
+/-0.1
4.0
+/-0.1
1.37
0.280
+/-0.150
9.5
+/-0.025
0.5mm
maximum
+/-0.10
0.5mm
maximum
Sketc h C (Top View )
Component lateral movement
0.06
+/-0.02
Dim A
max
13" Diameter Option
Tape Size
12mm 7" Dia
12mm 13" Dia
1998 Fairchild Semiconductor Corporation
Reel
Option
Dim A Dim B Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL)
7.00
177.8
13.00
330
0.059
1.5
0.059
1.5
Dim N
See detail AA
W3
W2 max Measured at Hub
Dimensions are in inches and millimeters
512 +0.020/ -0.008
13 +0.5/-0.2
512 +0.020/ -0.008
13 +0.5/-0.2
0.795
20.2
0.795
20.2
5.906
150
7.00
178
Dim D
min
0.488 +0.078/-0.000
12.4 +2/0
0.488 +0.078/-0.000
12.4 +2/0
Diameter Option
7"
DETAIL AA
0.724
18.4
0.724
18.4
See detail AA
B Min
Dim C
0.469 – 0.606
11.9 – 15.4
0.469 – 0.606
11.9 – 15.4
July 1999, Rev. C
Page 7
SuperSOTTM-8 Tape and Reel Data and Package Dimensions, continued
SuperSOT-8 (FS PKG Code 34, 35)
1 : 1
Scale 1:1 on letter size paper
Dimensio ns shown below are in:
inches [mil lime ters ]
Part Weight per unit (gram): 0.0416
September 1998, Rev. A
Page 8
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
2
E
CMOS
TM
FACT™
FACT Quiet Series™
®
FAST
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QFET™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
UHC™
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICA TION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROV AL OF FAIRCHILD SEMICONDUCTOR CORPORA TION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STA TUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
Formative or
In Design
First Production
Full Production
Not In Production
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
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