Datasheet FDMS86103L Datasheet (Fairchild)

FDMS86103L

G

S

S

S

D

D

D

D

5

6

7

8

3

2
1

4

Bottom

Power 56

Top

Pin 1

G

S

S

S

D

D

D

D

N-Channel PowerTrench® MOSFET

100 V, 49 A, 8 mΩ
Features

 Max r
 Max r
 Advanced Package and Silicon combination for low r

and high efficiency

 MSL1 robust package design
 100% UIL tested
 RoHS Compliant

= 8 mΩ at VGS = 10 V, ID = 12 A

DS(on)

= 11 mΩ at VGS = 4.5 V, ID = 10 A

DS(on)

DS(on)

General Description

This N-Channel MOSFET is produced using Fairchild
Semiconductor‘s advanced Power Trench
been especially tailored to minimize the on-state resistance and
yet maintain superior switching performance.

Application

 DC-DC Conversion

December 2010

®

process thant has

FDMS86103L N-Channel Power Trench

®

MOSFET

MOSFET Maximum Ratings T

Symbol Parameter Ratings Units

V

DS

V

GS

I

D

E

AS

P

D

, T

T

J

STG

Drain to Source Voltage 100 V
Gate to Source Voltage ±20 V
Drain Current -Continuous (Package limited) TC = 25 °C 49

-Continuous (Silicon limited) T

-Continuous T

-Pulsed 100
Single Pulse Avalanche Energy (Note 3) 312 mJ
Power Dissipation TC = 25 °C 104
Power Dissipation T
Operating and Storage Junction Temperature Range -55 to +150 °C

= 25 °C unless otherwise noted

A

= 25 °C 81

C

= 25 °C (Note 1a) 12

A

= 25 °C (Note 1a) 2.5

A

A

W

Thermal Characteristics

R

θJC

R

θJA

Thermal Resistance, Junction to Case 1.2
Thermal Resistance, Junction to Ambient (Note 1a) 50

°C/W

Package Marking and Ordering Information

Device Marking Device Package Reel Size Tape Width Quantity

FDMS86103L FDMS86103L Power 56 13 ’’ 12 mm 3000 units

©2010 Fairchild Semiconductor Corporation
FDMS86103L Rev.C

1

www.fairchildsemi.com

FDMS86103L N-Channel Power Trench

Electrical Characteristics T

= 25 °C unless otherwise noted

J

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics

BV

ΔBV
ΔT

I

DSS

I

GSS

DSS

DSS
J

Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V 100 V
Breakdown Voltage Temperature

Coefficient
Zero Gate Voltage Drain Current VDS = 80 V, V
Gate to Source Leakage Current VGS = ±20 V, V

I

= 250 μA, referenced to 25 °C 68 mV/°C

D

= 0 V 1 μA

GS

= 0 V ±100 nA

DS

On Characteristics

V

GS(th)

ΔV
ΔT

r

DS(on)

g

FS

GS(th)

J

Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA 1.0 1.9 3.0 V
Gate to Source Threshold Voltage

Temperature Coefficient

Static Drain to Source On Resistance

I

= 250 μA, referenced to 25 °C -7 mV/°C

D

V

= 10 V, ID = 12 A 6.4 8

GS

= 4.5 V, ID = 10 A 8.4 11

GS

= 10 V , ID = 12 A, TJ = 125 °C 10.6 14

V

GS

Forward Transconductance VDS = 5 V, ID = 12 A 59 S

Dynamic Characteristics

C

iss

C

oss

C

rss

R

g

Input Capacitance
Output Capacitance 469 625 pF
Reverse Transfer Capacitance 22 35 pF

= 50 V, VGS = 0 V,

V

DS

f = 1 MHz

Gate Resistance 1.3 Ω

2790 3710 pF

Switching Characteristics

t

d(on)

t

r

t

d(off)

t

f

Q
Q
Q
Q

g
g
gs
gd

Turn-On Delay Time
Rise Time 7.2 15 ns
Turn-Off Delay Time 35 57 ns

= 50 V, ID = 12 A,

V

DD

V

= 10 V, R

GS

GEN

= 6 Ω

13 23 ns

Fall Time 613ns
Total Gate Charge VGS = 0 V to 10 V
Total Gate Charge VGS = 0 V to 5 V 23 32 nC
Gate to Source Charge 7.5 nC

V

DD

I

= 12 A

D

= 50 V,

43 60 nC

Gate to Drain “Miller” Charge 7 nC

mΩV

®

MOSFET

Drain-Source Diode Characteristics

V

SD

t

rr

Q

rr

Notes:

1. R

is determined with the de vice m ount ed o n a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R

θJA

the user's board design.

2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.

3. Starting TJ = 25 °C, L = 1 mH, IAS = 25 A, VDD = 90 V, VGS = 10 V

©2010 Fairchild Semiconductor Corporation
FDMS86103L Rev.C

Source to Drain Diode Forward Voltage
Reverse Recovery Time

Reverse Recovery Charge 68 108 nC

a. 50 °C/W when mounted on a

2

pad of 2 oz copper.

1 in

V

= 0 V, IS = 2 A (Note 2) 0.70 1.2

GS

= 0 V, IS = 12 A (Note 2) 0.78 1.3

V

GS

= 12 A, di/dt = 100 A/μs

I

F

2

is guaranteed by design while R

θJC

b. 125 °C/W when mounted on a
minimum pad of 2 oz copper.

57 90 ns

V

is determined by

θCA

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FDMS86103L N-Channel Power Trench

012345

0

20

40

60

80

100

VGS = 4 V

VGS = 10 V

VGS = 3 V

VGS = 3.5 V

VGS = 4.5 V

PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX

I

D

, DRAIN CURRENT (A)

VDS, DRA IN T O SOURCE VOLTAGE (V)

020406080100

0

1

2

3

4

5

VGS = 3 V

PULSE DURA TION = 80 μs
DUTY CYCLE = 0.5% MAX

NORMALIZED

DRAIN TO SOURCE ON-RESISTA NCE

I

D

, DRAIN CURRENT (A)

V

GS

= 4.5 V

VGS = 4 V

VGS = 3.5 V

V

GS

= 10 V

-75 -50 -25 0 25 50 75 100 125 150

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

ID = 12 A
V

GS

= 10 V

NORMALIZED

DRAIN TO SOURCE ON-RESISTANCE

T

J

, JUNCTION TEMPERATURE (

o

C)

2345678910

0

10

20

30

40

TJ = 125 oC

ID = 12 A

TJ = 25 oC

V

GS

, GATE TO SOURCE VOLTAGE (V)

r

DS(on)

,

DRAIN TO

SOURCE ON-RESISTANCE

(mΩ)

PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX

12345

0

20

40

60

80

100

TJ = 25 oC

TJ = 150 oC

V

DS

= 5 V

PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX

TJ = -55 oC

I

D

, DRAIN CURRENT (A)

VGS, GATE TO SOURCE VOLTAGE (V)

0.0 0.2 0.4 0.6 0.8 1.0 1.2

0.001

0.01

0.1

1

10

100

TJ = -55 oC

TJ = 25 oC

TJ = 150 oC

V

GS

= 0 V

I

S

, REVERSE DRAIN CURRENT (A)

VSD, BODY DIODE FORWARD VOLTAGE (V)

Typical Characteristics T

Figure 1.

On-Region Characteristics Figure 2.

= 25 °C unless otherwise noted

J

Norma l i z e d O n - Resistanc e

vs Drain Current and Gate Voltage

®

MOSFET

Fig u r e 3. Nor m a lized O n - Resis t a nce

vs Junction Temperature

©2010 Fairchild Semiconductor Corporation
FDMS86103L Rev.C

Figure 5. Transfer Characteristics

Figure 4.

On-Resistance vs Gate to

Source Voltage

Figure 6.

Source to Drain Diode

Forward Voltage vs Source Current

3

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FDMS86103L N-Channel Power Trench

0 5 10 15 20 25 30 35 40 45

0

2

4

6

8

10

ID = 12 A

VDD = 50 V

V

DD

= 25 V

V

GS

, GATE TO SOURCE VOLTAGE (V)

Qg, GATE CHARGE (nC)

VDD = 75 V

0.1 1 10 100

10

100

1000

4000

f = 1 MHz
V

GS

= 0 V

CAPACITANCE (pF)

VDS, DRAIN TO SOURCE VOLTAGE (V)

C

rss

C

oss

C

iss

0.01 0.1 1 10 100200

1

10

100

TJ = 100 oC

TJ = 25 oC

TJ = 125 oC

tAV, TIME IN AVALANCHE (ms)

I

AS

, AVALANCHE CURRENT (A)

25 50 75 100 125 150

0

20

40

60

80

Limited by Package

V

GS

= 4.5 V

R

θJC

= 1.2 oC/W

V

GS

= 10 V

I

D

, DRAIN CURRENT (A)

T

C

, CASE TEMPERATURE (

o

C)

0.01 0.1 1 10 100 500

0.005

0.01

0.1

1

10

100

200

10 s

10 ms

DC

1 s

100 ms

1 ms

I

D

, DRAIN CURRENT (A)

VDS, DRAIN to SOURCE VOLTAGE (V)

THIS A REA IS
LIMITED BY r

DS(on)

SINGLE PULSE
T

J

= MAX RATED

R

θJA

= 125

o

C/W

T

A

= 25

o

C

10

-3

10

-2

10

-1

110

100 1000

0.5

1

10

100

1000

SINGLE PULSE
R

θJA

= 125

o

C/W

T

A

= 25

o

C

P(

PK

), PEAK TRANSIENT POWER (W)

t, PULSE WIDTH (sec)

Typical Characteristics T

Figure 7.

Gate Charge Characteristics Figure 8.

= 25 °C unless otherwise noted

J

Capacitance vs Drain

to Source Voltage

®

MOSFET

Figure 9.

Uncl a m p e d I n duct i v e

Switching Capability

©2010 Fairchild Semiconductor Corporation
FDMS86103L Rev.C

Figure 11.

Operating Area

Forward Bias Safe

Figure 10.

Ma x imum C onti n uous D rain

Current vs Case Temperature

Fi gur e 12. Sing le Pulse Maxi mum

Power Dissipation

4

www.fairchildsemi.com

FDMS86103L N-Channel Power Trench

10

-3

10

-2

10

-1

110

100 1000

0.001

0.01

0.1

1

2

SINGLE PULSE
R

θJA

= 125 oC/W

DUTY CYCLE-DESCENDING ORDER

NORMALIZED THERMAL

IMPEDANCE,

Z

θJA

t, RECTANGULAR PULSE DURATION (sec)

D = 0.5

0.2

0.1

0.05

0.02

0.01

P

DM

t

1

t

2

NOTES:
DUTY FACTOR: D = t

1/t2

PEAK TJ = PDM x Z

θJA

x R

θJA

+ T

A

Typical Characteristics T

Figure 13. Junction-to-Ambient Transient Thermal Response Curve

= 25 °C unless otherwise noted

J

®

MOSFET

©2010 Fairchild Semiconductor Corporation
FDMS86103L Rev.C

5

www.fairchildsemi.com

Dimensional Outline and Pad Layout

C

L

L

C

PKG

PKG

5.00

6.15

C

3.81

3.86

3.61

0.65

0.45

CHAMFER

CORNER

AS PIN #1

IDENT MAY

APPEAR AS

OPTIONAL

TOP VI EW

FRONT VIEW

BOTTOM VIEW

1.27

3.81

1.27

6.61

3.91

4.52

1.27

123

4

8

567

1

4

8

5

LAND PATTERN

RECOMMENDATION

12 3

4

8

7

6

0.10 C A B

0.50

0.40

(8X)

4.01? .30

5

0.77

A

B

(0.34)

0.61

NOTES: UNLESS OTHERWISE SPECIFIED

A) PACKAGE STANDARD REFERENCE:
JEDEC MO-240, ISSUE A, VAR. AA,
DATED OCTOBER 2002.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE BURRS
OR MOLD FLASH. MOLD FLASH OR
BURRS DOES NOT EXCEED 0.10MM.
D) DIMENSIONING AND TOLERANCING PER
ASME Y14.5M-1994.
E) DRAWING FILE NAME: MKT-PQFN08FREV1

SEE

DETAIL A

DETAIL A

SCALE: 2:1

0.05

0.00

0.30

0.20

0.08 C

6.15

5.75

OPTIONAL DRAFT

ANGLE MAY APPEAR

ON FOUR SIDES

OF THE PACKAGE

PIN #1

IDENT MAY

APPE AR AS

OPTIONAL

SEATING
PLANE

0.10 C

1.05

0.95

SIDE VIEW

(3.44)

4.85

0.71

0.44

7



(0.63)

0.59

0.50

0.39

(0.30)

2.25

FDMS86103L N-Channel Power Trench

®

MOSFET

©2010 Fairchild Semiconductor Corporation
FDMS86103L Rev.C

6

www.fairchildsemi.com

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THEREIN, WHICH COVERS THESE PRODUCTS.

FDMS86103L N-Channel Power Trench

®

MOSFET

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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE
EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.

As used here in:

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intended for surgical implant into the body or (b) support or sustain life,
and (c) whose failure to perform when properly used in accordance with
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PRODUCT STATUS DEFINITIONS
Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative / In Design

Preliminary First Production

No Identification Needed Full Production

Obsolete Not In Production

©2010 Fairchild Semiconductor Corporation
FDMS86103L Rev.C

Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.

Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any ti me without
notice to improve design.

Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.

Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.

7

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Rev. I51