Datasheet FDMA905P Datasheet (Fairchild)

FDMA905P

5

1

6

2

3

4

D

D

S

D

D

G

Bottom Drain Contact

D

D

S

G

D

D

Pin 1

Drain

Source

MicroFET 2X2 (Bottom View)

Single P-Channel PowerTrench® MOSFET

-12 V, -10 A, 16 mΩ

FDMA905P Single P-Channel PowerTrench

October 2011

Features

 Max r
 Max r
 Max r
 Low profile - 0.8 mm maximum - in the new package

MicroFET 2X2 mm

 Free from halogenated compounds and antimony oxides
 RoHS Compliant

= 16 mΩ at VGS = -4.5 V, ID = -10 A

DS(on)

= 21 mΩ at VGS = -2.5 V, ID = -8.9 A

DS(on)

= 82 mΩ at VGS = -1.8 V, ID = -4.5 A

DS(on)

General Description

This device is designed specifically for battery charge or load
switching in cellular handset and other ultraportable
applications. It features a MOSFET with low on-state resistance.

The MicroFET 2X2 package offers exceptional thermal
performance for its physical size and is well suited to linear mode
applications.

®

MOSFET

MOSFET Maximum Ratings T

Symbol Parameter Ratings Units

V

DS

V

GS

I

D

P

D

, T

T

J

STG

Thermal Characteristics

R

θJC
θJA

R

θJA

Package Marking and Ordering Information

©2011 Fairchild Semiconductor Corporation
FDMA905P Rev.C1

Device Marking Device Package Reel Size Tape Width Quantity

Drain to Source Voltage -12 V
Gate to Source Voltage ±8 V
Drain Current -Continuous (Note 1a) -10

-Pulsed -40
Power Dissipation (Note 1a) 2.4
Power Dissipation (Note 1b) 0.9
Operating and Storage Junction Temperature Range -55 to +150 °C

Thermal Resistance, Junction to Case 6.9
Thermal Resistance, Junction to Ambient (Note 1a) 52
Thermal Resistance, Junction to Ambient (Note 1b) 145

A95 FDMA905P MicroFET 2X2 7 ’’ 8 mm 3000 units

= 25°C unless otherwise noted

A

A

W

°C/WR

1

www.fairchildsemi.com

FDMA905P Single P-Channel PowerTrench

Electrical Characteristics T

= 25°C unless otherwise noted

J

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics

BV

ΔBV
ΔT

I

DSS

I

GSS

DSS

DSS
J

Drain to Source Breakdown Voltage ID = -250 μA, VGS = 0V -12 V
Breakdown Voltage Temperature

Coefficient

I

= -250 μA, referenced to 25 °C -4.3 mV/°C

D

Zero Gate Voltage Drain Current VDS = -9.6 V, VGS = 0 V -1 μA
Gate to Source Leakage Current VGS = ±8 V, V

= 0 V ±100 nA

DS

On Characteristics

V

GS(th)

ΔV
ΔT

r

DS(on)

g

FS

GS(th)

J

Gate to Source Threshold Voltage VGS = VDS, ID = -250 μA -0.4 -0.7 -1.0 V
Gate to Source Threshold Voltage

Temperature Coefficient

Static Drain to Source On Resistance

I

= -250 μA, referenced to 25 °C 2.6 mV/°C

D

= -4.5 V, ID = -10 A 14 16

V

GS

V

= -2.5 V, ID = -8.9 A 17 21

GS

= -1.8 V, ID = -4.5 A 21 82

V

GS

= -4.5 V , ID = -10 A, TJ = 125 °C 16 21

V

GS

Forward Transconductance VDD = -5 V, ID = -10 A 50 S

Dynamic Characteristics

C

iss

C

oss

C

rss

Input Capacitance
Output Capacitance 490 735 pF
Reverse Transfer Capacitance 437 655 pF

Switching Characteristics

t

d(on)

t

r

t

d(off)

t

f

Q
Q
Q

g
gs
gd

Turn-On Delay Time
Rise Time 11 20 ns
Turn-Off Delay Time 120 192 ns
Fall Time 59 94 ns
Total Gate Charge
Gate to Source Charge 3.5 nC
Gate to Drain “Miller” Charge 4.2 nC

= -6 V, VGS = 0 V,

V

DS

f = 1 MHz

= -6 V, ID = -10 A,

V

DD

V

= -4.5 V, R

GS

= -6 V, ID = -10 A,

V

DD

V

= -4.5 V

GS

GEN

= 6 Ω

2559 3405 pF

11 20 ns

21 29 nC

mΩ

®

MOSFET

Drain-Source Diode Characteristics

V

SD

t

rr

Q

rr

Notes:

1. R

is determined with the devi ce m ount ed on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R

θJA

the user's board design.

2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %.
.

©2011 Fairchild Semiconductor Corporation
FDMA905P Rev.C1

Source to Drain Diode Forward Voltage
Reverse Recovery Time

Reverse Recovery Charge 6.1 12 nC

V

GS

V

GS

= -10 A, di/dt = 100 A/μs

I

F

a. 52 °C/W when mounted on

2

a 1 in

pad of 2 oz copper.

= 0 V , IS = -2 A (Note 2) -0.6 -1.2
= 0 V , IS = -10 A (Note 2) -0.8 -1.2

21 34 ns

is guaranteed by design while R

θJC

b. 145 °C/W when mounted on a
minimum pad of 2 oz copper.

2

θCA

www.fairchildsemi.com

V

is determined by

FDMA905P Single P-Channel PowerTrench

0 0.5 1.0 1.5

0

10

20

30

40

VGS = -3 V

VGS = -2.5 V

-V

DS

, DRAIN TO SOURCE VOLTAGE (V)

-I

D

, DRAIN CURRENT (A)

VGS = -1.8 V

VGS = -4.5 V

PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX

0 10203040

0.5

1.0

1.5

2.0

2.5

VGS = -4.5 V

VGS = -1.8 V

PULSE DURA TION = 80 μs
DUTY CYCLE = 0.5% MAX

NORMALIZED

DRAIN TO SOURCE ON-RESISTANCE

-I

D

, DRAIN CURRENT (A)

VGS = -2.5 V

VGS = -3 V

-75 -50 -25 0 25 50 75 100 125 150

0.8

1.0

1.2

1.4

ID = -10 A
V

GS

= -4.5 V

NORMALIZED

DRAIN TO SOURCE ON-RESISTANC E

T

J

, JUNCTION TEMPERATURE (

o

C)

1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5

0

20

40

60

PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX

TJ = 125 oC

T

J

= 25

o

C

ID = -10 A

r

DS(on)

, DRAIN TO

SOURCE ON-RESISTANCE

(mΩ)

-VGS, GATE TO S OURCE V OLTAGE (V )

0 0.5 1.0 1.5 2.0

0

10

20

30

40

TJ = 150 oC

V

DS

= -5 V

PULSE DURA TION = 80 μs
DUTY CYCLE = 0.5% MAX

TJ = -55 oC

TJ = 25 oC

-I

D

, DRAIN CURRENT (A)

-VGS, GATE TO SOURC E V O LTAGE (V)

0 0.2 0.4 0.6 0.8 1.0 1.2

0.001

0.01

0.1

1

10

100

TJ = -55 oC

TJ = 25 oC

TJ = 150 oC

V

GS

= 0 V

-I

S

, REVERSE DRAIN CURRENT (A)

-VSD, BODY DIODE FORWARD VOLTAGE (V)

Typical Characteristics T

Figure 1.

On-Region Characteristics Figure 2.

= 25 °C unless otherwise noted

J

Norm alized On-Resistance vs

Drain Current and Gate Voltage

®

MOSFET

Figur e 3. No rmali zed On - Resi stanc e

vs Junction Temperature

©2011 Fairchild Semiconductor Corporation
FDMA905P Rev.C1

Figure 5. Transfer Characteristics

Figure 4.

On-Resistance vs Ga te to

Source Voltage

Figure 6.

Source to Drai n Diod e

Forward Voltage vs Source Current

3

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FDMA905P Single P-Channel PowerTrench

0 5 10 15 20 25

0

1.5

3.0

4.5

ID = -10 A

VDD = -7 V

V

DD

= -5 V

-V

GS

, GATE TO SOURCE VOLTAGE (V)

Qg, GATE CHARGE (nC)

VDD = -6 V

0.1 1 10 20

100

1000

10000

f = 1 MHz
V

GS

= 0 V

CAPACITANCE (pF)

-VDS, DRAIN TO SOURCE VOLTAGE (V)

C

rss

C

oss

C

iss

0.01 0.1 1 10 100

0.01

0.1

1

10

100

1 ms

1 s

10 ms

DC

10 s

100 ms

-I

D

, DRAIN CURRENT (A)

-VDS, DRAIN to SOURCE VOLTAGE (V)

THIS AREA IS
LIMITED BY r

DS(on)

SINGLE PULSE
T

J

= MAX RATED

R

θJA

= 145

o

C/W

T

A

= 25

o

C

10

-3

10-210

-1

110

100 1000

0.1

1

10

100

SINGLE PULSE
R

θJA

= 145

o

C/W

T

A

= 25

o

C

P(

PK

), PEAK TRANSIENT POWER (W)

t, PULSE WIDTH (s)

10

-3

10

-2

10

-1

110

100 1000

0.001

0.01

0.1

1

SINGLE PULSE
R

θJA

= 145 oC/W

DUTY CYCLE-DESCENDING ORDER

NORMALIZED THERMAL

IMPEDANCE,

Z

θJA

t, RECTANGULAR PULSE DURATION (s)

D = 0.5

0.2

0.1

0.05

0.02

0.01

2

P

DM

t

1

t

2

NOTES:
DUTY FACTOR: D = t1/t

2

PEAK TJ = PDM x Z

θJA

x R

θJA

+ T

A

Typical Characteristics T

Figure 7.

Gate Charge Characteristics Figure 8.

= 25 °C unless otherwise noted

J

Cap aci tan c e vs Dra in

to Source Voltage

®

MOSFET

Figure 9.

Fo rward Bias Safe

Ope rat ing A rea

©2011 Fairchild Semiconductor Corporation
FDMA905P Rev.C1

Figure 11. Junction-to-Ambient Transient Thermal Response Curve

Figure 1 0. Si ngle Plu se Maximum

4

Power Dissipation

www.fairchildsemi.com

Dimensional Outline and Pad Layout

B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER

A. DOES NOT FULLY CONFORM TO JEDEC REGISTRATION

ASME Y14.5M, 1994

0.10 CAB

0.05

C

RECOMMENDED LAND PATTERN OPT 1

0.10 C

0.08 C
C

2.000

2.000

0.05

0.00

0.10 C

2X

2X

0.8 MAX

SEATING
PLANE

0.10

C

(0.20)

0.33

0.20

1

3

4

6

4

6

3

1

PIN #1 IDENT

0.65

1.30

1.35

(0.47)

1.05

0.40 TYP0.65 TYP

0.25~0.35

1.000

0.800

2.30

1.00

MO-229 DATED AUG/2003

(0.56)

(0.30)

0.66

RECOMMENDED LAND PATTERN OPT 2

46

31

1.35

(0.47)

1.05

0.40 TYP

0.65 TYP

2.30

1.00

0.66

NO DRAIN OR GATE
TRACES ALLOWED IN
THIS AREA

PIN#1 LOCATION

1.05

0.95

D. DRAWING FILENAME: MKT-MLP06Lrev2.

FDMA905P Single P-Channel PowerTrench

®

MOSFET

©2011 Fairchild Semiconductor Corporation
FDMA905P Rev.C1

5

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®

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™

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The following includes registered and unregistered trade marks and service marks, o wned by Fairchild Semicond uctor and/or its g lobal subsidiaries, and i s not
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®

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PRODUCT STATUS DEFINITIONS
Definition of Terms

.

Datasheet Identification Product Status Definition

Advance Information Formativ e / In Desig n

Preliminary First Production

No Identification Needed Full Production

Obsolete Not In Production

©2011 Fairchild Semiconductor Corporation
FDMA905P Rev.C1

Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.

Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.

Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.

Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.

Rev. I58

6

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