Datasheet FDC636P Datasheet (Fairchild Semiconductor)

FDC636P
P-Channel Logic Level Enhancement Mode Field Effect Transistor

General Description Features

These P-Channel logic level enhancement mode power
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This very
high density process is especially tailored to minimize
on-state resistance. These devices are particularly suited
for low voltage applications such as cellular phone and
notebook computer power management and other battery
powered circuits where high-side switching, and low in-line
power loss are needed in a very small outline surface
mount package.

-2.8 A, -20 V. R
R

= 0.130 Ω @ VGS = -4.5 V

DS(ON)

= 0.180 Ω @ VGS = -2.5 V.

DS(ON)

SuperSOTTM-6 package design using copper lead frame for
superior thermal and electrical capabilities.

High density cell design for extremely low R
Exceptional on-resistance and maximum DC current

capability.

May 1998

.

DS(ON)

SOT-23

SuperSOTTM-6

SuperSOTTM-8

SO-8

SOT-223

SOIC-16

S

D

1

6

D

.636

2

5

G

3

3

SuperSOT -6

TM

Absolute Maximum Ratings T

1

pin

= 25°C unless otherwise noted

A

D

D

Symbol Parameter FDC636P Units

V
V
I

D

Drain-Source Voltage -20 V

DSS

Gate-Source Voltage ±8 V

GSS

Drain Current - Continuous (Note 1a) -2.8 A

- Pulsed -11

P

TJ,T

Maximum Power Dissipation (Note 1a) 1.6 W

D

STG

(Note 1b)

0.8

Operating and Storage Temperature Range -55 to 150 °C

THERMAL CHARACTERISTICS

R
R

Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W

θJA

Thermal Resistance, Junction-to-Case (Note 1) 30 °C/W

θJC

4

© 1998 Fairchild Semiconductor Corporation

FDC636P Rev.B

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise noted)

A

Symbol Parameter Conditions Min Typ Max Units
OFF CHARACTERISTICS

BV

∆BV

I

DSS

I

GSSF

I

GSSR

DSS

DSS

Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA -20 V
Breakdown Voltage Temp. Coefficient

/∆T

J

Zero Gate Voltage Drain Current

ID = -250 µA, Referenced to 25 oC
VDS = -16 V, V

GS

= 0 V

-22

-1 µA

TJ = 55oC
Gate - Body Leakage, Forward
Gate - Body Leakage, Reverse

VGS = 8 V, VDS = 0 V
VGS = -8 V, V

DS

= 0 V

mV/oC

-10 µA

100 nA

-100 nA

ON CHARACTERISTICS (Note 2)

V

∆V

R

GS(th)

GS(th)

DS(ON)

Gate Threshold Voltage
Gate Threshold VoltageTemp.Coefficient

/∆T

J

Static Drain-Source On-Resistance

VDS = VGS, ID = -250 µA
ID = -250 µA, Referenced to 25 oC
VGS = -4.5 V, ID = -2.8 A

-0.4 -0.6 -1 V
2

mV/oC

0.11 0.13

TJ = 125oC 0.17 0.21

0.146 0.18

4 S

I
g

D(on)

VGS = -2.5 V, ID = -2.2 A

On-State Drain Current VGS = -4.5 V, VDS = -5 V -11 A

FS

Forward Transconductance

VDS = -5 V, ID = -2.8 A

DYNAMIC CHARACTERISTICS

C

iss

C

oss

C

rss

Input Capacitance

VDS = -10 V, VGS = 0 V,
Output Capacitance f = 1.0 MHz 170 pF
Reverse Transfer Capacitance 45 pF

390 pF

SWITCHING CHARACTERISTICS (Note 2)

t
t

t
t
Q
Q
Q

D(on)

r

D(off)

f

g

gs

gd

Turn - On Delay Time VDD = -10 V, ID = -1 A, 30 48 ns
Turn - On Rise Time

VGS = -4.5 V, R

GEN

= 6 Ω

26 42 ns

Turn - Off Delay Time 8 16 ns
Turn - Off Fall Time 15 27 ns
Total Gate Charge

VDS = -5 V, ID = -2.8 A,

6 8.5 nC
Gate-Source Charge VGS = -4.5 V 0.9 nC
Gate-Drain Charge 1 nC

DRAIN-SOURCE DIODE CHARACTERISTICS

I

S

V

SD

Notes:

1. R

is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R

JA

θ

design while R

a. 78oC/W when mounted on a 1 in
b. 156oC/W when mounted on a minimum pad of 2oz Cu on FR-4 board.

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.

Continuous Source Diode Current -1.3 A
Drain-Source Diode Forward Voltage

is determined by the user's board design.

CA

θ

2

pad of 2oz Cu on FR-4 board.

VGS = 0 V, IS = -1.3 A (Note 2)

-0.77 -1.2 V

is guaranteed by

JC

θ

Ω

FDC636P Rev.B

Typical Electrical Characteristics

DS(ON)

15

V = -4.5V

GS

12

9

6

3

D

-I , DRAIN-SOURCE CURRENT (A)
0

0 1 2 3 4 5

-3.5V

-3.0V

- 2.5V

- 2.0V

-V , DRAIN-SOURCE VOLTAGE (V)

DS

Figure 1. On-Region Characteristics.

1.6

I = - 2.8A

D

V = - 4.5V

1.4

GS

1.2

1

DS(ON)

R , NORMALIZED

0.8

DRAIN-SOURCE ON-RESISTANCE

0.6

-50 -25 0 25 50 75 100 125 150
T , JUNCTION TEMPERATURE (°C)

J

2

1.8

1.6

V = -2.5V

GS

1.4

1.2

DS(ON)

R , NORMALIZED

1

DRAIN-SOURCE ON-RESISTANCE

0.8
0 3 6 9 12 15

-3.0V

-3.5V

-4.0V

-I , DRAIN CURRENT (A)

D

-4.5V

-5.0V

Figure 2. On-Resistance Variation with

Drain Current and Gate Voltage.

0.5

0.4

0.3

0.2

0.1

R ,ON-RESISTANCE(OHM)

0

1 2 3 4 5

-V ,GATE TO SOURCE VOLTAGE (V)

GS

T = 125°C

A

25°C

I = -1.4A

D

Figure 3. On-Resistance Variation

with Temperature.

10

V = -5V

DS

8

6

4

D

-I , DRAIN CURRENT (A)

2

0

0 1 2 3 4

-V , GATE TO SOURCE VOLTAGE (V)

GS

Figure 5. Transfer Characteristics.

T = -55°C

A

25°C

125°C

Figure 4. On-Resistance Variation with

Gate-To-Source Voltage.

10

V = 0V

GS

1

T = 125°C

0.1

J

25°C

-55°C

0.01

0.001

S

-I , REVERSE DRAIN CURRENT (A)

0.0001
0 0.2 0.4 0.6 0.8 1 1.2 1.4

-V , BODY DIODE FORWARD VOLTAGE (V)

SD

Figure 6. Body Diode Forward Voltage

Variation with Source Current
and Temperature.

FDC636P Rev.B

Typical Electrical Characteristics (continued)

5

I = -2.8A

D

4

3

2

1

GS

-V , GATE-SOURCE VOLTAGE (V)
0

0 1 2 3 4 5 6 7 8

Q , GATE CHARGE (nC)

V = -5V

DS

-10V

-15V

g

Figure 7. Gate Charge Characteristics.

20
10

5

RDS(ON) LIMIT

1

0.5

V = -4.5V

0.1

D

0.05

-I , DRAIN CURRENT (A)

0.01

GS

SINGLE PULSE

JA

R =156 °C/W

θ

T = 25°C

A

A

0.1 0.2 0.5 1 2 5 10 30

- V , DRAIN-SOURCE VOLTAGE (V)

DS

10ms

100ms

1s

DC

100us

1ms

1000

600
400

200

100

CAPACITANCE (pF)

50

f = 1 MHz
V = 0 V

GS

20

0.1 0.2 0.5 1 2 5 10 20

-V , DRAIN TO SOURCE VOLTAGE (V)

DS

C

C

C

iss

oss

rss

Figure 8. Capacitance Characteristics.

5

4

3

2

POWER (W)

1

0

0.01 0.1 1 10 100 300
SINGLE PULSE TIME (SEC)

SINGLE PULSE

R =156°C/W

JA

θ

T = 25°C

A

Figure 9. Maximum Safe Operating Area.

Figure 10. Single Pulse Maximum Power

Dissipation.

1

D = 0.5

0.5

0.2

0.2

0.1

0.1

0.05

0.02

r(t), NORMALIZED EFFECTIVE

0.01

TRANSIENT THERMAL RESISTANCE

0.005

0.00001 0.0001 0.001 0.01 0.1 1 10 100 300

0.05

0.02

0.01
Single Pulse

t , TIME (sec)

1

Figure 11. Transient Thermal Response Curve.

Thermal characterization performed using the conditions described in note 1b.
Transient thermal response will change depending on the circuit board design.

R (t) = r(t) * R

JA

θ

R = 156°C/W

JA

θ

P(pk)

t

1

t

2

T - T = P * R (t)

J

A

Duty Cycle, D = t / t

JA

θ

JA

θ

1 2

FDC636P Rev.B