Page 1
November 1997
FDC6322C
Dual N & P Channel , Digital FET
General Description Features
These dual N & P Channel logic level enhancement mode field
effec transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state resistance.
The device is an improved design especially for low voltage
applications as a replacement for bipolar digital transistors in
load switching applications. Since bias resistors are not
required, this dual digital FET can replace several digital
transistors with difference bias resistors.
SOT-23
SuperSOTTM-6
SuperSOTTM-8
N-Ch 25 V, 0.22 A, R
P-Ch 25 V, -0.46 A, R
= 5 Ω @ VGS= 2.7 V.
DS(ON)
= 1.5 Ω @ VGS= -2.7 V.
DS(ON)
Very low level gate drive requirements allowing direct
operation in 3 V circuits. V
GS(th)
< 1.5 V.
Gate-Source Zener for ESD ruggedness.
>6kV Human Body Model
Replace NPN & PNP digital transistors.
SO-8
SOT-223
SOIC-16
Mark: .322
4
5
6
Absolute Maximum Ratings T
Symbol Parameter N-Channel P-Channel Units
V
, VCCDrain-Source Voltage, Power Supply Voltage 25 -25 V
DSS
V
GSS
ID, I
P
D
TJ,T
ESD Electrostatic Discharge Rating MIL-STD-883D
THERMAL CHARACTERISTICS
R
θJA
R
θJC
Gate-Source Voltage, 8 -8 V
, V
IN
Drain/Output Current - Continuous 0.22 -0.46 A
O
Maximum Power Dissipation (Note 1a) 0.9 W
(Note 1b) 0.7
Operating and Storage Tempature Ranger -55 to 150 °C
STG
Human Body Model (100pf / 1500 Ohm)
Thermal Resistance, Junction-to-Ambient (Note 1a) 140 °C/W
Thermal Resistance, Junction-to-Case (Note 1) 60 °C/W
= 25oC unless other wise noted
A
- Pulsed 0.5 -1
6 kV
3
2
1
© 1997 Fairchild Semiconductor Corporation
FDC6322C.Rev B1
Page 2
DMOS Electrical Characteristics (T
= 25 OC unless otherwise noted )
A
Symbol Parameter Conditions
OFF CHARACTERISTICS
BV
DSS
Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA N-Ch 25 V
VGS = 0 V, ID = -250 µA
∆BV
DSS
Breakdown Voltage Temp. Coefficient ID= 250 µA, Referenced to 25 oC N-Ch 25 mV /oC
/∆ T
J
ID = -250 µA, Referenced to 25 oC
I
DSS
I
DSS
I
GSS
Zero Gate Voltage Drain Current VDS= 20 V, VGS= 0 V, N-Ch 1 µ A
Zero Gate Voltage Drain Current
Gate - Body Leakage Current
VDS =-20 V, V
VGS = 8 V, VDS= 0 V
VGS = -8 V, VDS= 0 V P-Ch -100 nA
ON CHARACTERISTICS (Note 2)
∆V
GS(th)
Gate Threshold Voltage Temp. Coefficient
/∆ T
J
ID = 250 µA, Referenced to 25 o C
ID= -250 µA, Referenced to 25 o C P-Ch 2.1
V
GS(th)
Gate Threshold Voltage
VDS = VGS, ID= 250 µA
VDS = VGS, ID= -250 µA P-Ch -0.65 -0.86 -1.5
R
DS(ON)
Static Drain-Source On-Resistance
VGS = 2.7 V, ID = 0.2 A
VGS = 4.5 V, ID = 0.4 A
VGS = -2.7 V, ID = -0.25 A
VGS = -4.5 V, ID = -0.5 A
I
D(ON)
On-State Drain Current
VGS = 2.7 V, VDS = 5 V
VGS = -2.7 V, VDS = -5 V
g
FS
Forward Transconductance
VDS = 5 V, ID= 0.4 A
VDS = -5 V, ID= -0.5 A
DYNAMIC CHARACTERISTICS
C
iss
Input Capacitance N-Channel N-Ch 9.5 pF
VDS= 10 V, VGS= 0 V,
C
oss
Output Capacitance f = 1.0 MHz N-Ch 6
P-Channel P-Ch 35
C
rss
Reverse Transfer Capacitance
VDS= -10 V, VGS = 0V,
f = 1.0 MHz P-Ch 9.5
GS
= 0 V,
Min Typ Max Units
Type
P-Ch -25
P-Ch -22
TJ = 55°C 10
P-Ch -1 µA
TJ = 55°C -10
N-Ch 100 nA
N-Ch -2.1
N-Ch 0.65 0.85 1.5 V
N-Ch 3.8 5
TJ =125°C
6.3 9
3.1 4
P-Ch 1.22 1.5
TJ =125°C
1.65 2.4
0.87 1.1
N-Ch 0.2 A
P-Ch -0.5
N-Ch 0.2 S
P-Ch 0.8
P-Ch 62
N-Ch 1.3
mV / oC
Ω
FDC6322C.Rev B1
Page 3
SWITCHING CHARACTERISTICS (Note 2)
Symbol Parameter Conditions
t
D(on)
Turn - On Delay Time N-Channel N-Ch 5 10 nS
Type
Min Typ Max Units
VDD = 6 V, ID = 0.5 A, P-Ch 7 14
t
r
Turn - On Rise Time
VGs = 4.5 V, R
= 50 Ω
GEN
N-Ch 4.5 10 nS
P-Ch 8 16
t
D(off)
Turn - Off Delay Time P-Channel N-Ch 4 8 nS
VDD = -6 V, ID = -0.5 A, P-Ch 55 90
t
f
Turn - Off Fall Time
V
= -4.5 V, R
Gen
GEN
= 50 Ω
N-Ch 3.2 7 nS
P-Ch 35 55
Q
g
Q
gs
Total Gate Charge N-Channel N-Ch 0.49 0.7 nC
VDS= 5 V, ID = 0.2 A,
P-Ch 1 1.5
Gate-Source Charge VGS = 4.5 V N-Ch 0.22 nC
P- Channel P-Ch 0.32
Q
gd
Gate-Drain Charge
VDS = -5 V, ID = -0.25 A,
VGS = -4.5 V
N-Ch 0.07 nC
P-Ch 0.25
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
Maximum Continuous Drain-Source Diode Forward Current N-Ch 0.5 A
P-Ch -0.5
V
SD
Notes:
1. R
design while R
Drain-Source Diode Forward Voltage VGS = 0 V, IS = 0.5 A
VGS = 0 V, IS = -0.5 A
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
JA
θ
is determined by the user's board design. R
CA
θ
shown below for single device operation on FR-4 in still air.
JA
θ
(Note 2) N-Ch 0.97 1.3 V
(Note 2)
P-Ch -0.88 -1.2
is guaranteed by
JC
θ
a. 140OC/W on a 0.125 in2 pad of
2oz copper.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
b. 180OC/W on a 0.005 in2 of pad
of 2oz copper.
FDC6322C.Rev B1
Page 4
Typical Electrical Characteristics: N-Channel
0.5
0.4
0.3
0.2
0.1
D
I , DRAIN-SOURCE CURRENT (A)
0
0 0.5 1 1.5 2 2.5 3
V = 4.5V
GS
V , DRAIN-SOURCE VOLTAGE (V)
DS
4.0
3.5
3.0
2.7
2.5
2.0
1.5
1.4
V = 2.0V
GS
1.2
2.5
1
0.8
R DS(on) , NORMALIZED
2.7
3.0
DRAIN-SOURCE ON-RESISTANCE
0.6
0 0.1 0.2 0.3 0.4 0.5
I , DRAIN CURRENT (A)
D
Figure 1. On-Region Characteristics . Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
1.8
I = 0.2A
D
1.6
V = 2.7 V
GS
1.4
1.2
1
DS(ON)
R , NORMALIZED
0.8
DRAIN-SOURCE ON-RESISTANCE
0.6
-50 -25 0 25 50 75 100 125 150
T , JUNCTION TEMPERATURE (°C)
J
15
12
25°C
9
6
3
DS(on)
R , ON-RESISTANCE (OHM)
0
2 2.5 3 3.5 4
125°C
V , GATE TO SOURCE VOLTAGE (V)
GS
3.5
4.0
4.5
I = 0.2A
D
Figure 3. On-Resistance Variation
with Temperature.
0.2
V = 5.0V
DS
0.15
0.1
0.05
D
I , DRAIN CURRENT (A)
0
0.5 1 1.5 2 2.5
V , GATE TO SOURCE VOLTAGE (V)
GS
T = -55°C
J
25°C
Figure 5. Transfer Characteristics.
125°C
Figure 4. On Resistance Variation with
Gate-To- Source Voltage.
0.5
V = 0V
GS
0.2
0.1
0.01
0.001
S
I , REVERSE DRAIN CURRENT (A)
0.0001
0.2 0.4 0.6 0.8 1 1.2
V , BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Body Diode Forward Voltage
Variation with Source Current and
T = 125°C
J
25°C
-55°C
SD
Temperature.
FDC6322C.Rev B1
Page 5
Typical Electrical Characteristics: N-Channel (continued)
30
20
10
5
3
CAPACITANCE (pF)
f = 1 MHz
2
V = 0V
GS
1
0.1 0.5 1 2 5 10 25
V , DRAIN TO SOURCE VOLTAGE (V)
DS
C
C
C
iss
oss
rss
Figure 7. Capacitance Characteristics .
1
0.5
0.2
RDS(ON) LIMIT
0.1
0.05
D
I , DRAIN CURRENT (A)
0.02
0.01
V = 2.7V
GS
SINGLE PULSE
R =See note 1b
JA
θ
T = 25°C
A
0.5 1 2 5 10 15 25 35
V , DRAI N-SOURCE VOLTAGE (V)
DS
100ms
1s
DC
1ms
10ms
5
I = 0.2A
D
4
3
2
1
GS
V , GATE-SOURCE VOLTAGE (V)
0
0 0.1 0.2 0.3 0.4 0.5 0.6
Q , GATE CHARGE (nC)
g
V = 5V
DS
10V
15V
Figure 8. Gate Charge Characteristics.
5
4
3
2
POWER (W)
1
0
0.01 0.1 1 10 100 300
SINGLE PULSE TIME (SEC)
SINGLE PULSE
R =See note 1b
JA
θ
T = 25°C
A
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power
Dissipation.
FDC6322C.Rev B1
Page 6
Typical Electrical Characteristics: P-Channel
-1.5
GS
V = -4.5V
-1.25
-1
-3.5
-3.0
-2.7
-2.5
-0.75
-0.5
-0.25
D
I , DRAIN-SOURCE CURRENT (A)
-2.0
-1.5
0
V , DRAIN-SOURCE VOLTAGE (V)
DS
Figure 11. On-Region Characteristics .
1.6
I = -0.25A
D
V = -2.7V
1.4
GS
1.2
1
DS(ON)
R , NORMALIZED
0.8
DRAIN-SOURCE ON-RESISTANCE
0.6
-50 -25 0 25 50 75 100 125 150
T , JUNCTION TEMPERATURE (°C)
J
-1.6
V = -2.0 V
-1.4
GS
-1.2
-1
DS(on)
R , NORMALIZED
-0.8
DRAIN-SOURCE ON-RESISTANCE
-5 -4 -3 -2 -1 0
-0.6
-2.5
-2.7
-3.0
I , DRAIN CURRENT (A)
D
-3.5
-4.0
-4.5
-1 -0.8 -0.6 -0.4 -0.2 0
Figure 12. On-Resistance Variation with
Drain Current and Gate Voltage.
5
25°C
4
3
2
1
DS(on)
R , ON-RESISTANCE (OHM)
0
125°C
V , GATE TO SOURCE VOLTAGE (V)
GS
I = -0.5A
D
-5 -4.5 -4 -3.5 -3 -2.5 -2 -1.5 -1
Figure 13. On-Resistance Variation
with Temperature.
-1
V = -5V
DS
-0.75
-0.5
-0.25
D
I , DRAIN CURRENT (A)
0
V , GATE TO SOURCE VOLTAGE (V)
GS
Figure 15. Transfer Characteristics.
T = -55°C
J
25°C
125°C
Figure 14. On Resistance Variation with
0.5
V = 0V
GS
0.1
T = 125°C
J
25°C
0.01
S
-I , REVERSE DRAIN CURRENT (A)
-3 -2.5 -2 -1.5 -1 -0.5
0.0001
0 0.2 0.4 0.6 0.8 1 1.2
-V , BODY DIODE FORWARD VOLTAGE (V)
SD
-55°C
Figure 16. Body Diode Forward Voltage
Variation with Source Current and
Temperature.
FDC6322C.Rev B1
Page 7
Typical Electrical Characteristics: P-Channel (continued)
5
I = -0.25A
D
4
3
2
1
GS
-V , GATE-SOURCE VOLTAGE (V)
0
0 0.2 0.4 0.6 0.8 1 1.2 1.4
Q , GATE CHARGE (nC)
g
V = 5V
DS
10V
15V
Figure 17. Gate Charge Characteristics.
150
100
60
40
20
f = 1 MHz
CAPACITANCE (pF)
V = 0 V
GS
10
5
0.1 0.2 0.5 1 2 5 10 25
-V , DRAIN TO SOURCE VOLTAGE (V)
DS
C
iss
C
oss
C
rss
2
1
0.3
RDS(ON) LIMIT
0.1
D
-I , DRAIN CURRENT (A)
0.03
0.01
V = -2.7V
GS
SINGLE PULSE
R = See Note 1b
JA
θ
T = 25°C
A
A
0.1 0.2 0.5 1 2 5 10 15 25 35
- V , DRAIN-SOURCE VOLTAGE (V)
DS
10ms
100ms
1s
DC
Figure 18. Maximum Safe Operating Area.
5
4
3
2
POWER (W)
1
0
0.01 0.1 1 10 100 300
SINGLE PULSE TIME (SEC)
SINGLE PULSE
R =See note 1b
JA
θ
T = 25°C
A
1ms
Figure 19. Capacitance Characteristics .
Figure 20. Single Pulse Maximum Power
Dissipation.
1
D = 0.5
0.5
0.2
0.2
0.1
0.1
0.05
r(t), NORMALIZED EFFECTIVE
0.02
TRANSIENT THERMAL RESISTANCE
0.01
0.05
0.02
0.01
Single Pulse
0.0001 0.001 0.01 0.1 1 10 100 300
Figure 21. Transient Thermal Response Curve.
Note: Thermal characterization performed using the conditions described in note 1b.Transient thermal
response will change depending on the circuit board design.
t , TIME (sec)
1
R (t) = r(t) * R
JA
θ
R = See Note 1b
JA
θ
P(pk)
t
1
t
2
T - T = P * R (t)
J
A
Duty Cycle, D = t / t
JA
θ
JA
θ
2
1
FDC6322C.Rev B1