Datasheet FDC6321C Datasheet (Fairchild Semiconductor)

April 1999

FDC6321C
Dual N & P Channel , Digital FET

General Description Features

These dual N & P Channel logic level enhancement mode
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This very
high density process is especially tailored to minimize
on-state resistance. This device has been designed
especially for low voltage applications as a replacement for
digital transistors in load switching applications. Since bias
resistors are not required this dual digital FET can replace
several digital transistors with different bias resistors.

N-Ch 25 V, 0.68 A, R
P-Ch -25 V, -0.46 A, R

= 0.45 Ω @ VGS= 4.5 V

DS(ON)

= 1.1 Ω @ VGS= -4.5 V.

DS(ON)

Very low level gate drive requirements allowing direct
operation in 3 V circuits. V

GS(th)

< 1.0V.

Gate-Source Zener for ESD ruggedness.
>6kV Human Body Model

Replace multiple dual NPN & PNP digital transistors.

SOT-23

SuperSOTTM-6

Mark:.321

SuperSOTTM-8

SO-8

SOT-223

SOIC-16

D2

S1

4

3

D1

5

2

G2

SuperSOT -6

TM

Absolute Maximum Ratings T

Symbol Parameter N-Channel P-Channel Units

V

, VCCDrain-Source Voltage, Power Supply Voltage 25 -25 V

DSS

V

, VINGate-Source Voltage, 8 -8 V

GSS

ID, I

P

D

TJ,T
ESD Electrostatic Discharge Rating MIL-STD-883D

THERMAL CHARACTERISTICS

R

JA

θ

R

JC

θ

Drain/Output Current - Continuous 0.68 -0.46 A

O

- Pulsed 2 -1.5

Maximum Power Dissipation (Note 1a)
(Note 1b)

Operating and Storage Tempature Ranger -55 to 150 °C

STG

Human Body Model (100pf / 1500 Ohm)

Thermal Resistance, Junction-to-Ambient (Note 1a) 140 °C/W
Thermal Resistance, Junction-to-Case (Note 1) 60 °C/W

S2

G1

= 25oC unless other wise noted

A

6

1

0.9 W

0.7

6 kV

© 1999 Fairchild Semiconductor Corporation

FDC6321C.RevB

Electrical Characteristics (T

= 25 OC unless otherwise noted )

A

Symbol Parameter Conditions
OFF CHARACTERISTICS

BV

DSS

Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA N-Ch 25 V

VGS = 0 V, ID = -250 µA P-Ch -25

∆BV

DSS

Breakdown Voltage Temp. Coefficient ID= 250 µA, Referenced to 25 oC N-Ch 26 mV /oC

/∆T

J

ID = -250 µA, Referenced to 25 oC P-Ch -22

I

DSS

I

DSS

I

GSS

Zero Gate Voltage Drain Current VDS= 20 V, VGS= 0 V, N-Ch 1 µA

Zero Gate Voltage Drain Current VDS =-20 V, V

Gate - Body Leakage Current VGS = 8 V, VDS= 0 V N-Ch 100 nA

VGS = -8 V, VDS= 0 V P-Ch -100 nA

ON CHARACTERISTICS (Note 2)

∆V

GS(th)

Gate Threshold Voltage Temp. Coefficient ID = 250 µA, Referenced to 25 o C N-Ch -2.6 mV / oC

/∆T

J

ID= -250 µA, Referenced to 25 o C P-Ch 2.1

V

GS(th)

Gate Threshold Voltage VDS = VGS, ID = 250 µA N-Ch 0.65 0.8 1.5 V

VDS = VGS, ID= -250 µA P-Ch -0.65 -0.86 -1.5

R

DS(ON)

Static Drain-Source On-Resistance VGS = 4.5 V, ID = 0.5 A N-Ch 0.33 0.45

VGS = 2.7 V, ID = 0.25A 0.44 0.6
VGS = -4.5 V, ID = -0.5 A P-Ch 0.87 1.1

VGS = -2.7 V, ID = -0.25 A 1.22 1.5

I

D(ON)

On-State Drain Current VGS = 4.5 V, VDS = 5 V N-Ch 1 A

VGS = -4.5 V, VDS = -5 V P-Ch -1

g

FS

Forward Transconductance VDS = 5 V, ID= 0.5 A N-Ch 1.45 S

VDS = -5 V, ID= -0.5 A P-Ch 0.8

DYNAMIC CHARACTERISTICS

C

iss

Input Capacitance N-Channel N-Ch 50 pF

VDS= 10 V, VGS= 0 V, P-Ch 63

C

oss

Output Capacitance f = 1.0 MHz N-Ch 28 pF

P-Channel P-Ch 34

C

rss

Reverse Transfer Capacitance VDS= -10 V, VGS = 0V, N-Ch 9 pF

f = 1.0 MHz P-Ch 10

Min Typ Max Units

Type

TJ = 55°C 10

= 0 V, P-Ch -1 µA

GS

TJ = 55°C -10

TJ =125°C 0.51 0.72

TJ =125°C 1.21 1.8

Ω

FDC6321C.RevB

Electrical Characteristics (T

= 25 OC unless otherwise noted )

A

SWITCHING CHARACTERISTICS (Note 2)
Symbol Parameter Conditions

t

D(on)

Turn - On Delay Time N-Channel N-Ch 3 6 nS

Type

Min Typ Max Units

VDD = 6 V, ID = 0.5 A, P-Ch 7 20

t

r

Turn - On Rise Time

VGs = 4.5 V, R

= 50 Ω

GEN

N-Ch 8 16 nS
P-Ch 9 18

t

D(off)

Turn - Off Delay Time P-Channel N-Ch 17 30 nS

VDD = -6 V, ID = -0.5 A, P-Ch 55 110

t

f

Turn - Off Fall Time

V

= -4.5 V, R

Gen

GEN

= 50 Ω

N-Ch 13 25 nS
P-Ch 35 70

Q

g

Total Gate Charge N-Channel N-Ch 1.64 2.3 nC

VDS= 5 V, ID = 0.5 A, P-Ch 1.1 1.5

Q

gs

Gate-Source Charge VGS = 4.5 V N-Ch 0.38 nC

P- Channel P-Ch 0.32

Q

gd

Gate-Drain Charge VDS = -5 V, N-Ch 0.45 nC

ID = -0.25 A, VGS = -4.5 V P-Ch 0.25

DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS

I

S

Maximum Continuous Drain-Source Diode Forward Current N-Ch 0.3 A

P-Ch -0.5

V

SD

Drain-Source Diode Forward Voltage VGS = 0 V, IS = 0.5 A

(Note) N-Ch 0.83 1.2 V

TJ =125°C 0.69 0.85

VGS = 0 V, IS = -0.5 A

(Note) P-Ch -0.89 -1.2

TJ =125°C -0.75 -0.85

Notes:

1. R

is the sum of the junction-to-case and case-to-ambient thermal resistance where thecase thermal reference is defined as the solder mounting surface of the drain pins. R

JA

θ

by design while R

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.

is determined by the user's board design.

CA

θ

is guaranteed

JC

θ

a. 140OC/W on a 0.125 in2 pad of

2oz copper.

b. 180OC/W on a 0.005 in2 of pad

of 2oz copper.

FDC6321C.RevB

Typical Electrical Characteristics: N-Channel

1.5

V = 4.5V

GS

3.5

1.2

0.9

0.6

0.3

D

I , DRAIN-SOURCE CURRENT (A)

0

3.0

2.7

0 0.5 1 1.5 2

2.5

2.0

1.5

V , DRAIN-SOURCE VOLTAGE (V)

DS

Figure 1. On-Region Characteristics.

1.6

I =0.5 A

D

V = 4.5 V

1.4

GS

1.2

1

DS(ON)

R , NORMALIZED

0.8

DRAIN-SOURCE ON-RESISTANCE

0.6

-50 -25 0 25 50 75 100 125 150
T , JUNCTION TEMPERATURE (°C)

J

2

V = 2.0V

GS

1.5

, NORMALIZED

1

DS(on)

R

DRAIN-SOURCE ON-RESISTANCE

0.5
0 0.2 0.4 0.6 0.8 1 1.2

2.5

2.7

3.0

I , DRAIN CURRENT (A)

D

3.5

Figure 2. On-Resistance Variation with

Drain Current and Gate Voltage.

2

1.6

1.2

0.8

0.4

DS(on)

0

R , ON-RESISTANCE (OHM)

1 1.5 2 2.5 3 3.5 4 4.5 5

V , GATE TO SOURCE VOLTAGE (V)

125°C

25°C

GS

4.5

ID= 0.5A

Figure 3. On-Resistance Variation

with Temperature.

1

V = 5.0V

DS

0.8

0.6

0.4

D

I , DRAIN CURRENT (A)

0.2

0

0 0.5 1 1.5 2 2.5

V , GATE TO SOURCE VOLTAGE (V)

GS

T = -55°C

J

25°C

125°C

Figure 5. Transfer Characteristics.

Figure 4. On Resistance Variation with

Gate-To-Source Voltage.

1

0.1

V = 0V

GS

T = 125°C

J

25°C

0.01

0.001

S

I , REVERSE DRAIN CURRENT (A)

0.0001
0 0.2 0.4 0.6 0.8 1 1.2

V , BODY DIODE FORWARD VOLTAGE (V)

SD

-55°C

Figure 6. Body Diode Forward Voltage

Variation with Source Current and

Temperature.

FDC6321C.RevB

Typical Electrical Characteristics: N-Channel (continued)

5

I = 0.5A

D

4

3

2

1

GS

V , GATE-SOURCE VOLTAGE (V)

0

0 0.4 0.8 1.2 1.6 2

5

1

RDS(ON) LIMIT

0.3

0.1

D

I , DRAIN CURRENT (A)

0.03

0.01

SINGLE PULSE

R = See note 1b

JA

θ

0.1 0.2 0.5 1 2 5 10 20 40

Q , GATE CHARGE (nC)

g

V = 4.5V

GS

T = 25°C

A

V , DRAI N-SOURCE VOLTAGE (V)

DS

V = 5V

DS

1s

DC

10ms

100ms

15V

1ms

100µs

10V

150
100

50

20

f = 1 MHz

CAPACITANCE (pF)

V = 0V

10

GS

5

0.1 0.5 1 2 5 10 25
V , DRAIN TO SOURCE VOLTAGE (V)

DS

C

iss

C

oss

C

rss

Figure 8. Capacitance Characteristics.Figure 7. Gate Charge Characteristics.

5

4

3

2

POWER (W)

1

0

0.01 0.1 1 10 100 300
SINGLE PULSE TIME (SEC)

SINGLE PULSE

R =See note 1b

JA

θ

T = 25°C

A

Figure 9. Maximum Safe Operating Area.

Figure 10. Single Pulse Maximum Power

Dissipation.

FDC6321C.RevB

Typical Electrical Characteristics: P-Channel

1.5

GS

V = -4.5V

1.25

1

0.75

0.5

0.25

D

-I , DRAIN-SOURCE CURRENT (A)
0

0 1 2 3 4 5

-3.5

-3.0

-2.7

-2.5

-2.0

-V , DRAIN-SOURCE VOLTAGE (V)

DS

Figure 11. On-Region Characteristics.

1.6

I = -0.5A

D

V = -4.5V

1.4

GS

1.2

1

DS(ON)

0.8

R , NORMALIZED

0.6

DRAIN-SOURCE ON-RESISTANCE (OHMS)

-50 -25 0 25 50 75 100 125 150
T , JUNCTION TEMPERATURE (°C)

J

-1.5

2.4

2.2
2

V = -2.0 V

GS

1.8

1.6

1.4

DS(ON)

1.2

R , NORMALIZED

1

DRAIN-SOURCE ON-RESISTANCE

0.8

0 0.2 0.4 0.6 0.8 1

-2.5

-2.7

-3.0

-I , DRAIN CURRENT (A)

D

-3.5

Figure 12. On-Resistance Variation with

Drain Current and Gate Voltage.

5

4

3

2

1

DS(on)

R , ON-RESISTANCE (OHM)

0

25°C

125°C

V , GATE TO SOURCE VOLTAGE (V)

GS

-4.0

-4.5

ID=-0.5A

-5-4.5-4-3.5-3-2.5-2-1.5-1

Figure 13. On-Resistance Variation

with Temperature.

-1

V = -5 V

DS

-0.75

-0.5

-0.25

D

I , DRAIN CURRENT (A)

0

V , GATE TO SOURCE VOLTAGE (V)

GS

T = -55°C

J

Figure 15. Transfer Characteristics.

25°C

125°C

Figure 14. On Resistance Variation with

Gate-To- Source Voltage.

0.5

V = 0V

GS

0.1

T = 125°C

J

25°C

0.01

0.001

S

-I , REVERSE DRAIN CURRENT (A)

0.0001

-3-2.5-2-1.5-1-0.5

0 0.2 0.4 0.6 0.8 1 1.2

-V , BODY DIODE FORWARD VOLTAGE (V)

SD

-55°C

Figure 16. Body Diode Forward Voltage

Variation with Source Current and

Temperature.

FDC6321C.RevB

Typical Electrical Characteristics: P-Channel (continued)

5

I = -0.5A

D

4

3

2

1

GS

-V , GATE-SOURCE VOLTAGE (V)
0

0 0.3 0.6 0.9 1.2 1.5 1.8

Q , GATE CHARGE (nC)

V = -5V

DS

-10V

-15V

g

Figure 17. Gate Charge Characteristics.

2

1

RDS(ON) LIMIT

0.3

0.1

V = -4.5V

D

-I , DRAIN CURRENT (A)

0.03

0.01

0.1 0.2 0.5 1 2 5 10 20 40

GS

SINGLE PULSE

R = See Note 1b

JA

θ

A

T = 25°C

A

- V , DRAIN-SOURCE VOLTAGE (V)

DS

DC

10ms

100ms

1s

1ms

150
100

C

50

20

CAPACITANCE (pF)

10

f = 1 MHz
V = 0 V

GS

5

0.1 0.3 0.5 1 5 10 15 25

-V , DRAIN TO SOURCE VOLTAGE (V)

DS

iss

C

oss

C

rss

Figure 18. Capacitance Characteristics.

5

4

3

2

POWER (W)

1

0

0.01 0.1 1 10 100 300
SINGLE PULSE TIME (SEC)

SINGLE PULSE

R =See note 1b

JA

θ

T = 25°C

A

Figure 19. Maximum Safe Operating Area.

Figure 20. Single Pulse Maximum Power

Dissipation.

1

D = 0.5

0.5

0.2

0.2

0.1

0.1

0.05

r(t), NORMALIZED EFFECTIVE

0.02

TRANSIENT THERMAL RESISTANCE

0.01

0.05

0.02

0.01
Single Pulse

0.0001 0.001 0.01 0.1 1 10 100 300

Figure 21. Transient Thermal Response Curve.

Note: Thermal characterization performed using the conditions described in note 1b.Transient thermal
response will change depending on the circuit board design.

t , TIME (sec)

1

R (t) = r(t) * R

JA

θ

R = See Note 1b

JA

θ

P(pk)

t

1

t

2

T - T = P * R (t)

J

A

Duty Cycle, D = t / t

JA

θ

JA

θ

2

1

FDC6321C.RevB

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Box Dimension (mm) 184x187x47 343x343x64
Max qty per Box 9,000 20,000
Weight per unit (gm) 0.0158 0.0158
Weight per Reel (kg) 0.1440 0.4700

Note/Comments

184mm x

Pizza Box for

184mm x 47mm

Standard Option

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Standard

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TNR

7” Dia

F63TNR
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D87Z

TNR

13”

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Trailer

Pin 1

SSOT-6 Unit Orientation

343mm x 342mm x 64mm

Intermediate box for D87Z Option

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 1998 Fairchild Semiconductor Corporation

Trailer Tape
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Components

Leader Tape
390mm minimum

December 1998, Rev. B

SuperSOTTM-6 Tape and Reel Data and Package Dimensions, continued

SSOT-6 Embossed Carrier Tape
Configuration: Figure 3.0

T

K0

Wc

B0

P0

D0

E1

F

W

E2

Tc

A0

P1

D1

User Direction of Feed

Dimensions are in millimeter

Pkg type

SSOT-6

(8mm)

Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481

rotational and lateral movement requirements (see sketches A, B, and C).

SSOT-6 Reel Configuration: Figure 4.0

A0 B0 W D0 D1 E1 E2 F P1 P0 K0 T Wc Tc

3.23

3.18

8.0

1.55

1.00

1.75

6.25

+/-0.10

+/-0.10

20 deg maximum component rotation

Sketch A (Side or Front Sectional View)

Component Rotation

+/-0.3

+/-0.05

+/-0.125

+/-0.10

B0

3.50

min

+/-0.05

20 deg maximum

A0

Sketch B (Top View)

Component Rotation

W1 Measured at Hub

4.0
+/-0.1

Typical
component
cavity
center line

Typical
component
center line

Dim A

Max

4.0
+/-0.1

1.37

0.255
+/-0.150

5.2
+/-0.3

0.5mm
maximum

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0.5mm
maximum

Sketch C (Top View)

Component lateral movement

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Dim A

max

Tape Size

8mm 7” Dia

8mm 13” Dia

Reel

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Dim N

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7” Diameter Option

B Min

Dim C

13” Diameter Option

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W2 max Measured at Hub

W3

Dim D

min

DETAIL AA

Dimensions are in inches and millimeters

Dim A Dim B Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL)

7.00

0.059

177.8

13.00
330

1.5

0.059

1.5

512 +0.020/-0.008
13 +0.5/-0.2

512 +0.020/-0.008
13 +0.5/-0.2

0.795

2.165550.331 +0.059/-0.000

20.2

0.795

4.00

20.2

100

8.4 +1.5/0

0.331 +0.059/-0.000

8.4 +1.5/0

0.567

14.4

0.567

14.4

0.311 – 0.429

7.9 – 10.9

0.311 – 0.429

7.9 – 10.9

December 1998, Rev. B

[

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 1998 Fairchild Semiconductor Corporation

September 1998, Rev. A

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not intended to be an exhaustive list of all such trademarks.

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TM

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®

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PRODUCT STATUS DEFINITIONS
Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Obsolete

Formative or
In Design

First Production

Full Production

Not In Production

This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.

This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
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This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
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