10
FA531X series
(2) Startup circuit connected to rectified line
This method is not suitable for FA531X, especially concerned 
with re-startup operation just after power-off or startup which 
AC input voltage goes up slowly. Fig. 21 shows a startup 
circuit that a startup resistor R
A is connected to rectified line
directly. 
The period from power-on to startup is determined by R
A, RB
and CA. RA, RB and CA must be designed to satisfy the 
following equations.
dVcc/dt(V/s)= 
(1/C
A)•{( VIN –Vccon )/RA– Vccon/RB–Iccst } >
1.8/(Cs(µF))..........................................(8)
R
A(kΩ) < ( VIN– 9.2(V) )/{ 0.4(mA) + ( 9.2(V)/RB(kΩ) ) }....(9)
V
IN : 앀2 • (AC input effective voltage)
After power-off, once VCC falls down below OFF threshold 
voltage, V
CC rises up again and re-startup occurs while the
capacitor C
1 is discharged until approximately zero because
V
CC voltage rises up by the current flowing RA.
This operation is repeated several times. 
After the repeated operation, IC stops in the condition that V
CC
voltage is equal to Vccon (=ON threshold) because capacitor 
C
1 is discharged gradually and the decreased VCC inclination
is out of the condition required by equation (4). After that, restartup by power-on can not be guaranteed even when 
equation (8) is satisfied. 
The image of that the startup is impossible is shown in Fig. 22. 
It is necessary to startup IC that supply current Icc(startup) to 
VCC is over 4mA in the condition of Tj < 100°C during Vcc is 
kept at Vccon(ⱌ16V, balance state at Vccon after the repeated 
operation.
Icc(start-up) > 4mA
at Vcc=Vccon, Tj<100°C, after power-off
This balance state that startup is impossible tends to occur at 
higher temperature. If power-on is done when Vcc is not kept 
at Vccon (for example:power-off is done and after enough time 
that C1 is discharged until Vcc can not be pulled up to Vccon), 
the IC can startup in the condition given by equation(8).
In some cases, such as when the load current of power supply 
is changed rapidly, you may want to prolong the hold time of 
the power supply output by means of maintaining Vcc over the 
off threshold. 
For this purpose, connect diode D4 and electrolytic capacitor 
C4 as shown in Fig. 23. This prolongs the hold time of the 
power supply voltage Vcc regardless of the period from poweron to startup.
Fig. 21 Startup circuit example(2)
Fig. 22 A image of waveform when re-startup is impossible
Fig. 23 Startup circuit example(3)
Startup is impossible
Power ON
Power OFF
Vccon
Vccoff
Startup is impossible (dVcc/dt <1.8/Cs 
just before Vcc reaches Vccon).
Icc>4mA is necessary for startup at 
Tj <100°C and dVcc/dt=0.