Page 1
EDGE HIGH-PERFORMANCE PRODUCTS
COMPA
HIGH LEVEL
LOW LEVEL
COMPB
LOAD
CVA
VINP
CVB
SW0
SW0 EN*
SW1
SW1 EN*
SW2
SW2 EN*
VBB
VH VL
DOUT
VTT
DATA
DATA *
DVR EN
DVR EN*
VTT EN
VTT EN*
Edge647
Pin Electronics Driver, Window
Comparator, and Switch Matrix
Description
The Edge647 is an integrated trinary driver, window
comparator, and switch matrix pin electronics solution
manufactured in a wide voltage CMOS process. It is
designed for automatic test equipment and
instrumentation where cost, functional density, and power
are all at a premium.
The tristatable driver is capable of generating 3 levels one for a logic high, one for a logic low, and one for either
a termination voltage or a special programming voltage.
The on-board window comparator effectively determines
whether the DUT is in a high, low, or intermediate state.
The switches are included to allow such functions as PMU,
pull up, and pull down connections.
The Edge647 is intended to offer an extremely low leakage,
low cost, low power, small footprint, per pin solution for
100 MHz and below pin electronics applications. It is a
higher performance, pin and functionally compatible
version of the Edge646.
Applications
• Low Cost Automatic Test Equipment
Functional Block Diagram
Features
• Pin Compatible with the Edge646
• 100 MHz Operation
• 12V I/O Range
• Programmable Output Levels
• Flex In digital Inputs (Technology Independent)
• Three Level Driver
• Extremely Low Leakage Currents (~0 nA)
• Small Footprint (32 Pin, 7 mm X 7 mm,
TQFP Package)
Revision 2 / October 27, 2000
1
www.semtech.com
Page 2
EDGE HIGH-PERFORMANCE PRODUCTS
PIN Description
emaNniP#niPnoitpircseD
revirD
*ATAD/ATAD92,03revirdehtfosutatswol/hgihehtsenimretedtahttupnilatigiD
*NERVD/NERVD13,23 ehtsecalpro,revirdehtselbasiddnaselbanetahttupnilatigiD
*NETTV/NETTV1,2 revirdehtsecalp*NERVDrehtehwsenimretedtahttupnilatigiD
TUOD32.tuptuOrevirD
TTV,LV,HV62,52,42 lacigolafolevelegatlovehttestahtstupnigolanadereffubnU
Edge647
.delbanesitinehw
.etatsTTVehtnirevird
.levelTTVehtotsevirdylevitcaroetatsecnadepmihgihani
.tuptuorevirdehttaTTVro,0,1
BBV01-elgnisllarofdlohserhtehtsehsilbatsehcihwniptupnigolanA
rotarapmoC
PNIV91.tupnirotarapmocwodniwgolanA
BVC,AVC81,02rofsleveldlohserhtehttestahtstupnirotarapmocCDgolanA
BPMOC,APMOC8,5.stuptuorotarapmoclatigiD
LEVELWOL
LEVELHGIH
xirtaMhctiwS
*NE!WS,*NE0WS
*NE2WS
0WS
1WS
2WS
DAOL71.sehctiwsgolanaehtotTUDehtstcennoctahtniptupnI
seilppuSrewoP
7
6
31,11
51
21
41
61
.slangistupnilatigiddedne
.rotarapmocwodniwhet
foslevelhgihdnawollatigidehthsilbatsetahtstupniegatloV
.stuptuorotarapmoceht
.3dna,2,1,0sehctiwsetavitcatahtstupnielbitapmocLTT
0hctiwS
1hctiwS
2hctiwS
CCV72,22,3.ylppusrewopgolanaevitisoP
EEV82,12,4.ylppusrewopgolanaevitageN
C/N9 .)gnitaolfevael(niptcennoCoN
22000 Semtech Corp.
www.semtech.com
Page 3
EDGE HIGH-PERFORMANCE PRODUCTS
PIN Description (continued)
32-Pin, 7mm x 7mm TQFP
DVR EN
DVR EN*
DATA
Edge647
DATA *
VEE
VCC
VTT
VL
VTT EN*
VTT EN
VCC
VEE
COMPA
HIGH LEVEL
LOW LEVEL
COMPB
SW1
25
17
SW2
SW2 EN*
VH
DOUT
VCC
VEE
CVA
VINP
CVB
LOAD
1
9
N/C
VBB
SW0
SW0 EN*
SW1 EN*
2000 Semtech Corp.
3
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Page 4
EDGE HIGH-PERFORMANCE PRODUCTS
Circuit Description
Driver Description
Edge647
The Edge647 driver supports three distinct programmable
driver
levels; high, low, and termination, and high
impedance. There are no restrictions between any of these
three levels in that all three may vary independently over
the entire operating voltage range between VCC and VEE.
The DVR EN*, DATA, and VTT EN pins are digital inputs
that control the driver (see Table 1). With DVR EN* low,
DATA determines whether the driver will force VH or VL at
DOUT. With DVR EN* high, VTT EN* controls whether the
driver goes into high impedance or drives VTT.
*NERVDNETTVATADTUOD
10X ZiH
11X TTV
0X0 LV
0X1 HV
Table 1. Driver Truth Table
VH, VL, and VTT
VH, VL, and VTT define the logical “1”, “0”, and
“termination” levels of the driver and can be adjusted
anywhere over the range spanned by VCC to VEE. There
is no restriction between VH, VL, and VTT, in that they can
all vary independently over the entire voltage range
determined by the power supply levels.
the DUT. In this environment, the driver can withstand a
short to any legal DUT voltage for an indefinite period.
In a low impedance application with no additional output
series resistance, care must be exercised and systems
should be designed to check for this condition and tristate
the driver if a short is detected.
The driver does NOT have on-chip short circuit protection
or limitation circuitry.
VBB
VBB is an analog input which establishes the threshold
for all single ended digital input signals. If SW0 EN*,
SW1 EN*, or SW2 EN* are more positive than VBB, these
inputs are a digital “1". Conversely, if they are more
negative than VBB, they are a “0".
All digital inputs are wide voltage comparator inputs, so
they are technology independent. By establishing the
appropriate VBB level for the switch control inputs, and
the appropriate differential input levels for the driver digital
control inputs, the Edge647 may be driven by TTL, ECL,
CMOS, or any custom level circuitry.
SW0 EN*
SW1 EN*
The VH, VL, and VTT inputs are unbuffered in that they
also provide the driver output current, so the sources of
these voltages must have ample current drive capability.
While VTT is referred to as the termination voltage, it may
also be used as a very high “programming” level on many
memory devices.
Driver Output Protection
The Edge647 is designed to operate in a functional testing
environment where a controlled impedance (typically 50
Ω) is maintained between the pin electronics and the DUT.
In general, there will be an external resistor at the driver
output which series terminates the transmission line to
42000 Semtech Corp.
SW2 EN*
VBB
Figure 1. Driver Digital Inputs
DATA
DATA *
DVR EN*
DVR EN
VTT EN
VTT EN*
Figure 2. Driver Differential Digital Inputs
www.semtech.com
Page 5
EDGE HIGH-PERFORMANCE PRODUCTS
Edge647
Circuit Description
(continued)
Receiver Functionality
The Edge647 supports an on-board window comparator.
CVB and CVA are high impedance analog inputs which
establish the threshold voltages. COMPA and COMPB are
the digital outputs which reflect the real time status of
VINP. Table 2 summarizes the relationship between the
threshold levels, VINP, and the output signals.
PNIVAPMOCBPMOC
AVC<PNIV
AVC>PNIV
BVC<PNIV
BVC>PNIV
Table 2. Comparator Truth Table
1
0
X
X
X
X
0
1
Comparator Outputs
The comparator outputs are 50 Ω output impedance nontristatable drivers designed to cleanly drive 50 Ω
transmission lines without requiring any external series
termination resistors. Input pins LOW LEVEL and HIGH
LEVEL establish the logic 0 and 1 levels respectively. In
normal operation, LOW LEVEL would be connected to
ground and HIGH LEVEL would be connected to a system
VDD supply, producing CMOS digital swings at the output.
Load
The Edge647 provides a total of 3 analog switches.
Individual switches vary in both their on resistance and
their on/off time (see Table 4).
Like the driver digital inputs, the switch matrix control inputs
SW0-3 EN* are technology independent as VBB
determines their threshold level. The switch control is
documented in Table 3.
stupnIlortnoCsutatS
1=*NE0WS
0=*NE0WS
1=*NE1WS
0=*NE1WS
1=*NEWS
0=*NE2WS
Table 3. Switch Matrix Truth Table
hctiwStuoRemiTffO/nO
0WS05 Ω sn001
1WS05 Ω sn001
2WS05 Ω sn001
detcennocsid0WS
detcennoc0WS
detcennocsid1WS
detcennoc1WS
detcennocsid2WS
detcennoc2WS
However, the comparator outputs are technology
independent in that they can drive PECL, 3V CMOS, ECL,
LV CMOS, GTL, and custom levels by varying LOW LEVEL
and HIGH LEVEL. For example, should a 3V swing be
desired, HIGH LEVEL could be connected to a 3.0V power
supply.
Notice that HIGH LEVEL and LOW LEVEL provide both the
voltage level and the current for the comparator outputs.
HIGH LEVEL and LOW LEVEL may be varied between +5V
and -2V.
2000 Semtech Corp.
Table 4. Switch Matrix Characteristics
Do NOT leave any digital input pins floating.
5
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Page 6
EDGE HIGH-PERFORMANCE PRODUCTS
Application Information
Edge647
Power Supplies Decoupling
A .1 µF capacitor is recommended between VCC and
VEE.
In addition, solid VCC and VEE planes are recommended
to provide a low inductance path for the power supply
currents. These planes will reduce any inductive supply
drops associated with switching currents on the power
supply pins. If solid planes are not possible, then wide
power busses are preferable.
VH, VL, and VTT Decoupling
As the VH, VL, and VTT inputs are unbuffered and must
supply the driver output current, decoupling capacitors
for these inputs are recommended in proportion to the
amount of output current the application requires. In
general, a surge current of 50 mA (5V swings series
terminated with 50 Ω into a 50Ω transmission line) are
the maximum dynamic output currents the driver should
see. The decoupling capacitors should be able to provide
this current for the duration of the round trip time between
the pin electronics and the DUT, and then recharge
themselves before the next such transition would occur.
Once this condition is satisfied, the VH, VL, and VTT supply
voltages are more responsible for establishing the DC levels
associated with each function and recharging the
capacitors, rather than providing the actual dynamic
currents required to drive the DUT transmission line.
Ideally, VH, VL, and VTT would each have a dedicated
power layer on the PC board for the lowest possible
inductance power supply distribution.
Power Supply Rules
1) VEE ≤ All I/O Pins ≤ VCC
2) VCC ≥ 0V
3) VEE ≤ 0V
Power Up Sequencing
Latchup Protection
The Edge647 has several power supply requirements to
protect the part in power supply fault situations, as well
as during power up and power down sequences. VCC
must remain greater than or equal to VDD (external supply
for the digital logic) at all times. Both VCC and VDD must
always be positive (above ground), and VEE must always
be negative (at or below ground).
The three diode configuration shown in Figure 3 should
be used on a once-per-board basis.
VCC
VDD
1N5820 or
Equivalent
VEE
Figure 3.
Power Supply Protection Scheme
gure 5.
Warning: It is extremely important that the voltage on any
device pin does not exceed the range of VEE –0.5V to VCC
+0.5V at any time, either during power up, normal
operation, or during power down. Failure to adhere to this
requirement could result in latchup of the device, which
could be destructive if the system power supplies are
capable of supplying large amounts of current. Even if the
device is not immediately destroyed, the cumulative
damage caused by the stress of repeated latchup may
affect device reliability.
1) VCC (all other inputs @ ground)
2) VEE (all other inputs @ ground)
3) Digital Inputs
Analog Inputs
VH, VL, VTT
62000 Semtech Corp.
www.semtech.com
Page 7
EDGE HIGH-PERFORMANCE PRODUCTS
Package Information
TOP VIEW
b
3
e
Edge647
4
D
D / 2
E
4
0.20 C A – B D
E1
5 7
N / 4 TIPS
4 X
E1 / 2
BOTTOM VIEW
7
5
D1
O
O
C
E / 2
SEE DETAIL "A"
D1 / 2
4 X
2000 Semtech Corp.
0.20 H A – B D
7
www.semtech.com
Page 8
EDGE HIGH-PERFORMANCE PRODUCTS
Package Information (continued)
Edge647
DETAIL "A"
3
e / 2
b
SECTION C–C
8 PLACES
11 / 13
0.05
M
A
– H –
– C –
SEE DETAIL "B"
2
0.10/ / C
ccc
Notes:
1. All dimensions and tolerances conform to ANSI
Y14.5-1982.
2. Datum plane -H- located at mold parting line and
coincident with lead, where lead exits plastic
body at bottom of parting line.
3. Datums A-B and -D- to be determined at
centerline between leads where leads exit
plastic body at datum plane -H-.
4. To be determined at seating plane -C-.
5. Dimensions D1 and E1 do not include mold
protrusion.
6. “N” is the total # of terminals.
7. These dimensions to be determined at the
datum plane -H-.
8. Package top dimensions are smaller than
bottom dimensions and top of package will
not overhang bottom of package.
9. Dimension b does not include dambar
protrusion. Allowable dambar protrusion
shall be 0.08 mm total in excess of the b
dimension at maximum material condition.
Dambar cannot be located on the lower
radius or the foot.
10. Controlling dimension: millimeter.
11. Maximum allowable die thickness to be
assembled in this package family is 0.30
millimeters.
12. This outline conforms to JEDEC publication 95,
registration MO-136, variations AC, AE, and AF.
–
S
0.05
0.09 / 0.20 0.09 / 0.16
DATUM
PLANE
A1
– H –
A2
ddd M
9
b
b
1
WITH LEAD FINISH
BASE METAL
JEDEC VARIATION
All Dimensions in Millimeters
Min. Nom. Max. Note
A 1.60
A1 0.05 0.10 0.15
A2 1.35 1.40 1.45
D 9.00 BSC. 4
D1 7.00 BSC. 7,8
E 9.00 BSC. 4
E1 7.00 BSC. 7,8
L 0.45 0.60 0.75
M 0.15
N32
e 0.80 BSC.
b 0.30 0.37 0.45 9
b1 0.30 0.35 0.40
ccc 0.10
ddd 0.20
DETAIL "B"
C.08
R. MIN.
0.20 MIN.
1.00 REF.
SSDC
A – B
Lead
Cross Section
AC
0 MIN.
0.08 / 0.20 R.
0.25
GAUGE PLANE
0 – 7
L
82000 Semtech Corp.
www.semtech.com
Page 9
EDGE HIGH-PERFORMANCE PRODUCTS
Recommended Operating Conditions
retemaraPlobmySniMpyTxaMstinU
ylppuSrewoPgolanAevitisoPCCV6821V
ylppuSrewoPgolanAevitageNEEV5-4-3-V
ylppuSrewoPgolanAlatoTEEV-CCV9 21V
leveLhgiHtuptuOrotarapmoCLEVELHGIH2-5+V
leveLwoLtuptuOrotarapmoCLEVELWOL2-5+V
erutarepmeTnoitcnuJJT521+
Edge647
o
C
Absolute Maximum Ratings
retemaraPlobmySniMpyTxaMstinU
ylppuSrewoPgolanAlatoTEEV-CCV0 31V
ylppuSrewoPgolanAevitisoPCCV0 31V
ylppuSrewoPgolanAevitageNEEV6-0V
segatloVtupnIgolanA5.-EEV5.+CCVV
stupnIlatigiD5.-EEV5.+CCVV
erutarepmeTegarotS56-051+
erutarepmeTnoitcnuJJT051+
erutarepmeTgniredloS 062
erutarepmeTgnitarepOtneibmAAT55-521+
o
C
o
C
o
C
o
C
Stresses above listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at these or any other conditions above
those listed in the operational sections of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
2000 Semtech Corp.
9
www.semtech.com
Page 10
EDGE HIGH-PERFORMANCE PRODUCTS
DC Characteristics
Driver/Receiver Characteristics
retemaraPlobmySniMpyTxaMstinU
revirD
Edge647
segatloVtuptuOrevirDelbammargorP
gniwStuptuOrevirD
tnerruCtuptuOrevirDCDCDtuoI05-05+Am
ecnadepmItuptuOtuoR125213
ecnaticapaCniPTUDtuoC31Fp
)1etoN(tnerruCegakaeLZiHkaelI04An
rotarapmoC
egatloVtupnIPNIVEEVCCVV
)4etoN(tnerruCegakaeLtupnISAIBI02An
ecnaticapaCtupnIniC4Fp
)2etoN(egatloVtesffOSOV57-57+Vm
)2etoN(dlohserhTrevieceR 0.2+EEV0.1-CCVV
)1etoN(tnerrucsaiBdlohserhTBVC,AVC001An
leveLhgiHtuptuOlatigiDLEVELHGIH2-5V
TTV,LV,HV
LV-HV
TTV-HV
LLV-TTV
EEV
CCV-EEV
CCV-EEV
CCV-EEV
CCV
EEV-CCV
EEV-CCV
EEV-CCV
V
V
V
V
Ω
leveLwoLtuptuOlatigiDLEVELWOL2-5V
)3etoN(ecnadepmItuptuOlatigiDtuoR047465
evirDtnerruCtuptuOlatigiDxamI05-05+Am
)2WS,1WS,0WS(sehctiwSgolanA
ecnatsiseRnOnoR047445
egnaRegatloVEEVCCVV
)1etoN(tnerruCegakaeLZiHDAOL 04An
gnitaRtnerruCCD03-03+Am
ecnaticapaCWS 01Fp
ylppuSrewoPlatoT
tnerruCylppuSevitisoPtnecseiuQ
tnerruCylppuSevitageNtnecseiuQ
)4etoN(egakaeLlatoT
)DAOL+PNIV+TUOD( 001An
)1etoN(ecnaticapaClatoT
)DAOL+PNIV+TUOD( 72Fp
CD_CCI
CD_EEI
57
501-
59
59-
501
57-
Ω
Ω
Am
Am
102000 Semtech Corp.
www.semtech.com
Page 11
EDGE HIGH-PERFORMANCE PRODUCTS
DC Characteristics (continued)
Digital Inputs
DATA / DATA*, DVR EN* / DVR EN, VTT EN / VTT EN*
SW0 EN*, SW1 EN*, SW2 EN*, SW3 EN*
retemaraPlobmySniMpyTxaMstinU
egatloVhgiHtupnI*tupnI-tupnI8.5V
egatloVwoLtupnItupnI-*tupnI8.5V
tnerruCtupnINII00.1Aµ
Edge647
ecnaticapaCtupnIATAD
NEVRD
NETTV
egnaRegatloVtupnIlatigiD*TUPNI,TUPNI*0.2-0.5+V
dlohserhTtupnIlatigiDBBV4.1-4.4V
8
8
8
Fp
Fp
Fp
*-2V or (VEE + 2.0V), whichever is more positive.
Note 1: This parameter is guaranteed by design and characterization. Production testing is performed
against a ± 250 nA limit.
Note 2: Measured at 0V.
Note 3: Measured at HIGH LEVEL = +3.3V, LOW LEVEL = 0V.
Note 4: Production tested at +5V and 0V against ± 10 nA limits. Also tested at VCC and VEE against ± 250
nA limits.
2000 Semtech Corp.
11
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Page 12
EDGE HIGH-PERFORMANCE PRODUCTS
AC Characteristics
retemaraPlobmySniMpyTxaMstinU
revirD
)3etoN(yaleDnoitagaporP
TUODotNIATAD
TUODotNETTV
)5etoN()ZiHotevitcA(TUODot*NERVD
)5etoN()evitcAotZiH(TUODot*NERVD
)4etoN(gnihctaMyaleDporPTTVotATAD
)gniwSV3(htdiWesluPmuminiM 45sn
)6etoN(etaRelggoTxamF001zHM
)4,1setoN(semiTllaF/esiRtuptuOTUOD
)%08-%02(gniwSV1
)%09-%01(gniwSV3
)%09-%01(gniwSV5
Edge647
4
5
5
5
2-
0.1
6
7
7
7
2.1
5.1
0.2
01
11
11
11
2+
6.1
0.2
5.3
sn
sn
sn
sn
sn
sn
sn
sn
∆ )4etoN()V8.1(evirdrevO.svdpT
∆ .svdpT ∆ /rT ∆ )4etoN(stupnIlatigiD@fT
∆ )4etoN()zHM001=<(ycneuqerF.svdpT
rotarapmoC
∆ )4etoN()zHM001=<(ycneuqerF.svdpT
∆ evirdrevO.svdpT
)4,1setoN(toohsrednU/toohsrevOtuptuOTUOD
))Vm05+%2gniwS(gniwSV3(
)4etoN(srorrEllaFdpT,esiRdpT
)4,2setoN(stuptuOlatigiDrotarapmoC
)%09-%01(emiTesiR
)%09-%01(emitllaF
BPMOC,APMOCotPNIV
htdiWesluPmuminiM 45sn
)6etoN(etaRelggoTxamF001zHM
)7,4setoN(noigeRytniatrecnUrotarapmoC 52-52+Vm
evirdrevOVm004
evirdrevOVm002
srorrEllaFdpT,esiRdpT 0.2sn
xirtaMhctiwS
ffO/nOhctiwSot*NE2,1,0WS85206sn
rt
ft
dpT5
5.1
5.1
7
011
001
05
002
0.2
5.2
5.2
11
002sp
0.1
0.2
Vm
sp
sp
sp
sn
sn
sn
sn
sn
sn
Note 1: Into 1M of 50Ω transmission line terminated with 1KΩ and 5 pF with the proper series termination
resistor.
Note 2: LOW LEVEL = 0V, HIGH LEVEL = 3.3V.
Note 3: Measured at 2.5V with VH = +5V, VL = 0V.
Note 4: Guaranteed by design and characterization. This parameter is not tested in production.
Note 5: Tested with a 30 mA load.
Note 6: Guaranteed by characterization. This parameter is tested in production against 40 MHz limits.
Note 7: The region around the threshold where the comparator may have difficulty resolving the input state.
122000 Semtech Corp.
www.semtech.com
Page 13
EDGE HIGH-PERFORMANCE PRODUCTS
AC Characteristics (continued)
INPUT
OUTPUT
Tpd Rise Tpd Fall
| Tpd Rise – Tpd Fall | ≤ 2.0 ns
Figure 4. Tpd Rise, Tpd Fall Errors
Edge647
Ordering Information
Contact Information
rebmuNledoMegakcaP
FTA746EPFQTniP-23
FTA746MVEnoitaulavE746egdE
eludoM
Semtech Corporation
Edge High-Performance Division
10021 Willow Creek Rd., San Diego, CA 92131
Phone: (858)695-1801 FAX (858)695-2633
2000 Semtech Corp.
13
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