Datasheet DN3145N8 Datasheet (Supertex)

DN3145

Initial Release

N-Channel Depletion-Mode Vertical DMOS FETs

Features

❏ High input impedance
❏ Low input capacitance
❏ Fast switching speeds
❏ Low on resistance
❏ Free from secondary breakdown
❏ Low input and output leakage

Applications

❏ Normally-on switches
❏ Solid state relays
❏ Converters
❏ Constant current sources
❏ Power supply circuits
❏ Telecom

Absolute Maximum Ratings

Drain-to-Source Voltage BV
Drain-to-Gate Voltage BV
Gate-to-Source Voltage ± 20V
Operating and Storage Temperature -55°C to +150°C
Soldering Temperature* 300°C

*

Distance of 1.6 mm from case for 10 seconds.

DSX

DGX

Advanced DMOS Technology

These depletion-mode (normally-on) transistors utilize an ad­vanced vertical DMOS structure and Supertex’s well-proven
silicon-gate manufacturing process. This combination produces
devices with the power handling capabilities of bipolar transis­tors and with the high input impedance and positive temperature
coefficient inherent in MOS devices. Characteristic of all MOS
structures, these devices are free from thermal runaway and
thermally-induced secondary breakdown.

Supertex’s vertical DMOS FET s are ideally suited to a wide range
of switching and amplifying applications where high breakdown
voltage, high input impedance, low input capacitance, and fast
switching speeds are desired.

Package Options

D

G

D

S

TO-243AA

(SOT-89)

Note: See Package Outline section for dimensions.

Ordering Information

BV

/R

DSX

BV

DGX

450V 60Ω 120mA DN3145N8

* Same as SOT-89. Product shipped on 2000 piece carrier tape reels.

08/22/02

Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.

DS(ON)

(max) (min) TO-243AA*

I

DSS

Order Number / Package

1

Product marking for TO-243AA:

DN1M❋

Where ❋ = 2-week alpha date code

Thermal Characteristics

DN3145

Package ID (continuous)* ID (pulsed) Power Dissipation

θ

jc

θ

ja

IDR*I

@ TA = 25°C °C/W °C/W

TO-243AA 100mA 300mA 1.3W

ID (continuous) is limited by max rated Tj.

*

†

Mounted on FR4 board, 25mm x 25mm x 1.57mm. Significant P

increase possible on ceramic substrate.

D

†

34 97

†

100mA 300mA

Electrical Characteristics (@ 25°C unless otherwise specified)

Symbol Parameter Min Typ Max Unit Conditions

BV

DSX

V

GS(OFF)

∆V

GS(OFF)

I

GSS

I

D(OFF)

I

DSS

R

DS(ON)

∆R

DS(ON)

G

FS

C

ISS

C

OSS

C

RSS

t

d(ON)

t

r

t

d(OFF)

t

f

V

SD

t

rr

Notes:

1. All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)

2. All A.C. parameters sample tested.

Drain-to-Source 450 V VGS = -5V, ID = 100µA
Breakdown Voltage

Gate-to-Source OFF Voltage –1.5 –3.5 V VDS = 15V, ID= 10µA
Change in V

with Temperature 4.5 mV/°CVDS = 15V, ID= 10µA

GS(OFF)

Gate Body Leakage Current 100 nA VGS = ± 20V, VDS = 0V
Drain-to-Source Leakage Current 1.0 µAVGS = -5.0V, VDS = Max Rating

1.0 mA V

= -5.0V, VDS = 0.8 Max Rating

GS

T

= 125°C

A

Saturated Drain-to-Source Current 120 mA VGS = 0V, VDS = 15V
Static Drain-to-Source 60 Ω VGS = 0V, ID = 100mA

ON-State Resistance
Change in R
Forward Transconductance 140 m ID = 100mA, VDS = 10V

with Temperature 1.1 %/°CVGS = 0V, ID = 100mA

DS(ON)

Ω

Input Capacitance 120 VGS = -5.0V, VDS = 25V
Common Source Output Capacitance 15 pF f = 1.0 MHz
Reverse Transfer Capacitance 10
Turn-ON Delay Time 10 VDD = 25V,
Rise Time 15 ns ID = 100mA,
Turn-OFF Delay Time 20 R

GEN

= 25Ω
Fall Time 35
Diode Forward Voltage Drop 1.8 V VGS = -5.0V, ISD = 100mA
Reverse Recovery Time 800 ns VGS = -5.0V, ISD = 100mA

DRM

Switching Waveforms and Test Circuit

0V

INPUT

10%

-10V

V

DD

OUTPUT

0V

©2002 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.

t

d(ON)

t

(ON)

10%

90%

t

r

90%

t

d(OFF)

t

(OFF)

t

F

90%

10%

2

PULSE

GENERATOR

R

gen

INPUT

1235 Bordeaux Drive, Sunnyvale, CA 94089

TEL: [phone] • FAX: [phone]

V

DD

R

L

OUTPUT

D.U.T.

08/22/02

www.supertex.com