Triple Low Noise Amplifier/Dual Mixer
Description
The CXG1130AER is a triple low noise amplifier/
dual mixer. This IC is designed using the Sony’s GaAs
J-FET process.
Features
• Single 3V power supply operation
• 2-pin control by the on-chip logic circuit
• High gain: Gp = 16.5dB (LNA typ.)
Gc = 10dB (MIX typ.)
• Low noise figure: NF = 1.5 to 1.6dB (LNA typ.)
NF = 4.5dB (MIX typ.)
• Low LO input power operation
• 24-pin VQFN small package
Applications
800MHz/1.5GHz Japan digital cellular phones (PDC)
Structure
GaAs J-FET MMIC
Absolute Maximum Ratings (Ta = 25°C)
• Supply voltage VDD 4.5 V
• Input power PIN +13 dBm
• Current consumption IDD 15 mA
• Operating temperature Topr –35 to +85 °C
• Storage temperature Tstg –65 to +150 °C
Recommended Operating Conditions
• Supply voltage VDD 2.7 to 3.3 V
• Control voltage VCTL (H) 2.4 to 3.3 V
CXG1130AER
24 pin VQFN (Plastic)
VCTL (L) 0 to 0.3 V
GaAs MMICs are ESD sensitive devices. Special handling precautions are required.
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
– 1 –
E01827-PS
Block Diagram and Pin Configuration
RFin1
CAP1
CAP2
RFin2
CAP3
12 11 10 9 8 7
CXG1130AER
RFin3
RFout1
GND
CTL1
MIXin1
GND
V
DD
_LO1
Recommended Evaluation Circuit
V
DD
_LNA800MHz-band
1nF
4.7kΩ
2.7nH 22nH
1nF
10nH
18nH
33nH
LNAout_810/885MHz
MIXin_810/885MHz
DD
_LO680/755MHz
V
LOin_680/755MHz
100pF
CTL1
10nH
13
14
15
16
17
18
6
5
4
3
2
1
RFout2
GND
CTL2
GND
OPT
MIXin2
19 20 21 22 23 24
LOin1
GND
LOin2
IFout
GND
_LO2
DD
V
LNAin_885MHz LNAin_810MHz LNAin_1490MHz
2.7nH
27nH
100pF
22pF 12pF
15nH
V
DD
22nH
8.2nH
12 11 10 9 8 7
6.8nH
13
14
15
16
17
18
6
5
4
3
2
1
8.2nH
19 20 21 22 23 24
39nH
8.2nH
5pF
8.2nH
1nF
_LNA1500MHz-band
1nF
3.9nH
LNAout_1490MHz
100pF
4.7kΩ
CTL2
470kΩ
MIXin_1490MHz
1nH
2.7nH
DD
_LO1360MHz
V
LOin_1360MHz
3.9nH
V
DD
_MIX
– 2 –
150nH
IFout_130MHz
100pF
100nH
1nF
CXG1130AER
Electrical Characteristics
The normalized values are those when the Sony’s recommended evaluation board is used.
800MHz Band Low Noise Amplifier
Conditions: Unless otherwise specified, VDD = 3.0V, VCTL (H) = 3.0V, VCTL (L) = 0V, fRF1 = 885MHz, fRF2 = 810MHz
(Ta = 25°C)
Item
Current
consumption
Control current
Power gain
Noise figure
Input IP3
Isolation
1
∗
Conversion from the IM3 suppression ratio for two-wave input: fRFoffset = 100kHz, PRF = –30dBm.
Symbol
IDD
ICTL1
Gp
NF
IIP3
ISO
Path
—
—
RFIN1 → RFOUT1
RFIN2 → RFOUT1
RFIN1 → RFOUT1
RFIN2 → RFOUT1
RFIN1 → RFOUT1
RFIN2 → RFOUT1
RFOUT1 → RFIN1
RFOUT1 → RFIN2
Frequency
—
—
—
—
fRF1
fRF2
fRF1
fRF2
fRF1
fRF2
fRF1
fRF2
VCTL1
H
L
H
L
H
L
H
L
H
L
H
L
H
L
VCTL2
L
L
L
L
L
L
L
L
L
L
L
L
L
L
Min.
—
—
—
–5
14.5
—
—
14.5
—
—
–10
–11
22
18
Typ.
2.0
2.0
60
0
16.5
–20
–25
16.5
1.3
1.5
–6.5
–8
26
22
Max.
2.65
2.65
90
5
18.5
–15
–20
18.5
2.0
2.0
—
—
—
—
Unit
mA
µA
dB
dB
dBm
dB
Measurement
condition
When no
signal
When a
small signal
1
∗
When a
small signal
1.5GHz Band Low Noise Amplifier
Conditions: Unless otherwise specified, VDD = 3.0V, VCTL (H) = 3.0V, VCTL (L) = 0V, fRF3 = 1490MHz
Item
Current
consumption
Symbol
IDD
Path
—
Frequency
—
VCTL1
—
VCTL2
H
Min.
—
Typ.
2.9
Max.
3.7
Measurement
Unit
condition
mA
When no
signal
Control current
Power gain
Noise figure
Input IP3
Isolation
1
∗
Conversion from the IM3 suppression ratio for two-wave input: fRFoffset = 100kHz, PRF = –30dBm.
ICTL2
Gp
NF
IIP3
ISO
—
RFIN3 → RFOUT2
RFIN3 → RFOUT2
RFIN3 → RFOUT2
RFOUT2 → RFIN3
—
fRF3
fRF3
fRF3
fRF3
—
—
—
—
—
H
—
H
14
H
—
H
–9
H
20
90
16
1.6
–6
23
120
18
2.1
—
—
µA
dB
dB
dBm
dB
When a
small signal
1
∗
When a
small signal
– 3 –
(Ta = 25°C)
800MHz Band Mixer
Conditions: Unless otherwise specified, VDD = 3.0V, VCTL (H) = 3.0V, VCTL (L) = 0V,
fRF1 = 885MHz, fRF2 = 810MHz, fLO = fRF – 130MHz, PLO = –15dBm
CXG1130AER
(Ta = 25°C)
Item
Current consumption
Symbol
IDD
RF frequency
—
VCTL1
—
VCTL2
L
Min.
—
Typ.
5
Max.
6.5
Measurement condition
Unit
mA
When no signal
Control current
Conversion gain
ICTL2
Gc
—
fRF1
fRF2
—
—
—
L
–5
L
9
0
10
5
11.5
µA
dB
L
8.5
9.5
11
When a small signal
Noise figure
NF
fRF2
fRF1
fRF1
Input IP3
IIP3
fRF2
fRF1
LO → RF leak
Plk
fRF2
1
∗
Conversion from the IM3 suppression ratio for two-wave input: fRFoffset = 100kHz, PRF = –25dBm.
—
—
—
—
—
—
L
—
5
6.5
dB
L
—
L
–1
L
–0.5
L
—
4
+2
+2.5
–21
5.5
—
—
–18
dBm
1
∗
fLO = 755MHz
dBm
L
—
–24
–21
fLO = 680MHz
1.5GHz Band Mixer
Conditions: Unless otherwise specified, VDD = 3.0V, VCTL (H) = 3.0V, VCTL (L) = 0V,
fRF3 = 1490MHz, fLO = 1360MHz, PLO = –15dBm (Ta = 25°C)
Item
Current consumption
Symbol
IDD
RF frequency
—
VCTL1
—
VCTL2
H
Min.
—
Typ.
5.5
Max.
7.5
Measurement condition
Unit
mA
When no signal
Control current
Conversion gain
ICTL2
Gc
—
fRF3
—
—
H
—
H
9
90
10
120
11.5
µA
dB
When a small signal
Noise figure
Input IP3
NF
IIP3
fRF3
fRF3
—
—
H
—
H
–1
4.5
+2
6
—
dB
dBm
1
∗
LO → RF leak
1
∗
Conversion from the IM3 suppression ratio for two-wave input: fRFoffset = 100kHz, PRF = –25dBm.
Plk
fRF3
—
H
—
–24
–21
dBm
fLO = 1360MHz
Operation Logic
VCTL1VCTL2
H
L
—
LNA1 (800MHz_U) LNA2 (800MHz_L)
L
L
H
ON
OFF
OFF
OFF
ON
OFF
LNA3 (1.5GHz) MIX1 (800MHz) MIX2 (1.5GHz)
OFF
OFF
ON
ON
ON
OFF
– 4 –
OFF
OFF
ON
Example of Representative Characteristics
1. CXG1130AER frequency characteristics of main items in LNA block (25°C)
[Condition] VDD = 3V, 800MHz_L (Pin 9 input → Pin 13 output): VCTL1 = 0V, VCTL2 = 0V,
800MHz_U (Pin 12 input → Pin 13 output): VCTL1 = 3V, VCTL2 = 0V,
1500MHz (Pin 7 input → Pin 6 output): VCTL2 = 3V
Gp and NF are those when a small signal is input. The input IP3 is converted from the IM3 suppression
ratio for two-wave input: fRFoffset = 100kHz, PRF = –30dBm.
CXG1130AER
19
18
17
Gp [dB]
16
15
14
780 800 820 840
2.5
2.0
1.5
NF [dB]
1.0
800MHz (L)
800MHz (L)
Power gain Gp
800MHz (U)
860 880 900 920
f [MHz]
Noise figure NF
800MHz (U)
19
18
17
Gp [dB]
16
15
14
1440 1460
2.5
2.0
1.5
NF [dB]
1.0
Power gain Gp
1500MHz
1480 1500 1520 1540
f [MHz]
Noise figure NF
1500MHz
0.5
0
780 800 820 840
–2
–4
–6
–8
Input IP3 [dBm]
–10
–12
780 800 820 840
800MHz (L)
860 880 900 920
f [MHz]
Input IP3
800MHz (U)
860 880 900 920
f [MHz]
– 5 –
0.5
0
1440 1460
–2
–4
–6
–8
Input IP3 [dBm]
–10
–12
1440 1460
1480 1500 1520 1540
f [MHz]
Input IP3
1500MHz
1480 1500 1520 1540
f [MHz]
CXG1130AER
2. CXG1130AER frequency characteristics of main items in MIX block (25°C)
[Condition] VDD = 3V, fLO = fRF – 130MHz, PLO = –15dBm, 800MHz: VCTL2 = 0V, 1500MHz: VCTL2 = 3V
Gc and NF are those when a small signal is input. The input IP3 is converted from the IM3
suppression ratio for two-wave input: fRFoffset = 100kHz, PRF = –25dBm.
12
11
10
Gc [dB]
9
8
7
780 800 820 840
10
8
6
NF [dB]
4
Conversion gain Gc
800MHz
860 880 900 920
f [MHz]
Noise figure NF
800MHz
12
11
10
Gc [dB]
9
8
7
1440 1460
10
8
6
NF [dB]
4
Conversion gain Gc
1500MHz
1480 1500 1520 1540
f [MHz]
Noise figure NF
1500MHz
2
0
780 800 820 840
4
3
2
1
Input IP3 [dBm]
0
–1
780 800 820 840
860 880 900 920
f [MHz]
Input IP3
800MHz
860 880 900 920
f [MHz]
– 6 –
2
0
1440 1460
4
3
2
1
Input IP3 [dBm]
0
–1
1440 1460
1480 1500 1520 1540
f [MHz]
Input IP3
1500MHz
1480 1500 1520 1540
f [MHz]
Recommended Evaluation Board
A15
CTL2
LO15
G1130
MIX
LO8
CTL1
A8
CXG1130AER
LNA_800MHz out
MIX_800MHz in
LO_800MHz in
LO_1500MHz in
LNA_800MHz (U) in
VDD_LNA800MHz
CTL1
VDD_Lo800MHz
LNA_800MHz (L) in LNA_1500MHz in
VDD_LNA1500MHz
CTL2
VDD_Lo1500MHz
VDD_MIX
SONY
G1130
LNA_1500MHz out
MIX_1500MHz in
IFout
Glass fabric-base 4-layer epoxy board
Thickness of film between layers 1 and 2: 0.2mm
Dimension: 50mm × 66mm
MIX
LO8
CTL1
LNA8
Enlarged Diagram of External Circuit Block
L10
C3
L6
C5
L9
L8
L9
L11
L12
C4
C5
L2
L6
C2
C4
L5
L3
L5
C1
LO15
L5
L14
L13
C4
LNA15
CTL2
L1 = 1nH
L2
L7
R1
L5
C5
C4
L3
L4
C5
L2
L1
L2 = 2.7nH
L3 = 3.9nH
L4 = 6.8nH
L5 = 8.2nH
L6 = 10nH
L7 = 15nH
L8 = 18nH
L9 = 22nH
L10 = 27nH
L11 = 33nH
L12 = 39nH
L13 = 100nH
C1 = 5pF
C2 = 12pF
C3 = 22pF
C4 = 100pF
C5 = 1nF
R1 = 470Ω
L14 = 150nH
Series resistors of 4.7kΩ to CTL1 and
CTL2 are attached on the solder side of
C5
the board.
– 7 –
Package Outline Unit: mm
CXG1130AER
24PIN VQFN(PLASTIC)
4.0
3.6
0.9 ± 0.1
S
C
0.7
0.05
0.6 ± 0.1
1318
19
A
12
B
4.78
(0.39)
PIN 1 INDEX
24
1
0.05
0.4
7
6
x 4
S
A-B
0.2
S
C
C 0.6
x 4
S
A-B
0.2
M
A-B
S
C
C
0.03 ± 0.03 (∗1)
(Stand Off)
1.0
45˚
0.2 ± 0.01
(0.15)
0.225 ± 0.03
SONY CODE
EIAJ CODE
JEDEC CODE
VQFN-24P-03
LEAD SPECIFICATIONS
ITEM
SPEC.
LEAD MATERIAL COPPER ALLOY
SOLDER PLATING Sn-Bi Bi:1-4wt%
LEAD TREA TMENT THICKNESS 5-18µm
Solder Plating
TERMINAL SECTION
PACKAGE STRUCTURE
PACKAGE MATERIAL
LEAD TREA TMENT
LEAD MATERIAL
PACKAGE MASS
– 8 –
0.13 ± 0.025
+ 0.09
– 0.03
0.14
EPOXY RESIN
SOLDER PLATING
COPPER ALLOY
0.04g
Sony Corporation
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