Datasheet BTS737S3 Datasheet (lnfineon)

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Datasheet BTS737S3

Smart High-Side Power Switch

Four Channels: 4 x 35mΩ

Advanced Current Sense

Product Summary Package

Operating Voltage V

Active channels one four parallel
On-state Resistance RON
Nominal load current I

Current limitation I

General Description

• N channel vertical power MOSFET with charge pump, ground referenced CMOS compatible input and

diagnostic feedback, monolithically integrated in Smart SIPMOS

• Providing embedded protective functions

5.0 ...40V

bb(on)

35mΩ 9mΩ

5.4A 11.1A

L(NOM)

40A 40A

L(SCr)

P-DSO-28



technology.

Applications

• µC compatible high-side power switch with diagnostic feedback for 12V and 24V grounded loads

• All types of resistive and capacitve loads

• Most suitable for loads with high inrush currents, so as lamps

• Replaces electromechanical relays, fuses and discrete circuits

Basic Functions

• Very low standby current

• Improved electromagnetic compatibility (EMC)

• CMOS compatible input

• Stable behaviour at undervoltage

• Wide operating voltage range

Protection Functions

• Short circuit protection

• Overload protection

• Current limitation

• Thermal shutdown

• Reverse battery protection with external resistor

• Overvoltage protection with external resistor (incl. load

dump)

• Loss of ground protection

• Electrostatic discharge protection (ESD)

Diagnostic Function

• Proportional load current sense (with defined fault signal

during thermal shutdown and current limit)

Block Diagram

Vbb

IN1

IS1
IS2

IN2

IN3

IS3
IS4

IN4

Logic
Channel 1
Channel 2

Logic
Channel 3
Channel 4

GND

Load 4

Load 1

Load 2

Load 3

Infineon technologies 1 of 15 2004-Feb-19

Datasheet BTS737S3

p

g

Functional diagram

overvoltage

rotection

internal
volta

e

logic

gate

control

+

charge

pump

IN1

IS1

ESD

temperature

sensor

Proportional sense

current

. channel 1

IN2

IS2

GND1/2

IN3

IS3

IN4

IS4

GND3/4

control and protection circuit

control and protection circuit

control and protection circuit

of

channel 2

of

channel 3

of

channel 4

current limit

clamp for

inductive load

VBB

OUT1

LOAD

OUT2

OUT3

OUT4

Infineon technologies 2 2004-Feb-19

Datasheet BTS737S3

Pin Definitions and Functions

Pin Symbol Function

1, 7, 8,

14,
15, 28

Vbb

Positive power supply voltage. Design the

wiring for the simultaneous max. short circuit
currents from channel 1 to 4 and also for low

thermal resistance
4 IN1
3 IN2

Input 1,2, 3,4 activates channel 1,2,3,4 in case

of logic high signal
11 IN3
10 IN4

25,26,27
22,23,24
19,20,21
16,17,18

5 IS1
6 IS2
12 IS3

OUT1
OUT2
OUT3
OUT4

Output 1,2,3,4 protected high- s ide pow er output

of channel 1,23,4. Design the wiring for the

max. short circuit current

Diagnostic feedback 1 .. 4 of channel 1 to 4

Providing a sense current, proportional to the

load current
13 IS4

2 GND1/2
9 GND3/4

Ground of chip 1 (channel 1,2)
Ground of chip 2 (channel 3,4)

Pin configuration

(top view)

V

1 • 28 V

bb

GND1/2 2 27 OUT1

IN2 3 26 OUT1
IN1 4 25 OUT1
IS1 5 24 OUT2
IS2 6 23 OUT2
Vbb 7 22 OUT2

Vbb 8 21 OUT3

GND3/4 9 20 OUT3

IN4 10 19 OUT3
IN3 11 18 OUT4
IS3 12 17 OUT4
IS4 13 16 OUT4
Vbb 14 15 Vbb

bb

Infineon technologies 3 2004-Feb-19

Datasheet BTS737S3

Maximum Ratings at T

= 25°C unless otherwise specified

j

Parameter Symbol Values Unit

Supply voltage (overvoltage protection see page 6) Vbb 40 V
Supply voltage for full short circuit protection1)

T

= -40 ...+150°C

j,start

Vbb 36 V

Load current (Short-circuit current, see page 6) IL I

5

Load dump protection3) V

4)

R

= 2 Ω, td = 400 ms; IN = low or high,

I

LoadDump

= VA + Vs, VA = 13.5 V

V

Load dump

)

60 V

each channel loaded with RL = 4.7 Ω,
Operating temperature range
Storage temperature range
Power dissipation (DC)6) Ta = 25°C:
(all channels active)

T

= 85°C:

a

Maximal switchable inductance, single pulse
V

= 12V, T

bb

j,start

= 150°C6),

IL = 4.0 A, EAS = 0.8J, 0 Ω one channel:
IL = 6.0 A, E
IL = 9.5 A, E

= 1.0J, 0 Ω two parallel channels:

AS

= 1.5J, 0 Ω four parallel channels:

AS

Tj
T

stg

P

3.7

tot

ZL

see diagrams on page 10
Electrostatic discharge capability (ESD) IN:

V

1.0

ESD

(Human Body Model) IS:
out to all other pins shorted:
acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993

R=1.5kΩ; C=100pF

Input voltage (DC) VIN -10 ... +16 V
Current through input pin (DC)
Current through sense pin (DC)

IIN
IIS

see internal circuit diagram page 9

2

L(lim)

-40 ...+150

°C

-55 ...+150
W

1.9

33

mH
37
64

kV

4.0

8.0

±0.3

mA

±0.3

1)

Single pulse

2

) Current limit is a protection function. Operation in current limitation is considered as "outside" normal

operating range. Protection functions are not designed for continuous repetitive operation.

3)

Supply voltages higher than V

resistor for the GND connection is recommended.

4)

RI = internal resistance of the load dump test pulse generator

5)

V

Load dump

6)

Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for Vbb

connection. PCB is vertical with out blo w n air. See pag e 15

is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839

require an external current limit for the GND and status pins (a 75Ω

bb(AZ)

Infineon technologies 4 2004-Feb-19

Datasheet BTS737S3
Thermal Characteristics

Parameter and Conditions Symbol Values Unit

Thermal resistance
junction - soldering point

7)8),

each channel:

junction – ambient8)

R
R

thjs
thja

@ 6 cm2 cooling area one channel active:
all channels active:

min typ Max

-- -- 11

--

--

40
33

K/W

--

--

Electrical Characteristics

Parameter and Conditions, each of the four channels Symbol Values Unit

at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified

Load Switching Capabilities and Characteristics

min typ Max

On-state resistance (Vbb to OUT); I

= 5 A

L

each channel, Tj = 25°C:

see diagram, page 11 T

= 150°C:

j

Nominal load current one channel active:

two parallel channels active:
four parallel channels active:

Device on PCB
Output current while GND disconnected, V

see diagram page 10;

(not subject to production test - specified by design)

Turn-on time9) IN to 90% V
Turn-off time IN to 10% V

8)

, Ta = 85°C, Tj ≤ 150°C

IN

= 0,

OUT
OUT

RL = 12 Ω
Slew rate on 9)
V

rising from 10 to 30% of V

OUT

bb

, R

= 12 Ω:

L

Slew rate off 9)
V

falling from 70 to 40% of Vbb, RL = 12 Ω:

OUT

:
:

RON
I

I

ton
t

dV/dt

-dV/dt

5.0

L(NOM)

10.5

L(GNDhigh)

off

-- -- 1 mA

0.2 -- 0.9 V/µs

on

0.1 -- 0.9 V/µs

off

--

--

6.7

--

--

30
55

5.4

7.4

11.1

50

120

mΩ

35
64

--

A

--

--

150

µs

250

7)

Soldering point: upper side of solder edge of device pin 7,8. See page 16.

8)

Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for Vbb

connection. PCB is vertical with out blo w n air. See pag e 15

9)

See timing diagram on page 12.

Infineon technologies 5 2004-Feb-19

Datasheet BTS737S3

Operating Parameters

Operating voltage V
Overvoltage protection
I

= 40 mA

bb

Standby current
V

= 0; see diagram page 12 T

IN

11)

Tj =125°C:

(not subject to production test - specified by design)

Off-State output current Tj =-40...25°C:

(included in I

bb(off))VIN

Operating current, V
I

= I

GND

four channels on:

GND1/2

+ I

10)

Tj =-40...25°C:

=150°C:

j

= 0; each channel; Tj=150°C:

= 5V,

IN

, one channel on:

GND3/4

V

I

-- 25

I

I

5.0 -- 40 V

bb(on)

41 47

bb(AZ)

--

bb(off)

--

--

L(off)

--

GND

--

--

10
40

1

--

1.6

6.0

52 V

25

µA

80

6

µA

15

----mA

Protection Functions

12)

Current limit, (see timing diagrams, page 13)

I

36 45 58 A

L(lim)

Repetitive short circuit current limit,

Tj = Tjt each channel
two,three or four parallel channels

(see timing diagrams, page 13)

Initial short circuit shutdown time T

j,start

=25°C:

I

--

L(SCr)

t

-- 4 -- ms

off(SC)

--

40
40

--

A

--

(see timing diagrams on page 13)

Output clamp (inductive load switch off)

at V

ON(CL)

= Vbb - V

, IL= 40 mA

OUT

13)

V

ON(CL)

41

47 52

V
Thermal overload trip temperature Tjt 150 -- -- °C
Thermal hysteresis

∆

Tjt -- 10 -- K

Reverse Battery (not subject to production test - specified by design)

Reverse battery voltage
Drain-source diode voltage (V

IL = -2A; Tj = +150°C:

10)

Supply voltages higher than V
resistor for the GND connection is recommended). See also V
circuit diagram on page 9.

11)

Measured with load; for the whole device; all channels off.

12)

Integrated protection functions are designed to prevent IC destruction under fault conditions described in

the data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions
are not designed for continuous repetitive operation.

13)

If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest

ON(CL)

.

V

14)

The temperature protection and sense functionality is not active during reverse current operation! Input and

Status currents have to be limited (see max. ratings page 4 and circuit page 9).

15

) The reverse load current through the intrinsic drain-source diode has to be limited by the connected load.

Note that the power dissipation is higher compared to normal operating conditions due to the voltage drop
across the intrinsic drain-source diode.

14)

-Vbb -- -- 14 V

out

bb(AZ)

> Vbb)

15

require an external current limit for the GND and status pins (a 75Ω

-V

ON

in table of protection functions and

ON(CL)

-- 500 -- mV

Infineon technologies 6 2004-Feb-19

Datasheet BTS737S3

16)

Input

Input resistance

(see circuit page 9)
Input turn-on threshold voltage V
Input turn-off threshold voltage V
Input threshold hysteresis ∆ V
Off state input current VIN = 0.4 V: I
On state input current VIN = 5 V: I

Diagnostic Characteristics

Current sense ratio, static on-condition,

k

ILIS =IL:IIS

IL = 10 A:
IL = 2 A:
I
I

Sense signal in case of fault-conditions
Sense signal delay after thermal shutdown

(not subject to production test - specified by design)

17)

L

= 1 A:

L

= 0.5 A:

18)

Sense current saturation
Current sense output voltage limitation

IIS = 0, IL = 5 A:
Current sense leakage/offset current

VIN=0, VIS = 0, IL = 0:
VIN=5 V, VIS = 0, IL = 0:
Current sense settling time to I

IS static

±10% after

positive input slope, IL = 0 5 A,

(not subject to production test - specified by design)

RI 2.5 3.5 6.0 kΩ

1.7 -- 3.2 V

IN(T+)

1.5 -- -- V

IN(T-)

-- 0.3 -- V

IN(T)

1 -- 35 µA

IN(off)

20 50 90 µA

IN(on)

k

ILIS

V

fault

t

delay(fault)

I

IS,lim

V

IS(lim)

I

IS(LL)

I

IS(LH)

t

son(IS)

-- 5 300 --

4575
4100
4200
3580

5300
5300
5300
5800

6000
6300
6600
8080

5.4 6.3 7.5 V

-- -- 1 ms

4 -- -- mA

5.4

--

6.3 7.5 V

-- 1

-- 2.5 --

--

--

300

µA

µs

16)

If ground resistors R

17)

In the case of current limitation or thermal shutdown the sense signal is no longer a current proportional to

the load current, but a fixed voltage of typ. 6 V.

18)

In the case of thermal shutdown the V

diagram on page 14).

are used, add the voltage drop across these resistors.

GND

signal remains for t

fault

longer than the restart of the switch (see

delay(fault)

Infineon technologies 7 2004-Feb-19

Datasheet BTS737S3
Truth Table

Current

Sense

IS

I

0

nominal

fault

0

V

fault

0

V

fault

0

<nominal

0
0

20)

Normal
Operation

Current­Limitation

Short circuit to GND

Overtemperature

Short circuit to Vbb

Open load
Negative output

Voltage clamp

19)

Input

level

L
H

H H V
L

H
L
H
L
H
L
H

L L 0

Output

level

L
H

L
L
L
L

H
H

Z
H

L = "Low" Level X = don't care Z = high impedance, potential depends on external circuit
H = "High" Level V

= 6V typ, constant voltage independent of external used sense resistor.

fault

Parallel switching of channels is possible by connecting the inputs and outputs in parallel. The current sense
outputs have to be connected with a single sense resistor.

Terms

I

bb

V

bb

V

IN1

V

IN2

V

IS1

Leadframe (V

I

IN1

3

IN1

I

IN2

5

IN2

I

IS1

2

IS1

I

IS2

6

IS2

V

IS2

) is connected to pin 1, 7, 8, 14, 15, 28.

bb

Leadframe

V

bb

PROFET

Chip 1

GND1/2

4

OUT1

OUT2

I

IGND1/2

V

25
26
27

22
23
24

V

OUT1

19)

Current limitation is only pos s ible whi le the devic e is switc he d on.

20)

Low ohmic short to Vbb may reduce the output current IL and therefore also the sense current IIS.

ON1

I

I

V

ON2

V

bb

L1

L2

V

V

OUT2

I

IN3

10

IN3

I

IN4

IN3

V

IN4

V

12

IN4

I

IS3

9

IS3

I

IS4

13

IS3

IS4

V

IS4

V

bb

PROFET

Chip 2

GND3/4

11

Leadframe

OUT3

OUT4

I

IGND3/4

19
20
21

16
17
18

V

OUT3

ON3

I

I

V

ON4

L3

L4

V

OUT4

V

Infineon technologies 8 2004-Feb-19

Datasheet BTS737S3

g

Input circuit (ESD protection), IN1 to IN4

R

IN

I

ESD-ZD

I

GND

I

I

The use of ESD zener diodes as voltage clamp at DC
conditions is not recommende d.

Sense output

Normal operation: IS = IL / k
V

IS = IS * RIS

R

ESD-Zener diode: V

; RIS = 1 kΩ nominal

> 500Ω

IS

I

IS

V

f

ESD-ZD

= 6.1 V typ., max 14 mA;

ESD

Operation under fault condition
so as thermal shut down or current limitation

V

fault

V

f

ESD-ZD

= 6V typ

V

fault

V

fault < VESD under all conditions

ILIS

Sense output

ic

lo

GND

Sense output
logic

GND

V

IS

IS

R

IS

V

fault

R

IS

Overvoltage output clamp, OUT1 or OUT2

VON clamped to V

V

ON(CL)

Z

= 47 V typ.

Power GND

+V

V

bb

ON

OUT

Overvoltage protection of logic part

GND1/2 or GND3/4

+ V

bb

V

Integrated

R

GND

GND

Z2

V

= 6.1 V typ., V

Z1

R

= 75 Ω

GND

R

I

IN

Logic

IS

V

Z1

R

IS

= 47 V typ., RI = 3.5 kΩ typ.,

Z2

GND resistor

Signal GND

Reverse battery protection

V

-

bb

Logic

Logic
MOSFET

R

I

IN

IS

Power
MOSFET

Integrated
GND resistor
R

R

IS

R

= 75 Ω, RI = 3.5 kΩ typ,

GND

Signal GND

GND

Power GND

Temperature protection and sense functionality is not active
during inverse current operation.

R

OUT

L

Infineon technologies 9 2004-Feb-19

Datasheet BTS737S3

A

GND disconnect

V

IN

IS

VbbV

IN

V

ST

Any kind of load. In case of IN = high is V
Due to V

> 0, no V

GND

ST

bb

V

GND

OUT

OUT

≈ V

PROFET

GND

= low signal available.

IN

- V

IN(T+)

Vbb disconnect with energized inductive
load

high

V

bb

IN

IS

For inductive load currents up to the limits defined by ZL
(max. ratings and diagram on page 10) each switch is
protected against loss of Vbb.

V

bb

PROFET

GND

OUT

Inductive load switch-off energy
dissipation

E

bb

E

S

V

IN

=

IS

bb

PROFET

GND

OUT

Z

L

{

.

Energy stored in load inductance:

L

L

2

1

E

/

=

·L·I

2

While demagnetizing load inductance, the energy
dissipated in PROFET is

= Ebb + EL - ER= ∫ V

E

AS

ON(CL)·iL

with an approximate solution for RL > 0

· L

I

AS

=

L

(V

+ |V

OUT(CL)

bb

·R

2

L

|) ln (1+

E

(t) dt,

Ω:

|V

OUT(CL)

I

Maximum allowable load inductance for
a single switch off (one channel)

L = f (I

ZL [mH]

1000

L

); T

j,start

=

150°C, V

bb

6)

= 12 V, RL = 0 Ω

E

Load

L

R

L

L

·R

E

L

E

R

L

)

|

Consider at your PCB layout that in the case of Vbb dis­connection with energized inductive load all the load current
flows through the GND connection.

100

10

1

0.1

01234567

I

L

[A]

Infineon technologies 10 2004-Feb-19

Datasheet BTS737S3

Typ. on-state resistance

= f (Vbb,T

R

ON

R

[mOhm]

ON

60

50

180

); IL = 2 A, IN = high

j

Tj = 150°C

30

25°C

-40°C

20

0

3 5 7 9 30 40

V

bb

[V]

Typ. standby current

I

= f (T

bb(off)

[µA]

I

bb(off)

45

40

35

30

j

); V

= 9...34 V, IN1,2,3,4 = low

bb

25

20

15

10

5

0

-50 0 50 100 150 200

T

[°C]

j

Infineon technologies 11 2004-Feb-19

Datasheet BTS737S3

IN

IN

Functionality diagrams

All diagrams are shown for chip 1 (channel 1/2). For chip 2 (channel 3/4) the diagrams are valid too. The
channels 1 and 2, respectively 3 and 4, are symmetric and consequently the diagrams are valid for each
channel as well as for permuted channels

Figure 1a: Switching a resistive load,
change of load current in on-condit io n:

V

OUT

t

on

I

L

IS,V

S

tt

Load 1

t

son(IS)

Load 2

t

The sense signal is not valid during settling time after turn on or

change of load current.

soff(IS)

t

off

slc(IS)slc(IS)

Figure 1b: Vbb turn on:

Figure 1c: Behaviour of sense output:

Sense current (I

) and sense voltage (VS) as

S

function of load current dependent on the sense
resistor
Shown is V

and IS for three different sense

S

resistors. Curve 1 refers to a low resistor, curve 2 to
a medium-sized resistor and curve 3 to a big resistor.
Note, that the sense resistor may not fall short of a
minimum value of 500Ω.

V

S

V

ESD

V

fault

t

3

2

1

I

L

I

S

1

2

V

bb

I

L

IS,V

S

proper turn on under all conditions

I

S

V
R

= IL / k

IS = IS * RIS

ILIS

; RIS = 1 kΩ nominal

> 500Ω

IS

I

L(lim)

3

I

L

Infineon technologies 12 2004-Feb-19

Datasheet BTS737S3

IN

Figure 2a: Switching a lamp:

IN

ST

V

OUT

I

L

t

The initial peak current should be limited by the lamp and not by the
current limit of the device.

Figure 2b: Switching a lamp with current limit:
The behaviour of IS and VS is shown for a resistor,
which refers to curve 1 in figure 1c

IN

Figure 3a: Short circuit:
shut down by overtempertature, reset by cooling

I

L

I

L(lim)

V

S

Heating up may require several milliseconds, depending on
external conditions

= 45 A typ. increases with decreasing temperature.

I

L(lim’)

I

L(SCr)

V

fault

Figure 3b: Turn on into short circuit:
shut down by overtemperature, restart by cooling
(two parallel switched channels 1 and 2)

IN1/2

V
V

V

OUT

I

L

I

S

S
fault

IL1 + I

L2

I

L(SCp)

I

L(SCr)

t

off(SC)

VS1, V

S2

t

V

fault

Infineon technologies 13 2004-Feb-19

Datasheet BTS737S3

Figure 4a: Overtemperature:

Reset if T

<Tjt

j

The behaviour of IS and VS is shown for a resistor,
which refers to curve 1 in figure 1c

IN

I

L

I

S

V

S

T

J

V

fault

t

delay(fault)

Figure 6b: Current sense ratio

0000

k

ILIS

5000

0

012345678910111213

21)

:

[A]

I

L

Figure 6a: Current sense versus load current:

1.3

[mA] I

1.2

IS

1.1

1

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

0123456

[A]

t

I

L

21)

This range for the current sense ratio refers to all

devices. The accuracy of the k

can be raised at

ILIS

least by a factor of two by calibrating the value of

k

for every single device.

ILIS

Infineon technologies 14 2004-Feb-19

Datasheet BTS737S3

Package and Ordering Code

Standard: P-DSO-28-16

Sales Code BTS 737 S3

Ordering Code Q 6706 0- S6 133

0.35 x 45˚

-0.2

-0.1

0.2

2.45

2.65 max

1.27

+0.15

2)

0.35

Index Marking

1) Does not include plastic or metal protrusions of 0.15 max rer side

2) Does not include dambar protrusion of 0.05 max per side

All dimensions in milli me tres

0.2 28x

1528

114

18.1

-0.4

1)

0.1

Definition of soldering point with temperature T
upper side of solder edge of device pin 15.

Pin 7,8

Printed circuit board (FR4, 1.5mm thick, one layer

2

70µm, 6cm
max. power dissipation P

I

L(NOM)

active heatsink area) as a reference for

, nominal load current

tot

and thermal resistance R

thja

7.6

10.3

0.4

-0.2

1)

+0.8

±0.3

s

+0.09

0.23

GPS05123

:

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