Page 1
DISCRETE SEMICONDUCTORS
DATA SH EET
BF1105; BF1105R; BF1105WR
N-channel dual-gate MOS-FETs
Product specification
Supersedes data of 1997 Dec 01
File under Discrete Semiconductors, SC07
1997 Dec 02
Page 2
Philips Semiconductors Product specification
N-channel dual-gate MOS-FETs BF1105; BF1105R; BF1105WR
FEATURES
• Short channel transistor with high
forward transfer admittance to input
capacitance ratio
• Low noise gain controlled amplifier
up to 1 GHz.
• Internal self-biasing circuit to
ensure good cross-modulation
performance during AGC and good
DC stabilization.
APPLICATIONS
• VHF and UHF applications with 5 V
supply voltage, such as television
tuners and professional
communications equipment.
DESCRIPTION
Enhancement type N-channel
field-effect transistor with source and
substrate interconnected. Integrated
diodes between gates and source
protect against excessive input
voltage surges. The BF1105,
BF1105R and BF1105WR are
encapsulated in the SOT143B,
SOT143R and SOT343R plastic
packages respectively.
PINNING
PIN DESCRIPTION
1 source
2 drain
3 gate 2
4 gate 1
page
Top view
BF1105 marking code: NEp.
Fig.1 Simplified outline
(SOT143B).
MSB014
handbook, 2 columns
Top view
BF1105R marking code: NAp.
43
12
MSB035
Fig.2 Simplified outline
(SOT143R).
34
21
fpage
21
Top view
BF1105WR marking code: NA.
43
MSB842
Fig.3 Simplified outline
(SOT343R).
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
DS
I
D
P
tot
forward transfer admittance 25 31 − mS
y
fs
C
ig1-ss
C
rss
drain-source voltage −−7V
drain current −−30 mA
total power dissipation T
≤ 80 °C −−200 mW
amb
input capacitance at gate 1 − 2.2 2.7 pF
reverse transfer capacitance f = 1 MHz − 25 40 fF
F noise figure f = 800 MHz − 1.7 2.5 dB
X
mod
T
j
cross-modulation input level for k = 1% at 40 dB AGC 100 −−dBµV
operating junction temperature −−150 °C
CAUTION
This product is supplied in anti-static packing to prevent damage caused by electrostatic discharge during transport
and handling. For further information, refer to Philips specs.: SNW-EQ-608, SNW-FQ-302A and SNW-FQ-302B.
1997 Dec 02 2
Page 3
Philips Semiconductors Product specification
N-channel dual-gate MOS-FETs BF1105; BF1105R; BF1105WR
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DS
I
D
I
G1
I
G2
P
tot
T
stg
T
j
Note
1. Device mounted on a printed-circuit board.
drain-source voltage − 7V
drain current − 30 mA
gate 1 current −±10 mA
gate 2 current −±10 mA
total power dissipation T
≤ 80 °C; note 1; see Fig.4 − 200 mW
amb
storage temperature −65 +150 °C
operating junction temperature − +150 °C
250
handbook, halfpage
P
tot
(mW)
200
150
100
50
0
0 40 80 160
120
T
amb
Fig.4 Power derating curve.
MGM243
(°C)
1997 Dec 02 3
Page 4
Philips Semiconductors Product specification
N-channel dual-gate MOS-FETs BF1105; BF1105R; BF1105WR
THERMAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS VALUE UNIT
R
th j-a
R
th j-s
Note
1. Device mounted on a printed-circuit board.
STATIC CHARACTERISTICS
=25°C unless otherwise specified.
T
j
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(BR)DSS
V
(BR)G1-SS
V
(BR)G2-SS
V
G2-S (th)
I
DSX
I
G1-SS
I
G2-SS
thermal resistance from junction to ambient in free air note 1 350 K/W
thermal resistance from junction to soldering point 200 K/W
drain-source breakdown voltage V
gate 1-source breakdown voltage V
gate 2-source breakdown voltage V
gate 2-source threshold voltage V
self-biasing drain current V
gate 1 cut-off current V
gate 2 cut-off current V
G1-S=VG2-S
= 0; ID= 0; I
G2-S
G1-S=VDS
=5V; VDS=5V; ID=20µA 0.3 0.8 1.2 V
G1-S
=4V; VDS=5V 8 − 16 mA
G2-S
=5V; V
G1-S
G1-S=VDS
= 0; ID=10µA7−−V
=10µA7 −−V
G1-S
= 0; I
G2-S
= 0; V
=10µA7−−V
G2-S
= 0; ID=0 −−50 nA
=4V −−20 nA
G2-S
DYNAMIC CHARACTERISTICS
Common source; T
=25°C; V
amb
= 4 V; VDS= 5 V; self-biasing current; unless otherwise specified.
G2-S
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
y
forward transfer admittance pulsed; Tj=25°C2531−mS
fs
C
ig1-ss
C
ig2-ss
C
oss
C
rss
F noise figure f = 800 MHz; Y
G
p
X
mod
input capacitance at gate 1 f = 1 MHz − 2.2 2.7 pF
input capacitance at gate 2 f = 1 MHz − 1.6 − pF
output capacitance f = 1 MHz − 1.2 − pF
reverse transfer capacitance f = 1 MHz − 25 40 fF
S=YS opt
power gain GS= 2 mS; BS=B
BL=B
G
S
BL=B
; f = 200 MHz; see Fig.16
L opt
= 3.3 mS; BS=B
; f = 800 MHz; see Fig.17
L opt
; GL= 0.5 mS;
S opt
; GL= 1 mS;
S opt
cross-modulation input level for k = 1% at 0 dB AGC;
fw= 50 MHz; f
= 60 MHz; see Fig.18
unw
input level for k = 1% at 40 dB AGC;
f
= 50 MHz; f
w
= 60 MHz; see Fig.18
unw
− 1.7 2.5 dB
− 38 − dB
− 20 − dB
85 −−dBµV
100 −−dBµV
1997 Dec 02 4
Page 5
Philips Semiconductors Product specification
N-channel dual-gate MOS-FETs BF1105; BF1105R; BF1105WR
25
handbook, halfpage
I
D
(mA)
20
15
10
5
0
024 8
V
=4V.
G2-S
Tj=25°C.
Fig.5 Output characteristics; typical values.
V
G1
6
MGM244
= 1.7 V
1.6 V
1.5 V
1.4 V
1.3 V
1.2 V
1.1 V
1 V
VDS (V)
40
handbook, halfpage
I
D
(mA)
V
= 4 V
30
20
10
0
0
VDS=5V.
Tj=25°C.
0.5 2.5
G2-S
1 1.5 2
Fig.6 Transfer characteristics; typical values.
MGM245
3.5 V
3 V
2.5 V
2 V
1.5 V
1 V
VG1 (V)
V
G2-S
2.5 V
I
D (mA)
MGM246
= 4 V
3.5 V
3 V
40
handbook, halfpage
y
fs
(mS)
30
20
10
0
0 102030
VDS=5V.
Tj=25°C.
2 V
Fig.7 Forward transfer admittance as a function
of drain current; typical values.
16
handbook, halfpage
I
D
(mA)
12
8
4
0
0
(1) VDS=5V.
(2) VDS= 4.5V.
(3) VDS=4V.
(1)
(2)
(3)
(4) (5)
15
234
(4) VDS= 3.5 V.
(5) VDS=3V.
Fig.8 Drain current as a function of gate 2
voltage; typical values.
V
MGM247
G2-S
(V)
1997 Dec 02 5
Page 6
Philips Semiconductors Product specification
N-channel dual-gate MOS-FETs BF1105; BF1105R; BF1105WR
6
fMGM248
VDS (V)
16
handbook, halfpage
I
D
(mA)
12
8
4
0
024 8
V
=4V.
G2-S
Tj=25°C.
Fig.9 Drain current as a function of drain-source
voltage; typical values.
−2
MGM249
IG1 (µA)
16
handbook, halfpage
I
D
(mA)
12
8
4
0
−8 −6 −40
VDS= 5 V; V
= 4 V; Tj=25°C.
G2-S
Fig.10 Drain current as a function of gate 1 current;
typical values.
110
handbook, halfpage
V
unw
(dBµV)
100
90
80
0 204060
VDS= 5 V; V
= 60 MHz; T
f
unw
G2nom
= 4 V; I
amb
Dnom=Iself bias
=25°C.
gain reduction (dB)
; fw= 50 MHz;
MGM250
Fig.11 Unwanted voltage for 1% cross-modulation
as a function of gain reduction;
typical values (see Fig.18).
1997 Dec 02 6
Page 7
Philips Semiconductors Product specification
N-channel dual-gate MOS-FETs BF1105; BF1105R; BF1105WR
2
10
handbook, halfpage
y
is
MGM251
(mS)
10
b
is
1
g
−1
10
−2
10
10
VDS= 5 V; V
ID= 12 mA; T
G2-S
amb
=4V.
=25°C.
is
2
10
f (MHz)
Fig.12 Input admittance as a function of frequency;
typical values.
3
10
handbook, halfpage
|yrs|
(µS)
2
10
MGM252
ϕ
rs
−10
ϕ
(deg)
−10
3
rs
2
|yrs|
10
3
10
1
10
VDS= 5 V; V
ID= 12 mA; T
G2-S
amb
=4V.
=25°C.
2
10
f (MHz)
−10
−1
3
10
Fig.13 Reverse transfer admittance and phase as
a function of frequency; typical values.
2
10
handbook, halfpage
MGM253
|yfs|
(mS)
|yfs|
10
ϕ
fs
1
10 10
VDS= 5 V; V
ID= 12 mA; T
G2-S
amb
=4V.
=25°C.
2
f (MHz)
Fig.14 Forward transfer admittance and phase as
a function of frequency; typical values.
−10
ϕ
(deg)
2
fs
10
handbook, halfpage
y
os
(mS)
1
b
os
MGM254
−10
g
−1
10
−1
3
10
−2
10
10
VDS= 5 V; V
ID= 12 mA; T
G2-S
amb
=4V.
=25°C.
os
2
10
f (MHz)
3
10
Fig.15 Output admittance as a function of
frequency; typical values.
1997 Dec 02 7
Page 8
Philips Semiconductors Product specification
N-channel dual-gate MOS-FETs BF1105; BF1105R; BF1105WR
1 nF
1 nF
15
pF
V
AGC
47 kΩ
G2
G1
BB405
BF1105
BF1105R
BF1105WR
330 kΩ
V
input
tun
1 nF
handbook, full pagewidth
5.5 pF
input
50 Ω
VDS= 5 V, GS= 2 mS, GL= 0.5 mS, f = 200 MHz.
L1 = 45 nH, 4 turns, internal diameter = 4 mm, 0.8 mm copper wire.
L2 = 160 nH, 3 turns, internal diameter = 8 mm, 0.8 mm copper wire; tapped at approximately half a turn from the cold side, to set GL= 0.5 mS.
C1 adjusted for GS= 2 mS.
C1
L1
1 nF
1 nF
1 nF
D
S
V
DS
2 µH
1 nF
output
L2
10 pF
BB405
50 Ω
330 kΩ
1 nF
V
output
tun
MGM255
Fig.16 Gain test circuit.
handbook, full pagewidth
1 nF
input
50 Ω
2 to 18 pF
VDS= 5 V, GS= 3.3 mS, GL= 1 mS, f = 800 MHz.
L1 = 2 cm, silvered 0.8 mm copper wire 4 mm above ground plane.
L2 = 2 cm, silvered 0.8 mm copper wire 4 mm above ground plane.
L3 = 11 turns 0.5 mm copper wire without spacing, internal diameter = 3 mm, L = approx. 200 nH.
V
AGC
1 nF
47 kΩ
1 nF
G2
BF1105
L1
0.5 to 3.5 pF
G1
BF1105R
BF1105WR
D
S
Fig.17 Gain test circuit.
1997 Dec 02 8
L2
0.5 to 3.5 pF
V
DS
1 nF
L3
1 nF
4 to 40 pF
output
50 Ω
MGM256
Page 9
Philips Semiconductors Product specification
N-channel dual-gate MOS-FETs BF1105; BF1105R; BF1105WR
handbook, full pagewidth
R
gen
50 Ω
V
i
50 Ω
4.7 nF
10 nF
V
G2
G2
G1
10 kΩ
BF1105WR
BF1105
BF1105R
V
DS
4.7 nF
47 µH
10 nF
D
S
R1 =
50 Ω
MGM257
Fig.18 Cross-modulation test set-up.
Table 1 Scattering parameters: VDS= 5 V; V
S
f
(MHz)
MAGNITUDE
(ratio)
11
ANGLE
(deg)
MAGNITUDE
(ratio)
= 4 V; ID=12mA
G2-S
S
21
ANGLE
(deg)
S
MAGNITUDE
(ratio)
12
ANGLE
(deg)
S
MAGNITUDE
(ratio)
22
ANGLE
(deg)
50 0.994 −3.8 3.060 175.4 0.000 86.9 0.985 −2.1
100 0.991 −7.5 3.047 170.9 0.002 86.1 0.983 −4.2
200 0.982 −14.7 3.004 162.1 0.003 82.7 0.980 −8.3
300 0.968 −21.7 2.932 153.4 0.004 79.7 0.976 −12.1
400 0.956 −28.8 2.896 145.3 0.006 77.8 0.972 −16.2
500 0.937 −35.4 2.815 137.1 0.007 76.7 0.967 −20.0
600 0.918 −41.8 2.735 129.2 0.007 76.3 0.961 −23.7
700 0.897 −48.1 2.651 121.5 0.008 76.7 0.955 −27.3
800 0.878 −54.0 2.575 114.0 0.008 79.7 0.948 −30.9
900 0.858 −59.9 2.482 106.5 0.008 82.2 0.941 −34.4
1000 0.840 −65.5 2.396 99.5 0.008 88.0 0.935 −37.9
Table 2 Noise data: V
f
(MHz)
= 5 V; V
DS
= 4 V; ID=12mA
G2-S
F
min
(dB)
800 1.5 0.674 39.7 37.15
1997 Dec 02 9
Γ
opt
(ratio) (deg)
R
(Ω)
n
Page 10
Philips Semiconductors Product specification
N-channel dual-gate MOS-FETs BF1105; BF1105R; BF1105WR
PACKAGE OUTLINES
Plastic surface mounted package; 4 leads SOT143B
D
y
e
b
p
B
w M
E
v M
A
B
H
E
A
X
34
Q
A
A
1
21
L
b
1
e
1
detail X
p
c
0 1 2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
UNIT
mm
VERSION
1.1
0.9
OUTLINE
SOT143B
1
A
max
0.1
b
c
D
b
0.48
0.38
1
p
0.88
0.15
0.78
0.09
IEC JEDEC EIAJ
E
3.0
1.4
2.8
1.2
REFERENCES
e
1.9
1997 Dec 02 10
e
1.7
H
L
E
1
2.5
2.1
0.45
0.15
p
0.55
0.45
EUROPEAN
PROJECTION
ywvQ
0.1 0.10.2
ISSUE DATE
97-02-28
Page 11
Philips Semiconductors Product specification
N-channel dual-gate MOS-FETs BF1105; BF1105R; BF1105WR
Plastic surface mounted package; reverse pinning; 4 leads SOT143R
D
y
e
b
p
B
w M
E
v M
A
B
H
E
A
X
43
Q
A
A
1
c
12
L
b
1
e
1
detail X
p
0 1 2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
UNIT
mm
VERSION
1.1
0.9
OUTLINE
SOT143R
1
A
max
0.1
b
c
D
b
0.48
0.38
1
p
0.88
0.15
0.78
0.09
IEC JEDEC EIAJ
E
3.0
1.4
2.8
1.2
REFERENCES
e
1.9
1997 Dec 02 11
e
1.7
H
L
E
1
2.5
2.1
0.55
0.25
p
0.45
0.25
EUROPEAN
PROJECTION
ywvQ
0.1 0.10.2
ISSUE DATE
97-03-10
Page 12
Philips Semiconductors Product specification
N-channel dual-gate MOS-FETs BF1105; BF1105R; BF1105WR
Plastic surface mounted package; reverse pinning; 4 leads SOT343R
w M
D
y
e
43
21
b
B
p
e
b
1
1
E
H
E
A
A
1
detail X
AB
Q
L
p
X
v M
A
c
0 1 2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
UNIT
mm
OUTLINE
VERSION
SOT343R
A
1.1
0.8
max
0.1
1
b
p
0.4
0.3
IEC JEDEC EIAJ
b
1
0.7
0.5
cD
0.25
2.2
0.10
1.8
REFERENCES
E
1.35
1.15
e
1.3
1997 Dec 02 12
H
L
e
E
1
2.2
0.45
2.0
0.15
Qwv
p
0.23
0.13
0.2y0.10.21.15
EUROPEAN
PROJECTION
ISSUE DATE
97-05-21
Page 13
Philips Semiconductors Product specification
N-channel dual-gate MOS-FETs BF1105; BF1105R; BF1105WR
DEFINITIONS
Data Sheet Status
Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1997 Dec 02 13
Page 14
Philips Semiconductors Product specification
N-channel dual-gate MOS-FETs BF1105; BF1105R; BF1105WR
NOTES
1997 Dec 02 14
Page 15
Philips Semiconductors Product specification
N-channel dual-gate MOS-FETs BF1105; BF1105R; BF1105WR
NOTES
1997 Dec 02 15
Page 16
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Tel. +55 11 821 2333, Fax. +55 11 821 2382
Spain: Balmes 22, 08007 BARCELONA,
Tel. +34 3 301 6312, Fax. +34 3 301 4107
Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. +46 8 632 2000, Fax. +46 8 632 2745
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. +41 1 488 2686, Fax. +41 1 481 7730
Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. +66 2 745 4090, Fax. +66 2 398 0793
Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Tel. +90 212 279 2770, Fax. +90 212 282 6707
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 625 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p,
P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
© Philips Electronics N.V. 1997 SCA56
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Internet: http://www.semiconductors.philips.com
Printed in The Netherlands 117067/00/03/pp16 Date of release: 1997 Dec 02 Document order number: 9397 75003136
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