18-bit registered driver
with inverted register enable and
15 Ω termination resistors (3-State)
Product specification
File under Integrated Circuits ICL03
2001 Apr 20
Page 2
Philips SemiconductorsProduct specification
CPDPower dissipation capacitance per buffer
V
GND to V
1
pF
18-bit registered driver with inverted register enable
and 15 Ω termination resistors (3-State)
FEA TURES
•Wide supply voltage range of 1.2 V to 3.6 V
•Complies with JEDEC standard no. 8-1A/5/7.
•CMOS low power consumption
•Input/output tolerant up to 3.6 V
•Low inductance multiple V
and ground bounce
and GND pins for minimum noise
CC
• Integrated 15 Ω termination resistors to minimize output overshoot
and undershoot
•Full PC133 solution provided when used with PCK2510S and
CBT16292
DESCRIPTION
The 74AVCM162834 is an 18-bit universal bus driver. Data flow is
controlled by output enable (OE
(CP).
This product is designed to have an extremely fast propagation
delay and a minimum amount of power consumption.
To ensure the high-impedance state during power up or power
down, OE
should be tied to VCC through a pullup resistor (Live
Insertion).
), latch enable (LE) and clock inputs
PIN CONFIGURATION
1
2
NC
3
Y
0
4
GND
5
Y
1
Y
6
2
V
7
CC
Y
8
3
Y
9
4
10
Y
5
11
GND
12
Y
6
13
Y
7
14
Y
8
15
Y
9
16
Y
10
17
Y
11
18
GND
19
Y
12
20
Y
13
21
Y
14
22
V
CC
23
Y
15
24
Y
16
25
GND
26
Y
17
27
OE
2829
LE
74A VCM162834
56NC
GND
55
NC
54
A
0
53
GND
52
A
1
A
51
2
V
50
CC
A
49
3
A
48
4
47
A
5
46
GND
45
A
6
44
A
7
43
A
8
42
A
9
41
A
10
40
A
11
39
GND
38
A
12
37
A
13
36
A
14
35
V
CC
34
A
15
33
A
16
32
GND
31
A
17
30
CP
GND
QUICK REFERENCE DA TA
GND = 0 V; T
SYMBOL
t
PHL/tPLH
t
PHL/tPLH
C
I
NOTES:
is used to determine the dynamic power dissipation (PD in µW):
1. C
PD
= CPD × V
P
D
= output frequency in MHz; VCC = supply voltage in V; S (CL × V
f
o
= 25 °C; tr = tf ≤ 2.0 ns; CL = 30 pF.
amb
Propagation delay
An to Yn
Propagation delay
LE
to Yn;
CP to Yn
Input capacitance5.0pF
2
× fi + S (CL × V
CC
ORDERING INFORMATION
56-Pin Plastic Thin Shrink Small Outline (TSSOP) Type II–40 to +85 °C74AVCM162834DGGSOT364-1
2001 Apr 20853–2169 26096
SH00156
PARAMETERCONDITIONSTYPICALUNIT
p
CC
p
2
PACKAGES
VCC = 1.8 V
VCC = 2.5 V
VCC = 3.3 V
VCC = 1.8 V
V
= 2.5 V
CC
VCC = 3.3 V
p
× fo) where: fi = input frequency in MHz; CL = output load capacitance in pF;
=
I
CC
CC
2
× fo) = sum of outputs.
TEMPERATURE
RANGE
Outputs enabled25
Output disabled6
ORDER CODE
2.6
2.0
1.7
2.9
2.3
1.9
2
ns
ns
p
DRAWING
NUMBER
Page 3
Philips SemiconductorsProduct specification
OUTPUTS
18-bit registered driver with inverted register enable
and 15 Ω termination resistors (3-State)
PIN DESCRIPTION
PIN NUMBERSYMBOLNAME AND FUNCTION
1, 2, 55NCNo connection
3, 5, 6, 8, 9, 10, 12, 13,
14, 15, 16, 17, 19, 20,
Y0 to Y17Data outputs
21, 23, 24, 26
4, 11, 18, 25, 32, 39, 46,
53, 56
7, 22, 35, 50V
27OE
28LE
GNDGround (0 V)
CC
Positive supply voltage
Output enable input
(active LOW)
Latch enable input
(active LOW)
30CPClock input
54, 52, 51, 49, 48, 47,
45, 44, 43, 42, 41, 40,
A0 to A17Data inputs
38, 37, 36, 34, 33, 31
LOGIC SYMBOL
OE
CP
LE
A
0
TO THE 17 OTHER CHANNELS
D
LE
CP
Y
SH00157
0
LOGIC SYMBOL (IEEE/IEC)
OE
CP
LE
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
10
Y
11
Y
12
Y
13
Y
14
Y
15
Y
16
Y
17
FUNCTION TABLE
OELECPA
HXXXZ
LLXLL
LLXHH
LH↑LL
LH↑HH
LHHXY
LHLXY
H= HIGH voltage level
L= LOW voltage level
X= Don’t care
Z= High impedance “off” state
↑= LOW-to-HIGH level transition
NOTES:
1. Output level before the indicated steady-state input conditions
were established, provided that CP is high before LE goes low.
2. Output level before the indicated steady-state input conditions
were established.
74A VCM162834
27
30
28
3
0
5
1
6
2
8
3
9
4
10
5
12
6
13
7
14
8
15
9
16
17
19
20
21
23
24
26
EN1
C3
G2
1 ∇ 1
INPUTS
2C3
54
A
0
52
A
1
51
A
2
3D
49
A
3
48
A
4
47
A
5
45
A
6
44
A
7
43
A
8
42
A
9
41
A
10
40
A
11
38
A
12
37
A
13
36
A
14
34
A
15
33
A
16
31
A
17
SH00158
1
0
2
0
2001 Apr 20
3
Page 4
Philips SemiconductorsProduct specification
CC
CC
18-bit registered driver with inverted register enable
and 15 Ω termination resistors (3-State)
168-pin SDR SDRAM DIMM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
BACK SIDE
FRONT SIDE
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
74AVCM16834
The PLL clock distribution device and AVCM registered drivers reduce signal loads on the memory
controller and prevent timing delays and waveform distortions that would cause unreliable operation
74AVCM16834PCK2509S or PCK2510S74AVCM16834
SDRAM
SDRAM
74A VCM162834
SDRAM
SDRAM
SW00407
RECOMMENDED OPERATING CONDITIONS
SYMBOLPARAMETERCONDITIONSMINMAXUNIT
DC supply voltage
V
(according to JEDEC Low Voltage Standards)
DC supply voltage
(for low voltage applications)
V
DC Input voltage range03.6V
I
1.65
2.3
3.0
1.23.6
1.95
2.7
3.6
DC output voltage range; output 3-State03.6
V
O
T
amb
DC output voltage range;
output HIGH or LOW state
0V
CC
Operating free-air temperature range–40+85°C
VCC = 1.65 to 2.3 V030
tr, t
Input rise and fall timesVCC = 2.3 to 3.0 V020ns/V
f
VCC = 3.0 to 3.6 V010
ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0 V)
SYMBOL
I
GND
V
CC
I
IK
V
I
I
OK
V
O
V
O
I
O
, I
T
stg
P
TOT
DC supply voltage–0.5 to +4.6V
DC input diode currentVI t0–50mA
DC input voltageFor all inputs
DC output diode currentV
DC output voltage; output 3-StateNote 1–0.5 to 4.6V
DC output voltage;
output HIGH or LOW state
DC output source or sink currentVO = 0 to V
DC VCC or GND current
CC
Storage temperature range–65 to +150°C
Power dissipation per package
–plastic thin-medium-shrink (TSSOP)
NOTE:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
PARAMETERCONDITIONSRATINGUNIT
1
uVCC or VO t 0
O
–0.5 to 4.6V
"50
Note 1–0.5 to VCC +0.5V
CC
"50
"100
For temperature range: –40 to +125 °C
above +55°C derate linearly with 8 mW/K600
V
V
mA
mA
mA
mW
2001 Apr 20
4
Page 5
Philips SemiconductorsProduct specification
VIHHIGH level Input voltage
V
VILLOW level Input voltage
V
CCIIHIL
V
0.20
V
O
OH
g
CCIIHIL
GND
0.20
O
OL
g
V
µ
IIInutleakagecurrent
V
V
GND
0.1
2.5
µA
IOZ3-State output OFF-state current
A
ICCQuiescent supply current
A
18-bit registered driver with inverted register enable
74A VCM162834
and 15 Ω termination resistors (3-State)
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. V oltage are referenced to GND (ground = 0 V).
LIMITS
SYMBOLPARAMETERTEST CONDITIONSTemp = –40 to +85 °CUNIT
1
––
0.9–
CC
0.10–
CC
0.28–
CC
0.32–
CC
MAX
CC
–
10
V
V
I
OFF
I
IHZ/IILZ
HIGH level output voltage
H
LOW level output voltage
L
I
Input leakage current
3-State output OFF-state currentVCC = 0V; VI or VO = 3.6 V–0.1
3-State output OFF-state currentVCC = 1.65 to 3.6 V; VI = VCC or GND–0.112.5µA
p
NOTES:
1. All typical values are at T
p
p
pp
amb
= 25 °C.
MINTYP
VCC = 1.2 VV
VCC = 1.65 to 1.95 V0.65V
CC
CC
VCC = 2.3 to 2.7 V1.71.2–
VCC = 3.0 to 3.6 V2.01.5–
VCC = 1.2 V––GND
VCC = 1.65 to 1.95 V–0.90.35V
VCC = 2.3 to 2.7 V–1.20.7
VCC = 3.0 to 3.6 V–1.50.8
VCC = 1.65 to 3.6 V; VI = VIH or VIL;
IO = –100 µA
VCC = 1.65 V; VI = VIH or VIL; IO = –4 mAV
VCC = 2.3 V; VI = VIH or VIL; IO = –8 mAV
VCC = 3.0 V; VI = VIH or VIL; IO = –12 mAV
VCC = 1.65 to 3.6 V; VI = VIH or VIL;
IO = 100 µA
CC
CC
CC
CC
0.45V
0.55V
0.70V
–
VCC = 1.65 V; VI = VIH or VIL; IO = 4 mA–0.100.45
VCC = 2.3 V; VI = VIH or VIL; IO = 8 mA–0.260.55
VCC = 3.0 V; VI = VIH or VIL; IO = 12 mA–0.360.70
= 1.65 to 3.6 V;
CC
=
or
I
CC
VCC = 1.65 to 2.7 V; VI = VIH or VIL;
VO = VCC or GND
VCC = 3.0 to 3.6 V; VI = VIH or VIL;
VO = VCC or GND
;
–0.12.5
–0.15
–0.110
VCC = 1.65 to 2.7 V; VI = VCC or GND; IO = 0–0.120
VCC = 3.0 to 3.6 V; VI = VCC or GND; IO = 0–0.240
V
V
A
µA
µ
µ
2001 Apr 20
5
Page 6
Philips SemiconductorsProduct specification
FORM
t
ns
ns
ns
18-bit registered driver with inverted register enable
and 15 Ω termination resistors (3-State)
AC CHARACTERISTICS
GND = 0 V; tr = tf ≤ 2.0 ns; CL = 30 pF
SYMBOLPARAMETER
Propagation delay An to Yn1, 70.71.72.50.82.03.11.02.64.5–5.2
t
PHL/tPLH
t
PZH/tPZL
t
PHZ/tPLZ
t
SU
t
F
max
NOTES:
1. All typical values are measured at T
Propagation delay LE to Yn2, 70.71.92.70.82.33.31.02.95.0–5.6
Propagation delay CP to Yn3, 70.71.72.50.82.03.01.02.64.5–5.2
3-State output enable time OE
to Yn
3-State output disable time
OE to Yn
CP pulse width HIGH or LOW3, 71.0––1.2––2.0––––
W
LE pulse width HIGH2, 71.0––1.2––2.0––––
Set-up time An to CP5, 70.7––0.7––0.7––1.0–
Set-up time An to LE HIGH4, 70.5––0.5––0.5––0.2–
Set-up time An to LE LOW4, 70.5––0.5––0.6––2.0–ns
Hold time An to CP5, 70.9––0.9––1.0––1.5–
Hold time An to LE HIGH4, 71.6––1.7––2.0––3.2–
h
Hold time An to LE LOW4, 71.4––1.5––1.7––2.8–ns
Maximum clock pulse frequency3, 7500––400––250––––MHz
WAVE-
FORM
6, 71.02.34.51.02.54.51.53.06.5–5.5ns
6, 71.02.33.51.02.24.01.53.56.5–6.9ns
= 25 °C and at VCC = 1.8 V, 2.5 V, 3.3 V.
amb
VCC = 3.3 ± 0.3 VVCC = 2.5 ± 0.2 VVCC = 1.8 ± 0.15 VVCC = 1.2 V UNIT
MIN TYP1MAX MINTYP1MAX MIN TYP1MAX MINTYP
74A VCM162834
LIMITS
ns
2001 Apr 20
6
Page 7
Philips SemiconductorsProduct specification
ÉÉÉÉ
ÉÉÉÉ
18-bit registered driver with inverted register enable
and 15 Ω termination resistors (3-State)
AC WAVEFORMS FOR VCC = 3.0 V TO 3.6 V RANGE
VM = 0.5 V
VX = VOL + 0.300 V
VY = VOH – 0.300 V
VOL and VOH are the typical output voltage drop that occur with the
output load.
VI = V
CC
CC
AC WAVEFORMS FOR VCC = 2.3 V TO 2.7 V AND
VCC < 2.3 V RANGE
VM = 0.5 V
VX = VOL + 0.15 V
VY = VOH – 0.15 V
VOL and VOH are the typical output voltage drop that occur with the
output load.
V
= V
I
CC
CC
V
I
A
n
INPUT
GND
V
OH
Y
n
OUTPUT
V
OL
V
M
t
PHL
NOTE: VM = 0.5VCC at V
V
M
= 2.3 to 2.7 V
CC
t
PLH
SH00132
Waveform 1. Input (An) to output (Yn) propagation delay
V
I
LE INPUT
GND
V
Yn OUTPUT
V
V
M
t
PHL
OH
OL
NOTE: VM = 0.5 VCC at V
t
W
V
M
CC
t
PLH
= 2.3 to 2.7 V
V
M
SH00165
Waveform 2. Latch enable input (LE) pulse width, the latch
enable input to output (Yn) propagation delays.
1/f
CP INPUT
GND
V
Yn OUTPUT
V
V
I
OH
OL
NOTE: VM = 0.5VCC at V
V
t
PHL
MAX
t
= 2.3 to 2.7 V
V
PLH
M
SH00135
M
t
W
V
M
CC
Waveform 3. The clock (CP) to Yn propagation delays, the
clock pulse width and the maximum clock frequency.
V
I
An
INPUT
GND
V
I
LE
INPUT
GND
NOTE: The shaded areas indicate when the input is permitted to change
for predictable output performance.
VM = 0.5VCC at V
Waveform 4. Data set-up and hold times for the An input to the
CP INPUT
GND
An INPUT
GND
Yn OUTPUT
NOTE: The shaded areas indicate when the input is permitted to change
Waveform 5. Data set-up and hold times for the An input to the
V
I
nOE INPUT
GND
V
CC
OUTPUT
LOW-to-OFF
OFF-to-LOW
V
OL
V
OH
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
GND
NOTE: VM = 0.5VCC at V
Waveform 6. 3-State enable and disable times
V
M
th
t
SU
V
M
= 2.3 to 2.7 V
CC
LE
input
V
I
V
M
t
su
V
I
V
OH
V
OL
for predictable output performance.
VM = 0.5VCC at V
= 2.3 to 2.7 V
CC
clock CP input
V
M
t
PLZ
V
t
PHZ
outputs
enabled
= 2.3 to 2.7 V
CC
74A VCM162834
th
t
SU
SH00166
t
su
PZH
t
h
SH00136
V
M
V
SH00137
t
h
V
M
t
PZL
X
t
V
Y
outputs
disabled
M
outputs
enabled
2001 Apr 20
7
Page 8
Philips SemiconductorsProduct specification
18-bit registered driver with inverted register enable
and 15 Ω termination resistors (3-State)
TEST CIRCUIT
S
1
R
L
R
L
R
L
1000 Ω
500 Ω
SV01883
2 * V
Open
GND
CC
V
CC
PULSE
GENERATOR
V
I
D.U.T.
R
T
V
O
C
L
Test Circuit for switching times
DEFINITIONS
RL = Load resistor
C
= Load capacitance includes jig and probe capacitance
L
R
= Termination resistance should be equal to Z
T
of pulse generators.
OUT
SWITCH POSITION
TESTS
t
PLH/tPHL
t
PLZ/tPZL
t
PHZ/tPZH
Open
2 V
GND
V
1
CC
CC
< 2.3 VV
2.3–2.7 V
3.0 –3.6 V500 Ω
V
I
CC
V
CC
V
CC
Waveform 7. Load circuitry for switching times
74A VCM162834
2001 Apr 20
8
Page 9
Philips SemiconductorsProduct specification
18-bit registered driver with inverted register enable
74A VCM162834
and 15 Ω termination resistors (3-State)
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1 mmSOT364-1
2001 Apr 20
9
Page 10
Philips SemiconductorsProduct specification
18-bit registered driver with inverted register enable
and 15 Ω termination resistors (3-State)
Data sheet status
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1]
74A VCM162834
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 2001
All rights reserved. Printed in U.S.A.
Date of release: 04-01
Document order number:9397-750-08282
2001 Apr 20
10
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