Page 1
74ABT16652
74ABTH16652
16-bit transceiver/register, non-inverting
(3-State)
Product specification
Supersedes data of 1995 Aug 17
IC23 Data Handbook
1998 Feb 27
INTEGRATED CIRCUITS
Page 2
Philips Semiconductors Product specification
74ABT16652
74ABTH16652
16-bit transceiver/register, non-inverting (3-State)
2
1998 Feb 27 853-1790 19026
FEA TURES
•Independent registers for A and B buses
•Multiple V
CC
and GND pins minimize switching noise
•Power-up 3-State
•74ABTH16652 incorporates bus-hold data inputs which eliminate
the need for external pull-up resistors to hold unused inputs
•Power-up reset
•Live insertion/extraction permitted
•Multiplexed real-time and stored data
•Output capability: +64mA/–32mA
•Latch-up protection exceeds 500mA per JEDEC Std 17
•ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
DESCRIPTION
The 74ABT16652 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT16652 transceiver/register consists of two sets of bus
transceiver circuits with 3-State outputs, D-type flip-flops, and
control circuitry arranged for multiplexed transmission of data
directly from the input bus or the internal registers. Data on the A or
B bus will be clocked into the registers as the appropriate clock pin
goes HIGH. Output Enable (nOEAB, (nOEBA
) and Select (nSAB,
nSBA
) pins are provided for bus management.
Two options are available, 74ABT16652 which does not have the
bus-hold feature and 74ABTH16652 which incorporates the
bus-hold feature.
QUICK REFERENCE DA TA
SYMBOL PARAMETER
CONDITIONS
T
amb
= 25°C; GND = 0V
TYPICAL UNIT
t
PLH
t
PHL
Propagation delay nAx to nBx CL = 50pF; VCC = 5V
2.3
1.8
ns
C
IN
Input capacitance VI = 0V or V
CC
4 pF
C
I/O
I/O capacitance VO = 0V or VCC; 3-State 7 pF
I
CCZ
pp
Outputs disabled; VCC =5.5V 500 µA
I
CCL
Quiescent supply current
Outputs low; VCC = 5.5V 8 mA
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER
56-Pin Plastic SSOP Type III –40°C to +85°C 74ABT16652 DL BT16652 DL SOT371-1
56-Pin Plastic TSSOP Type II –40°C to +85°C 74ABT16652 DGG BT16652 DGG SOT364-1
56-Pin Plastic SSOP Type III –40°C to +85°C 74ABTH16652 DL BH16652 DL SOT371-1
56-Pin Plastic TSSOP Type II –40°C to +85°C 74ABTH16652 DGG BH16652 DGG SOT364-1
LOGIC SYMBOL
354255
156
26 3127 30
28 29
5
6
10
12
13
14
8
9
52
51
47
45
44
43
49
48
15
16
20
21
23
24
17
19
42
41
37
36
34
33
40
38
SH00047
1A0
1A1
1A2
1A3
1A4
1A5
1A6
1A7
1B0
1B1
1B2
1B3
1B4
1B5
1B6
1B7
2A0
2A1
2A2
2A3
2A4
2A5
2A6
2A7
2B0
2B1
2B2
2B3
2B4
2B5
2B6
2B7
1CPAB
1SAB
1SBA
1CPBA
1OEAB
1OEBA
2OEAB
2OEBA
2CPAB
2SAB
2SBA
2CPBA
Page 3
Philips Semiconductors Product specification
74ABT16652
74ABTH16652
16-bit transceiver/register, non-inverting (3-State)
1998 Feb 27
3
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
27
28
30
29
1OEAB
1CPAB
1SAB
GND
1A0
1A1
1A2
1A3
1A4
GND
1A5
1A6
1A7
2A0
2A2
GND
2A3
V
CC
2A1
2A4
2A5
2A6
2A7
2SAB
V
CC
GND
2CPAB
20EAB
1OE
BA
1CPBA
1SBA
GND
1B0
1B1
1B2
1B3
1B4
GND
1B5
1B6
1B7
2B0
2B2
GND
2B3
V
CC
2B1
2B4
2B5
2B6
2B7
2SBA
V
CC
GND
2CPBA
2OE
BA
SH00046
LOGIC SYMBOL (IEEE/IEC)
EN1 [BA]
SH00045
1
28
30
29
54
52
51
49
48
47
45
44
43
42
41
40
38
37
36
34
33
31
3
5
6
8
9
10
12
13
14
15
16
17
19
20
21
23
24
5D
2
56
55
27
C3
G4
EN7 [BA]
26
EN2 [AB]
C5
G6
EN8 [AB]
C9
G10
C11
G12
1
∇1
6
16
43D
4
1
1
2∇
1
∇7
11D 12
112
1
8∇
10 9D
10 1
1OEBA
1OEAB
1CPBA
1SBA
1CPAB
1SAB
2OEBA
2OEAB
2CPBA
2SBA
2CPAB
2SAB
1AO
1A1
1A2
1A3
1A4
1A5
1A6
1A7
2A0
2A1
2A2
2A3
2A4
2A5
2A6
1B0
1B1
1B2
1B3
1B4
1B5
1B6
1B7
2B0
2B1
2B2
2B3
2B4
2B5
2B6
2B7
2A7
PIN DESCRIPTION
PIN NUMBER SYMBOL NAME AND FUNCTION
2, 55, 27, 30 1CPAB, 1CPBA, 2CPAB, 2CPBA Clock input A to B / Clock input B to A
3, 54, 26, 31 1SAB, 1SBA, 2SAB, 2SBA Select input A to B / Select input B to A
5, 6, 8, 9, 10, 12, 13, 14
15, 16, 17, 19, 20, 21, 23, 24
1A0 – 1A7,
2A0 – 2A7
Data inputs/outputs (A side)
52, 51, 49, 48, 47, 45, 44, 43
42, 41, 40, 38, 37, 36, 34, 33
1B0 – 1B7,
2B0 – 2B7
Data inputs/outputs (B side)
1, 56, 28, 29
1OEAB, 1OEBA,
2OEAB, 2OEBA
Output enable inputs
4, 11, 18, 25, 32, 39, 46, 53 GND Ground (0V)
7, 22, 35, 50 V
CC
Positive supply voltage
Page 4
Philips Semiconductors Product specification
74ABT16652
74ABTH16652
16-bit transceiver/register, non-inverting (3-State)
1998 Feb 27
4
LOGIC DIAGRAM
1D
C1
Q
DETAIL A X 7
nB0
1D
C1
Q
nA0
1of 8 Channels
nA7
nA6
nA5
nA4
nA3
nA2
nA1 nB1
nB2
nB3
nB4
nB5
nB6
nB7
nOE
BA
nOEAB
nCPBA
nSBA
nCPAB
nSAB
SH00065
FUNCTION TABLE
INPUTS DATA I/O OPERATING MODE
nOEAB nOEBA nCPAB nCPBA nSAB
nSB
A
nAx nBx
L
L
H
H
H or L↑H or L
↑
X
X
X
X
Input Input
Isolation
Store A and B data
X
H
H
H
↑
↑
H or L
↑
X
**
X
X
Input
Unspecified
output*
Store A, Hold B
Store A in both registers
L
L
X
L
H or L
↑
↑
↑
X
X
X**Unspecified
output*
Input
Hold A, Store B
Store B in both registers
L
L
L
L
X
X
X
H or L
X
X
L
H
Output Input
Real time B data to A bus
Stored B data to A bus
H
H
H
H
X
H or L
X
X
L
H
X
X
Input Output
Real time A data to B bus
Store A data to B bus
H L H or L H or L H H Output Output
Stored A data to B bus
Stored B data to A bus
H = High voltage level
L = Low voltage level
X = Don’t care
↑ = Low-to-High clock transition
* The data output function may be enabled or disabled by various signals at the nOEBA
and nOEAB inputs. Data input functions are
always enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock.
** If both Select controls (nSAB and nSBA) are Low, then clocks can occur simultaneously. If either Select control is High, the clocks must
be staggered in order to load both registers.
Page 5
Philips Semiconductors Product specification
74ABT16652
74ABTH16652
16-bit transceiver/register, non-inverting (3-State)
1998 Feb 27
5
The following examples demonstrate the four fundamental
bus-management functions that can be performed with the
74ABT16652.The select pins determine whether data is stored or
transferred through the device in real time. The output enable pins
determine the direction of the data flow.
}
REAL TIME BUS TRANSFER
BUS B TO BUS A
nOEAB nOEBA nCPAB nCPBA nSAB nSBA
LLXXXL
}
REAL TIME BUS TRANSFER
BUS A TO BUS B
nOEAB nOEBA nCPAB nCPBA nSAB nSBA
HHXXLX
}
STORAGE FROM
A, B, OR A AND B
nOEAB nOEBA nCPAB nCPBA nSAB nSBA
XH↑ XXX
LXX↑ XX
LH↑↑XX
}
TRANSFER STORED DA TA
TO A OR B
nOEAB nOEBA nCPAB nCPBA nSAB nSBA
H L H | L H | L H H
ABAB AB
AB
SH00066
Page 6
Philips Semiconductors Product specification
74ABT16652
74ABTH16652
16-bit transceiver/register, non-inverting (3-State)
1998 Feb 27
6
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
PARAMETER CONDITIONS RATING UNIT
V
CC
DC supply voltage –0.5 to +7.0 V
I
IK
DC input diode current VI < 0 –18 mA
V
I
DC input voltage
3
–1.2 to +7.0 V
I
OK
DC output diode current VO < 0 –50 mA
V
OUT
DC output voltage
3
output in Off or HIGH state –0.5 to +5.5 V
p
output in LOW state 128
I
OUT
DC output current
output in HIGH state –64
mA
T
stg
Storage temperature range –65 to 150 °C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
MIN MAX
UNIT
V
CC
DC supply voltage 4.5 5.5 V
V
I
Input voltage 0 V
CC
V
V
IH
High-level input voltage 2.0 V
V
IL
Low-level Input voltage 0.8 V
I
OH
High-level output current –32 mA
I
OL
Low-level output current 64 mA
∆t/∆v Input transition rise or fall rate 0 10 ns/V
T
amb
Operating free-air temperature range –40 +85 °C
Page 7
Philips Semiconductors Product specification
74ABT16652
74ABTH16652
16-bit transceiver/register, non-inverting (3-State)
1998 Feb 27
7
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL PARAMETER TEST CONDITIONS
T
amb
= +25°C
T
amb
= –40°C
to +85°C
UNIT
MIN TYP MAX MIN MAX
V
IK
Input clamp voltage VCC = 4.5V; IIK = –18mA –0.9 –1.2 –1.2 V
VCC = 4.5V; IOH = –3mA; VI = VIL or V
IH
2.5 2.9 2.5 V
V
OH
High-level output voltage VCC = 5.0V; IOH = –3mA; VI = VIL or V
IH
3.0 4.0 3.0 V
VCC = 4.5V; IOH = –32mA; VI = VIL or V
IH
2.0 2.4 2.0 V
V
OL
Low-level output voltage VCC = 4.5V; IOL = 64mA; VI = VIL or V
IH
0.35 0.55 0.55 V
V
RST
Power-up output low
voltage
3
VCC = 5.5V; IOL = 1mA; VI = GND or V
CC
0.13 0.55 0.55 V
Control
III
nput leakage curren
t
V
CC
= 5.5V;
V
I
=
GND
or
V
CC
Control
pins
±0.
01±1.0±1.0µA
VCC = 4.5V; VI = 0.8V 35 35
I
HOLD
Bus Hold current A or B
Ports5 74ABTH16652
VCC = 4.5V; VI = 2.0V –75 –75
µA
VCC = 5.5V; VI = 0 to 5.5V ±800
I
OFF
Power-off leakage current VCC = 0V; VO = 4.5V; VI = 0V or 5.5V ±1.0 ±100 ±100 µA
I
PU/PD
Power-up/down 3-State
output current
4
VCC = 2.1V; VO = 0.0V; VI = GND or V
CC
±1.0 ±50 ±50 µA
IIH + I
OZH
3-State output High current VCC = 5.5V; VO = 5.5V; VI = VIL or V
IH
1.0 10 10 µA
IIL + I
OZL
3-State output Low current VCC = 5.5V; VO = 0.0V; VI = VIL or V
IH
–1.0 –10 –10 µA
I
CEX
Output High leakage current VCC = 5.5V; VO = 5.5V; VI = GND or V
cc
5.0 50 50 µA
I
O
Output current
1
VCC = 5.5V; VO = 2.5V –50 –80 –180 –50 –180 mA
I
CCH
VCC = 5.5V; Outputs High,
VI = GND or V
CC
0.5 2 2 mA
I
CCL
Quiescent supply current VCC = 5.5V; Outputs Low , VI = GND or V
CC
8 19 19 mA
I
CCZ
VCC = 5.5V; Outputs 3-State;
V
I
= GND or V
CC
0.5 2 2 mA
∆I
CC
Additional supply current
per input pin
2
74ABT16652
VCC = 5.5V; one input at 3.4V,
other inputs at VCC or GND
5.0 50 50 µA
∆I
CC
Additional supply current
per input pin
2
74ABTH16652
VCC = 5.5V; one input at 3.4V,
other inputs at VCC or GND
200 500 500 µA
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
4. This parameter is valid for any V
CC
between 0 and 2.1V . When the part enables with VCC between 2.1V and 4.5V , the outputs will correctly
function with respect to all input logic states.
5. This is the bus hold overdrive current required to force the input to the opposite logic state.
Page 8
Philips Semiconductors Product specification
74ABT16652
74ABTH16652
16-bit transceiver/register, non-inverting (3-State)
1998 Feb 27
8
AC CHARACTERISTICS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω
LIMITS
SYMBOL PARAMETER WAVEFORM
T
amb
= +25oC
VCC = +5.0V
T
amb
= -40 to +85oC
VCC = +5.0V ±0.5V
UNIT
MIN TYP MAX MIN MAX
f
MAX
Maximum clock frequency 1 125 125 MHz
t
PLH
t
PHL
Propagation delay
nCPAB to nBx or nCPBA to nAx
1
1.5
1.5
3.3
2.8
4.0
4.1
1.5
1.5
4.9
4.7
ns
t
PLH
t
PHL
Propagation delay
nAx to nBx or nBx to nAx
2
1.0
1.0
2.3
1.8
3.2
4.1
1.0
1.0
3.9
4.6
ns
t
PLH
t
PHL
Propagation delay
nSAB to nBx or nSBA to nAx
3
1.0
1.0
3.4
2.6
4.3
4.3
1.0
1.0
5.0
5.0
ns
t
PZH
t
PZL
Output enable time
nOEBA to nAx
5
6
1.0
1.5
2.5
2.2
4.1
4.4
1.0
1.5
5.0
5.3
ns
t
PHZ
t
PLZ
Output disable time
nOEBA to nAx
5
6
1.5
1.5
3.6
2.7
4.4
3.6
1.5
1.5
4.9
4.0
ns
t
PZH
t
PZL
Output enable time
nOEAB to nBx
5
6
1.0
1.5
2.9
3.0
3.6
3.9
1.0
1.5
4.2
4.6
ns
t
PHZ
t
PLZ
Output disable time
nOEAB to nBx
5
6
2.0
1.5
3.1
2.3
5.5
4.5
2.0
1.5
5.9
5.2
ns
AC SETUP REQUIREMENTS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω
LIMITS
SYMBOL PARAMETER WAVEFORM
T
amb
= +25oC
VCC = +5.0V
T
amb
= -40 to +85oC
VCC = +5.0V ±0.5V
UNIT
MIN TYP MIN
ts(H)
ts(L)
Setup time
nAx to nCPBA, nBx to nCPAB
4
3.0
3.0
1.2
0.8
3.0
3.0
ns
th(H)
th(L)
Hold time
nAx to nCPBA, nBx to nCPAB
4
1.0
1.0
–0.7
–1.1
1.0
1.0
ns
tw(H)
tw(L)
Pulse width, High or Low
nCPAB or nCPBA
1
4.3
4.3
1.0
1.0
4.3
4.3
ns
AC WAVEFORMS
VM = 1.5V, VIN = GND to 3.0V
V
M
V
M
V
M
V
M
V
M
1/f
MAX
tw(H) tw(L)
t
PHL
t
PLH
nCPBA or
nCPAB
nAx or nBx
SH00030
0V
3.0V or V
CC
whichever
is less
V
OH
V
OL
Waveform 1. Propagation Delay, Clock Input to Output, Clock
Pulse Width, and Maximum Clock Frequency
V
M
t
PLH
t
PHL
V
M
V
M
V
M
nBx or nAx
nAx or nBx
SH00048
3.0V or V
CC
0V
V
OH
V
OL
Waveform 2. Propagation Delay, nAx to nBx or nBx to nAx
Page 9
Philips Semiconductors Product specification
74ABT16652
74ABTH16652
16-bit transceiver/register, non-inverting (3-State)
1998 Feb 27
9
AC WAVEFORMS (Continued)
VM = 1.5V, VIN = GND to 3.0V
V
M
t
PHL
t
PLH
V
M
V
M
V
M
nSBA or
nSAB
nAx or nBx
SH00032
3.0V or V
CC
0V
V
OH
V
OL
Waveform 3. Propagation Delay, SBA to nAx or SAB to nBx
V
M
nAx or
nBx
V
M
V
M
V
M
V
M
V
M
nCPBA or
nCPAB
t
s
(H)
t
h
(H)
t
s
(L)
t
h
(L)
SH00049
NOTE: The shaded areas indicate when the input is permitted
to change for predictable output performance.
tW(L)
3.0V
or
V
CC
0V
3.0V
or
V
CC
0V
Waveform 4. Data Setup and Hold Times
V
Y
V
M
V
M
V
M
nAx or nBx
t
PZH
t
PHZ
SH00050
nOEBA
0V
nOEAB
V
OH
3.0V or V
CC
whichever
is less
0V
Waveform 5. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
V
X
V
M
V
M
V
M
nAx or
nBx
t
PZL
t
PLZ
SH00051
nOEBA
V
OL
nOEAB
3.0V
or
V
CC
0V
3.0V
or
V
CC
0V
Waveform 6. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
TEST CIRCUIT AND WAVEFORMS
t
W
90%
V
M
10%
90%
V
M
10%
90%
V
M
10%
90%
V
M
10%
NEGATIVE
PULSE
POSITIVE
PULSE
t
W
AMP (V)
0V
0V
t
THL (tf
)
INPUT PULSE REQUIREMENTS
Rep. Rate
t
w
t
R
t
F
1MHz 500ns
2.5ns 2.5ns
VM = 1.5V
Input Pulse Definition
V
CC
FAMILY
74ABT16
D.U.T.
PULSE
GENERATOR
R
L
C
L
R
T
V
IN
V
OUT
Test Circuit for 3-State Outputs
DEFINITIONS:
R
L
= Load resistor; see AC CHARACTERISTICS for value.
C
L
= Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
t
THL (tf
)
t
TLH (tr
)
t
TLH (tr
)
AMP (V)
Amplitude
3.0V
R
L
7.0V
SH00022
TEST SWITCH
t
PLZ
closed
t
PZL
closed
All other open
SWITCH POSITION
Page 10
Philips Semiconductors Product specification
74ABT16652
74ABTH16652
16-bit transceiver/register, non-inverting (3-State)
1998 Feb 27
10
SSOP56: plastic shrink small outline package; 56 leads; body width 7.5 mm SOT371-1
Page 11
Philips Semiconductors Product specification
74ABT16652
74ABTH16652
16-bit transceiver/register, non-inverting (3-State)
1998 Feb 27
11
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1mm SOT364-1
Page 12
Philips Semiconductors Product specification
74ABT16652
74ABTH16652
16-bit transceiver/register, non-inverting (3-State)
yyyy mmm dd
12
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code Date of release: 05-96
Document order number: 9397-750-03499
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition
[1]
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
Data sheet status
[1] Please consult the most recently issued datasheet before initiating or completing a design.
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