Datasheet 2SK3151 Datasheet (HIT)

Page 1
2SK3151
Silicon N Channel MOS FET High Speed Power Switching
Features
Low on-resistance
= 11.5 m typ.
DS (on)
High speed switching
4 V gate drive device can be driven from 5 V source
Outline
ADE-208-747A (Z)
2nd. Edition
February 1999
TO–3P
1
G
D
2
1. Gate
1
2
3
S
3
2. Drain (Flange)
3. Source
Page 2
2SK3151
Absolute Maximum Ratings (Ta = 25°C)
Item Symbol Ratings Unit
Drain to source voltage V Gate to source voltage V Drain current I Drain peak current I Body-drain diode reverse drain current I Avalanche current I Avalanche energy E Channel dissipation Pch
DSS
GSS
D
D(pulse)
DR
Note3
Note3
AR
Note1
Note2
Channel temperature Tch 150 °C Storage temperature Tstg –55 to +150 °C
Note: 1. PW 10 µs, duty cycle 1%
2. Value at Tc = 25°C
3. Value at Tch = 25°C, Rg 50
Electrical Characteristics (Ta = 25°C)
100 V ±20 V 50 A 200 A 50 A 50 A 250 mJ 125 W
Item Symbol Min Typ Max Unit Test Conditions
Drain to source breakdown voltage V Gate to source breakdown voltage V Gate to source leak current I Zero gate voltege drain current I Gate to source cutoff voltage V Static drain to source on state R resistance R
(BR)DSS
(BR)GSS
GSS
DSS
GS(off)
DS(on)
DS(on)
100 V ID = 10 mA, VGS = 0 ±20——V I
= ±100 µA, VDS = 0
G
——±10 µAVGS = ±16 V, VDS = 0 ——10µAVDS = 100 V, VGS = 0
1.0 2.5 V ID = 1 mA, VDS = 10 V — 11.5 15 m ID = 25 A, VGS = 10 V
—1625m ID = 25 A, VGS = 4 V Forward transfer admittance |yfs|3050—S ID = 25 A, VDS = 10 V Input capacitance Ciss 4000 pF VDS = 10 V Output capacitance Coss 1650 pF VGS = 0 Reverse transfer capacitance Crss 590 pF f = 1 MHz Turn-on delay time t Rise time t Turn-off delay time t Fall time t Body–drain diode forward voltage V Body–drain diode reverse
recovery time
t
d(on)
r
d(off)
f
DF
rr
30 ns ID = 25 A, VGS = 10 V
280 ns RL = 1.2
830 ns
450 ns
0.95 V IF = 50 A, VGS = 0
100 ns IF = 50 A, VGS = 0
diF/ dt = 50 A/ µs
Note: 4. Pulse test
Note4
Note4
Note4
2
Page 3
Main Characteristics
2SK3151
160
Power vs. Temperature Derating
120
80
40
Channel Dissipation Pch (W)
0
50 100 150 200
Case Temperature Tc (°C)
Typical Output Characteristics
50
40
D
30
V = 10 V
GS
4 V
3.5 V
Pulse Test
3 V
1000
300
D
300
100
100
30
10
Drain Current I (A)
3
1
12 5
100
80
D
60
Maximum Safe Operation Area
10 µs
100 µs
1 ms
PW = 10 ms (1 shot)
DC Operation (Tc = 25°C)
Operation in this area is limited by R
DS(on)
Ta = 25°C
50 100
20
10
Drain to Source Voltage V (V)
DS
Typical Transfer Characteristics
V = 10 V
DS
Pulse Test
200
20
Drain Current I (A)
10
0
246810
Drain to Source Voltage V (V)
2.5 V
2 V
DS
40
Drain Current I (A)
20
0
75°C
12345
Gate to Source Voltage V (V)
Tc = –25°C
25°C
GS
3
Page 4
2SK3151
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
1.0 Pulse Test
0.8
DS(on)
V (V)
0.6
I = 50 A
D
0.4
20 A
0.2
10 A
Drain to Source Saturation Voltage
0 0
48
Gate to Source Voltage V (V)
12
16 20
GS
Static Drain to Source on State Resistance
vs. Temperature
50
Pulse Test
40
DS(on)
R (m )
30
20
4 V
I = 50 A
D
10,20 A
10,20 A
10
V = 10 V
GS
0
Static Drain to Source on State Resistance
–50 0 50 100 150 200
Case Temperature Tc (°C)
50 A
Static Drain to Source on State Resistance
vs. Drain Current
100
Pulse Test
50
V = 4 V
DS(on)
20
R (m )
GS
10
10 V
5
2
Drain to Source On State Resistance
1
1
2
Drain Current I (A)
20 100
10
D
Forward Transfer Admittance vs.
Drain Current
500
V = 10 V
200
fs
DS
Pulse Test
100
50 20
10
Tc = –25 °C
25 °C
5 2
75 °C
1
Forward Transfer Admittance |y | (S)
0.5
0.1 0.3 1 3 10 30 100 Drain Current I (A)
D
505
200
4
Page 5
2SK3151
Body–Drain Diode Reverse
Recovery Time
1000
500
200
100
50
20
Reverse Recovery Time trr (ns)
10
di / dt = 50 A / µs V = 0, Ta = 25°C
GS
0.1 0.3 1 3 10 30 100 Reverse Drain Current I (A)
Dynamic Input Characteristics
200
I = 50 A
D
DS
160
V = 100 V
DD
50 V 25 V
120
V
DS
80
40
Collector to Emitter Voltage V (V)
0
V = 100 V
DD
50 V 25 V
80 160 240 320 400
Gate Charge Qg (nc)
DR
V
GS
Typical Capacitance vs. Drain to Source Voltage
30000
10000
3000
1000
Capacitance C (pF)
300
100
01020304050
Drain to Source Voltage V (V)
20
16
GE
5000
1000
Switching Characteristics
500
12
200
8
4
0
100
50
Switching Time t (ns)
Gate to Emitter Voltage V (V)
20
10
0.1 0.2
0.5
Drain Current I (A)
V = 0
GS
f = 1 MHz
Ciss
Coss
Crss
DS
t
d(off)
t
f
t
r
t
d(on)
V = 10 V, V = 30 V
GS
DD
PW = 5 µs, duty < 1%
2
1
5
10
20
D
50
5
Page 6
2SK3151
Reverse Drain Current vs.
Source to Drain Voltage
50
10 V
40
F
30
V = 0, –5 V
20
5 V
GS
10
Reverse Drain Current I (A)
0
0.4 0.8 1.2 1.6 2.0
Source to Drain Voltage V (V)
Avalanche Test Circuit Avalanche Waveform
V
DS
Monitor
Rg
Vin 15 V
50
Pulse Test
SDF
L
I
AP
Monitor
D. U. T
Maximum Avalanche Energy vs.
Channel Temperature Derating
250
AR
200
150
100
50
0
Repetitive Avalanche Energy E (mJ)
25 50 75 100 125 150
Channel Temperature Tch (°C)
1
E = • L • I •
AR
2
I
AP
V
DD
I
V
DD
0
2
AP
D
I = 50 A
AP
V = 50 V
DD
duty < 0.1 % Rg > 50
V
DSS
V – V
DSS DD
V
DS
V
(BR)DSS
6
Page 7
2SK3151
3
Normalized Transient Thermal Impedance vs. Pulse Width
s (t)
1
γ
D = 1
0.5
0.3
0.2
0.1
0.1
0.05
0.03 Normalized Transient Thermal Impedance
0.02
0.01
1shot pulse
0.01 10 µ
100 µ 1 m 10 m 100 m 1 10
Pulse Width PW (S)
Tc = 25°C
θ γ θ
ch – c(t) = s (t) • ch – c
θ
ch – c = 1.0°C/W, Tc = 25 °C
P
DM
PW
T
D =
PW
T
Switching Time Test Circuit Waveform
Vin Monitor
Vout Monitor
D.U.T.
R
Vin 10 V
50
L
V
DD
= 30 V
Vin
Vout
10%
10%
90%
td(on)
tr
90%
td(off)
90%
10%
t
f
7
Page 8
2SK3151
Package Dimensions
16.0 max
0.5 typ
φ
3.2 ± 0.2
1.0 typ
Unit: mm
5.0 max
1.5 typ
5.0 ± 0.3
1.6 typ
1.4 max
2.0 typ
1.0 ± 0.2
3.6 typ
5.45 ± 0.2 5.45 ± 0.2
0.9 typ
1.0 typ
2.0 typ
20.1 max18.0 ± 0.5
14.9 ± 0.2
0.3 typ
2.8 typ
0.6 ± 0.2
Hitachi Code
EIAJ
JEDEC
TO–3P
SC–65
8
Page 9
Cautions
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4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as fail­safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product.
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Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan.
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