Datasheet 2SK3133-S, 2SK3133-L Datasheet (HIT)

Page 1
2SK3133(L),2SK3133(S)
Silicon N Channel MOS FET High Speed Power Switching
ADE-208-720 (Z)
Target Specification
1st. Edition
February 1999
Low on-resistance
R
DS(on)
= 7 m typ.
Low drive current
4 V gate drive device can be driven from 5 V source
Outline
1. Gate
2. Drain
3. Source
4. Drain
1
2
3
4
1
2
3
4
LDPAK
G
D
S
Page 2
2SK3133(L),2SK3133(S)
2
Absolute Maximum Ratings (Ta = 25°C)
Item Symbol Ratings Unit
Drain to source voltage V
DSS
30 V
Gate to source voltage V
GSS
±20 V
Drain current I
D
50 A
Drain peak current I
D(pulse)
Note 1
200 A
Body-drain diode reverse drain current I
DR
50 A
Channel dissipation Pch
Note 2
50 W Channel temperature Tch 150 °C Storage temperature Tstg –55 to +150 °C
Note: 1. PW 10 µs, duty cycle 1%
2. Value at Tc = 25°C
Electrical Characteristics (Ta = 25°C)
Item Symbol Min Typ Max Unit Test Conditions
Drain to source breakdown voltage V
(BR)DSS
30——V I
D
= 10 mA, VGS = 0
Gate to source leak current I
GSS
——±0.1 µAVGS = ±20 V, VDS = 0
Zero gate voltege drain current I
DSS
——10µAVDS = 30 V, VGS = 0
Gate to source cutoff voltage V
GS(off)
1.0 2.5 V ID = 1 mA, VDS = 10 V
Note 1
Static drain to source on state R
DS(on)
7 10 m ID = 25 A, VGS = 10 V
Note 1
resistance 12 18 m ID = 25 A, VGS = 4 V
Note 1
Forward transfer admittance |yfs| TBD TBD S ID = 25 A, VDS = 10 V
Note 1
Input capacitance Ciss TBD pF VDS = 10V Output capacitance Coss TBD pF VGS = 0 Reverse transfer capacitance Crss TBD pF f = 1 MHz Total gate charge Qg TBD nc VDD = 10 V Gate to source charge Qgs TBD nc VGS = 10 V Gate to drain charge Qgd TBD nc ID = 50 A Turn-on delay time t
d(on)
TBD ns VGS = 10 V, ID = 25 A
Rise time t
r
TBD ns RL = 0.4
Turn-off delay time t
d(off)
TBD ns
Fall time t
f
TBD ns
Body–drain diode forward voltage V
DF
TBD V IF = 50 A, VGS = 0
Body–drain diode reverse recovery time
t
rr
TBD ns IF = 50 A, VGS = 0
diF/ dt = 50 A/ µs
Note: 1. Pulse test
Page 3
2SK3133(L),2SK3133(S)
3
Main Characteristics
80
60
40
20
0
50 100 150 200
Channel Dissipation Pch (W)
Case Temperature Tc (°C)
Power vs. Temperature Derating
Page 4
2SK3133(L),2SK3133(S)
4
Package Dimensions
Unit: mm
10.2 ± 0.3 (1.4)
8.6 ± 0.3
1.27 ± 0.2
1.2 ± 0.2
2.54 ± 0.5
11.3 ± 0.5
(1.5)
0.86
+0.2 –0.1
3.0
+0.3
–0.5
0.76 ± 0.1
10.0
+0.3
–0.5
2.54 ± 0.5
4.44 ± 0.2
1.3 ± 0.2
2.59 ± 0.2
0.4 ± 0.1
11.0 ± 0.5
10.2 ± 0.3 (1.4)
8.6 ± 0.3
1.27 ± 0.2
2.54 ± 0.5
(1.5)
0.86
+0.2 –0.1
10.0
+0.3
–0.5
2.54 ± 0.5
4.44 ± 0.2
1.3 ± 0.2
2.59 ± 0.2
0.4 ± 0.1
1.2 ± 0.2
(1.5)
0.1
+0.2 –0.1
L type S type
Hitachi Code
EIAJ
JEDEC
LDPAK
— —
Page 5
Cautions
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4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as fail­safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product.
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