Teletext system
Aerial input
Channel coverage
Tuning system
Visual screen size
Service manual CP-785A
PAL, SECAM - B/G, H
NICAM B/G
FM 2Carrier B/G
25" : 113 W approx.
29" : 118 W approx.
25" : 5W x 5W (at 60% mod, 10%THD)
29" : 5W x 5W (at 60% mod, 10%THD)
25" : 7W 8 ohm x 2
29" : 7W 8 ohm x 2
10 pages memory FASTEXT (FLOF or TOP)
75 ohm unbalanced
Off-air channels, S-cable channels and hyperband
frequency synthesiser tuning system
25" : 59 cm
29" : 68 cm
Channel indication
Program Selection
Aux. terminal
On Screen Display
100 programmes
INPUT1(SCART) : Audio / Video In, S-VHS In(with cable)
INPUT2(RCA) : Audio / Video In
OUTPUT(RCA) : TV OUT
Headphone jack (3.5 mm) on front of cabinet
Remote Control Unit
R-40A01 / R-44N08(RD-D90)
RCA Jack - input 2
Pin Signal Description Matching value
1 Video Input 1.0 Vpp+/- 3dB , Impedance 75 ohm
2 Audio Input Left
0.5 Vrms, Impedance > 10k ohm
3 Audio Input Right 0.5 Vrms, Impedence > 10k ohm
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Service manual CP-785A
RCA Jack output
Pin Signal Description Matching value
1 TV Video 1.0Vpp +/- 3dB , Impedence 75 ohm
2 TV Audio Left 0.5Vrms at RF sound FM 54% Mod.(27kHz dev.)
3 TV Audio Right 0.5Vrms at RF sound FM 54% Mod.(27kHz dev.)
W
W
W
W
21 pin Euro SCART - Input 1 / S-Video
Pin Signal Description Matching value
1 N.C.
2 Audio Input Right
3 N.C.
4 Audio Earth
5 Earth
6 Audio Input Left
7 N.C.
8 N.C.
9 N.C.
10 N.C.
11 N.C.
12 N.C.
13 N.C
14 Earth
15 Chroma Input
16 N.C.
17 Earth
18 Video In Earth
19 N.C.
20 Video Input / Y Input 1 Vpp +/- 3dB, Impedance 75 ohm
21 Common Earth
WARNING: Only competent service personnel may carry out work involving the testing or repair of
this equipment.
X-RAY RADIATION PRECAUTION
1. Excessive high voltage can produce potentially hazardous X-RAY RADIATION. To avoid
such hazards, the high voltage must not exceed the specified limit. The nominal value of the high
voltage of this receiver is 26~28 KV (25” - 29”) at max beam current. The high voltage must not
under any circumstances, exceed 29.5 KV (25") or 31 KV (29").
Each time a receiver requires servicing, the high voltage should be checked. It is important to
use an accurate and reliable high voltage meter.
2. The only source of X-ray Radiation in this TV receiver is the picture tube. For continued X-ray
RADIATION protection, the replacement tube must be exactly the same type tube as specified
in the parts list.
SAFETY PRECAUTION
1. Potentials of high voltage are present when this receiver is operating. Operation of the receiver
outside the cabinet or with the back board removed involves a shock hazard from the receiver.
1) Servicing should not be attempted by anyone who is not thoroughly familiar with the
precautions necessary when working on high voltage equipment.
2) Discharge the high potential of the picture tube before handling the tube. The picture tube is
highly evacuated and if broken, glass fragments will be violently expelled.
2. If any Fuse in this TV receiver is blown, replace it with the FUSE specified in the Replacement
Parts List.
3. When replacing a high wattage resistor (oxide metal film resistor) in circuit board, keep the resistor
10 mm away from circuit board.
4. Keep wires away from high voltage or high temperature components.
5. This receiver must operate under AC 240 volts, 5O Hz. NEVER connect to DC supply or any
other power or frequency.
PRODUCT SAFETY NOTICE
Many electrical and mechanical parts in this equipment have special safety-related characteristics.
These characteristics are often passed unnoticed by a visual inspection and the X-ray Radiation
protection afforded by them cannot necessarily be obtained by using replacement components rated for
higher voltage, wattage, etc. Replacement parts which have these special safety characteristics are
identified in this manual and its supplements, electrical components having such features are identified
by designated symbol on the parts list. Before replacing any of these components, read the parts list in
this manual carefully. The use of substitutes replacement parts which do not have the same safety
characteristics as specified in the parts list may create X-ray Radiation.
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Service manual CP-785A
3 - Alignment instructions
3-1 Microcontroller configuration : Service mode
To switch the TV set into service mode please see instruction below.
1 - Select pr. number 91
2 - Adjust sharpness to minimum value and exit all menu.
3 - Quickly press the key sequence : RED - GREEN - menu
To exit SERVICE menu press menu key or Operate(Std By) key.
In Service Mode press “OK” to stop the microcontroller i.e. the I2C bus is free and the set can be
controlled by external equipment. Press “OK” again to allow the microcontroller to control the set
again
3-2 Microcontroller configuration : Option
Option
0 DAEWOO / SAMSUNG for Daewoo Remote control
1 DAEWOO / SAMSUNG for Daewoo Remote control
4 DAEWOO / SAMSUNG for NEC Remote control
5 DAEWOO / SAMSUNG for NEC Remote control
3-3 TV set Alignment
3-3-1 - G2 alignement
- TV in AV mode without video signal ⇒ Black screen.
- TV preset with WP Red, WP Green and WP Blue equal to 32.
- TV preset with Black R, Black G equal to 8.
- Set TV in NORMAL I mode
- Adjust screen volume ( on FBT ) such that the highest cathod cut-off voltage measured on CRT
board, is Vcut off ± 5V.
3-3-2 - White balance
- Select a dark picture and adjust Black G and Black R to the desired colour temperature.
- Select a bright picture and adjust WP Red, WP Green, WP Blue to the desired colour temperature.
3-3-3 - Focus
- Adjust the Focus volume ( on FBT ) to have the best resolution on screen.
Tuner maker Remark
Screen size Vcut-off
25” 140V
29” 140V
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Service manual CP-785A
3-3-4 - Vertical geometry
- Adjust the Vertical Amplitude, Shift, S-
Correction and Slope to compensate for vertical
distortion.
3-3-5 - Horizontal picture centering
- Adjust H Shift to have the picture in the center of the screen.
3-3-6 - East / West correction
- Adjust the H Parall, H Bow, H Width, EW Parabo, Up Corner, Dw Corner, EW trapez to compensate
for geometrical distortion.
H. Parall
H. Bow
H.Width
EW.Parabola
Up Corner
Dw Corner
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Service manual CP-785A
EW Trapez
3-3-7 - AGC
- Adjust the antenna signal level at 68 dBµV± 2 (UHF - CH25)
- Set RF AGC to 0.
- Increase RF AGC level and stop when the level on pin 6 of TDA936x goes below 2.5 Vdc
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Service manual CP-785A
4 - IC description
4-1 TDA936x TV signal processor - Teletext decoder with embedded µ-Controller.
TV-signal Processor
l Multi-standard vision IF circuit with alignment-free PLL demodulator
l Internal (switchable) time-constant for the IF-AGC circuit
l Source selection between 'Internal' CVBS and external CVBS or Y/C signals
l Integrated chrominance trap circuit
l Integrated luminance delay line with adjustable delay time
l Asymmetrical ‘ delay line type’ peaking in the luminance channel
l Black stretching for non-standard luminance signals
l lntegrated chroma band-pass filter with switchable centre frequency
l Only one reference (12 MHz) crystal required for the µ-Controller, Teletext and the colour decoder
l PAL / NTSC or multistandard colour decoder with automatic search system
l Internal base-band delay line
l RGB control circuit with 'Continuous Cathode Calibration', white point and black level off set
adjustment so that the colour temperature of the dark and the bright parts of the screen can be chosen
independently.
l The Text/OSD signals are internally supplied from the -Controller/Teletext decoder
l Contrast reduction possibility during mixed-mode of OSD and Text signals
l Horizontal synchronisation with two control loops and alignment-free horizontal oscillator
l Vertical count-down circuit
l Vertical driver optimised for DC-coupled vertical output stages
l Horizontal and vertical geometry processing
l Horizontal and vertical zoom function for 16 : 9 applications
l Horizontal parallelogram and bow correction for large screen picture tubes
µ
-Controller
l 80C51 µ-controller core standard instruction set and timing
l 1µs machine cycle
l 32 - 128Kx8-bit late programmed ROM
l 3 - 12Kx8-bit Auxiliary RAM (shared with Display and Acquisition)
l Interrupt controller for individual enable/disable with two level priority
l Two 16-bit Timer/Counter registers
l WatchDog timer
l Auxiliary RAM page pointer
l 16-bit Data pointer
l IDLE and Power Down (PD) mode
l 14 bits PWM for Voltage Synthesis Tuning
l 8-bit A/D converter
l 4 pins which can be programmed as general I/0 pin, ADC input or PWM (6-bit) output
Data Capture
l Text memory 10 pages
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Service manual CP-785A
l Inventory of transmitted Teletext pages stored in the Transmitted Page Table (TPT) and Subtitle
Page Table (SPT)
l Data Capture for US Closed Caption
l Data Capture for 525/625 line WST, VPS (PDC system A) and Wide Screen Signalling (WSS) bit
decoding Automatic selection between 525 WST/625 WST
l Automatic selection between 625 WST/VPS on line 16 of VBI
l Real-time capture and decoding for WST Teletext in Hardware, to enable optimised µ-processor
throughput
l Automatic detection of FASTEXT transmission
l Real-time packet 26 engine in Hardware for processing accented, G2 and G3 characters
l Signal quality detector for video and WST/VPS data types
l Comprehensive teletext language coverage
l Full Field and Vertical Blanking lnterval (VBI) data capture of WST data
Display
l Teletext and Enhanced OSD modes
l Features of lever 1.5 WST and US Close Caption
l Serial and Parallel Display Attributes
l Single/Double/Quadruple Width and Height for characters
l Scrolling of display region
l Variable flash rate controlled by software
l Enhanced display features including overlining, underlining and italics
l Soft colours using CLUT with 4096 colour palette
l Globally selectable scan lines per row (9/10/13/16) and character matrix [12x10, 12xl3, 12x16
(VxH)]
l Fringing (Shadow) selectable from N-S-E-W direction
l Fringe colour selectable
l Meshing of defined area
l Contrast reduction of defined area
l Cursor
l Special Graphics Characters with two planes, allowing four colours per character
l 32 software redefinable On-Screen display characters
l 4 WST Character sets (GO/G2) in single device (e.g. Latin, Cyrillic, Greek, Arabic)
l G1 Mosaic graphics, Limited G3 Line drawing characters
l WST Character sets and Closed Caption Character set in single device
Data Capture
The Data Capture section takes in the analogue Composite Vidéo and Blanking Signal (CVBS), and
from this extracts the required data, which is then decoded and stored in memory.
The extraction of the data is performed in the digital domain. The first stage is to convert the analogue
CVBS signal into a digital form. This is done using an ADC sampling at 12MHz. The data and clock
recovery is then performed by a Multi-Rate Video Input Processor (MuIVIP). From the recovered data
and clock the following data types are extracted WST Teletext (625/525), Closed Caption, VPS, WSS.
The extracted data is stored in either memory (DRAM) via the Memory Interface or in SFR locations.
Data Capture Features
- Video Signal Quality detector
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Service manual CP-785A
- Data Capture for 625 line WST
- Data Capture for 525 line WST
- Data Capture for US Closed Caption
- Data Capture for VPS data (PDC system A)
- Data Capture for Wide Screen Signalling (WSS) bit decoding
- Automatic selection between 525 WST/625WST
- Automatic selection between 625WST/VPS on line 16 of VBI
- Real-time capture and decoding for WST Teletext in Hardware, to enable optimised microprocessor
throughput
- 10 pages stored On-Chip
- lnventory of transmitted Teletext pages stored in the Transmitted Page Table (TPT) and Subtitle Page
Table (SPT)
- Automatic detection of FASTEXT transmission
- Real-time packet 26 engine in Hardware for processing accented, G2 and G3 characters
- Signal quality detector for WST/VPS data types
- Comprehensive Teletext language coverage
- Full Field and Vertical Blanking Interval (VBI) data capture of WST data
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Service manual CP-785A
- 14 -
Service manual CP-785A
Chassis IC marking
OSD languages CapacityText
CP-785A DW9365/N1/3-BDx
(OTP: TDA9365PS/
English
64KPan-European,
10 pages Teletext
N1/5S
PINNING
SYMBOL PIN DESCRIPTION
n.u. 1 Port 1.3 Not used.
SCL 2 I2C bus clock line
SDA 3 I2C Data line
SECAM L’ out 4 Port 2.0 : High when L’ selected (PushPull )
OCP 5 Port 3.0 : Over Current Protection
RF AGC in 6 ADC 1 : For factory use only ( High impedance )
Key-in 7 ADC 2 : local key input ( High impedance )
S/SW 8 ADC 3 : Scart Slow switching input
VssC/P 9
digital ground for µ-controller core and peripheral
LED 1 10 port 0.5 ( 8mA current sinking capability )
LED 2 11 port 0.6 ( 8mA current sinking capability )
VSSA 12 analog ground of teletext decoder and digital ground of TV processor
SEC PLL 13 SECAM PLL decoupling
VP2 14 2nd supply voltage TV-processor
DECDIG 15 decoupling digital supply of TV-processor
PH2LF 16 phase-2 filter
PH1LF 17 phase-1 filter
GND3 18 ground 3 for TV-processor
DECBG 19 bandgap decoupling
AVL/EWD 20 East / West drive output
VDRB 21 vertical drive B output
VDRA 22 vertical drive A output
IFIN1 23 IF input 1
IFIN2 24 IF input 2
IREF 25 reference current input
VSC 26 vertical sawtooth capacitor
TUNERAGC 27 tuner AGC output
SIFIN1 28 SIF input 1
SIFIN2 29 SIF input 2
GND2 30 ground 2 for TV processor
SIF AGC 31 AGC sound IF
REF0 32 n.u.
HOUT 33 horizontal output
FBISO 34 flyback input / sandcastle output
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Service manual CP-785A
SYMBOL PIN DESCRIPTION
QSS out 35 QSS intercarrier output
EHT0 36 EHT/Overvoltage protection
PLLIF 37 IF PLL loop filter
IFVO 38 IF video output
VP1 39 main supply voltage TV-processor
CVBSINT 40 internal CVBS input
GND1 41 ground 1 for TV-processor
CVBS/Y 42 external CVBS/Y input
CHROMA 43 chrominance input (SVHS)
AMOUT 44 n.u.
INSSW2 45 2nd RGB insertion input
R2IN 46 2nd R input
G2IN 47 2nd G input
B2IN 48 2nd B input
BCLIN 49 beam current limiter input
BLKIN 50 black current input
R0 51 RED Output
G0 52 GREEN Output
B0 53 BLUE Output
VDDA 54 analog supply of Teletext decoder and digital supply of TV-Processor
(3.3V)
VPE 55 OTP programming supply
VDDC 56 digital supply to core (3.3V)
OSCGND 57 oscillator ground supply
XTALIN 58 crystal oscillator input
XTALOUT 59 crystal oscillator output
RESET 60 reset
VDDP 61 digital supply to periphery (3.3V)
Audio Mute 62 Port 1.0 : Audio mute output (PushPull )
Power 63 Port 1.1 : Power output (PushPull )
IR in 64 Interrupt input 0 : R/C Infrared input
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Service manual CP-785A
- 17 -
Service manual CP-785A
4-2 MSP3415D Multistandard Sound Processor
The MSP 3415D is designed as a single-chip Multistandard Sound Processor for applications in
analogue and digital TV sets, video recorders, and PC cards.
MSP 3415D features
- sound IF input
- No external filters required
- Stereo baseband input via integrated AD converters
- Two pairs of DA converters
- Two carrier FM or NICAM processing
- AVC : Automatic Volume Correction
- Bass, treble, volume processing
- Full SCART in/out matrix without restrictions
- Improved FM-identification
- Demodulator short programming
- Autodetection for terrestrial TV - sound standards
- Precise bit-error rate indication
- Automatic switching from NICAM to FM/AM or vice versa
- Improved NICAM synchronisation algorithm
- Improved carrier mute algorithm
- Improved AM-demodulation
- Reduction of necessary controlling
- Less external components
Basic Features of the MSP 3415D
Demodulator and NICAM Decoder Section
The MSP 3415D is designed to simultaneously perform digital demodulation and decoding of NICAMcoded TV stereo sound, as well as demodulation of FM or AM mono TV sound. Alternatively, two
carrier FM systems according to the German terrestrial specs can be processed with the MSP 3415D.
The MSP 3415D facilitates profitable multistandard capability, offering the following advantages:
- Automatic Gain Control (AGC) for analogue input: input range: 0.10 - 3 Vpp
- integrated A/D converter for sound-IF input
- all demodulation and filtering is performed on chip and is individually programmable
- easy realisation of all digital NICAM standards (B/G, I, L and D/K)
- FM-demodulation of all terrestrial standards (include identification decoding)
- no external filter hardware is required
- only one crystal clock (18.432 MHz) is necessary
- flexible selection of audio sources to be processed
- performance of terrestrial de-emphasise systems (FM, NICAM)
- digitally performed FM-identification decoding and de-matrixing
- digital baseband processing: volume, bass, treble
- simple controlling of volume, bass, treble
Analogue Section
- 18 -
Service manual CP-785A
- two selectable analogue pairs of audio baseband input (= two SCART inputs) input level: <2 V RMS,
input impedance: >25 kΩ
- one selectable analogue mono input (i.e. AM sound): Not used in this chassis
- two high-quality A/D converters, S/N-Ratio: >85 dB
- 20 Hz to 20 kHz bandwidth for SCART-to-SCART copy facilities
- loudspeaker: one pair of four-fold oversampled D/A converters
output level per channel: max. 1.4 VRMS output resistance: max. 5 kΩ
S/N-ratio: >85 dB at maximum volume max. noise voltage in mute mode: < 10 µV (BW: 20 Hz... 16
kHz)
- one pair of four-fold oversampled D/A converters supplying a pair of SCART-outputs.
output level per channel: max. 2 V RMS, output resistance: max. 0.5 kΩ,
S/N-Ratio: >85 dB (20 Hz... 16 kHz)
Application Fields of the MSP 3415D
In the following sections, a brief overview about the two main TV sound standards, NICAM 728 and
German FM Stereo, demonstrates the complex requirements of a multistandard audio IC.
NICAM plus FM/AM-Mono
According to the British, Scandinavian, Spanish, and French TV-standards, high-quality stereo sound is
transmitted digitally. The systems allow two high-quality digital sound channels to be added to the
already existing FM/AM-channel. The sound coding follows the format of the so-called Near
Instantaneous Companding System (NICAM 728). Transmission is performed using Differential
Quadrature Phase Shift Keying (DQPSK. Table below offers an overview of the modulation
parameters.
In the case of NICAM/FM (AM) mode, there are three different audio channels available: NICAM A,
NICAM B, and FM/AM-mono. NICAM A and B may belong either to a stereo or to a dual language
transmission. Information about operation mode and about the quality of the NICAM signal can be read
by the controlling software via the control bus. In the case of low quality (high bit error rate), the
controlling software may decide to switch to the analogue FM/AM-mono sound. Alternatively, an
automatic NICAM-FM/AM switching may be applied.
German 2-Carrier System (DUAL FM System)
Since September 1981, stereo and dual sound programs have been transmitted in Germany using the 2carrier system. Sound transmission consists of the already existing first sound carrier and a second
sound carrier additionally containing an identification signal. More details of this standard are given in
Tables below. For D/K very similar system is used.
- 19 -
Service manual CP-785A
TV standards
TV
system
B/G 5.5 / 5.7421875 FM Stereo PAL Applied
B/G 5.5 / 5.85 FM-Mono / NICAM PAL Applied
L 6.5 / 5.85 AM - Mono / NICAM SECAM-L N.A
I 6.0 / 6.552 FM-Mono / NICAM PAL N.A
D/K 6.5 / 6.2578125 D/K1
Position of sound carrier
(MHz)
6.5 / 6.7421875 D/K2
6.5 / 5.85 D/K-NICAM
Sound modulation Color system Remark
FM Stereo
FM-Mono / NICAM
SECAM-East
N.A
Pin connections and short description
Pin No.
1 TP Out Test pin
2 NC Not Connected
3 NC Not Connected
4 TP Out Test pin
5 TP Out Test pin
6 ADR_SEL In I2C bus Address select
7 STANDBYQ In Standby ( Low-active)
8 NC Not Connected
9 I2C_CL In / Out I2C Clock
10 I2C_DA In / Out I2C data
Pin Name Type Short description
Architecture of MSP3415D
- 20 -
Service manual CP-785A
Pin No.
11 TP In / Out Test pin
12 TP In / Out Test pin
13 TP Out Test pin
14 NC Not Connected
15 TP Out Test pin
16 TP Out Test pin
17 TP Out Test pin
18 DVSUP Digital power supply +5V
19 DVSS Digital Ground
20 NC Not Connected
21 NC Not Connected
22 NC Not Connected
23 NC Not Connected
24 RESETQ In Power-On-reset
25 NC Not Connected
26 NC Not Connected
27 VREF2 Reference ground 2 high voltage part
28 DACM_R Out Loudspeaker out Right
29 DACM_L Out Loudspeaker out Left
30 NC Not Connected
31 TP Out Test pin
32 NC Not Connected
33 NC Not Connected
34 NC Not Connected
35 VREF1 Reference ground 1 high voltage part
36 SC1_OUT_R Out Scart output 1, right
37 SC1_OUT_L Out Scart output 1, left
38 NC Not Connected
39 AHVSUP Analog power supply 8.0V
40 CAPL_M Volume capacitor MAIN
41 AHVSS Analog ground
42 AGNDC Analog reference voltage high voltage part
43 NC Not Connected
44 NC Not Connected
45 NC Not Connected
46 NC Not Connected
47 NC Not Connected
48 ASG2 Analog Shield Ground 2
49 SC2_IN_L In Scart input 2 in, left
50 SC2_IN_R In Scart input 2 in, right
51 ASG1 Analog Shield Ground 1
52 SC1_IN_L In Scart input 1 in, left
53 SC1_IN_R In Scart input 1 in, right
54 VREFTOP Reference voltage IF A/D converter
55 MONO_IN In Mono input
Pin Name Type Short description
- 21 -
Service manual CP-785A
Pin No.
56 AVSS Analog ground
57 AVSUP Analog power supply
58 ANA_IN1+ In IF input 1
59 ANA_IN1- In IF common
60 NC Not Connected
61 TESTEN In Test pin
62 XTAL_IN In Crystal oscillator
63 XTAL_OUT Out Crystal oscillator
64 NC Test pin
4-3 TDA894xJ family Stereo Audio Amplifier
The TDA8946J is a dual-channel audio power amplifier with an output power of 2 x 7Wat an 8 ohm
load and a 12 V supply. The circuit contains two Bridges Tied Load (BTL) amplifiers with an all-NPN
output stage and standby/mute logic. The TDA8946J comes in a 17-pin DIL power package.
Features
Few external components
Fixed gain
Standby and mute mode
No on/off switching plops
low standby current
High supply voltage ripple rejection
Outputs short-circuit protected to ground, supply and across the load
Thermally protected
The TDA835xJ are power circuit for use in 90° and 110° colour deflection systems for field frequencies
of 25 to 200Hz and 16/9 picture tubes. The circuit provides a DC driven vertical deflection output
circuit, operating as a highly efficient class G system. Due to the full bridge output circuit the deflection
coils can be DC coupled.
The IC is constructed in a Low Voltage DMOS process that combines Bipolar, CMOS and DMOS
devices. MOS transistors are used in the output stage because of the absence of second breakdown.
- 23 -
4-4-1 TDA8358J
An East-West output stage is provided that is able to sink current
from the diode modulator circuit.
- Short rise and fall time of the vertical flyback switch
- Guard circuit
- Temperature (thermal) protection
- High EMC because of common mode inputs
- East-West output stage
Service manual CP-785A
- 24 -
Service manual CP-785A
4-5 TDA6107Q
The TDA6107Q includes three video output amplifiers in one plastic DIL-Bent-SIL 9-pin medium
power package, using high voltage DMOS technology, and is intended to drive the three cathodes of a
colour CRT directly. To obtain maximum performance, the amplifier should be used with black-current
control.
Features
- Typical bandwidth of 5.5 MHz for an output signal of 60 Vpp
- High slew rate of 900V/ms
- No external components required
- Very simple application
- Single supply voltage of 200V
- Internal reference voltage of 2.5 V
- Fixed gain of 50.
- Black-current stabilisation (BCS) circuit
- Thermal protection
Pin description
Pin Symbol Description
1 V
2 V
3 V
4 GND ground (fin)
5 Iom black current measurement
6 VDD supply voltage
7 V
8 V
9 V
inverting input 1
i(1)
inverting input 2
i(2)
inverting input 3
i(3)
output
cathode output 3
OC(3)
cathode output 2
OC(2)
cathode output 1
OC(1)
- 25 -
Service manual CP-785A
Block diagram TDA6107Q
4-6 24C08 8 Kbit EEPROM
features :
- 8 Kbit serial I2C bus EEPROM
- Single supply voltage : 4.5 V to 5.5 V
- 1 Million Erase/Write cycles (minimum)
- 40 year data retention (minimum)
Pin description
Pin No. Name Description
1, 2, 3 E0, E1, E2 Device address
5 SDA Serial Data/Address Input/Output
6 SCL Serial clock
7 WC Write control
8 Vcc Supply voltage
4 Vss Ground
The memory device is compatible with the I2C memory standard. This is a two wire serial interface that
uses a bi-directionnal data bus and serial clock. The memory carries a built-in 4-bit unique device type
identifier code (1010) in accordance with the I2C bus definition.
Serial Clock (SCL)
The SCL input is used to strobe all data in and out of the memory.
Serial Data (SDA)
The SDA pin is bi-directionnal, and is used to transfer data in or out of the memory
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Service manual CP-785A
4-7 STR - F6654
4-7-1 General description
The STR-F6654 is an hybrid IC with a build-in MOSFET and control IC, designed for flyback
converter type switch mode power supply applications.
4-7-2 Features
- Small SIP fully isolated molded 5 pins package
- Many protection functions :
* Pulse-by-pulse overcurrent protection (OCP)
* Overvoltage protection with latch mode (OVP)
* Thermal protection with latch mode (TSD)
4-7-3 Block diagram
- 27 -
Service manual CP-785A
4-7-4 Pins description
pin name symbol description
1 Overcurrent / feedback O.C.P./ F.B. Input of overcurrent detection signal and
feedback signal
2 Source S MOSFET source
3 Drain D MOSFET drain
4 Supply VIN Input of power supply for control circuit
5 Ground GND Ground
4-7-5 Control part electrical characteristics
description
number min. typ. max.
Operation start voltage 4-5 VIN (on) 14.4 16 17.6 V
Operation stop voltage 4-5 VIN (off) 9 10 11 V
Circuit current in operation 4-5 IIN (on) - - 30 mA
Circuit current in non-operation 4-5 IIN (off) - - 100
Maximum OFF time -
Minimum time for input of quaxi
resonant signals
Minimum off time - T
O.C.P./F.B. terminal threshold
voltage 1
O.C.P./F.B. terminal threshold
voltage 2
O.C.P./F.B. terminal extraction
current
O.V.P. operation voltage 4-5 VIN (OVP) 20.5 22.5 24.5 V
Latch circuit sustaining voltage 4-5 IIN (H) - - 400
Latch circuit release voltage 4-5 VIN (La.off) 6.6 - 8.4 V
Thermal shutdown operating
temperature
4-7-6 MOSFET electrical characteristics
description
Drain-to-source breakdown voltage
Drain leakage current 3-2 I
On-resistance 3-2 RDS (on) - - 1.15
FUNCTIONAL DESCRIPTION OF VIDEO PROCESSOR Vision IF amplifier
The vision IF amplifier can demodulate signals with positive and negative modulation. The PLL
demodulator is completely alignment-free.
The VCO of the PLL circuit is internal and the frequency is fixed to the required value by using the
clock frequency of the µ-Controller/Teletext decoder as a reference. The setting of the various
frequencies is made by the controlling software in subaddress 27H (38.9 Mhz for all system).
Because of the internal VCO the IF circuit has a high immunity to EMC interferences.
QSS Sound circuit
The sound IF amplifier is similar to the vision IF amplifier
and has an external AGC decoupling capacitor.
The single reference QSS mixer is realised by a multiplier. In this multiplier the SIF signal is converted
to the intercarrier frequency by mixing it with the regenerated picture carrier from the VCO. The mixer
output signal is supplied to the output via a high-pass filter for attenuation of the residual video signals.
With this system a high performance hi-fi stereo sound processing can be achieved.
Video switches
The video switch has one input for an external CVBS or Y/C signal. The selected CVBS signal can be
supplied to pin 38, the IF video output. The selection between both signals is realised by the controlling
software in subaddress 22H.
The video ident circuit is connected to the selected signal. This ident circuit is independent of the
synchronisation.
Synchronisation circuit
The IC contains separator circuits for the horizontal and vertical sync pulses and a data-slicing circuit
which extracts the digital teletext data from the analogue signal.
The horizontal drive signal is obtained from an internal VCO which is running at a frequency of 25
MHz. This oscillator is stabilised to this frequency by using a 12 MHz signal coming from the
reference oscillator of the µ-Controller/Teletext decoder.
The horizontal drive is switched on and off via the soft start/stop procedure. This function is realised
by means of variation of the TON of the horizontal drive pulses.
The vertical synchronisation is realised by means of a divider circuit. The vertical ramp generator needs
an external resistor and capacitor. For the vertical drive a differential output current is available. The
outputs are DC coupled to the vertical output stage.
- 30 -
Service manual CP-785A
In the TDA936x series, the following geometry parameters can be adjusted for all picture tubes :
• Horizontal shift
• Vertical amplitude
• Vertical slope
• S-correction
• Vertical shift
The types which are intended to be used in combination with 110° picture tubes have an East-West
control circuit. The additional controls for these types are:
• EW width
• EW parabola width
• EW upper and lower corner parabola correction
• EW trapezium correction
• Vertical zoom, horizontal parallelogram and bow correction.
Chroma and luminance processing
The chroma band-pass and trap circuits (including the SECAM cloche filter) are realised by means of
gyrators and are tuned to the right frequency by comparing the tuning frequency with the reference
frequency of the colour decoder. The luminance delay line and the delay cells for the peaking circuit are
also realised with gyrators. The circuit contains a black stretcher function which corrects the black
level for incoming signals which have a difference between the black level and the blanking level.
Colour decoder
The ICs can decode PAL, NTSC and SECAM signals. The PAL/NTSC decoder does not need external
reference crystals but has an internal clock generator which is stabilised to the required frequency by
using the 12 MHz clock signal from the reference oscillator of the µ-Controller/Teletext decoder.
The Automatic Colour Limiting (ACL) circuit (switchable via the ACL bit in subaddress 2OH)
prevents that oversaturation occurs when signals with a high chroma-to-burst ratio are received. The
ACL circuit is designed such that it only reduces the chroma signal and not the burst signal. This has
the advantage that the colour sensitivity is not affected by this function.
SOFTWARE CONTROL
The CPU communicates with the peripheral fonctions using Special function Registers (SFRS) which
are addressed as RAM locations. The registers for the Teletext decoder appear as normal SFRs in the
µ-Controller memory map and are written to these functions by using a serial bus. This bus is
controlled by dedicated hardware which uses a simple handshake system for software synchronisation.
For compatibility reasons and possible re-use of software blocks, the TV processor is controlled by I2C
bus. The TV processor control registers cannot be read. Only the status registers can be read ( Read
address 8A ).
The SECAM decoder contains an auto-calibrating PLL demodulator which has two references, via the
divided 12 MHz reference frequency (obtained from the µ-Controller) which is used to tune the PLL to
- 31 -
Service manual CP-785A
the desired free-running frequency and the bandgap reference to obtain the correct absolute value of the
output signal. The VCO of the PLL is calibrated during each vertical blanking period, when the IC is in
search or SECAM mode.
The base-band delay line (TDA 4665 function) is integrated. This delay line is also active during
NTSC to obtain a good suppression of cross colour effects. The demodulated colour difference signals
are internally supplied to the delay line.
RGB output circuit and black-current stabilisation
In the RGB control circuit the signal is controlled on contrast, brightness and saturation. The ICs have
a linear input for external RGB signals. The signals for OSD and text are internally supplied to the
control circuit. The output signal has an amplitude of about 2 Volts black-to-white at nominal input
signals and nominal settings of the various controls.
To obtain an accurate biasing of the picture tube the 'Continuous Cathode Calibration’ system has been
included in these ICs. A black level off set can be made with respect to the level which is generated by
the black current stabilisation system. In this way different colour temperatures can be obtained for the
bright and the dark part of the picture.
The black current stabilisation system checks the output level of the 3 channels and indicates whether
the black level of the highest output is in a certain window or below or above this window. This
indication is read from the status byte 01 and is used for automatic adjustment of the Vg2 voltage
during the production of the TV receiver.
During switch-off of the TV receiver a fixed beam current is generated by the black current control
circuit. This current ensures that the picture tube capacitance is discharged. During the switch-off
period the vertical deflection is placed in an overscan position so that the discharge is not visible on the
screen.
- 32 -
Service manual CP-785A
5-2 IF
The TDA936x has an alignment free IF PLL demodulator. The fully integrated oscillator is
automatically calibrated, using the 12 Mhz crystal as a frequency reference. The IF frequency is simply
set in TV-Processor by I2C bus.
The AFC information is available via I2C bus from the TV-Processor status bytes. The controlling
software uses this information for tuner frequency tracking ( automatic following ). The AFC windows
is typically 125Khz wide. The minimum frequency step of the tuner is 62.5 Khz.
This AFC function is disabled when a program is tuned using the direct frequency entry or after fine
tuning adjustment. Therefore it is recommended to tune channel with the TV search function ( manual
or Auto setup) or using the direct channel entry to enable the Automatic Frequency Control.
SAW filters
Ref. Standard Features
K3953M B/G - IF filter for video application
- TV IF filter with Nyquist slopes at 38.9 MHz
- Constant group delay
K9650M B/G - IF filter for audio application
- TV IF audio filter with two channels
- Channel ( B/G) with one pass band for sound
carriers 33.40 MHz
The SAW filter ( SF1 ) has a double Nyquist slope at 38.9 MHz needed for this multistandard
application. The disadvantage of this choice is that a 5.5 MHz trap filter ( Z501 ) is needed to
suppress the residual sound carrier in the video for B/G signals.
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Service manual CP-785A
5-3 Source switching
The TDA936x has only one external video input, the external video switching circuit made with
Q504, Q505 and Q508 allows 2 external video signal inputs. The switching command can be
the µ-Controller pin 8 when the software takes control of the video source.
The µ-Controller pin 8 is automatically configured by the controlling software (See table below).
TV mode
µ
-Controller pin 8 Status
RF auto Input - High Impedance < 1V
RF Forced Input - High Impedance not defined
AV 1 Input - High Impedance > 2.0 V
AV 1 Output - Push Pull Max. 3.3V
AV 2 Output - Push Pull < 0.2 V
SVHS Output - Push Pull < 0.2 V
The controlling software via I2C bus selects the signal source :
- Video signal from tuner ( Pin 40 ).
- External video ( SCART 1 or 2 ) depending on Q508 base level.
- External SVHS from SCART 2.
The sound source switching is done in the MSP3415D ( I601 ), by the µ-Controller via I2C bus.
Fast R, G, B insertion : The external R, G, B insertion needs a fast switching and cannot be controlled
by the software ( instruction cycle of 1µ sec ). The fast switching pin 16 of SCART 1 is directly
connected to the TV processor pin 45 ( Fast blanking input ). The display is synchronised with the
selected video source, i.e. to get stable R, G, B inserted signal they must be synchronised with the
selected video source. The controlling software only enable or disable ( AV2, SVHS, or Forced RF
source selected ) fast blanking.
5-4 µ-Controller I/O pin configuration and function
The I/O pins of the µ-Controller can be configured in many way. All port functions can be individually
programmed by use of the SFR registers.
Each I/O port pin can be individually programmed in these configurations :
Open drain
In this mode, the port can function as in and output. It requires an external pull-up resistor. The
maximum allowable supply voltage for this pull up resistor is +5V.
So in this mode it is possible to interface a 5 Volt environment like I2C while the µ-Controller has a 3.3
Volt supply.
Push-Pull
The push pull mode can be used for output only. Both sinking and sourcing is active, which leads to
sleep slopes. The levels are 0 and Vddp, the supply voltage 3.3Volts.
Level
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Service manual CP-785A
High impedance
This mode can be used for input only operation of the port.
Special port for LED
Pin 10 and 11 have the same functionality as the general I/O pins but in addition, their current source
and sink capacity is 8 mA instead of 4 mA. These pins are used for driving LED’s via a series current
limiting resistor.
µ-Controller I/O pin configuration and function table
pin name configuration description
Stand by TV ON
1 n.u. High impedance High impedance not used
2 SCL Open Drain Open Drain Serial clock line
3 SDA Open Drain Open Drain Serial data line
4
5 OCP High impedance High impedance Over Current Protection
( Switch the set OFF if
the voltage on this pin is
<2.33V )
6 - High impedance High impedance For factory use only
7 Key in High impedance High impedance Local keyboard input
8 S/SW High impedance See table above external video switch
10 Red LED High impedance Open Drain
11 Green LED Open Drain High impedance
62 Audio mute Push Pull Push Pull High in stand by mode
5-5 Sound processing
Analogue sound IF - input section
The input pins ANA_IN1+ and ANA_IN- offer the possibility to connect sound IF sources to the MSP
3415D. The analogue-to-digital conversion of the preselected sound IF signal is done by an A/D
converter, whose output is used to control an analogue automatic gain circuit (AGC), providing an
optimal level for a wide range of input levels.
Quadrature Mixers
The digital input coming from the integrated A/D converter may contain audio information at a
frequency range of theoretically 0 to 9 MHz corresponding to the selected standards. By means of two
programmable quadrature mixers, two different audio sources ; for example, NICAM and FM-mono,
may be shifted into baseband position.
Phase and AM discrimination
The filtered sound IF signals are demodulated by means of the phase and amplitude discriminator block.
On the output, the phase and amplitude is available for further processing. AM signals are derived from
the amplitude information, whereas the phase information serves for FM and NICAM demodulation.
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Service manual CP-785A
In case of NICAM - mode, the phase samples are decoded according the DQPSK - coding scheme. The
output of this block contains the original NICAM bitstream.
DSP section
All audio baseband functions are performed by digital signal processing (DSP). The DSP section
controls the source and output selection, and the signals processing.
Sound Mode switching
In case of NICAM transmission, the controlling software read the bit error rate and the operation mode
from the NICAM Decoder. When the set is in “Auto detection” mode ( default mode after ATSS ) the
controlling software set automatically the sound mode ( NICAM mono, NICAM Dual 1 or NICAM
Dual 2 ) depending on the transmitted mode.
In case of 2 Carrier FM transmission, the controlling software read the transmission mode and the
signal quality level from the Stereo Detection Register. When the set is in “Auto detection” mode the
controlling software set automatically the sound mode ( mono, Stereo, Dual 1, Dual 2 ) depending on
the transmitted mode.
In “Auto detection” mode the controlling software evaluate the signal quality and automatically switch
to the analogy sound carrier 1, if the transmission quality is too poor. To avoid unwanted automatic
switching the threshold levels mono to stereo and stereo to mono is different.
In “forced mono “ mode ( Red OSD in recall section ), the controlling software configure the
MSP3415D to demodulate only the analogue (FM or AM) sound carrier 1, no matter the signal quality.
The sound mode “ forced “ or “ Autodetect” is stored for each programme.
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Service manual CP-785A
5-6 Sound amplification
The TDA8946J is a stereo BTL audio amplifier capable of delivering 2 x 7 W output power to
an 8 Ω load at THD = 10%, using a 12 V power supply and an external heatsink. The voltage
gain is fixed at 32dB.
With the three-level MODE input the device can be switched from ‘ standby’ to ‘ mute’ and to
‘ operating’ mode.
The TDA 8946J outputs are protected by an internal thermal shutdown protection mechanism and
short-circuit protection.
Power amplifier
The power amplifier is a Bridge Tied Load (BTL) amplifier with an all-NPN output stage, capable of
delivering a peak output current of 1.5 A.
The BTL principle offers the following advantages :
- Lower peak value of the supply current.
- The ripple frequency on the supply voltage is twice the signal frequency.
- No DC-blocking capacitor
- Good low frequency performance
Mode selection
The TDA894xJ has several functional modes, which can be selected by applying the proper DC voltage
to pin MODE.
Mute : In this mode the amplifier is DC biased but not operational (no audio output). This allows the
input coupling capacitors to be charged to avoid pop-noise. The devices is in mute mode when 2.5 V <
V
< (Vcc-1.5 V).
MODE
Operating : In this mode the amplifier is operating normally. The operating mode is activated at V
< 0.5 V.
5-7 Vertical deflection
The vertical driver circuit is a bridge configuration. The deflection coil is connected between the output
amplifiers, which are driven in phase opposition. The differential input circuit is voltage driven. The
input circuit is especially intended for direct connection to driver circuits which deliver symmetrical
current signals, but is also suitable for asymmetrical currents. The output current of these devices is
converted to voltages at the input pins via resistors R350 and R351. The differential input voltage is
compared with the output current through the deflection coils measured as voltage across R302, which
provides internal feedback information. The voltage across R302 is proportional to the output current.
Flyback voltage
The flyback voltage is determined by an additional supply voltage V
. The principle of operation with
flb
two supply voltages (class G) makes it possible to fix the supply voltage Vp optimum for the scan
voltage and the second supply voltage V
high efficiency is achieved. The supply voltage V
optimum for the flyback voltage. Using this method, very
flb
is almost totally available as flyback voltage across
flb
the coil, this being possible due to the absence of a coupling capacitor.
Protection
The output circuit has protection circuits for :
- Too high die temperature
- overvoltage of output stage A
Guard circuit
The guard signal is not used
by the TDA936x to blank the screen in case of fault condition.
Damping resistor
MODE
- 37 -
Service manual CP-785A
For HF loop stability a damping resistor (R305) is connected across the deflection coil.
EAST-WEST Amplifier (TDA8358J only)
The East-West amplifier is current driven. It can only sink currents of the diode modulator circuit. A
feedback resistor R397 is connected between the input and output of this inverting amplifier in order to
convert the East-West correction input into an output voltage.
- 38 -
Service manual CP-785A
R819
D803
D804
4
Ground
Drain
Vin
5
5-8 Power supply (STR-F6654)
5-8 -1 STR-F6654 general description
The STR-F6654 is an hybrid IC with a build-in MOSFET and control IC, designed for flyback
converter type switch mode power supply applications.
5-8 -2 Power supply primary part operations
An oscillator generates pulses signals which turn on and off a MOSFET transistor.
* Start -up circuit: V
The start-up circuit is used to start and stop the operation of the control IC, by detecting a voltage
appearing at V
IN
IN
pin (pin 4).
D801
D802
Main AC voltage
C804
C803
R802
C806
C805
T801 SMPS TRANS
2
I801 STR-F6653
6
R805
D805
L801
3
4
7
Power supply start-up circuit
- 39 -
Service manual CP-785A
When the power switch is pushed on, V
R802.
As soon as V
reaches 16V, the STR-F6654 control circuit starts operating. Then, VIN is obtained by
IN
smoothing the winding voltage which appears between pin6 and pin7 of the SMPS transformer.
As this winding voltage does not increase to the set voltage immediately after the control circuit starts
operating, V
starts dropping. However, as this winding voltage reaches the set value before VIN
IN
voltage drops to the shutdown voltage (at 11V), the control circuit continues operating (see below V
voltage at start-up). R805 resistor prevents that V
output current.
V
must be set higher than the shutdown voltage (VIN (off) = 11V
IN
(overvoltage protection) operating voltage
(V
= 20.5V
OVP
min
)
Vin
increases slowly. During this time, C806 is charged through
IN
pin voltage varies according to the secondary side
IN
) and lower than the O.V.P.
max
IN
O.V.P.voltage 20.5V
16V (TYP.)
Shutdown voltage 11V
Waveform of Vin pin voltage at start-up
t
- 40 -
* STR-F665X oscillating operation
Service manual CP-785A
STR-F6653
OSC
Comp.2
C1
R1
Comp.1
Vth(2)
Vth(1)
DRIVE
1.35mA
Oscillating operation
Rg2
Rg1
3
DRAIN
2
SOURCE
1
OCP/FB
5
GND
1
TO PIN4 SMPS
R808
From PIN 6
SMPS
(FEEDBACK)
C850
R804
C1
(STR-F6653
internal capacitor)
Pin 1
(OCP / FB)
I
D
(MOSFET drain current)
V
DS
(MOSFET drain - source voltage)
MOSFET switching ON/OFF
6.5V
3.7V
0.73V
0V
Waveforms during oscillating operation
ON
3
4
2
ONON
OFFOFF
OFF
- 41 -
Service manual CP-785A
¬ When the MOSFET is ON, the STR-F6654 internal capacitor C1 is charged at the constant voltage
6.5V.
At the same time, the voltage at pin 1 (OCP / FB) increases with the same waveform as the MOSFET
drain current.
- When the pin 1 voltage reaches the threshold voltage V
comparator 1 starts operating. The STR-F6654 internal oscillator is inverted and the MOSFET turns
OFF.
® When the MOSFET turns OFF, charging of STR-F6654 internal capacitor C1 is released and C1
starts discharging by the STR-F6654 internal resistance R1. So, C1 voltage starts falling in accordance
with the gradient regulated by the constant discharging time of C1 and R1. So, this means that the fixed
time determined by C1 and R1 is the OFF-time of the MOSFET.
¯ When C1 voltage falls to around 3.7V, the STR-F6654 internal oscillator is reversed again and the
MOSFET turns ON. C1 is quickly charged to around 6.5V
The MOSFET continues to oscillate by repeating the above procedure.
* STR-F6654 protection circuits
• overcurrent protection function (OCP)
Overcurrent protection is performed pulse by pulse detecting at STR-F6654 pin 1 (OCP) the peak of the
MOSFET drain current in every pulse.
• latch circuit
This circuit sustains an output low from the STR-F6654 internal oscillator and stops operation of the
power supply when overvoltage protection (OVP) and thermal shutdown (TSD) circuit are under
operation
• thermal shutdown circuit (TSD)
This circuit triggers the latch circuit when the frame temperature of STR-F6654 IC exceeds 140
• overvoltage protection circuit (OVP)
This circuit triggers the latch circuit when the V
voltage exceeds 22V (typ.)
in
= 0.73V, the STR-F6654 internal
TH1
°
C
- 42 -
5-9 TV start-up, TV normal run and stand-by mode operations
63
L511
L512
VddA
Reset N
Power
4
I702
EEPROM
8V
5-9-1TV start-up operations
* Schematic diagram for start-up operations
I823 REG 3.3V
IN
1
12
T801 SMPS TRANSFORMER
2
GND
23
L801
OUT
Service manual CP-785A
RESET
IN
PULSE
CIRCUIT
OUT
L510
5661
54
Vddc
Vddp
I501
MICROCONTROLLER PART
SDA
SCL
2
3
60
D801... D804
(GRAETZ BRIDGE)
SW801
POWER SWITCH
MAIN AC VOLTAGE
3
D
I801 MOSFET AND
CONTROL IC
56
Start-up operations
* TV start-up and microcontroller initialization
- When SW801 power switch is pushed, main AC voltage is applied to T801 transformer (after
rectification by D801...D804 diodes). Then, T801 SMPS transformer starts operating and supplies
DC voltage to I823 (3.3V regulator).
- This regulator provides 3.3V DC voltage to I501 microcontroller power supply pins (pins 54, 56, 61)
and to the reset pulse circuit which provides reset pulse to I501 microcontroller reset pin (pin 60).
- Then, the microcontroller starts its initialization. Its power pin (pin 63) is set to high which allows
delivery of power supply voltages (123V, 8V, 5V...). At this step, all IC’s start working but no picture
appears on screen: I501 IC doesn’t provide horizontal drive voltage.
- Then, the microcontroller consults I702 EEPROM via I2C bus to know the last TV set mode (normal
run mode or stand-by mode ) before switching off.
- 43 -
. If the TV set was on normal run mode before switching off, the microcontroller delivers
3.3V
3.0V
3.0V
1.2V
1.2V
0V
DC supply voltage
I823
pin 3
reset pulse
I501
pin 60
from I823
pin 3
R591
220
D591
DZ2.4
R593
10K
R592
10k
Ω
Q510
R594
10K
Q511
C501
50V
10
F
V
horizontal drive voltage at pin 33 and picture appears on screen.
. If the TV set was on stand-by mode before switching off, the microcontroller switches TV
set to stand-by mode, decreasing power pin voltage (pin 63). This matter will be explained
on paragraph 5-9-2-b.
* Reset pulse circuit
Service manual CP-785A
Ω
Ω
+
µ
Ω
to I501
pin 60
0
Reset pulse circuit and corresponding waveforms
- 44 -
Service manual CP-785A
I810
CONTROLLED
RECTIFIER
R820
R830
C830
R829
Q808
6V DC
11V DC
R870
D811
Q811
Q809
Q807
Q810
LOW
LOW
LOW
LOW
HIGH
HIGH
CONDUCTING
POWER
HIGH
NOT
CONDUCTING
* Reset pulse circuit operations description
- When DC supply voltage from I823 regulator starts rising (from 0V to 1.2V), no current flows
through D591 zener diode. So, Q510 is in off mode.
Also V
=Vcc/2 -Vcc = -Vcc/2 > -0.6V. So, Q511 is in off mode.
be Q511
Then, no voltage reaches I501 pin 60.
- When this voltage reaches 1.2 V, Q510 stays in off mode
but V
= -0.6V. So, Q511 is switched on and starts driving DC supply voltage to I501 pin 60.
be Q511
- When the DC supply voltage reaches (2.4V +0.6V ) =3.0V, Q510 starts conducting but as the Q511
base-emitter voltage is the same as the collector-emitter voltage of the saturated Q510, Q511 switches
off and no voltage reaches I501 pin 60.
- If the DC supply voltage decreases below 3 V, Q510 switches off immediately. Q511 starts
conducting, pulling I501 pin 60 high.
At the same time, it discharges the reset capacitor C501. Discharging this capacitor is necessary to
garantee a defined reset pulse duration.
5-9-2 TV normal run and stand-by mode operations
Depending on remote control commands, I501 microcontroller part pin 63 (power) is set to:
- high for normal run mode
- low for stand-by mode
a) TV on normal run mode
* I501 microcontroller part pin 63 (power) effect
I501 microcontroller part pin 63 (power) is connected to the following circuit:
I501 microcontroller part pin 63 (POWER) effect
- 45 -
Service manual CP-785A
Ι822
8
V
REGULATOR
On normal run mode, I501 microcontroller pin 63 (power) is set to high
• So, I810 controlled rectifier is not conducting
- Q809 is conducting. So, Q808 is not conducting and Q807 is conducting
- So, Q807 collector is connected to the ground and I810 controlled rectifier gate pin is
set to low (no conducting)
• So, current from 11V DC voltage (from T801 SMPS transformer pin 13) does not flow through
Q811 and Q810 transistors but flows through I806 IC error amplifier
- Q809 is conducting. So, Q810 is not conducting and no current flows from Q810
collector to the ground
Therefore, the power supply circuit diagram is the one shown on the next paragraph
* power supply circuit diagram during TV set normal run
5V
3
I820
5V
REGULATOR
11
C832
D830
8.5V
8V
D831
12
4
13
11.5V
11V
C861
14.5V (CP785)
12.5V (CP385)
D860
9
14.5V
12.5V
T801 SMPS TRANSFORMER
2
C823
D820
16
143V
123V / 113V
3.3V
3
I823
3.3V
REGULATOR
1
C813
R823
1
I806
IC ERROR AMPLIFIER
2
3
R810
11V
143V (CP785)
123V-113V (CP385)
6V
3
8V
D801... D804
(GRAETZ BRIDGE)
SW801
POWER
SWITCH
MAIN AC VOLTAGE
L801
3
D
I801
MOSFET AND
CONTROL IC
Power supply operation during TV set normal run
- 46 -
11V
Service manual CP-785A
* power supply functioning during TV set normal run mode
- I801 transmits controlled pulses to T801 which generates DC voltages after rectifications by
secondary part diodes and electro capacitors (by example by D820 and C813 on 143V supply
voltage line).
- 8V, 5V, 3.3V supply voltage lines have stabilized voltages obtained by I820, I822, I823 voltage
regulators.
- On 143V supply voltage line, R823 resistor has been chosen to reach exact DC voltage required
on this line.
- 143V supply voltage line includes an IC error amplifier (I806) which corrects unexpected
DC voltage variations on this line.
* power supply IC delivery during TV set normal run
power supply line IC power supply delivery Remarks
143V
12.5V
FBT
I602 sound amplifier pins 3-16
11V T401 H- drive
8V I501 Main IC pins 14-39 I601 Sound Demod pins 38-39-
40
6V I703 IR receiver pin 1
5V
I601 Sound Demod pins 7-18-
57
I702 EEPROM pin 8 tuner
3.3V
Main IC µcom part pins 54-56-
61
b) TV set on stand-by mode
* TV set circuit diagram on stand-by mode
FBT supplies 45V to I301 vertical IC
FBT supplies 45V to T401 H- drive
FBT supplies 14V to I301 vertical IC
FBT supplies 33V to the tuner
FBT supplies 185V to I901 video amplifier pin 6
- 47 -
Service manual CP-785A
2
D801...D804
GRAETZ BRIDGE
SW801
POWER SWITCH
MAIN AC VOLTAGE
T801 SMPS TRANS
4
L801
3
DRAIN
I801
MOFSET AND
CONTROL IC
OCP
FB
16
I810
controlled rectifier
D821
HIGH
CONDUCTING
C841
C840
AROUND
6Vdc
AROUND
3.3Vdc
I823 3.3V
1
REGULATOR
3
D825
R810
R713
R870
I810
CONTROLLED
RECTIFIER
SWITCHING
CIRCUIT
D811
Q811
Q810
HIGH
Q809
I501
MAIN
IC
POWER
LOW
63
IR IN
com
µ
supply
voltage
KEY IN
LOW
64
54
61
56
I703 IR
2
RECEIVER
FRONT
7
MASK
BUTTONS
1
R888
C888
8
D806
C808
4
R806
1
3
C850
I804
OPTO
COUPLER
1
2
CONDUCTING
CONDUCTING
- 48 -
Power supply operation in stand - by mode
Service manual CP-785A
I810
CONTROLLED
RECTIFIER
R820
R830
C830
R829
Q808
6V DC
Q809
Q807
HIGH
HIGH
HIGH
LOW
POWER
LOW
I810 controlled rectifier switching circuit
* TV set stand-by mode operations
-On stand-by mode, I501 microcontroller pin 63 (power) is set to low.
- So, Q809 collector is set to high.
-Then, I810 controlled rectifier gate pin is set to high and I810 is conducting.
- So, current flows from pin 16 SMPS transformer to the ground via I804 optocoupler and Q810 and
Q811 transistors (which are conducting).
- In these conditions, I801 delivers pulses on light mode and T801 produces voltages with reduced
power.
- As I810 is conducting, current flows also from pin 16 SMPS transformer to I823 (3.3V regulator) for
I501 µcom, IR receiver and front mask buttons supply voltage (then, remote control or front mask
buttons can be activated to leave stand-by mode).
- 49 -
Electrical Parts List
locpart_cdpart_nmpart_descremark
0000A 4857028214HEAT SINK(for I301)AL EX
0000A 4857028215HEAT SINK(for I602)AL EX
0000A 4857031100HEAT SINK(for I901)A1050P-H24 T2.0
0000A 4857027609HEAT SINK(for Q401)AL EX
00010 4850Q00810BATTERYR6P/LN
00030 4859000160CABLE SCARTS-RCA 3P/DIN 4P(1.2M)
A0014859804393PCB MAIN330X246
C101CEXF1H100V C ELECTRO50V RSS 10MF (5X11) TP
C102CEXF1H470V C ELECTRO50V RSS 47MF (6.3X11) TP
C103CCZB1H102K C CERA50V B 1000PF K (AXIAL)
C104CCXB1H102K C CERA50V B 1000PF K (TAPPING)
C106CEXF1C221V C ELECTRO16V RSS 220MF (8X11.5) TP
C108CCZB1H101K C CERA50V B 100PF K (AXIAL)
C110CCZB1H102K C CERA50V B 1000PF K (AXIAL)
C120CCZB1H102K C CERA50V B 1000PF K (AXIAL)
C121CEXF1H100V C ELECTRO50V RSS 10MF (5X11) TP
C305CEXF1E471V C ELECTRO25V RSS 470MF (10X16) TP
C313CMXM2A104J C MYLAR100V 0.1MF J (TP)
C315CEXF2C470C C ELECTRO160V RUS 47MF (13X25) TP
C320CBXF1H104Z C CERA SEMI50V F 0.1MF Z (TAPPING)
C350CCXF1H473Z C CERA50V F 0.047MF Z (TAPPING)
C351CCXF1H473Z C CERA50V F 0.047MF Z (TAPPING)
C370CMXM2A473J C MYLAR100V 0.047MF J (TP)
C401CEXF1H100C C ELECTRO50V RUS 10MF (5X11) TP
C402CMYH3C123J C MYLAR1.6KV BUP 0.012MF J
CMYH3C912J C MYLAR1.6KV BUP 9100PF J
C404CMYH3C822J C MYLAR1.6KV BUP 8200PF J
CMYH3C752J C MYLAR1.6KV BUP 7500PF J
C408CMYE2G624J C MYLAR400V PU 0.62MF J
CMYE2G434J C MYLAR400V PU 0.43MF J
C412CEXF2C339C C ELECTRO160V RUS 3.3MF (8X16) TP
C414CMXM2A104J C MYLAR100V 0.1MF J (TP)
C415CEXF2E479V C ELECTRO250V RSS 4.7MF (10X16)TP
C418CCXB1H102K C CERA50V B 1000PF K (TAPPING)
C420CCXB2H222K C CERA500V B 2200PF K (TAPPING)
C430CMYH3C122J C MYLAR1.6KV BUP 1200PF J
C431CMXE2D103J C MYLAR200V PU 0.01MF J (TP)
C440CMXE2G273J C MYLAR400V PU 0.027MF J (TP)
C499CEYD1H689W C ELECTRO50V RHD 6.8MF (16X35.5)
C500CEXF1H478V C ELECTRO50V RSS 0.47MF (5X11) TP
C501CEXF1H100V C ELECTRO50V RSS 10MF (5X11) TP
C502CEXF1H100V C ELECTRO50V RSS 10MF (5X11) TP
C509CEXF1E470V C ELECTRO25V RSS 47MF (5X11) TP
C511CMXM2A224J C MYLAR100V 0.22MF J
C512CMXM2A224J C MYLAR100V 0.22MF J
C513CBZF1H104Z C CERA SEMI50V F 0.1MF Z
C514CEXF1E101V C ELECTRO25V RSS 100MF (6.3X11) TP
C515CBZR1C222M C CERA16V Y5R 2200PF M (AXIAL)
C516CBZR1C472M C CERA16V Y5R 4700PF M (AXIAL)
C517CEXF1H109V C ELECTRO50V RSS 1MF (5X11) TP
C518CBZF1H104Z C CERA SEMI50V F 0.1MF Z
C519CEXF1H109V C ELECTRO50V RSS 1MF (5X11) TP
C520CCZB1H102K C CERA50V B 1000PF K (AXIAL)
C521CCZB1H102K C CERA50V B 1000PF K (AXIAL)
C523CBZF1H104Z C CERA SEMI50V F 0.1MF Z
C524CMXL1J104JC MYLAR63V MEU 0.1MF J
C525CCXB1H102K C CERA50V B 1000PF K (TAPPING)
- 50 -
29"
25"
29"
25"
29"
25"
locpart_cdpart_nmpart_descremark
C526CMXL1J104JC MYLAR63V MEU 0.1MF J
C527CMXM2A473J C MYLAR100V 0.047MF J (TP)
C528CEXF1E101V C ELECTRO25V RSS 100MF (6.3X11) TP
C529CBZF1H104Z C CERA SEMI50V F 0.1MF Z
C530CEXF1E101V C ELECTRO25V RSS 100MF (6.3X11) TP
C531CCXF1H473Z C CERA50V F 0.047MF Z (TAPPING)
C532CEXF1H100V C ELECTRO50V RSS 10MF (5X11) TP
C533CCZB1H102K C CERA50V B 1000PF K (AXIAL)
C534CCZF1H223Z C CERA50V F 0.022MF Z
C535CCZF1H223Z C CERA50V F 0.022MF Z
C536CCZF1H223Z C CERA50V F 0.022MF Z
C537CBXF1H104Z C CERA SEMI50V F 0.1MF Z (TAPPING)
C540CEXF1H220V C ELECTRO50V RSS 22MF (5X11) TP
C541CEXF1H220V C ELECTRO50V RSS 22MF (5X11) TP
C542CEXF1H100V C ELECTRO50V RSS 10MF (5X11) TP
C543CEXF1H100V C ELECTRO50V RSS 10MF (5X11) TP
C550CEXF1H229V C ELECTRO50V RSS 2.2MF (5X11) TP
C555CEXF1C470V C ELECTRO16V RSS 47MF (5X11) TP
C560CBXF1H104Z C CERA SEMI50V F 0.1MF Z (TAPPING)
C561CEXF1E101V C ELECTRO25V RSS 100MF (6.3X11) TP
C564CEXF1E101V C ELECTRO25V RSS 100MF (6.3X11) TP
C565CBXF1H104Z C CERA SEMI50V F 0.1MF Z (TAPPING)
C577CCZB1H561K C CERA50V B 560PF K
C585CCXB1H222K C CERA50V B 2200PF K (TAPPING)
C590CXCH1H270J C CERA50V CH 27PF J (TAPPING)
C591CXCH1H270J C CERA50V CH 27PF J (TAPPING)
C592CBXF1H104Z C CERA SEMI50V F 0.1MF Z (TAPPING)
C593CEXF1E101V C ELECTRO25V RSS 100MF (6.3X11) TP
C601CCXB1H472K C CERA50V B 4700PF K (TAPPING)
C602CEXF1H100V C ELECTRO50V RSS 10MF (5X11) TP
C603CCXB1H472K C CERA50V B 4700PF K (TAPPING)
C604CEXF1E102V C ELECTRO25V RSS 1000MF (13X20) TP
C605CEXF1E470V C ELECTRO25V RSS 47MF (5X11) TP
C608CEXF1H100V C ELECTRO50V RSS 10MF (5X11) TP
C610CEXF1H100V C ELECTRO50V RSS 10MF (5X11) TP
C611CEXF1H339V C ELECTRO50V RSS 3.3MF (5X11) TP
C612CEXF1H109V C ELECTRO50V RSS 1MF (5X11) TP
C613CEXF1H109V C ELECTRO50V RSS 1MF (5X11) TP
C614CEXF1H109V C ELECTRO50V RSS 1MF (5X11) TP
C615CEXF1H109V C ELECTRO50V RSS 1MF (5X11) TP
C616CEXF1H100V C ELECTRO50V RSS 10MF (5X11) TP
C617CBXF1H104Z C CERA SEMI50V F 0.1MF Z (TAPPING)
C618CEXF1C470V C ELECTRO16V RSS 47MF (5X11) TP
C620CXCH1H509D C CERA50V CH 5PF D (TAPPING)
C621CXCH1H509D C CERA50V CH 5PF D (TAPPING)
C622CCXF1H223Z C CERA50V F 0.022MF Z (TAPPING)
C625CEXF1H479V C ELECTRO50V RSS 4.7MF (5X11) TP
C626CEXF1H479V C ELECTRO50V RSS 4.7MF (5X11) TP
C629CBXF1H104Z C CERA SEMI50V F 0.1MF Z (TAPPING)
C630CEXF1E470V C ELECTRO25V RSS 47MF (5X11) TP
C631CBXF1H104Z C CERA SEMI50V F 0.1MF Z (TAPPING)
C635CBXF1H104Z C CERA SEMI50V F 0.1MF Z (TAPPING)
C636CEXF1H220V C ELECTRO50V RSS 22MF (5X11) TP
C650CZCH1H470J C CERA50V CH 47PF J
C660CEXF1H100V C ELECTRO50V RSS 10MF (5X11) TP
C661CMXM2A224J C MYLAR100V 0.22MF J
C662CMXM2A224J C MYLAR100V 0.22MF J
C665CCXB1H472K C CERA50V B 4700PF K (TAPPING)
C666CBXF1H104Z C CERA SEMI50V F 0.1MF Z (TAPPING)
- 51 -
locpart_cdpart_nmpart_descremark
C667CCXB1H472K C CERA50V B 4700PF K (TAPPING)
C668CMXM2A224J C MYLAR100V 0.22MF J
C669CMXM2A224J C MYLAR100V 0.22MF J
C690CEXF1H479V C ELECTRO50V RSS 4.7MF (5X11) TP
C691CEXF1H479V C ELECTRO50V RSS 4.7MF (5X11) TP
C698CZCH1H470J C CERA50V CH 47PF J
C699CZCH1H470J C CERA50V CH 47PF J
C770CEXF1E101V C ELECTRO25V RSS 100MF (6.3X11) TP
C771CBZF1H104Z C CERA SEMI50V F 0.1MF Z
C801CL1JB3474KC LINE ACROSSAC250V 0.47MF U/C/SNDF/SV
C803CCXB3A472K C CERA1KV B 4700PF K (TAPPING)
C804CCXB3A472K C CERA1KV B 4700PF K (TAPPING)
C805CEYN2W151P C ELECTRO450V LHS 150MF (25X40)
C806CEXF1H330V C ELECTRO50V RSS 33MF (6.3X11) TP
C807CCXF1H473Z C CERA50V F 0.047MF Z (TAPPING)
C808CEXF1H479V C ELECTRO50V RSS 4.7MF (5X11) TP
C809CCZB1H102K C CERA50V B 1000PF K (AXIAL)
C810CBXB3D102K C CERA SEMI2KV BL(N) 1000PF K (T)
C812CH1AFE472M C CERA AC4KV 4700PF M KX DE1610
C813CEXF2E101V C ELECTRO250V RSS 100MF 18X35.5
C814CEXF2E470V C ELECTRO250V RSS 47MF (16X25) TP
C820CCYR3A471K C CERA1KV R 470PF K 125 DE0705
C821CCXB1H102K C CERA50V B 1000PF K (TAPPING)
C823CEXF1E102V C ELECTRO25V RSS 1000MF (13X20) TP
C824CCYR3A471K C CERA1KV R 470PF K 125 DE0705
C824CCXB3A471K C CERA1KV B 470PF K (T)
C830CBZF1H104Z C CERA SEMI50V F 0.1MF Z
C831CCXB3A471K C CERA1KV B 470PF K (T)
C832CEXF1E102V C ELECTRO25V RSS 1000MF (13X20) TP
C835CEXF1H470V C ELECTRO50V RSS 47MF (6.3X11) TP
C840CEXF1C222V C ELECTRO16V RSS 2200MF (13X25) TP
C841CEXF1C222V C ELECTRO16V RSS 2200MF (13X25) TP
C844CEXF1E101V C ELECTRO25V RSS 100MF (6.3X11) TP
C850CCXB1H152K C CERA50V B 1500PF K (TAPPING)
C861CEXF1E102V C ELECTRO25V RSS 1000MF (13X20) TP
C863CEXF1E101V C ELECTRO25V RSS 100MF (6.3X11) TP
C866CCXB3A471K C CERA1KV B 470PF K (T)
C888CEXF1C470V C ELECTRO16V RSS 47MF (5X11) TP
C905CEXF2E479V C ELECTRO250V RSS 4.7MF (10X16)TP
C906CEXF2E100V C ELECTRO250V RSS 10MF (10X20) TP
C910CCXB1H561K C CERA50V B 560PF K (TAPPING)
C950CEXF1H220V C ELECTRO50V RSS 22MF (5X11) TP
C965CBXB3D102K C CERA SEMI2KV BL(N) 1000PF K (T)
C968CMXL2E104K C MYLAR250V MEU 0.1MF K
D100DSD50RH51B LEDSD50-RH51BGRW
D100M 4853533600HOLDER LEDP.P BK
D101D1N4148---DIODE1N4148 (TAPPING)
D102D1SS85TA--DIODE1SS85TA
D313DRGP15J---DIODERGP15J
D360DMTZJ22D--DIODE ZENERMTZJ 22D
D361DUZ33B----DIODE ZENERUZ-33B
D367DUZ33B----DIODE ZENERUZ-33B
D381DUZ33B----DIODE ZENERUZ-33B
D403DDG3------DIODEDG3
D404DRGP30J---DIODERGP30J
D405DRGP15J---DIODERGP15J
D407DRGP15J---DIODERGP15J
D408DRGP15J---DIODERGP15J
D410D1N4004S--DIODE1N4004S