Conexant RS8234 Datasheet
network access products
Distinguishing Features
• Fully T.M. 4.1-compliant
• 3.3V/5V low power utilization (< 1 watt)
• PCI 2.1/UTOPIA Level 1
• Industrial temperature
• 16 multiservice tunnels
• 64K VCCs
• 388-pin BGA
Full-Featured ATM xBR Service Segmentation
and Reassembly Controller (ServiceSAR)
Conexant’s RS8234 accelerates service interworking by
emphasizing performance under worst-case short packet
conditions. In addition, the PCI host interface is one of the
most efficient in the industry in terms of bus occupancy.
The RS8234 not only meets the stringent requirements of
T.M. 4.1, but also enables advanced traffic control functions
such as GFR, CBR tunneling and virtual path shaping.
The RS8234’s service-specific features allow system designers
to accelerate specific protocol interworking functions for
applications like IP over ATM, Frame Relay or LAN emulation.
The device’s unique architecture enables advanced networklevel functionality and topologies. A few examples of these
features include echo suppression of multicast data frames on
ELAN channels, and peak cell rate (PCR) control established
per VCC, per tunnel, and/or per scheduling priority.
ServiceSAR Controller
RS8234
Integrated Management
The RS8234 complies with ATM Forum specifications
UNI 3.1, T.M. 4.1 and all other relevent standards.
The RS8234 provides integrated traffic management
for all service categories, including constant bit rate
(CBR), variable bit rate (VBR) (single- and dual-leaky
bucket), real-time VBR, unspecified bit rate (UBR),
available bit rate (ABR), guaranteed frame rate (GFR)
(guaranteed MCR on UBR VCCs), and generic
flow control (GFC). The xBR traffic management block
automatically schedules each VCC according to user
assigned-parameters to maximize line utilization.
Advanced Architecture
The RS8234’s architecture is designed to minimize
and control host traffic congestion. The host manages
the RS8234 terminal using write-only control and
status queues. The control queues are also isolated
from their associated data buffers via buffer
descriptors, allowing the data buffers to hold payload
data only. For example, the host submits data for
transmit by writing buffer descriptor pointers to one
of 32 transmit queues. These entries may be thought
of as task lists for the ServiceSAR to perform. The 32
receive queues couple with the transmit structure to
create complete host peers. The RS8234 enables
control of traffic congestion through mechanisms like
receive buffer memory limitations (called firewalls),
and through explicit notification of congestion by the
host. This architecture reduces the control burden on
the host system while minimizing PCI bus utilization,
by eliminating reads across the PCI bus from host
control activities. It also provides control points to
manage congestion, which is critical for ABR.
The RS8234 System
The RS8234 consists of five separate coprocessors
(incoming and outgoing DMA, segmentation,
reassembly and xBR traffic manager), each of
which maintains state information in shared, off-chip
memory. This memory is controlled by the SAR
through the local bus interface, which arbitrates
access to the bus between the various coprocessors.
These coprocessors, though they run off the same
system clock, operate asynchronously from each
other. Communication between the coprocessors
takes place through on-chip FIFOs or through
queues in local memory.
The RS8234’s on-chip coprocessor blocks are
surrounded by high-performance PCI and UTOPIA
ports for glueless interface to a variety of system
components with full line-rate throughput and
low bus occupancy. Figure 1 illustrates these
functional blocks.
xBR Cell Scheduler
The cell scheduler rate-shapes all segmentation
traffic according to per-channel parameters. The
RS8234 supports eight user-assigned scheduling
priorities in addition to CBR. The user assigns a
priority to each channel. The user can further control
consumption of bandwidth by assigning peak cell
rate limits to four of those scheduling priorities.
The user sets the range of available transmission
rates for the scheduler by setting the size of the
dynamic schedule table and the duration of each
scheduling slot in the table.
network access products
RS8234
ServiceSAR Controller
a software driver to the RS8234, on top of which a
system designer can develop and place proprietary
driver software. This interface allows users to
easily port their applications to the RS8234EVM.
This software is written in C, and source code
is available under license agreement.
The RS8234EVM also includes documentation,
a full set of design schematics, and artwork for
the RS8234EVM PCI card.
RS823xHPI Hardware
Programming Interface
The RS8234 Hardware Programming Interface
(HPI) provides a set of fully-defined software
primitives to interface with an ATM UNI port
based on the RS8234 SAR. It serves as an interface
point for system software designed to configure
and manage the RS8234-based UNI without the
necessity of detailed manipulation of hardwarerelated structures. It thus provides a layer of
abstraction from the hardware for the system
designer and user.
RS8234HPI primitives are used by higher-level
application software (such as network management
and device drivers) to obtain ATM services as
required by their upper protocol layers. These
primitives handle SAR resource, control and status
management. The RS823xHPI performs functions
in the following categories:
• RS8234 SAR device initialization
• Memory resource allocation
• Resource management
• Connection management (including VCC
setup and teardown, and processing status)
• Segmentation/data transmission
• Data reception/reassembly
• Statistics gathering/error reporting
• Diagnostic testing
Benefits
Shortens development time of customer system-specific ATM applications.
Allows users to utilize only those functions they want and to incorporate those functions into their
own applications.
Users can establish ABR, CBR, UBR or VBR connections at VCC setup on each of over 32,000 channels.
Provides detailed examples for control and management of the RS8234. Significantly shortens design time.
Enables users to easily port their application to the RS8234EVM.
Gives users a clear description of how the software and hardware function.
Offers a layer of abstraction for ease of use of the RS823xHPI primitives.
Reference device driver for VxWorks.
Features
Software reference design
Modular software design
Dynamic rate control per virtual channel
SAR initialization and VCC control
Well-defined, robust RS823xHPI interface
Well-documented C source code
RS823xHPI macro layer software
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