Conexant RF250 Datasheet

Data Sheet Conexant Systems, Inc. Doc. No. 101251A

August 24, 2000

RF250

Rx ASIC for CDMA, AMPS, and PCS Applications

The RF250 Application-Specific Integrated Circuit (ASIC) is a
triple-mode, dual-band receiver (Rx) intended for use in Code
Division Multiple Access (CDMA) portable phones in both
cellular and Personal Communications System (PCS) bands. As
a dual mode IC, it can be used in CDMA mode or Advanced
Mobile Phone System (AMPS) mode.

The device incorporates all the components required to
implement the receiver front end and the In-Phase and
Quadrature (I/Q) demodulator stages except for the filter blocks
and PCS Low Noise Amplifier (LNA). Besides a cellular band
LNA, there are separate mixers for AMPS, CDMA 800 MHz, and
PCS bands. The AMPS mixer output is single-ended, followed
by the AMPS Intermediate Frequency (IF) Surface Acoustic
Wave (SAW) filter. The cellular and PCS mixers have balanced
outputs for the CDMA IF SAW filters. The mixers are followed by
an IF Variable Gain Amplifier (VGA) and an I/Q demodulator.

The outputs from the filters are combined through separate
buffers at the input of the VGA. The buffers are enabled
depending on the selected mode. The VGA has a gain control
range greater than 90 dB. There are two VHF oscillators that
operate with external tank circuits. They provide signals to the
Local Oscillator (LO) for the I/Q demodulator in the cellular and
PCS bands.

The noise figure, gain, and third order Input Intercept
Point (IIP3) of each stage in the receiver chip are
optimized to meet the system requirements for AMPS
and CDMA modes as per TIA/EIA-98-B and ANSI J­STD-018 (PCS). Employing silicon bipolar technology,
the ASIC is designed for high performance and a high
level of integration.

The device package and pinout are shown in Figure 1. A
block diagram of the RF250 is shown in Figure 2.

Features

• Supports CDMA/AMPS/PCS1900

modes.

• Three battery cell operation

(2.7 V < VCC < 3.6 V).

• Higher level of integration.

• I/Q outputs.

• On-chip 100 to 640 MHz oscillators.

• Low power operation: <60 mA.

• 48-pin Thin Quad Flat Pack (TQFP)

package with downset paddle.

Applications

• Tri-mode handsets.

• CDMA and AMPS modes in the

cellular band:

-AMPS

- CDMA-US

- CDMA-J

• CDMA mode in the PCS band:

- US-PCS

-K-PCS

1

48 47 46 45 44 43 42 41 40 39 38 37

13 14 15 16 17 18 19 20 21 22 23 24

2
3

4
5
6
7
8
9
10
11
12

36
35

34
33
32
31

30
29

28
27
26
25

C452

GND

CELL_LNA_DECOUPLE

NC

CELL_LNA_IN

VCC1

CELL_BIAS_SET

CELL/PCS

FM/CDMA

VCC2

GND

CELL_TANK-

CELL_TANK+

PCS_TANK-

PCS_TANK+

DIV2/DIV4

PLL+

PLL-

GND

I-

I+

Q+

Q-

SLEEP

VGA_CONTROL

CELL_LNA_OUT

GND

PCS_BIAS_SETNCCELL_MIX_GND

CELL_IFTRAP

CELL_MIX_IN

VCC4

PCS_MIX_IN

CELL_LO

PCS_LO

PCS_MIX_BYPASS

PCS_IF_OUT+
PCS_IF_OUT­AMPS_IF_OUT
CDMA_IF_OUT+
CDMA_IF_OUT­CELL_MIX_BYPASS
VGA_PCS_IN+
VGA_PCS_IN­VGA_AMPS_IN
VGA_CDMA_IN+
VGA_CDMA_IN­VCC3

Figure 1.RF250Rx ASIC Pinout – 48-Pin TQFP

Package With Downset Paddle

Rx ASIC RF250

2 Conexant Systems, Inc. 101251A

August 24, 2000

Technical Description

Low Noise Amplifier (LNA). The cellular band
LNA is designed with a low noise figure and high
linearity to achieve maximum receiver dynamic
range. Pin 2, the 800 LNA decouple pin, is
required to be grounded through an RF bypass
capacitor with minimum trace length. The input
and output match are external to the chip.

Mixers. The RF250 Rx ASIC has three
independent mixers, one for the PCS band and
two for the cellular band (AMPS and CDMA).

The mixers are designed to operate with very low
LO powers of –10 dBm. The LO ports are matched
internal to the chip.

The cellular band mixers have a high gain and a
low noise figure that allow them to meet the
system noise figure. The cellular CDMA and PCS
mixers have balanced output to drive the IF filters.
The AMPS mixer has a single-ended output to
match the standard IF SAW filters.

Variable Gain Amplifier (VGA). The high dynamic
range required by CDMA handsets is achieved by
the VGA, which is common to all modes. The VGA

has a minimum dynamic range of 90 dB with a
control voltage of 0.2 to 2.7 volts. The appropriate
signal path is switched internal to the device. This
eliminates off-chip switching needed to operate
this common VGA in cellular AMPS, CDMA, and
PCS modes.

I/Q Demodulator. The local oscillator signals are
generated on-chip. The I/Q demodulator is
internally connected to the VGA output. It is
designed to have a very low amplitude and phase
imbalance. The I and Q outputs are differential.
The DC offsets between the differential outputs
and between I and Q channels are designed to be
extremely low to facilitate compatibility with
baseband Interfaces.

VHF Oscillators. There are two on-chip
oscillators, one for the cellular and one for the PCS
bands. These Voltage Controlled Oscillators
(VCOs) work with external tank circuits and
varactor diodes. The outputs of the differential
oscillators are buffered and the output is used to
drive the prescaler of an external Phase Locked
Loop (PLL). The VCOs typically operate at twice
the IF frequency and can operate at up to four
times the IF frequency.

Figure 2. RF250 Rx ASIC Block Diagram

÷ 2,4

AMPS IF SAW

CDMA IF SAW

I

Q

RF250

Rx ASIC

RF SAW(CELL)

RF SAW (PCS)

IF SAW (PCS)

PLL

CELL_LNA_IN

PCS_LNA_IN

4

7

48

42

34

28

32, 33

26, 27

11,12

19

20

21

22

C262

16,17

13,14

40

35,36

29,30

PCS_LO

CELL_LO

VGA_CONTROL

22

2

2

2

2

38

39 24

CELL/PCS

FM/CDMA

8

SLEEP

23

RF250 Rx ASIC

101251A Conexant Systems, Inc. 3
August 24, 2000

The local oscillators for the I/Q demodulators are
derived by an on-chip frequency divider. The logic
signal to select the divider ratio (2 or 4) is available
onPin15(DIV2/DIV4).

Mode Control. The operation of the chip is
controlled by signals at Pin 7 (CELL/PCS), Pin 8
(FM/CDMA), Pin 23 (SLEEP), and the DIV2/DIV4
select commands at Pin 15. All the switching is
done internally. The supply voltage should be
present at all the VCC pins for normal operation.
The internal switching needed to select each of
these signals is shown in Table 1.

Electrical and Mechanical Specifications.

Included in this document are Tables 1 through 5
and Figures 1 through 29, which define the
electrical and mechanical specifications of the
RF250.

Table 1: Mode Control Select Signal

Switching

Table 2: Pin Assignments and Functional

Pin Descriptions
Table 3: Absolute Maximum Ratings
Table 4: Recommended Operating

Conditions
Table 5: Electrical Specifications
Figure 1: Pinout Configuration

Figure 2: Functional Block Diagram
Figures 3 - 27: Typical Functional Block

Performances
Figure 28: Package Dimensions
Figure 29: Tape and Reel

Dimensions

ESD Sensitivity

The RF250 is a Class 1 device. The following
extreme Electrostatic Discharge (ESD) precautions
are required according to the Human Body Model
(HBM):

• Protective outer garments.

• Handle device in ESD safeguarded work

area.

• Transport device in ESD shielded
containers.

• Monitor and test all ESD protection
equipment.

The HBM ESD withstand threshold value, with
respect to ground, is ±1.5kV.TheHBMESD
withstand threshold value, with respect to VDD
(the positive power supply terminal) is also ±1.5
kV.

Table 1. Mode Control Select Signal Switching

Pin AMPS CDMA PCS

7 (CELL/PCS) 0

0

1

8 (FM/CDMA) 0 1 x
15 (DIV2/DIV4) 0 0 0
23 (SLEEP) 1 1 1
Key: 0 = LOW

1=HIGH
x=N/A

Rx ASIC RF250

4 Conexant Systems, Inc. 101251A

August 24, 2000

Table 2. RF250 Signal Description (1 of 2)

Pin # Name Description

1

G

ND Ground
2 CELL_LNA_DECOUPLE An RF bypass capacitor with very short trace should be connected to this pin.
3 NC No connection
4 CELL_LNA_IN The input to LNA needs external matching. The matching network should be placed as close

to this pin as possible. High Q components are recommended to minimize the effect on the
noise figure.

5 VCC1 Supply voltage to the RF bias. An RF bypass capacitor should be connected from the pin to

ground with short traces..

6 CELL_BIAS_SET

This pin sets the cellular RF bias current. Typically, a 180 Ω resistor is connected from the

pin to ground.
7 CELL/PCS Band select: 0 = cellular (800 MHz); 1 = PCS (1900 MHz).
8 FM/CDMA Cellular band mode select: 0 = AMPS; 1 = CDMA.
9 VCC2 Voltage supply pin to the VCO buffer. A bypass capacitor should be placed close to the

device from pin 9 to pin 10. The trace should be short and connected immediately to the

ground plane for best performance.
10 GND Ground return from the VCO buffer.
11 CELL_TANK– Differential tank connection for the cellular band VCO. Care should be taken during the

layout of the externaltank circuit to prevent parasitic oscillations.
12 CELL_TANK+ Differential tank connection for the cellular band VCO. Care should be taken during the

layout of the externaltank circuit to prevent parasitic oscillations.
13 PCS_TANK– Differential tank connection for the PCS band VCO. Care should be taken during the layout

of the external tank circuit to prevent parasitic oscillations.
14 PCS_TANK+ Differential tank connection for the PCS band VCO. Care should be taken during the layout

of the external tank circuit to prevent parasitic oscillations.
15 DIV2/DIV4 Selects the divide ratio of the VCO to the LO port of the I/Q demodulator: 0 = divide by 2,

1 = divide by 4.
16 PLL+ Differential buffered VCO output.
17 PLL– Differential buffered VCO output.
18 GND Ground
19 I– I channel differential output.
20 I+ I channel differential output.
21 Q+ Q channel differential output.
22 Q– Q channel differential output.
23 SLEEP Activates sleep mode: 0 = sleep; 1 = enable
24 VGA_CONTROL

VGA voltage input. Input impedance is greater than 50K Ω.
25 VCC3 Voltage supply to VGA and I/Q demodulator stages. Supply should be well regulated and

bypassed to prevent modulation of the signal by the supply ripple.
26 VGA_CDMA_IN– CDMA differential VGA input
27 VGA_CDMA_IN+ CDMA differential VGA input
28 VGA_AMPS_IN AMPS VGA input.

RF250 Rx ASIC

101251A Conexant Systems, Inc. 5
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Table 2. RF250 Signal Description (2 of 2)

Pin # Name Description

29 VGA_PCS_IN–

P

CS differential VGA input.
30 VGA_PCS_IN+ PCS differential VGA input.
31 CELL_MIX_BYPASS Low frequency bypass for the AMPS mixer.
32 CDMA_IF_OUT– CDMA differential mixer output. Requires an external inductor to VCC. Output impedance is

set by an external match.

33 CDMA_IF_OUT+ CDMA differential mixer output. Requires an external inductor to VCC. Output impedance is

set by an external match.

34 AMPS_IF_OUT AMPS mixer output. Requires an external inductor to VCC. Output impedance is set by an

external match.

35 PCS_IF_OUT– PCS differential mixer output. Requires an external inductor to VCC. Output impedance is

set by an external match.

36 PCS_IF_OUT+ PCS differential mixer output. Requires an external inductor to VCC. Output impedance is

set by an external match.
37 PCS_MIX_BYPASS Low frequency bypass for the PCS mixer.
38 PCS_LO The local oscillator input for the PCS band.
39 CELL_LO The local oscillator input for the cellular band.
40 PCS_MIX_IN PCS mixer input.
41 VCC4 Voltage supply pin for the mixers. An RF bypass capacitor should be connected from this pin

to ground. It should be connected as close to the device as possible with very short trace

lengths.
42 CELL_MIX_IN Cellular mixer input.
43 CELL_IFTRAP Theparallel LC circuit is tuned to the cellular IF frequency.
44 CELL_MIX_GND Add inductance from the pin to ground to lower mixer gain and increase IIP3.
45 NC No connection
46 PCS_BIAS_SET

This pin sets the PCS RF bias current. Typically, a 180 Ω resistor is connected from the pin

to ground.
47 GND Ground
48 CELL_LNA_OUT Cellular band LNA output. This is an open collector output. An inductor must be connected to

VCC. The matching is done externally to the chip.

Rx ASIC RF250

6 Conexant Systems, Inc. 101251A

August 24, 2000

Table 3. Absolute Maximum Ratings

Parameter Minimum Maximum Units

Supply voltage (VCC) –0.3 +5.5

V

Input voltage range –0.3 VCC V
LNA input power -- +5 dBm
Power dissipation -- 600 mW
Ambient operating temperature –30 +80 °C
Storage temperature –40 +125 °C

Parameter Min Typical Max Units

Supply voltage (VCC)

2.73.33

.6 V
Operating temperature –30 +25 +80 °C
Impedance of logic inputs 50

KΩ
Logic 0 0.0 0.5 V
Logic 1 VCC – 0.5 VCC V

Table 4. Recommended Operating Conditions