Conexant CX20671 Schematics

CX20671

Vendor P/N is CX20671-21Z , Page. 10
Pin Define : Page. 18 Dimension : Page. 42
Low-Power Codec SoC with Integrated Class-D Stereo Amplifier for High Definition Audio
Data Sheet
DSH-202291p1 July 2010
Revision History
Revision Date Description
A February 19, 2010 Initial release
B March 11, 2010 Revision B release
C March 29, 2010 Revision C release
D May 25, 2010 Revision D release
E May 27, 2010 Revision E release
p1 July 22, 2010 Preliminary p1 release
*Changed all occurrences of Ns to ns (representing nanoseconds) in Tables 17-19.
*Removed “Audio only” from Table 21. *Added SPDIF Out feature. *Added new bullet to the list on page 32,
Section 2.5.1. *Changed EPSS-supported items in
Sections 3.2.2- 3.2.14 from green to bold-type.
*Added further information to the second-to-the­ last bullet (DVDD_3.3) on page 32.
*Updated to include information on -21Z devices.
© 2010, Conexant Systems, Inc.
All Rights Reserved.
Information in this document is provided in connection with Conexant Systems, Inc. (“Conexant”) products. These materials are provided by Conexant as a service to its customers and may be used for informational purposes only. Conexant assumes no responsibility for errors or omissions in these materials. Conexant may make changes to this document at any time, without notice. Conexant advises all customers to ensure that they have the latest version of this document and to verify, before placing orders, that information being relied on is current and complete. Conexant makes no commitment to update the information and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to its specifications and product descriptions.
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®
The following are trademarks of Conexant Systems, Inc.: Conexant publication are for identification purposes only, and may be trademarks of third parties. Third-party brands and names are the property of their respective owners.
and the Conexant C symbol. Product names or services listed in this
For additional disclaimer information, please consult Conexant’s Legal Information posted at www.conexant.com which is incorporated by reference.
Conexant Lead-free products are China RoHS Compliant:
Reader Response: Conexant strives to produce quality documentation and welcomes your feedback. Please send comments and suggestions to tech.pubs@conexant.com. For technical questions, contact your local Conexant sales office or field applications engineer.
2 Conexant DSH-202291p1
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Contents

Figures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Tables. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.2 CX20671 Audio Codec Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
1.3 System Compatibility. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
1.4 Hardware Qualification Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2 Hardware Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.1 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.1.1 HD Audio Host Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.1.2 Control Signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.1.3 Audio Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.2 CX20671 Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.3 CX20671 Pin Assignments, Signal Definitions, and Electrical Characteristics . . . . . . . . . . . 17
2.4 Device Performance Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
2.5 Power Management and Power Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
2.5.1 Power Management. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
2.5.2 Power Supply Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2.5.3 Integrated Low-Dropout Regulators. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2.6 Integrated High-Pass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
2.7 AC Timing Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
2.7.1 Digital Microphone . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
2.7.2 HD Audio Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
2.7.3 Data Output and Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
2.8 CX20671 Package Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
3 HD Audio Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
3.1 HD Audio Interface Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
3.2 Verbs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
3.2.1 Node ID 00: Root Node . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
3.2.2 Node ID 01: Audio Function Group . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
3.2.3 Node ID 10, 11: DAC 1, DAC 2 Widget . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
3.2.4 Node ID 12: S/PDIF Output Widget . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
3.2.5 Node ID 13: PC Beep Generator Widget . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
3.2.6 Node ID 14, 15, and 16: ADC1, ADC2, and ADC3 Widgets . . . . . . . . . . . . . . . . . . . 51
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3.2.7 Node ID 17 and 18: Selector Widgets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
3.2.8 Node ID 19: Port A Pin Widget . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
3.2.9 Node ID 1A: Port B Widget . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
3.2.10 Node ID 1B: Port C Widget . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
3.2.11 Node ID 20: Port H, S/PDIF Digital Pin Widget . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
3.2.12 Node ID 23: Port J Digital Microphone Widget . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
3.2.13 Node ID 1F: Port G Widget . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
3.2.14 Node ID 24: Mixer Widget . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
3.2.15 Node ID 25, 27: Vendor (Device Test) Widgets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
3.3 Unsolicited Messages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
3.3.1 Audio Unsolicited Messages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
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Figures

Figure 1. CX20671 Devices and Major Signal Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 2. CX20671 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 3. CX20671 40-QFN Hardware Interface Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 4. CX20671 40-QFN Pad Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 5. Output Butter for 3.3 V Signaling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 6. CX20671 Output Buffer for 1.5 V Signaling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 7. Class-D Speaker Amplifier Magnitude Frequency Response (16 bit, 48 kHz) . . . . . . . . 29
Figure 8. CX20671 THD+N versus Frequency, for Class-D Amplifier Output . . . . . . . . . . . . . . . . 30
Figure 9. CX20671 Power Supply Rejection, for Class-D Amplifier Output . . . . . . . . . . . . . . . . . . 30
Figure 10. CX20671 Power Supply Rejection, for Headphone Amplifier Output . . . . . . . . . . . . . . . 31
Figure 11. CX20671 Class-D Output Power vs. Load (1% THD) . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 12. High-Pass Filter Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure 13. Digital Mic Clock Timing Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Figure 14. BIT_CLK and SYNC Timing Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Figure 15. Data Output and Input Timing Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Figure 16. CX20671 40-QFN Package Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
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Tables

Table 1. CX20671 Models and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 2. CX20671 Pad Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 3. CX20671 Pad Signal Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 4. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 5. DC Characteristics –Digital Microphone . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 6. DC Characteristics – TTL Compatible (EAPD#, GPIOs) . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 7. Host Signal Characteristics – HD Audio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 8. CX20671 Analog Performance Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 9. Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Table 10. Device Power State Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 11. CX20671 DC Supply Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 12. D0 (S0) Full-Duplex Power Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 13. Pre-ECR15B D-States Power Consumption With Class Driver. . . . . . . . . . . . . . . . . . . . 35
Table 14. Pre-ECR15B D-States Power Consumption With Conexant Driver . . . . . . . . . . . . . . . . 35
Table 15. EPSS ECR15B D-States Power Consumption with Conexant Driver . . . . . . . . . . . . . . . 36
Table 16. Digital Mic Timing Parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Table 17. BIT_CLK and SYNC Timing Parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Table 18. HD Audio Output Valid Delay Timing Parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Table 19. HD Audio Input Setup and Hold Timing Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Table 20. Package Dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Table 21. Root Node Parameters and Responses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Table 22. Audio Function Group Node Parameters and Responses. . . . . . . . . . . . . . . . . . . . . . . . 45
Table 23. DAC 1, DAC2 Widget Parameters and Responses. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Table 24. S/PDIF Output Widgets Parameters and Responses . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Table 25. Beep Generator Widget Parameters and Responses . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Table 26. ADC Widget Parameters and Responses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Table 27. Selector Widgets Parameters and Responses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Table 28. Port A Pin Widget Parameters and Responses. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Table 29. Port B Pin Widget Parameters and Responses. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Table 30. Port C Pin Widget Parameters and Responses. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Table 31. S/PDIF Pin Widgets Parameters and Responses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Table 32. Port J Pin Widget Parameters and Responses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Table 33. Port G Pin Widget Parameters and Responses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Table 34. Mixer Widget Parameters and Responses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Table 35. Vendor (Device Test) Widget Parameters and Responses. . . . . . . . . . . . . . . . . . . . . . . 64
Table 36. Audio Unsolicited Messages Tag Fields . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Table 37. Audio Unsolicited Messages Bit Coding and Sources. . . . . . . . . . . . . . . . . . . . . . . . . . . 65
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1

Introduction

1.1 Overview

Conexant's CX20671 HD Audio codec SoC is a low-power,102 dB SNR, high­performance audio codec with integrated 2-WRMS (per channel) stereo speaker amplifier with Spread Spectrum EMI dispersion technology. Two independent pairs of DACs and three independent pairs of ADCs support Multi-Streaming and Real Time Communications applications. The audio fidelity of the device exceeds Microsoft WLP
4.0 Desktop and Notebook Premium Logo requirements. Additionally, the device achieves a high level of integration by featuring an integrated 5 V to 3.3 V Low-dropout (LDO) voltage regulator that guarantees high performance analog audio performance without incurring external BOM, and an integrated 3.3 V to 1.8 V low-dropout voltage regulator used to power internal digital blocks.
The device features a ProCoustic capless headphone driver. This high-output power headphone driver delivers 50 mW per channel into a 32 for an external headphone amplifier and DC-blocking capacitors, and produces a full range frequency response without sacrificing the output level. The ProCoustic headphone driver provides a true high-definition listening experience from the PC for the audio aficionado. All output ports feature PopShield circuitry that eliminates pops or clicks.
The CX20671 also features Conexant's D-Flex power management scheme, which allows the system to exceed the power savings specified in the Intel ECR 15B requirement. The entire audio SOC consumes 16.79 mW during S0-idle. The internal Wake-on-PC-Beep logic resumes the analog paths for the external PC-Beep to propagate through to the output ports.
The CX20671 features one single-bit stream digital microphone interface, which allows interfacing to two digital microphones for dual microphone array implementations. The Digital Microphone Interface (DMI) is optimized with a hardware DC-level filter, which compensates for digital microphones with DC offset limitations. Conexant has qualified many digital microphones and listed them on the Approved Vendor List (AVL), providing the OEM and the ODM with more selections and flexibility. The audio codec features an independent SPDIF out supporting sample rates up to 96 kHz, 16-24-bit resolution.
The device is compliant with Intel's High Definition Audio Specification (Revision 1.0), as well as the ECR 15B power management scheme.
Conexant offers the most comprehensive software options:
In-house developed Voice Processing Algorithms enhances the clarity of VoIP calls
SoftEQ with Dynamic Range Compression improves the sound quality of low cost
3D Expander widens the audio stage for fuller and richer sound.
Audio Director augments multi-streaming capability; and third-party end point
Ω load, eliminating the need
and improves the accuracy of voice commands and dictation.
speakers.
redirection/switching (i.e., HDMI and Bluetooth). Third party software APO support includes SRS, Dolby, Creative Labs, and others.
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CX20671
Audio Codec
40-QFN
Core Logic
Digital Mic 1/2 (Port J)
Mic In (w/Bias)/Line In (Port B)
Mic In (w/Bias)/Line In/Line Out
(Port C)
HDA Bus
GPIO0/EAPD#
GPIO1/SPK_MUTE#
ProCoustic HP Out/Line Out (Port A)
Class-D Amp Out (Port G)
Jack Sense A
SPDIF (Port H)
Table 1 shows the different devices and the functions that are supported for each.
Figure 1 illustrates the CX20671 devices and major signal interfaces.
Table 1. CX20671 Models and Functions
Model/Order/Part Numbers Supported Functions
SmartDAA4
Line Side Device (LSD) [16-Pin QFN] Part Number
V.92
Modem
Number of
DACs/ADCs
Device Set
Order
Number
Audio Codec
Part Number
Codec Revision
Audio
Codec
Package
Type
CX20671-11Z CX20671 -11Z 40-QFN None N 4/6 2
CX20671-21Z CX20671 -21Z 40-QFN None N 4/6 2
GENERAL NOTES:
1. Supported functions (Y = Supported; N = Not supported).
2. All devices are lead-free (Pb-free) and RoHS-compliant, and are compatible with leaded reflow processes.
3. Contact local Conexant Sales office for advanced software options.
Figure 1. CX20671 Devices and Major Signal Interfaces
Digital
Mic
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CX20671 Data Sheet Introduction

1.2 CX20671 Audio Codec Features

24-bit, two pairs of independent DACs and three pairs of independent ADCs
ProCoustic headphone driver, which delivers 50 mW into 32 Ω load with no pop,
eliminating the need for an external amplifier and DC-blocking capacitors
Integrated 5 V to 3.3 V low-dropout voltage regulator for improved audio
performance, eliminating need for external regulator or power transistor
Integrated 3.3 V to 1.8 V low-dropout voltage regulator, used to power digital
blocks
Integrated 2 WRMS (per channel) class-D stereo speaker amplifier with Spread
Spectrum and 10-kV ESD withstand capability
Digital Microphone interface with internal MIC boost supporting 2 digital
microphone elements
Independent Sony Philips Digital Interface (SPDIF) Output supporting sample rates
44.1 kHz, 48 kHz, and 96 kHz, 16, 20, and 24-bit resolution
Internal microphone boost
– Digital: 0, 12, 24, 36, 48 dB
– Analog: 0, 10, 20, 30, 40 dB
Microphone Security Control (Contact Conexant Sales/FAE for additional
information).
Exceeds Vista/Windows 7 Desktop and Notebook Premium Logo Requirements,
WLP4.0
D-Flex power management exceeds Intel ECR 15B requirements, and features
Wake-On-PCBeep functionality
Hardware Headphone limiter bit (supports GS Mark EN50332-2)
Compliant with Intel High Definition Audio Specification Rev. 1.0
Supports both 1.5 V and 3.3 V signaling with the core logic chipset
Retaskable ports
– Configure between Headphone and Line-out or between Mic and Line-in
Independent sampling rate for DAC and ADC; supports audio formats ranging from
16-bit, 44.1 kHz to 24-bit, 192 kHz
Pop Shield: pops and clicks reduction circuitry, including class-D speaker outputs
Jack sense detects up to four jacks using only one sense pin
Digital Mixer
+3.3 V analog and I/O operation; uses Vaux for power management modes
Audio Director for Headphone and Internal Speakers Redirection (optional).
– Supporting Classic Mode
– Vista/Windows 7 Multi-Stream
– Custom Multi-Stream Mode
Voice Processing Algorithms (optional)
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Introduction CX20671 Data Sheet
– End-to-end Noise Reduction (patent pending)
– Multi-band Acoustic Echo Cancellation
– Side Noise Rejection Beam Forming
SmartAudio GUI (optional) - advanced audio control
Digital Parametric SmartEQ with Dynamic Compression DSP (optional)
– Enhances the sound quality on low cost speakers
– Night Mode
3D Expander
Third Party Logo Software support includes
–SRS
– Dolby
– Creative Labs
– ForteMedia
– Andrea
– MaaxAudio
– Virage Logic
Supports 32-bit/64-bit Windows OS and Linux
Available in 40-pad thermally-enhanced QFN package

1.3 System Compatibility

System compatibility
– Windows XP/Vista/Windows 7 operating system on a 1 GHz-based computer
with 512 MB RAM, or equivalent
– Microsoft Vista/Windows 7 Premium Logo compliant, WLP4.0
– Linux Kernel (contact local Conexant Sales Office for details)

1.4 Hardware Qualification Process

The Hardware Qualification Process (HQP) is intended to improve the quality and reliability of ODM custom boards being shipped to PC OEMs. The goals of this process are to:
Eliminate common design mistakes
Ensure boards perform well and pass DTM Fidelity requirements with good margin
Eliminate potential manufacturing issues that may result from a marginal design
Eliminate country specific issues
Eliminate common INF problems
Converge towards standard designs
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CX20671 Data Sheet Introduction
The HQP includes review of schematics, board layout, and BOM (Bill of Material). All boards must meet the pre-defined criteria. Contact the local Conexant Sales office for more details about the HQP process.
HQP must be performed for all OEM designs.
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2

Hardware Interface

2.1 General

2.1.1 HD Audio Host Interface

The HD Audio host interface conforms to HD Audio (Rev. 1.0)
The supported HD Audio signals are as follows:
Bit Clock (BIT_CLK), input
Frame Sync (SYNC), input
Serial Data Output (SDATA_OUT), input
Serial Data Input (SDATA_IN), input/output
Master Hardware Reset (RESET#), input

2.1.2 Control Signals

Control signals supported from straps or the host are as follows:
External Amplifier Power Down (EAPD#), output
Class-D speaker mute (SPK_MUTE#), input
Jack sensing (SENSEA), input
General-purpose inputs/outputs (GPIO0, GPIO1)

2.1.3 Audio Signals

Audio interface signals supported are as follows:
Port A (PORTA_L and PORTA_R), ProCoustic headphone output/line output
Port B (PORTB_L and PORTB_R), microphone input/line input, with microphone
bias voltage
Port C (PORTC_L and PORTC_R), microphone input/line input/line output, with
microphone bias voltage
Port G (LEFT+ and RIGHT+), Class-D speaker amplifier stereo output
Digital Stereo Microphone (DIGITAL_MIC_1/2), digital microphone input, dual
array
PC Speaker Beep pass-through (PC_BEEP), input
Sony Philips Digital Interface (SPDIF) Output
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Hardware Interface CX20671 Data Sheet
HDA Link
Inter fac
e
Reset#
BIT_CLK
SYNC
SDI
SDO
GPIO0/EAPD#
GPIO1/SPK_MUT E
#
CLOCK
Digital Microphon
e
1A
1B
MIC/LINE IN
MIC/LINE I/O
MIC BIAS
MIC BIAS
Port B
Port
C
DA
C
10
DAC
11
1F
Port G
19
Port A
HP
LINE OUT
CLASS_D
AM
P
PC BEEP
BEEP
13
SENSE A
DATA 1/2
23
Port
J
Boos
t
17
18
ADC
14
ADC
15
ADC
16
24
12
20
Port
H
SPDIF
DCO

2.2 CX20671 Block Diagram

Figure 2 provides a simplified block diagram of the CX20671.
Figure 2. CX20671 Block Diagram
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CX20671 Data Sheet Hardware Interface
SPDIF PC_BEEP DM IC_1/2
DMIC_CLK0
LEFT -
LEFT +
RIGHT-
RIGHT+
PORT A_L
PORT A_R
NC NC
PORT B_L PORT B_R
PORT C_L PORT C_R
B_BIAS C_BIAS
SENSEA
FILT_1.65
39 10 1 40
13 11
14 16
22 23
24 25
34 35
30 31
33 32
36
29
SYNC BIT_CLK SDATA_ OU T SDATA_ IN RESET#
GPIO 0/EAPD #
GPIO 1/SPK _MU T E#
FLY_P FLY_N
AVEE AVDD _HP
VDD _IO VAUX _3.3 DVDD_3.3 FILT_1.8
AVDD _5V AVDD _3.3
RPW R_5.0 LPW R_5 .0 CLASS-D_REF
GND
8 5 4 6 9
38
37
19 20
21 26
7 2
18
3
28 27
15 12 17
4
1
Charge Pum p Flying C ap
Class-D Am
p
Reference Voltag
e
Mic Bias
Jack Sens
e
HD A Bus
Signal
s
HD A Bus Signaling Voltage
Standby Supply Voltage
+3.3V S upply Voltage for Digital
+1.8V Core R egulator Bypas
s
GPIO
s
-2.0 V or -2.6 V C h arg e Pu m p B y pas s
+3.3V Headphone Pow e
r
Pin 4 1 refers to
exposed
ground paddl
e
5V -to-3.3V Regulator Input
5V-to-3.3V Regulator Outpu
t
Class-D Am p Right C h. Supply
Class-D Am p Left C h. Supply
Class-D Ref. Voltag
e
Audio Signal
s
PC_Beep
DM IC Interfac
e
NC NC
CX20671
40-Pin QFN
S/PDIF Out

2.3 CX20671 Pin Assignments, Signal Definitions, and Electrical Characteristics

The CX20671 40-QFN device signals are shown by major interface in Figure 3, by pin number in Figure 4, and are listed by pin number in Table 2.
Hardware interface signals are defined in Table 3.
Figure 3. CX20671 40-QFN Hardware Interface Signals
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Hardware Interface CX20671 Data Sheet
1
2
3
4
5
6
7
8
9
1
0
1
1
1
2
1
3
1
4
1
5
1
6
1
7
1
8
1
9
2
0
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
D
M
IC
1
/2
V
A
U
X
_
3
.3
F
I
L
T
_
1
.8
S
D
A
T
A
_
O
U
T
B
I
T
_
C
L
K
S
D
A
T
A
_
I
N
V
D
D
_
IO
S
Y
N
C
R
E
S
E
T
#
P
C
_
B
E
E
P
P
O
R
T
C
_
L
F
I
L
T
_
1
.6
5
A
V
D
D
_
5
V
A
V
D
D
_
3
.
3
A
V
D
D
_
H
P
N
C
N
C
P
O
R
T
A
_
R
P
O
R
T
A
_
L
A
V
E
E
D
M
I
C
_
C
L
K
G
P
IO
0
/
E
A
P
D
#
G
P
IO
1
/
S
P
K
_
M
U
T
E
#
S
E
N
S
E
_
A
P
O
R
T
B
_
R
P
O
R
T
B
_
L
B
_
B
IA
S
C
_
B
I
A
S
P
O
R
T
C
_
R
L
E
F
T
+
L
P
W
R
_
5
.0
L
E
F
T
-
R
IG
H
T
-
R
P
W
R
_
5
.0
R
IG
H
T
+
C
L
A
S
S
-
D
_
R
E
F
D
V
D
D
_
3
.3
F
L
Y
_
P
F
L
Y
_
N
3
0
2
9
2
8
27
2
6
2
5
2
4
2
3
2
2
2
1
CX20671
SPDIF
CONEXANT
TM
Pin Define
Please help add Pin41 GND for Thermal Pad
Figure 4. CX20671 40-QFN Pad Signals
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CX20671 Data Sheet Hardware Interface
Table 2. CX20671 Pad Signals
Pad Number Signal Name Pad Number Signal Name
1 DMIC_1/2 21 AVEE
2 VAUX_3.3 22 PORTA_L
3 FILT_1.8 23 PORTA_R
4 SDATA_OUT 24 NC
5 BIT_CLK 25 NC
6 SDATA_IN 26 AVDD_HP
7 VDD_IO 27 AVDD_3.3
8 SYNC 28 AVDD_5V
9 RESET# 29 FILT_1.65
10 PC_BEEP 30 PORTC_L
11 LEFT+ 31 PORTC_R
12 LPWR_5.0 32 C_BIAS
13 LEFT- 33 B_BIAS
14 RIGHT- 34 PORTB_L
15 RPWR_5.0 35 PORTB_R
16 RIGHT+ 36 SENSE_A
17 CLASS-D_REF 37 GPIO1/SPK_MUTE#
18 DVDD_3.3 38 GPIO0/EAPD#
19 FLY_P 39 SPDIF
20 FLY_N 40 DMIC_CLK
(1)
41
FOOTNOTES:
(1)
Pad 41 refers to the exposed pad at the bottom of the device. This thermal/electrical pad must be connected to PCB ground plane with
GND (Note 1)
enough vias. It is recommended that a 4x4 grid of such vias be used.
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Table 3. CX20671 Pad Signal Definitions (1 of 4)
Label Pad Number Type
I/O
Type
Signal Name/Description
Power
DVDD_3.3 18 PWR PWR Digital Supply Voltage. +3.3 V. Connect to system
+3.3 V.
VAUX_3.3 2 PWR PWR Standby Supply Voltage. +3.3 V. Connect to system's
+3.3 V Standby supply. This power pin is used to support Wake-on-Jack functions.
VDD_IO 7 PWR PWR Input/Output Signaling Voltage Supply. Determines
the signaling voltage that is being used on the host system. When VDD_IO is +1.5 V, the device will use
1.5 V signaling on the HDA interface pins; when VDD_IO is +3.3 V, the device will use 3.3 V signaling on the HDA interface pins.
FILT_1.8 3 PWR PWR Internally Regulated Digital Core Supply Voltage.
+1.8 V + 5%. Connect to external decoupling capacitor.
AVD D_5 V 28 P WR P WR Analog Supply Input Voltage for LDO. +5.0 V.
Connect to system +5.0 V supply.
AVD D_3 .3 2 7 P WR PW R Output Voltage from LDO. +3.3 V +
5%. Connect to
external decoupling capacitor.
AVD D_H P 26 P WR PWR Supply Input Voltage for Headphone Amplifiers.
+3.3 V. Connect to system +3.3 V.
RPWR_5.0 15 PWR PWR Supply Voltage for Class-D Amplifier, Right
Channel. +5.0 V. Connect to LPWR_5.0.
Connect LPWR_5.0/RPWR_5.0 to system +5.0 V supply through a 0.1 Ω resistor.
LPWR_5.0 12 PWR PWR Supply Voltage for Class-D Amplifier, Left Channel.
+5.0 V. Connect to RPWR_5.0.
Connect LPWR_5.0/RPWR_5.0 to system +5.0 V supply through a 0.1 Ω resistor.
FLY_N 20 PWR PWR Charge Pump Negative Transfer Charge.
Connected to FLY_P through a 2.2 μF or 1.0 μF capacitor.
FLY_P 19 PWR PWR Charge Pump Positive Transfer Charge. Connected
to FLY_N through a 2.2 μF or 1.0 μF capacitor.
AVEE 21 PWR PWR Internally Generated Analog Negative Supply.
Connect to external decoupling capacitor.
-2.6 V when HP output set at 1.2 Vrms + 10%
-2.0 V when HP output set at 1.0 Vrms +
10%
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CX20671 Data Sheet Hardware Interface
Table 3. CX20671 Pad Signal Definitions (2 of 4)
Label Pad Number Type
I/O
Type
Signal Name/Description
Ground
GND 41 GND GND Audio Device Ground. This is thermal/electrical GND
paddle of device. Connect to audio ground.
High Definition Audio Interface
BIT_CLK 5 I Ihd Bit Clock. 24 MHz serial data input bit clock from the
HDA link.
Connect to BITCLK.
SYNC 8 I Ihd Frame Sync. 48 kHz fixed rate sample HDA sync
input. Synchronization pulse from an HDA compliant controller to all of the HDA compliant codecs on the link. This signal is nominally 0.167 μs wide pulse that is used to synchronize the HDA. Reset state = low. Standard load = 50 pF. SYNC is derived from dividing BITCLK by 500.
Connect to SYNC.
SDATA_OUT 4 I Ihd
Serial Data Output. Serial input data stream from an HDA controller. Reset state = low. Standard load = 50 pF
.
Connect to SDATA_OUT through 33 Ω
SDATA_IN 6 I/O Ohd Serial Data Input. Serial output data stream to the
HDA controller. Functions as an input during codec initialization. Controller has a weak pull-down resistor to prevent spurious events in electrically noisy environments.
Connect to SDATA_IN through 33 Ω
RESET# 9 I Ihdl Master Hardware Reset. Active low HDA link reset
signal. The minimum width of this pulse must be 100
μs.
Connect directly to RESET.
Reference Voltage Connections
FILT_1.65 29 REF REF Analog Reference Voltage. 1.65 V + 5%. Connect to
external decoupling capacitor.
CLASS-D_REF 17 REF REF Class-D Amplifier Reference Voltage. Connect to
RPWR_5.0/LPWR_5.0 voltage supply through external capacitor.
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