Compaq iPAQ Internet Device User Manual
Technical
Reference
Guide
For the
Compaq iPAQ Internet Device
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Technical Reference Guide
NOTICE
The information in this document is subject to change without notice.
COMPAQ COMPUTER CORPORATION SHALL NOT BE LIABLE FOR TECHNICAL OR
EDITORIAL ERRORS OR OMISSIONS HEREIN; NOR FOR INCIDENTAL OR
CONSEQUENTIAL DAMAGES RESULTING FROM THE FURNISHING, PERFORMANCE,
OR USE OF THIS MATERIAL. IT IS THE RESPONSIBILITY OF MANUFACTURERS TO
ENSURE THAT DEVICES DESIGNED TO BE USED WITH COMPAQ PRODUCTS
COMPLY WITH FCC CLASS B EMISSIONS REQUIREMENTS.
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described Compaq product, no part of this document may be photocopied or reproduced in any
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2000 Compaq Computer Corporation
All rights reserved.
Compaq and the Compaq logo are regiserted in the U.S. Patent and Trademark Office.
iPAQ is a trademark of Compaq Information Technologies Group, L.P.
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Technical Reference Guide
For the
Compaq iPAQ Internet Device
First Edition – March 2000
Document Number 127M-0300A-WWEN
Compaq iPAQ Family of Internet Devices
First Edition - March 2000
i
Technical Reference Guide
ii
Compaq iPAQ Family of Internet Devices
First Edition –- March 2000
Technical Reference Guide
TABLE OF CONTENTS
CHAPTER 1 INTRODUCTION.............................................................................................................
1.1 ABOUT THIS GUIDE ........................................................................................................... 1-1
1.1.1 USING THIS GUIDE .....................................................................................................1-1
1.1.2 ADDITIONAL INFORMATION SOURCES.................................................................. 1-1
MODEL NUMBERING CONVENTION........................................................................................... 1-1
1.3 NOTATIONAL CONVENTIONS.......................................................................................... 1-2
1.3.1 VALUES........................................................................................................................ 1-2
1.3.2 RANGES........................................................................................................................ 1-2
1.3.3 SIGNAL LABELS.......................................................................................................... 1-2
1.3.4 REGISTER NOTATION AND USAGE ......................................................................... 1-2
1.3.5 BIT NOTATION............................................................................................................ 1-2
1.4 COMMON ACRONYMS AND ABBREVIATIONS.............................................................. 1-3
CHAPTER 2 SYSTEM OVERVIEW.....................................................................................................
2.1 INTRODUCTION.................................................................................................................. 2-1
2.2 FEATURES AND OPTIONS ................................................................................................. 2-2
2.2.1 STANDARD FEATURES .............................................................................................. 2-2
2.2.2 OPTIONS....................................................................................................................... 2-3
2.3 MECHANICAL DESIGN...................................................................................................... 2-4
2.3.1 CABINET LAYOUTS.................................................................................................... 2-4
2.3.2 CHASSIS LAYOUT....................................................................................................... 2-6
2.3.3 SYSTEM BOARD LAYOUTS ....................................................................................... 2-7
2.4 SYSTEM ARCHITECTURE.................................................................................................. 2-8
2.4.1 PROCESSORS ............................................................................................................. 2-10
2.4.2 CHIPSET ..................................................................................................................... 2-12
2.4.3 SUPPORT COMPONENTS.......................................................................................... 2-13
2.4.4 SYSTEM MEMORY.................................................................................................... 2-13
2.4.5 MASS STORAGE ........................................................................................................ 2-14
2.4.6 SERIAL AND PARALLEL INTERFACES .................................................................. 2-14
2.4.7 UNIVERSAL SERIAL BUS INTERFACE ................................................................... 2-14
2.4.8 GRAPHICS SUBSYSTEM........................................................................................... 2-14
2.4.9 AUDIO SUBSYSTEM ................................................................................................. 2-15
2.5 SPECIFICATIONS .............................................................................................................. 2-15
CHAPTER 3 PROCESSOR/MEMORY SUBSYSTEM ........................................................................
3.1 INTRODUCTION.................................................................................................................. 3-1
3.2 PROCESSOR......................................................................................................................... 3-2
3.2.1 CELERON PROCESSOR............................................................................................... 3-2
3.2.2 PENTIUM III PROCESSOR...........................................................................................3-3
3.2.3 PROCESSOR UPGRADING.......................................................................................... 3-4
3.3 MEMORY SUBSYSTEM...................................................................................................... 3-5
3.4 SUBSYSTEM CONFIGURATION ........................................................................................ 3-8
Compaq iPAQ Family of Internet Devices
First Edition - March 2000
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Technical Reference Guide
CHAPTER 4 SYSTEM SUPPORT.........................................................................................................
4.1 INTRODUCTION.................................................................................................................. 4-1
4.2 PCI BUS OVERVIEW........................................................................................................... 4-2
4.2.1 PCI BUS TRANSACTIONS........................................................................................... 4-3
4.2.2 PCI INTERRUPT MAPPING ......................................................................................... 4-6
4.2.3 PCI POWER MANAGEMENT SUPPORT..................................................................... 4-6
4.2.4 PCI SUB-BUSSES.......................................................................................................... 4-6
4.2.5 PCI CONFIGURATION................................................................................................. 4-7
4.3 AGP BUS OVERVIEW ......................................................................................................... 4-8
4.3.1 BUS TRANSACTIONS.................................................................................................. 4-8
4.3.2 AGP CONFIGURATION ............................................................................................. 4-11
4.4 INTERRUPTS ..................................................................................................................... 4-12
4.4.1 MASKABLE INTERRUPTS ........................................................................................ 4-12
4.4.2 NON-MASKABLE INTERRUPTS............................................................................... 4-14
4.5 INTERVAL TIMER............................................................................................................. 4-16
4.6 SYSTEM CLOCK DISTRIBUTION.................................................................................... 4-16
4.7 REAL-TIME CLOCK AND CONFIGURATION MEMORY............................................... 4-17
4.7.1 CMOS ARCHIVE ........................................................................................................ 4-18
4.7.2 STANDARD CMOS LOCATIONS .............................................................................. 4-18
4.7.3 CMOS FEATURE BITS............................................................................................... 4-26
4.8 SYSTEM MANAGEMENT ................................................................................................. 4-27
4.8.1 SECURITY FUNCTIONS ............................................................................................ 4-27
4.8.2 POWER MANAGEMENT ........................................................................................... 4-28
4.8.3 THERMAL SENSING AND COOLING ...................................................................... 4-28
4.9 SYSTEM I/O MAP.............................................................................................................. 4-29
CHAPTER 5 INPUT/OUTPUT INTERFACES.....................................................................................
5.1 INTRODUCTION.................................................................................................................. 5-1
5.2 ENHANCED IDE INTERFACE ............................................................................................5-1
5.2.1 IDE PROGRAMMING................................................................................................... 5-1
5.2.2 IDE CONNECTOR ........................................................................................................ 5-3
5.3 DISKETTE DRIVE INTERFACE..........................................................................................5-4
5.4 SERIAL INTERFACE ........................................................................................................... 5-5
5.4.1 RS-232 INTERFACE ..................................................................................................... 5-5
5.4.2 SERIAL TEST INTERFACE ........................................................................................5-6
5.4.3 SERIAL INTERFACE PROGRAMMING...................................................................... 5-6
5.5 PARALLEL INTERFACE ..................................................................................................... 5-8
5.5.1 STANDARD PARALLEL PORT MODE ....................................................................... 5-8
5.5.2 ENHANCED PARALLEL PORT MODE....................................................................... 5-9
5.5.3 EXTENDED CAPABILITIES PORT MODE ................................................................. 5-9
5.5.4 PARALLEL INTERFACE PROGRAMMING.............................................................. 5-10
5.5.5 PARALLEL INTERFACE CONNECTOR ................................................................... 5-14
5.6 KEYBOARD/POINTING DEVICE INTERFACE ............................................................... 5-15
5.6.1 KEYBOARD INTERFACE OPERATION ................................................................... 5-15
5.6.2 POINTING DEVICE INTERFACE OPERATION ....................................................... 5-17
5.6.3 KEYBOARD/POINTING DEVICE INTERFACE PROGRAMMING ......................... 5-17
5.6.4 KEYBOARD/POINTING DEVICE INTERFACE CONNECTOR................................ 5-21
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Technical Reference Guide
5.7 UNIVERSAL SERIAL BUS INTERFACE........................................................................... 5-22
5.7.1 USB DATA FORMATS ............................................................................................... 5-22
5.7.2 USB PROGRAMMING................................................................................................ 5-24
5.7.3 USB CONNECTOR ..................................................................................................... 5-25
5.7.4 USB CABLE DATA..................................................................................................... 5-25
5.8 AUDIO SUBSYSTEM......................................................................................................... 5-26
5.8.1 FUNCTIONAL ANALYSIS ......................................................................................... 5-26
5.8.2 AC97 AUDIO CONTROLLER..................................................................................... 5-28
5.8.3 AC97 LINK BUS ......................................................................................................... 5-28
5.8.4 AUDIO CODEC........................................................................................................... 5-29
5.8.5 AUDIO PROGRAMMING........................................................................................... 5-30
5.8.6 AUDIO SPECIFICATIONS ......................................................................................... 5-31
5.9 NETWORK INTERFACE CONTROLLER.......................................................................... 5-32
5.9.1 WAKE ON LAN.......................................................................................................... 5-33
5.9.2 ALERT ON LAN ......................................................................................................... 5-33
5.9.3 POWER MANAGEMENT SUPPORT.......................................................................... 5-34
5.9.4 NIC PROGRAMMING................................................................................................. 5-35
CHAPTER 6 GRAPHICS SUBSYSTEM...............................................................................................
6.1 INTRODUCTION.................................................................................................................. 6-1
6.2 FUNCTIONAL DESCRIPTION............................................................................................. 6-2
6.2.1 FEATURE SUMMARY ................................................................................................. 6-3
6.3 DISPLAY MODES ................................................................................................................6-4
6.4 UPGRADING ........................................................................................................................ 6-4
6.5 PROGRAMMING..................................................................................................................6-5
6.5.1 CONFIGURATION........................................................................................................ 6-5
6.5.2 CONTROL..................................................................................................................... 6-5
6.6 MONITOR POWER MANAGEMENT CONTROL ............................................................... 6-6
6.7 MONITOR CONNECTOR .................................................................................................... 6-6
CHAPTER 7 POWER SUPPLY AND DISTRIBUTION.......................................................................
7.1 INTRODUCTION.................................................................................................................. 7-1
7.2 POWER SUPPLY ASSEMBLY/CONTROL .......................................................................... 7-1
7.2.1 POWER SUPPLY ASSEMBLY...................................................................................... 7-2
7.2.2 POWER CONTROL....................................................................................................... 7-3
7.3 POWER DISTRIBUTION...................................................................................................... 7-4
7.3.1 3.3/5/12 VDC DISTRIBUTION...................................................................................... 7-4
7.3.2 LOW VOLTAGE DISTRIBUTION................................................................................ 7-4
7.4 SIGNAL DISTRIBUTION ..................................................................................................... 7-5
Compaq iPAQ Family of Internet Devices
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Technical Reference Guide
CHAPTER 8 BIOS ROM .......................................................................................................................
8.1 INTRODUCTION.................................................................................................................. 8-1
8.2 DESKTOP MANAGEMENT SUPPORT ............................................................................... 8-2
8.2.1 SYSTEM ID................................................................................................................... 8-4
8.2.2 SYSTEM INFORMATION TABLE............................................................................... 8-4
8.2.3 EDID RETRIEVE .......................................................................................................... 8-5
8.2.4 DRIVE FAULT PREDICTION....................................................................................... 8-5
8.2.5 SYSTEM MAP RETRIEVAL......................................................................................... 8-6
8.2.6 FLASH ROM FUNCTIONS........................................................................................... 8-7
8.2.7 POWER BUTTON FUNCTIONS................................................................................... 8-7
8.2.8 ACCESSING CMOS...................................................................................................... 8-8
8.2.9 ACCESSING CMOS FEATURE BITS........................................................................... 8-8
8.2.10 SECURITY FUNCTIONS ............................................................................................ 8-10
8.3 MEMORY DETECTION AND CONFIGURATION............................................................ 8-11
8.4 PNP SUPPORT.................................................................................................................... 8-12
8.4.1 SMBIOS....................................................................................................................... 8-13
8.5 POWER MANAGEMENT FUNCTIONS ............................................................................ 8-14
8.5.1 INDEPENDENT PM SUPPORT .................................................................................. 8-14
8.5.2 ACPI SUPPORT........................................................................................................... 8-15
8.5.3 APM 1.2 SUPPORT ..................................................................................................... 8-15
8.6 USB LEGACY SUPPORT ................................................................................................... 8-17
8.7 BIOS UPGRADING............................................................................................................. 8-18
APPENDIX A ERROR MESSAGES AND CODES...............................................................................
A.1 INTRODUCTION.................................................................................................................A-1
A.2 POWER-ON MESSAGES..................................................................................................... A-1
A.3 BEEP/KEYBOARD LED CODES........................................................................................ A-1
A.4 POWER-ON SELF TEST (POST) MESSAGES.................................................................... A-2
A.5 PROCESSOR ERROR MESSAGES (1
A.6 MEMORY ERROR MESSAGES (2
XX-XX
A.7 KEYBOARD ERROR MESSAGES (30
A.8 PRINTER ERROR MESSAGES (4
XX-XX
A.9 VIDEO (GRAPHICS) ERROR MESSAGES (5
A.10 DISKETTE DRIVE ERROR MESSAGES (6
A.11 SERIAL INTERFACE ERROR MESSAGES (11
A.12 MODEM COMMUNICATIONS ERROR MESSAGES (12
A.13 SYSTEM STATUS ERROR MESSAGES (16
A.14 HARD DRIVE ERROR MESSAGES (17
A.15 HARD DRIVE ERROR MESSAGES (19
A.16 VIDEO (GRAPHICS) ERROR MESSAGES (24
A.17 AUDIO ERROR MESSAGES (3206A.18 DVD/CD-ROM ERROR MESSAGES (33
A.19 NETWORK INTERFACE ERROR MESSAGES (60
A.20 SCSI INTERFACE ERROR MESSAGES (65
A.21 POINTING DEVICE INTERFACE ERROR MESSAGES (8601-
) ...................................................................... A-3
XX-XX
)........................................................................... A-4
) ....................................................................... A-4
X-XX
) ............................................................................ A-5
).......................................................... A-5
XX-XX
) ......................................................... A-6
XX-XX
) ................................................... A-6
XX-XX
).................................... A-7
XX-XX
)........................................................ A-8
XX-XX
) ............................................................... A-8
XX-XX
) ............................................................... A-9
XX-XX
) .................................................... A-9
XX-XX
)......................................................................... A-10
XX
)............................................................ A-10
XX-XX
) ........................................... A-10
XX-XX
, 66XX-XX, 67XX-XX) ....................... A-11
XX-XX
).............................. A-11
XX
A.22 CEMM PRIVILEDGED OPS ERROR MESSAGES........................................................ A-12
A.23 CEMM EXCEPTION ERROR MESSAGES ................................................................... A-12
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Compaq iPAQ Family of Internet Devices
First Edition –- March 2000
Technical Reference Guide
APPENDIX B ASCII CHARACTER SET .............................................................................................
B.1 INTRODUCTION..................................................................................................................B-1
APPENDIX C KEYBOARD...................................................................................................................
C.1 INTRODUCTION..................................................................................................................C-1
C.2 KEYSTROKE PROCESSING................................................................................................C-2
C.2.1 PS/2-TYPE KEYBOARD TRANSMISSIONS................................................................C-3
C.2.2 USB-TYPE KEYBOARD TRANSMISSIONS................................................................C-4
C.2.3 KEYBOARD LAYOUTS ...............................................................................................C-5
C.2.4 KEYS.............................................................................................................................C-8
C.2.5 KEYBOARD COMMANDS.........................................................................................C-11
C.2.6 SCAN CODES .............................................................................................................C-11
C.3 CONNECTORS ...................................................................................................................C-15
Compaq iPAQ Family of Internet Devices
First Edition - March 2000
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Technical Reference Guide
LIST OF FIGURES
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2–2. C
2–3. C
2–4. C
2–5. C
2–6. C
2–7. P
3–1. P
3–2. C
3–3. P
3–4. S
OMPAQ I
OMPAQ I
OMPAQ I
OMPAQ I
OMPAQ I
OMPAQ I
ROCESSOR ASSEMBLY AND MOUNTING
ROCESSOR/MEMORY SUBSYSTEM ARCHITECTURE
ELERON PROCESSOR INTERNAL ARCHITECTURE
ENTIUM
YSTEM MEMORY MAP
4-1. PCI B
4-2. T
YPE
4-3. PCI C
4-4. AGP 1X D
4-5. AGP 2X D
4-6. M
4-7. C
5-1.
5-2.
5-3.
5-4.
5-5.
5-6.
5-7.
5-8.
5-9.
5-10.
5-11.
5-12.
5-13.
5-14.
5-15.
ASKABLE INTERRUPT PROCESSING
ONFIGURATION MEMORY MAP
40-P
50-P
SERIAL INTERFACE CONNECTOR (MALE
SERIAL INTERFACE HEADER (ON LEGACY-FREE SYSTEM BOARD
PARALLEL INTERFACE CONNECTOR (FEMALE
8042-TO-K
KEYBOARD OR POINTING DEVICE INTERFACE CONNECTOR
USB I/F, B
USB P
UNIVERSAL SERIAL BUS CONNECTOR
AUDIO SUBSYSTEM FUNCTIONAL BLOCK DIAGRAM
AC’97 L
AD1881 A
10/100 TX N
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PAQ I
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PAQ I
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PAQ S
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PAQ A
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ROCESSOR INTERNAL ARCHITECTURE
, F
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LOCK DIAGRAM
..................................................................................................... 3-7
US DEVICES AND FUNCTIONS
0 C
ONFIGURATION CYCLE
ONFIGURATION SPACE MAP
ATA TRANSFER (PEAK TRANSFER RATE
ATA TRANSFER (PEAK TRANSFER RATE
..................................................................................... 4-2
......................................................................................... 4-4
...................................................................................... 4-5
....................................................................................... 4-17
IN PRIMARY
IN SECONDARY
ACKET FORMATS
IDE C
ONNECTOR (ON SYSTEM BOARD
IDE C
ONNECTOR (ON SYSTEM AND DAUGHTER BOARDS
EYBOARD TRANSMISSION OF CODE EDH
LOCK DIAGRAM
............................................................................................... 5-22
.................................................................................................... 5-23
INK BUS PROTOCOL
UDIO CODEC FUNCTIONAL BLOCK DIAGRAM
ETWORK INTERFACE CONTROLLER BLOCK DIAGRAM
TPE C
ONNECTOR
.......................................................................................... 5-28
(RJ-45,
............................................................. 2-1
RONT VIEW
EAR VIEWS
................................................................ 2-4
................................................................ 2-5
......................................................................... 2-7
.............................................................. 2-9
.......................................................................... 2-11
............................................................ 3-1
............................................................... 3-2
: 266 MB/S)........................................... 4-9
: 532 MB/S)......................................... 4-10
, B
LOCK DIAGRAM
DB-9
AS VIEWED FROM REAR O F CHASSIS
DB-25
, T
.............................................................................. 5-25
VIEWED FROM CARD EDGE
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................................ 2-6
........................................................... 3-3
..................................................... 4-12
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)........................................... 5-6
AS VIEWED FROM REAR O F CHASSIS
IMING DIAGRAM
............................. 5-15
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................................................ 5-21
......................................................... 5-27
................................................... 5-29
................................... 5-32
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viii
6-1. G
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6-2. 82810E/DC-100 I
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7–2. P
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7–3. S
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7–4. H
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B–1. ASCII C
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RAPHICS SUBSYSTEM BLOCK DIAGRAM
NTEGRATED GRAPHICS CONTROLLER
POWER DISTRIBUTION AND CONTROL
OWER CABLE DIAGRAM
IGNAL DISTRIBUTION DIAGRAM
EADER PINOUTS
HARACTER SET
............................................................................................................. 7-6
Compaq iPAQ Family of Internet Devices
............................................................................ 6-2
....................................................... 6-3
, B
LOCK DIAGRAM
..................................................... 7-1
.................................................................................................. 7-4
....................................................................................... 7-5
...................................................................................................B-1
First Edition –- March 2000
Technical Reference Guide
F
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F
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F
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F
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F
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F
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F
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C–2. PS/2 K
C–3. U.S. E
C–4. N
ATIONAL
C–5. U.S. E
C–6. N
C–7. E
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C–8. PS/2 K
C–9. USB K
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EYBOARD-TO-SYSTEM TRANSMISSION
NGLISH
NGLISH WINDOWS
(101-KEY) K
(102-KEY) K
(102W-KEY) K
EYBOARD KEY POSITIONS
EYBOARD KEY POSITIONS
(101W-KEY) K
EYBOARD KEY POSITIONS
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..........................................................................................C-7
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EYBOARD CABLE CONNECTOR (MALE
....................................................C-2
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......................................C-3
.......................................................C-5
............................................................C-5
...................................C-6
........................................C-6
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).................................................................C-15
Compaq iPAQ Family of Internet Devices
First Edition - March 2000
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Technical Reference Guide
T
1–1. A
ABLE
CRONYMS AND ABBREVIATIONS
LIST OF TABLES
....................................................................................... 1-3
2-1. F
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ABLE
2-2. A
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2-3. I
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2-4. S
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2-5. E
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2-6. E
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2-7. P
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2-8. M
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2-9. M
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2-10. H
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3–2. P
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3–3. SPD A
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3–4. H
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ABLE
4-1. PCI D
T
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4-2. S
T
ABLE
4-3. LPC B
T
ABLE
4-4. PCI/AGP B
T
ABLE
4-5. M
T
ABLE
4-6. M
T
ABLE
4-7. I
T
ABLE
4-8. I
T
ABLE
4-9. C
T
ABLE
4-10. C
T
ABLE
4-11. S
T
ABLE
EATURE DIFFERENCE MATRIX
RCHITECTURAL COMPARISON
810E C
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NVIRONMENTAL SPECIFICATIONS
LECTRICAL SPECIFICATIONS
HYSICAL SPECIFICATIONS
ULTIBAY 24X
ULTIBAY 24X
ARD DRIVE SPECIFICATIONS
ELERON PROCESSOR STATISTICAL COMPARISON
ENTIUM
/PCI B
OST
YSTEM BOARD
ASKABLE INTERRUPT PRIORITIES AND ASSIGNMENTS
ASKABLE INTERRUPT CONTROL REGISTERS
NTERVAL TIMER FUNCTIONS
NTERVAL TIMER CONTROL REGISTERS
LOCK GENERATION AND DISTRIBUTION
ONFIGURATION MEMORY
YSTEM
HIPSET COMPARISON
CD-ROM D
CD-ROM D
III P
ROCESSOR STATISTICAL COMPARISON
DDRESS MAP
EVICE CONFIGURATION ACCESS
RIDGE CONFIGURATION REGISTERS
RIDGE CONFIGURATION REGISTERS
(SDRAM DIMM)................................................................................. 3-6
RIDGE CONFIGURATION REGISTERS
PCI D
EVICE IDENTIFICATION
I/O MAP........................................................................................................... 4-29
........................................................................................... 2-2
............................................................................................. 2-8
.................................................................................... 2-12
.................................................................................... 2-13
.................................................................................... 2-15
............................................................................................ 2-15
................................................................................................ 2-16
RIVE SPECIFICATIONS
RIVE SPECIFICATIONS
......................................................................................... 2-17
(GMCH, F
................................................................................. 4-4
..................................................................... 4-5
(ICH, F
(MCH, F
.................................................................... 4-13
............................................................................................ 4-16
............................................................................. 4-16
........................................................................... 4-16
(CMOS) MAP....................................................................... 4-18
............................................................. 2-16
............................................................. 2-17
............................................................... 3-2
........................................................... 3-3
0)................................ 3-8
1) .................................. 4-11
UNCTION
UNCTION
UNCTION
0).............................................. 4-7
...................................................... 4-13
5–1. IDE PCI C
T
ABLE
5–2.
T
ABLE
T
ABLE
T
ABLE
T
ABLE
T
ABLE
T
ABLE
T
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ABLE
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ABLE
T
ABLE
T
ABLE
T
ABLE
T
ABLE
T
ABLE
T
ABLE
T
ABLE
T
ABLE
x
Compaq iPAQ Family of Internet Devices
IDE B
5–3. 40-P
5–4. 50-P
5–5.
DB-9 S
5–6. S
5–7. S
5–8. P
5–9.
ERIAL INTERFACE CONFIGURATION REGISTERS
ERIAL INTERFACE CONTROL REGISTERS
ARALLEL INTERFACE CONFIGURATION REGISTERS
PARALLEL INTERFACE CONTROL REGISTERS
5–10. DB-25 P
5–11. 8042-TO-K
5–12. K
EYBOARD INTERFACE CONFIGURATION REGISTERS
5–13. CPU C
5–14. K
EYBOARD/POINTING DEVICE CONNECTOR PINOUT
5–15. USB I
5–16. USB C
5–17. USB C
5–18. USB C
ONFIGURATION REGISTERS
US MASTER CONTROL REGISTERS
IN PRIMARY
IN SECONDARY
ERIAL CONNECTOR PINOUT
OMMANDS TO THE
NTERFACE CONFIGURATION REGISTERS
ONTROL REGISTERS
ONNECTOR PINOUT
ABLE LENGTH DATA
IDE C
ONNECTOR PINOUT
IDE C
ARALLEL CONNECTOR PINOUT
EYBOARD COMMANDS
................................................................................ 5-2
.............................................................................. 5-2
......................................................................... 5-3
ONNECTOR PINOUT
.................................................................... 5-4
...................................................................................... 5-5
.................................................................. 5-6
............................................................................ 5-7
........................................................... 5-10
...................................................................... 5-11
.......................................................................... 5-14
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................................................................................................................ 5-33
VENTS
ONTROLLER
ONTROL REGISTERS
PCI C
PERATING SPECIFICATIONS
PCI C
ONFIGURATION REGISTERS
............................................................................................. 5-35
Technical Reference Guide
ONFIGURATION REGISTERS
........................................ 5-30
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6-5. DB-15 M
8-1. D
ESKTOP MANAGEMENT FUNCTIONS
8-2. CMOS F
8-3. PNP BIOS F
8-4. APM BIOS F
A–1. P
A–2. B
A–3. P
A–4. S
A–5. M
A–6. K
A–7. P
A–8. V
A–9. D
A–10. S
A–11. S
A–12. S
A–13. H
A–14. H
A–15. H
A–16. A
OWER-ON MESSAGES
EEP/KEYBOARD
OWER-ON SELF TEST
YSTEM ERROR MESSAGES
EMORY ERROR MESSAGES
EYBOARD ERROR MESSAGES
RINTER ERROR MESSAGES
IDEO (GRAPHICS
ISKETTE DRIVE ERROR MESSAGES
ERIAL INTERFACE ERROR MESSAGES
ERIAL INTERFACE ERROR MESSAGES
YSTEM STATUS ERROR MESSAGES
ARD DRIVE ERROR MESSAGES
ARD DRIVE ERROR MESSAGES
ARD DRIVE MESSAGES
UDIO ERROR MESSAGES
A–17. DVD/CD-ROM D
A–18. N
ETWORK INTERFACE ERROR MESSAGES
A–19. SCSI I
A–20. P
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A–21. CEMM P
A–22. CEMM E
....................................................................................... 6-4
ONFIGURATION SPACE REGISTERS
VGA M
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(INT15)..................................................................... 8-2
EATURE BITS
UNCTIONS
UNCTIONS
........................................................................................................ 8-9
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..................................................................................................... A-1
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) E
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.................................................................................. A-6
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................................................................................................. A-9
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RIVE ERROR MESSAGES
NTERFACE ERROR MESSAGES
RIVILEGED OPS ERROR MESSAGES
XCEPTION ERROR MESSAGES
.............................................................................. 6-5
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.................................................................................................C-12
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Compaq iPAQ Family of Internet Devices
First Edition - March 2000
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Technical Reference Guide
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Compaq iPAQ Family of Internet Devices
First Edition –- March 2000
Chapter 1
INTRODUCTION
Technical Reference Guide
1.
Chapter 1 INTRODUCTION
1.1 ABOUT THIS GUIDE
This guide provides technical information about the Compaq iPAQ Family of Internet Devices.
This document includes information regarding system design, function, and features that can be
used by programmers, engineers, technicians, and system administrators.
This guide and any applicable addendum are available online at the following location:
http://www.compaq.com/support/techpubs/technical_reference_guides/index.html
1.1.1 USING THIS GUIDE
The chapters of this guide primarily describe the hardware and firmware elements and primarily
deal with the system board and the power supply assembly. The appendices contain general
information about standard peripheral devices such as the keyboard.
1.1.2 ADDITIONAL INFORMATION SOURCES
For more information on chipset components mentioned in this guide refer to the indicated
manufacturers’ documentation, which may be available at the following online sources:
♦
Compaq Computer Corporation: http://www.compaq.com
♦
Intel Corporation: http://www.intel.com
♦
Standard Microsystems Corporation: http://www.smsc.com
1.2 MODEL NUMBERING CONVENTION
The model numbering convention for Compaq iPAQ units is as follows:
iPAQ/XNNN/Nb/N/NNN
Memory (in MB)
Operating system: 4 = Win NT 4.0; 9 = Win95/98
Chipset type (b = 810e)
Hard drive size (in GB)
Processor speed (in MHz)
Processor type: C = Celeron; P = Pentium
Compaq iPAQ Family of Internet Devices
1-1
First Edition - March 2000
Chapter 1 Introduction
1.3 NOTATIONAL CONVENTIONS
1.3.1 VALUES
Hexadecimal values are indicated by a numerical or alpha-numerical value followed by the letter
“h.” Binary values are indicated by a value of ones and zeros followed by the letter “b.”
Numerical values that have no succeeding letter can be assumed to be decimal.
1.3.2 RANGES
Ranges or limits for a parameter are shown using the following methods:
Example A: Bits <7..4> = bits 7, 6, 5, and 4.
Example B: IRQ3-7, 9 = IRQ signals 3 through 7, and IRQ signal 9
1.3.3 SIGNAL LABELS
Signal names are indicated using abbreviations, acronyms, or, if possible, the full signal name in
all capital letters. Signals that are meant to be active (asserted) low are indicated with a dash
immediately following the name.
1.3.4 REGISTER NOTATION AND USAGE
This guide uses standard Intel naming conventions in discussing the microprocessor’s (CPU)
internal registers. Registers that are accessed through programmable I/O using an indexing
scheme are indicated using the following format:
03C5.17h
Index port
Data port
In the example above, register 03C5.17h is accessed by writing the index port value 17h to the
index address (03C4h), followed by a write to or a read from port 03C5h.
1.3.5 BIT NOTATION
Bit values are labeled with bit <0> representing the least-significant bit (LSb) and bit <7>
representing the most-significant bit (MSb) of a byte. Bytes, words, double words, and quad
words are typically shown with most-significant portions on the left or top and the leastsignificant portions on the right or bottom respectively.
1-2
Compaq iPAQ Family of Internet Devices
First Edition – March 2000
1.4 COMMON ACRONYMS AND ABBREVIATIONS
Table 1-1 lists the acronyms and abbreviations used in this guide.
Technical Reference Guide
Table 1–1.
Acronyms and Abbreviations
Table 1-1.
Acronyms and Abbreviations
Acronym/Abbreviation Description
A ampere
AC alternating current
ACPI Advanced Configuration and Power Interface
A/D analog-to-digital
AGP Accelerated graphics port
API application programming interface
APM advanced power management
AOL Alert-ON-LAN
ASIC application-specific integrated circuit
AT 1) attention (modem commands) 2) 286-based PC architecture
ATA AT attachment (IDE protocol)
ATAPI AT attachment w/packet interface extensions
AVI audio-video interleaved
AVGA Advanced VGA
BAT Basic assurance test
BCD binary-coded decimal
BIOS basic input/output system
bis second/new revision
BitBLT bit block transfer
BNC Bayonet Neill-Concelman (connector)
bps or b/s bits per second
BSP Bootstrap processor
BTO Built to order
CAS column address strobe
CD compact disk
CD-ROM compact disk read-only memory
CDS compact disk system
CF carry flag
CGA color graphics adapter
Ch channel
cm centimeter
CMC cache/memory controller
CMOS complimentary metal-oxide semiconductor (configuration memory)
Cntlr controller
Cntrl control
codec compressor/decompressor
CPQ Compaq
CPU central processing unit
CRT cathode ray tube
CSM Compaq system management / Compaq server management
CTO Configure to order
DAA direct access arrangement
DAC digital-to-analog converter
DC direct current
DCH DOS compatibility hole
DDC Display Data Channel
DF direction flag
Continued
Compaq iPAQ Family of Internet Devices
First Edition - March 2000
1-3
Chapter 1 Introduction
Table 1-1.
Acronym/Abbreviation Description
DIMM dual inline memory module
DIN Deutche IndustriNorm (connector standard)
DIP dual inline package
DMA direct memory access
DMI Desktop management interface
dpi dots per inch
DRAM dynamic random access memory
DRQ data request
EDID extended display identification data
EDO extended data out (RAM type)
EEPROM electrically eraseable PROM
EGA enhanced graphics adapter
EIA Electronic Industry Association
EISA extended ISA
EPP enhanced parallel port
EIDE enhanced IDE
ESCD Extended System Configuration Data (format)
EV Environmental Variable (data)
ExCA Exchangeable Card Architecture
FIFO first in / first out
FL flag (register)
FM frequency modulation
FPM fast page mode (RAM type)
FPU Floating point unit (numeric or math coprocessor)
FPS Frames per second
ft foot
GB gigabyte
GMCH Graphics/memory controller hub
GND ground
GPIO general purpose I/O
GPOC general purpose open-collector
GART Graphics address re-mapping table
GUI graphics user interface
h hexadecimal
HW hardware
hex hexadecimal
Hz hertz
ICH I/O controller hub
IDE integrated drive element
IEEE Institute of Electrical and Electronic Engineers
IF interrupt flag
I/F interface
in inch
INT interrupt
I/O input/output
IPL initial program loader
IrDA InfraRed Data Association
IRQ interrupt request
ISA industry standard architecture
JEDEC Joint Electron Device Engineering Council
Kb / KB kilobits / kilobytes (x 1024 bits / x 1024 bytes)
Kb/s kilobits per second
kg kilogram
KHz kilohertz
kv kilovolt
Acronyms and Abbreviations
Continued
Continued
1-4
Compaq iPAQ Family of Internet Devices
First Edition – March 2000
Technical Reference Guide
Table 1-1.
Acronym/Abbreviation Description
lb pound
LAN local area network
LCD liquid crystal display
LED light-emitting diode
LIF low insertion force (socket)
LPC Low pin count
LSI large scale integration
LSb / LSB least significant bit / least significant byte
LUN logical unit (SCSI)
MCH Memory controller hub
MMX multimedia extensions
MPEG Motion Picture Experts Group
ms millisecond
MSb / MSB most significant bit / most significant byte
mux multiplex
MVA motion video acceleration
MVW motion video window
n
NIC network interface card/controller
NiCad nickel cadmium
NiMH nickel-metal hydride
NMI non-maskable interrupt
NRZI Non-return-to-zero inverted
ns nanosecond
NT nested task flag
NTSC National Television Standards Committee
NVRAM non-volatile random access memory
OEM original equipment manufacturer
OS operating system
PAL 1. programmable array logic 2. phase altering line
PC Internet Device
PCI peripheral component interconnect
PCM pulse code modulation
PCMCIA Internet Device Memory Card International Association
PF parity flag
PIN personal identification number
PIO Programmed I/O
POST power-on self test
PROM programmable read-only memory
PTR pointer
RAM random access memory
RAS row address strobe
rcvr receiver
RF resume flag
RGB red/green/blue (monitor input)
RH Relative humidity
RIMM RDRAM inline memory module
RMS root mean square
ROM read-only memory
RPM revolutions per minute
RTC real time clock
R/W read/write
Acronyms and Abbreviations
variable parameter/value
Continued
Continued
Compaq iPAQ Family of Internet Devices
First Edition - March 2000
1-5
Chapter 1 Introduction
1-6
Compaq iPAQ Family of Internet Devices
First Edition – March 2000
Technical Reference Guide
Table 1-1.
Acronym/Abbreviation Description
SCSI small computer system interface
SDRAM Synchronous Dynamic RAM
SEC Single Edge-Connector
SECAM sequential colour avec memoire (sequential color with memory)
SF sign flag
SGRAM Synchronous Graphics RAM
SIMD Single instruction multiple data
SIMM single in-line memory module
SIT system information table
SMART Self Monitor Analysis Report Technology
SMI system management interrupt
SMM system management mode
SMRAM system management RAM
SPD serial presence detect
SPP standard parallel port
SRAM static RAM
SSE Streaming SIMD extensions
STN super twist pneumatic
SVGA super VGA
SW software
TAD telephone answering device
TAFI Temperature-sensing And Fan control Integrated circuit
TAM telephone answering machine
TCP tape carrier package
TF trap flag
TFT thin-film transistor
TIA Telecommunications Information Administration
TPE twisted pair ethernet
TPI track per inch
TTL transistor-transistor logic
TV television
TX transmit
UART universal asynchronous receiver/transmitter
UDMA Ultra DMA
URL Uniform resource locator
us / µs microsecond
USB Universal Serial Bus
UTP unshielded twisted pair
Vvolt
VESA Video Electronic Standards Association
VGA video graphics adapter
vib vibrato
VLSI very large scale integration
VRAM Video RAM
Wwatt
WOL Wake on LAN
WRAM Windows RAM
ZF zero flag
ZIF zero insertion force (socket)
Acronyms and Abbreviations
Continued
Compaq iPAQ Family of Internet Devices
First Edition - March 2000
1-7
Chapter 2
SYSTEM OVERVIEW
2. Chapter 2 SYSTEM OVERVIEW
2.1 INTRODUCTION
The Compaq iPAQ Family of Internet Devices provides affordable business solutions with the
focus on internet access and mainstream performance. Based on an Intel Celeron or Pentium III
processor with the Intel 810e chipset, these systems are designed to maximize the effectiveness of
internet and intranet usage while simplifying system management.
Technical Reference Guide
Figure 2–1.
This chapter includes the following topics:
♦
Features and options (2.2) page 2-2
♦
Mechanical design (2.3) page 2-4
♦
System architecture (2.4) page 2-8
♦
Specifications (2.5) page 2-13
Compaq iPAQ Family of Internet Devices
Compaq iPAQ Internet Device with Monitor
First Edition - March 2000
2-1
Chapter 2 System Overview
2.2 FEATURES AND OPTIONS
This section describes the standard features and available options.
2.2.1 STANDARD FEATURES
The following standard features are available on all models:
♦
Celeron or Pentium III processor
♦
810e Chipset
♦
Two DIMM sockets for system memory
♦
AC’97 audio subsystem w/Compaq Premier Sound and front panel mic and headphone jacks
♦
MuliBay device mount w/hot-swap support
♦
Extended IDE controller supporting UATA/66 mode
♦
Hard drive fault prediction
♦
Two USB ports on front panel
♦
Network interface controller
♦
VGA analog output (1600 x 1200 max resolution)
♦
APM 1.2 power management support
♦
Plug ’n Play compatible (with ESCD support)
♦
Intelligent Manageability support
♦
Energy Star compliant
♦
Security features including:
•
Setup and power-on passwords
•
DriveLock for MultiBay hard drive
•
I/O interface disabling
•
Administrator password
•
Network service boot
•
Asset tracking tag
•
UUID
•
Cable lock provision
♦
Compaq Easy-Access keyboard w/Windows support
♦
Mouse
Table 2-1 shows the differences in features between the iPAQ models:
Table 2-1.
4-MB Display cache No Yes No Yes
Rear panel USB ports 3 3 0 0
Serial port 0 0 1 1
Parallel port 0 0 1 1
Keyboard/mouse connection USB USB PS/2 PS/2
Feature Difference Matrix
2-2
Compaq iPAQ Family of Internet Devices
Table 2-1.
iPAQ Feature Difference Matrix
Legacy-Free Legacy-Light
Celeron-Based Pentium-based Celeron-Based Pentium-Based
First Edition – March 2000
2.2.2 OPTIONS
The following items are available as options for all models and may be included in the standard
configuration of some models:
♦
System Memory: 32-MB DIMM (non-ECC)
♦
Hard drives: 4.3 or 8.4 GB UATA/66 hard drive
♦
MultiBay drives: 24x CD-ROM drive
Technical Reference Guide
64-MB DIMM (non-ECC)
128-MB DIMM (non-ECC)
256-MB DIMM (non-ECC)
4x DVD-ROM drive
Super Disk LS-120 Power Drive
6.0 GB hard drive
Compaq iPAQ Family of Internet Devices
First Edition - March 2000
2-3
Chapter 2 System Overview
2.3 MECHANICAL DESIGN
The Compaq iPAQ Internet Device uses a minitower form factor featuring a smaller footprint
and reduced height than previous minitowers, allowing easy floor or desktop positioning.
Commonly used audio and USB connections are accessible from the front panel. There are slight
differences between the legacy-light and legacy-free models, most notably in the rear panel
layouts.
NOTE:
For detailed information on servicing the Internet Device refer to the applicable
Maintenance and Service Guide.
2.3.1 CABINET LAYOUTS
2.3.1.1 Front View
1
4
7
2
3
5
6
Item Description
1 Power Button
2 Power LED
3 Hard drive activity LED
4 MultiBay device bay (accepts 5.25”/12.7 mm storage device)
5 Microphone In Jack
6 Headphone Out Jack
7 USB port 3 jack
8 USB port 4 jack
Figure 2–2.
2-4
Compaq iPAQ Family of Internet Devices
Compaq iPAQ Internet Device, Front View
8
First Edition – March 2000
2.3.1.2 Rear Views
Technical Reference Guide
1
3
5
7
11
13
Item Description Item Description
1 Audio line output 2 Audio line input
3 Network activity LED indicator 4 Network I/F jack
5 Network speed LED indicator 6 VGA monitor connector
7 Parallel I/F connector 8 Serial I/F connector
9 USB port connectors (left-to-right; 0,1, 2) 10 MultiBay device eject button
11 PS/2 mouse connector 12 PS/2 keyboard connector
13 AC line in connector 14 Line voltage select switch
2
4
6
8
10
12
14
13
1
3
5
9
2
4
6
10
14
Legacy-FreeLegacy-Light
Figure 2–3.
Compaq iPAQ Internet Device, Rear Views
Compaq iPAQ Family of Internet Devices
First Edition - March 2000
2-5
Chapter 2 System Overview
2.3.2 CHASSIS LAYOUT
The internal assemblies are accessible from the right side of the system unit. The right side
(carbon-colored) cover is easily removable allowing quick access to the DIMM sockets through
an access opening and to the hard drive. Access to the system board and processor requires
removing the right chassis access panel.
NOTE:
For a detailed description on servicing the unit refer to the applicable
Maintenance and Service Guide.
1
2
3
4
5
6
7
8
Right Side Cover Removed Right Side Cover and
Chassis Access Panel Removed
Item Description
1 Power button/LED board (PCA# 010647)
2 DIMM socket access
3 Hard drive in 3.5” 1/3 height bay
4 Audio I/O board (PCA# 010650)
5 System board (PCA# 161014 or 161015)
6 Power supply assembly
7 Processor
8 Speaker
Figure 2–4.
2-6
Compaq iPAQ Family of Internet Devices
Compaq iPAQ Internet Device Chassis Layout, Ride Side View
First Edition – March 2000
2.3.3 SYSTEM BOARD LAYOUTS
The Compaq iPAQ Internet Device uses a FlexATX-type (9.0 x 7.5 inch) system board. Two
variations are available; a legacy-light board and a legacy-free board.
Technical Reference Guide
1 2 4
22
21
20
19
18
17 1516
Legacy Light (PCA# 161014)
Refer to Chapter 7 “Power and Signal Distribution” for header pinouts.
NOTE:
3
Item Description
1 USB ports 3 and 4 (front panel) header
2 Battery
3 BIOS ROM configuration jumper
4 Speaker connector
5 Audio microphone/headphone header
6 Audio line out jack
7 Audio line in jack
8 Network connector
9 VGA monitor connector
10 Parallel I/F connector
11 Serial I/F connector
12 USB ports 0, 1, 2 connectors
13 PS/2 mouse connector (top), PS/2 keyboard connector (bottom)
14 Serial I/F header
15 PGA370 processor socket
16 DIMM sockets
17 Processor (boxed) fan header
18 IDE (primary) 40-pin connector
19 IDE (secondary) 50-pin connector
20 Power button/LED indicator connector
21 CD audio header
22 Power supply connector
5
22
6
21
7
20
8
9
19
10
11
13
18
1 2 4
17 141516
Legacy Free (PCA# 161015)
3
5
6
7
8
9
12
Figure 2–5.
Compaq iPAQ System Board Layouts
Compaq iPAQ Family of Internet Devices
First Edition - March 2000
2-7
Chapter 2 System Overview
2.4 SYSTEM ARCHITECTURE
The Compaq iPAQ Internet Device features an Intel Celeron or Pentium III processor and the
810e chipset. As indicated in the following table and shown in Figure 2-6, four architectural
configurations are available:
♦
Legacy-free with Celeron processor
♦
Legacy-free with Pentium III processor
♦
Legacy-light with Celeron processor
♦
Legacy-light with Pentium III processor
Legacy-free systems provide five Universal Serial Bus (USB) ports for connecting peripherals
(including the supplied USB mouse and USB keyboard). Legacy light systems provide two USB
ports along with the traditional PS/2 connectors for the supplied mouse and keyboard as well as
parallel and serial port connectors.
All systems use the 810e chipset. The 810e chipset includes the 82810e-DC100 GMCH designed
to provide control for SDRAM and also integrates an AGP 2X graphics controller. Pentium IIIbased systems come with an additional 4-MB display cache to compliment the graphics
controller.
The 810e chipset also includes an 82801 I/O Controller Hub (ICH) that provides two IDE
interfaces, two USB interfaces, and a PCI bus controller. The 82802 Firmware Hub (FWH)
component is loaded with Compaq BIOS
Table 2-1 lists differences between system architectures:
Table 2-2.
Architectural Comparison
Table 2-2
.
Architectural Comparison
Host bus (FSB)speed [1] 66 MHz 100 MHz 66 MHz 100 MHz
Celeron-Based Pentium III-Based Celeron-Based Pentium III-Based
4-MB Display Cache? No Yes No Yes
PS/2 Mouse/Keyboard? No No Yes Yes
Serial port? No No Yes Yes
Parallel port? No No Yes Yes
# of USB ports 5 5 2 2
NOTES:
[1] As configured with 500-MHz processor.
Legacy Free Legacy Light
2-8
Compaq iPAQ Family of Internet Devices
First Edition – March 2000
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