Compal LA-9642P Shark Bay UMA, G410, G510 Schematic

A

1 1

B

C

D

E

Compal Confidential

2 2

UMA M/B Schematics Document

Haswell with DDRIII + Lynx Point PCH

2012-10-03

3 3

L

A-9642P

REV:0.1

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

C

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Cover Page

LA-9641P

E

1 60Wednesday, October 03, 2012

2.0

A

Compal confidential

File Name :

B

C

D

E

1 1

Shark Bay

Intel Processor Haswell

L

LVDS Conn.

page 28

HDMI Conn.

page 30

VDS Translator

RTD2132S(Single)

page 27

FDI *2

2.7GT/s

2 2

CRT Conn.

page 29

LAN

RJ45 Conn.

page 28

3 3

Atheros AR8162/QCA8172(10/100)

page 28

PCIe Mini Card WiMax

USB20 Port 10

page 28

PCIe Mini Card WLAN

PCIe Port 0

page 28

PCIe x1

USB20 x1

Sub-borad

rPGA946

37.5mm x 37.5mm

page 5,~9

Intel

PCH

Lynx Point

FCBGA 695Balls 20mm x 20mm

Memory Bus Dual Channel

DDR3L DDR3L

DMI2 *4 5

GT/s

USB30 x2

USB20 x6

SATA Gen3

SATA

AZALIA

1600MHz 1333MHz

204pin DDRIII-SO-DIMM X2

Left USB3.0 x2

USB30 Port 0,1

page 28

Touch Screen

USB20 Port 2

HDD Conn.

SATA Port 4

page 28

ODD Conn.

SATA Port 5

Audio Codec

CONEXANT CX20757

page 28

BANK 0, 1, 2

Right USB2.0

USB20 Port 9

Card Reader

Realtek RTS5170

USB20 Port 11

page 28

page 10,11

Int. Camera

USB20 Port 3

page 28

Int. MIC Conn.

page 28

SPI ROM

2MB + 4MB

page 28

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

A

ODD/B

LSXXXP

LED/B

LSXXXP

page 28

CR/B

LSXXXP

page 28

B

15"

14"

Power/B

USB/B

LSXXXP

page 28

4 4

EC

ENE KB9012

page 28

Thermal Sensor

C

page 28

2011/06/15 2012/07/11

Touch Pad

page 28

Compal Secret Data

Deciphered Date

Int. KBD

page 28

D

Int. Speaker Conn.

page 28

Title

Size Document Number Rev

Custom

Date: Sheet of

Audio Combo Jacks

HP & MIC

Compal Electronics, Inc.

Block Diagram

LA-9641P

page 28

2 60Wednesday, October 03, 2012

E

2 60Wednesday, October 03, 2012

2.0

A

Voltage Rails

power

State

S0

S3

S5 S4/AC

Device

Smart Battery

plane

Address

0001 011X b

+B

O

X

+5VALW

+3VALW

O

X

X X X

+1.35V

EC SM Bus2 address

Device

Thermal Sen sor F75303M

1 1

2 2

S5 S4/ Battery only

S5 S4/AC & Battery

on't exist

d

EC SM Bus1 address

PCH SM Bus address

Device Address

DDR DIMM0

3 3

DDR DIMM2

1001 000Xb

1001 010Xb

NV-GPU SM Bus address

Device Address

Internal thermal sensor

1001 111Xb (0x9E)

B

+5VS

+3VS

+VCC_CORE

+VGA_CORE

+1.5VS

+0.675VS

+1.05VS

O

X X

X

Address

1001_101xb

BOARD ID Table

Board ID

0 1 2 3 4 5

C

PCB Revision

0.1

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

D

SIGNAL

SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

HIGH HIGH HIGH HIGH

LOW

LOW LOW LOW LOW

HIGH

LOWLOWLOW

HIGHHIGHHIGH

HIGH

ON

E

ON

OFF

ON ON

ON

OFF

LOW

OFF

6 7

OO

USB Port Table

X

EHCI1

EHCI2

USB 2.0 Port

UHCI0

UHCI1

UHCI2

UHCI3

UHCI4

UHCI5

UHCI6

0 1 2 3 4 5 6 7 8

9 10 11 12 13

3 External USB Port

Touch screen

Vcc 3.3V +/- 5%

Board ID

0 1 2 3 4 5 6 7 NC

Left USB3.0 Left USB3.0

Camera

Right USB2.0 WLAN Card reader

100K +/- 5%Ra/Rc/Re

Rb / Rd / Rf V min

0

8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5%

Board ID / SKU ID Table for AD channel

AD_BID

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

BOM Structure Table

BTO Item BOM Structure

HDMI HDMI@

Connector ME@ 45 LEVEL 45@ 10/100 LAN

LAN LDO Mode LDO@ LAN Switch mode SWR@

V typ

AD_BID

V

AD_BID

0 V 0 V

0.503 V

0.819 V

0.538 V

0.875 V

1.185 V 1.264 V

2.200 V

3.300 V

2.341 V

3.300 V

max

Porject Phase

G-series

MP

G-series

PVT

G-series

DVT

G-series

EVT

Y-series

EVT

Y-series

DVT

Y-series

PVT

Y-series

MP

Cameara CMOS@ For QIWG5 (14") 14@ For QIWG6 (15") 15@ Unpop

@

SMBUS Control Table

X X

V

+3VS

X

WLAN WWAN

SOURCE

SMB_EC_CK1 SMB_EC_DA1 SMB_EC_CK2 SMB_EC_DA2

4 4

SMBCLK SMBDATA SML0CLK SML0DATA SML1CLK SML1DATA

KB9012

+3VALW

KB9012

+3VALW

PCH

+3VALW

PCH

+3VALW

PCH

+3VALW

VGA BATT KB9012 SODIMM

X V

+3VALW

X X X

V

+3VS

A

X X X

X

X X

V

+3VS

X XX

V

+3VS

X

B

Thermal Sensor

X X X XX

V

+3VS

PCH

X

V

+3VS

X X XX X

RTD2132

X

V

+3VS

X X

Security Classification

Issued Date

V

+3VS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

C

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

B

LA-9641P

Date: Sheet of

Compal Electronics, Inc.

Notes List

3 60Wednesday, October 03, 2012

E

2.0

5

ZZZ1

D D

C C

B B

PCB LA9641

DMI_CRX_PTX_N0<14> DMI_CRX_PTX_N1<14> DMI_CRX_PTX_N2<14> DMI_CRX_PTX_N3<14>

DMI_CRX_PTX_P0<14> DMI_CRX_PTX_P1<14> DMI_CRX_PTX_P2<14> DMI_CRX_PTX_P3<14>

DMI_CTX_PRX_N0<14> DMI_CTX_PRX_N1<14> DMI_CTX_PRX_N2<14> DMI_CTX_PRX_N3<14>

DMI_CTX_PRX_P0<14> DMI_CTX_PRX_P1<14> DMI_CTX_PRX_P2<14> DMI_CTX_PRX_P3<14>

FDI_CSYNC<14>

FDI_INT<14>

Note: Trace width=4 mils ,Spacing=5mil Max length= 10000 mils.

4

DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3

DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3

DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3

DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3

D21 C21 B21 A21

D20 C20 B20 A20

D18 C17 B17 A17

D17 C18 B18 A18

H29

J29

Haswell rPGA EDS

JCPU1A

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3

DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3

FDI_CSYNC DISP_INT

ME@

DMI FDI

I

NTEL_HASWELL_HASWELL

3

+VCOMP_OUT

PEG_RCOMP

Note: Trace width=12 mils ,Spacing=15mils Max length= 400 mils.

E23

PEG_RCO MP

PEG_RXN _0 PEG_RXN _1 PEG_RXN _2 PEG_RXN _3 PEG_RXN _4 PEG_RXN _5 PEG_RXN _6

PEG

PEG_RXN _7 PEG_RXN _8

PEG_RXN _9 PEG_RXN _10 PEG_RXN _11 PEG_RXN _12 PEG_RXN _13 PEG_RXN _14 PEG_RXN _15

PEG_RXP _0 PEG_RXP _1 PEG_RXP _2 PEG_RXP _3 PEG_RXP _4 PEG_RXP _5 PEG_RXP _6 PEG_RXP _7 PEG_RXP _8

PEG_RXP _9 PEG_RXP _10 PEG_RXP _11 PEG_RXP _12 PEG_RXP _13 PEG_RXP _14 PEG_RXP _15

PEG_TXN _0

PEG_TXN _1

PEG_TXN _2

PEG_TXN _3

PEG_TXN _4

PEG_TXN _5

PEG_TXN _6

PEG_TXN _7

PEG_TXN _8

PEG_TXN _9 PEG_TXN _10 PEG_TXN _11 PEG_TXN _12 PEG_TXN _13 PEG_TXN _14 PEG_TXN _15

PEG_TXP _0

PEG_TXP _1

PEG_TXP _2

PEG_TXP _3

PEG_TXP _4

PEG_TXP _5

PEG_TXP _6

PEG_TXP _7

PEG_TXP _8

PEG_TXP _9 PEG_TXP _10 PEG_TXP _11 PEG_TXP _12 PEG_TXP _13 PEG_TXP _14 PEG_TXP _15

1 OF 9

M29 K28 M31 L30 M33 L32 M35 L34 E29 D28 E31 D30 E35 D34 E33 E32 L29 L28 L31 K30 L33 K32 L35 K34 F29 E28 F31 E30 F35 E34 F33 D32 H35 H34 J33 H32 J31 G30 C33 B32 B31 A30 B29 A28 B27 A26 B25 A24 J35 G34 H33 G32 H31 H30 B33 A32 C31 B30 C29 B28 C27 B26 C25 B24

PEG_RCOMP

12

R124.9_0402_1% R124.9_0402_1%

2

1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

Compal Secret Data

3

Deciphered Date

Title

PROCESSOR(1/7) DMI,FDI,PEG

Size Document Number Rev

Custom

LA-9641P

Date: Sheet of

2

Date: Sheet

4 60Wednesday, October 03, 2012

1

0.1

of

5

D D

+1.05VS +VCCST

R4 0_0603_5%

4

Note:

12

@

22U_0805_6.3V6M@C33

22U_0805_6.3V6M

1

2

0 ohm Resistor should be placed cloose to CPU

C33

C34

22U_0805_6.3V6M@C34

22U_0805_6.3V6M

1

@

2

3

H_DRAMRST#

2

+1.35V

12

R42

@R42

@

1K_0402_1%

R46

R46 1K_0402_5%

1K_0402_5%

1 2

DDR3_DRAMRST# <11,12>

1

DDR3 COMPENSATION SIGNALS

+VCCIO_OUT

Haswell rPGA EDS

12

R8

62_0402_5%

1 2

R9

H_PROCHOT#<32,37,38,44>

C C

H_CPUPWRGD<18>

@

C536

100P_0402_50V8J

C536 ESD reserve

R9

56_0402_5%

1

R15

R15 10K_0402_5%

10K_0402_5%

2

1 2

Note: PECI/THERMTRIP: Trace width=4 mils ,Spacing=18mil Zo=50 ohm

H_PECI<18,32>

H_PROCHOT#_RH_PROCHOT#

H_THRMTRIP#<18>

1 2

H_PM_SYNC<14>

PM_SYS_PWRGD_BUF PM_DRAM_PWR GD_R

CPU_PLTRST#<18>

CLK_CPU_DPLL#<15> CLK_CPU_DPLL<15> CLK_CPU_SSC_DPLL#<15> CLK_CPU_SSC_DPLL<15> CLK_CPU_DMI#<15> CLK_CPU_DMI<15>

R10 0_0402_5%R10 0_0402_5%

1 2

R13 0_0402_5%R13 0_0402_5%

1 2

R17 0_0402_5%R17 0_0402_5%

1 2

R19 0_0402_5%R19 0_0402_5%

1 2

R20 0_0402_5%R20 0_0402_5%

1 2

R22 0_0402_5%R22 0_0402_5%

1 2

R24 0_0402_5%R24 0_0402_5%

1 2

R25 0_0402_5%R25 0_0402_5%

CLK_CPU_SSC_DPLL_R

CLK_CPU_SSC_DPLL#_R

T31T31

1 2

0_0402_5%

place near CPU

R26 10K_0402_5%@R26 10K_0402_5%@

R27 10K_0402_5%@R27 10K_0402_5%@

R37

12

H_CATERR#

+VCCST

H_PM_SYNC_R

BUF_CPU_RST#

CLK_CPU_DPLL#_R CLK_CPU_DPLL_R CLK_CPU_SSC_DPLL#_R CLK_CPU_SSC_DPLL_R CLK_CPU_DMI#_R CLK_CPU_DMII_R

+VCCIO_OUT

JCPU1B

AP32

SKTOCC

AN32

CATERR

AR27

PECI

AK31

FC_AK31

AM30

PROCHOT

AM35

THERMTRIP

AT28

PM_SYNC

AL34

PWRGOOD

AC10

SM_DRAMPWR OK

AT26

PLTRSTIN

G28

DPLL_REF_CLKN

H28

DPLL_REF_CLKP

F27

SSC_DPLL_REF_CLKN

E27

SSC_DPLL_REF_CLKP

D26

BCLKN

E26

BCLKP

ME@

Haswell rPGA EDS

MISC

THERMAL

PWR

INTEL_HASWELL_HAS WELL

DDR3

CLOCK

SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2

SM_DRAMRST

JTAG

BPM_N_0 BPM_N_1 BPM_N_2 BPM_N_3 BPM_N_4 BPM_N_5 BPM_N_6 BPM_N_7

2 OF 9

PRDY PREQ

TCK TMS

TRST

TDO DBR

AP3

SM_RCOMP0

AR3

SM_RCOMP1

AP2

SM_RCOMP2

AN3

H_DRAMRST#

AR29

XDP_PRDY#

AT29

XDP_PREQ#

AM34

XDP_TCLK

AN33

XDP_TMS

AM33

XDP_TRST#

AM31

XDP_TDI

TDI

AL33

XDP_TDO

AP33

XDP_DBRESET#

AR30 AN31 AN29 AP31 AP30 AN28 AP29 AP28

XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3 XDP_BPM#4 XDP_BPM#5 XDP_BPM#6 XDP_BPM#7

12

@

C186

0.047U_0402_16V7K

For EMI Near Chip

TMS/TDI no require pull high on Check list

SM_RCOMP0 SM_RCOMP1 SM_RCOMP2

Note: Trace width=12~15 mil, Spcing=20 mils Max trace length= 500 mils

PU/PD for JTAG signals

XDP_DBRESET#

XDP_TMS XDP_TDI XDP_TDO

XDP_TCLK XDP_TRST#

1 2

R5 100_0402_1%R5 100_0402_1%

1 2

R6 75_0402_1%R6 75_0402_1%

1 2

R7 100_0402_1%R7 100_0402_1%

R11 1K_0402_5%R11 1K_0402_5%

R14 51_0402_5%@R14 51_0402_5%@ R16 51_0402_5%@R16 51_0402_5%@ R18 51_0402_5%R18 51_0402_5%

R21 51_0402_5%R21 51_0402_5% R23 51_0402_5%R23 51_0402_5%

12

12 12 12

12 12

+3VS

+1.05VS

SSC CLOCK TERMINATION, IF NOT USED, stuff R26,R27

B B

SM_DRAMPWROK with DDR Power Gating Topology

+3V_PCH +3V_PCH

Q1

@

Q1

@

2N7002H_SOT23-3

+1.35V_CPU_VDDQ

12

R30

1.8K_0402_1%

PM_SYS_PWRGD_BUF

12

R36

3.3K_0402_1%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Title

PROCESSOR(2/7) PM,XDP,CLK

Size Document Number Rev

LA-9641P

1

5 60Wednesday, October 03, 2012

0.1

@

1

C35

12

DS3@

R28

100K_0402_5%

1 2

R32

DS3@ R32

SYS_PWROK<14>

PM_DRAM_PWR GD<14>

A A

DS3@

0_0402_5%

5

R29

R29 200_0402_1%

200_0402_1%

C35

0.1U_0402_16V4Z

R133

2

U1

5

1

P

B

2

A

G

74AHC1G09GW_TSSOP5

3

NODS3@

1 2

0_0402_5%

SUSP<36>

4

DS3@

4

O

12

@

R35

R35 39_0402_5%

39_0402_5%

13

D

2

G

S

5

JCPU1C

DDR_A_D[0..63]<11>

D D

C C

+VREF_CA_R +VREF_DQ_DIMMA_R +VREF_DQ_DIMMB_R

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62

DDR_A_D63 +VREF_CA_R +VREF_DQ_DIMMA_R +VREF_DQ_DIMMB_R

AR15 AT14 AM14 AN14 AT15 AR14 AN15 AM15

AJ10

AK10

AM9 AN9 AM8 AN8 AR9

AT9

AR8

AT8 AJ9

AK9

AJ6

AK6

AJ7

AK7

AF4 AF5 AF1

AF2 AG4 AG5 AG1 AG2

J1 J2

J5 H5 H2 H1

J4 H4 F2 F1 D2 D3 D1 F3 C3 B3 B5 E6 A5 D6 D5 E5 B6 A6

E12

D12

B11 A11 E11

D11

B12 A12

AM3

F16 F13

SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63 SM_VREF SA_DIMM_VREFDQ SB_DIMM_VREFDQ

ME@

JCPU1C

I

NTEL_HASWELL_HASWELL

Haswell rPGA EDS

SA_CK_N_0 SA_CK_P_0

SA_CKE_0 SA_CK_N_1 SA_CK_P_1

SA_CKE_1 SA_CK_N_2 SA_CK_P_2

SA_CKE_2 SA_CK_N_3 SA_CK_P_3

SA_CKE_3

SA_CS_N_0 SA_CS_N_1 SA_CS_N_2 SA_CS_N_3

SA_ODT_0 SA_ODT_1 SA_ODT_2 SA_ODT_3

SA_BS_0 SA_BS_1 SA_BS_2

SA_RAS

SA_CAS

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14 SA_MA_15

SA_DQS_N_0 SA_DQS_N_1 SA_DQS_N_2 SA_DQS_N_3 SA_DQS_N_4 SA_DQS_N_5 SA_DQS_N_6 SA_DQS_N_7 SA_DQS_P_0 SA_DQS_P_1 SA_DQS_P_2 SA_DQS_P_3 SA_DQS_P_4 SA_DQS_P_5 SA_DQS_P_6 SA_DQS_P_7

3 OF 9

4

RSVD

SA_WE

VSS

AC7 U4

M_CLK_DDR#0

V4

M_CLK_DDR0

AD9

DDR_CKE0_DIMMA

U3

M_CLK_DDR#1

V3

M_CLK_DDR1

AC9

DDR_CKE1_DIMMA

U2 V2 AD8 U1 V1 AC8

M7

DDR_CS0_DIMMA#

L9

DDR_CS1_DIMMA#

M9 M10 M8

M_ODT0

L7

M_ODT1

L8 L10 V5

DDR_A_BS0

U5

DDR_A_BS1

AD1

DDR_A_BS2

V10 U6

DDR_A_RAS#

U7

DDR_A_WE#

U8

DDR_A_CAS#

V8

DDR_A_MA0

AC6

DDR_A_MA1

V9

DDR_A_MA2

U9

DDR_A_MA3

AC5

DDR_A_MA4

AC4

DDR_A_MA5

AD6

DDR_A_MA6

AC3

DDR_A_MA7

AD5

DDR_A_MA8

AC2

DDR_A_MA9

V6

DDR_A_MA10

AC1

DDR_A_MA11

AD4

DDR_A_MA12

V7

DDR_A_MA13

AD3

DDR_A_MA14

AD2

DDR_A_MA15

AP15

DDR_A_DQS#0

AP8

DDR_A_DQS#1

AJ8

DDR_A_DQS#2

AF3

DDR_A_DQS#3

J3

DDR_A_DQS#4

E2

DDR_A_DQS#5

C5

DDR_A_DQS#6

C11

DDR_A_DQS#7

AP14

DDR_A_DQS0

AP9

DDR_A_DQS1

AK8

DDR_A_DQS2

AG3

DDR_A_DQS3

H3

DDR_A_DQS4

E3

DDR_A_DQS5

C6

DDR_A_DQS6

C12

DDR_A_DQS7

T12T12

M_CLK_DDR#0 <11> M_CLK_DDR0 <11> DDR_CKE0_DIMMA <11> M_CLK_DDR#1 <11> M_CLK_DDR1 <11> DDR_CKE1_DIMMA <11>

DDR_CS0_DIMMA# <11> DDR_CS1_DIMMA# <11>

M_ODT0 <11> M_ODT1 <11>

DDR_A_BS0 <11> DDR_A_BS1 <11> DDR_A_BS2 <11>

DDR_A_RAS# <11> DDR_A_WE# <11> DDR_A_CAS# <11>

DDR_A_MA[0..15] <11>

DDR_A_DQS#[0..7] <11>

DDR_A_DQS[0..7] <11>

3

DDR_B_D[0..63]<12>

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

AR18 AT18 AM17 AM18 AR17 AT17 AN17 AN18 AT12 AR12 AN12 AM11 AT11 AR11 AM12 AN11

AR5 AR6 AM5 AM6 AT5 AT6 AN5 AN6

AJ4

AK4

AJ1

AJ2 AM1 AN1 AK2 AK1

L2

M2

L4

M4

L1

M1

L5 M5 G7

J8 G8 G9

J7

J9

G10

J10

A8 B8

A9 B9 D8 E8 D9 E9

E15 D15 A15 B15 E14 D14 A14 B14

JCPU1D

SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63

I

NTEL_HASWELL_HASWELL

ME@

2

Haswell rPGA EDS

SB_CKN0

SB_CK0

SB_CKE_0

SB_CKN1

SB_CK1

SB_CKE_1

SB_CKN2

SB_CK2

SB_CKE_2

SB_CKN3

SB_CK3

SB_CKE_3

SB_CS_N_0 SB_CS_N_1 SB_CS_N_2 SB_CS_N_3

SB_ODT_0 SB_ODT_1 SB_ODT_2 SB_ODT_3

SB_BS_0 SB_BS_1 SB_BS_2

SB_RAS

SB_CAS

SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14 SB_MA_15

SB_DQS_N_0 SB_DQS_N_1 SB_DQS_N_2 SB_DQS_N_3 SB_DQS_N_4 SB_DQS_N_5 SB_DQS_N_6 SB_DQS_N_7 SB_DQS_P_0 SB_DQS_P_1 SB_DQS_P_2 SB_DQS_P_3 SB_DQS_P_4 SB_DQS_P_5 SB_DQS_P_6 SB_DQS_P_7

4 OF 9

RSVD

SB_WE

VSS

AG8 Y4

M_CLK_DDR#2

AA4

M_CLK_DDR2

AF10

DDR_CKE2_DIMMB

Y3

M_CLK_DDR#3

AA3

M_CLK_DDR3

AG10

DDR_CKE3_DIMMB

Y2 AA2 AG9 Y1 AA1 AF9

P4

DDR_CS2_DIMMB#

R2

DDR_CS3_DIMMB#

P3 P1

R4

M_ODT2

R3

M_ODT3

R1 P2 R7

DDR_B_BS0

P8

DDR_B_BS1

AA9

DDR_B_BS2

R10 R6

DDR_B_RAS#

P6

DDR_B_WE#

P7

DDR_B_CAS#

R8

DDR_B_MA0

Y5

DDR_B_MA1

Y10

DDR_B_MA2

AA5

DDR_B_MA3

Y7

DDR_B_MA4

AA6

DDR_B_MA5

Y6

DDR_B_MA6

AA7

DDR_B_MA7

Y8

DDR_B_MA8

AA10

DDR_B_MA9

R9

DDR_B_MA10

Y9

DDR_B_MA11

AF7

DDR_B_MA12

P9

DDR_B_MA13

AA8

DDR_B_MA14

AG7

DDR_B_MA15

AP18

DDR_B_DQS#0

AP11

DDR_B_DQS#1

AP5

DDR_B_DQS#2

AJ3

DDR_B_DQS#3

L3

DDR_B_DQS#4

H9

DDR_B_DQS#5

C8

DDR_B_DQS#6

C14

DDR_B_DQS#7

AP17

DDR_B_DQS0

AP12

DDR_B_DQS1

AP6

DDR_B_DQS2

AK3

DDR_B_DQS3

M3

DDR_B_DQS4

H8

DDR_B_DQS5

C9

DDR_B_DQS6

C15

DDR_B_DQS7

T13T13

1

M_CLK_DDR#2 <12> M_CLK_DDR2 <12> DDR_CKE2_DIMMB <12> M_CLK_DDR#3 <12> M_CLK_DDR3 <12> DDR_CKE3_DIMMB <12>

DDR_CS2_DIMMB# <12> DDR_CS3_DIMMB# <12>

M_ODT2 <12> M_ODT3 <12>

DDR_B_BS0 <12> DDR_B_BS1 <12> DDR_B_BS2 <12>

DDR_B_RAS# <12> DDR_B_WE# <12> DDR_B_CAS# <12>

DDR_B_MA[0..15] <12>

DDR_B_DQS#[0..7] <12>

DDR_B_DQS[0..7] <12>

CPI DRIVER VREF PATH IS DEFAULT

*M3+M1:Default Recommendation

B B

A A

5

4

M1:VREF_DQ driven by a voltage Divider Network during Processor power-off state. M3:VREF_DQ driven by Processor.

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

PROCESSOR(3/7) DDRIII

Size Document Number Rev

Custom

LA-9641P

Date: Sheet of

6 60Wednesday, October 03, 2012

1

0.1

5

D D

4

3

2

1

COMPENSATION PU FOR eDP

+VCOMP_OUT

EDP_COMP

Note: Trace width=20 mils ,Spacing=25mil,

EDP_AUXN EDP_AUXP

EDP_HPD

FDI_TXN_0

FDI_TXP_0

FDI_TXN_1

FDI_TXP_1

DDI

8 OF 9

Max length=100 mils.

M27

EDP_CPU_AUX#

N27

EDP_CPU_AUX

P27

EDP_HPD#

E24

EDP_COMP

R27

P35

EDP_CPU_LANE_N0

R35

EDP_CPU_LANE_P0

N34

EDP_CPU_LANE_N1

P34

EDP_CPU_LANE_P1

P33

FDI_CTX_PRX_N0

R33

FDI_CTX_PRX_P0

N32

FDI_CTX_PRX_N1

P32

FDI_CTX_PRX_P1

T14T14

HPD INVERSION FOR EDP

Haswell rPGA EDS

1 2

HDMI D2

HDMI D1

HDMI D0

C C

HDMI CLK

HDMI

HDMI_TX2-_CK<25> HDMI_TX2+_CK<25> HDMI_TX1-_CK<25> HDMI_TX1+_CK<25> HDMI_TX0-_CK<25> HDMI_TX0+_CK<25> HDMI_CLK-_CK<25> HDMI_CLK+_CK<25>

C48 0.1U_0402_10V6KHDMI@ C48 0.1U_0402_10V6KHDMI@

1 2

C41 0.1U_0402_10V6KHDMI@ C41 0.1U_0402_10V6KHDMI@

1 2

C42 0.1U_0402_10V6KHDMI@ C42 0.1U_0402_10V6KHDMI@

1 2

C43 0.1U_0402_10V6KHDMI@ C43 0.1U_0402_10V6KHDMI@

1 2

C44 0.1U_0402_10V6KHDMI@ C44 0.1U_0402_10V6KHDMI@

1 2

C45 0.1U_0402_10V6KHDMI@ C45 0.1U_0402_10V6KHDMI@

1 2

C46 0.1U_0402_10V6KHDMI@ C46 0.1U_0402_10V6KHDMI@

1 2

C47 0.1U_0402_10V6KHDMI@ C47 0.1U_0402_10V6KHDMI@

TMDS_B_DATA2#_PCH TMDS_B_DATA2_PCH TMDS_B_DATA1#_PCH TMDS_B_DATA1_PCH TMDS_B_DATA0#_PCH TMDS_B_DATA0_PCH TMDS_B_CLK#_PCH TMDS_B_CLK_PCH

Place on connector side

T28

DDIB_TXBN_0

U28

DDIB_TXBP_0

T30

DDIB_TXBN_1

U30

DDIB_TXBP_1

U29

DDIB_TXBN_2

V29

DDIB_TXBP_2

U31

DDIB_TXBN_3

V31

DDIB_TXBP_3

T34

DDIC_TXCN_0

U34

DDIC_TXCP_0

U35

DDIC_TXCN_1

V35

DDIC_TXCP_1

U32

DDIC_TXCN_2

T32

DDIC_TXCP_2

U33

DDIC_TXCN_3

V33

DDIC_TXCP_3

P29

DDID_TXDN_0

R29

DDID_TXDP_0

N28

DDID_TXDN_1

P28

DDID_TXDP_1

P31

DDID_TXDN_2

R31

DDID_TXDP_2

N30

DDID_TXDN_3

P30

DDID_TXDP_3

INTEL_HASWELL_HAS WELL

ME@

JCPU1H

eDP

EDP_RCOMP

EDP_DISP_UT IL

EDP_TXN_0 EDP_TXP_0 EDP_TXN_1 EDP_TXP_1

12

R6024.9_0402_1% R6024.9_0402_1%

EDP_CPU_AUX# <22> EDP_CPU_AUX <22>

EDP_CPU_LANE_N0 <22>

EDP_CPU_LANE_P0 <22>

FDI_CTX_PRX_N0 <14>

FDI_CTX_PRX_P0 <14>

FDI_CTX_PRX_N1 <14>

FDI_CTX_PRX_P1 <14>

+VCCIO_OUT

10K_0402_5%

RC1

1 2

B B

R458

1 2

1K_0402_5%

TL_HPD<22>

1K_0402_5%

100K_0402_5%

12

R61

@

2

1

OUT

IN

GND

DTC124EKAT146_SC59-3

3

EDP_HPD#

Q6

HPD is a active high signal from device. The HPD processor input is a low voltage active signal.

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

PROCESSOR(2/7) PM,XDP,CLK

Size Document Number Rev

Custom

LA-9641P

Date: Sheet of

2

Date: Sheet

1

7 60Wednesday, October 03, 2012

0.1

of

5

4

3

2

1

CFG Straps for Processor

CFG2

12

R62

R62 1K_0402_1%

1K_0402_1%

@

D D

PEG Static Lane Reversal - CFG2 is for the 16x

CFG2

Haswell rPGA EDS

AT1

RSVD_TP

AT2

RSVD_TP

AD10

RSVD

A34

RSVD_TP

A35

RSVD_TP

W29

RSVD_TP

W28

RSVD_TP

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7

G26

TESTLO_G26

W33

RSVD

AL30

RSVD

AL29

RSVD

F25

VCC

C35

RSVD_TP

B35

RSVD_TP

AL25

RSVD_TP

W30

RSVD_TP

W31

RSVD_TP

W34

TESTLO

AT20

CFG_0

AR20

CFG_1

AP20

CFG_2

AP22

CFG_3

AT22

CFG_4

AN22

CFG_5

AT25

CFG_6

AN23

CFG_7

AR24

CFG_8

AT23

CFG_9

AN20

CFG_10

AP24

CFG_11

AP26

CFG_12

AN25

CFG_13

AN26

CFG_14

AP25

CFG_15

INTEL_HASWELL_HAS WELL

ME@

H_CPU_RSVD

C C

B B

1 2

H_CPU_TESTLO

CFG_RCOMP

H_CPU_RSVD

R64 49.9_0402_1%R64 49.9_0402_1%

R309 49.9_0402_1%R309 49.9_0402_1%

R66 49.9_0402_1%R66 49.9_0402_1%

+CPU_CORE

T16T16 T17T17

T18T18

H_CPU_TESTLO

JCPU1I

RSVD_TP RSVD_TP RSVD_TP RSVD_TP

CFG_RCOMP

CFG_16 CFG_18 CFG_17 CFG_19

RSVD

FC_G6

RSVD RSVD RSVD RSVD RSVD

RSVD

RSVD RSVD

RSVD

RSVD_TP

RSVD_TP RSVD_TP

RSVD RSVD

VSS VSS

9 OF 9

C23 B23 D24 D23

AT31

CFG_RCOMP

AR21

CFG16

AR23 AP21 AP23

AR33 G6 AM27 AM26 F5 AM2 K6

E18

U10 P10

B1

NC

A2 AR1

E21 E20

AP27 AR26

AL31 AL32

T19T19

@ R51

@

2K_0402_1%

@ R52

@

1K_0402_1%

12

R51

R52

1 2

PCH_PWROK <14,32>

Embedded Display Port Presence Strap

PCIE Port Bifurcation Straps

CFG[6:5]

*

CFG4

*

@ R67

@

1K_0402_1%

11: (Default) x16 - Device 1 functions 1 and 2 disabled

10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled

*

01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)

00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

@

1: Normal Operation; Lane # definition matches socket pin map definition

0:Lane Reversed

12

R63

R63 1K_0402_1%

1K_0402_1%

1 : Disabled; No Physical Display Port attached to Embedded Display Port

0 : Enabled; An external Display Port device is connected to the Embedded Display Port

CFG6

CFG5

12

R67

R68

@R68

@

1K_0402_1%

CFG7

12

R69

@R69

@

1K_0402_1%

PEG DEFER TRAINING

CFG7

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

1: (Default) PEG Train immediately following xxRESETB de assertion

*

0: PEG Wait for BIOS for training

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(4/7) RSVD,CFG

LA-9641P

0.1

8 60Wednesday, October 03, 2012

1

8 60Wednesday, October 03, 2012

0.1

5

4

3

2

1

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

VCC VCC VCC VCC

VCC VCC

AA26 AA28 AA34 AA30 AA32 AB26 AB29 AB25 AB27 AB28 AB30 AB31 AB33 AB34 AB32 AC26 AB35 AC28 AD25 AC30 AD28 AC32 AD31 AC34 AD34 AD26 AD27 AD29 AD30 AD32 AD33 AD35 AE26 AE32 AE28 AE30 AG28 AG34 AE34 AF25 AF26 AF27 AF28 AF29 AF30 AF31 AF32 AF33 AF34 AF35 AG26 AH26 AH29 AG30 AG32 AH32 AH35 AH25 AH27 AH28 AH30 AH31 AH33 AH34 AJ25 AJ26 AJ27 AJ28 AJ29 AJ30 AJ31 AJ32 AJ33 AJ34 AJ35 G25 H25 J25 K25 L25 M25 N25 P25 R25 T25

U25 U26 V25 V26

W26 W27

+CPU_CORE

Haswell rPGA EDS

JCPU1E

+CPU_CORE

AB11

AE11

AH11

W11

AL27 AK27

AL35

AN35

W32

AL16

AL13

AM28 AM29

AL28

AP35

AP34

AT35 AR35 AR32

AL26

AT34

AL22

AT33 AM21 AM25 AM22 AM20 AM24

AL19 AM23

AT32

K27 L27 T27 V27

AB2 AB5 AB8

AE2 AE5 AE8

K11 N11

N8

T11

T2 T5 T8

W2 W5 W8

N26 K26

E17

A23 F22

J27

H27

Y25 Y26 Y27 Y28 Y29 Y30 Y31 Y32 Y33 Y34 Y35

RSVD RSVD RSVD RSVD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

RSVD VCC RSVD RSVD

VCC_SENSE RSVD VCCIO_OUT RSVD VCOMP_OUT RSVD RSVD RSVD RSVD

VIDALERT VIDSCLK VIDSOUT

VSS PWR_DEBUG VSS RSVD_TP RSVD_TP RSVD_TP RSVD_TP VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

ME@

I

NTEL_HASWELL_HASWELL

5 OF 9

+1.35V_CPU_VDDQ Source

R87

R87 130_0402_1%

130_0402_1%

+1.35V

+1.05VS

C51

@C51

@

0.1U_0402_10V6K

1 2

C49

0.1U_0402_10V6K

1 2

@

+CPU_CORE

+VCCIO_OUT

+VCOMP_OUT

R88

150_0402_1%

10K_0402_5%

12

R89

D D

VCCSENSE

VSSSENSE

+CPU_CORE

100_0402_1%

12

100_0402_1%

12

R79

R84

VCC_SENSE

Note: 0 ohm Resistor should be placed cloose to CPU

C C

VCCSENSE<44>

VSSSENSE<10,44>

+1.35V +1.35V_CPU_VDDQ

J1

@J1

@

1 2

PAD-OPEN 4x4m

+1.05VS

R78 0_0603_5%@R78 0_0603_5%@

RESISTOR STUFFING OPTIONS ARE PROVIDED FOR TESTING PURPOSES

12

+VCCIO_OUT

1

2

@

C53

4.7U_0402_6.3V6M

VR_SVID_ALRT#<44> VR_SVID_CLK<44> VR_SVID_DAT<44>

Note: Place the UP resistor close to CPU

+VCCIO_OUT

Note: Place the UP resistor close to CPU

12

R81

R81 75_0402_1%

75_0402_1%

1 2

R83 43_0402_5%R83 43_0402_5%

+VCCIO_OUT

12

+1.35V_CPU_VDDQ

VCCSENSE

H_CPU_SVIDALRT#

T23T23

@

1 2

VDDQ DECOUPLING

+1.35V_CPU_VDDQ

10U_0603_6.3V6M

C54

1

B B

1

2

22U_0805_6.3V6M

1

2

10U_0603_6.3V6M

C55

C56

1

2

22U_0805_6.3V6M

C61

C60

1

2

10U_0603_6.3V6M

C57

C58

1

+

C59

C59 330U_2.5V_M

2

22U_0805_6.3V6M

C62

1

2

330U_2.5V_M

2

22U_0805_6.3V6M

C63

C64

1

2

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Title

PROCESSOR(6/7) PWR

Size Document Number Rev

Custom

LA-9641P

Date: Sheet of

2

Date: Sheet of

1

9 60Wednesday, October 03, 2012

0.1

5

D D

C C

B B

AA11 AA25 AA27 AA31 AA29

AB10 AA33 AA35

AC25 AC27

AC11 AD11 AC29 AC31 AC33 AC35

AE10 AE25 AE29

AE27 AE35

AF11

AG11 AG25 AE31 AG31 AE33

AH10

AG27 AG29

AG33 AG35

AJ11

AK11 AK25 AK26 AK28 AK29 AK30 AK32

AB1

AB3

AB4 AB6 AB7 AB9

AD7 AE1

AE3

AE4 AE6 AE7 AE9

AF6 AF8

AG6 AH1

AH2

AH3

AH4 AH5 AH6 AH7 AH8 AH9

E19

A10 A13 A16 A19 A22 A25 A27 A29

A3 A31 A33

A4

A7

AJ5

4

Haswell rPGA EDS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

I

ME@

JCPU1F

NTEL_HASWELL_HA SWELL

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

6 OF 9

AK34 AK5 AL1 AL10 AL11 AL12 AL14 AL15 AL17 AL18 AL2 AL20 AL21 AL23 E22 AL3 AL4 AL5 AL6 AL7 AL8 AL9 AM10 AM13 AM16 AM19 E25 AM32 AM4 AM7 AN10 AN13 AN16 AN19 AN2 AN21 AN24 AN27 AN30 AN34 AN4 AN7 AP1 AP10 AP13 AP16 AP19 AP4 AP7 W25 AR10 AR13 AR16 AR19 AR2 AR22 AR25 AR28 AR31 AR34 AR4 AR7 AT10 AT13 AT16 AT19 AT21 AT24 AT27 AT3 AT30 AT4 AT7 B10 B13 B16 B19 B2 B22

3

Haswell rPGA EDS

B34

VSS

B4

VSS

B7

VSS

C1

VSS

C10

VSS

C13

VSS

C16

VSS

C19

VSS

C2

VSS

C22

VSS

C24

VSS

C26

VSS

C28

VSS

C30

VSS

C32

VSS

C34

VSS

C4

VSS

C7

VSS

D10

VSS

D13

VSS

D16

VSS

D19

VSS

D22

VSS

D25

VSS

D27

VSS

D29

VSS

D31

VSS

D33

VSS

D35

VSS

D4

VSS

D7

VSS

E1

VSS

E10

VSS

E13

VSS

E16

VSS

E4

VSS

E7

VSS

F10

VSS

F11

VSS

F12

VSS

F14

VSS

F15

VSS

F17

VSS

F18

VSS

F20

VSS

F21

VSS

F23

VSS

F24

VSS

F26

VSS

F28

VSS

F30

VSS

F32

VSS

F34

VSS

F4

VSS

F6

VSS

F7

VSS

F8

VSS

F9

VSS

G1

VSS

G11

VSS

G2

VSS

G27

VSS

G29

VSS

G3

VSS

G31

VSS

G33

VSS

G35

VSS

G4

VSS

G5

VSS

H10

VSS

H26

VSS

H6

VSS

H7

VSS

J11

VSS

J26

VSS

J28

VSS

J30

VSS

J32

VSS

J34

VSS

J6

VSS

K1

VSS

I

NTEL_HASWELL_HA SWELL

ME@

JCPU1G

2

VSS_SENSE

RSVD

7 OF 9

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

K10 K2 K29 K3 K31 K33 K35 K4 K5 K7 K8 K9 L11 L26 L6 M11 M26 M28 M30 M32 M34 M6 N1 N10 N2 N29 N3 N31 N33 N35 N4 N5 N6 N7 N9 P11 P26 P5 R11 R26 R28 R30 R32 R34 R5 T1 T10 T29 T3 T31 T33 T35 T4 T6 T7 T9 U11 U27 V11 V28 V30 V32 V34 W1 W10 W3 W35 W4 W6 W7 W9 Y11 H11 AL24 F19 T26 AK35 AK33

VSSSENSE <44,9>

T15T15

1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

PROCESSOR(7/7) VSS

Size Document Number Rev

Custom

LA-9641P

Date: Sheet of

2

Date: Sheet of

1

10 60Wednesday, October 03, 2012

0.1

5

+1.35V +1.35V

3A@1.5V

3A@1.5V3A@1.5V

DDR3 SO-DIMM A

JDIMM1

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z C65

C65

1

2

+3V_DIMM

0.1U_0402_10V6K

0.1U_0402_10V6K C87

C87

1

2

5

1

2

@

R141

R141 0_0402_5%

0_0402_5%

R137

R137 0_0402_5%

0_0402_5%

@

DDR_CKE0_DIMMA<6>

DDR_A_BS2<6>

M_CLK_DDR0<6> M_CLK_DDR#0<6>

DDR_A_BS0<6>

DDR_A_WE#<6> DDR_A_CAS#<6>

DDR_CS1_DIMMA#<6>

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z C86

C86

1

@

2

D D

C C

B B

+3VS

1 2

+3V_DIMM

+3VALW

A A

+VREF_DQ_DIMMA

0.1U_0402_10V6K

DDR_A_D0

C66

DDR_A_D1

DDR_A_DM0

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_DM3

DDR_A_D26 DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS2

DDR_A_MA12 DDR_A_MA9

DDR_A_MA8 DDR_A_MA5

DDR_A_MA3 DDR_A_MA1

M_CLK_DDR0 M_CLK_DDR#0

DDR_A_MA10 DDR_A_BS0

DDR_A_WE# DDR_A_CAS# M_ODT0

DDR_A_MA13 DDR_CS1_DIMMA#

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_DM5

DDR_A_D42 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_DM7

DDR_A_D58 DDR_A_D59

JDIMM1

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2 DQS247VSS17

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1 VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

FOX_AS0A626-U8SN-7F

ME@

VREF_CA

EVENT#

VSS3

DQS#0

DQS0 VSS6

VSS8 DQ12 DQ13

VSS10

DM1

DQ14 DQ15

DQ20 DQ21

DM2

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44

DQ45 VSS35 DQS#5

DQS5 VSS38

DQ46

DQ47 VSS40

DQ52

DQ53 VSS42

DM6

VSS43

DQ54

DQ55 VSS45

DQ60

DQ61 VSS47 DQS#7

DQS7 VSS50

DQ62

DQ63 VSS52

SDA

VTT2

4

DDR_A_D[0..63]<6>

DDR_A_DQS[0..7]<6>

1

2

+VREF_CA

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z C68

C68

@

DDR_A_DQS#[0..7]<6>

DDR_A_MA[0..15]<6>

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

DDR_A_D4 DDR_A_D5

DDR_A_DQS#0 DDR_A_DQS0

DDR_A_D6 DDR_A_D7

DDR_A_D12 DDR_A_D13

DDR_A_DM1 DDR3_DRAMRST#

DDR_A_D14 DDR_A_D15

DDR_A_D20 DDR_A_D21

DDR_A_DM2

DDR_A_D22 DDR_A_D23

DDR_A_D28 DDR_A_D29

DDR_A_DQS#3 DDR_A_DQS3

DDR_A_D30 DDR_A_D31

DDR_CKE1_DIMMA

DDR_A_MA15 DDR_A_MA14

DDR_A_MA11 DDR_A_MA7

DDR_A_MA6 DDR_A_MA4

DDR_A_MA2 DDR_A_MA0

M_CLK_DDR1 M_CLK_DDR#1

DDR_A_BS1 DDR_A_RAS#

DDR_CS0_DIMMA#

M_ODT1

DDR_A_D36 DDR_A_D37

DDR_A_DM4

DDR_A_D38 DDR_A_D39

DDR_A_D44 DDR_A_D45

DDR_A_DQS#5 DDR_A_DQS5

DDR_A_D46 DDR_A_D47

DDR_A_D52 DDR_A_D53

DDR_A_DM6

DDR_A_D54 DDR_A_D55

DDR_A_D60 DDR_A_D61

DDR_A_DQS#7 DDR_A_DQS7

DDR_A_D62 DDR_A_D63

SMB_DATA_S3 SMB_CLK_S3

4

+0.675VS

0.65A@0.75V

0.65A@0.75V0.65A@0.75V

DDR3_DRAMRST# <12,5>

DDR_CKE1_DIMMA <6>

M_CLK_DDR1 <6> M_CLK_DDR#1 <6>

DDR_A_BS1 <6> DDR_A_RAS# <6>

DDR_CS0_DIMMA# <6> M_ODT0 <6>

M_ODT1 <6>

0.1U_0402_10V6K

0.1U_0402_10V6K C67

C67

1

2

SMB_DATA_S3 <12,16,26> SMB_CLK_S3 <12,16,26>

DQ4 DQ5

DQ6 DQ7

A15 A14

A11

A7

A6 A4

A2 A0

CK1

BA1

S0#

NC2

SCL

G2

3

+VREF_DQ_DIMMA_R

1

C39

0.022U_0402_16V7K

2

12

+VREF_CA_R+1.35V

12

R40

1K_0402_1%

+VREF_CA

12

R44

1K_0402_1%

+VREF_CA <12>

Layout Note: Place near DIMM

1U_0402_6.3V6K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

12

R472_0402_5% R472_0402_5%

1

C37

0.022U_0402_16V7K

2

12

R45

24.9_0402_1%

Layout Note: Place near DIMM

C70

10U_0603_6.3V6M@C70

10U_0603_6.3V6M

C69

10U_0603_6.3V6M@C69

10U_0603_6.3V6M

1

@

2

@

C85

1U_0402_6.3V6K@C85

1U_0402_6.3V6K

C84

1U_0402_6.3V6K

C84

1U_0402_6.3V6K

1

2

Compal Secret Data

1

2

1

2

1

@

2

+0.675VS

@

C82

C83

1U_0402_6.3V6K@C83

1U_0402_6.3V6K

1

2

2011/06/15 2012/07/11

2

1 2

R48 2_0402_5%R48 2_0402_5%

R54

24.9_0402_1%

Note: VREF trace width:20 mils at least Spacing:20mils to other signal/planes Place near DIMM scoket

OSCAN

(220uF_6.3V_4.2L_ESR17m)*1=(SF000002Y00)

(10uF_0603_6.3V)*8

(0.1uF_402_10V)*4

+1.35V

C72

10U_0603_6.3V6M

C72

10U_0603_6.3V6M

C73

10U_0603_6.3V6M

C73

1

2

1

2

DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7

10U_0603_6.3V6M

1

2

Layout Note: Place near DIMM

C71

10U_0603_6.3V6M

C71

10U_0603_6.3V6M

Deciphered Date

+1.35V

10U_0603_6.3V6M

12

R50

R50 1K_0402_1%

1K_0402_1%

12

R53

R53 1K_0402_1%

1K_0402_1%

C74

1

2

+VREF_DQ_DIMMA

C75

10U_0603_6.3V6M

C75

10U_0603_6.3V6M

1

Note: VREF trace width:20 mils at least Spacing:20mils to other signal/planes Place near DIMM scoket

C79

0.1U_0402_10V6K

C79

C76

10U_0603_6.3V6M

C76

10U_0603_6.3V6M

C77

0.1U_0402_10V6K

C77

0.1U_0402_10V6K

1

2

Title

Size Document Number Rev

Custom

Date: Sheet of

0.1U_0402_10V6K

C80

0.1U_0402_10V6K

C80

C78

0.1U_0402_10V6K

C78

0.1U_0402_10V6K

1

2

Compal Electronics, Inc.

0.1U_0402_10V6K

1

2

LA-7981P

1

+

2

1

2

DDRIII-SODIMM SLOT1

EVT Check

C81

@+C81

@

220U_6.3V_M

11 60Wednesday, October 03, 2012

2.0

5

3A@1.35V

3A@1.35V3A@1.35V

JDIMM2

+VREF_DQ_DIMMB

2.2U_0603_6.3V4Z

0.1U_0402_10V6K

@

1

C88

D D

C C

B B

+3V_DIMM

A A

2

DDR_CKE2_DIMMB<6>

DDR_B_BS2<6>

M_CLK_DDR2<6> M_CLK_DDR#2<6>

DDR_B_BS0<6>

DDR_B_WE#<6> DDR_B_CAS#<6>

DDR_CS3_DIMMB#<6>

C109

0.1U_0402_10V6K

C109

0.1U_0402_10V6K

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z C108

C108

1

@

2

5

DDR_B_D0 DDR_B_D1

DDR_B_DM0

1

C89

DDR_B_D2 DDR_B_D3

2

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_DM3

DDR_B_D26 DDR_B_D27

DDR_CKE2_DIMMB

DDR_B_BS2

DDR_B_MA12 DDR_B_MA9

DDR_B_MA8 DDR_B_MA5

DDR_B_MA3 DDR_B_MA1

M_CLK_DDR2 M_CLK_DDR#2

DDR_B_MA10 DDR_B_BS0

DDR_B_WE# DDR_B_CAS#

DDR_B_MA13 DDR_CS3_DIMMB#

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_DM5

DDR_B_D42 DDR_B_D43

DDR_B_D48 DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51

DDR_B_D56 DDR_B_D57

DDR_B_DM7

DDR_B_D58 DDR_B_D59

1 2

+3VS

R93 10K_0402_5%R93 10K_0402_5%

JDIMM2

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2 DQS247VSS17

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1 VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

FOX_AS0A626-U4SN-7F

FOX_AS0A626-U4SN-7F M

M

4

+1.35V+1.35V

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

DDR_B_D4 DDR_B_D5

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D6 DDR_B_D7

DDR_B_D12 DDR_B_D13

DDR_B_DM1 DDR3_DRAMRST#

DDR_B_D14 DDR_B_D15

DDR_B_D20 DDR_B_D21

DDR_B_DM2

DDR_B_D22 DDR_B_D23

DDR_B_D28 DDR_B_D29

DDR_B_DQS#3 DDR_B_DQS3

DDR_B_D30 DDR_B_D31

DDR_CKE3_DIMMB

DDR_B_MA15 DDR_B_MA14

DDR_B_MA11 DDR_B_MA7

DDR_B_MA6 DDR_B_MA4

DDR_B_MA2 DDR_B_MA0

M_CLK_DDR3 M_CLK_DDR#3

DDR_B_BS1 DDR_B_RAS#

DDR_CS2_DIMMB# M_ODT2

M_ODT3

DDR_B_D36 DDR_B_D37

DDR_B_DM4

DDR_B_D38 DDR_B_D39

DDR_B_D44 DDR_B_D45

DDR_B_DQS#5 DDR_B_DQS5

DDR_B_D46 DDR_B_D47

DDR_B_D52 DDR_B_D53

DDR_B_DM6

DDR_B_D54 DDR_B_D55

DDR_B_D60 DDR_B_D61

DDR_B_DQS#7 DDR_B_DQS7

DDR_B_D62 DDR_B_D63

SMB_DATA_S3 SMB_CLK_S3

0.65A@0.675V

0.65A@0.675V0.65A@0.675V

DDR3_DRAMRST# <11,5>

DDR_CKE3_DIMMB <6>

M_CLK_DDR3 <6> M_CLK_DDR#3 <6>

DDR_B_BS1 <6> DDR_B_RAS# <6>

DDR_CS2_DIMMB# <6> M_ODT2 <6>

M_ODT3 <6>

2.2U_0603_6.3V4Z

0.1U_0402_10V6K

C90

1

2

SMB_DATA_S3 <11,16,26> SMB_CLK_S3 <11,16,26>

+0.675VS

C91

@

DQ4 DQ5

VSS3

DQS#0

DQS0

VSS6

DQ6

DQ7 VSS8 DQ12 DQ13

VSS10

DM1

DQ14 DQ15

DQ20 DQ21

DM2

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1 VDD2

A15 A14

VDD4

A11

A7

VDD6

A6 A4

VDD8

A2 A0

CK1

CK1#

VDD12

BA1

RAS#

VDD14

S0#

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35 DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

DM6

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47 DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

SDA

SCL

VTT2

G2

E@

4

3

DDR_B_D[0..63]<6>

DDR_B_DQS[0..7]<6>

DDR_B_DQS#[0..7]<6>

DDR_B_MA[0..15]<6>

Note: VREF trace width:20 mils at least Spacing:20mils to other signal/planes

Layout Note: Place near DIMM

+VREF_CA <11>

10U_0603_6.3V6M

C92

1

@

2

Layout Note: Place near DIMM

+0.675VS

@

C104

1U_0402_6.3V6K@C104

1U_0402_6.3V6K

1

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

C185

1

@

2

@

C106

1U_0402_6.3V6K@C106

1U_0402_6.3V6K

C105

1U_0402_6.3V6K

C105

1U_0402_6.3V6K

1

2

Compal Secret Data

C94

1

2

+VREF_DQ_DIMMB_R

R49 2_0402_5%R49 2_0402_5%

1

C40

0.022U_0402_16V7K

2

12

R59

24.9_0402_1%

(10uF_0603_6.3V)*8

(0.1uF_402_10V)*4

+1.35V

10U_0603_6.3V6M

C96

C95

1

2

C107

1U_0402_6.3V6K

C107

1U_0402_6.3V6K

1

2

Deciphered Date

2

1 2

10U_0603_6.3V6M

C97

1

2

DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7

Layout Note: Place near DIMM

1

+1.35V

12

R56

R56 1K_0402_1%

1K_0402_1%

+VREF_DQ_DIMMB

12

R58

R58 1K_0402_1%

1K_0402_1%

0.1U_0402_10V6K

10U_0603_6.3V6M

C98

1

2

0.1U_0402_10V6K

10U_0603_6.3V6M

C100

C99

C100

1

2

Title

Size Document Number Rev

Date: Sheet of

0.1U_0402_10V6K

1

2

C102

LA-7981P

0.1U_0402_10V6K C103

C103

1

2

1

0.1U_0402_10V6K

0.1U_0402_10V6K C101

C101

1

2

Compal Electronics, Inc.

DDRIII-SODIMM SLOT2

2.0

12 60Wednesday, October 03, 2012

2.0

5

1K_0402_5%

1 2

33_0804_8P4R_5%

R311

200_0402_1%

R123

R123 100_0402_1%

100_0402_1%

W=20milsW

+RTCBATT+RTCVCC

R94

SM_INTRUDER#

PCH_INTVRMEN

HDA_SYNC

PCH_GPIO33

HDA_SPKR HDA_SDIN0

+RTCVCC

1U_0603_10V4Z

1 2

R98 20K_0402_5%R98 20K_0402_5%

1 2

R99 20K_0402_5%R99 20K_0402_5%

1U_0603_10V4Z

C113

C115

1

2

1

2

ME FALSH

HDA_SDOUT<32>

HDA_SDOUT

+5VS

G

RP12

18 27 36 45

12

@

12

@

HDA_BIT_CLK HDA_SYNC_R HDA_RST# HDA_SDOUT

R121

200_0402_1%

R124

100_0402_1%

R115

1M_0402_5%@

1 2

DG remove Q10 on Version 1.5

2

S

@

1 2

R118

0_0402_5%

=20mils

1

C110

C110 1U_0603_10V4Z

D D

C C

B B

1U_0603_10V4Z

2

+RTCVCC

R96 1M_0402_5%R96 1M_0402_5%

R97 330K_0402_5%R97 330K_0402_5%

INTVRMEN

(INTEGRATED SUS 1.05V VR)

*

H

：：：：

L

：：：：

(INTVRMEN should always be pull high.)

+3V_PCH

R100 1K_0402_5%R100 1K_0402_5%

+3VS

R101 1K_0402_5%@R101 1K_0402_5%@

+3VS

R102 1K_0402_5%@R102 1K_0402_5%@

HIGH= Enable ( No Reboot )

*

LOW= Disable (Default)

+3V_PCH

R105 1K_0402_5%@R105 1K_0402_5%@

*

Low = Disabled (Default) High = Enabled [Flash Descriptor Security Override]

HDA_BITCLK_AUDIO<31>

HDA_SYNC_AUDIO<31> HDA_RST_AUDIO#<31>

HDA_SDOUT_AUDIO<31>

+3V_PCH +3V_PCH+3V_PCH

12

@

200_0402_1%

PCH_JTAG_TDO PCH_JTAG_TDIPCH_JTAG_TMS

12

100_0402_1%

@

12

CLRP1

SHORT PADS

1 2

Integrated VRM enable

Integrated VRM disable

12

1 2

12

R119

R122

12

@

12

@

4

Note: PCH_RTCX1/PCHRTCX2 Trace length <1000 mils

1

C111

18P_0402_50V8J

2

NOGCLK@

CLRP2

SHORT PADS

CLRP2

SHORT PADS

O

PEN SAVE ME RTC REGISTER

12

SHORT CLEAR ME RTC REGISTER

PCH_SRTCRST#

PCH_RTCRST#

CLRP3

SHORT PADS

CLRP3

SHORT PADS

12

OPEN SAVE CMOS

SHORT CLEAR CMOS

+3V_PCH

Q10

Q10 LBSS138LT1G_SOT-23-3

LBSS138LT1G_SOT-23-3

13

HDA_SYNC

D

1 2

R95 10M_0402_5%

NOGCLK@

Y1

1 2

NOGCLK@

CLRP2

CLRP3

HDA_SPKR<31>

HDA_SDIN0<31>

1 2

R104 1K_0402_1%@R104 1K_0402_1%@

1 2

R106 10K_0402_5%@R106 10K_0402_5%@

PCH_RTCX1

PCH_RTCX2

32.768KHZ_12.5PF_CM31532768DZFT

1

C112

C112 18P_0402_50V8J

18P_0402_50V8J

NOGCLK@

2

PCH_RTCX1

PCH_RTCX2

SM_INTRUDER#

PCH_INTVRMEN

HDA_BIT_CLK

HDA_SYNC

HDA_SPKR

HDA_RST#

HDA_SDOUT

PCH_GPIO33

PCH_GPIO13

12

PCH_JTAG_TCK

R110

51_0402_5%

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

@

1 2

R196

0_0402_5%

U4A

B5

RTCX1

B4

RTCX2

B9

SRTCRST#

A8

INTRUDER#

G10

INTVRMEN

D9

RTCRST#

B25

HDA_BCLK

A22

HDA_SYNC

AL10

SPKR

C24

HDA_RST#

L22

HDA_SDI0

K22

HDA_SDI1

G22

HDA_SDI2

F22

HDA_SDI3

A24

HDA_SDO

B17

DOCKEN#/GPIO33

C22

HDA_DOCK_RST#/GPIO13

AB3

JTAG_TCK

AD1

JTAG_TMS

AE2

JTAG_TDI

AD3

JTAG_TDO

F8

TP25

C26

TP22

AB6

TP20

D

H82LPMS-QC4C-A1_FCBGA695~D

GCLK_32K

3

LPT_PCH_M_EDS

JTAGRTC AZALIA

1 OF 11

GCLK_32K <34>

SATA

SATA_RXN_0 SATA_RXP_0

SATA_TXN_0 SATA_TXP_0

SATA_RXN_1 SATA_RXP_1

SATA_TXN_1 SATA_TXP_1

SATA_RXN_2 SATA_RXP_2

SATA_TXN_2 SATA_TXP_2

SATA_RXN_3 SATA_RXP_3

SATA_TXN_3 SATA_TXP_3

SATA_RXN4/PERN1 SATA_RXP4/PERP1

SATA_TXN4/PETN1 SATA_TXP4/PETP1

SATA_RXN5/PERN2 SATA_RXP5/PERP2

SATA_TXN5/PETN2 SATA_TXP5/PETP2

SATA_RCOMP

SATALED#

SATA0GP/GPIO21

SATA1GP/GPIO19

SATA_IREF

2

BC8 BE8

AW8 AY8

BC10 BE10

AV10 AW10

BB9 BD9

AY13 AW13

BC12 BE12

AR13 AT13

BD13 BB13

AV15 AW15

BC14 BE14

AP15 AR15

AY5

SATA_COMP

AP3

SATA_ACT#

AT1

HDD_DET#

AU2

BBS_BIT0_R

BD4

BA2

TP9

BB2

TP8

12

R108 10K_0402_5%R108 10K_0402_5%

HDD_DET# <18>

BBS_BIT0_R <18>

+1.5VS

HDD_DET# and BBS_BIT0_R pull high by 10P8R

SATA_DTX_C_PRX_N4

SATA_DTX_C_PRX_P4

SATA_PTX_C_DRX_N4 SATA_PTX_C_DRX_P4

SATA_DTX_C_PRX_N5 SATA_DTX_C_PRX_P5

SATA_PTX_C_DRX_N5 SATA_PTX_C_DRX_P5

+3VS

SATA_DTX_C_PRX_N4 <30>

SATA_DTX_C_PRX_P4 <30>

SATA_PTX_C_DRX_N4 <30> SATA_PTX_C_DRX_P4 <30>

SATA_DTX_C_PRX_N5 <30>

SATA_DTX_C_PRX_P5 <30>

SATA_PTX_C_DRX_N5 <30> SATA_PTX_C_DRX_P5 <30>

SATA Impedance Compensation

SATA_COMP

Note: Trace width:4mils Place the resistor to PCH <500 mils, to 1.5V <100 mils.Avoid routing next to clock pins.

1 2

1

HDD

SATA 6G

ODD

+1.5VS

R1077.5K_0402_1% R1077.5K_0402_1%

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

PCH (1/9) SATA,HDA,SPI, LPC, XDP

Size Document Number Rev

Custom

LA-9641P

Date: Sheet of

Date: Sheet

1

of

13 60Wednesday, October 03, 2012

0.1

5

4

3

2

1

+3VS

12

R126

R125

2.2K_04 02_5%

LPT_PCH_M_EDS

U4B

D D

C C

DMI_CTX_PRX _N0<4> DMI_CTX_PRX _N1<4>

DMI_CTX_PRX _N2<4> DMI_CTX_PRX _N3<4>

DMI_CTX_PRX _P0<4> DMI_CTX_PRX _P1<4>

DMI_CTX_PRX _P2<4> DMI_CTX_PRX _P3<4>

DMI_CRX_P TX_N0<4> DMI_CRX_P TX_N1<4>

DMI_CRX_P TX_N2<4> DMI_CRX_P TX_N3<4>

DMI_CRX_P TX_P0<4> DMI_CRX_P TX_P1<4>

DMI_CRX_P TX_P2<4> DMI_CRX_P TX_P3<4>

+1.5VS

SUSACK# is only used on platform that support the Deep Sx state.

+1.5VS

R135 7.5K_ 0402_1%R135 7.5 K_0402_1%

+3VS

ACIN<32,37,3 9>

R136 0_04 02_5%DS 3@R136 0_04 02_5%DS 3@

R148 0_04 02_5%DS 3@R148 0_04 02_5%DS 3@

D1 CH751H-40 PT_SOD323-2D1 CH751H-40 PT_SOD323-2

SUSACK#<32>

PCH_PW ROK<32,8 >

PM_DRAM_P WRGD<5>

EC_RSMRST#<32>

SUSWAR N#<32>

PBTN_OUT#<32>

AEPWROK can be connect to PWROK if iAMT disable

1 2

21

DMI_CTX_PRX _N0 DMI_CTX_PRX _N1

DMI_CTX_PRX _N2 DMI_CTX_PRX _N3

DMI_CTX_PRX _P0 DMI_CTX_PRX _P1

DMI_CTX_PRX _P2 DMI_CTX_PRX _P3

DMI_CRX_P TX_N0 DMI_CRX_P TX_N1

DMI_CRX_P TX_N2 DMI_CRX_P TX_N3

DMI_CRX_P TX_P0 DMI_CRX_P TX_P1

DMI_CRX_P TX_P2 DMI_CRX_P TX_P3

12

R13810K_0 402_5% R1 3810K_0402_ 5%

DMI_RCOMP

SUSACK#_ R

SYS_RST#

SYS_PW ROK

PCH_PW ROK

PM_DRAM_P WRGD

SUSWAR N#_R

AC_PRESE NT_R

PCH_GPIO 72

RI#

U4B

AW22

DMI_RXN_0

AR20

DMI_RXN_1

AP17

DMI_RXN_2

AV20

DMI_RXN_3

AY22

DMI_RXP_0

AP20

DMI_RXP_1

AR17

DMI_RXP_2

AW20

DMI_RXP_3

BD21

DMI_TXN_0

BE20

DMI_TXN_1

BD17

DMI_TXN_2

BE18

DMI_TXN_3

BB21

DMI_TXP_0

BC20

DMI_TXP_1

BB17

DMI_TXP_2

BC18

DMI_TXP_3

BE16

DMI_IREF

AW17

TP12

AV17

TP7

AY17

DMI_RCOMP

R6

SUSACK#

AM1

SYS_RESET#

AD7

SYS_PWROK

F10

PWROK

AB7

APWROK

H3

DRAMPWROK

J2

RSMRST#

J4

SUSWARN#/SUSPWRNACK/GPIO30

K1

PWRBTN#

E6

ACPRESENT/GPIO31

K7

BATLOW#/GPIO72

N4

RI#

AB10

TP21

D2

SLP_WLAN#/GPIO29

LPT_PCH_M_EDS

DMI

System Power

Management

D

H82LPMS-Q C4C-A1_FCBGA 695~D

FDI

FDI_RCOMP

DSWVRMEN

SUS_STAT#/GPIO61

SUSCLK/GPIO62

SLP_S5#/GPIO63

4 OF 11

FDI_RXN_0

FDI_RXN_1

FDI_RXP_0

FDI_RXP_1

TP16

TP15

TP10

FDI_CSYNC

FDI_INT

FDI_IREF

TP17

TP13

DPWROK

WAKE#

CLKRUN#

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

SLP_LAN#

AJ35

FDI_CTX_PRX _N0

AL35

FDI_CTX_PRX _N1

AJ36

FDI_CTX_PRX _P0

AL36

FDI_CTX_PRX _P1

AV43

AY45

TP5

AV45

AW44

AL39

FDI_CSYNC

AL40

FDI_INT

AT45

AU42

AU44

AR44

C8

L13

K3

AN7

U7

Y6

Y7

C6

H1

F3

F1

AY3

G5

1 2

FDI_RCOMP

R145 7.5K_ 0402_1%R14 5 7.5 K_0402_1%

DSWODV REN

NODS3@

1 2

PCH_DPW ROK EC_RSMRST#

PM_CLKRUN #

SUS_STAT#

SLP_A#

SLP_SUS #

H_PM_SYNC

R139 0_0402_5%

T20T20

T22T22

FDI_CTX_PRX _N0 <7>

FDI_CTX_PRX _N1 <7>

FDI_CTX_PRX _P0 <7>

FDI_CTX_PRX _P1 <7>

FDI_CSYNC <4>

FDI_INT <4 >

+1.5VS

SUSCLK <32>

PM_SLP_ S5# <32>

PM_SLP_ S4# <32>

PM_SLP_ S3# <32>

SLP_SUS # <32,36>

H_PM_SYNC <5>

PCIE_W AKE# <26,27>

PCH_DPW ROK

SLP_A# can be left NC when IAMT is not support on the platfrom

SLP_LAN# can be left NC if no use integrated LAN.

1 2

R149 0_04 02_5%DS 3@R149 0_04 02_5%DS 3@

DAC_BLU<24>

DAC_GRN<24>

DAC_RED<24>

2.2K_04 02_5%

CRT_DDC_CLK CRT_DDC_DATA

DAC_BLU

DAC_GRN

CRT_DDC_CLK<2 4>

CRT_DDC_DATA<24>

CRT_HSYNC<2 4>

CRT_VSYNC<24>

PCH_PW M<22>

DPWROK _EC <32>

BBS_BIT1

DAC_RED

1 2

R132 649 _0402_1%R132 649 _0402_1%

PCI_PIRQA #

PCI_PIRQB #

PCI_PIRQC #

PCI_PIRQD #

DGPU_HOL D_RST#

PCH_GPIO 52

DGPU_PW R_EN

BBS_BIT1

PCH_GPIO 53

T21T21

1 2

R182 10K_040 2_5%R182 10K_0 402_5%

1 2

R153 1K_04 02_5%@R153 1 K_0402_5%@

Boot BIOS Strap (GPIO51)

BBS_BIT1 Boot BIOS Location

SATA_SLPD (BBS_BIT0)

00 LPC

0 1 Reserved (NAND)

B B

U6

U6 MC74VHC1G 08DFT2G SC70 5P

MC74VHC1G 08DFT2G SC70 5P

3

VGATE<44>

PCH_PW ROK

SUSACK# and SUSWARN# can be tied together if EC does not want to involve in the handshake mechanism for the Deep Sleep state entry and exit.

A A

+3V_PCH

1

2

1 2

R169 0_04 02_5%@R1 69 0_0402_ 5%@

1 2

R173 200K_04 02_5%R173 200K_0 402_5%

R312 10K_040 2_5%R312 10K_0 402_5%

5

G

A

4

SYS_PW ROK

Y

B

P

5

+3VS

SUSACK#_ RSUSWAR N#_R

AC_PRESE NT_R

12

EC_RSMRST#

12

R157 100K_04 02_1%

100K_04 02_1%

SYS_PW ROK <5>

@R157

@

CLKRUN#: External pull up to core well is required.

+3VS

1 2

+3V_PCH

+3VALW

R172 8.2K_0402_5 %R172 8.2K_040 2_5%

12

R174 10K_0402_5%

@

4 5 3 6 2 7 1 8

RP10

10K_080 4_8P4R_5%

PM_CLKRUN #

4

SUSWAR N#_R

PCIE_W AKE# PCH_GPIO 72 RI#

+RTCVCC

12

DSWODV REN

DSWODVREN - On Die DSW VR Enable H：Enable (DEFAULT)

*

L：Disable

12

R134

R134 330K_04 02_5%

330K_04 02_5%

R143

R143 330K_04 02_5%

330K_04 02_5%

@

3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

1

PCH_GPIO 55

A16 swap overide Strap/Top-Block Swap Override ju mper

PCI_GNT3#

PCH_GPIO 55

0

11 SPI

GPIO51 has internal pull up.

1 2

R158 1K_04 02_5%@R158 1 K_0402_5%@

Low=A16 swap override/Top-Blo ck Swap Override en abled High=Default

1 2

R176 10K_040 2_5%R176 10K_0 402_5%

2011/06/15 2012/07/11

RP23

4 5 3 6 2 7 1 8

150_080 4_8P4R_5%

CRT_DDC_CLK

CRT_DDC_DATA

CRT_IREF

PCH_PW M

PCH_ENBK L

PCH_ENVDD

PCH_GPIO 55

PCI

*

GPIO55

*

Compal Secret Data

Deciphered Date

2

T45

U44

V45

M43

M45

N42

N44

U40

U39

N36

K36

G36

H20

L20

K17

M20

A12

B13

C12

C10

A10

AL6

+3VS

VGA_BLUE

VGA_GREEN

VGA_RED

VGA_DDC_CLK

VGA_DDC_DATA

VGA_HSYNC

VGA_VSYNC

DAC_IREF

VGA_IRTN

EDP_BKLTCTL

EDP_BKLTEN

EDP_VDDEN

PIRQA#

PIRQB#

PIRQC#

PIRQD#

GPIO50

GPIO52

GPIO54

GPIO51

GPIO53

GPIO55

+3VS

DAC_BLU DAC_GRN DAC_RED

Change PN

U4E

D

LPT_PCH_M_EDS

LVDSCRT

PCI

H82LPMS-Q C4C-A1_FCBGA 695~D

PLT_RST#<26,2 7,32>

R40

DDPB_CTRLCLK

DDPB_CTRLDATA

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPB_AUXN

DDPC_AUXN

DISPLAY

DDPD_AUXN

DDPB_AUXP

DDPC_AUXP

DDPD_AUXP

DDPB_HPD

DDPC_HPD

DDPD_HPD

PIRQE#/GPIO2

PIRQF#/GPIO3

PIRQG#/GPIO4

PIRQH#/GPIO5

5 OF 11

1U_0402 _6.3V4Z

PCH_GPIO 2 DGPU_PW R_EN ODD_DA#_ R

+3VS

Title

Size Doc ument Numb er Rev

Custom

Date: S heet of

HDMICLK_NB

R39

HDMIDAT_NB

R35

R36

N40

N38

H45

K43

J42

H43

K45

J44

K40

K38

H39

G17

PCH_GPIO 2

F17

ODD_DA#_ R

L15

PCH_GPIO 4

M15

PCH_GPIO 5

AD10

PCI_PME#

PME#

Y11

PCH_PLTRST#

PLTRST#

12

1

C117

@C117

@

2

PCI_PIRQA # PCI_PIRQB # PCI_PIRQC # PCI_PIRQD #

DGPU_HOL D_RST#

RP13

6 7 8 9

10

10K_120 6_10P8R_5 %

Compal Electronics, Inc.

PCH (2/9) PCIE, SMBUS, CLK

LA-9641P

TMDS_B_HPD# <2 5>

R140

1 2

0_0402_ 5%

1 2

R151

0_0402_ 5%

4

Y

R156

R156 100K_04 02_5%

100K_04 02_5%

5 4 3 2 1

1

HDMICLK_NB <25>

HDMIDAT_NB <25>

@R140

@

3

1

G

A

2

B

P

U5

@U5

@

5

MC74VHC1G 08DFT2G SC70 5P

+3VS

RP1

18 27 36 45

8.2K_08 04_8P4R_5 %

12

R167 10K_0 402_5%R167 10K_040 2_5%

12

R168 10K_0 402_5%

@

+3VS

PCH_GPIO 4 PCH_GPIO 5 PCH_GPIO 52

14 6 0W ednesday, October 0 3, 2012

ODD_DA# <3 0,32>

PCH_PLTRST#

+3VS

0.1

5

D D

4

3

R177 10K_0402_5%R177 10K_0402_5 %

12

+3V_PCH

2

1

PEG_CLKREQ#_R

LPT_PCH_M_EDS

U4C

1 2

LAN

WLAN

C C

+3V_PCH

B B

CLK_PCIE_LAN#< 27>

CLK_PCIE_LAN<27>

CLKREQ_LAN#<27>

CLK_PCIE_WLAN1#<26> CLK_PCIE_WLAN1<26>

CLKREQ_WLAN#<26>

4 5 3 6 2 7 1 8

RP9

10K_0804_8P4R_5%

PCH_GPIO26 PCH_GPIO44 PCH_GPIO45 PCH_GPIO46

R185 0_0402_5%R185 0_0402_5%

1 2

R187 0_0402_5%R187 0_0402_5%

R181 10K_0402_5%R181 10K_0402_5%

+3V_PCH

1 2

R313 0_0402_5%R313 0_0402_5%

1 2

R189 0_0402_5%R189 0_0402_5%

R184 10K_0402_5%R184 10K_0402_5 %

+3VS

+3V_PCH

CLK_PCI_EC<32>

12

R195 10K_0402_5%R195 10K_0402_5%

R201 10K_0402_5%R201 10K_0402_5%

CLK_PCIE_LAN#_R

CLK_PCIE_LAN_R

CLK_PCIE_WLAN1#_R CLK_PCIE_WLAN1_R

12

1 2

R20922_040 2_5% R20922_0402_5%

R21122_040 2_5% R21122_0402_5%

PCH_GPIO20

PCH_GPIO25

PCH_GPIO26

PCH_GPIO44

PCH_GPIO45

PCH_GPIO46

CLK_PCI_LPBACK_RCLK_PCI_LPBACK

CLK_PCI_EC_R

CLK_PCI_DB_R

Y43

CLKOUT_PCIE_N_0

Y45

CLKOUT_PCIE_P_0

AB1

PCIECLKRQ0#/GPIO73

AA44

CLKOUT_PCIE_N_1

AA42

CLKOUT_PCIE_P_1

AF1

PCIECLKRQ1#/GPIO18

AB43

CLKOUT_PCIE_N_2

AB45

CLKOUT_PCIE_P_2

AF3

PCIECLKRQ2#/GPIO20/SMI#

AD43

CLKOUT_PCIE_N_3

AD45

CLKOUT_PCIE_P_3

T3

PCIECLKRQ3#/GPIO25

AF43

CLKOUT_PCIE_N_4

AF45

CLKOUT_PCIE_P_4

V3

PCIECLKRQ4#/GPIO26

AE44

CLKOUT_PCIE_N5

AE42

CLKOUT_PCIE_P_5

AA2

PCIECLKRQ5#/GPIO44

AB40

CLKOUT_PCIE_N_6

AB39

CLKOUT_PCIE_P_6

AE4

PCIECLKRQ6#/GPIO45

AJ44

CLKOUT_PCIE_N_7

AJ42

CLKOUT_PCIE_P_7

Y3

PCIECLKRQ7#/GPIO46

AH43

CLKOUT_ITPXDP

AH45

CLKOUT_ITPXDP_P

D44

CLKOUT_33MHZ0

E44

CLKOUT_33MHZ1

B42

CLKOUT_33MHZ2

F41

CLKOUT_33MHZ3

A40

CLKOUT_33MHZ4

D

H82LPMS-QC4C-A1_FCBGA695~D

LPT_PCH_M_EDS

CLOCK SIGNAL

CLKOUT_PEG_A

CLKOUT_PEG_A_P

PEGA_CLKRQ#/GPIO47

CLKOUT_PEG_B

CLKOUT_PEG_B_P

PEGB_CLKRQ#/GPIO56

CLKOUT_DMI

CLKOUT_DMI_P

CLKOUT_DP

CLKOUT_DP_P

CLKOUT_DPNS

CLKOUT_DPNS_P

CLKIN_DMI

CLKIN_DMI_P

CLKIN_GND

CLKIN_GND_P

CLKIN_DOT96N

CLKIN_DOT96P

CLKIN_SATA

CLKIN_SATA_P

REFCLK14IN

CLKIN_33MHZLOOPBACK

XTAL25_IN

XTAL25_OUT

CLKOUTFLEX0/GPIO64

CLKOUTFLEX1/GPIO65

CLKOUTFLEX2/GPIO66

CLKOUTFLEX3/GPIO67

ICLK_IREF

TP19 TP18

DIFFCLK_BIASREF

2 OF 11

AB35

CLK_PCIE_VGA#_R

AB36

CLK_PCIE_VGA_R

AF6

PEG_CLKREQ#_R

Y39

Y38

U4

PCH_GPIO56

AF39

CLK_CPU_DMI#

AF40

CLK_CPU_DMI

AJ40

CLK_CPU_SSC_DPLL#

AJ39

CLK_CPU_SSC_DPLL

AF35

CLK_CPU_DPLL#

AF36

CLK_CPU_DPLL

AY24

CLK_BUF_DMI#

AW24

CLK_BUF_DMI

AR24

CLK_BUF_BCLK#

AT24

CLK_BUF_BCLK

H33

CLK_BUF_DOT96#

G33

CLK_BUF_DOT96

BE6

CLK_BUF_CKSSCD#

BC6

CLK_BUF_CKSSCD

F45

CLK_PCH_14M

D17

CLK_PCI_LPBACK

AM43

XTAL25_IN

AL44

XTAL25_OUT

C40

F38

F36

F39

PCH_GPIO67

AM45

ICLK_IREF

AD39 AD38

AN44

PCH_CLK_BIASREF

1 2

R179 10K_0402_5%

@

R191 10K_0402_5%R191 10K_0402_5 %

12

CLK_CPU_DMI# <5>

CLK_CPU_DMI <5>

CLK_CPU_SSC_DPLL# <5> CLK_CPU_SSC_DPLL <5>

CLK_CPU_DPLL# <5> CLK_CPU_DPLL <5>

1 2

R198

0_0402_5%

GCLK@

1 2

R213

R213 0_0402_5%

0_0402_5%

1 2

R214

7.5K_0402_1%

+3V_PCH

GCLK_PCH_25MHZ

PCH_GPIO67 <18>

+1.5VS

+1.05V_+1.5V_RUN

CLK_BUF_DMI# CLK_BUF_DMI

CLK_BUF_BCLK# CLK_BUF_BCLK

CLK_BUF_DOT96# CLK_BUF_DOT96

CLK_BUF_CKSSCD# CLK_BUF_CKSSCD

CLK_PCH_14M

R183 10K_0402_5%R183 10K_0402_5 % R192 10K_0402_5%R192 10K_0402_5 %

R193 10K_0402_5%R193 10K_0402_5 % R194 10K_0402_5%R194 10K_0402_5 %

R197 10K_0402_5%R197 10K_0402_5 % R199 10K_0402_5%R199 10K_0402_5 %

R202 10K_0402_5%R202 10K_0402_5 % R203 10K_0402_5%R203 10K_0402_5 %

R205 10K_0402_5%R205 10K_0402_5 %

12 12

12

CLOCK TERMINATION for FCIM and need close to PCH

GCLK_PCH_25MHZ <34>

XTAL25_IN

XTAL25_OUT

C118

12P_0402_50V8J

1 2

R215 1M_0402_5%R215 1M_0402_5%

3

OSC

2

OSC

NC

Y2

25MHZ_10PF_7V25000014

1

2

4

NC

1

R02

1

C119

12P_0402_50V8J

2

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

PCH (3/9) DMI,FDI,PM,

LA-9641P

1

0.1

of

15 60Wednesday, October 03, 2012

5

4

3

2

1

PCH_SMBCLK

PCH_SMBDATA

LPT_PCH_M_EDS

U4D

A20

C20

A18

C18

B21

D21

G20

AL11

AJ11

AJ7

AL7

AJ10

AH1

AH3

AJ4

AJ2

U4D

LAD_0

LAD_1

LAD_2

LAD_3

LFRAME#

LDRQ0#

LDRQ1#/GPIO23

SERIRQ

SPI_CLK

SPI_CS0#

SPI_CS1#

SPI_CS2#

SPI_MOSI

SPI_MISO

SPI_IO2

SPI_IO3

D

H82LPMS-QC4C-A1_FCBGA695~D

SPI_SB_CS1# SPI_SO_R

SPI_IO2

SPI_SB_CS0#

SPI_IO2

D D

SPI_IO2

3.3K_0402_5%

SPI_IO3

3.3K_0402_5%

SPI_CLK_PCH_R

12

LPC_AD0

LPC_AD1

LPC_AD2

LPC_AD3

LPC_FRAME#

12

SERIRQ

SPI_CLK_PCH_R

SPI_SB_CS0#

SPI_SB_CS1#

SPI_SI

SPI_SO_R

SPI_IO2

SPI_IO3

LPC_AD0<32>

LPC_AD1<32>

LPC_AD2<32>

LPC_AD3<32>

LPC_FRAME#<32>

+3VS

R223 10K_0402_5%R223 10K_0402_5%

SERIRQ<32>

C C

+3VS

1 2

R229

1 2

R230

B B

R237

33_0402_5%

@

C120

22P_0402_50V8J

@

R124;c190 close to U4.T3 pin

LPT_PCH_M_EDS

2N7002DW-T/R7_SOT363-6

N7

SMBus

LPC

C-Link

SPI

Thermal

SMBALERT#/GPIO11

SMBCLK

SMBDATA

SML0ALERT#/GPIO60

SML0CLK

SML1ALERT#/PCHHOT#/GPIO74

3 OF 11

SML0DATA

SML1CLK/GPIO58

SML1DATA/GPIO75

CL_CLK

CL_DATA

CL_RST#

TD_IREF

PCH_GPI011

R10

PCH_SMBCLK

U11

PCH_SMBDATA

N8

PCH_GPIO60

U8

PCH_SML0CLK

R7

PCH_SML0DATA

H6

PCH_HOT#

K6

SML1CLK

N11

SML1DATA

AF11

AF10

AF7

BA45

TP1

BC45

TP2

BE43

TP4

BE44

TP3

AY43

PCH_TD_IREF

R228 8.2K_0402_1%R228 8.2K_0402_1%

R216

10K_0402_5%

R222

10K_0402_5%

1 2

12

R221

1K_0402_5%

12

+3V_PCH

12

+3V_PCH

PCH_HOT# <32>

2N7002DW-T/R7_SOT363-6

8MB SPI ROM FOR ME & Non-share ROM.

+3VS

U7

1 2

R23333_0402_5% R23333_0402_5%

1 2

R23633_0402_5% R23633_0402_5%

1 2

R23833_0402_5% R23833_0402_5%

1 2

R24633_0402_5% R24633_0402_5%

1

CS#

2

SO

3

SPI_WP#1

WP#

4

GND

16M W25Q16DVSSIG SOIC 8P

U7 Rersver 4M+2M Solution

U8

1

CS#

2

SO

3

SPI_WP#

WP#

4

GND

32M W25Q32FVSSIQ SOIC 8P

HOLD#

SCLK

HOLD#

SCLK

8

VCC

7

SPI_HOLD#1SPI_SO1

6

SPI_CLK1

5

SPI_SI1

SI

+3VS

C121

1 2

0.1U_0402_16V4Z

8

VCC

7

SPI_HOLD#SPI_SO_R SPI_SO_L

6

SPI_CLK_PCH SPI_CLK_PCH_R

5

SPI_SI_R

SI

1 2

R239 33_0402_5%R239 33_0402_5%

1 2

R234 33_0402_5%R234 33_0402_5%

1 2

R235 33_0402_5%R235 33_0402_5%

1 2

R245 33_0402_5%R245 33_0402_5%

1 2

R240 33_0402_5%R240 33_0402_5%

1 2

R241 33_0402_5%R241 33_0402_5%

SPI_IO3 SPI_CLK_PCH_R

SPI_SI

SPI_IO3

SPI_SI

1 2

R190 0_0402_5%@R190 0_0402_5%@

1 2

R200 0_0402_5%@R200 0_0402_5%@

Q11A

6 1

3

Q11B

6 1

3

2

5

Q130A

Q130B

+3VS

4

2

5

4

SMB_CLK_S3

SMB_DATA_S3

EC_SMB_CK2

+3VS

EC_SMB_DA2

PCH_SML0CLK

PCH_SML0DATA

PCH_SMBDATA SMB_CLK_S3 SMB_DATA_S3 PCH_SMBCLK

EC_SMB_CK2 EC_SMB_DA2

SML1DATA SML1CLK

SMB_CLK_S3

SMB_DATA_S3

SMB_CLK_S3 <11,12,26>

DIMM1 D

IMM2

MINI CARD

SMB_DATA_S3 <11,12,26>

EC_SMB_CK2 <22,29,32>

VGA EC thermal sensor

2.2K_0402_5%

2.2K_0804_8P4R_5%

EC_SMB_DA2 <22,29,32>

+3V_PCH

R226

1 2

+3VS

RP16

18 27 36 45

RP17

18 27 36 45

Translator

R227

2.2K_0402_5%

+3VS

+3V_PCH

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

PCH (4/9) LVDS,CRT,DP,HDMI

LA-9641P

1

16 60Wednesday, October 03, 2012

0.1

of

5

D D

PCIE_PRX_DTX_N3<27>

LAN

C C

B B

WLAN

PCIE_PRX_DTX_P3<27>

PCIE_PTX_C_DRX_N3<27> PCIE_PTX_C_DRX_P3<27>

PCIE_PRX_DTX_N4<26> PCIE_PRX_DTX_P4<26>

PCIE_PTX_C_DRX_N4<26> PCIE_PTX_C_DRX_P4<26>

C122 0.1U _0402_10V7KC122 0.1U_0402_10V7K C124 0.1U _0402_10V7KC124 0.1U_0402_10V7K

C125 0.1U _0402_10V7KC125 0.1U_0402_10V7K C123 0.1U _0402_10V7KC123 0.1U_0402_10V7K

+1.5VS

4

1 2 1 2

1 2

R243 0_0402_5%R2 43 0_0402_5%

1 2

R244 7.5K_0402_1%R244 7.5K_0402_1%

PCIE_PRX_DTX_N3 PCIE_PRX_DTX_P3

PCIE_PTX_DRX_N3 PCIE_PTX_DRX_P3

PCIE_PRX_DTX_N4 PCIE_PRX_DTX_P4

PCIE_PTX_DRX_N4 PCIE_PTX_DRX_P4

PCH_PCIE_IREF

PCH_PCIE_RCOMP

U4I

AW31

PERN1/USB3RN3

AY31

PERP1/USB3RP3

BE32

PETN1/USB3TN3

BC32

PETP1/USB3TP3

AT31

PERN2/USB3RN4

AR31

PERP2/USB3RP4

BD33

PETN2/USB3TN4

BB33

PETP2/USB3TP4

AW33

PERN_3

AY33

PERP_3

BE34

PETN_3

BC34

PETP_3

AT33

PERN_4

AR33

PERP_4

BE36

PETN_4

BC36

PETP_4

AW36

PERN_5

AV36

PERP_5

BD37

PETN_5

BB37

PETP_5

AY38

PERN_6

AW38

PERP_6

BC38

PETN_6

BE38

PETP_6

AT40

PERN_7

AT39

PERP_7

BE40

PETN_7

BC40

PETP_7

AN38

PERN_8

AN39

PERP_8

BD42

PETN_8

BD41

PETP_8

BE30

PCIE_IREF

BC30

TP11

BB29

TP6

BD29

PCIE_RCOMP

D

H82LPMS-QC4C-A1_FCBGA695~D

LPT_PCH_M_EDS

PCIe

3

USB

9 OF 11

USB2N0 USB2P0 USB2N1 USB2P1 USB2N2 USB2P2 USB2N3 USB2P3 USB2N4 USB2P4 USB2N5 USB2P5 USB2N6 USB2P6 USB2N7 USB2P7 USB2N8 USB2P8 USB2N9

USB2P9 USB2N10 USB2P10 USB2N11 USB2P11 USB2N12 USB2P12 USB2N13 USB2P13

USB3RN1 USB3RP1

USB3TN1 USB3TP1

USB3RN2 USB3RP2

USB3TN2 USB3TP2

USB3RN5 USB3RP5

USB3TN5 USB3TP5

USB3RN6 USB3RP6

USB3TN6 USB3TP6

USBRBIAS#

USBRBIAS

TP24 TP23

OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43

OC5#/GPIO9 OC6#/GPIO10 OC7#/GPIO14

USB DEBUG=PORT1 AND PORT9

B37 D37 A38 C38 A36 C36 A34 C34 B33 D33 F31 G31 K31 L31 G29 H29 A32 C32 A30 C30 B29 D29 A28 C28 G26 F26 F24 G24

AR26 AP26 BE24 BD23 AW26 AV26 BD25 BC24 AW29 AV29 BE26 BC26 AR29 AP29 BD27 BE28

K24 K26

M33 L33

P3 V1 U2 P1 M3 T1 N2 M1

USB20_N0 USB20_P0 USB20_N1 USB20_P1 USB20_N2 USB20_P2 USB20_N3 USB20_P3

USB20_N9 USB20_P9 USB20_N10 USB20_P10 USB20_N11 USB20_P11

USB3_RX1_N USB3_RX1_P USB3_TX1_N USB3_TX1_P USB3_RX2_N USB3_RX2_P USB3_TX2_N USB3_TX2_P

USB_OC0# USB_OC1# USB_OC2# USB_OC3# USB_OC4# USB_OC5# USB_OC6# USB_OC7#

USBRBIAS

USB20_N0 <35> USB20_P0 <35> USB20_N1 <35> USB20_P1 <35> USB20_N2 <35> USB20_P2 <35> USB20_N3 <23> USB20_P3 <23>

USB20_N9 <35> USB20_P9 <35> USB20_N10 <26> USB20_P10 <26> USB20_N11 <33> USB20_P11 <33>

1 2

R242

22.6_0402_1%

USB_OC0# <35>

USB_OC4# <35>

2

LEFT USB

(USB 3.0)

Touch panel

USB Camera

RIGHT USB

WLAN

CARD READER

USB3_RX1_N <35> USB3_RX1_P <35> USB3_TX1_N <35> USB3_TX1_P <35> USB3_RX2_N <35> USB3_RX2_P <35> USB3_TX2_N <35> USB3_TX2_P <35>

CAD NOTE: Route single-end 50-ohms and max 500-mils length. Avoid routing next to clock pins or under stitching capacitors. Recommended minimum spacing to other signal traces is 15 mils.

1

EHCI1

EHCI2

RP14

USB_OC1# USB_OC2# USB_OC5#

USB_OC3#

+3V_PCH

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

6 7 8 9

10

10K_1206_10P8R_5%

Compal Electronics, Inc.

PCH (5/9) PCI, USB

LA-9641P

+3V_PCH

5 4

USB_OC4#

3

USB_OC7#

2

USB_OC6#

1

USB_OC0#

0.1

17 60Wednesday, October 03, 2012

1

17 60Wednesday, October 03, 2012

0.1

5

4

3

2

1

+3V_PCH

D D

GPIO28

On-Die PLL Volta ge Regulator This signal has a weak internal pull up

H：On-Die voltage regulator enabl e (Default)

*

：

L

PCH_GPIO27 (Have internal Pull-H igh)

*

High: VCCVRM VR Enable Low: VCCVRM VR D isable

+3VALW

C C

+3VS +3VS

BIOS Request SKU ID

+3VS

R277

B B

@

R282

Weak internal pull-high

1 2

R247 10K_0402_5%R247 10K_0402_5%

1 2

R273 10K_0402_5%R273 10K_0402_5%

On-Die PLL Voltage Regulator d isable

+3V_PCH

R266 10K_0402_5%@R266 10K_0402_5%@

R267 10K_0402_5%@R267 10K_0402_5%@

12

R274

R274 10K_0402_5%

10K_0402_5%

1 2

R256

1 2

R260 1K_0402_5%@R260 1K_0402_5%@

1 2

R270

200K_0402_5%

@

PCH_GPIO37 PCH_GPIO36

12

R278

@

10K_0402_5%

PCH_GPIO38

PCH_GPIO67

12

PCH_GPIO38 PCH_GPIO67

R283

10K_0402_5%

12

0

EC_SMI#

PCH_GPIO24

PCH_GPIO27

R271

200K_0402_5%

@

R275

R275 10K_0402_5%

10K_0402_5%

PCH_GPIO67 <15>

PCH_GPIO28

0 1

1

1 1

0

Function

Optimus

Reserved

DIS

UMA

+3VS

+3V_PCH

EC_LID_OUT#<32>

+3VS

+3V_PCH

ODD_EN<30>

Check Behavior

1 2

R248 10K_0402_5%R248 10K_0402_5%

R249 10K_0402_5%R249 10K_0402_5%

1 2

R252 10K_0402_5%@R252 10K_0402_5%@

R02

1 2

R253 1K_0402_5%R253 1K_0402_5%

R259 10K_0402_1%R259 10K_0402_1%

1 2

+3VS

1 2

R265 10K_0402_5%R265 10K_0402_5%

R268 10K_0402_5%R268 10K_0402_5%

1 2

R272 10K_0402_5%R272 10K_0402_5%

ODD_EN

LPT_PCH_M_EDS

U4F

PCH_GPIO0

PCH_GPIO1

PCH_GPIO6

EC_SCI#<32>

EC_SMI#<32>

+3VS

EC_SCI#

EC_SMI#

PCH_GPIO12

PCH_GPIO16

DGPU_PWROK

PCH_GPIO22

PCH_GPIO24

PCH_GPIO27

PCH_GPIO28

PCH_GPIO34

PCH_GPIO35

PCH_GPIO36

PCH_GPIO37

PCH_GPIO38

PCH_GPIO39

PCH_GPIO48

PCH_GPIO49

PCH_GPIO57

PCH_GPIO69

PCH_GPIO70

PCH_GPIO71

AT8

BMBUSY#/GPIO0

F13

TACH1/GPIO1

A14

TACH2/GPIO6

G15

TACH3/GPIO7

Y1

GPIO8

K13

LAN_PHY_PWR_CTRL/GPIO12

AB11

GPIO15

AN2

SATA4GP/GPIO16

C14

TACH0/GPIO17

BB4

SCLOCK/GPIO22

Y10

GPIO24

R11

GPIO27

AD11

GPIO28

AN6

GPIO34

AP1

GPIO35/NMI#

AT3

SATA2GP/GPIO36

AK1

SATA3GP/GPIO37

AT7

SLOAD/GPIO38

AM3

SDATAOUT0/GPIO39

AN4

SDATAOUT1/GPIO48

AK3

SATA5GP/GPIO49

U12

GPIO57

C16

TACH4/GPIO68

D13

TACH5/GPIO69

G13

TACH6/GPIO70

H15

TACH7/GPIO71

BE41

VSS

BE5

VSS

C45

VSS

A5

VSS

12

PCH_GPIO16

@

R280 10K_0402_5%

12

PCH_GPIO49

R281 10K_0402_5%R281 10K_0402_5%

12

PCH_GPIO16

R284 10K_0402_5%R284 10K_0402_5%

@

12

PCH_GPIO49

R285 10K_0402_5%

D

H82LPMS-QC4C-A1_FCBGA695~D

LPT_PCH_M_EDS

GPIO

NCTF

Config

USB3.0 x4, PCIE x8, SATA x6

*

6 OF 11

CPU/Misc

PROCPWRGD

THRMTRIP#

PLTRST_PROC#

TP14

PECI

RCIN#

VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AN10

GATEA20

AY1

PCH_PECI_R

AT6

KBRST#

AV3

AV1

PCH_THRMTRIP#_R

AU4

CPU_PLTRST#

N10

A2 A41 A43 A44 B1 B2 B44 B45 BA1 BC1 BD1 BD2 BD44 BD45 BE2 BE3 D1 E1 E45 A4

GPIO16 & 49

11

01USB3.0 x6, PCIE x8, SATA x4

1 2

@

R2550_0402_5%@R2550_0402_5%

GATEA20 <32>

H_PECI <32,5>

KBRST# <32>

H_CPUPWRGD <5>

CPU_PLTRST# <5>

+1.05VS

PCH_GPIO69

0 1

PCH_GPIO70

0 1

PCH_GPIO71

0 1

Check list requi r 1K pull high, CRB 100 ohm@

R258

R258 100_0402_1%

100_0402_1%

@

1 2

R262 390_0402_5%R262 390_0402_5%

H_THRMTRIP# <5>

Need Update

+3VS

Function

R276

@R276

@

PCH_GPIO69

R279

@R279

@

R286

@R286

@

R288

200K_0402_5%

@

1 2

10K_0402_5%

1 2

10K_0402_5%

+3VS +3VS

@R287

@

1 2

PCH_GPIO70PCH_GPIO71

10K_0402_5%

200K_0402_5%

1 2

R287

R289

@

1 2

10K_0402_5%

1 2

RP15

A A

5

PCH_GPIO48 PCH_GPIO34 GATEA20 KBRST# PCH_GPIO0

+3VS

RP15

6 7 8 9

10

10K_1206_10P8R_5%

5 4

HDD_DET#

3

BBS_BIT0_R

2 1

PCH_GPIO22

+3VS

HDD_DET# <13> BBS_BIT0_R <13>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

PCH (6/9) GPIO, CPU, MISC

Size Document Number Rev

Custom

LA-9641P

Date: Sheet of

2

Date: Sheet of

1

18 60Wednesday, October 03, 2012

0.1

5

D D

+1.05VS

1U_0402_6.3V6K

10U_0603_6.3V6M

1U_0402_6.3V6K

C129

C130

1

2

C C

+1.05VS

22U_0805_6.3V6M

C137

1

2

1U_0402_6.3V6K

C132

C131

1

2

+PCH_VCCDSW

1U_0402_6.3V6K

C138

C139

1

2

AA24 AA26 AD20 AD22 AD24 AD26 AD28 AE18 AE20 AE22 AE24 AE26 AG18 AG20 AG22 AG24

U14

AA18

U18 U20 U22 U24

Y26

V18 V20 V22 V24 Y18 Y20 Y22

U4G

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

DCPSUSBYP VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW

4

LPT_PCH_M_EDS

CRT DAC

FDI

HVCMOS

Core

USB3

PCIe/DMI

SATA

VCCMPHY

DH82LPMS-QC4C-A1_FCBGA695~D

VCCADACBG3_3

7 OF 11

VCCADAC1_5

VSS

VCCVRM

VCCIO

VCC3_3_R30 VCC3_3_R32

DCPSUS1

VCCSUS3_3 VCCSUS3_3

DCPSUS3 DCPSUS3

VCCIO VCCVRM VCCVRM

VCCVRM

VCCIO

VCCVRM

VCCIO

P45

P43

M31

BB44

AN34

AN35

R30 R32

Y12

+PCH_USB_DCPSUS1

AJ30 AJ32

AJ26

+PCH_USB_DCPSUS3

AJ28 AK20 AK26 AK28

BE22

AK18

AN11

AK22

AM18 AM20 AM22 AP22 AR22 AT22

3

LH1

LH1 1_0603_1%

1_0603_1%

LH1

12

@

1

2

0.01U_0402_16V7K

C126

+VCCADAC

0.1U_0402_10V7K

1

C127

2

BLM18PG181SN1_0603

10U_0603_6.3V6M

C128

1

2

+1.5VS

2

1

PCH Power Rail Table

+3VS

+1.05VS

Voltage Rail

VCC 1.05V 1.29 A

VCCIO 1.05V 3.629 A

VCCADAC1_5 1.5V 0.070 A

VCCADAC3_3 0.0133 A3.3V

VCCCLK 0.306 A1.05V

VCCCLK3_3 0.055 A

VCCVRM 0.179 A1.5V

VCC3_3 3.3V 0.133 A

VCCASW 1.05V 0.67 A

VCCSUSHDA 3.3V 0.01 A

VCCSPI 3.3V 0.022 A

+3V_PCH

1

2

+1.05V_+1.5V_RUN

+1.05VS

1U_0402_6.3V6K

C134

1

+3VS

2

0.1U_0402_10V7K

1

C135

0.1U_0402_10V7K

C136

C135

2

+1.05V_+1.5V_RUN

+1.05VS

VCCSUS3_3 3.3V 0.261 A

1U_0402_6.3V6K

C143

1

2

1U_0402_6.3V6K

C145

C144

1

2

10U_0603_6.3V6M

1U_0402_6.3V6K

C147

C146

1

2

VCCDSW3_3 3.3V 0.015 A

V_PROC_IO 1.05V 0.004 A

Voltage S0 Iccmax Current (A)

3.3V

1 2

B B

A A

5

R290 5.1_0402_1%R290 5.1_0402_1%

+PCH_VCCDSW_R

1U_0402_6.3V6K

C149

1

2

+PCH_VCCDSW

+1.5VS +1.05V_+1.5V_RUN

R291 0_0603_5%R291 0_0603_5%

+1.05VS

R293 0_0603_5%@R293 0_0603_5%@

4

12

+PCH_USB_DCPSUS1

10U_0603_6.3V6M

C148

1

@

2

+PCH_USB_DCPSUS3

10U_0603_6.3V6M

C150

C151

1

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

C151

1

2

@

Deciphered Date

1 2

R292

0_0402_5%

@

R294

0_0603_5%

@

2

+1.05VS

12

Custom

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (7/9) PWR

LA-9641P

1

19 60Wednesday, October 03, 2012

0.1

5

4

3

2

1

+3V_PCH

LPT_PCH_M_EDS

U4H

R24

VCCSUS3_3

R26

VCCSUS3_3

R28

VCCSUS3_3

U26

VCCSUS3_3

M24

VSS

U35

VCCUSBPLL

L24

VCC3_3

U30

VCCIO

V28

VCCIO

V30

VCCIO

Y30

VCCIO

Y35

DCPSUS2

AF34

VCCVRM

AP45

VCC

Y32

VCCCLK

M29

VCCCLK3_3

L29

VCCCLK3_3

L26

VCCCLK3_3

M26

VCCCLK3_3

U32

VCCCLK3_3

V32

VCCCLK3_3

AD34

VCCCLK

AA30

VCCCLK

AA32

VCCCLK

AD35

VCCCLK

AG30

VCCCLK

AG32

VCCCLK

AD36

VCCCLK

AE30

VCCCLK

AE32

VCCCLK

D

H82LPMS-QC4C-A1_FCBGA695~D

1 2

R314

0_0402_5%

@

LH2

1 2

+3V_PCH

1

2

0.1U_0402_10V7K

+1.05VS

C152

0.1U_0402_10V7K

1

2

+PCH_USB_DCPSUS2

1

2

+3VS

C153

0.1U_0402_10V7K

+1.05VS

1

C157

2

1U_0402_6.3V6K

C168

@

1U_0402_6.3V6K

1

2

+PCH_VCC

+1.05V_+1.5V_RUN

C159

1

@

2

1

2

10U_0603_6.3V6M

C172

10U_0603_6.3V6M

C140

+PCH_VCCCLK3_3

1U_0402_6.3V6K

C174

1

2

+PCH_USB_DCPSUS2

+PCH_VCC

+PCH_VCCCLK

D D

+1.05VS

C C

+1.05VS

4.7UH_LQM18FN4R7M00D_20%

LPT_PCH_M_EDS

USB

1

R20

VCCSUS3_3

R22

8 OF 11

VCCSUS3_3

VCCDSW3_3

DCPSST

VCC3_3 VCC3_3 VCC3_3

VCCIO

VCCSUSHDA

VCCSUS3_3

VCCRTC

DCPRTC DCPRTC

V_PROC_IO V_PROC_IO

VCCSPI

VCCASW

VCCVRM

VCC3_3

A16

+PCH_VCCDSW3_3

AA14

+PCH_VCCSST

+PCH_DCPRTC

+PCH_VPROC

+PCH_VCCCFUSE

C156 0.1U_0402_10V7KC156 0.1U_0402_10V7K

+1.05VS

0.1U_0402_10V7K

+1.05VS

+1.05V_+1.5V_RUN

AE14 AF12 AG14

U36

A26

K8

A6

P14 P16

AJ12 AJ14

AD12

P18

VCC

P20

VCC

L17

R18

AW40

AK30

AK32

GPIO/LPC

Azalia

RTC

CPU

ICC

SPI

Thermal

1 2

C163

1 2

2

+3VS

1

2

+3VS

Place near pin AP45

+1.05VS

B B

R300

0_0805_5%

1 2

+PCH_VCCCLK

1

2

1U_0402_6.3V6K

C176

1U_0402_6.3V6K

C177

1

2

1U_0402_6.3V6K

C178

1

2

1U_0402_6.3V6K

C179

1

2

+PCH_VCCDSW3_3

0.1U_0402_10V7K

C154

0.1U_0402_10V7K

1

C164

2

1U_0402_6.3V6K

C167

0.1U_0402_10V7K

1

2

+RTCVCC

C165

1

2

0.1U_0402_10V7K

1

2

+3V_PCH

1U_0402_6.3V6K

C166

C155

+3V_PCH

1U_0402_6.3V6K

C162

1

2

1 2

R307

0_0402_5%

+3VS

0.1U_0402_10V7K

1

C158

2

0.1U_0402_10V7K

1

C160

2

+3VALW

PCH Power Rail Table

Voltage Rail

VCC 1.05V 1.29 A

VCCIO 1.05V 3.629 A

VCCADAC1_5 1.5V 0.070 A

VCCADAC3_3 0.0133 A3.3V

Voltage S0 Iccmax Current (A)

VCCCLK 0.306 A1.05V

VCCCLK3_3 0.055 A

3.3V

VCCVRM 0.179 A1.5V

VCC3_3 3.3V 0.133 A

VCCASW 1.05V 0.67 A

VCCSUSHDA 3.3V 0.01 A

+1.05VS

R297

0_0805_5%

+PCH_VPROC

0.1U_0402_10V7K

1

C169

0.1U_0402_10V7K

1

C173

2

1U_0402_6.3V6K

C180

@

C169

2

+PCH_VCCCFUSE

1U_0402_6.3V6K

0.1U_0402_10V7K

1

C170

2

1U_0402_6.3V6K

C175

1

2

1 2

C171

0_0805_5%

1 2

R299

R301

@

0_0805_5%

1 2

+1.05VS

+3VS

VCCSPI 3.3V 0.022 A

VCCSUS3_3 3.3V 0.261 A

VCCDSW3_3 3.3V 0.015 A

V_PROC_IO 1.05V 0.004 A

+3VS

R302

0_0805_5%

1 2

Place near pin Y32,AA30,AA32 Place near pin AD34 Place near pin AD35,AD36

+PCH_VCCCLK3_3

1U_0402_6.3V6K

C181

1

2

1U_0402_6.3V6K

C182

1

2

1U_0402_6.3V6K

C183

1

2

Place near pin AG30,AG32,AE30,AE32

1U_0402_6.3V6K

C184

1

2

Place near pin M29 Place near pin L29 Place near pin L26,M26 Place near pin U32,V32

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

2

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

PCH (8/9) PWR

LA-9641P

1

of

20 60Wednesday, October 03, 2012

0.1

5

D D

C C

B B

4

U4J

AL34

VSS

AL38

VSS

AL8

VSS

AM14

VSS

AM24

VSS

AM26

VSS

AM28

VSS

AM30

VSS

AM32

VSS

AM16

VSS

AN36

VSS

AN40

VSS

AN42

VSS

AN8

VSS

AP13

VSS

AP24

VSS

AP31

VSS

AP43

VSS

AR2

VSS

AK16

VSS

AT10

VSS

AT15

VSS

AT17

VSS

AT20

VSS

AT26

VSS

AT29

VSS

AT36

VSS

AT38

VSS

D42

VSS

AV13

VSS

AV22

VSS

AV24

VSS

AV31

VSS

AV33

VSS

BB25

VSS

AV40

VSS

AV6

VSS

AW2

VSS

F43

VSS

AY10

VSS

AY15

VSS

AY20

VSS

AY26

VSS

AY29

VSS

AY7

VSS

B11

VSS

B15

VSS

D

H82LPMS-QC4C-A1_FCBGA695~D

LPT_PCH_M_EDS

10 OF 11

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

K39 L2 L44 M17 M22 N12 N35 N39 N6 P22 P24 P26 P28 P30 P32 R12 R14 R16 R2 R34 R38 R44 R8 T43 U10 U16 U28 U34 U38 U42 U6 V14 V16 V26 V43 W2 W44 Y14 Y16 Y24 Y28 Y34 Y36 Y40 Y8

3

U4K

AA16

VSS

AA20

VSS

AA22

VSS

AA28

VSS

AA4

VSS

AB12

VSS

AB34

VSS

AB38

VSS

AB8

VSS

AC2

VSS

AC44

VSS

AD14

VSS

AD16

VSS

AD18

VSS

AD30

VSS

AD32

VSS

AD40

VSS

AD6

VSS

AD8

VSS

AE16

VSS

AE28

VSS

AF38

VSS

AF8

VSS

AG16

VSS

AG2

VSS

AG26

VSS

AG28

VSS

AG44

VSS

AJ16

VSS

AJ18

VSS

AJ20

VSS

AJ22

VSS

AJ24

VSS

AJ34

VSS

AJ38

VSS

AJ6

VSS

AJ8

VSS

AK14

VSS

AK24

VSS

AK43

VSS

AK45

VSS

AL12

VSS

AL2

VSS

BC22

VSS

BB42

VSS

D

H82LPMS-QC4C-A1_FCBGA695~D

LPT_PCH_M_EDS

11 OF 11

2

B19

VSS

B23

VSS

B27

VSS

B31

VSS

B35

VSS

B39

VSS

B7

VSS

BA40

VSS

BD11

VSS

BD15

VSS

BD19

VSS

AY36

VSS

AT43

VSS

BD31

VSS

BD35

VSS

BD39

VSS

BD7

VSS

D25

VSS

AV7

VSS

F15

VSS

F20

VSS

F29

VSS

F33

VSS

BC16

VSS

D4

VSS

G2

VSS

G38

VSS

G44

VSS

G8

VSS

H10

VSS

H13

VSS

H17

VSS

H22

VSS

H24

VSS

H26

VSS

H31

VSS

H36

VSS

H40

VSS

H7

VSS

K10

VSS

K15

VSS

K20

VSS

K29

VSS

K33

VSS

BC28

VSS

1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH (9/9) VSS

LA-9641P

1

0.1

21 60Wednesday, October 03, 2012

0.1

5

4

3

2

1

+3VS +3VS_PS

80mil 80mil

RT1

0_0805_5%

1 2

@

1 2

R551

R551 0_0805_5%

0_0805_5%

Close to Pin3

0.1U_0402_16V4Z

10U_0603_6.3V6M

D D

1

CT1

2

0.1U_0402_16V4Z

1

CT2

2

Close to L87

22U_0603_6.3V6M

0.1U_0402_16V4Z

10U_0603_6.3V6M

1

CT4

2

22U_0603_6.3V6M

1

CT5

2

+DP_V33

1

CT3

2

EDP_CPU_AUX<7>

Close to Pin18

0.1U_0402_16V4Z

1

CT7

CT6

2

0.1U_0402_16V4Z

+SWR_VDD

1

CT8

2

EDP_CPU_AUX#<7>

EDP_CPU_LANE_P0<7> EDP_CPU_LANE_N0<7>

Close to Pin13

Close to L29

C C

0.1U_0402_16V4Z

22U_0603_6.3V6M

1

CT9

2

B B

0.1U_0402_16V4Z

1

2

1

CT11

2

Close to Pin27

CT11

CT10

0.1U_0402_16V4Z

1

CT12

2

Close to Pin7

+SWR_V12

RTD2132R LDO MODE

+SWR_LX+SWR_V12

+3VS_PS

1 2

C190 0.1U_0402_10V6KC190 0.1U_0402_10V6K

1 2

C191 0.1U_0402_10V6KC191 0.1U_0402_10V6K

1 2

C192 0.1U_0402_10V6KC192 0.1U_0402_10V6K

1 2

C193 0.1U_0402_10V6KC193 0.1U_0402_10V6K

EC_SMB_CK2<16,29,32> EC_SMB_DA2<16,29,32>

TL_HPD<7>

12

LT1

LT1 FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805

LT2

LT2 FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805

1 2

LT3

4.7UH_PG031B-4R7MS_1.1A_20%

+DP_V33

12

+SWR_VDD

+SWR_LX+SWR_V12

EDP_CPU_AUX_R EDP_CPU_AUX#_R

EDP_CPU_LANE_P0_R EDP_CPU_LANE_N0_R

RT8

12K_0402_1%

UT2

3

40mil

DP_V33

13

60mil

SWR_VDD

18

PVCC

12

20mil

SWR_LX

11

60mil60mil

SWR_VCCK

27

VCCK

7

DP_V12

2

AUX_P

1

AUX_N

5

LANE0P

6

LANE0N

9

CIICSCL1

10

CIICSDA1

32

HPD

8

DP_REXT

4

DP_GND

1 2

Power

LVDS

RTD2132S

DP-IN

GPIO(PWM OUT)

GPIO(Panel_VCC)

GPIO(PWM IN)

GPIO

GPIO(BL_EN)

LVDS

Other

EDID

ROM

RTD2132R-VE-CG_QFN32_5X5

R438

100K_0402_1%

1 2

TXEC+

TXEC-

TXE2+

TXE2-

TXE1+

TXE1-

TXE0+

TXE0-

MIICSCL1

MIICDA1

MIICSCL0 MIICSDA0

GND

ENBKL

19 20

21 22

23 24

25 26

14 15 16 17

29 28

31

MIIC_SCL

30

MIIC_SDA

33

LVDS_ACLK <23> LVDS_ACLK# <23>

LVDS_A2 <23> LVDS_A2# <23>

LVDS_A1 <23> LVDS_A1# <23>

LVDS_A0 <23> LVDS_A0# <23>

TL_ENVDD need 40 mil if use for LVDS power on R version

TL_INVT_PWM <23>

TL_ENVDD <23>

PCH_PWM <14>

ENBKL <32>

EDID_CLK <23> EDID_DATA <23>

ADD TP on trace or via

MIIC_SCL

+3VS_PS

1 2

@

1 2

RT4

4.7K_0402_5%

RT5

4.7K_0402_5%

EDID_DATA

EDID_CLK

MIIC_SDA

RT9 4.7K_0402_5%RT9 4.7K_0402_5%

RT10 4.7K_0402_5%RT10 4.7K_0402_5%

1 2

+3VS_PS

@

1 2

RT11

4.7K_0402_5%

RT12

4.7K_0402_5%

+3VS_PS

MIIC_SCL

MIIC_SDA

0

1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/30 2013/06/30

Compal Secret Data

Deciphered Date

2

0 1

X

Internal ROM

EC CODE

EEPROM

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

LVDS Translator - RTD2132S

LA-9641P

1

22 60Wednesday, October 03, 2012

1.0

5

4

3

2

1

LCD POWER CIRCUIT

@

+3VS +LCDVDD_C ONN

@

D D

0.1U_0402_16V4Z

C C

B B

A A

@

C538

W=60mils W=60mils

U72

1

R685 0_0402_5%

2

12

@

1500P_0402_50V7K

U72

5

VIN

4

1

C4

2

SS

APL3512ABI-TRG_SOT23-5

TL_ENVDD<22>

+LCDVDD_C ONN

VOUT

GND

1

2

3

EN

W=60mils

TL_ENVDD

1 2

R553

@ R553

@

0_0805_5%

RTD2132R Internal load switch for +LCD_VCC

BKOFF#

12

R716

R716 10K_0402_5%

10K_0402_5%

+LCDVDD_C ONN

@ R408

@

100K_0402_5%

+3VS

680P_0402_50V7K

C540

1

@

2

R408

2

4.7U_0603_6.3V6K

12

@

C517

0.1U_0402_16V4Z

CMOS_ON#<32>

C516

Vendor suggest reserve

1 2

TL_INVT_PWM<22>

EC_INVT_PW M<32>

1

@C540

@

2

USB20_P3<17> USB20_N3<17>

R441 0_0402_5%R441 0_0402_5%

1 2

R431 0_0402_5%@R431 0_0402_5%@

USB20_P3 USB20_N3

R688 0_0402_5%R688 0_0402_5% R684 0_0402_5%R684 0_0402_5%

CMOS

+3VS

CMOS@

150K_0402_5%

R435

12 12

4

1

L58

@

1

C520

0.1U_0402_16V4Z

2

BKOFF#<32>

INVT_PWM

LVDS_ACLK<22> LVDS_ACLK#<22>

LVDS_A2<22> LVDS_A2#<22> LVDS_A1<22> LVDS_A1#<22> LVDS_A0<22> LVDS_A0#<22>

EDID_DATA<22> EDID_CLK<22>

+LCDVDD_C ONN

+3VS_CMOS

3

2

WCM- 2012-900T_4P

@

R686 0_0402_5%

(20 MIL)

Q83

Q83 PMV65XP_SOT23-3~D

PMV65XP_SOT23-3~D

S

CMOS@

CMOS@C520

CMOS@

VGA LCD/PANEL BD. Conn.

+3VS

USB20_P3_R

USB20_N3_R

CMOS Camera

12

D

13

G

2

680P_0402_50V7K

BKOFF#

(60 MIL)

USB20_P3_R

USB20_N3_R

(20 MIL)

1

CMOS@

C518

0.1U_0402_16V4Z

2

R296 for CMOS shake issue reserve

C539

@

JLVDS1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

ACES_88341-3001 ME@

1

@

2

G1 G2 G3 G4

R02

1 2

C541

4.7U_0805_25V6-K

31 32 33 34

+3VS_CMOS

R813

0_0805_5%

10U

1

C519

@C519

@

10U_0603_6.3V6M

2

B++LEDVDD

Security Classification

2011/06/15 2012/07/11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

3

Compal Electronics, Inc.

Title

Size Docume nt Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

LVDS/CAMERA

LA-9641P

23 60Wednesday, Octob er 03, 2012

1

2.0

A

B

C

D

E

1 1

FCM1608 CF-121T03 0603

1

C524

2

10P_0402_50V8J

1 2

L30

FCM1608 CF-121T03 0603

1 2

L31

FCM1608 CF-121T03 0603

1 2

L32

8

BYP

3

VIDEO1

4

VIDEO2

5

VIDEO3

DDC_OUT1

DDC_OUT2

SYNC_OUT1

SYNC_OUT2

9

12

14

16

1

C525

C526

2

10P_0402_50V8J

1 2

C6 0.22U_04 02_10V6KC6 0.22U_04 02_10V6K

RED

GREEN

BLUE

CRT_DDC _DAT_CONN

CRT_DDC _CLK_CONN

JVGA_VS

JVGA_HS

DAC_RED<14>

DAC_GRN<14>

DAC_BLU<14>

RP22

4 5 3 6 2 7 1 8

150_080 4_8P4R_5%

2 2

+5VS

1

C529

0.1U_040 2_16V4Z

3 3

1

2

C537

0.1U_040 2_16V4Z

C531

0.1U_040 2_16V4Z

+3VS

DAC_BLU DAC_GRN DAC_RED

1

2

CRT_DDC _DATA<14>

CRT_DDC _CLK<1 4>

CRT_VSYNC<14>

CRT_HSYNC< 14>

1

C523

C522

2

10P_0402_50V8J

U10

1

VCC_SYNC

2

VCC_VIDEO

7

VCC_DDC

10

DDC_IN1

11

DDC_IN2

13

SYNC_IN1

15

SYNC_IN2

6

GND

TPD7S01 9-15DBQR_SSOP 16

1

2

1

C527

2

10P_0402_50V8J

4.7K_040 2_5%

RED

GREEN

BLUE

R31

12

T66P AD T6 6PAD

+5V_Display

12

NC11 RED

CRT_DDC _DAT_CONN GREEN

JVGA_HS BLUE

JVGA_VS

CRT_DDC _CLK_CONN

100P_04 02_50V8J

R33

4.7K_040 2_5%

CRT Connector

+5V_Display

6

11

1 7

12

2 8

13

3 9

14

4 10 15

5

C528

1

2

CONTE_8 0431-5K1-152

JCRT1

ME@

JCRT1

ME@

16

G

17

G

4 4

Security Class ification

2011/06/ 15 2012/07/ 11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/ 15 2012/07/ 11

Compal Secret Data

C

Deciphered Date

Compal Electronics, Inc.

Title

Size Do cument Number Rev

Custom

Date: Sheet o f

D

Date: Sheet

Compal Electronics, Inc.

CRT Connector

LA-9641P

24 60Wednesd ay, October 03, 20 12

E

2.0

of

5

4

3

2

1

U73

1

IN

AP2330W-7_SC59-3

1 2

1 2 1 2

1 2

HDMI_CLK-_CONN HDMI_CLK+_CONN HDMI_TX1-_CONN HDMI_TX1+_CONN

OUT

GND

C544

+5VS

1

2

R465 0_0402_5%@R465 0_0402_5%@

R464 0_0402_5%@R464 0_0402_5%@ R467 0_0402_5%@R467 0_0402_5%@

R466 0_0402_5%@R466 0_0402_5%@ R469 0_0402_5%@R469 0_0402_5%@

R468 0_0402_5%@R468 0_0402_5%@ R471 0_0402_5%@R471 0_0402_5%@

R470 0_0402_5%@R470 0_0402_5%@

L35

HDMI@L35

HDMI@

HDMICLK_NB<14>

HDMIDAT_NB<14>

9

10

8

9

7

6

6 5

1

4

WCM-2012HS-900T

L36

1

4

WCM-2012HS-900T

L37

1

4

WCM-2012HS-900T

L38

1

4

WCM-2012HS-900T

D32

@

HDMI_CLK+_CK

D D

C C

B B

A A

HDMI_CLK-_CK

HDMI_TX0+_CK

HDMI_TX0-_CK

HDMI_TX1+_CK

HDMI_TX1-_CK

HDMI_TX2-_CK HDMI_TX2-_CONN

HDMIDAT_R

HDMI_DET HDMI_DET

YSCLAMP0524P_SLP2510P8-10-9

2

HDMI_CLK+_CONN

2

3

HDMI_CLK-_CONN

3

HDMI@L36

HDMI@

2

HDMI_TX0+_CONN

2

3

HDMI_TX0-_CONN

3

HDMI@L37

HDMI@

2

HDMI_TX1+_CONN

2

3

HDMI_TX1-_CONN

3

HDMI@L38

HDMI@

2

HDMI_TX2+_CONNHDMI_TX2+_CK

2

3

+3VS

5

4

1

HDMICLK_R

1

2

HDMIDAT_R HDMI_TX1-_CONN

2

4

5

3

8

3

Q63B

HDMI@

2N7002DW-T /R7_SOT363-6

HDMI_TX1+_CONNHDMICLK_R

HDMI_TX1-_CONN

HDMI_CLK+_CONN

HDMI_CLK-_CONN

TMDS_B_HPD#<14>

+3VS

Q63A

HDMI@

2

2N7002DW-T /R7_SOT363-6

61

HDMICLK_R HDMI_TX2+_CK

HDMIDAT_R

@

9

10

8

9

7

6

6 5

YSCLAMP0524P_SLP2510P8-10-9

D28

+5V_Display

1

2

4

5

3

8

HDMI@

TMDS_B_HPD#

2.2K_0804_8P4R_5%

HDMI_TX1+_CONN

HDMI_CLK+_CONN

HDMI_CLK-_CONN

R485

1M_0402_5%

RP21

18 27 36 45

HDMI@

+3VS

G

2

1 2

S

HDMIDAT_R HDMICLK_R HDMIDAT_NB HDMICLK_NB

Q93

HDMI@

2N7002H_SOT23-3

13

D

HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_TX2+_CONN

HDMI_TX2-_CONN

R488

R488 20K_0402_5%

20K_0402_5%

HDMI@

1 2

HDMI_CLK-_CK<7> HDMI_CLK+_CK<7>

HDMI_TX0-_CK<7>

HDMI_TX0+_CK<7>

HDMI_TX1-_CK<7> HDMI_TX1+_CK<7>

HDMI_TX2-_CK<7> HDMI_TX2+_CK<7>

D29

@

9

10

8

9

7

6

6 5

YSCLAMP0524P_SLP2510P8-10-9

1

2

4

5

3

8

0.1U_0402_16V4Z

HDMI_CLK-_CK

HDMI_CLK+_CK HDMI_TX0-_CK

HDMI_TX0+_CK HDMI_TX1-_CK

HDMI_TX1+_CK HDMI_TX2-_CK

HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_TX2+_CONN

HDMI_TX2-_CONN

W=40mils

3

2

HDMI_DET

+5V_Display

HDMIDAT_R HDMICLK_R

HDMI_CLK-_CONN

HDMI_CLK+_CONN HDMI_TX0-_CONN

HDMI_TX0+_CONN HDMI_TX1-_CONN

HDMI_TX1+_CONN HDMI_TX2-_CONN

HDMI_TX2+_CONN

RP19

1 2 3 4 5

680_1206_10P8R_5%

HDMI@

+5V_Display

C543

0.1U_0402_16V4Z

10 9

HDMI_TX0+_CONN

8

HDMI_TX0-_CONN

7

HDMI_TX2+_CONN

6

HDMI_TX2-_CONN

1

2

JHDMI1

ME@JHDMI1

HP_DET +5V DDC/CEC_GND SDA SCL Reserved CEC CKCK_shield CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

13

D

S

ME@

20

G1

21

G2

22

G3

23

G4

+3VS

2

G

Q95

HDMI@

2N7002H_SOT23-3

19 18 17 16 15 14 13 12 11 10

SUYIN_100042GR019M23DZL

Security Classification

2011/06/15 2012/07/11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

3

Compal Secret Data

Deciphered Date

Compal Electronics,Ltd.

Title

Size Doc ument Number Rev

B

Date: Sheet of

2

Date: Sheet

HDMI CONN

LA-9641P

2.0

of

25 60Wednesday, October 03, 2012

1

A

B

C

D

E

Mini-Express Card for WLAN/WiMAX(Half)

1 1

+3VS_WLAN

+3VS_WLAN+3VS

80mil

J6

@

Mini-Express Card(WLAN/WiMAX)

JWLN1

PCIE_WAKE#<14,27>

EC_BT_ON#<32>

2 2

Need check module behavior

INTEL_BT_OFF#<32>

3 3

CLKREQ_WLAN#<15>

CLK_PCIE_WLAN1#<15>

CLK_PCIE_WLAN1<15>

PCIE_PRX_DTX_N4<17> PCIE_PRX_DTX_P4<17>

PCIE_PTX_C_DRX_N4< 17> PCIE_PTX_C_DRX_P4<17>

EC_TX<32,33>

EC_RX<32,33>

PCIE_WAKE#

100_0402_1%

1 2 1 2

100_0402_1%

R505

R506

+3VS_WLAN

R507

R507 100K_0402_5%

100K_0402_5%

1 2

1

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

GND1

ME@

GND2

2 4 6

8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

3 5 7

9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

53

BELLW_80003-8041

For EC to detect debug card insert.

112

JUMP_43X79

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

2

+1.5VS

1 2

R501 0_0402_5%@R501 0_0402_5%@

1 2

R502 0_0402_5%@R502 0_0402_5%@

R02

USB20_N10 <17 > USB20_P10 <17>

C548

4.7U_0603_6.3V6K

+3VS_WLAN

1

C547

@C547

0.1U_0402_16V4Z

2

@

@C548

@

EMI reserve

EC_WL_OFF# <32> PLT_RST# <1 4,27,32>

SMB_CLK_S3 <11,12,16> SMB_DATA_S3 < 11,12,16>

4 4

Security Classification

2011/06/15 2012/07/11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Doc ument Number Rev

Date: Sheet of

D

Date: Sheet

Compal Electronics, Inc.

Mini-Card/NEW Card/SIM

LA-9641P

E

of

26 60Wednesday, October 03, 2012

2.0

5

4

3

2

1

+3VALW

Layout Notice : Place as close chip as possible.

D D

GCLK@

RL3

LAN_PWR_ON#<32>

LAN_PWR_ON#

Vendor recommand reseve the PU resistor close LAN chip

+3V_LAN

PLT_RST#<14,26,32>

12

2

GCLK@

10K_0402_5%

RL4 4.7K_0402 _5%

1

1 2

GCLK@

@

CL7

0.1U_0402_16V7K

J10

112

JUMP_43X79

S

G

2

+3V_LAN

@

2

D

13

GCLK@

QL1

QL1 PMV65XP_SOT23-3~D

PMV65XP_SOT23-3~D

PLT_RST#

+LX

+1.1_DVDDL

UL1

8162@UL1

8162@

AR8162-AL3A-R

CL1

1000P_0402_50V7K

SWR@

Close to Pin40

Close together

1

CL2

2

0.1U_0402_16V4Z

10U_0603_6.3V6M

SWR@

LL1

SWR@LL1

SWR@

1 2

4.7UH_SIA4012-4R7M_20%

Note: Place Close to LAN chip LL1 DCR< 0.15 ohm Rate current > 1A

CL3

10U

SA000065400 S IC QCA8172-AL3A-R QFN 40P E-LAN CTRL

FBMA-L11160808601LMA10T_2P

1 2

1

CL4

2

1

CL6

CL5

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

4.7U_0603_6.3V6K

Place close to Pin34

LL3

SWR@LL3

LL2

FBMA-L11160808601LMA10T_2P

SWR@

1 2

+1.1_DVDDL+1.1_AVDDL+1.1_AVDDL_L

SA000052J10 S IC AR8162-AL3A-R QFN 40P E-LAN CTRL

C C

Place Close to Chip

1 2

PCIE_PRX_DTX_N3<17>

PCIE_PRX_DTX_P3<17>

PCIE_PTX_C_DRX_N3<17>

PCIE_PTX_C_DRX_P3<17>

CLK_PCIE_LAN#<15> CLK_PCIE_LAN< 15>

PCIE_WAKE#<14,26>

LAN_WAKE#<32>

+3V_LAN

Vendor recommand reseve the PU resistor close LAN chip

B B

A A

+3V_LAN

CLKREQ_LAN#<15>

Near Pin13

5

CL9 0.1U_0402_16V7KCL9 0.1U_0402_16V7K

CL11 0.1U_0402_16V7KCL11 0.1U_04 02_16V7K

1 2

RL6 0_0402 _5%@RL6 0_0402_5%@

1 2

RL7 0_0402 _5%RL7 0_0402_5%

1 2

RL9 4.7K_0402 _5%

1 2

RL11 4.7K_0402_5%@RL11 4.7K_0402_5%@

1

CL17

CL18

2

0.1U_0402_16V4Z

Near Pin19

1 2

@

Near Pin31

1

CL19

2

0.1U_0402_16V4Z

PCIE_PRX_C_DTX_N3

PCIE_PRX_C_DTX_P3

PLT_RST#

LAN_XTALO LAN_XTALI

+1.1_AVDDL +1.1_AVDDL +1.1_AVDDL +1.1_AVDDL_L +1.1_AVDDL

1

CL20

2

Near Pin6

GCLK_LAN_25MHZ<34>

1

CL21

2

1U_0402_6.3V4Z

value shoud be discuss ORB 5P

15P_0402_50V8J

@

0.1U_0402_16V4Z

NOGCLK@

4

29

30

36

35

32 33

25 26

28 27

13 19 31 34

41

CL28

2

3

7 8

4

6

UL1

TX_N

Atheros

TX_P

AR8151/AR8161

RX_N

RX_P

REFCLK_N REFCLK_P

PERST#

WAKE#

SMCLK SMDATA

NC TESTMODE

XTLO XTLI

CLKREQ#

AVDDL AVDDL AVDDL AVDDL AVDDL_REG/AVDD L

GND

QCA8172-AL3A-R_QFN40_5X5

8172@

1 2

RL13 0_0402 _5%

1

25MHZ_10PF_7V25000014

2

@

4

NC

1

OSC

NOGCLK@

DVDDL_REG/DVDD L

1

2

YL1

OSC

NC

15P_0402_50V8J

LED_0 LED_1 LED_2

TRXN0

TRXP0

TRXN1

TRXP1

TRXN2

TRXP2

TRXN3

TRXP3

RBIAS

VDD33

VDDCT/ISOLAN

DVDDL/PPS

AVDDH/AVDD33

AVDDH

AVDDH_REG

CL27

5P_0402_50V8C

@

LAN_XTALI

LAN_XTALO

3

2

1

CL29

2

38

RL12 10K_0402_5%

39 23

12 11 15 14 18 17 21 20

10

1

40

LX

5

24 37

16 22 9

NOGCLK@CL29

NOGCLK@

@

Near

Pin9

12

LDO@

MDI0MDI0+ MDI1MDI1+

LDO@

mount RL12 if us e LDO modue

MDI0- <28> MDI0+ <28> MDI1- <28> MDI1+ <28>

Place Close to PIN1

LAN_RBIAS

+3V_LAN

+LX

+1.7_VDDCT

+1.1_DVDDL

+2.7_AVDDH +2.7_AVDDH

1 2

RL8 2.37K_0402_1%RL8 2.37K_0402_1%

Place Close to P IN1

+LX

RL10 30K_0402_5%RL10 30K_0402_5%

1 2

+2.7_AVDDH

+3V_LAN

1

CL22

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

1

CL23

CL24

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

Near Pin22

3

0.1U_0402_16V4Z

+3V_LAN

1

CL25

CL26

@

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

Near

in37

P

Compal Secret Data

2011/06/15 2012/07/11

Compal Secret Data

CL13

CL12

1 2

1000P_0402_50V7K

@

EMI reserve

Deciphered Date

1

CL14

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

@

+3V_LAN

1

CL15

CL16

2

@

10U_0603_6.3V6M

10U

2

1

2

Place close to Pin16

+3V_LAN

1

CL8

CL10

@

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sh eet of

Date: Sh eet

Compal Electronics, Inc.

LAN-AR8162/8172

LA-7982P

Wednesday, October 03, 2012

LA-7982P

1

27 6 0

1.0

of

5

4

Place Close to TL1

3

@

DL1

AZC099-04S.R7G_SOT23- 6

MDI1+ MDI0+

1

I/O1

I/O3

4

2

Reserve gas tube for EMI go rural solution

1

TX+

TX-

RX+

CT NC NC CT

VDD

I/O4

5

6

RL14

1 2

75_0805_5%

DLL1

16

MDO0+

15

MDO0-

14

MCT

13 12 11

MCT

10

MDO1+

9

MDO1-

DLL1 BS4200N-C-LV_SMB-F2

BS4200N-C-LV_SMB-F2

GAS@

Place Close to TL1

CL30

1 2

10P_0603_50V

12

1 2

CL63 0.1U_0603_50V7KCL63 0.1U_0603_50V7K

1 2

CL61 0.1U_0603_50V7KCL61 0.1U_0603_50V7K

CHASSIS1_GND

DL1

D D

C C

1'S PN:SC300001G00 2'S PN:SC300002E00

1

CL31

0.01U_0402_16V7K

2

MDI0- MDI1-

MDI0+<27> MDI0-<27>

MDI1+<27> MDI1-<27>

MDI0+ MDI0-

MDI1+ MDI1-

2

GND

3

I/O2

TL1

1

TD+

2

TD-

3

CT

4

NC

5

NC

6

CT

7

RD+ RD-8RX-

MHPC_NS681612A

Need check Symbol

JLAN1

MDO0+

MDO0-

MDO1+

MCT

B B

MDO1-

MCT

1

PR1+

2

PR1-

3

PR2+

4

PR3+

5

PR3-

6

PR2-

7

PR4+

8

PR4-

SANTA_130456-121

ME@

GND GND

9 10

CHASSIS1_GND

A A

Security Classification

2011/06/15 2012/07/11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Doc ument Number Rev

B

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

LAN_Transformer

LA-7982P

28 60Wednesday, October 03, 2012

1

1.0

5

4

3

2

1

D D

0.1U_0402_16V4Z

@

1

C587

@C587

2200P_0402_50V7K

C C

@

2

REMOTE1+ EC_SMB_DA2

REMOTE1-

+3VS

C329

1 2

R335

4.7K_0402_5%

@

2

1

U9

1

VDD

2

D+

3

D-

THERM#4GND

EMC1402-2-ACZL-TR MSOP 8P

THERMAL@U9

THERMAL@

8

SCLK

7

SDATA

6

ALERT#

5

EMC1412-A (SA00003YA00) Address 1111_100xb S IC EMC1412-A-ACZL-TR MSOP 8P SENSOR

EC_SMB_CK2

EC_SMB_CK2 <16,22,32>

EC_SMB_DA2 <16,22,32>

REMOTE1,2+/-: T

race width/space:10/10 mil

Trace length:<8"

CPU

H2

H3

HOLEA

1

H_3P8

H3 HOLEA

HOLEA

1

H_3P8

FD1FD1

FD3FD3

FD2FD2

1

FD4FD4

1

H1

H1 HOLEA

HOLEA

B B

1

H_3P8

A

H7

H8

H9

FAN1 Conn

+5VS

R581

12

0_0603_5%

EC_TACH<32>

A A

2

C591

C591 10U_0603_6.3V6M

10U_0603_6.3V6M

1

10U

5

EC_FAN_PWM<32>

ACES_85205-04001

JFAN1

1

2

3

4

5

G5

6

G6

Security Classification

ME@

4

Security Classification

2011/06/15 2012/07/11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

HOLEA

1

H_2P8

2P8 * 7 pcd

3

H9

HOLEA

1

H_2P8

Compal Secret Data

Deciphered Date

H10

H10 HOLEA

HOLEA

1

H_2P8

B

H11

H11 HOLEA

HOLEA

1

H_2P8

H12

H12 HOLEA

HOLEA

1

H_2P8

H18

H18 HOLEA

HOLEA

1

H_2P8

M/B

橢橢橢

H16

H16 HOLEA

HOLEA

1

H_2P5X3P5N

M/B

H17

H17 HOLEA

HOLEA

1

H_3P0N

橢橢

D

E

Compal Electronics,Ltd.

Title

Fintek-Thermal IC/FAN/screw

Size Doc ument Number Rev

B

Date: Sheet of

2

Date: Sheet

LA-9641P

of

29 60Wednesday, October 03, 2012

1

2.0

A

B

C

D

E

F

G

H

SATA HDD Conn.

JHDD1

1

GND

12

SATA_PTX_DRX_P4

1 2 1 2

12

+5VS

C1160.01U_0402_25V7K C1160.01U_0402_25V7K C1140.01U_0402_25V7K C1140.01U_0402_25V7K

SATA_PTX_DRX_N4

R550

0_0805_5%

1 2

10U

1

C602

C602 10U_0603_6.3V6M

10U_0603_6.3V6M

2

SATA_DTX_PRX_N4SATA_DTX_C_IRX_N4 SATA_DTX_PRX_P4

+5V_HDD

1

@

C603

0.1U_0402_16V4Z

2

SATA_PTX_C_DRX_P4<13> SATA_PTX_C_DRX_N4<13>

SATA_DTX_C_PRX_N4<13> SATA_DTX_C_PRX_P4<13>

1 1

+5V_HDD +3VS

R02

1

C598

C598 1000P_0402_50V7K

1000P_0402_50V7K

2

SATA_DTX_C_IRX_P4

1

C599

0.1U_0402_16V4Z

2

C596 0.01U_0402_25V7KC596 0.01U_0402_25V7K C597 0.01U_0402_25V7KC597 0.01U_0402_25V7K

1

C600

@C600

@

1U_0603_10V4Z

2

RX+

3

RX-

4

GND

5

TX-

6

TX+

7

GND

8

3.3V

9

3.3V

10

3.3V

11

GND

12

GND

13

GND

14

5V

15

5V

16

5V

17

GND

18

Reserved

19

GND

20

12V

21 22

SUYIN_127043FB022G278ZR

GND

12V

GND

12V

23 24

2 2

+5VS

+5VALW

12

1

IN

3

R552 10K_0402_5%

10K_0402_5%

OUT

GND

Q100 DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

R568

@ R568

@

10K_0402_5%

ODD_EN<18>

3 3

2

ODD Power Control

@ J9

@

112

JUMP_43X79

S

G

@R552

@

1 2

@Q100

@

R675

@R675

@

100K_0402_5%

G

J9

2

D

13

Q99

@

Q99

@

PMV65XP_SOT23-3~D

2

1

C607

@C607

@

0.01U_0402_25V7K

2

+5V_ODD

1

2

EMI reserve

1

C604

0.1U_0402_16V4Z@

2

C608

C608 10U_0603_6.3V6M

10U_0603_6.3V6M

FOR 15"

SATA ODD FFC Conn.

JODD2

1

SATA_PTX_C_DRX_P5<13> SATA_PTX_C_DRX_N5<13>

SATA_DTX_C_PRX_N5<13>

SATA_DTX_C_PRX_P5<13>

SATA_PTX_C_DRX_P5 SATA_PTX_C_DRX_N5

SATA_DTX_C_PRX_N5 SATA_DTX_C_PRX_P5 SATA_DTX_PRX_P5_15

ODD_DA#<14,32>

1 2

C605 0.01U_0402_25V7K15@C605 0.01U_0402_25V7K15@

1 2

C606 0.01U_0402_25V7K15@C606 0.01U_0402_25V7K15@

1 2

C618 0.01U_0402_25V7K15@C618 0.01U_0402_25V7K15@

1 2

C617 0.01U_0402_25V7K15@C617 0.01U_0402_25V7K15@

ODD_DA#

1 2

R555

+3VS

10K_0402_5%

1 2

R710 0_0402_5%@R710 0_0402_5%@

SATA_PTX_DRX_P5_15 SATA_PTX_DRX_N5_15

SATA_DTX_PRX_N5_15

ODD_DETECT# +5V_ODD

R02

Co-lay

1

2

3

4

5

6

7

8

9

10

HB_A051020-SAHR21

ME@

GND GND

11 12

FOR 14"

SATA ODD Conn.

JODD1

1

GND

1 2

C616 0.01U_0402_25V7K14@C616 0.01U_0402_25V7K14@

SATA_PTX_C_DRX_N5

SATA_DTX_C_PRX_N5 SATA_DTX_C_PRX_P5 SATA_DTX_PRX_P5_14

4 4

1 2

C615 0.01U_0402_25V7K14@C615 0.01U_0402_25V7K14@

1 2

C614 0.01U_0402_25V7K14@C614 0.01U_0402_25V7K14@

1 2

C613 0.01U_0402_25V7K14@C613 0.01U_0402_25V7K14@

SATA_PTX_DRX_P5_14SATA_PTX_C_DRX_P5 SATA_PTX_DRX_N5_14

SATA_DTX_PRX_N5_14

ODD_DETECT# +5V_ODD

ODD_DA#

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

DP

9

+5V

10

+5V

11

MD

12

GND GND13GND

SANTA_205504-1

ME@

GND

15 14

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

D

Compal Secret Data

Deciphered Date

E

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

F

Date: Sheet of

Compal Electronics, Inc.

HDD/ODD/BT Connector

LA-9641P

G

30 60Wednesday, October 03, 2012

H

2.0

5

CX20751 High Definition Audio Codec SoC With Integrated Class-D Stereo Amplifier. An integrated 5 V to 3.3 V Low-dropout voltage regulator (LDO).

An integrated 3.3 V to 1.8V Low-dropout voltage regulator (LDO).

D D

+3VS

1

CA9

CA8

Should be same supply rail as used for

For EMI Near Audio Chip

+3VS

12

@

RA15

4.7K_0402_5 %

HDA_RST_AUDIO#

1

@

CA11

0.1U_0402_16 V4Z

C C

2

using wide copper bridge under codec (100 mils or more)

PCH HDA bus controller section

RA3

+3VS

+3V_PCH

HDA_BITCLK_AUDIO<13>

HDA_SYNC_AUDIO<13>

HDA_SDOUT_AUDIO<13>

1 2

RA4 0_0402_5%RA4 0_0402_5%

HDA_SDIN0<1 3>

HDA_BITCLK_AUDIO

EC_MUTE#<32>

EAPD<32>

0_0402_5%@

HDA_RST_AUDIO#<13>

CA8

2

@

1U_0603_10V4Z

1

CA16

CA17

2

@

4.7U_0603_6.3V6K

1 2

RA9 33_0402_5%RA9 33_0402_ 5%

1 2

RA11 0_04 02_5%RA11 0_ 0402_5%

1

2

Internal analog MIC

1 2

CA64 0.1U_0 402_16V4Z@CA6 4 0.1U_0402_1 6V4Z@

1 2

CA65 0.1U_0 402_16V4Z@CA6 5 0.1U_0402_1 6V4Z@

1 2

CA66 0.1U_0 402_16V4Z@CA6 6 0.1U_0402_1 6V4Z@

B B

22P_0402_50 V8J

follow vendor suggest & reserver default design

CA7

@

Internal SPEAKER

1 2

33_0402_5%

HDA_BITCLK_AUDIO

RA21

@RA21

@

EMI request reserve RA21 & CA7

PC Beep

EC Beep

ICH Beep

A A

BEEP#<32>

HDA_SPKR<13>

5

1 2

CA37 0 .1U_0402_16V4ZCA37 0.1 U_0402_16V4Z

1 2

CA45 0 .1U_0402_16V4ZCA45 0.1 U_0402_16V4Z

12

RA22

RA22 10K_0402_5%

10K_0402_5%

RA492

1 2

33_0402_5%

PC_BEEP

1

CA5

2

0.1U_0402_16V4Z

HDA_RST_AUDIO#

HDA_SYNC_AUDIO

HDA_SDOUT_AUDIO

PC_BEEP

MIC_IN

SPK_L2+ SPK_L1-

SPK_R2+ SPK_R1-

WM-64PCY_2P

4

0.1U_0402_16V4Z

+3VS

+LDO_1.8V

CA24

MIC1

45@

4

3

+VREF_1V65

1

CA1

1

CA6

2

@

4.7U_0603_6.3V6K

CA1

2

1U_0603_10V4Z

1

@

CA15

@

CA10

2

1U_0603_10V4Z

0.1U_0402_16V4Z

10 mils

1

CA25

2

0.1U_0402_16V4Z

4.7U_0603_6.3V6K

9

5 8 6 4

10 39

1

40

36 37

12 14

17 15

1 2

GNDA

@

2

7

3

UA1

VDD_IO

FILT_1.8

RESET#

BIT_CLK SYNC SDATA_IN SDATA_OUT

PC_BEEP SPKR_MUTE#

DMIC_DAT/GPIO1 DMIC_CLK / MUSIC_REQ/GPIO0

MUSIC_REQ/GPIO0/PORTC_L_MIC GPIO1/PORTC_R_MIC

LEFT+ LEFT-

RIGHT+ RIGHT-

GND

41

Place colose to Codec chip

+MICBIASC

1

2

CA42

CA44

0.1U_0402_16V4Z

@

CA3 vendor suggest change to 2.2U

1

CA2

2

0.1U_0402_16V4Z

29

27

18

24

28

AVDD_5V

AVDD_3.3

DVDD_3.3

AVDD_HP

VDDO_3.3

CLASS-D_REF

VREF_1.65V

PORTB_L_LINE

PORTB_R_LINE

PORTD_A_MIC PORTD_B_MIC

CX20757-11Z_QFN40

12

RA23

2.2K_0402_5 %

CA41 1U_06 03_10V4ZCA41 1U_0 603_10V4Z

1 2

CA41 vendor suggest change to 1U

+5VS

SPK_R1-_CONN

SPK_R2+_CONN

2

CA3

1

LPWR_5.0

RPWR_5.0

JSENSE

MICBIASB MICBIASC

HGNDA HGNDB

PORTA_L

PORTA_R

AVEE FLY_P FLY_N

CA4

2.2U_0603_6.3V4Z

6

5

4

AVDD_3.3 pinis output of

1

internal LDO. NOT connect to external supply.

2

0.1U_0402_16V4Z

1

CA19

CA18

@

2

0.1U_0402_16V4Z

4.7U_0603_6.3V6K

13 16 11

38

JSENSE

34 35

32

MICB_L

33

MICB_R

30

APPLE_MIC

31

NOKIA_MIC

25

HGNDA

26

HGNDB

22

HP_L

23

HP_R

21 19 20

1 2

CA29 1U_ 0603_10V4ZCA2 9 1U_0603_ 10V4Z

MIC_INEXT_MIC

DA3

I/O4

I/O2

VDD

GND

I/O3

I/O1

AZC099-04S.R7G_S OT23-6

@

+LDO_OUT_3.3V

+5VS

1

CA26

2

+MICBIASB +MICBIASC

Universal Jack

External MIC

Headphone

wide 20MIL

3

SPK_L1-_CONN

2

1

SPK_L2+_CONN

3

Layout Note:Path from +5VS to LPWR_5.0 RPWR_5.0 must be very low resistance (<0.01 ohms)

1

CA20

CA22

CA21

@

2

0.1U_0402_16V4Z

Please bypass caps very close to device.

0.1U_0402_16V4Z

2

1

CA30

CA35

1

2

0.1U_0402_16V4Z

2.2U_0603_6.3V4Z

CA30 vendor suggest change to 2.2U

LA1

LA1 0_0603_5%

0_0603_5%

LA3

LA3 0_0603_5%

0_0603_5%

SPK_R1SPK_R2+ SPK_L1SPK_L2+

1 2

LA1 FBMA-L11-160808-1 21LMT_0603@LA1 FBMA-L11-160808-121LMT_06 03@

1 2

LA2 FBMA-L11-160808-1 21LMT_0603@LA2 FBMA-L11-160808-121LMT_06 03@

1 2

LA3 FBMA-L11-160808-1 21LMT_0603@LA3 FBMA-L11-160808-121LMT_06 03@

1 2

LA4 FBMA-L11-160808-1 21LMT_0603@LA4 FBMA-L11-160808-121LMT_06 03@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

1

CA23

2

4.7U_0603_6.3V6K

APPLE_MIC HGNDB

NOKIA_MIC HGNDA

HP_L HPO UT_L HP_R HPOUT_R

MICB_L HP_L

MICB_R HP_R

+MICBIASB

LA2

LA2 0_0603_5%

0_0603_5%

LA4

LA4 0_0603_5%

0_0603_5%

1 2

RA17 100_0402_1%RA 17 100_0402_1%

1 2

RA18 100_0402_1%RA 18 100_0402_1%

1 2

RA20 3K_0402_5%RA20 3K_040 2_5%

1 2

RA19 3K_0402_5%RA19 3K_040 2_5%

HPOUT_L

HPOUT_R

HGNDB

HGNDA

LA1~LA4 vendor suggest mount 0 ohm first~ Bead reserve for EMI if needed

SPK_R1-_CONN SPK_R2+_CONN SPK_L1-_CONN SPK_L2+_CONN

vendor suggest change to 1000p

2011/06/15 2012/07/11

2

+5VS

1 2

RA16 100_0402_1%RA 16 100_0402_1%

1 2

RA12 100_0402_1%RA 12 100_0402_1%

1 2

RA13 15_0402_5%RA13 15_0402_5%

1 2

RA14 15_0402_5%RA14 15_0402_5%

12

CA31

@

12

CA33

CA32

@

100P_0402_50V8J

1

CA39

CA38

2

@

1000P_0402_50V7K

Compal Secret Data

Deciphered Date

2

JSENSE

CA36

1 2

1U_0402_6.3V 4Z

CA46

1 2

1U_0402_6.3V 4Z

for Universal jack

12

CA34

@

100P_0402_50V8J

1

CA43

CA40

@

2

@

1000P_0402_50V7K

1 2

RA5 5. 11K_0402_1%RA5 5.11K _0402_1%

RA6 10 K_0402_1%RA6 10K_040 2_1%

1 2

RA7 20 K_0402_1%RA7 20K_040 2_1%

1 2

RA8 39 .2K_0402_1%RA8 39.2K _0402_1%

HGNDA, HGNDB 80mils

CA28

1 2

1U_0402_6.3V 4Z

CA27

1 2

1U_0402_6.3V 4Z

HPOUT_L

HPOUT_R

HGNDB

HGNDA

2

3

@

DA1

1

AZ5125-02S.R7G_SOT23-3

1

Sense resistors must be connected same power that is used for VAUX_3.3

+3VS

mount RA6 on the Jack Sense circuit to configure Port-C for mono MIC.

PLUG_IN

Don't support LINE_IN function RA7 could be @

Check footprint

JHP1

4 3 1 2

PLUG_IN

2

3

@

DA2

1

AZ5125-02S.R7G_SOT23-3

Title

Size Document Num ber Rev

Custom

Date: Sheet of

5

6

SINGA_2SJ2352-0 00131F

ME@

Pin Ref

1:L 2:R 3:GND/MIC 4:MIC/GND 5:normal open 6:GND

JSPK1

1

2

3

4

5

G5

6

G6

ME@

ACES_85205-040 01

Compal Electronics, Inc.

CX20751 Codec

LA-7982P

1

31 60W ednesday, October 03, 2012

1.0

L44

FBM-11-160808-6 01-T_0603

+3VALW +EC_VCCA

+3VALW

+3VS

1 2

R605 10K_0402_5%R605 10K_0 402_5%

1 2

R590 47K_0402_5%R590 47K_0 402_5%

KSO[0..15]<33>

KSI[0..7]<33>

R600

1 2

2.2K_0402_5%

R604

1 2

2.2K_0402_5%

C656

0.1U_0402_16V4Z

L45

FBM-11-160808-6 01-T_0603

12

C660 22P_0402_50V8J@ C660 22P_0402_50V8J@

C661

0.1U_0402_16V4Z

KSO[0..15]

KSI[0..7]

EC_SMB_CK1

EC_SMB_DA1

EC_TACH

PCH_PWROK<14 ,8>

1

2

ECAGND

R589 10_0402_5%@R5 89 10_04 02_5%@

2

1

12

R608

@ R608

@

10K_0402_5%

1

C659

1000P_0402_50V7K

2

12

SUSCLK<14>

+3VLP

+3VALW

C653

0.1U_0402_16V4Z

C653

0.1U_0402_16V4Z

C654

0.1U_0402_16V4Z

C654

0.1U_0402_16V4Z

1

2

GATEA20<18> KBRST#<18>

SERIRQ<16>

LPC_FRAME#<16>

LPC_AD3<16> LPC_AD2<16> LPC_AD1<16> LPC_AD0<16>

CLK_PCI_EC<15>

PLT_RST#<1 4,26,27>

EC_SCI#<18> BATT_LEN#<38>

KSO16<33> KSO17<33>

EC_SMB_CK1<38,39> EC_SMB_DA1<38,39> EC_SMB_CK2<16,22,2 9> EC_SMB_DA2<16,22,2 9>

PM_SLP_S3#<14> PM_SLP_S5#<14> EC_SMI#<18>

EC_INVT_PWM<23>

EC_TACH<29>

LAN_WAKE#<27> EC_TX<26,33> EC_RX<26,33>

EC_FAN_PWM< 29>

LAN_WAKE#

CMOS_ON#<23>

ODD_DA#< 14,30>

NUM_LED#: NC

100K_0402_5%

+3VALW

R606

R606 10K_0402_5%

10K_0402_5%

1 2

SLP_SUS#<14,3 6>

R304

12

C657

1000P_0402_50V7K

C657

1000P_0402_50V7K

1

2

1

GATEA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ

4

LPC_FRAME#

5

LPC_AD3

7

LPC_AD2

8

LPC_AD1

10

LPC_AD0

12

CLK_PCI_EC

13

PCIRST#/GPIO05

37

EC_RST#

20

EC_SCII#/GPIO0E

38

GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

EC_SMB_CK1/GPIO44

78

EC_SMB_DA1/GPIO45

79

EC_SMB_CK2/GPIO46

80

EC_SMB_DA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

GPIO0A

17

GPIO0B

18

GPIO0C

19

GPIO0D

25

EC_INVT_PWM/GPIO11

28

FAN_SPEED1/GPIO14

29

EC_PME#/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

PCH_PWROK/GPIO18

34

SUSP_LED#/GPIO19

36

NUM_LED#/GPIO1A

122

XCLKI/GPIO5D

123

XCLKO/GPIO5E

C93

C93 20P_0402_50V8

20P_0402_50V8

+3VALW_EC

1000P_0402_50V7K

1

2

LPC & MISC

C658

1

2

Int. K/B

Int. K/B Matrix

Matrix

SM Bus

0_0603_5%

C655

0.1U_0402_16V4Z

C655

0.1U_0402_16V4Z

C662

0.1U_0402_16V4Z

C662

0.1U_0402_16V4Z

1

2

LPC_AD3 LPC_AD2 LPC_AD1 BATT_TEMP LPC_AD0

EC_RST# EC_SCI# BATT_LEN#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

EC_SMI#

ODD_DA# EC_INVT_PWM EC_TACH

EC_TX EC_RX PCH_PWROK EC_FAN_PWM

12

R740

@

1

C535

C535 100P_0402_50V8J

100P_0402_50V8J

2

+3VALW

+EC_VCCA

9

22

33

96

125

111

EC_VDD0

EC_VDD/VCC

PWM Output

AD Input

DA Output

PS2 Interface

CPU1.5V_S3_GATE/GPXIOA00

SPI Device Interface

SPI Flash ROM

GPIO

H_PROCHOT#_EC/GPXIOA06

GPO

GPIO

GPI

GND/GND

GND0

11

24

35

94

113

ECAGND

U31

67

EC_VDD/AVCC

BATT_TEMP/GPIO38

EC_MUTE#/GPIO4A

WOL_EN/GPXIOA01

HDA_SDO/GPXIOA02

VCIN0_PH/GPXIOD00

PECI_KB930/GPIO41

BATT_CHG_LED#/GPIO52

CAPS_LED#/GPIO53

PWR_LED#/GPIO54

BATT_LOW_LED#/GPIO55

PM_SLP_S4#/GPIO59

EC_RSMRST#/GPXIOA03 EC_LID_OUT#/GPXIOA04

PROCHOT_IN/GPXIOA05

VCOUT0_PH/GPXIOA07

PBTN_OUT#/GPXIOA09

PCH_APWROK/GPXIOA10

SA_PGOOD/GPXIOA11

LID_SW#/GPXIOD04

PECI_KB9012/GPXIOD07

AGND/AGND

69

PN : SA00004OB20 S IC KB9012QF A3 LQFP 128P KB CONTROLLER

ECAGND

U31

21

GPIO0F

GPIO12

GPIO39

GPIO3B GPIO42

IREF/GPIO3E

GPXIOD06

V18R

SYSON

C492

@

0.1U_0402_10V6K

23 26 27

63 64 65 66 75 76

68 70 71 72

83 84 85 86 87 88

97 98 99 109

119 120 126 128

73 74 89 90 91 92 93 95 121 127

100 101 102 103 104 105 106 107 108

110 112 114 115 116 117 118

124

1

2

BEEP#/GPIO10

ACOFF/GPIO13

ADP_I/GPIO3A

IMON/GPIO43

DAC_BRIG/GPIO3C EN_DFAN1/GPIO3D

CHGVADJ/GPIO3F

USB_EN#/GPIO4B

CAP_INT#/GPIO4C

EAPD/GPIO4D

TP_CLK/GPIO4E

TP_DATA/GPIO4F

SPIDI/GPIO5B

SPIDO/GPIO5C

SPICLK/GPIO58

SPICS#/GPIO5A

ENBKL/GPIO40

FSTCHG/GPIO50

SYSON/GPIO56 VR_ON/GPIO57

BKOFF#/GPXIOA08

AC_IN/GPXIOD01

EC_ON/GPXIOD02

ON/OFF/GPXIOD03

SUSP#/GPXIOD05

KB9012QF A3 LQFP 128P_1 4X14

EMC Request

BEEP# NOVO# ACOFF

BRDID_1 BRDID_0

USB_ON#

TP_CLK TP_DATA

SUSACK#

BATT_CHG_LED# CAPS_LED#

BATT_LOW_LED# SYSON

EC_LID_OUT# Turbo_V PROCHOT MAINPWON_R

BKOFF# PBTN_OUT#

ACIN EC_ON

LID_SW# SUSP#

PCH_HOT#_R

PECI_KB9012

+V18R

1

C667

4.7U_0603_6.3V6K

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R792 0_ 0402_5%@R792 0 _0402_5%@

1 2

R669 43_0402_1%R669 43_0402_1%

BEEP# <31> NOVO# <33> ACOFF <39>

ADP_I <38 ,39>

IMVP_IMON <44>

EC_WL_OFF# <26 > EC_BT_ON# <26>

DPWROK_EC <14>

SUSWARN# <1 4>

EC_MUTE#

VSB_PWR_EN <38>

CAPS_LED# <33> PWR_LED# <33> BATT_LOW_LED# <33>

SYSON <36,41>

VR_ON <44>

PM_SLP_S4# <14>

EC_RSMRST# <14>

EC_LID_OUT# <18>

BKOFF# <23>

PBTN_OUT# <14>

12

BATT_TEMP <37,38>

R593 10K_0402_5%R593 10K_0402 _5%

1 2

EC_MUTE# <31> USB_ON# <35>

EC_TS_ON# <35>

EAPD <31>

TP_CLK <33>

TP_DATA <33>

R738 0_0402_5%@R738 0_0402_5%@

1 2

2011/06/15 2012/07/11

+3VALW

HDA_SDOUT <13>

NTC_V <38>

SUSACK# <14>

ENBKL <22> INTEL_BT_OFF# <26> LAN_PWR_ON# <27> BATT_CHG_LED# <33>

ACIN <14,37,39> EC_ON <40>

ON/OFF <33>

LID_SW# <33> SUSP# <36,4 1,42,43> PCH_HOT# <16>

H_PECI <18,5>

Compal Secret Data

Deciphered Date

3.3V +/- 5%

Vcc

100K +/- 5%

R694

Board ID

0 1 2 3

8.2K +/- 5%

18K +/- 5%

33K +/- 5%

0

BRDID_0

+3VALW

1 2

VR695

0.436 V

0.712 V

@

R694

R694 100K_0402_1%

100K_0402_1%

R695

8.2K_0402_5%

HDA_SDOUT: For ME FALSH

+3VLP

@

12

KB9012A2 work around

R4945

R4945 47K_0402_5%

47K_0402_5%

Turbo_V <38>

PROCHOT <38> MAINPWON <40>

PROCHOT

AD_BID

0 V

min

BRDID_1

R04

Q37

2N7002H_SOT23-3

Custom

typ

V

AD_BID

0.503 V

0.819 V

+3VALW

13

2

G

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

V

max

AD_BID

0 V0 V

0.289 V0.250 V0.216 V

0.538 V

0.875 V

@

R697

R697 100K_0402_1%

100K_0402_1%

1 2

@

R696

8.2K_0402_5%

1 2

TP_CLK

R603 4.7K_04 02_5%R603 4.7K_0402_5%

R598 4.7K_04 02_5%R598 4.7K_0402_5%

TP_DATA

BATT_TEMP

ACIN

LID_SW#

D

S

Compal Electronics, Inc.

BIOS & EC I/O Port

USB_ON#

VSB_PWR_EN

1 2

C663 100P_0402_50V8JC663 100P_040 2_50V8J

C664 100P_0402_50V8JC664 100P_040 2_50V8J

1 2

1

C493

C493 47P_0402_50V8J

47P_0402_50V8J

2

R599 100K_0402_1%@R5 99 100K_0 402_1%@

1 2

R522 4.7K_0402_5%@R522 4.7K_0402 _5%@

R601 100K_0402_1%R601 100K_0402_1%

12

H_PROCHOT# <37,3 8,44,5>

LA-9641P

MP PVT DVT EVT

EC_FAN_PWM

1 2

10K_0402_5%

12

R594

+3VALW

32 6 0Wednesday, October 03, 2012

+5VALW

+3VALW

+5VS

+3VS

12

R588

R588 10K_0402_5%

10K_0402_5%

@

of

2.0

4

3

4

3

TP_CLK<32> TP_DATA<32>

5

6

5

6

+5VS

@C698

@

D15

ACES_85205-0400

C696

@ C696

@

0.1U_0402_16V4Z

3

1

1 2 3 4

2

EC_TX<26,32> EC_RX<26, 32>

1

2

@ C697

@

100P_0402_50V8J

+3VALW

SW3SMT1-05_4P SW3SM T1-05_4P

5

6

J11

1 2

SHORT PADS

EMI reserve

1

C697

2

PSOT24C_SOT23-3

3

4

1

C698 100P_0402_50V8J

100P_0402_50V8J

2

@D15

@

L R

SW4

SW4 SMT1-05_4P

SMT1-05_4P

2

1

SW6 SMT1-05_4P

SMT1-05_4P

2

1

TP_3 TP_2

14@

15@SW6

15@

TP_2 TP_1

JP3

ME@

1 2 3 4

+3VLP

4

3

4

3

R701

R701 100K_0402_5%

100K_0402_5%

1 2

5

6

R627

R627 0_0402_5%

0_0402_5%

R619 0_0402_5%

0_0402_5%

SW5

SW5 SMT1-05_4P

SMT1-05_4P

2

1

SW7 SMT1-05_4P

SMT1-05_4P

2

1

KSI[0..7]

KSO[0..17]

+3VALW

R642

R642 100K_0402_5%

100K_0402_5%

1 2

D26

ON/OFF

NOVO#

NOVO#<32>

ON/OFF

15@

12

14@R619

14@

ON/OFF <32>

JTP1

ME@JTP1

ME@

8

GND

7

GND

6

TP_CLK TP_DATA TP_3 TP_2

TP_1

TP_3

TP_1

5

4

3

2

1

ACES_88058-060N

1

C491

C490

@

2

0.1U_0402_10V6K

2

3

DAN202UT106_SC70-3

14"15 "

1

VCC

2

14@

15@SW7

15@

CLK

3

DAT

4

GND

5

L

6

R

1

VCC

2

CLK

3

DAT

4

L

5

R

GND

6

1

BATT_LOW_LED#<32>

BATT_CHG_LED#<32>

NOVO_BTN#

PWR_LED#<32>

CAPS_LED#<32>

KSI[0..7] <32>

KSO[0..17] <32>

PWR_LED#

BATT_LOW_LED#

BATT_CHG_LED#

CAPS_LED#

USB20_N11<17>

USB20_P11<17>

LED1

21

19-213A-T1D-CP2Q2HY-3T_WHITE

LED2

21

HT-191UD5_AMBER

LED5

21

19-213A-T1D-CP2Q2HY-3T_WHITE

LED6

21

19-213A-T1D-CP2Q2HY-3T_WHITE

USB20_N11

USB20_P11

USB20_N11 USB20_P11

R623

R623 300_0402_5%

300_0402_5%

R764

R764 470_0402_5%

470_0402_5%

R765

R765 300_0402_5%

300_0402_5%

R303

300_0402_5%

L67

1

4

12

+5VALW

12

+3VALW

12

+5VALW

12

+5VS

WCM-2012-900T_4P

2

3

@

12

R687 0_0402_5%R687 0_0402_5%

12

R683 0_0402_5%R683 0_0402_5%

LID_SW#<32>

PJSOT24C 3P C/A SOT-23

KSI1 KSI7 KSI6 KSO9 KSI4 KSI5 KSO0 KSI2 KSI3 KSO5 KSO1 KSI0 KSO2 KSO4 KSO7 KSO8 KSO6

KSO3 KSO12 KSO13 KSO14 KSO11 KSO10 KSO15 KSO16 KSO17

JKB1

1 2 3 4 5 6 7 8 9

10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

ACES_88514-3001

USB20_N11_R

USB20_P11_R

USB20_N11_R USB20_P11_R

@

D24

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

+3VALW

ME@JKB1

ME@

31

GND

32

GND

+3VS

ME@

CVILU_CF06041H0RB-NH

1

2

3

4

GND GND

JCR1

JPWRB1

1

2

LID_SW#

PWR_LED# BATT_LOW_LED# BATT_CHG_LED# CAPS_LED#

3

4

5

6

7

GND

8

GND

ACES_88058-060N

ME@

10

11 12

NOVO_BTN# ON/OFF

2

3

1

+5VALW +3VALW

+5VS

KSI1 KSI7 KSI6 KSO9 KSI4 KSI5 KSO0 KSI2 KSI3 KSO5 KSO1 KSI0 KSO2 KSO4 KSO7 KSO8 KSO6

KSO3 KSO12 KSO13 KSO14 KSO11 KSO10 KSO15

5 6

JLED1

1

2

3

4

5

6

7

8

9

9 10

GND GND

HB_A091020-SAHR21

ME@

JKB2

26

GND2

25

GND1

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

ACES_88514-2401

ME@JKB2

ME@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet of

Compal Electronics, Inc.

ROM/KBD/PWR/CR/LED/TP Conn.

LA-9641P

33 60Wednesday, October 03, 2012

2.0

A

B

C

D

E

Green Clock

RG12

Y8

NC

OSC

RG12

1 2

390_0402_5%

3

OSC

2

NC

+GCLK_VBAT

CG1

0.1U_0402_16V7K

GreenCLK_XTALI GreenCLK_XTALO

1

15P_0402_50V8J

2

+3V_LAN

12

RG8

0_0402_5%

GCLK@ RG8

GCLK@

12

+3V_LAN

GCLK@CG1

GCLK@

GCLK@ CG9

GCLK@

+3VLP

1

CG3

GCLK@C G3

GCLK@

22U_0805_6.3V6M

2

U71

10

VBAT

15

+V3.3A

2

VDD

11

VDDIO_27M

8

VDDIO_25M_A

3

VDDIO_25M_B

1

XTAL_IN

16

XTAL_OUT

SLG3NB244VTR_TQFN 16_2X3

CG9

GCLK@

VDD_RTC_OUT

32kHz

27MHz

25MHz_A

25MHz_B

GND1

GND2

GND3

4

7

13

17

+RTCBATT

RG10

@RG10

@

0_0402_5%

1 2

1

CG4

2.2U_0402_6.3V6M

2

GCLK@

14

9

12

GCLK_27MHZ_R

6

GCLK_LAN_25MHZ_R

5

GCLK_PCH_25MHZ_R

1 2

RG1 0_0 402_5%

GCLK@

1 2

RG3 33_ 0402_5%

GCLK@

1 2

RG4 0_0 402_5%

GCLK@

GCLK_32KGCLK_32K_R

GCLK_LAN_25MHZ

GCLK_PCH_25MHZPCH_GCLK

GCLK_32K <13>

GCLK_LAN_25MHZ <27>

GCLK_PCH_25MHZ <15>

PCH_32.768K AMD_GPU LAN PCH_25M

Close to GCLK

GND4

1 1

GCLK@

1

CG2

2

2 2

3 3

0.1U_0402_16V7K

GCLK@

CG7

0.1U_0402_16V7K

GCLK@ CG8

GCLK@

15P_0402_50V8J

+1.05VS

12

1

2

+CHGRTC_R

RG11

RG11 0_0402_5%

0_0402_5%

GCLK@

CG8

1

2

GCLK@

+3V_LAN+3VLP

GCLK@

1

CG5

2

0.1U_0402_16V7K

4

1

GCLK@

25MHZ_10PF_7V25000014

Reserved for Swing Level adjustment ( Close GCLK side )

*

@

*

GCLK_LAN_25MHZ

GCLK_PCH_25MHZ

4 4

Security Classification

2011/06/15 2012/07/11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

C

Compal Secret Data

Deciphered Date

Title

Size Doc ument Number Rev

B

Date: Sheet of

D

Date: Sheet

1 2

RG6 0_0402 _5%

@

*

1 2

RG7 0_0402 _5%

Compal Electronics, Inc.

USB ext. ports

LA-9641P

2.0

of

34 60Wednesday, October 03, 2012

E

5

4

3

2

1

+3VS +3VS_TS

1 2

TS@

R5583 0_0402_5%

Right Ext.USB Conn.

D D

C713 0.1U_0402_ 16V4ZC713 0.1U_0402 _16V4Z

+USB_VCCB

1

C714

1

+

220U_6.3 V_M

6.3Φ * 5.9 SF000001500

C C

B B

C704

.1U_0402 _16V7K

1 2

A A

2

+5VALW +USB3_VCC A

USB_ON#

+USB3_VCC A

1

+

C736

220U_6.3 V_M

2

SF00000 2Y00

+5VALW

12

USB_ON#<3 2> US B_OC4# <17>

R02

U36

1

GND

VOUT

2

VOUT7VIN

VIN3VOUT

4

FLG

EN

G547I2P 81U_MSOP8

+USB_VCCB

8

6 5

W=80mils

USB20_N9

C715

C715 470P_04 02_50V7K

470P_04 02_50V7K

USB20_N9

USB20_P 9

USB20_N9< 17> USB20_P 9<17>

4

1

L66

4

1

WCM-201 2-900T_4P

USB20_P 9

3

2

R868 0_04 02_5%@R868 0_0 402_5%@ R869 0_04 02_5%@R869 0_0 402_5%@

USB20_N9 _C

USB20_P 9_C

2A/Active Low

R02

U35

1

GND

2

VIN3VOUT

4

EN

G547I2P 81U_MSOP8

C735

1

470P_04 02_50V7K

2

VOUT VOUT7VIN

FLG

5

W=80mils

8

6 5

U2DN1

USB_OC0# <1 7>

D22

@

3

I/O2

2

GND

1

I/O1

AZC099-04 S.R7G_SOT23 -6

RIGHT USB PORT X 1

JUSB3

ME@JUSB 3

ME@

8

GND

7

GND

6

5

4

12

USB20_N9 _C

12

USB20_P 9_C

2

3

D25

@D25

@

1

PJDLC05_ SOT23-3

9

10

8

U3RXDP1

9

7

U3TXDN1

7

6

U3TXDP1

6 5

YSCLAMP05 24P_SLP2 510P8-10-9

9

U3RXDN2 U3RXDN2

10

8

9

7

U3TXDN2

7

6

U3TXDP2

6 5

YSCLAMP05 24P_SLP2 510P8-10-9

6

I/O4

5

+5VALW +5VALW

VDD

4

U2DP1

I/O3

3

2

1

ACES_88 058-060N

D27

@

1

U3RXDN1U3RXDN1

1

2

U3RXDP1

2

4

U3TXDN1

4

5

U3TXDP1

3

8

D30

@

1

2

U3RXDP2U3RXDP2

2

4

U3TXDN2

4

5

U3TXDP2

3

8

D31

3

U2DP2

2

1

AZC099-04 S.R7G_SOT23 -6

4

R5581 100K_04 02_5%

100K_04 02_5%

0.1U_040 2_16V7K

C850 .1U_0402 _16V7K

.1U_0402 _16V7K

1 2

C848 .1U_0402 _16V7K

.1U_0402 _16V7K

1 2

USB30@C850

USB30@

U3TXDN2_L

U3TXDP2_L

USB30@C848

USB30@

EC_TS_ON#<32>

USB20_N1<17>

USB20_P 1<17>

USB3_RX2 _N<17>

USB3_RX2 _P<17>

USB3_TX2_ N<17 >

@

I/O4

I/O2

VDD

GND

I/O3

I/O1

USB3_TX2_ P<1 7>

6

5

4

U2DN2

R5583 0_0402_5%

@R5581

@

1

C1331

2

@

1 2

WCM-201 2-900T_4P

1

4

L55

1 2

0_0402_ 5%

WCM-201 2-900T_4P

1

4

L54

1 2

WCM-201 2-900T_4P

1

4

L53

1 2

R638 0_0402_ 5%

0_0402_ 5%

3

S

G

Q156

2

PMV65XP _SOT23-3~D

@

R728

@R728

@

0_0402_ 5%

R721

@R721

@

0_0402_ 5%

R742

@R742

@

1 2

R743

@R743

@

0_0402_ 5%

R636

@R636

@

0_0402_ 5%

@R638

@

D

13

2

1

USB20_N2< 17> USB20_P 2<1 7>

C1322

TS@

0.1U_0402_16V7K

R20

1 2

R722 0_0 402_5%@R722 0_ 0402_5%@

+3VS_TS

TS_RST#EC_TS_ON#

Intel_PCH_USB2.0

2

U2DN2

2

3

U2DP2

3

2

3

2

3

+USB3_VCC A

U3RXDN2

U3RXDP2

U3TXDN2

U3TXDP2

W=80mils

LP2

JUSB1

9

U3TXDP2

U3TXDN2 U2DP2

U2DN2 U3RXDP2

U3RXDN2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND D-2GND

6

SSRX+

4

GND

5

SSRX-

TAITW_PUB AU1-09FNLSCNN 4H0

ME@

10 11

GND

12

GND

13

GND

2011/06/15 2012/07/11

USB20_N0<17>

USB20_P 0<17>

Intel_PCH_USB3.0

USB3_RX1 _N<17>

USB3_RX1 _P<17>

USB3_TX1_ N<17 >

USB3_TX1_ P<1 7>

Compal Secret Data

Deciphered Date

2

ME@

8

GND

7

GND

6

5

4

3

2

1

JTS1

Touch Screen

C849

USB30@C849

USB30@

.1U_0402 _16V7K

1 2

U3TXDN1_L

1 2

C847

USB30@C847

USB30@

.1U_0402 _16V7K

U3TXDP1_L

1 2

R563

@R563

@

0_0402_ 5%

WCM-201 2-900T_4P

1

4

L51

WCM-201 2-900T_4P

1

4

L50

WCM-201 2-900T_4P

1

4

L49

2

U2DN1

2

3

U2DP1

3

1 2

R562

@R562

@

0_0402_ 5%

1 2

R564

@R564

@

0_0402_ 5%

2

3

1 2

R561

@R561

@

0_0402_ 5%

1 2

R565

@R565

@

0_0402_ 5%

2

3

1 2

R546

@R546

@

0_0402_ 5%

Title

Size Doc ument Numb er Rev

Custom

Date: S heet of

+USB3_VCC A

U3RXDN1

U3RXDP1

U3TXDN1

U3TXDP1

U3TXDN1 U2DP1

U2DN1 U3RXDP1

U3RXDN1

W=80mils

JUSB2

9

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND D-2GND

6

SSRX+

4

GND

5

SSRX-

TAITW_PUB AU1-09FNLSCNN 4H0

ME@

Compal Electronics, Inc.

USB3.0/Left USB Ports

1

35 6 0W ednesday, October 0 3, 2012

LP1

GND GND GND

10 11 12 13

2.0

A

+5VALW

1

C720

4.7U_0603_6.3V6K @

1 1

2 2

4.7U_0603_6.3V6K @

SUSP

SYSON#

DTC124EKAT146_SC59-3

SYSON<32,41>

2

+VSB +VSB

12

R646

R646 150K_0402_5%

150K_0402_5%

5VS_GATE

13

D

Q110

2

2N7002_SOT23

G

S

100K_0402_5%

Q119

@Q119

@

2

SYSON

U38

DMN3030LSS-13_SOP8L-8

8 7

5

R649

82K_0402_5%

+5VALW

12

@

R654

1

OUT

IN

GND

3

12

4

5VS_GATE_R

SLP_SUS#<14,3 2>

+5VS

1 2 36

1

C726

0.01U_0402_25V6

2

1

C721

4.7U_0603_6.3V6K@

2

100K_0402_5%

R781

SLP_SUS

100K_0402_5%

12

DS3@R781

DS3@

1

C722

C722 1U_0603_10V4Z@

1U_0603_10V4Z@

2

R780

Q124

2

IN

12

R644

R644 470_0603_5%

470_0603_5%

@

13

D

Q107

S

2N7002_SOT23

@

+5VALW

12

@R 780

@

1

OUT

GND

DTC124EKAT146_SC59-3

3

B

+3VALW TO +3VS+5VALW TO +5VS

+3VALW +3VS

1

C723

4.7U_0603_6.3V6K @

2

SUSP

G

SUSP

@

2

G

220K_0402_5%

SUSP<5>

DTC124EKAT146_SC59-3

SUSP#<32,41,42,43>

2

12

R647

R647 470K_0402_1%

470K_0402_1%

13

D

Q111

Q111 2N7002_SOT23

2N7002_SOT23

S

R652

SUSP

12

R1110 100K_0402_5%

100K_0402_5%

U39

DMN3030LSS-13_SOP8L-8

8 7

5

4

R650

R650 0_0402_5%

0_0402_5%

@

1 2

+5VALW+RTCVCC

12

@

R653

R653 100K_0402_5%

100K_0402_5%

1 2

Q117

1

OUT

2

IN

GND

3

@R1110

@

1 2 36

1

C727

0.01U_0402_25V6

2

C

D

E

+3VALW TO +3VALW(PCH AUX Power)

1

C724

4.7U_0603_6.3V6K@

2

1

2

C725

C725 1U_0603_10V4Z@

1U_0603_10V4Z@

12

13

D

S

R645

R645 470_0603_5%

470_0603_5%

@

2

SUSP

G

Q108

Q108 2N7002_SOT23

2N7002_SOT23

@

+5VALW

SLP_SUS#

R778

1 2

47K_0402_5%

DS3@

C782

4.7U_0603_6.3V6K

2

G

+3VALW + 3V_PCH

1

DS3@C782

DS3@

2

13

D

DS3@

Q120

Q120 2N7002K_SOT23-3

2N7002K_SOT23-3

S

PJ1

@

2

112

JUMP_43X79

3 1

DS3@

Q121

LP2301ALT1G_SOT23-3

2

1

DS3@

C781

0.1U_0402_16V4Z

2

4.7U_0603_6.3V6K

1

DS3@

2

C783

SLP_SUS

@

1U_0603_10V6K

1

C780

2

12

13

D

S

@

R777

R777 470_0603_5%

470_0603_5%

2

G

@

Q118

Q118 2N7002K_SOT23-3

2N7002K_SOT23-3

+1.35V+1.5VS +0.675VS+1. 05VS

12

3 3

13

D

S

R655

R655 470_0603_5%

470_0603_5%

@

2

G

Q113

Q113 2N7002_SOT23

2N7002_SOT23

@

12

R656

R656 470_0603_5%

470_0603_5%

@

13

D

S

2

SYSON# SUSPSUSP

G

Q114

Q114 2N7002_SOT23

2N7002_SOT23

@

12

R659

R659 470_0603_5%

470_0603_5%

@

13

D

S

2

SUSP

G

Q116

Q116 2N7002_SOT23

2N7002_SOT23

@

12

R658

@ R658

@

22_0603_5%

13

D

@

S

2

G

Q115

Q115 2N7002_SOT23

2N7002_SOT23

For Intel S3 Power Reduction.

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

DC Interface

LA-9641P

E

36 6 0Wednesday, October 03, 2012

2.0

5

DC030006J00

PF101

12A_65V_451012MRL

4

4602-Q04C-09R 4P P2.5@

4602-Q04C-09R 4P P2.5@ JDCIN101

JDCIN101

4

3

2

1

D D

21

APDIN1APDIN

4

PL101

FBMA-L11-453215800LMA90T_2P

1 2

PL102

FBMA-L11-453215800LMA90T_2P

1 2

12

PC101

PC102

100P_0402_50V8J

1000P_0402_50V7K

VIN

12

PC104

PC103

100P_0402_50V8J

1000P_0402_50V7K

3

2

1

+CHGRTC

PR101

1K_0603_1%

PD101

S SCH DIO BAS40CW SOT-323

+RTCBATT

C C

2

1

3

PR102

1K_0603_1%

1 2

+CHGRTC_R

+3VLP

JRTC101

@JRTC101

@

1

2

3

GND

4

GND

ACES_50271-0020N-001

RTC Battery

H_PROCHOT#<32,38,44,5>

61

2

PQ101A

2N7002KDW-2N_SOT363-6

B B

A A

5

4

2N7002KDW-2N_SOT363-6

H_PROCHOT#

PQ101B

2N7002KDW-2N_SOT363-6

34

12

PD105

1N4148WS-7-F_SOD323-2

5

12

PD104

1N4148WS-7-F_SOD323-2

0.022U_0402_16V7K

PR104

1 2

1.5M_0402_5%

0.022U_0402_16V7K

PR105

1 2

1.5M_0402_5%

PR106

PC105

12

PR107

PC106

12

AS393MTR-E1 SO 8P OP

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

1 2

47K_0402_1%

PU101B

3

+5VS

1

O

+5VS

7

O

+3VALW

PU101A

PU101A AS393MTR-E1 SO 8P OP

AS393MTR-E1 SO 8P OP

8

3

P

+

2

-

G

4

8

5

P

+

6

-

G

4

BATT_TEMP <32,38>

ACIN <14,32,39>

2010/01/25 2012/07/11

PR108

1 2

12

PR109

PC107

1 2

100P_0402_50V8J

Compal Secret Data

Deciphered Date

10K_0402_1%

100K_0402_1%

Compal Electronics, Inc.

Title

PWR DCIN / RTC Battery

Size Document Number Rev

Custom

Gx00

Date: Sheet of

2

Date: Sheet of

1

37 47Wednesday, October 03, 2012

0.1

5

4

3

2

1

JBATT201

1

2

3

4

5

6

D D

C C

GND GND

SUYIN_200082GR007M229ZR

JBATT202

GND GND

SUYIN_200082GR007M229ZR

7

8 9

@JBATT202

@

1

2

3

4

5

6

7

8 9

EC_SMCA

EC_SMDA

12

PR204

100_0402_1%

PR204

100_0402_1%

PR201

100_0402_1%

PR201

100_0402_1%

1 2

PR206

6.49K_0402_1%

1 2

PR207

PR207 10K_0402_5%

10K_0402_5%

PF201

PF201 12A_65V_451012MRL

12A_65V_451012MRL

21

VMB2

@

JBATT201

VMB

SMB3025500YA_2P

1 2

12

PC201

PC201 1000P_0402_50V7K

1000P_0402_50V7K

EC_SMB_CK1 <32,39>

EC_SMB_DA1 <32,39>

+3VALW

BATT_TEMP <32,37,38>

PL201

BATT+

12

PC203

0.01U_0402_25V7K

A/D

PH201 under CPU botten side : CPU thermal protection at 93 +-3 degree C Recovery at 56 +-3 degree C

+3VS

@PR215

13

D

@

2

G

PQ201

2N7002KW_SOT323-3

S

1 2

@

PR215

1 2

100K_0402_1%

ADP_OCP_1

PR216 0_0402_5%

0_0402_5%

@PR21 6

@

H_PROCHOT#<32,37,44,5>

PROCHOT<32>

+3VALW+3VALW

90W(DIS) : 27.4K 65W(UMA) : 5.11K

90W(DIS) : 6.65K 100W active 90W recovery 65W(UMA): 1.65K 70W active 65W recovery

ADP_I<32,39>

PR221

1 2

6.65K_0402_1%

Turbo_V<32>

PR222

1 2

10K_0402_1%

ECAGND

20120314 Change to +EC_VCCA from +3VLP

NTC_V<32>

+EC_VCCA

12

PR226

12.7K_0402_1%

12

PH201

12

100K_0402_1%_TSM0B104F4251RZ

PR228

PR228 0_0402_5%

0_0402_5%

ECAGND

PR214

100K_0402_1%

PQ202B

PR214

1 2

100K_0402_1%

61

PQ202A

2

2N7002KDW-2N_SOT363-6

+3VLP

PR220

1 2

100K_0402_1%

BATT_OUT <39>

B+

2

G

1U_0402_6.3V6K

PR223

22K_0402_1%

1 2

13

D

PQ203

2N7002KW_SOT323-3

S

VL

PR217

100K_0402_1%@

13

D

2

PQ205

G

2N7002KW_SOT323-3

G

2N7002KW_SOT323-3

S

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2010/01/25 2012/07/11

SPOK<40>

VSB_PWR_EN<32>

Compal Secret Data

1 2

Deciphered Date

PR218

@PR21 8

@

1K_0402_5%

PR219

@PR21 9

@

1K_0402_5%

@PC204

@

12

PC204

2

PJ202

PJ202 JUMP_43X39@

JUMP_43X39@

2

112

PQ204

@PQ204

@

TP0610K-T1-GE3_SOT23-3

13

12

@PR224

@

@PC205

@

12

PR224

PC205

100K_0402_1%

@PR223

@

+VSBP

Compal Electronics, Inc.

Title

PWR-BATTERY CONN/OTP

Size Document Number Rev

Custom

Gx00

Date: Sheet of

2

0.22U_0603_25V7K

PJ201

PJ201 JUMP_43X39@

JUMP_43X39@

2

112

1

12

PC206

0.1U_0603_25V7K

38 47Wednesday, October 03, 2012

+VSB

+VSBP

@PC20 6

@

+VSB

0.1

PR211

VL

B B

A A

VL

1 2

PR213

1 2

5

PR202

PR202 75K_0402_1%

75K_0402_1%

100K_0402_1%

12

PC202

0.01U_0402_25V7K

BATT_TEMP<32,37,38>

12

PC207

100P_0402_25V8K

3

+

2

-

PR210

8

4

1 2

P

1

O

G

PU201A

AS393MTR-E1 SO 8P OP

47K_0402_1%

PC208

0.022U_0402_16V7K

12

PD201

4

PR205

1 2

1N4148WS-7-F_SOD323-2

PR211

1 2

34

5

2N7002KDW-2N_SOT363-6

1.5M_0402_5%

BATT_LEN#<32>

5

PQ301

PQ301 AO4407AL_SO8

AO4407AL_SO8

DTA144EUA_SC70-3

47K_0402_5%

13

2

PQ307A

PACIN

PQ305

DTC115EUA_SC70-3

ACOFF

8 7

5

PQ304

2

1 3

PQ303

DTC115EUA_SC70-3

PR303

47K_0402_1%

1 2

2

4

VIN

D D

C C

B B

2

PACIN

ACOFF<3 2>

12

PR302

61

2N7002KDW -2N_SOT363-6

P2

1 2 36

12

PC302

PR304

0.1U_0603_25V7K

P2-1

12

P2-2

34

PQ307B

5

13

AO4423L_SO8

1 2 3 6

200K_0402_1%

12

PR306

PR306 20K_0402_1%

20K_0402_1%

13

D

2N7002KW_S OT323-3

G

PR305

S

150K_0402_1%

1 2

64.9K_0402_1%

2N7002KDW-2N_SOT363-6

0.1U_0402_25V6

PQ302

4

PQ306

2

PR308

PC303

1 2

5600P_0402_25V7K

EC_SMB_DA1<32,38>

EC_SMB_CK1<32,38>

8 7

5

1 2

PC301

BATT_OUT <38>

VIN

12

PR309

392K_0402_1%

4

P3

+3VALW

ADP_I<32,38>

100P_0402_50V8J

PR315

200K_0402_1%

1 2

100K_0402_1%

PC304

1 2

PR316

3

2

1

B+

PR301

0.01_1206_1%

1

2

ACPRN<39>

6

ACDET

7

IOUT

8

SDA

9

SCL

10

12

ILIM

4

3

ACN

ACP

PC307

1 2

0.1U_0402_25V6

4

5

ACOK

CMPIN

PU301

BQ24737RGRR_VQFN20_ 3P5X3P5

SRN12BM

11

12

PR317

6.8_0402_5%

PC306

0.1U_0402_25V6

3

CMPOUT

SRP

13

12

PR318

10_0402_5%

12

PC308

2

ACP

GND

14

1 2

PL301

1UH_PCMB061H-1R0M S_7A_20%

1 2

PC310

10U_0805_25V6K@

PC311

12

0.1U_0402_25V6

12

1

ACN

21

TP

20

VCC

19

PHASE

18

HIDRV

17

BTST

REGN

LODRV

15

BST_CHG

16

12

1 2

P2

PR319

10_1206_5%

1 2

BQ24737VCC

DH_CHG

PD301

12

RB751V-40_SOD323-2

PC312

PC312 1U_0603_25V6K

1U_0603_25V6K

DL_CHG

PC313

10U_0805_25V6K@

PC314

1 2

1U_0603_25V6K

PR320

2.2_0603_5%

1 2

BQ24737VDD

1 2

PC315

LX_CHG

0.047U_0603_16V7K

10U_0805_25V6K

PC317

1 2

PC316

10U_0805_25V6K

12

CHG_B+

PQ312

AO4407AL_SO8

1 2 3 6

2200P_0402_50V7K

6

578

6

578

123

DISCHG_G

1 2

DISCHG_G-1

13

PQ309

PQ310

TPC8A03-H 1N SO8

PR322

200K_0402_1%

1 2

PR321

PR321 47K_0402_1%

47K_0402_1%

PQ311

DTC115EUA_SC70-3

2

TPC8065-H 1N SOP-8

10UH_PCMB104T-100MS _6A_20%

12

@

24737_SN

12

@

PD302

PL302

1 2

PR323

4.7_1206_5%

PC320

680P_0603_50V7K

ACOFF

1 2

1SS355_SOD323-2

1 2

PD303

CHG

PC319

1 2

4

PC324

PR324

0.01_1206_1%

1

2

SRP

1 2

12

0.1U_0402_25V6

SRN

8 7

5

PR325

PR325 200K_0402_1%

200K_0402_1%

4

3

VIN

PQ313

2N7002KW_S OT323-3

13

D

2

PACIN

G

S

12

PC322

10U_0805_25V6K

PC323

12

10U_0805_25V6K

BATT+

3

12

PC309

0.1U_0402_25V6

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

2012/07/112010/01/13

2

Title

Size D ocument Number Rev

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

CHARGER-BQ24737

Gx00

0.1

of

39 47Wednesday, Oct ober 03, 2012

1

12

PC305

0.1U_0402_25V6

BQ24737VDD

PR314

10K_0402_1%

4

10K_0402_1%

1 2

PACIN

12

PR312

12K_0402_1%

ACIN <14,32,37>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

12

PR307

47K_0402_1%

ACPRN <39>

PQ308

DTC115EUA_SC70-3

A A

5

DTC115EUA_SC70-3

12

PR310

PR310 10K_0402_1%

10K_0402_1%

13

2

A

1 1

B+

PL401

HCB2012KF-121T50_0805

1 2

12

PC403

0.1U_0402_25V6

2 2

B+

PL403

HCB2012KF-121T50_0805

1 2

12

PC420

PC416

10U_0805_25V6K

3 3

5V_VIN

PC417

3V_VIN

12

PC404

2200P_0402_50V7K

12

2200P_0402_50V7K

PC406

PC405

10U_0805_25V6K

SPOK<38>

12

PC418

0.1U_0402_25V6

5V_VCC

12

8

11

14

12

7

10

10U_0805_25V6K

13

2

SY8208BQKC_QFN14_3X3

PU402

11

IN

14

IN

7

GND

10

GND

13

GND

5

VCC

2

PG

SY8208CQKC_QFN14_3X3

PC422

4.7U_0603_6.3V6M

PU401

IN

GND

PG

EN1

EN2

BS

OUT

LDO

EN1

EN2

BS

LX

OUT

LDO

LX

1

3

6

12

9

4

8

1

3

6

12

9

4

5

3V5V_EN

ENLDO_3V5V

BST_5V

12

B

3V5V_EN

BST_3V

12

PC414

4.7U_0603_6.3V6M

VL

PC430

4.7U_0603_6.3V6M

1 2

0.1U_0603_25V7K

+3VLP

PC421

0.1U_0603_25V7K

1 2

PC402

LX_5V

LX_3V

1.5UH_PCMC063T-1R5MN_9A_20%

@PR404

@

12

PR404

4.7_1206_5%

3V_SN

12

@PC415

@

PC415

680P_0603_50V7K

1.5UH_PCMC063T-1R5MN_9A_20%

12

@PR406

@

PR406

4.7_1206_5%

5V_SN

12

@PC429

@

PC429

680P_0603_50V7K

PL402

1 2

PL404

1 2

C

ENLDO_3V5V

12

PC408

22U_0805_6.3V6M

12

PC423

22U_0805_6.3V6M

12

PC410

PC409

22U_0805_6.3V6M

12

PC424

PC425

22U_0805_6.3V6M

12

@PC413

@

@PC412

@

PC411

22U_0805_6.3V6M

PC426

22U_0805_6.3V6M

PC413

PC412

22U_0805_6.3V6M

12

@PC427

@

@PC428

@

PC427

PC428

22U_0805_6.3V6M

D

PR402

499K_0402_1%

12

PR403

+5VALWP

PR403

PC407

150K_0402_1%

1U_0603_25V6K

+3VALWP +3VALW

+3VALWP

22U_0805_6.3V6M

+5VALWP

22U_0805_6.3V6M

12

RLZ5.1B_LL34

PJ401

@PJ401

@

112

JUMP_43X118

PJ402

@PJ402

@

112

JUMP_43X118

PD401

E

12

B+

2

+5VALW

EC_ON<32>

MAINPWON<32>

4 4

A

12

PR407 2.2K_0402_5%P R4072.2K_0402_ 5%

12

PR408 0_0402_5%PR408 0_0402_5%

12

PR409

1M_0402_1%

12

3V5V_EN

@PC431

@

PC431

4.7U_0402_6.3V6M

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

C

2011/10/03 2014/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

PWR- 3VALWP/5VALWP

Gx00

40 47Wednesday, October 03, 2012

E

0.1

A

STATE S3 S5 1.5VP VTT_REFP 0.75VSP

S0

Hi Hi

S3

S4/S5

1 1

HiLo

Lo Lo

On

Off

On

Off (Hi-Z)

Off Off

Note: S3 - sleep ; S5 - power off

+0.675VSP

12

PC504

PC505

10U_0805_25V6K

+VTT_REFP

12

PC506

PR505

0_0402_5%

1 2

PC506

0.033U_0402_16V7K

0.1U_0402_16V7K

2 2

PR502

49.9K_0402_5%

SUSP#

1 2

SYSON<32,36>

12

PC503

0.1U_0402_16V6K

PC508

PU501

21

PAD

1

VTTGND

2

VTTSNS

3

GND

4

VTTREF

5

VDDQ

12

@PC508

@

PR506

10K_0402_1%

B

+1.35VP

PR503

0_0603_5%

BST_1.35V BST_1.35V-1

1 2

19

VLDOIN

S3

7

S3_1.35V

17

18

BOOT

UGATE

S5

TON

8

9

S5_1.35V

PR507

8.2K_0402_1%

20

VTT

RT8207MZQW _WQFN20_3X3

FB

6

12

PR501

2.2_0603_5%

1 2

16

PHASE LGATE

PGND

CS

VDDP

VDD

PGOOD

10

PR509

887K_0402_1%

12

15

14

13

12

11

12

PR511

6.65K_0402_1%

1.35V_B+

UG_1.35V

LX_1.35V

PC510

1U_0603_10V6K

PC512

0.1U_0603_25V7K

1 2

LG_1.35V

12

PC511

1U_0603_10V6K

PR514

5.1_0603_5%

4

12

5

PQ501

TPCA8065-H_PPAK56-8 -5

123

5

PQ502

123

+5VALW+1.35VP

C

1.35V_B+

@PC520

@

@PC509

@

12

PC501

PC520

10U_0805_25V6K

PL501

1UH_PCMB104T-1R0M H_18A_20%

12

@PR515

@

PR515

4.7_1206_5%

1.35V_SN

12

@PC517

@

PC517

TPCA8057-H_PPAK56-8-5

680P_0603_50V7K

12

PC513

PC509

0.1U_0402_25V6

4.7U_0805_25V6-K

4.7U_0805_25V6-K 2200P_0402_50V7K

2200P_0402_50V7K

12

PL502

1 2

HCB2012KF-121T50_0805

D

B+

+1.35VP

1

+

PC522

2

330U_2.5V_M

+1.35VP OCP min 20A OVP min 1.485V

PJ504

+1.35VP +1.35V

2

112

JUMP_43X118@

PJ506

2

112

JUMP_43X79

@

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

2010/01/25 2012/07/11

Compal Secret Data

Deciphered Date

C

Title

Size D ocument Number Rev

Custom

Date: Sheet of

@

Compal Electronics, Inc.

+1.35V_DDR

Gx00

D

+0.675VS+0.675VSP

0.1

41 47Wednesday, Oct ober 03, 2012

0.1

5

PL603

D D

B+

PL603

HCB2012KF-121T50_0805

1 2

+3VS

PC617

PU602

IN

LX

PG

GND

FB6EN

SY8032ABC_SOT23-6

PR622

PC617

47K_0402_1%

12

PR604

@ PR604

@

0_0402_5%

ILMT_1.5V

12

PR605

PR605 0_0402_5%

0_0402_5%

@

PJ604

C C

+3VALW

1 2

PAD-OPEN 3x3m

12

PC623

PC623 22U_0805_6.3V6M

22U_0805_6.3V6M

8032_VIN

PC624

22P_0402_50V8J

PR619

15K_0402_1%

1 2

4

5

8032_FB

12

PR620

PR620 10K_0402_1%

10K_0402_1%

1 2

4

PU601

11

12

@PC603

@

PC603

0.1U_0402_25V6

2200P_0402_50V7K

3

2

1

8032_1.5V_EN

12

PC614

1 2

0.1U_0402_25V6

PC604

10U_0805_25V6K

PR627

0_0402_5%

B+_1.5V

12

8032_LX

12

SUSP# <32,36,41,42,43>

IN

14

IN

7

GND

10

GND

13

GND

3

ILMT_1.5V

ILMT

2

PG

SY8208DQKC_QFN14_3X3

1UH_PHT32251B-1R0MS_2.34A_20%

1 2

12

8032_SNUB

12

1

PC602

EN

0.1U_0603_25V7K

1 2

6

BST_1.5V

BS

12

LX

9

LX_1.5V

LX

4

FB

8

BYP

5

LDO

12

PC605

PL602

@PR613

@

PR613

4.7_1206_5%

@PC612

@

PC612

1000P_0603_50V7K

12

PC615

PC616

22U_0805_6.3V6M

3

1 2

@ PR603

@

4.7_1206_5%

1 2

1UH_PCMB063T-1R0MS_12A_20%

+3VALW

12

PC606

4.7U_0603_6.3V6K

+1.5VSP

PR602

PR602 1M_0402_1%

1M_0402_1%

PR603

SNB_1.5V

PL601

1 2

PR601

0_0402_5%

12

PC601

@ PC 601

@

680P_0603_50V7K

1 2

12

PR607

30.1K_0402_1%

12

PR608

20K_0402_1%

SUSP# <32,36,41,42,43>

12

PC607

PC608

47U_0805_6.3V6M

330P_0402_50V7K

2

1

+1.5VSP

12

PC609

12

PC610

47U_0805_6.3V6M

PC611

22U_0805_6.3VAM

@ PC611

22U_0805_6.3VAM

@

+1.5VSP

PJ602

2

112

JUMP_43X118@

+1.5VS

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

3

2010/01/25 2012/07/11

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

1.5V

Size Document Number Rev

C

Gx00

Date: Sheet of

1

42 47Wednesday, October 03, 2012

0.1

5

D D

PR701

60.4K_04 02_1%

SUSP#<32,36,41,42>

C C

B B

60.4K_04 02_1%

1 2

PR706

PR704

1 2

10.7K_0402_1%

12

PC702

0.1U_0402_25V6

0.1U_0402_25V6 PR705

PR705

12K_0402_1%

1 2

PC704

1 2

1000P_0402_50V7K

4

12

10K_0402_1%@

1 2

PC703

0.01UF_0 402_25V7K

PR707

PR707 10_0402 _5%

10_0402 _5%

PC701

.1U_0402_16V7K

0.01UF_0 402_25V7K

PC705

PC705 1000P_0 402_50V7K

1000P_0 402_50V7K

1 2

17

PU701

PAD

1

VREF

2

REFIN

TPS5121 9RTER_QFN16_ 3X3

3

GSNS

4

VSNS

COMP5TRIP6GND

PC706

1 2

PR709

1 2

10_0402 _1%

1.05V_EN

16

PGOOD

12

45.3K_0402_1%

PR711

3

PR713

SW

DH

DL

V5

PR713

2.2_0603 _5%

1 2

12

11

10

9

BST_1.05 VSP_1

LX_1.05V SP

DH_1.05V SP

12

PC707

0.1U_060 3_25V7K

1 2

DL_1.05V SP

PC708

1U_0603 _10V6K

4

+5VALW

PR712

100K_0402_1%

1 2

15

BST_1.05 VSP

13

14

EN

MODE

BST

PGND

8

7

6

578

6

578

123

2

1.05VSP_ B+

PC711

PQ701

PQ702

TPC8A03-H 1N SO8

PC711

TPC8065-H 1N SOP-8

1 2

1UH_PCMB063T-1R0MS_1 2A_20%

12

PR714

4.7_1206_5%

@

12

PC709

1000P_0603_50V7K

@

1

PJ701

2

112

JUMP_43 X118@

PL702

HCB2012 KF-121T50_080 5

1 2

@PC713

@

@PC715

@

12

PC713

PC712

10U_0805_25V6K

2200P_0402_50V7K

PL701

12

PC715

0.1U_0402_25V6

4.7U_0805_25V6-K

1

+

PC714

2

+1.05VP

220U_6.3V_M

OCP min 8A

+1.05VS+1.05VSP

B+

+1.05VSP

OVP min 1.24V

A A

Security Class ification

2010/01/ 25 2012/07/ 11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/01/ 25 2012/07/ 11

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

+1.05VS

Size Do cument Number Rev

Custom

Gx00

Date: Sheet o f

2

Date: Sheet o f

43 47Wednesd ay, October 03, 20 12

1

0.1

5

D D

Place close to phase 1 inductir

C C

PC902

390P_0402_50V7K

1 2

PR902

49.9_0402_1%

1 2

PR903

1K_0402_1%

VSSSENSE<10,9>

VCCSENSE<9>

B B

PR934

0_0402_5%

1 2

ALER# pull high at HW side need to confirm HW circuit

VR_SVID_DAT<9>

A A

VR_SVID_ALRT#<9>

VR_SVID_CLK<9>

37W=10K 47W=7.5K

1 2

PR904

7.5K_0402_1%

12

PC903

1000P_0402_50V7K

1 2

0_0402_5%

PR905

12

PH901

220K_0402 _5%_ERTJ0EV224J

1K_0402_1%

PC904

10P_0402_25V8K

1 2

+5VS

PR906

130_0402 _1%

1 2

Close VR side

4

PR901

75K_0402_ 1%

1 2

PR907

+VCCIO_OUT

PR911

165K_0402_1%

1 2

CPU_B+

IMVP_IMON<32>

1 2

12

PC905

0.01U_040 2_25V7K

1 2

PR909

1K_0402_5%

1 2

PC906

2200P_0402_50V7K

1 2

PR908

2_0603_5%

PR910

54.9_040 2_1%

1 2

24.3K_0402_1%

1 2

.1U_0402_16V7K

PC907

1 2

2.2U_0603 _10V7K

SDIO

ALERT#

SCLK

PR912

PC908

H_PROCHOT#<32,37,38,5>

PC901

1 2

1000P_040 2_50V7K

12

1 2

PC910

1 2

220P_0402 _50V7K

1 2

VR_ON<32>

PC909

PC909 .1U_0402_16V7K

.1U_0402_16V7K

CSCOMP

37W=10K 47W=15.4K

PR913

15.4K_0402_1%

0_0402_5%

1 2

PR915

0_0402_5%

1 2

28 29 30 31 32 33 34 35 36

37

PR914

ILIM IOUT VRMP COMP FB DIFFOUT VSN VSP VCC

GND

12

3

PC911

1000P_040 2_50V7K

CSSUM

27

26

CSSUM

CSCOMP

EN1VRHOT#2SDIO3ALERT#4ROSC7SCLK

@PC98 7

@

PC987

0.1U_0402 _25V6K

<14>

2

PR918

121K +-1% 0603

1 2

PR919 121K +-1% 0603

121K +-1% 0603

1 2

121K +-1% 0603

1 2

CSP3

CSP2

CSP1

PU901

20

19

21

25

24

22

23

NCP81103MNTWG_QFN36_5X5

BST3

CSP3

CSP1

CSP2

DRON

CSREF

PWM2/IMAX

PVCC PGND

VR_RDY

TSENSE

INT_SEL

5

6

8

9

TSENSE

SDIO

ALERT#

SCLK

VR_RDY

PR917

34.8K_0402_1%

1 2

12

PR916

1.91K +-1 % 0402

+3VS

VGATE

@37WPR919

@37W

PR920

PR922

66.5K_0402_1%

1 2

BST_CPU_Phase3

18

HG3

17

SW3

16

LG3

15 14 13

LG1

12

SW1

11

HG1

10

BST1

PR921

45.3K_0402_1%

1 2

PC912

PC912 .1U_0402_16V7K

.1U_0402_16V7K

1 2

SWN3

SWN2

SWN1

CSREF <45>

DRON <45>

37W: @ 47W: INSTALL

37W=43K 47W=66.5K

81103_PWM <45>

PR924

2.2_0603_5%

1 2

HG3 <45>

LG3 <45>

LG1 <45>

HG1 <45>

PR925

2.2_0603_5%

1 2

BST_CPU_Phase1

TSENSE

1 2

Place close to phase 1 MOSFET

0.22U_0402_10V6K

BST_CPU_Phase3-2

2.2U_0603_10V7K

0.22U_0402_10V6K

BST_CPU_Phase1-1

12

PR942

PR942 0_0402_5%

0_0402_5%

PH902

PR923

1 2

61.9K_040 2_1%

CSREF

12

PC916

PR926

5.76K_0402_1%

CSP3

CSREF

CSP2

CSREF

CSP1

PC913

1 2

PC914

1 2

PC915

1 2

VRHOT Assert Thr eshold : 472 mV TSENSE Bias Curr ent : 120 uA PRZ146=61.9K, 11 0C active

100K_0402 _1%_TSM0B104F42 51RZ

1 2

@20K_0402 _1%

0.047U_04 02_16V7K

12

@37WPC9 17

@37W

PC917

0.047U_04 02_16V7K

12

PC918

0.047U_04 02_16V7K

PR927

1 2

PR928

1 2

SW3 <45>

SW1 <45>

37W: @ 47W: INSTALL

5.76K_0402_1%

@20K_0402 _1%

5.76K_0402_1%

@20K_0402 _1%

+5VS

PR929

PR930

PR931

12

CSP2

SWN3 <45>

SWN2 <45>

SWN1 <45>

+5VS

12

@47WPR93 2

@47W

PR932

2K_0402_1 %

37W: INSTALL 47W: @

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/12/14 2012/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

CPU_CORE1

Gx00

1

0.1

44 47Wednesday, October 03, 2012

0.1

5

4

3

2

1

D D

B+

CPU_B+

5

PQ901

PR935

@37WPR935

@37W

2K_0402_1%

4

5

PQ902

4

BSTA2 BSTA2_1

1

2

12

3

EN_VCORE2

4

VCC_VCORE2

123

PR936

2.2_0603_5%

1 2

PU902 @37W

PU902 @37W NCP81151MNTBG_DFN8_2X2

NCP81151MNTBG_DFN8_2X2

HG1<44>

SW1<44>

LG1<44>

C C

B B

81103_PWM<44>

DRON<44>

PR933 0_0402_5%

0_0402_5%

@37WPR933

@37W

12

@37WPC919

@37W

PC919

2.2U_0603_10V7K

+5VS

A A

12

PC920

10U_0805_25V6K

MDU1516URH_POWERDFN56-8-5

MDU1511RH_POWERDFN56-8-5

@37WPR936

@37W

9

BST

FLAG

8

PWM

DRVH

7

EN

SW

6

VCC

GND

5

DRVL

12

PC925

10U_0805_25V6K

PL902

0.22UH +-20% PCMB104T-R22MS 35A

1

4

3

4.7_1206_5%

680P_0603_50V7K

0.22U_0402_10V6K

2

R22

0.82mohm

PQ903

4

PQ904

4

V1N_CPU

PR939

PR939 10_0402_1%

10_0402_1%

@37W

5

MDU1516URH_POWERDFN56-8-5

123

5

MDU1511RH_POWERDFN56-8-5

123

12

@PR937

@

PR937

SNUB_CPU1

@PC922

@

12

PC922

12

@37WPC923

@37W

PC923

HG2

SW2

LG2

@37W

12

+CPU_CORE

CSREF <44>

SWN1 <44>

12

@PR940

@

PR940

SNUB_CPU2

@PC930

@

12

PC930

12

0.22UH +-20% PCMB104T-R22MS 35A

4.7_1206_5%

680P_0603_50V7K

HG3<44>

SW3<44>

LG3<44>

CPU_B+

12

@37WPC932

@37W

@37WPC933

@37W

PC932

PC933

10U_0805_25V6K

@37WPR941

@37W

12

+CPU_CORE

SWN2 <44>

PL903

@37WPL903

@37W

1

4

3

2

PR941 10_0402_1%

10_0402_1%

V2N_CPU CSREF

PL901

FBMA-L11-453215800LMA90T_2P

1 2

1

+

PC986

2

220U_25V_M

5

123

5

123

PC986

MDU1516URH_POWERDFN56-8-5

MDU1511RH_POWERDFN56-8-5

PC985

PQ905

PQ906

4

1

@PC941

@

12

+

PC941

2

100U_25V_M

0.1U_0402_25V6K

12

CPU_B+

12

PC942

2200P_0402_50V7K

CPU_B+

12

PC938

PC939

10U_0805_25V6K

PR944

+CPU_CORE

12

CSREF

SWN3 <44>

PL904

0.22UH +-20% PCMB104T-R22MS 35A

12

SNUB_CPU3

12

1

2

@PR943

@

PR943

4.7_1206_5%

@PC940

@

PC940

680P_0603_50V7K

4

3

V3N_CPU

10_0402_1%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

3

2011/12/14 2012/12/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

CPU_CORE2

Size Document Number Rev

C

Date: Sheet of

1

Gx00

45 47Wednesday, October 03, 2012

0.1

5

4

3

2

1

+CPU_CORE

+CPU_CO RE

D D

12

PC946

22U_0805_6.3V6M

C C

12

PC947

22U_0805_6.3V6M

3 X 330u/9m(47W) 34 X 22u/0805

1

+

330U_D2_2V_Y

PC948

2

1

PC949

2

22U_0805_6.3V6M

1

PC950

2

22U_0805_6.3V6M

1

+

330U_D2_2V_Y

PC954

PC951

2

1

PC952

PC955

2

1

2

PC955

2

22U_0805_6.3V6M

1

PC956

PC953

2

22U_0805_6.3V6M

1

+

PC957

2

@330U_D2_2V_Y

1

PC958

2

22U_0805_6.3V6M

1

PC959

2

22U_0805_6.3V6M

2X330u/9m(37W) 34 X 22u/0805

1

12

PC963

PC960

2

@330U_D2_2V_Y

22U_0805_6.3V6M

12

PC964

PC961

22U_0805_6.3V6M

12

PC962

PC965

22U_0805_6.3V6M

1

PC966

2

22U_0805_6.3V6M

12

PC967

22U_0805_6.3V6M

12

PC968

22U_0805_6.3V6M

1

PC972

PC969

2

12

PC970

12

PC971

22U_0805_6.3V6M

12

PC973

22U_0805_6.3V6M

12

PC974

22U_0805_6.3V6M

12

PC975

PC978

PC980

PC982

2

22U_0805_6.3V6M

12

PC976

PC979

22U_0805_6.3V6M

12

PC977

22U_0805_6.3V6M

PC982

22U_0805_6.3V6M

12

PC983

PC984

PC981

22U_0805_6.3V6M

PC984

22U_0805_6.3V6M

B B

A A

Security Class ification

2012/04/03

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/04/03

3

Compal Secret Data

Deciphered Date

2014/12/31

2

Compal Electronics, Inc.

Title

PROCESSOR DECOUPLING

Size Do cument Number Rev

Gx00

Date: Sheet o f

Wednesd ay, October 03, 20 12

Date: Sheet o f

Wednesd ay, October 03, 20 12

Date: Sheet o f

Wednesd ay, October 03, 20 12

1

4746

0.1

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 2

for PWR

Reason for change PG# Modify List Date PhaseItem

1

D D

2

3

4

5

6

C C

7

8

9

10

11

12

B B

13

14

15

A A

16

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

2009/01/06 2012/07/11

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size D ocument Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PIR (PWR)

Gx00

1

0.1

47 47Wednesday, Oct ober 03, 2012

0.1

Compal LA-9642P Shark Bay UMA, G410, G510 Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual