Compal LA-961 888L2 SOLANO2-M, Inspiron 2500 Schematic

COMPAL CONFIDENTIAL

MODEL NAME : 888L2(SOLANO2-M)

Date: 01/11/01
Version: 2.0

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Cover Sheet

888L2 Main Board

1 42Thursday, January 11, 2001

2.0

MODEL NAME : 888L2 (SOLANO2-M)

LCD/INV. CONN.

DISPLAY CACHE CONN. & ITP

CARD-BUS

CONTROLLER

OZ 6933T

IDSEL: AD19
PIRQA#, PIRQC#

PCCARD
POWER

PAGE 20 PAGE 20

PAGE 12

LVDS

CRT CONN.

VCH

MINI_PCI CONN

MODEM/LAN

IDSEL: AD27, AD28

PAGE 19 PAGE 29

CARDBUS
SLOT 1/2

PIRQB#, PIRQD#

RJ11 RJ45

PAGE 12

PAGE 13

Sub board

PAGE 13

DVO/Vlink

PCI BUS

AC_LINK1/LAN

FWH

UPGA2
Socket

FSB BUS

GMCH2-M

IDSEL: AD11

HOST-HUB BRIDGE

IDSEL: AD13

INTERNAL GFX

PAGE 7,8,9 PAGE 10

BUS#0, DEV#30, DEV#31:

HUB, LPC, IDE, USB, SMBUS,
AC'97

BUS#1, DEV#8:

INTERNAL LAN CONTROLLER

PAGE 14

ICH2-M

LPC BUS

Decoupling
CapacitorS

PAGE 4,5,6 PAGE 6

MEMORY BUS

SODIMM 0
SODIMM 1

HUB_ILNK

PAGE 14,15,16

AC_LINK0

HDD CONN.

SECOND MODULE

CD-ROM
CONN.

USB CONN.

AMP & AC97
CODEC

CONN.

PAGE 17

PAGE 17

PAGE 17

PAGE 18

PAGE 27

CLOCK
CIRCUIT

PAGE 11

DC/DC
CIRCUIT

PAGE 30-34

PAGE 22

PAGE 25

PAGE 23

KB BIOS

RTC BATT &
ON/OFF BTN

INT KBD

PS/2
KEYBOARD &
MOUSE CONN.

NS PC87570EXT

KBD

T-PAD
CONN.

SUSPEND
CKT

PAGE 26PAGE 23PAGE 25

NS PC87393

X Bus

LPC-TO-X Bus

& S/IO

PAGE 21PAGE 22

SIO

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

PIO

FDD.

PAGE 17PAGE 24PAGE 24

Head
Phone

PAGE 28 PAGE 28 PAGE 28

MicLine in

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

System Block Diagram

888L2 Main Board

2 42Thursday, January 11, 2001

2.0

Revision History

# Description Version

Date

1

2 2000/9/20 Second Release

3 2000/11/3 Third Release

4 2000/12/27 Fouth Release

5 2001/01/11 2.0fifth release (QT)

First Release 0.12000/7/21

(EVT-SST)

(DVT1-PT1)

(DVT2-PT2)

(ST)

0.2A

0.2C1

1B

Chip information

GMCH2-M FW82815EM

Version S-spec. Q-spec.

A0
A1

SL4MP

ICH2-M FW82801BAM

Version S-spec. Q-spec.

A0
B0
B1

SL45HQ
SL4HN

B2 QA56, QA57

VCH FW82807AA

Version S-spec. Q-spec.

A0 Q989
A1 QA76

A2 QB41ES

QA38
QA75

Q908, Q909, Q910, Q911, Q912
Q967, Q968
QA36, QA37

EVT

(SST)

GMCH2-M QA38ES (A0)

Q967ES (B0)ICH2-M

VCH Q989ES (A0)

DVT1

(PT1)

GMCH2-M
ICH2-M
VCH

DVT2 (PT2)

QA75ES (A1)
QA57ES (B2)
Q076ES (A1)

ST

GMCH2-M
ICH2-M
VCH

QT same as ST

A1
B2

A2

Title

Revision History

Size Document Number Rev

888L2 Main Board

Date: Sheet of

Compal Electronics, Inc.

3 42Thursday, January 11, 2001

2.0

A

HA#[3..31]<7>

+CPU_IO

4 4

3 3

2 2

1 1

R243 56.2_1%1 2
R42 1.5K1 2
R107 1501 2
R106 1501 2
R44 1.5K

R293 1.5K12

+CPU_IO

BSEL0

+CPU_IO

BSEL1

+2_5V_CLK

RP32 8P4R-1.5K1 8

+CPU_IO

R100 1.5K12
R101 56.2_1%12

BSEL[1:0] STSEM BUS FREQUENCY

00

*

01
10
11

12

R26
10K_0402

1 2

R105
@10K_0402

1 2

12

R104
100_0402

R210 1.5K

2 7
3 6
4 5

66MHZ
100MHZ
RESERVED
133MHZ

A

CPURST#
FLUSH#
PICD0_CPU
PICD1_CPU
FERR#

RCPUSLP#

CPU_PWRGD<14>

12

STPCLK#<14>

HREQ#0<7>
HREQ#1<7>
HREQ#2<7>
HREQ#3<7>
HREQ#4<7>

BPRI#<7>

BNR#<7>

HLOCK#<7>

HITM#<7>

DEFER#<7>

HTRDY#<7>

A20M#<14>

FERR#<14>

IGNNE#<14>

INTR<14>

NMI<14>

HA#[3..31]

HA#3

L3

HA#4

K3

HA#5

J2

HA#6

L4

HA#7

L1

HA#8

K5

HA#9

K1

HA#10

J1

HA#11

J3

HA#12

K4

HA#13 HD#10

G1

HA#14

H1

HA#15

E4

HA#16

F1

HA#17

F4

HA#18

F2

HA#19

E1

HA#20

C4

HA#21

D3

HA#22

D1

HA#23

E2

HA#24

D5

HA#25

D4

HA#26

C3

HA#27

C1

HA#28

B3

HA#29

A3

HA#30

B2

HA#31

C2

A4
A5
B4

C5

T2

V4

V2
W3
W5
W2

ADS#<7>

HIT#<7>

RS#0<7>
RS#1<7>
RS#2<7>

FERR#

SMI#<14>

ITP_TDO
ITP_TDI
ITP_TMS
ITP_TRST#
ITP_TCK
ITP_PREQ#
GTL_PRDY#
BSEL0
BSEL1

RCPUSLP#
THERMDA

THERMDC

AB2

AA1
AB1

Y2

E6

V21

AD9

R21710_0402 12

C6
U4

T4

R1

V1

Y4

U3

AA21

Y21
W21
W19

U2

U1
AA2
W1

Y1

AD10
AC12
AC13

V5

AB10

AC15
AD13
AD14

AA14
AA11
AB20

W20
AA12
AB15

AB18

AC19
AC11

AB12
AA15

AB16

COPPERMINE

ITP_TDO<13>

ITP_TDI<13>

ITP_TMS<13>

ITP_TRST#<13>

ITP_TCK<13>

ITP_PREQ#<13>

GTL_PRDY#<13>

U5A

A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
RP#

ADS#

AERR#
AP0#
AP1#
BERR#
BINIT#
IERR#

BREQ0#
BPRI#
BNR#
LOCK#

HIT#
HITM#
DEFER#

BP2#
BP3#
BPM0#
BPM1#
TRDY#
RS0#
RS1#
RS2#
RSP#

A20M#
FERR#
IGNNE#
PWRGOOD
SMI#

TDO
TDI
TMS
TRST#
TCK
PREQ#
PRDY#
BSEL0
BSEL1

INTR/LINT0
NMI/LINT1
STPCLK#
SLP#

THERMDA
THERMDC

B

REQUEST
PHASE
SIGNALS

ERROR
SIGNALS

ARBITRATION
PHASE
SIGNALS

SNOOP PHASE
SIGNALS

RESPONSE
PHASE
SIGNALS

PC
COMPATIBILITY
SIGNALS

DIAGNOSTIC
& TEST
SIGNALS

EXECUTION
CONTROL
SIGNALS

THERMAL DIODE

ITP_TDO
ITP_TDI
ITP_TMS
ITP_TRST#
ITP_TCK
ITP_PREQ#
GTL_PRDY#

B

COPPERMINE

DATA
PHASE
SIGNALS

C

HD[0..63]

HD#0

D10

D0#

HD#1

D11

D1#

HD#2

C7

D2#

HD#3

C8

D3#

HD#4

B9

D4#

HD#5

A9

D5#

HD#6

C10

D6#

HD#7

B11

D7#

HD#8

C12

D8#

HD#9

B13

D9#

A14

D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

DEP0#
DEP1#
DEP2#
DEP3#
DEP4#
DEP5#
DEP6#
DEP7#

DBSY#

DRDY#

PICCLK

PICD1
PICD0

FLUSH#

RESET#

BCLK

EDGCTRLN

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

INIT#

HD#11

B12

HD#12

E12

HD#13

B16

HD#14

A13

HD#15

D13

HD#16

D15

HD#17

D12

HD#18

B14

HD#19

E14

HD#20

C13

HD#21

A19

HD#22

B17

HD#23

A18

HD#24

C17

HD#25

D17

HD#26

C18

HD#27

B19

HD#28

D18

HD#29

B20

HD#30

A20

HD#31

B21

HD#32

D19

HD#33

C21

HD#34

E18

HD#35

C20

HD#36

F19

HD#37

D20

HD#38

D21

HD#39

H18

HD#40

F18

HD#41

J18

HD#42

F21

HD#43

E20

HD#44

H19

HD#45

E21

HD#46

J20

HD#47

H21

HD#48

L18

HD#49

G20

HD#50

P18

HD#51

G21

HD#52

K18

HD#53

K21

HD#54

M18

HD#55

L21

HD#56

R19

HD#57

K19

HD#58

T20

HD#59

J21

HD#60

L20

HD#61

M19

HD#62

U18

HD#63

R18

V20
T21
U21
R21
V18
P21
P20
U19

AA3
T1

R102 @33_040212C97 @15PF

AA18

PICD1_CPU

Y20

PICD0_CPU

AB21
AA10

FLUSH#

AC9

CPURST#

A6

M3
AA16

R261
110_1%

R214
@33_0402

1 2
12

C209

1 2

@15PF

C

R103 0_040212
R99 0_040212

VCH_VID0
VCH_VID1
VCH_VID2
VCH_VID3
VCH_VID4

DBSY# <7>
DRDY# <7>

INIT# <14>
CPURST# <7,13>

CLK_HOST_CPU <11>

1 2

HD#[0..63] <7>

RP42

8P4R-0
1 8
2 7
3 6
4 5
1 2

@0_0402

1K_0402

R429

R19

@1K_0402

PICD1
PICD0

1 2

1 2

1 2

R18

R22
1K_0402

D

+3VS

RP40

8P4R-10K
1 8
2 7
3 6
4 5

1 2

R30 @10K

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3 VID3
CPU_VID4

R_VID0
R_VID1
R_VID2
R_VID3
R_VID4

R24
1K_0402

1 2

1 2

R27
1K_0402

+3VS

U4

4 5

8 9
14 15
18 19
22 23

1

SN74CBT3383

* 900MHZ

* 850MHZ

*

+3VS

R245 10K_0402

12

C312
2200PF

D

+3VS

C310

.1UF

1 2

THERMDA

THERMDC

1 2
1 2

R258 1K_0402

CLK_APIC_CPU <11>
PICD1 <14>
PICD0 <14>

E

RP41

8P4R-1K
1 8
2 7
3 6
4 5

1 2

R20 1K

VR_HI/LO#

CPU_VID[0..4]

VCH_VID[0..4]
VID[0..4]

C0A0
C1A1
C2A2
C3A3
C4A4

VCC

GNDBX

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3

CPU_VID4

23
67
1011
1617
2021

24
1213

VR_HI/LO# <15,30>

+3VS

B0 D0
B1 D1
B2 D2
B3 D3
B4 D4

BE#

VID[4:0] CPU VCC
00000

00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111

1 2

R246 1K_0402

Title

Size Document Number Rev

Date: Sheet of

2.00

1.95

1.90

1.85

1.80

1.75

1.70

1.65

1.60

1.55

1.50

1.45

1.40

1.35

1.30
NO CPU

2

15

NC
NC

STBY#

NC
NC

ALERT#

DXP
DXNNCADD1

ADD0

678910

VCC
SMBC
SMBD

U20MAX1617A
16
13

5
1
3

4

Compal Electronics, Inc.

COPPERMINE-A

888L2 Main Board

GND

GND

CPU_VID[0..4] <5>

VCH_VID[0..4] <12>
VID[0..4] <30>

VID0
VID1
VID2

VID4

+5VS

12

C22
.1UF

VID[4:0] CPU VCC
10000 1.275

10001
10010
10011
10100
10101
10110
10111
11000
11001
11010
11011
11100
11101
11110
11111

14

SMB_EC_CK1 <12,22,23,31>

12

SMB_EC_DA1 <12,22,23,31>

11

Address: 1001_110x

E

1.250

1.225

1.200

1.175

1.150

1.125

1.100

1.075

1.050

1.025

1.000

0.975

0.950

0.925
NO CPU

4 42Thursday, January 11, 2001

2.0

A

1 2

+CPU_IO

L47

Murata LQG21N4R7K10

10UF_10V_1206

+GTLREF

4 4

3 3

+2_5V_CLK

C194

.1UF

1 2

2 2

1 1

1K_1%

1 2

R209

1.5K_1%

R215

+CPU_IO

12

+GTLREF
C336
.1UF

12

C208
.1UF

12

C32

12

C217
.1UF

IST_CPU_PERF#<15>

R262

A

12

C339
.1UF

1.5K

C34
.1UF

12

C35

22UF_10V_1206

12

C250
.1UF

+2_5V_CLK

R25
2K_1%

1 2

R28
2K_1%

1 2

12

+VCCT_VCCA

+VCCT_VSSA

12

C263
.1UF

+CPU_CORE

R96

56.2_1%

1 2

12

C205
.1UF

+CMOSREF

+TESTHI

TESTLO1

1 2

C202

.1UF

+CLKREF

R29
1K_0402

12

TESTLO2

R23
1K_0402

1 2

L2

M2

E5
E16
E17

F5

F17

U5
Y17
Y18

H8

H10
H12
H14
H16

J7

J9
J11
J13
J15

K8
K10
K12
K14
K16

L7

L9
L11
L13
L15

M8
M10
M12
M14
M16

N7

N9
N11
N13
N15

P8
P10
P12
P14
P16

R7

R9
R11
R13
R15

T8
T10
T12
T14
T16

U7

U9
U11
U13
U15

AB19

P2

AA9

AD18

R2

AD19

AD17

Y5

N5

AD20

H4

AA17

G4

COPPERMINE

U5B

VCCA
VSSA

VREF0
VREF1
VREF2
VREF3
VREF4
VREF5
VREF6
VREF7

VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49

RSVD
CLKREF

CMOSREF1
CMOSREF2

GHI#
RTTIMPEDP

TESTHI

TESTLO1
TESTLO2

TESTP1
TESTP2
TESTP3
TESTP4

B

PLL ANALOG VOLTAGE

COPPERMINE

POWER,
GROUND,
RESERVED
SIGNALS

B

VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8

VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99

VSS100
VSS101

C

A2
A7
A8
A12
A21
B1
B5
B6
B7
B8
B10
B15
B18
C9
C11
C15
C16
C19
D2
D6
D7
D9
E3
E7
E8
E9
E10
E11
E13
E19
F3
F6
F7
F8
F9
F10
F11
F12
F13
F14
F15
F16
F20
G3
G19
H2
H7
H9
H11
H13
H15
H20
J4
J8
J10
J12
J14
J16
J19
K2
K7
K9
K11
K13
K15
K20
L5
L8
L10
L12
L14
L16
L19
M7
M9
M11
M13
M15
M20
N2
N3
N4
N8
N10
N12
N14
N16
N18
N19
N20
P5
P7
P9
P11
P13
P15
P19
R3
R4
R5
R8
R10

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

+CPU_IO

+CPU_CORE

CPU_VID0<4>
CPU_VID1<4>
CPU_VID2<4>
CPU_VID3<4>
CPU_VID4<4>

C

U5C

G6

VCCT0

G7

VCCT1

G8

VCCT2

G9

VCCT3

G10

VCCT4

G11

VCCT5

G12

VCCT6

G13

VCCT7

G14

VCCT8

G15

VCCT9

G16

VCCT10

G17

VCCT11

H6

VCCT12
VCCT13
VCCT14
VCCT15
VCCT16
VCCT17
VCCT18
VCCT19
VCCT20
VCCT21
VCCT22
VCCT23
VCCT24
VCCT25
VCCT26
VCCT27
VCCT28
VCCT29
VCCT30
VCCT31
VCCT32
VCCT33
VCCT34
VCCT35
VCCT36
VCCT37
VCCT38
VCCT39
VCCT40
VCCT41
VCCT42
VCCT43
VCCT44
VCCT45
VCCT46
VCCT47
VCCT48
VCCT49
VCCT50
VCCT51
VCCT52
VCCT53
VCCT54
VCCT55
VCCT56
VCCT57
VCCT58
VCCT59
VCCT60
VCCT61
VCCT62
VCCT63
VCCT64
VCCT65
VCCT66
VCCT67
VCCT68
VCCT69
VCCT70
VCCT71

VID0
VID1
VID2
VID3
VID4

COPPERMINE

POWER, GROUND AND NC

H17

J6

J17

K6

K17

L6

L17

M6

M17

N6

N17

P1
P6

P17

R6

R17

T6

T17

U6

U17

V6
V7
V8

V9
V10
V11
V12
V13
V14
V15
V16
V17

W6
W7
W8

W9
W10
W11
W12
W13
W14
W15
W16
W17

Y6
Y7

Y8
AA6
AA7
AA8
AB6
AB7
AB8

AC6
AC7
AC8
AD6
AD7
AD8

AD2
AD3
AD4
AC4

AB4

COPPERMINE

uPGA2 and uBGA2 PIN P1:
for low voltage Cumine CPU: connect to +CPU_CORE, only uBGA2 package.
for normal Cumine CPU: connect to +CPU_IO.

VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138

VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147

VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155

VSS159
VSS160
VSS161

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8

NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
NC19
NC20
NC21
NC22
NC23
NC24

D

R12
R14
R16
R20
T3
T5
T7
T9
T11
T13
T15
T18
T19
U8
U10
U12
U14
U16
U20
V3
V19
W4
W18
Y3
Y9
Y10
Y11
Y12
Y13
Y14
Y15
Y16
Y19
AA4
AA13
AA20
AB3

AB5
AB9
AB11
AB13
AB14
AB17
AC1
AC2

AC5
AC10
AC14
AC16
AC18
AC21
AD1

AD5
AD16
AD21

A15
A16
A17
C14
D8
D14
D16
E15
G2
G5
G18
H3
H5
J5
M4
M5
P3
P4
AA5
AA19
AC3
AC17
AC20
AD15

D

E

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

COPPERMINE-B

888L2 Main Board

5 42Thursday, January 11, 2001

E

2.0

A

4 4

B

C

D

E

12

C289

.1UF_0402

12

C304

.1UF_0402

+CPU_CORE +CPU_CORE+CPU_CORE

12

+ C110

+CPU_CORE

12

+

220UF_D_4V

6.3V

C185
220UF_D_4V

6.3V

12

+ C113

12

+

220UF_D_4V

6.3V

C427
220UF_D_4V

6.3V

+CPU_IO

+CPU_IO

12

C251

.1UF_0402

12

C299

.1UF_0402

12

+ C105

12

+

220UF_D_4V

6.3V

C183
220UF_D_4V

6.3V

12

C286

.1UF_0402

12

C337

.1UF_0402

12

12

12

C300

.1UF_0402

12

C256

.1UF_0402

+ C271

220UF_D_4V

6.3V

C296

+

220UF_D_4V

6.3V

12

C273

.1UF_0402

12

C272

.1UF_0402

12

+ C33

+CPU_CORE

12

+

12

C309

.1UF_0402

12

C192

.1UF_0402

220UF_D_4V

6.3V

C420
220UF_D_4V

6.3V

12

C285

.1UF_0402

12

C249

.1UF_0402

12

+ C321

12

+

12

C311

12

C55

220UF_D_4V

6.3V

C409
220UF_D_4V

6.3V

.1UF_0402

1UF

12

C342

.1UF_0402

12

C182

1UF

12

+ C386

12

+

220UF_D_4V

6.3V

C406
220UF_D_4V

6.3V

12

C343

.1UF_0402

12

+ C188

220UF_D_4V

12

12

12

C344

.1UF_0402

+ C184

220UF_D_4V

6.3V

C173

+

220UF_D_4V

6.3V

+CPU_CORE

12

12

C334

10PF

C332

10PF

12

C353

10PF

12

C381

10PF

12

C422

.1UF

12

C100

.1UF

12

C31

.1UF

C101

C99

.1UF

.1UF

12

12

+CPU_CORE +CPU_CORE

12

12

C345

3 3

C392

1UF

1UF

12

C391

12

C237

1UF

1UF

12

12

C36

.1UF

C423

.1UF

12

C244

.1UF

12

C102

.1UF

12

C103

.1UF

+CPU_CORE

12

C267

.1UF_0402

12

C268

.1UF_0402

12

C278

.1UF_0402

12

C277

.1UF_0402

12

C276

.1UF_0402

12

C279

.1UF_0402

12

C292

.1UF_0402

12

C291

.1UF_0402

12

C290

.1UF_0402

+CPU_CORE

12

C275

.1UF_0402

2 2

12

C305

.1UF_0402

12

C303

.1UF_0402

12

C293

.1UF_0402

12

C265

.1UF_0402

12

C266

.1UF_0402

12

C269

.1UF_0402

12

C301

.1UF_0402

12

C302

.1UF_0402

+CPU_CORE

12

C316

.1UF_0402

12

C320

.1UF_0402

12

C319

.1UF_0402

12

C328

.1UF_0402

12

C330

.1UF_0402

12

C315

.1UF_0402

12

C318

.1UF_0402

12

12

C421

.1UF

12

C329

.1UF_0402

C98

.1UF

+CPU_CORE

12

12

C505

C504

1 1

1UF

1UF

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

CPU BYPASS

888L2 Main Board

E

6 42Thursday, January 11, 2001

2.0

5

HD#[0..63]<4>

D D

C C

B B

+CPU_IO

12

R299
1K_1%

12

R314

2K_1%

C424

.1UF

A A

HD#[0..63]

U7A

HD#0

AA1

AD11

AD10

AF12
AB11
AB10

AC10

AF10
AD14
AD12

AB12

AE11

AE15

AF11

AF13

AB14

AF14

AB13

AB15

AE13
AC14
AD13
AD15

AF16

AF15
AC12

HD#0

AB2

HD#1

AF2

HD#2

AD4

HD#3

AB1

HD#4

AB3

HD#5

AA3

HD#6

AC4

HD#7

AC1

HD#8

AF3

HD#9

AD1

HD#10

AE3

HD#11

AD2

HD#12

AD3

HD#13

AF1

HD#14

AA4

HD#15

AD6

HD#16

AC3

HD#17

AE1

HD#18

AB6

HD#19

AF4

HD#20

AE5

HD#21

AC8

HD#22

AB5

HD#23

AF5

HD#24

AC6

HD#25

AF6

AF8
AD8
AD5

AB7

AF7
AD7

AB8
AE7
AE9
AB9

AF9

AD9

HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

GMCH2v0

HOST

VGA_LMD28

VGA_LDQM3

VGA_LMD29
AGP_ADSTB0
AGP_ADSTB1
AGP_SBSTB

HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

+GTLREF

C400
.1UF

5

4

HA#[3..31]

U6

GTLREFA

AA10

GTLREFB

AA7

HCLKIN

H3

RSTIN#

AA5

CPURST#

L4

HLOCK#

M3

DEFER#

G1

ADS#

N4

BNR#

M5

BPRI#

J3

DBSY#

J1

DRDY#

K1

HIT#

L3

HITM#

K3

HTRDY#

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8

HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

RS#0

RS#1

RS#2

HA#3

R4

HA#4

P1

HA#5

T2

HA#6

R3

HA#7

N5

HA#8

P5

HA#9

R1

HA#10

U1

HA#11

P2

HA#12

T1

HA#13

T3

HA#14

P3

HA#15

T5

HA#16

R5

HA#17

V5

HA#18

Y2

HA#19

V3

HA#20

W1

HA#21

U4

HA#22

V2

HA#23

W3

HA#24

W4

HA#25

U5

HA#26

Y5

HA#27

Y3

HA#28

U3

HA#29

Y1

HA#30

W5

HA#31

V1

HREQ#0

M1

HREQ#1

N1

HREQ#2

M2

HREQ#3

L5

HREQ#4

N3

RS#0

K2

RS#1

L1

RS#2

H1

For external AGP bus pull up/down resistors.

VGA_LMA7
VGA_LMD11 VGA_LCS#
VGA_LMD12
VGA_LMD30 VGA_LMD24

1 2

R391 8.2K_0402

1 2

R393 8.2K_0402

1 2

R395 8.2K_0402

1 2

R397 8.2K_0402

1 2

R399 8.2K_0402

1 2

R400 8.2K_0402

4

HA#[3..31] <4>

@33_0402

1 2

+GTLREF

PCIRST# <12,14,19,21,29>

CPURST# <4,13>
HLOCK# <4>
DEFER# <4>
ADS# <4>
BNR# <4>
BPRI# <4>
DBSY# <4>
DRDY# <4>
HIT# <4>
HITM# <4>
HTRDY# <4>

+3VS

+3VS +3VS

RP38

1
2
3
4
5

10P8R-8.2K

+3VS

C408 @18PFR296

CLK_HOST_GMCH <11>

1 2

R195 10K_0402

1 2

R204 10K_0402

HREQ#[0..4]

RS#[0..2]

10
9

VGA_LMA10

8
7
6

AGP_ADSTB#0

AGP_ADSTB#1
AGP_SBSTB#
VGA_LMA6

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

LTVDA
LTVCL

HREQ#[0..4] <4>

RS#[0..2] <4>

VGA_LMD27

R392 8.2K_0402
R394 8.2K_0402
R396 8.2K_0402
R398 100K_0402

+3VS

1 2

R255 4.7K_0402

GMBSDA<12>

GMBSCL<12>

+3VS

R79 4.7K_0402

1 2
1 2
1 2
1 2

3

VGA_LCKE<13>

VGA_LCAS#<13>

VGA_LTCLK1<13>
VGA_LTCLK0<13>

VGA_LRAS#<13>

VGA_LCS#<13>

1 2

1 2

R73 36.5_1%

R265

Place 10 ohm within 0.5" of
GMCH ball 'R22' and route
trace 1.5" to ball 'P22'

3

VGA_LDQM0
VGA_LMD4
VGA_LMD7
VGA_LMD3
VGA_LMD6
VGA_LMD2
VGA_LMD5
VGA_LMD1
VGA_LMD0
VGA_LMA4
VGA_LDQM1
VGA_LMA2
VGA_LMD8
VGA_LMA5
VGA_LMD9
VGA_LMA1
VGA_LMA8
VGA_LMD14
VGA_LMA11
VGA_LMD15
VGA_LMA9
VGA_LMD16
VGA_LMA0
VGA_LMD17
VGA_LCKE
VGA_LMD18
VGA_LCAS#
VGA_LMD19
VGA_LTCLK1
VGA_LMD20
VGA_LTCLK0
VGA_LMD21

VGA_LMA3
VGA_LMD10
VGA_LMD13
VGA_LRAS#

VGA_LMA10
VGA_LMD11
VGA_LMD12
VGA_LMA7
VGA_LCS#
VGA_LMA6
VGA_LMD27

VGA_LMD24

AGP_ADSTB0
AGP_ADSTB#0
AGP_ADSTB1
AGP_ADSTB#1
AGP_SBSTB
AGP_SBSTB#

VGA_LMD30

+AGPREF_2GMCH

GRCOMP

10_0402

1 2

+AGPREF_2GMCH

C356

@22PF

W21
W24
W22
W26

AE26
AD25
AC26

AA24

AD26

AB24

U7C

K26

G_AD0/LDQM0

J22

G_AD1/LMD4

K25

G_AD2/LMD7

J21

G_AD3/LMD3

L24

G_AD4/LMD6

J20

G_AD5/LMD2

L26

G_AD6/LMD5

K23

G_AD7/LMD1

K22

G_AD8/LMD0

M25

G_AD9/LMA4

M24

G_AD10/LDQM1

M26

G_AD11/LMA2

M21

G_AD12/LMD8

N24

G_AD13/LMA5

N22

G_AD14/LMD9

N26

G_AD15/MA1

T26

G_AD16/LMA8

T22

G_AD17/LMD14

U24

G_AD18/LMA11/LBA

T23

G_AD19/LMD15

U26

G_AD20/LMA9

T24

G_AD21/LMD16

V24

G_AD22/LMA0

U21

G_AD23/LMD17

V25

G_AD24/LCKE

V21

G_AD25/LMD18

V26

G_AD26/LCAS#
G_AD27/LMD19
G_AD28/LTCLK1
G_AD29/LMD20
G_AD30/LTCLK0

Y21

G_AD31/LMD21

H23

G_C/BE#0/LMA3

N21

G_C/BE#1/LMD10

T25

G_C/BE#2/LMD13

Y26

G_C/BE#3/LRAS#

R26

G_FRAME#/LMA10

P26

G_DEVSEL#/LMD11

P23

G_IRDY#/LMD12

P21

G_TRDY#/LMA7

P25

G_STOP#/LCS#

R24

G_PAR/LMA6
G_REQ#/LMD27
G_GNT#
PIPE#/LMD24

M22

AD_STB0

L23

AD_STB#0

U22

AD_STB1

V23

AD_STB#1

Y23

SB_STB
SB_STB#

RBF#/LMD30
WBF#

J24

AGPREF

J26

GRCOMP

G10

NC

R22

LOCLK

P22

LRCLK

+3VS

1 2

12

GMCH2v0

VGA_LMA[0..11]<13>
VGA_LMD[0..31]<13>

VGA_LDQM[0..3]<13>

R76
300_1%_0402

R74
200_1%_0402

C76

470PF_0402

C75

470PF_0402

AGP

12

12

2

HUB

R77
82_0402

R75
82_0402

2

TVCLKIN/STALL

CLKOUT0
CLKOUT1

LTVVSYNC

DVO

LTVHSYNC

DCLKREF

HLPSTRB
HLPSTRB#
HLZCOMP

SBA0/LMD31
SBA1/LMD25

SBA2/LDQM2

SBA3/LMD26
SBA4/LMD23

SBA5/LWE#

SBA6/LMD22

SBA7/LGM_FRQ_SEL

ST0/LMD28

ST1/LDQM3

ST2/LMD29

VGA_LMA[0..11]
VGA_LMD[0..31]
VGA_LDQM[0..3]

CLK_DOT_GMCH

1

LTVD0
LTVD1
LTVD2
LTVD3
LTVD4
LTVD5
LTVD6
LTVD7
LTVD8

LTVD9
LTVD10
LTVD11

BLANK#

LTVDA
LTVCK

DDCK

DDDA

IWASTE

IREF

VSYNC

HSYNC

GREEN

BLUE

HLCLK

HL10

HLREF

RED

HL0
HL1
HL2
HL3
HL4
HL5
HL6
HL7
HL8
HL9

AD16
AF17
AE17
AD17
AF18
AD18
AF20
AD20
AC20
AF21
AE21
AD21
AB19
AC18
AE19
AF19
AC16
AB17
AA20
AB21

AB18
AA18
AE24
Y20
AD23

AF22
AF23
AD22
AE22
AE23

F22
H24
H26
H25
G24
F24
E26
E25
D26
D25
D24
C26
H21
G25
F26

+GMCH_HLCOMP

H20

AB22
AB25
AB23
AB26
AA22
AA26
Y22
Y25

AD24
AC24
AC23

DVO_D0
DVO_D1
DVO_D2
DVO_D3
DVO_D4
DVO_D5
DVO_D6
DVO_D7
DVO_D8
DVO_D9
DVO_D10
DVO_D11
DVO_BL#
DVO_CLKOUT

DVO_VSYNC
DVO_HSYNC
LTVDA
LTVCL

CLK_DOT_GMCH

R92 174_1%1 2

CRT_VSYNC
CRT_HSYNC
CRT_R
CRT_G
CRT_B

CLK_HUB_GMCH
HL0
HL1
HL2
HL3
HL4
HL5
HL6
HL7
HL8
HL9
HL10

HL_STB
HL_STB#

R71 36.5_1%

VGA_LMD31
VGA_LMD25
VGA_LDQM2
VGA_LMD26
VGA_LMD23
VGA_LWE#
VGA_LMD22
VGA_LFSEL

VGA_LMD28
VGA_LDQM3
VGA_LMD29

HL[0..10]

DVO_D[0..11]

DVO_BL# <12>
DVO_CLKOUT <12>
DVO_CLK# <12>
DVO_CLK <12>
DVO_VSYNC <12>
DVO_HSYNC <12>
LTVDA <12>
LTVCL <12>

3VDDCCL <13>
3VDDCDA <13>

CRT_VSYNC <13>
CRT_HSYNC <13>
CRT_R <13>
CRT_G <13>
CRT_B <13>

HL_STB <14>
HL_STB# <14>

1 2

VGA_LWE# <13>
VGA_LFSEL <8,13>

HL[0..10] <14>

DVO_D[0..11] <12>

DVO_CLKOUT

CLK_DOT_GMCH <11>

+HUBREF_GMCH

+1_8VS

MODIFY ON 6/11

300_1%_0402

12

C355
.01UF

TYPEDET# +VDDQ AGP-REF

0
1

CLK_HUB_GMCH

12

R263
@33_0402

C317
@18PF

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

GMCH2-M - 1/3

888L2 Main Board

12

R267
@33_0402

12

C370
@22PF

1.5V

3.3V

CLK_HUB_GMCH <11>

1

7 42Thursday, January 11, 2001

R47
@33_0402

1 2
12

C62

@10PF

+1_8VS

R72

R70

300_1%_0402

0.5VDDQ

0.4VDDQ

12

12

2.0

5

4

3

2

1

Power-Up Strap Options
Pin Name Strap Description Configuration InternalInterface
SCAS# Host Freq. "H" : 133MHz (Default)

"L" : 100MHz

SWE# System"H" : 100MHz (Default)Host Freq.

D D

SMAA11 IOQ Depth

"H" : 4 (Default) System
"L" : 1

SMAA10 "H" : Normal SystemALL Z

SMAA9

FSB P-MOS Kicker Enable System"H" : Enabled (Default)

"L" : Disabled (Cumine)

SMAC6#

SMAC5#

*

VGA_LFSEL#

C C

B B

A A

Enable VCH Serial
Programming Mode

Enable Quick Start
Support

"L" : Disabled
"L" : Enabled (Default) System

(Quick Start Mode)

"H" : Disabled

(Stop Grant Mode)

Local Memory Freq. Select "H" : 133MHz (Default)

"L" : 100MHz

RP2 8P4R-10
MD32
MD33 MD2
MD34
MD35

MD36
MD37
MD38 MD5
MD39

MD43
MD42
MD41
MD40

MD47
MD46
MD45 MD13
MD44

MD20
MD21
MD22
MD23

MD16
MD17
MD18
MD19

MD28
MD29
MD30
MD31

MD24
MD25
MD26
MD27

45
36
27
18

45
36
27

18
RP3 8P4R-10
RP4 8P4R-10

4 5
3 6
2 7
1 8

4 5
3 6
2 7
1 8

RP5 8P4R-10

RP10 8P4R-10

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

RP31 8P4R-10
RP15 8P4R-10

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

RP13 8P4R-10

5

MMD32
MMD33
MMD34
MMD35

MMD36
MMD37
MMD38
MMD39

MMD43
MMD42
MMD41
MMD40

MMD47
MMD46
MMD45
MMD44

MMD20
MMD21
MMD22
MMD23

MMD16
MMD17
MMD18
MMD19

MMD28
MMD29
MMD30
MMD31

MMD24
MMD25
MMD26
MMD27

MD3

MD0

MD7
MD6

MD4

MD8
MD9
MD10
MD11

MD14
MD12

MD60
MD61
MD62
MD63

MD59
MD58
MD57
MD56

MD52
MD53
MD54
MD55

MD48
MD49
MD50
MD51

RP27 8P4R-10

45
36
27
18

45
36
27

18
RP28 8P4R-10
RP29 8P4R-10

4 5
3 6
2 7
1 8

4 5
3 6
2 7
1 8

RP7 8P4R-10

RP33 8P4R-10
1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

RP34 8P4R-10
RP11 8P4R-10

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

RP12 8P4R-10

MMD3
MMD2
MMD1MD1
MMD0

MMD7
MMD6
MMD5
MMD4

MMD8
MMD9
MMD10
MMD11

MMD15MD15
MMD14
MMD13
MMD12

MMD60
MMD61
MMD62
MMD63

MMD59
MMD58
MMD57
MMD56

MMD52
MMD53
MMD54
MMD55

MMD48
MMD49
MMD50
MMD51

System
Memory

Memory"L" : 66MHz

Memory

Memory"L" : All Z

Memory
System"H" : Enabled (Default)
Memory

Memory

AGP/LM i815/i815-m

4

PULL_UP

MMD0
MMD1
MMD2

PULL_UP

PULL_UP

PULL_UP

PULL_UP

PULL_UP

PULL_UP

VGA_LFSEL<7,13>

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

MMD3
MMD4
MMD5
MMD6
MMD7
MMD8
MMD9
MMD10
MMD11
MMD12
MMD13
MMD14
MMD15
MMD16
MMD17
MMD18
MMD19
MMD20
MMD21
MMD22
MMD23
MMD24
MMD25
MMD26
MMD27
MMD28
MMD29
MMD30
MMD31
MMD32
MMD33
MMD34
MMD35
MMD36
MMD37
MMD38
MMD39
MMD40
MMD41
MMD42
MMD43
MMD44
MMD45
MMD46
MMD47
MMD48
MMD49
MMD50
MMD51
MMD52
MMD53
MMD54
MMD55
MMD56
MMD57
MMD58
MMD59
MMD60
MMD61
MMD62
MMD63

3

RMWEA#
SCASA#
SBS0
MMA9
MAC#5
MAC#6
CSA#4
VGA_LFSEL#

U7B

D23

SMD0

C23

SMD1

D22

SMD2

F21

SMD3

E21

SMD4

G20

SMD5

F20

SMD6

D20

SMD7

F19

SMD8

E19

SMD9

D19

SMD10

E18

SMD11

B18

SMD12

F18

SMD13

G18

SMD14

D17

SMD15

A3

SMD16

A1

SMD17

C1

SMD18

F2

SMD19

G3

SMD20

D6

SMD21

C5

SMD22

B4

SMD23

D4

SMD24

C2

SMD25

D3

SMD26

E4

SMD27

F5

SMD28

G4

SMD29

J6

SMD30

K5

SMD31

A26

SMD32

A25

SMD33

B24

SMD34

A24

SMD35

B23

SMD36

A23

SMD37

C22

SMD38

A22

SMD39

D21

SMD40

B21

SMD41

A21

SMD42

C20

SMD43

B20

SMD44

A20

SMD45

C19

SMD46

A19

SMD47

A4

SMD48

A2

SMD49

B1

SMD50

E1

SMD51

G2

SMD52

E6

SMD53

D5

SMD54

C4

SMD55

B3

SMD56

D2

SMD57

E3

SMD58

F4

SMD59

F6

SMD60

G5

SMD61

H4

SMD62

J4

SMD63

GMCH2v0

R285 @10K_04021 2
R281 10K_04021 2
R292 10K_04021 2
R301 10K_04021 2
R305 10K_04021 2
R307 @10K_04021 2
R290 @10K_04021 2
R68 @10K_040212

SMAA0
SMAA1
SMAA2
SMAA3
SMAA4
SMAA5
SMAA6
SMAA7
SMAA8

SMAA9
SMAA10
SMAA11
SMAA12

SMAB#4
SMAB#5
SMAB#6
SMAB#7

SMAC#4
SMAC#5
SMAC#6
SMAC#7

MEMORY

SCSA#0
SCSA#1
SCSA#2
SCSA#3
SCSA#4
SCSA#5

SCSB#0
SCSB#1
SCSB#2
SCSB#3
SCSB#4
SCSB#5

SRAS#

SCAS#

SWE#

SCKE0

SCKE1

SCKE2

SCKE3

SCKE4

SCKE5

SCLK

SDQM0
SDQM1
SDQM2
SDQM3
SDQM4
SDQM5
SDQM6
SDQM7

SRCOMP

SBS0
SBS1

MMA1

B16

MMA2

F12

MMA3

A16
B12
A12
C11
A11

MMA8

D12

MMA9

C13

MMA10

E11

MMA11

A13

MMA12

B7

MAB#4_R

B15

MAB#5_R

A15

MAB#6_R

C14

MAB#7_R

A14
B10

SMAC#5

A10

SMAC#6

C10

SMAC#7

A9

SBS0

B13

SBS1

D11
D15

A17

CSA#2

D14

CSA#3

E14

CSA#4

E13

CSA#5

B17
F9

F8
D10
D9
B9
A8

SRASA#

C16

SCASA#

D18

RMWEA#

E16

D8
E8

CKE2

E9

CKE3

D7
C8
C7

F7

DQMA#0

D16

DQMA#1

F15

DQMA#2

A7

DQMA#3

A6

DQMA#4

A18

DQMA#5

C17

DQMA#6

B6

DQMA#7

A5

SRCOMP

G7

2

MMA0

D13

MAB#6_R
MAB#7_R
MAB#4_R
MAB#5_R

SMAC#6SMAC#4
SMAC#7
SMAC#4
SMAC#5

SBS0 <10>
SBS1 <10>

CSA#2 <10>
CSA#3 <10>
CSA#4 <10>
CSA#5 <10>

SRASA# <10>
SCASA# <10>
RMWEA# <10>

CKE2 <10>

CKE3 <10>
CKE4 <10>
CKE5 <10>

DQMA#0 <10>

DQMA#1 <10>

DQMA#2 <10>

DQMA#3 <10>

DQMA#4 <10>

DQMA#5 <10>

DQMA#6 <10>

DQMA#7 <10>

R297 36.5_1%1 2

MD[0..63]<10>

MMA0 <10>
MMA1 <10>
MMA2 <10>
MMA3 <10>

MMA8 <10>
MMA9 <10>
MMA10 <10>
MMA11 <10>

MAB#6

1 8

MAB#7

2 7

MAB#4

3 6

MAB#5

4 5

RP8 8P4R-10

RP9 8P4R-10

Title

Size Document Number Rev

Date: Sheet of

MAC#6

1 8

MAC#7

2 7

MAC#4

3 6

MAC#5

4 5

1 2

R315 @33_0402

MD[0..63]

GMCH2-M - 2/3

888L2 Main Board

CLK_MEM_GMCH <11>

+3V

MMA12 <10>
MAB#6 <10>

MAB#7 <10>
MAB#4 <10>
MAB#5 <10>

MAC#6 <10>
MAC#7 <10>
MAC#4 <10>
MAC#5 <10>

C410 @22PF

Compal Electronics, Inc.

8 42Thursday, January 11, 2001

1

2.0

5

22UF_6.3V_1210_X5R

D D

C C

B B

A A

5

+1_8VS

+

C118

+VCCDPLL

12

C418
.1UF

AE25
AF24

AC11
AC13
AC15
AC17
AC19
AC21
AC25

AE10
AE12
AE14
AE16
AE18
AE20

W23
W25

AA12
AA14
AA16

J7

K7

E22

Y8

AB4
M13
AC2
AC5
AC7
AC9

AE2

AE4

AE6

AE8

B26

C3
C6

C9
C12
C15
C18
C21
C24

D1

E5
E10
E12
E15
E17
E20

F1

F3
F11
F13
T21

U2
U7

K24

V4

V6
V20
V22

W2

Y4

Y6
Y10
Y19

AA2
AA9

P11
P12
P13
P14
P15
P16

R2

R6
R11
R12
R13
R14
R15
R16
R23
R25

T4
T11
T12
T13
T14
T15
T16
L15
L16
L22
L25

M4
M11
M12

4

U7D

VCC1_8/VCCDPLL
GND/VSSDPLL

GND/VSSDACA1
GND/VSSDACA2
GND/VSSBA
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GMCH2v0

4

VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8

VCCDA/(VCC1_8)

VCCBA/(VCC1_8)
VCCDACA1/(VCC1_8)
VCCDACA2/(VCC1_8)

VCC1_8
VCC1_8

VSUS_3.3_1
VSUS_3.3_2
VSUS_3.3_3
VSUS_3.3_4
VSUS_3.3_5
VSUS_3.3_6
VSUS_3.3_7
VSUS_3.3_8

VSUS_3.3_9
VSUS_3.3_10
VSUS_3.3_11
VSUS_3.3_12
VSUS_3.3_13
VSUS_3.3_14
VSUS_3.3_15
VSUS_3.3_16
VSUS_3.3_17
VSUS_3.3_18

POWER/GND

INTRPT#

AGPBUSY#

R319
0_0402

+VCCDA

10UF_10V_1206

+3VS

12

R280
10K_0402

3

12

C407

R112 0_04021 2

3

12

C367
.1UF

+1_8VS

L16
68nH

1 2

12

C399
22UF_10V_1206

+3VS +1_8VS +3V

C274

+

22UF_6.3V_1210_X5R

+

C482

22UF_6.3V_1210_X5R

C371

.1UF

C358

.1UF

C325

.1UF

C359

.1UF

C326

.1UF

C324

82PF

C357

82PF

C354

82PF

AGP_BUSY# <15>

+1_8VS

W6
G26
M6
P6
Y9
Y18
AA8
AA11
AA13
AA15
AA17
AA19
AB16
AB20
AC22
AD19

12

C25
E24
F23
G22
K6
Y7
AA21
E23
AF26
AF25
AA6

HCLK# C431

V7
T6

+3V

B2
B5
B8
B11
B14
B19
B22
B25
E2
F10
F14
F17
G6
G8
G19
H2
H5

+3VS

H7
K20

VDDQ

Y24

VDDQ

L21

VDDQ

M23

VDDQ

U25

VDDQ

N25

VDDQ

R21

VDDQ

U20

VDDQ

U23

VDDQ

W20

VDDQ

Y17
E7
M14

GND

M15

GND

M16

GND

N2

GND

N6

GND

N11

GND

N12

GND

N13

GND

N14

GND

N15

GND

N16

GND

N23

GND

P4

GND

AA23

GND

F16

GND

F25

GND

G9

GND

G17

GND

G21

GND

G23

GND

P24

GND

H6

GND

H22

GND

J2

GND

J5

GND

J23

GND

J25

GND

K4

GND

K21

GND

L2

GND

L6

GND

L11

GND

L12

GND

L13

GND

L14

GND

AA25

GND

W7

GND

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

2

C119

+

22UF_6.3V_1210_X5R

C104

+

1 2
150UF_6.3V_E

C398 .1UF

C109 .1UF

C417 82PF

C415 .1UF

C416 .1UF

C414 82PF

C413 .1UF

C372 .1UF

C383 82PF

C377 .1UF

C346 .1UF

1 2
C483 .1UF_0402

1 2
C484 .1UF_0402

C120

1 2

150UF_6.3V_E

C432

C393

C404

C394

C428

C126

C433

C419

C333

C352

PIN# DT_GMCH GMCH2-M

E7

AA6

VSS (GND)

V_1.8 (1.8V)

Y17 VSS (GND) INTRPT# (INPUT)

AC18 LTVCLKIN (INPUT) LTVCLKIN/STALL (INPUT)

Title

Size Document Number Rev

2

Date: Sheet of

+

.01UF

.01UF

82PF

.01UF

.01UF

82PF

.01UF

.01UF

82PF

.01UF

.01UF

AGPBUSY# (OUTPUT)

RESERVED (1.8V)

Compal Electronics, Inc.

GMCH2-M - 3/3

888L2 Main Board

1

9 42Thursday, January 11, 2001

1

2.0

1

MD31
MD30
MD29
MD28

MD27

A A

MMA0<8>
MMA1<8>
MMA2<8>

R93

6.8_0402

5PF

1 2

1 2

C86

CLK_MEM2<11> CLK_MEM4<11>

B B

C C

D D

SRASA#<8>

CSA#3<8>

MAB#6<8> MAB#7 <8>
MMA8<8> SBS0 <8>

MMA9<8>

MMA10<8>

SMB_ICH_DAT_M0<11>

MD26
MD25
MD24

DQMA#3
DQMA#2 DQMA#7

MMA0
MMA1
MMA2

MD23
MD22
MD21
MD20

MD19
MD18
MD17
MD16

RMWEA#

MD47
MD46
MD45
MD44

MD43
MD42
MD41
MD40

MAB#6
MMA8

MMA9
MMA10

DQMA#5
DQMA#4 DQMA#0

MD39
MD38
MD37
MD36

MD35
MD34
MD33
MD32

+3V +3V+3V

12

C107
1000PF

2

+3V +3V

JP17
1
3
5
7
9

11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59

61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97

99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143

VSS
DQ0
DQ1
DQ2
DQ3
VCC
DQ4
DQ5
DQ6
DQ7
VSS
CE0#
CE1#
VCC
A0
A1
A2
VSS
DQ8
DQ9
DQ10
DQ11
VCC
DQ12
DQ13
DQ14
DQ15
VSS
RESVD/DQ64
RESVD/DQ65

RFU/CLK0
VCC
RFU
WE#
RE0#
RE1#
OE#/RESVD
VSS
RESVD/DQ66
RESVD/DQ67
VCC
DQ16
DQ17
DQ18
DQ19
VSS
DQ20
DQ21
DQ22
DQ23
VCC
A6
A8
VSS
A9
A10
VCC
CE2#/RESVD
CE3#/RESVD
VSS
DQ24
DQ25
DQ26
DQ27
VCC
DQ28
DQ29
DQ30
DQ31
VSS
SDA
VCC

SO-DIMM144_R

DQ32
DQ33
DQ34
DQ35

VCC
DQ36
DQ37
DQ38
DQ39

CE4#
CE5#

VCC

DQ40
DQ41
DQ42
DQ43

VCC
DQ44
DQ45
DQ46
DQ47

RESVD/DQ68
RESVD/DQ69

RFU/CKE0

VCC

RFU

RFU/CKE1

RFU

RFU

RFU/CLK1

RESVD/DQ70
RESVD/DQ71

VCC
DQ48
DQ49
DQ50
DQ51

DQ52
DQ53
DQ54
DQ55

VCC

A11/BA0
A12/BA1

A13/A11

VCC

CE6#/RESVD
CE7#/RESVD

DQ56
DQ57
DQ58
DQ59

VCC
DQ60
DQ61
DQ62
DQ63

VCC

VSS

VSS

A3
A4
A5

VSS

VSS

VSS

VSS

A7

VSS

VSS

VSS

SCL

DIMM1

REVERSE

H=4.0mm

12

12

C50
1000PF

C58
.1UF

12

C66
.1UF

12

C40
.1UF

12

12

12

C90

C51

C94

.1UF

.1UF

.1UF

3

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60

62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144

12

C67

1000PF

12

C77
.1UF

MD55
MD54
MD53
MD52

MD51
MD50
MD49
MD48

DQMA#6

MMA3
MAB#4
MAB#5

MD63
MD62
MD61
MD60

MD59
MD58
MD57
MD56

MMA12
MMA13

MD15
MD14
MD13
MD12

MD11
MD10
MD9
MD8

MAB#7
SBS0

SBS1
MMA11

DQMA#1

MD7
MD6
MD5
MD4

MD3
MD2
MD1
MD0

12

C95
1000PF

MMA3 <8>
MAB#4 <8>
MAB#5 <8>

CKE2 <8>
SCASA# <8>

CKE3 <8>
MMA12 <8>CSA#2<8>

12

R84

6.8_0402

12

C84

5PF

SBS1 <8>
MMA11 <8>

SMB_ICH_CLK_M <11>

12

C437

10UF_10V_1206

4

MMA13

12

R86

1K_0402

CLK_MEM3 <11> CLK_MEM5 <11>

5

MD55
MD54
MD53
MD52

MD51
MD50
MD49
MD48

DQMA#6
DQMA#7

MMA0<8>
MMA1<8>
MMA2<8>

C81

1 2

1 2

R89 6.8_0402

5PF

SRASA#<8>

RMWEA#<8>

CSA#4<8>
CSA#5<8>

MAC#6<8> MAC#7 <8>

MMA8<8>
MMA9<8>

MMA10<8>

SMB_ICH_DAT_M1<11>

MMA0
MMA1
MMA2

MD63
MD62
MD61
MD60

MD59
MD58
MD57
MD56

RMWEA#

MD15
MD14
MD13
MD12

MD11
MD10
MD9
MD8

MAC#6
MMA8

MMA9

DQMA#1
DQMA#0

MD7
MD6
MD5
MD4

MD3
MD2
MD1
MD0

SMB_ICH_DAT_M1

6

+3V

JP16

1

VSS

3

DQ0

5

DQ1

7

DQ2

9

DQ3

11

VCC

13

DQ4

15

DQ5

17

DQ6

19

DQ7

21

VSS

23

CE0#

25

CE1#

27

VCC

29

A0

31

A1

33

A2

35

VSS

37

DQ8

39

DQ9

41

DQ10

43

DQ11

45

VCC

47

DQ12

49

DQ13

51

DQ14

53

DQ15

55

VSS

57

RESVD/DQ64

59

RESVD/DQ65

61

RFU/CLK0

63

VCC

65

RFU

67

WE#

69

RE0#

71

RE1#

73

OE#/RESVD

75

VSS

77

RESVD/DQ66

79

RESVD/DQ67

81

VCC

83

DQ16

85

DQ17

87

DQ18

89

DQ19

91

VSS

93

DQ20

95

DQ21

97

DQ22

99

DQ23

101

VCC

103

A6

105

A8

107

VSS

109

A9

111

A10

113

VCC

115

CE2#/RESVD

117

CE3#/RESVD

119

VSS

121

DQ24

123

DQ25

125

DQ26

127

DQ27

129

VCC

131

DQ28

133

DQ29

135

DQ30

137

DQ31

139

VSS

141

SDA

143

VCC

SO-DIMM144

DQ32
DQ33
DQ34
DQ35

VCC
DQ36
DQ37
DQ38
DQ39

CE4#
CE5#

VCC

DQ40
DQ41
DQ42
DQ43

VCC
DQ44
DQ45
DQ46
DQ47

RESVD/DQ68
RESVD/DQ69

RFU/CKE0

VCC

RFU

RFU/CKE1

RFU

RFU

RFU/CLK1

RESVD/DQ70
RESVD/DQ71

VCC
DQ48
DQ49
DQ50
DQ51

DQ52
DQ53
DQ54
DQ55

VCC

A11/BA0
A12/BA1

A13/A11

VCC

CE6#/RESVD
CE7#/RESVD

DQ56
DQ57
DQ58
DQ59

VCC
DQ60
DQ61
DQ62
DQ63

VCC

7

+3V

2

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

SCL

MD31

4

MD30

6

MD29

8

MD28

10
12

MD27

14

MD26

16

MD25

18

MD24

20
22

DQMA#3

24

DQMA#2

26
28

MMA3

30

A3

MAC#4

32

A4

MAC#5

34

A5

36

MD23

38

MD22

40

MD21

42

MD20

44
46

MD19

48

MD18

50

MD17

52

MD16

54
56
58
60

62
64
66
68

MMA12

70

MMA13

72
74
76
78
80
82

MD47

84

MD46

86

MD45

88

MD44

90
92

MD43

94

MD42

96

MD41

98

MD40

100
102

MAC#7

104

A7

SBS0

106
108

SBS1

110

MMA11MMA10

112
114

DQMA#5

116

DQMA#4

118
120

MD39

122

MD38

124

MD37

126

MD36

128
130

MD35

132

MD34

134

MD33

136

MD32

138
140

SMB_ICH_CLK_M

142
144

12

12

R85

6.8_0402

MMA3 <8>
MAC#4 <8>
MAC#5 <8>

CKE4 <8>
SCASA# <8>

CKE5 <8>RMWEA#<8>
MMA12 <8>

C85
5PF

SBS0 <8>
SBS1 <8>

MMA11 <8>

8

DIMM2

C61
1000PF

12

C56
.1UF

H=5.2mm

12

C92

.1UF

12

12

12

C96

C91

.1UF

.1UF

For SO-DIMM2

C106
.1UF

12

C93
1000PF

12

C108

.1UF

12

C74
1000PF

12

C436
10UF_10V_1206

MD[0..63]<8>

DQMA#[0..7]<8>

MD[0..63]
DQMA#[0..7]

+3V +3V +3V

12

12

C39

1000PF

.1UF

12

C48

For SO-DIMM1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

1

2

3

4

5

6

Title

Size Document Number Rev

B
Date: Sheet of

Compal Electronics, Inc.

P10-SODIMM0/1.SCH
888L2 Main Board

7

10 42Thursday, January 11, 2001

8

2.0

A

B

C

D

E

L14

+3VS

4 4

CLK_14M_ICH<15>

CLK_14M_SIO<21>

PCI_STP#<15>

CLK_PCI_ICH<14>

CLK_PCI_PCM<19>

CLK_PCI_FWH<14>

CLK_PCI_SIO<21>

CLK_PCI_MINI<29>

CLK_USB_ICH<15>

3 3

CLK_DOT_GMCH<7>

SLP_S1#<15,22>

SMB_ICH_DAT<15>
SMB_ICH_CLK<15>

1 2

BLM21A601SPT

4.7UF_10V_0805

R82 33_040212

R81 33_040212

12

12

C65

C72

.1UF

R46 0_04021 2

12

C63
.1UF

+3V_CLK

12

12

C57
.1UF

R62 33_04021 2
R61 33_0402

R59 @33_04021 2
R55 33_04021 2

R53 22_04021 2

R51 33_04021 2
R49 33_04021 2

C64
.1UF

C78

18PF
C71

18PF

1 2

+3V_CLK

12

C68
.1UF

12

12

12

+3V_CLK

12

C80

C73

.1UF

.1UF

CK133-XIN

12

R65

12

2M

SEL0
SEL1
CLK_14M

R45

10K_0402

Y1

14.318MHZ

PCISTP#
CLK_ICH
CLK_PCI1
CLK_FWH
CLK_SIO

CLK_MDM

CLK_USB
CLK_DOT

1 2

CK133-XOUT

R508.2K_0402

3
4

28
29

1

11
12
13
15
16
18
19
20

25
26

32
30

31

23

X1

GNDA

X2

SEL0
SEL1(TRIST#)
REF0/(SEL1)

PCI_STP#/(VCC3)
PCI_F(PCI0_ICH)
PCI1
PCI2
PCI3
PCI4
PCI5
PCI6

USB(48M)
DOT(48M)

TEST#/(VCC3)
PWR_DWN#

SDATA
SCLK

GND

GND

6

5

22332

VCC3

VDDA

GND

GND

1417243541

102127

44

37

VCC3

VCC3

VCC3

VCC3

VCC3/(SDRAM6)

VCH_CLK/(SDRAM7)

DCLK/(VCC3)

CPU_STP#(DCLK)

GND

GND

GND

GND

GND

CK133-SOLANO2-M

48

47

56

51

VCC3

CPU2(ITP)

SDRAM0
SDRAM1
SDRAM2
SDRAM3
SDRAM4
SDRAM5

3V66_AGP

53

VCC2

VCC2

APIC0
APIC1

CPU0
CPU1

3V66_1
3V66_0

+2_5V_CLKS

12

C79
.1UF

U6

55
54

52
50
49

46
45
43
42
40
39

36

9
8
7

38
34

12

C83

.1UF

APIC0
APIC1

HCLK1
HCLK2

SDRAM2
SDRAM3
SDRAM4
SDRAM5

OSCVCH

CLK_3V66_1
CLK_3V66_0

DCLK

L15

BLM21A601SPT

12

C82

4.7UF_10V_0805

R88 33_04021 2
R87 47_0402

1 2

R83 33_04021 2
R69 33_04021 2

R58 10_04021 2
R60 10_0402

1 2
R56 10_04021 2
R57 10_04021 2

R52 33_04021 2

R64 33_04021 2
R67 33_04021 2

R54 33_04021 2

12

+2_5V_CLK

CLK_APIC_CPU <4>
CLK_APIC_ICH <14>

CLK_HOST_CPU <4>
CLK_HOST_GMCH <7>

CLK_MEM2 <10>
CLK_MEM3 <10>
CLK_MEM4 <10>
CLK_MEM5 <10>

CLK_OSC_VCH <12>

CLK_HUB_GMCH <7>
CLK_HUB_ICH <15>

CLK_MEM_GMCH <8>
CPU_STP# <15>

+3V_CLK

12

SEL0SEL1 PSB SDRAM

00

66 100

+3V_CLK

12

R41

12

+3V_CLK

12

10K_0402

SEL0

R43

@1K_0402

R40

@10K_0402

SEL1

+3VS

12

R38

4.7K_0402

SMB_ICH_DAT<15>

2 2

12

R37
10K_0402

SEL_DIMM0<15>
SEL_DIMM1<15>

G

2

Q9

13

D

S

2N7002

+3V

12

12

R35
10K_0402

12

R32
10K_0402

SMB_ICH_DAT_M0 <10>

SMB_ICH_DAT_M1 <10>

SMB_ICH_CLK_M <10>SMB_ICH_CLK<15>

R33
10K_0402

G

2

13

D

S

Q8

2N7002

+5VS

G

2

Q10

13

D

S

2N7002

Pin #

1
11
29
33

36
37
38

CK-Solano

W218 C9835

REF0/SEL1
VCC3
Tristate#
VCC3
DCLK
SDRAM7 SDRAM7
SDRAM6
VCC3

*

0 1

C9815

REF/SEL1

Tristate#
VCC3
DCLK

SDRAM6
VCC3

01

133 133

11

133 100

CK-Solano2-m

W224

REF
PCI_STP#VCC3
SEL1
TEST#
CPU_STP#34
VCH_CLK
VCC3
DCLK

100100

REF
PCI_STP#
SEL1
TEST#
CPU_STP#
VCH_CLK
VCC3
DCLK

1 1

R39

1K_0402

1 2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

A

B

C

D

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Clock Synthesizer
888L2 Main Board

11 42Thursday, January 11, 2001

E

2.0

5

U15A

E3

P0

E2

P1

E1

P2

F3

P3

F2

P4

F1

P5

+1_8VS

12

+3VS

C169
.1UF

2

G

B+

12

12

D

13

S

G3
G2
G1
H3
H2
H1

J3
J2
J1

K3
K2

K1
L3
L2
L1

M3
M2
M1
N1
N2

P2

N3

P3

M4
N4

P4

M5
N5

P5

M6
C1

B2

D2
D3

A2

A13

C9
D4
D6
D9

E4

F11

G4
H4

J4

K4
L6

C6

L10

C10

C7

L11

C11

C8

R183
100K_0402

R190
75K

Q28
2N7002

P6
P7
P8
P9
P10
P11
P12
P13
P14
P15
P16
P17
P18
P19
P20
P21
P22
P23
P24
P25
P26
P27
P28
P29
P30
P31
P32
P33
P34
P35
FLM
LP
DE
SHFCLK

VCC3.3
VCC3.3
VCC3.3
VCC3.3
VCC3.3
VCC3.3
VCC3.3
VCC3.3
VCC3.3
VCC3.3
VCC3.3
VCC3.3
VCC3.3
VCC3.3

PLL_VCC
LVDSPLL_VCC
DC_CKT_CKT

PLL_VSS
LVDSPLL_VSS
DC_CKT_VSS

VCH

D D

C C

B B

+5V

A A

DVOrCLKOUT0
DVOrCLKOUT1

Q24
1
2
3 6

FDS4435

4

FDS4435: P CHANNAL

5

DVOrVSYNC
DVOrHSYNC
DVOrBLANK#

DVOrCLKIN

DVOrDATA0
DVOrDATA1
DVOrDATA2
DVOrDATA3
DVOrDATA4
DVOrDATA5
DVOrDATA6
DVOrDATA7
DVOrDATA8

DVOrDATA9
DVOrDATA10
DVOrDATA11

YA0P
YA0M
YA1P
YA1M
YA2P
YA2M
YA3P
YA3M

CLKAP

CLKAM

YB0P
YB0M
YB1P
YB1M
YB2P
YB2M
YB3P
YB3M

CLKBP

CLKBM

VREF_HI

VREF_LO

ENABKL

ENAVDD

ENEXBUF

VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8

INV_PWR

8
7

5

G14
G13
G12
F14
J13
J12
H14
H13
H12
J14
K14
K13
K12
L14
L13
L12
M14
M13

A3
B3
A4
B4
A5
B5
A7
B7
A6
B6
A8
B8
A9
B9
A10
B10
A11
B11
A12
B12

D8
D7

C2
C3
D1

C5
D5
D10
E8
E11
F4
G11
H11
J11
K11
L5
L7
L8
L9
N13

1 2

R377 2.4K

LCD0
LCD1
LCD2
LCD3
LCD4
LCD5

LCD6
LCD7
LCD10
LCD11
LCD12
LCD13
LCD14
LCD15

LCD16
LCD17

1 2
1 2R185 150

R184 150

ENVDD

+1_8VS

+1_8VS

ENVDD

+1_8VS

12

C44
.1UF

LCDVDD

DVO_CLKOUT<7>

ENABKL <13,23>

12

12

C41

C52

.1UF

.1UF

12

R175
470

Q21

D

13

2N7002

2

G

S

22K

2

B

22K

4

12

C220

.1UF

+12VALW

12

13

C

4

DVO_D[0..11]<7>

+1_8VS

12

C37
.1UF

R16
100K_0402

2N7002

Q18

E

DTC124EK

33_0402

1 2

R48

12

R235
2K_1%

12

R234
2K_1%

12

C206

.1UF

+12VALW

2

G

12

R11
100K_0402

D

13

SQ3

3

DVO_D[0..11]

DVO_CLK#<7>

DVO_CLK<7>

DVO_BL#<7>

DVO_HSYNC<7>

DVO_VSYNC<7>

12

C240

.1UF

+3VS

12

12

C46

C172

.1UF

10UF_10V_1206

LCDVCCLCDVDD

D

S

13

Q19

G

SI2302DS

2

12

R10

12

C16

150K

.01UF

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

U15B

M11

DVODATA0

P10

DVODATA1

N10

DVODATA2

M10

DVODATA3

P9

DVODATA4

M9

DVODATA5

P8

DVODATA6

P7

DVODATA7

N7

DVODATA8

M7

DVODATA9

P6

DVODATA10

N6

DVODATA11

M8

DVOCLKIN0

N8

DVOCLKIN1

N11

DVOBLK

P12

DVOCLKOUT

P11

DVOHSYNC

N12

DVOVSYNC

P13

LCDVREF

A1

VSS

A14

VSS

B1

VSS

C4

VSS

D11

VSS

E5

VSS

E6

VSS

E7

VSS

E9

VSS

E10

VSS

F5

VSS

F6

VSS

F7

VSS

F8

VSS

F9

VSS

F10

VSS

G5

VSS

G6

VSS

G7

VSS

G8

VSS

G9

VSS

G10

VSS

VCH

12

12

C47

C176

.1UF

.1UF

1 2

12

C45

.1UF

3

12

C42
.1UF

L10

FBM-11-451616-800A

SI2302DS: N CHANNEL
VGS:4.5V, RDS: 85mOHM
VGS:2.5V, RDS:115mOHM
Id(MAX): 2.8A
VGS(MAX): +/- 8V

+3VS

GMBSDA

GMBSCL

GPIO5
GPIO4
GPIO6
GPIO3
GPIO2
GPIO8

GPIO7

PCIRST

GPIO0
GPIO1

TESTIN

DVOrZCOM

12

12

C38

C53

.1UF

.1UF

VCH_VID[0..4]

GMBSDA

D13

GMBSCL

D12

PID3

E13

PID2

E12

VCH_VID2

F12

PID1

C13

PID0

B13

VCH_VID0

F13

VCH_VID1

E14
M12

OSC

D14

VCH_VID4 M_SEN#

C12

VCH_VID3

C14
B14

TV_ZCOM

N9

H5

VSS

H6

VSS

H7

VSS

H8

VSS

H9

VSS

H10

VSS

J5

VSS

J6

VSS

J7

VSS

J8

VSS

J9

VSS

J10

VSS

K5

VSS

K6

VSS

K7

VSS

K8

VSS

K9

VSS

K10

VSS

L4

VSS

N14

VSS

P1

VSS

P14

VSS

PID3
PID2
PID1
PID0

12

12

C197

C201

.1UF

10UF_10V_1206

VCH_VID[0..4] <4>

GMBSDA <7>
GMBSCL <7>

12

R431 0_0402

1 2

R34 36.5_1%

SMB_EC_DA1<4,22,23,31>

SMB_EC_CK1<4,22,23,31>

C23

.1UF_0402

+3VS

12

1 2

R36 @33_0402

0_0402

.1UF_0402

4.7K_0402

1 2

R186

1 2

R187 4.7K_0402

1 2

R188 4.7K_0402

1 2

R189 4.7K_0402

C165

10UF_10V_1206

2

C54 @18PF

CLK_OSC_VCH <11>

PCIRST# <7,14,19,21,29>

+1_8VS

12

R426

G

S

G

S

C26

C25

.1UF_0402

PID3
PID2
PID1
PID0

LCDVDD

C164
.1UF

2

1

M_SEN# <13>

12

R432 10K_0402

+5VALW+3VALW

12

12

6.8K_0402

R420

6.8K_0402

Q49

2

2N7002

Q50

2

2N7002

C27
.1UF_0402

R421

13

D

+5VALW

13

D

DISPOFF#<13>

LCDVDD

+3V

LTVCL<7>

LTVDA<7>

Title

VCH

Size Document Number Rev

888L2 Main Board

Date: Sheet of

+3VS

INV_PWR

12

C30 .01UF

12

C29 .1UF

C28 .1UF

+5V

SMB_INV_DA
SMB_INV_CK

PID3
PID2

PID1
PID0

C24

.1UF_0402
LTVCL

LTVDA

LCD1
LCD0

LCD3
LCD2

LCD5
LCD4

LCD7
LCD6

LCD11
LCD10

LCD13
LCD12

LCD15
LCD14

LCD17
LCD16

12

12

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50

JP7

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50

LCD CONN

Compal Electronics, Inc.

1

12 42Thursday, January 11, 2001

2.0

5

4

3

2

1

VGA_LMA[0..11]<7>
VGA_LMD[0..31]<7>

VGA_LDQM[0..3]<7>

1

D1 @DAN217

2

1 2

DSCACHE#

1 2

R251 10_0402

1 2

R250 10_0402

3

12

C6
18PF

L36

1 2

FBM-11-160808-121

L35

1 2

FBM-11-160808-121

R167

4.7K_0402

CRTVCC

3

0
1

1

D3 @DAN217

2

DISPLAY CACHE INTERFACE

+3VS +3VS

1 2

C59 .1UF

D D

C C

ITP_TCK<4>
ITP_TMS<4>

CPURST#<4,7>

SI2301DS: P CHANNEL
VGS: -4.5V, RDS: 130 mOHM
VGS: -2.5V, RDS: 190mOHM
Id(MAX): 2.3A

B B

VGS(MAX): +-8V

23

VGA_LMD4
VGA_LMD5
VGA_LMD6

VGA_LMA4
VGA_LMA5
VGA_LMA6
VGA_LMA7
VGA_LDQM1
VGA_LMD8
VGA_LMD9
VGA_LMD10
VGA_LMD11

VGA_LMD12
VGA_LMD13
VGA_LMD14
VGA_LMD15
VGA_LMD16
VGA_LMD17
VGA_LMD18
VGA_LMD19

VGA_LMD20
VGA_LMD21
VGA_LMD22
VGA_LMD23
VGA_LDQM2
VGA_LDQM3
VGA_LMD24
VGA_LMD25
VGA_LMD26

VGA_LMD27

12

C231

.1UF

DDC_MONID0

SI2301DS

DGS1

A A

+5VS

D S

Q62
SI2301DS

1 2

R433 10K_0402

CRT_HSYNC<7>

C503
.1UF

CRT_VSYNC<7>

5

1 3

CRTVCC

CRTVCC

G

2

12

5
2 4

5
2 4

JP9

1 2

1 2

3 4

3 4

5 6

5 6

7 8

7 8

9 10

9 10

11 12

GND GND

13 14

13 14

15 16

15 16

17 18

17 18

19 20

19 20

21 22

21 22

23 24

23 24

25 26

25 26

27 28

27 28

29 30

29 30

31 32

GND GND

33 34

33 34

35 36

35 36

37 38

37 38

39 40

39 40

41 42

41 42

43 44

43 44

45 46

45 46

47 48

47 48

49 50

GND GND

51 52

51 52

53 54

53 54

55 56

55 56

57 58

57 58

59 60

59 60

61 62

61 62

63 64

63 64

65 66

65 66

67 68

67 68

69 70

GND GND

71 72

71 72

73 74

73 74

75 76

75 76

77 78

77 78

79 80

79 80

CONN 2X40

M_SEN#<12>

CRT_R<7>

CRT_G<7>

CRT_B<7>

1

74AHCT1G125GW
U34

3

1

74AHCT1G125GW
U35

3

M_SEN#
CRTR

CRTG

CRTB

4

1 2

C60 .1UF

VGA_LMD3
VGA_LMD2
VGA_LMD1
VGA_LMD0VGA_LMD7

VGA_LDQM0
VGA_LMA3
VGA_LMA2
VGA_LMA1
VGA_LMA0
VGA_LCS#
VGA_LMA8
VGA_LMA9
VGA_LMA10

VGA_LMA11
VGA_LCKE
VGA_LCAS#
VGA_LRAS#
VGA_LWE#
VGA_LFSEL
DSCACHE#
VGA_LTCLK0

VGA_LTCLK1
VGA_LMD31

VGA_LMD30
VGA_LMD29
VGA_LMD28

12

12

R6
75

12

R5

R4

75

75

VGA_LCS# <7>

VGA_LCKE <7>
VGA_LCAS# <7>
VGA_LRAS# <7>
VGA_LWE# <7>
VGA_LFSEL <7,8>
DSCACHE# <15>

VR_POK <30>
ITP_VR_POK <25>
ITP_TDI <4>

ITP_TDO <4>
ITP_TRST# <4>
ITP_PREQ# <4>
GTL_PRDY# <4>

+CPU_IO

R324
0_0402

1 2

L6

1 2

FCM2012C-800(0805)

L7

1 2

FCM2012C-800(0805)

L8

1 2

FCM2012C-800(0805)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

R170

4.7K_0402

1 2

12

C3
18PF

Status
Display cache exist
Display cache no exist

VGA_LMA[0..11]
VGA_LMD[0..31]

VGA_LDQM[0..3]

1 2

C243 10PF

VGA_LTCLK0 <7>
VGA_LTCLK1 <7>

1 2

C242 10PF

2

3

12

C161
27PF

1

D2 @DAN217

3

12

C5
18PF

12

C160
27PF

+1_8VS

12

C2
100PF

+3VS

12

R179

4.7K_0402

BKOFF#<22> DISPOFF# <12>

ENABKL<12,23>

CRTVCC

R422

10K_0402

CRTVCC

C162
.1UF

12

C7
100PF

12

1 2

12

C4
100PF

1 2

12

C8
100PF

2

D9

RB751V

D16

RB751V

R423
10K_0402

2N7002

Q15

21

21

1 3

D

2N7002

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

2

JP4

CRT CONN.

1 2

R416 100_0402

+3VS +3VS

0_0402

G

Q1

R3

S

1 3

D

12

2

G

12

R172

R2

2K_0402

2K_0402

1 2

S

CRT CONN.

DDC2_MONID2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

CRT CONN

888L2 Main Board

3VDDCDA <7>

3VDDCCL <7>

1

13 42Thursday, January 11, 2001

2.0

5

4

3

2

1

RX1

RY1

W10

AA10

AA15

W11

AB10

+3VS

AA4
AB4

Y4
W5
W4

Y5
AB3
AA5
AB5

Y3
W6
W3

Y6

Y2
AA6

Y1

V2
AA8

V1
AB8

U4

W9

U3

Y9

U2

AB9

U1

T4

Y10

T3

AA3
AB6

Y8
AA9

AB7

V3
W8

V4
W1
W2

AA7
W7

Y7

Y15

M3

L2

R2
R3

T1

P4

L3

R213
@10K_0402

1 2

R216
@10K_0402

1 2

ICH-2M

(FW82801BAM)

U10A

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24

PCI

AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE0#
C/BE1#
C/BE2#
C/BE3#

DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PCIRST#
PLOCK#
SERR#
PERR#
PME#
GPIO0/REQA#
GPIO16/GNTA#

PCICLK
REQ0#

REQ1#
REQ2#
REQ3#
REQ4#
GPIO1/REQB#/REQ5#

ICH-2M

R211
@10K_0402

1 2

R208
@10K_0402

1 2

RX2

RY2

CPUSLP#

CPU

STPCLK#

A20GATE

CPUPWRGD

HUB

HL_STB#

HLCOMP

HUBREF

IRQ

APICCLK

GPIO2/PIRQE#

GPIO3/PIRQF#
GPIO4/PIRQG#
GPIO5/PIRQH#

GPIO17/GNTB#/GNT5#

+3VS

12

12

C191

C211

.1UF

D D

C C

B B

+3VS

.1UF

R352 8.2K_04021 2
R355 8.2K_0402

1 2

R345 8.2K_04021 2

PME# has internal PU

REQA#

GNTA#

CLK_PCI_ICH<11>

1 2
C457
@22PF

A A

1 2

R361 @33_0402

@1K_0402

12

R348

C218
.1UF

12

C207

.1UF

AD[0..31]<19,29>

DEVSEL#<16,19,29>

FRAME#<16,19,29>

PCIRST#<7,12,19,21,29>

PLOCK#<16,19>

REQ#0<16>
REQ#1<16,29>
REQ#2<16,29>
REQ#3<16,19>
REQ#4<16>

MPCIACT#<29>

12

C/BE#0<19,29>
C/BE#1<19,29>
C/BE#2<19,29>
C/BE#3<19,29>

IRDY#<16,19,29>

TRDY#<16,19,29>

STOP#<16,19,29>

PAR<19,29>

SERR#<16,19,29>
PERR#<16,19,29>

IDE_PATA66DET
IDE_SATA66DET

AD[0..31]

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

REQA#
GNTA#

REQ#0
REQ#1
REQ#2
REQ#3
REQ#4

1 2

R384 0_0402

GNTA# Strapping for "A16 swap override" : "0" -> Enable

5

4

+3VS

R199 @0_04021 2

12

12

@.1UF

R218

R220 @0_04021 2

FWH_WPTBL#<15>

D11

A20M#

A12
R22

FERR#

A11

IGNNE#

C12

INIT#

C11

INTR

B11

NMI

B12

SMI#

C10
B13

RCIN#

C13
A13

A4

HL0

B5

HL1

A5

HL2

B6

HL3

B7

HL4

A8

HL5

B8

HL6

A9

HL7

C8

HL8

C6

HL9

C7

HL10

C5

HL11

A6

HL_STB

A7
A3
B4

P1

PIRQA#

P2

PIRQB#

P3

PIRQC#

N4

PIRQD#

F21

IRQ14

C16

IRQ15

N20
P22

APICD0

N19

APICD1

N21

SERIRQ

N3
N2
N1
M4

M2

GNT0#

M1

GNT1#

R4

GNT2#

T2

GNT3#

R1

GNT4#

L4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

R224 @0_04021 2

R227 @4.7K_0402

A20M#
FERR#

IGNNE#
INIT#
INTR
NMI
SMI#
STPCLK#
KBRST#
GATEA20
CPU_PWRGD

HL0
HL1
HL2
HL3
HL4
HL5
HL6
HL7
HL8
HL9
HL10
HL11
HL_STB
HL_STB#
+ICH_HLCOMP

PIRQA#
PIRQB#
PIRQC#
PIRQD#

SIRQ
GPI2

BD_ID0
BD_ID1
GPI5

PIN N3, M4 can not use GPIO.

GNT#0
GNT#1
GNT#2
GNT#3
GNT#4

HL[0..10]

R340 @10K_04021 2

3

C189

@.1UF

@4.7K_0402

1 2

1 2

A20M# <4>
FERR# <4>

IGNNE# <4>
INIT# <4>
INTR <4>
NMI <4>
SMI# <4>
STPCLK# <4>
KBRST# <22>
GATEA20 <22>
CPU_PWRGD <4>

HL_STB <7>
HL_STB# <7>

PIRQA# <16,19>
PIRQB# <16,29>
PIRQC# <16,19>
PIRQD# <16,29>

SIRQ <16,19,21>

GNT#0 <16>
GNT#1 <16,29>
GNT#2 <16,29>
GNT#3 <16,19>
GNT#4 <16>

MODRST# <17>

C190

HL[0..10] <7>

R349 8.2K_0402

@8P4R-10K

IDE_SATA66DET
IDE_PATA66DET
FWP#
TBL#

LAD0<15,21>

+1_8VS

1 2

R115 36.5_1%

12

C121
.01UF

R353 0_0402

1 2

RP25

LAD0

1 2

+3VS

PCIRST#<7,12,19,21,29>

FWH_GPI3

45

FWH_GPI2

36

FWH_GPI4

27
18

10
11
12
13

@FWH-PLCC

LAD1<15,21>
LAD2<15,21>

LAD3<15,21>

+1_8VS

R339 10K_04021 2
R338 10K_04021 2

R350 @0_0402
R354 @0_0402
R356 @0_0402

+VPP_R

PCIRST#

U19

5

FGPI1

6

FGPI0

7

WP#

8

TBL#

9

ID3
ID2
ID1
ID0
FWH0

LAD1
LAD2

LAD3

1 2

1 2

C454 10PF

4

FGPI3

FGPI2

FWH1

FWH2

14151617181920

+HUBREF_ICH

+3VS

IRQ14 <17>
IRQ15 <17>
CLK_APIC_ICH <11>
PICD0 <4>
PICD1 <4>

12
12

2

+3VS

123

RST#

GND

VPP

FWH3

CLK

VCC

RFU18

RFU19

303132

300_1%

300_1%

FWH

FGPI4

IC

GNDA

VCCA

GND

VCC

INIT#

FWH4
RFU22
RFU21

RFU20

+1_8VS

12

R113

12

R114

29
28
27
26
25
24
23
22
21

R202

@33_0402

C122
.1UF

1 2

CLK_PCI_FWH

12

1 2

C177 @22PF

FWH_IC

R203

LFRAME#

ATA Mode

ATA33

ATA66

Default None; Driver side

+3VS

CLK_PCI_FWH <11>

@10K_0402

12

+3VS

LFRAME# <15,21>

+CPU_IO

R222

@10K_0402

12

CBE

123

Q29 @3904

R236

@1.5K

+3VS

12

Stuff

RX

RY

detection

RP36

8P4R-100K

GPI2
BD_ID0
BD_ID1
GPI5

BD_ID1

BD_ID0

1 8
2 7
3 6
4 5

1 2

R413 @10K_0402

1 2

R415 @10K_0402

11: SigmaTel ST9700
01: AD1881A

INIT# <4>

Compal Electronics,Inc.

Title

ICH2-m-A (FW82801BAM) & FWH

Size Document Number Rev

888L2 Main Board

Date: Sheet of

14 42Thursday, January 11, 2001

1

2.0

5

D D

+RTCVCC

J5

JOPEN

R156

1 2

10M
X1

32.768KHZ

12

C146
12PF

+3VS

12

C147
12PF

AGP_BUSY#<9>

12

R161

1 2

15K

R162

1 2

1K_0402

C C

B B

1UF

+R_VBAIS

12

C149

1 2

C153
.047UF

DSCACHE#
LID_OUT#
IAC_BITCLK

SDATA_IN0
SDATA_IN1
SPKR

R286

1 2

1K_0402

R163

1 2

10M

1 2

R153 10K_0402

1 2

R155 10K_0402

1 2

R127 10K_0402

1 2

R368 10K_0402

1 2

R366 10K_0402

1 2

R141 @1K_0402

SPKR Strapping: "0" -> No Reboot

IAC_SYNC<27,29>

IAC_SDATAO<27,29>

R427 22_0402

R428 22_0402

12

12

C486

C485

27PF

27PF

1 2

1 2

ICH_AC_SDOUT

ICH_AC_SYNC

Placement close to ICH2-M (U10)

Modify on ST 11/3/2000

A A

+3VALW

4

1 2

R160 10K_0402

R364

1 2

45

THRM#
SLP_S1#
SLP_S3#

SLP_S5#

SYS_PWROK

RSMRST#

SMLINK0
SMLINK1

+RTCRST#
+VBIAS
RTCX1
RTCX2

ICH_AC_SYNC
IAC_BITCLK
ICH_AC_SDOUT

LAD0
LAD1
LAD2
LAD3
LDRQ#0
LDRQ1#

LFRAME#

USBP0+
USBP0­USBP1+
USBP1­USBP2+
USBP2­USBP3+
USBP3-

OVCUR#3

182736

RP20
8P4R-15K

0_04021 2

+3VS

R151

10K_0402

1 2

SMB_ICH_DAT<11>
SMB_ICH_CLK<11>

10K_0402

R360

1 2
1 2

R147 10K_0402

AC_SDOUT Strapping: "1" -> Safe Mode Boot

R143 @10K_04021 2

+3VS

AC97_RST#<27,29> PDD[0..15] <17>

IAC_BITCLK<27,29>
SDATA_IN0<27>

SDATA_IN1<29>

SPKR<28>

EC_SMI#<21,22>

DSCACHE#<13>

SCI#<22>

LID_OUT#<23>

PIDERST#<17>
SEL_DIMM0<11>
SEL_DIMM1<11>

LAD0<14,21>
LAD1<14,21>
LAD2<14,21>
LAD3<14,21>

LDRQ#0<21>

+3VS

LFRAME#<14,21>

+3V

1 2

R365 10K_0402

THRM#<22>
SLP_S1#<11,22>
SLP_S3#<22>
SLP_S5#<22>

SYS_PWROK<16,25>

PWRBTN_OUT#<23>

SWI#<23>

RSMRST#<25>

FWH_WPTBL#<14>

RTCCLK<19,20>

PCI_STP#<11>

CPU_STP#<11>

CLKRUN#<16,19,21,29>

SUS_STAT#<21>

+RTCVCC

ACIN<22,31>

SDATA_IN0
SDATA_IN1
SPKR

DSCACHE#
LID_OUT#

1 2

R140 0_0402

1 2

R369 @10K_0402

R158 @10K_0402

OVCUR#0<18>
OVCUR#1<16>
OVCUR#2<18>

USBP3+
USBP3­USBP1+
USBP1-

AA13

W16

AB18

W21

AA17

W15

AA18

AA16
AB16
AB17

W22

AA11

W14

AB15
AB14

AA14

W12
AB13
AB12

W13
AB11
AA12

W17
AB19

AA19

W18

AB20
AA20

W19

W20

D14

R20

R21

Y11
A15

C14

V21
Y17
T19

U19

V20
T20

T21

U22

T22

V22
P19

R19

P21
Y22

N22

Y14

L1

Y12

Y13

Y18

Y19

Y20
Y21

USBP2+
USBP2­USBP0+
USBP0-

3

U10B

THRM#
SLP_S1#
SLP_S3#
SLP_S5#
PWROK
PWRBTN#
RI#
RSMRST#
GPIO25
SUSCLK
AGPBUSY#
STP_PCI#
STP_CPU#
CLKRUN#
SUSSTAT#
INTRUDER#

SMBDATA
SMBCLK
SMBALERT#/GPIO11
SMLINK0
SMLINK1

RTCRST#
VBIAS
RTCX1
RTCX2

AC_RST#
AC_SYNC
AC_BIT_CLK
AC_SDOUT
AC_SDIN0
AC_SDIN1
SPKR

GPIO8
GPIO7
GPIO12
GPIO13
C3_STAT#/GPIO21
GPIO27
GPIO28

LAD0/FWH0
LAD1/FWH1
LAD2/FWH2
LAD3/FWH3
LDRQ0#
LDRQ1#
LFRAME#/FWH4
FSO

USBP0+
USBP0­USBP1+
USBP1­USBP2+
USBP2­USBP3+
USBP3-

OC0#
OC1#
OC2#
OC3#

ICH-2M

CP7

8P4C-33PF

SYSTEM

1 8

2 7

3 6

AC97

GPIO

LPC

USB

RP19
1 8
2 7
3 6
4 5

8P4R-15

4 5

BATLOW#

CPUPERF#

SSMUXSEL#

VGATE/VRMPWRGD

CLK48
CLK14
CLK66

PDA0
PDA1

PDA2
PDCS1#
PDCS3#

PDREQ

PDDACK#

PDIOR#
PDIOW#
PIORDY

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6

IDE

PDD7
PDD8

PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

SDA0
SDA1

SDA2
SDCS1#
SDCS3#

SDDREQ

SDDACK#

SDIOR#
SDIOW#
SIORDY

SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8

SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

182736

45

RP22
8P4R-15K

U20
B14
A14
B15

P20
M19
D4

F20
F19
E22
E21
E19

G22
F22
G19
G21
G20

H19
H22
J19
J22
K21
L20
M21
M22
L22
L21
K22
K20
J21
J20
H21
H20

A16
D16
B16
C15
D15

B18
B17
D17
C17
A17

D18
B19
D19
A20
C20
C21
D22
E20
D21
C22
D20
B20
C19
A19
C18
A18

+3VALW

1 2

C152 5PF

1 2

C151 5PF

2

12

R363

10K_0402

R359 0_0402
R117 0_04021 2

PDA0
PDA1
PDA2
PDCS1#
PDCS3#

PDDREQ
PDDACK#
PDIOR#
PDIOW#
PDIORDY

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

SDA0
SDA1
SDA2
SDCS1#
SDCS3#

SDDREQ
SDDACK#
SDIOR#
SDIOW#
SDIORDY

SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

1 2

PDA0 <17>
PDA1 <17>
PDA2 <17>
PDCS1# <17>
PDCS3# <17>

PDDREQ <17>
PDDACK# <17>
PDIOR# <17>
PDIOW# <17>
PDIORDY <17>

PDD[0..15]

SDA0 <17>
SDA1 <17>
SDA2 <17>
SDCS1# <17>
SDCS3# <17>

SDDREQ <17>
SDDACK# <17>
SDIOR# <17>
SDIOW# <17>
SDIORDY <17>

SDD[0..15]

USB2_D+ <18>
USB2_D- <18>
USB0_D+ <18>
USB0_D- <18>

CLOSE TO ICH2-M(< 1 inch)

BATTLOW# <23>
IST_CPU_PERF# <5>
VR_HI/LO# <4,30>
V_GATE <30>

12

R358
@33_0402

12

C456

@10PF

SDD[0..15] <17>

12

R357
@33_0402

12

C455

@10PF

12

R344
@33_0402

12

C453

@10PF

1

CLK_USB_ICH <11>
CLK_14M_ICH <11>
CLK_HUB_ICH <11>

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

5

4

3

2

Title

ICH2-m-B (FW82801BAM)

Size Document Number Rev

888L2 Main Board

Date: Sheet of

15 42Thursday, January 11, 2001

1

2.0

Compal Electronics,Inc.

5

4

3

2

1

PCI

RP18

10P8R-8.2K

RP21

10P8R-8.2K

RP37

10P8R-8.2K

12

C446
.1UF

12

C461

.1UF

10

+3VS

9
8
7
6

10
9

PIRQC# <14,19>

8

PIRQD# <14,29>

7
6

PLOCK# <14,19>

10

+3VS

GNT#0

9

GNT#1

8

GNT#2

7

GNT#3

6

CLKRUN# <15,19,21,29>

12

12

C447

C470

.1UF

.1UF

12

12

C458

C116

.1UF

.1UF

PIRQA# <14,19>
PIRQB# <14,29>STOP#<14,19,29>
REQ#4 <14>
GNT#4 <14>

+3VS

GNT#0 <14>
GNT#1 <14,29>
GNT#2 <14,29>
GNT#3 <14,19>

12

C448
.1UF

12

C450

1000PF

12

C443
1000PF

+1_8VS

12

C139

1000PF

+3VS

12

C449
1000PF

REQ#0
REQ#1
REQ#2
REQ#3

+3VS

1
2
3
4
5

1
2
3
4
5

1
2
3
4
5

R148 10K_0402

1 2

12

C462
.1UF

12

C452

.1UF

PERR#<14,19,29>

OVCUR#1<15>

SERR#<14,19,29>

D D

C C

12

C466

B B

+

4.7UF_10V_0805

12

C135

+

10UF_10V_1206

+3VS

IRDY#<14,19,29>

TRDY#<14,19,29>

DEVSEL#<14,19,29>

FRAME#<14,19,29> SIRQ <14,19,21>

+3VS

REQ#0<14>
REQ#1<14,29>
REQ#2<14,29>
REQ#3<14,19>

+3VS

12

C463
.1UF

12

C467

10UF_10V_1206

+1_8VS

AA21
AA22

AB21
AB22

U10C

D10

VCC1_8_1

E5

VCC1_8_2

K19

VCC1_8_3

L19

VCC1_8_4

P5

VCC1_8_5

V9

VCC1_8_6

A1

GND1

A2

GND2

A10

GND3

B1

GND4

B2

GND5

B3

GND6

B9

GND7

B10

GND8

C2

GND9

C3

GND10

C4

GND11

C9

GND12

D5

GND13

D6

GND14

D7

GND15

D8

GND16

D9

GND17

E6

GND18

E7

GND19

E8

GND20

E9

GND21

J10

GND22

J11

GND23

J12

GND24

J13

GND25

J14

GND26

J9

GND27

K10

GND28

K11

GND29

K12

GND30

K13

GND31

K14

GND32

K9

GND33

L10

GND34

L11

GND35

L12

GND36

L13

GND37

L14

GND38

L9

GND39

M10

GND40

M11

GND41

M12

GND42

M13

GND43

M14

GND44

M9

GND45

N10

GND46

N11

GND47

N12

GND48

P9

GND49

P14

GND50

P13

GND51

P12

GND52

P11

GND53

P10

GND54

N9

GND55

N14

GND56

N13

GND57

A21

GND58

A22

GND59

B21

GND60

B22

GND61

AA1

GND62

AA2

GND63
GND64
GND65

AB1

GND66

AB2

GND67
GND68
GND69

K1

GND70

D3

GND71

ICH-2M

VCC3_3_1
VCC3_3_2
VCC3_3_3
VCC3_3_4
VCC3_3_5
VCC3_3_6
VCC3_3_7
VCC3_3_8

VCC3_3_9
VCC3_3_10
VCC3_3_11
VCC3_3_12
VCC3_3_13
VCC3_3_14
VCC3_3_15
VCC3_3_16
VCC3_3_17
VCC3_3_18

V5REF1
V5REF2

VCCSUS1_8_1
VCCSUS1_8_2
VCCSUS1_8_3

VCCSUS3_3_1
VCCSUS3_3_2
VCCLAN1_8_1
VCCLAN1_8_2

VCCLAN3_3_1
VCCLAN3_3_2

VCCSUS3_3_3
VCCSUS3_3_4

V_CPU_IO_1
V_CPU_IO_2

VCC1_8_7

VCCRTC

V5REF_SUS

EEPROM

EE_CS

EE_SHCLK

EE_DOUT

EE_DIN

LAN

LAN_CLK
LAN_RXD0
LAN_RXD1
LAN_RXD2

LAN_TXD0
LAN_TXD1
LAN_TXD2

LAN_RSTSYNC

LAN_PWROK

+3VS

E14
E15
E16
E17
E18
F18
G18
H18
J18
P18
R18
R5
T5
U5
V5
V6
V7
V8

+VCC5REF

K2
M20

V14
V15
V16

T18
U18
H5
J5

F5
G5

V17
V18

D12
D13

D2
U21
V19

K4
J3
J4
K3

G3
G2
G1
H1
F3
F2
F1
H2

R146

Y16

+1_8VALW

+3VALW

1 2

R367 0_0402

1 2

R145 0_0402

+CPU_IO

+1_8VS

1 2

+3VALW

1 2

R347 @10K_0402

1 2

0_0402

1 2

C150 .1UF

+1_8VALW

+3VALW

+RTCVCC

R1591K_0402

LAN_EECS <29>
LAN_EECLK <29>
LAN_EEDO <29>
LAN_EEDI <29>

LAN_PHYCLK <29>
LAN_RXD0 <29>
LAN_RXD1 <29>
LAN_RXD2 <29>
LAN_TXD0 <29>
LAN_TXD1 <29>
LAN_TXD2 <29>
LAN_PHYRST <29>
SYS_PWROK <15,25>

1SS355

12

C125
1UF

+3VS

+5VS

21

12

12

C134
.1UF

R118
1K_0402

D4

+1_8VALW +3VALW +CPU_IO

12

12

C464

A A

.1UF

12

C465

.1UF

C460
.1UF

12

C459
.1UF

12

C115
.1UF

Compal Electronics,Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

5

4

3

2

Title

ICH2-m-C (FW82801BAM)

Size Document Number Rev

888L2 Main Board

Date: Sheet of

16 42Thursday, January 11, 2001

1

2.0

1

IDE,CD-ROM & FDD Module CONN.

PDD[0..15]<15>

PIDERST#<15>

A A

PDDREQ<15>

PDIOW#<15>

PDIOR#<15>

PDIORDY<15>

PDCS1#<15>

INT_CD_L<27> INT_CD_R <27>

B B

C C

D D

INT_CD_GND<27>

SDD[0..15]<15>
MOD_CD_R<27> MOD_CD_L <27>

H1SEL#<21>
RDATA#<21>
SDCS3#<15>

WRPRT#<21>

SDIOW#<15>

DISKCHG#<21>

WRDATA#<21>

INDEX#<21>

SDCS1#<15>

TRK0#<21>

1.6M_EN#<21>

MODPRES#<23>

SDA2<15>

SDIOR#<15>

1

PIDERST#
PDD6

PDD5
PDD4
PDD3
PDD2
PDD1
PDD0

PDDREQ
PDIOW#
PDIOR#
PDIORDY PCSEL
RPDDACK#
RIRQ14
PDA1

PDA1<15>
PDA0<15>

PDCS1#
HDD_LED#

+5VS

MODRST#
SDD7
SDD6
SDD5
SDD4
SDD3
SDD2
SDD1
SDD0

SDIOW#
SDIORDY
RIRQ15
SDA1
SDA0
SDCS1#
SIDEACT#

+5VS

IDE_CSEL_M#

SDD[0..15]
MOD_CD_R

H1SEL#
RDATA#

WRPRT#
SDD15

SDD12
SDD9

DISKCHG#
WRDATA#

RIRQ15
SDD0

SDD3
SDD6

TRK0#
MODPRES#
RSDDACK#
SDD14

SDD11
SDD8

PDD[0..15]

FDD/CDROM/DVD

2

JP13

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44

HDD 44P

HDD

JP8

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50

HEADER 2X25

CDROM/DVD

JP11

1 2

1 2

3 4

3 4

5 6

5 6

7 8

7 8

9 10

9 10

11 12

11 12

13 14

13 14

15 16

15 16

17 18

17 18

19 20

19 20

21 22

21 22

23 24

23 24

25 26

25 26

27 28

27 28

29 30

29 30

31 32

31 32

33 34

33 34

35 36

35 36

37 38

37 38

39 40

39 40

41 42

41 42

43 44

43 44

45 46

45 46

47 48

47 48

49 50

49 50

51 52

51 52

53 54

53 54

55 56

55 56

57 58

57 58

59 60

59 60

COMBO-60P

MODULE

2

+5VSMOD

PDD8PDD7
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

1 2

R362 470

ATA66S/PDIAG#

PDA2PDA0
PDCS3#

+5VS

SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
SDDREQ
SDIOR#

SDDACK#

CD_PDIAG
SDA2

R31 0

SDCS3#

+5VS

MOD_CD_L
WGATE#

SDD1
SDD4
SDD7

MTR0#
STEP#

SDIORDY
SDDREQ
SDD13
SDD10

DRV0#
DIR#
SIDEACT#

ATA66P/PDIAG
IDE_CSEL_S
SDD2
SDD5
MODRST#

3

MASTER

1 2

3

PDA2 <15>
PDCS3# <15>

ATA66P/PDIAG

WGATE# <21>
CD/FDD# <23>
SDA0 <15>

INT_CD_GND <27>

MTR0# <21>
STEP# <21>

SDIORDY <15>
SDDREQ <15>

DRV0# <21>
DIR# <21>

SDA1 <15>

MODRST# <14>

4

R342

100K_0402

HDD_LED#

SIDEACT#

SIDE_CS_M#/S<22>

+5VS

+12VALW

R341

100K_0402

MODEN#<22>

2N7002

SI3456DV: N CHANNEL
VGS: 4.5V, RDS: 65 mOHM
Id(MAX): 5.1A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

4

6
5
2
1

12

2

G

Q40
SI3456DV

3

13

+5VSMOD

4

D

12

SQ44

C445
.01UF

5

+5VS

R343
100K_0402

1 2

D14

1 2

1

2

RB717F

+3VALW

PDDACK#<15>

SDDACK#<15>

IRQ15<14>

5

3

14

9 8

IRQ14<14>

WRDATA#
WGATE#
H1SEL#
DIR#

+5VS

SDDREQ

+5VS

12

R346
100K_0402

DRV0#

U29D

74LVC14

PDDACK# RPDDACK#

PDDREQ

PDD7

PDIORDY

DISKCHG#
INDEX#
WRPRT#
TRK0#

SDDACK# RSDDACK#
IRQ15 RIRQ15

SDD7

SDIORDY

6

+5VS

53

U30

1
2

TC7S08F

+5VS +5VS

R336
10K_0402

1 2

IDE_CSEL_M# IDE_CSEL_S

D

13

Q42

2

G

2N7002

S

1 2

R334 470

1 2
R144 22_0402

RIRQ14IRQ14

1 2
R142 22_0402
1 2

R149 @5.6K_0402

1 2

C143 33PF

12

R150 @10K_0402

+5VS

1 2

R351 1K_0402

RP17

RP16

8P4R-1K

1 2

10

STEP#

9

MTR0#

8

DRV0#

7

RDATA#

6

+5VS

+5VS

12

6

1
2
3
4
5

10P8R-1K

1 8
2 7
3 6
4 5

1 2

R131 22_0402

1 2

R129 22_0402

1 2

R132 @5.6K_0402

C117 33PF

1 2

R133 @10K_0402

R130 1K_0402

4

ACTLED#

4.7UF_10V_0805

7

+5VS

31

Q43

E

47K

DTA114YKA

B

2

10K

C

1 2

R173 470

R335
10K_0402

1 2

D

13

Q41

2

G

2N7002

S

1 2

R337 470

+5VS

C441

12

.1UF

C440

12

12

8

ACTLED <18>

C502

22UF_10V_1206

HDD CAP.

+5VS

+5VS

12

C43

10UF_10V_1206

12

C49
.1UF

CDROM/DVD CAP.

+5VSMOD

12

C442

10UF_10V_1206

12

C444
.1UF

SECOND MODULE CAP.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

IDE/FDD MODULE
888L2 Main Board

7

17 42Thursday, January 11, 2001

8

2.0

A

B

C

D

E

USB&LED INTERFACE

USB_AS USB_BS

+5VS

4 4

3 3

USB0_D-<15>

USB0_D+<15>

PAD2

2.2x3 PAD

PAD3

2.2x3 PAD

PAD1

2.2x3 PAD

U33

1

GND

2

IN

3

EN1#

4

EN2#

TPS2042

C170

+

150UF_E_10V

L13

FBM-11-451616-800A

PAD4

2.2x3 PAD

8

OC1#

7

OUT1

6

OUT2

5

OC2#

L11

1 2

FBM-11-451616-800A

12

C20
.1UF

USB0_DD-

R140 1 2

USB0_DD+
GND_USBA GND_USBB

12

12

C19
.1UF

PAD6

PAD5

2.2x3 PAD

2.2x3 PAD

+3VS

12

12

USB_AUSB_AS USB_B USB_BS

JP5

1

VCC

2

D0-

3

D0+

4

VSS

11 9

G3 G1

12 10

G4 G2

Molex-67300

PAD8

PAD7

2.2x3 PAD

2.2x3 PAD

R385
100K_0402

VCC

D1-

D1+

VSS

5
6
7
8

R386
100K_0402

1 2

R388 47K_0402

1 2

R389 47K_0402

L9

1 2

FBM-11-451616-800A

C9

+

150UF_E_10V

USB2_DD­USB2_DD+

12

C18
.1UF

FD5
FIDUCIAL

12

C479
.1UF

12

FD2
FIDUCIAL

12

C480
.1UF

12

C15
.1UF

R150 1 2
R120 1 2R130 1 2

L12
FBM-11-451616-800A

FD6
FIDUCIAL

OVCUR#0 <15>

OVCUR#2 <15>

USB2_D- <15>
USB2_D+ <15>

FD4

FD1

FIDUCIAL

FIDUCIAL

FD3
FIDUCIAL

CFD12
FIDUCIAL

CFD14
FIDUCIAL

BAT2_LED#<23>

CFD1
FIDUCIAL

+3VALW

31

Q20

E

47K

DTA114YKA

B

PWR_LED

CFD3
FIDUCIAL

+3VS

+3VALW

CFD8
FIDUCIAL

2

10K

C

12
34
56
78

910
1112
1314
1516
1718
1920
21
23
25
27
29
31
33
35
37
39

CFD6
FIDUCIAL

PWR_LED

CFD10
FIDUCIAL

1 2

C17 22PF

+5VS +5V

CFD13
FIDUCIAL

VDDA

INT_MIC <28>BAT1_LED#<23>

CFD5
FIDUCIAL

ON/OFFBTN <25>
KSO17 <22>

KSI0 <22,23>
KSI1 <22,23>
KSI2 <22,23>
KSI3 <22,23>
KSI4 <22,23>
KSI5 <22,23>

CFD9
FIDUCIAL

CFD4
FIDUCIAL

CFD7
FIDUCIAL

R174 470

JP6

SWITCH_CONN

CFD11
FIDUCIAL

1 2

22
24
26
28
30
32
34
36
38
40

PWR_LED#<23>

ACTLED<17>

CAP_LED#<22>
NUM_LED#<22>
SRL_LED#<22>

CFD2
FIDUCIAL

1

1

GND2
PDH
SMD197

1

1

D

M2
PDH
C276D169

1

GND3
PDH
SMD197

1

1

1

1

M7

M3

PDH

PDH

C276D169

C276D169

1

1

M1
PDH
C276D128

M5
PDH
C295D147

1

GND4
PDH
SMD197

1

Title

Size Document Number Rev

Date: Sheet of

M8
PDH
T394B295D128

1

GND10
PDH
SMD197X225

1

USB & FRONT PANEL I/F
888L2 Main Board

1

2 2

1 1

PAD9

2.2x3 PAD

PAD17

2.2x3 PAD

PAD25

2.2x3 PAD

PAD33
CLIP
SMD87X134

PAD10

2.2x3 PAD

PAD18

2.2x3 PAD

PAD26

2.2x3 PAD

PAD34
CLIP
SMD87X134

PAD11

2.2x3 PAD

PAD19

2.2x3 PAD

PAD27

2.2x3 PAD

A

PAD12

2.2x3 PAD

PAD20

2.2x3 PAD

PAD28

2.2x3 PAD

PAD35
CLIP
SMD87X134

PAD13

2.2x3 PAD

PAD21

2.2x3 PAD

PAD29

2.2x3 PAD

PAD36
CLIP
SMD87X134

PAD14

2.2x3 PAD

PAD22

2.2x3 PAD

PAD30

2.2x3 PAD

PAD37
CLIP
SMD87X134

PAD15

2.2x3 PAD

PAD23

2.2x3 PAD

PAD31

2.2x3 PAD

PAD16

2.2x3 PAD

PAD24

2.2x3 PAD

PAD32

2.2x3 PAD

PAD38
5x5 PAD
SMD197X197

B

M17
NON-PDH
O211X67D211X67N

1

M15
STANDOFF_SUPPORT_TB
C315D177

1

M11
PDH
C236D118

1

1

1

M18
NON-PDH
O211X67D211X67N

1

M10
STANDOFF_SUPPORT_KB
C315D177

1

GND5

M12

PDH

PDH

SMD197X225

C276D128

1

1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

1

M19
NON-PDH
O211X67D211X67N

1

GND6
PDH
SMD197X197

1

1

1

GND7
PDH
SMD197X197

1

C

M20
NON-PDH
O211X67D211X67N

1

M9
STDF_SUPPORT_VGA_CACHE
C315D177

1

1

GND8
PDH
SMD197X197

1

1

M21
NON-PDH
O177X98D177X98N

1

GND9
PDH
SMD197X197

1

M22
NON-PDH
O177X98D177X98N

1

M23
STDF_SUPPORT_VGA_CACHE
C315D177

1

GND1
PDH
SMD197

1

1

1

1

1

M6
PDH
C276D169

1

1

GND11
PDH
SMDO280X118

1

M4
PDH
C276D128

1

M16
PDH
T394B304D128

1

GND12
PDH
SMDO280X118

1

1

CFD15
FIDUCIAL

1

Compal Electronics, Inc.

18 42Thursday, January 11, 2001

E

1

CFD16
FIDUCIAL

1

2.0

8

7

6

5

4

3

2

1

S1_A10

S1_OE#

S1_CE2#

S1_D15

A_A10/CAD9

A_A11/CAD12

A_OE#/CAD11

A_CE2#/CAD10

B_A11/CAD12

B_OE#/CAD11

B_CE2#/CAD10

B_A10/CAD9

151

150

149

148

S2_CE2#

S2_D15

S2_OE#

S2_A10

S2_IOWR# <20>
S2_IORD# <20>
S2_OE# <20>

S2_CE2# <20>

S1_IOWR#
S1_IORD#
S1_OE#
S1_CE2#

S1_D13

S1_D7

S1_D6

A_D7/CAD7

A_D6/CAD5

A_D15/CAD8

A_D13/CAD6

B_D15/CAD8

B_D7/CAD7

B_D13/CAD6

B_D6/CAD5

144

142

141

S2_D13

S2_D6

S2_D7

S1_D12

A_D12/CAD4

B_D12/CAD4

140

S2_D12

S1_A[0..25]
S1_D[0..15]

+3VALW +3VS+3VS

D D

127621375079134

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14

AD[0..31]<14,29>

C C

C389

C224

.1UF

.1UF

C/BE#3<14,29>
C/BE#2<14,29>
C/BE#1<14,29>
C/BE#0<14,29>

AD19

CLK_PCI_PCM<11>

DEVSEL#<14,16,29>

FRAME#<14,16,29>

IRDY#<14,16,29>

TRDY#<14,16,29>

STOP#<14,16,29>

PAR<14,29>
PERR#<14,16,29>
SERR#<14,16,29>

REQ#3<14,16>

GNT#3<14,16>
PIRQA#<14,16>
PIRQC#<14,16>

PLOCK#<14,16>

PCIRST#<7,12,14,21,29>

PCM_PME#<23>

CLKRUN#<15,16,21,29>

PCM_RI#<24>

PCM_SPK#<28>

SIRQ<14,16,21>

C387

.1UF

C226

.1UF

7

CLK_PCI_PCM

R289

@33_0402

1 2

C384

@10PF

B B

+3VS

12

4.7UF_10V_0805

A A

+3VS

C380

C385

.1UF

8

AD13AD[0..31]
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

R287 100_0402

1 2

CLK_PCI_PCM

LEDO
IRQ11

IRQ7

C298

.1UF

C225

.1UF

4

AD31

5

AD30

7

AD29

8

AD28

9

AD27

10

AD26

11

AD25

12

AD24

16

AD23

17

AD22

18

AD21

19

AD20

20

AD19

22

AD18

23

AD17

24

AD16

38

AD15

39

AD14

40

AD13

41

AD12

42

AD11

43

AD10

45

AD9

46

AD8

48

AD7

49

AD6

51

AD5

52

AD4

53

AD3

54

AD2

55

AD1

56

AD0

13

C/BE3#

25

C/BE2#

36

C/BE1#

47

C/BE0#

15

IDSEL

1

PCI_CLK

31

DEVSEL#

27

FRAME#

29

IRDY#

30

TRDY#

32

STOP#

35

PAR

33

PERR#

34

SERR#

3

PCI_REQ#

2

PCI_GNT#

203

IRQ9/INTA#

204

IRQ4/INTB#/A_VPP_PGM

58

LOCK#

207

RST#

163

IRQ12/PME#

208

IRQ14/CLKRUN#

72

IRQ15/RI_OUT#

128

SPKR_OUT#

133

LEDO#/SKTA_ACTV

193

IRQ11/SKTB_ACTV

205

IRQ5/SERIRQ#

206

IRQ7/SIN#/B_VPP_PGM

+3VALW

C227

GND

GND

GND

1426284457

.1UF

6

AUX_VCC

O
CARDBUS CONTROLLER
OZ6933T (TQFP)

GND

GND

GND

GND

GND

101

129

177

180

PCI_VCC

PCI_VCC

PCI_VCC

PCI_VCC

CORE_VCC

CORE_VCC

CORE_VCC

MICRO CORP.

2

IRQ3/A_VCC_3#

SCLK/A_VCC_5#

SDATA/B_VCC_3#

SLATCH/SMBCLK/B_VCC_5#

IRQ9/A_VPP_VCC_PGM

IRQ10/B_VPP_VCC_PGM

87

132

131

130

115

146

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

5

S1_D8

S1_D9

S1_D1

S1_D10

124

122

121

120

A_D9/CAD30

A_D1/CAD29

A_D10/CAD31

B_D10/CAD31

B_D9/CAD30

B_D1/CAD29

199

197

196

195

S2_D9

S2_D1

S2_D8

S2_D10

SLATCH <20>
SLDATA <20>
RTCCLK <15,20>

S1_A[0..25] <20>
S1_D[0..15] <20>

S1_D0

S1_A0

S1_A1

119

116

113

A_A0/CAD26

A_A1/CAD25

A_D8/CAD28

A_D0/CAD27

B_D8/CAD28

B_D0/CAD27

B_A0/CAD26

B_A1/CAD25

194

191

189

S2_D0

S2_A0

S2_A1

S1_A6

S1_A9

S1_A25

S1_A4

S1_A3

S1_A2

111

109

107

A_A2/CAD24

A_A3/CAD23

B_A2/CAD24

B_A3/CAD23

187

185

183

S2_A2

S2_A3

S2_A4

S1_A5

105

103

A_A4/CAD22

A_A5/CAD21

B_A4/CAD22

B_A5/CAD21

181

178

S2_A5

S2_A6

S1_IORD#

S1_A24

S1_A17

S1_A7

S1_IOWR#

102

100998381807877757473716867666564636259

A_A6/CAD20

A_A7/CAD18

A_A9/CAD14

A_A25/CAD19

A_A24/CAD17

A_A17/CAD16

A_IOWR/CAD15

B_A6/CAD20

B_A25/CAD19

B_A7/CAD18

B_A24/CAD17

B_A17/CAD16

B_IOWR#/CAD15

B_A9/CAD14

176

175

174

158

156

155

154

S2_A7

S2_IOWR#

S2_A9

S2_IORD#

S2_A25

S2_A17

S2_A24

S2_IOWR#
S2_IORD#
S2_OE#
S2_CE2#

S1_A11

A_IORD#/CAD13

B_IORD#/CAD13

153

S2_A11

4

S1_D5

S1_D11

S1_D4

A_D5/CAD3

A_D11/CAD2

B_D5/CAD3

B_D11/CAD2

139

138

137

S2_D11

S2_D5

S2_D4

S1_IOWR# <20>
S1_IORD# <20>
S1_OE# <20>
S1_CE2# <20>

S1_D3

A_D4/CAD1

A_D3/CAD0

A_REG#/CCBE3#

A_CE1#/CCBE0#

A_A23/CFRAME#

A_A21/CDEVSEL#

A_A14/CPERR#

A_WAIT#/CSERR#

A_INPACK#/CREQ#

A_RDY_IRQ#/CINT#

A_A19/CBLOCK#

A_WP/CCLKRUN#

A_R2_D14/RFU

A_R2_A18/RFU

A_CD1#/CCD1#
A_CD2#/CCD2#

A_BVD2/CAUDIO

A_BVD1/CSTSCHG

B_BVD1/CSTCHG

B_BVD2/CAUDIO

B_CD2#/CCD2#
B_CD1#/CCD1#

B_R2_A18/RFU

B_R2_D14/RFU

B_WP/CCLKRUN#

B_A19/CBLOCK#

B_RDY_IRQ#/CINT#

B_INPACK#/CREQ#

B_WAIT#/CSERR#

B_A14/CPERR#

B_A21/CDEVSEL#

B_A23/CFRAME#

B_CE1#/CCBE0#

B_REG#/CCBE3#

B_D4/CAD1

B_D3/CAD0

135

S2_D3

GRST#
A_SKT_VCC
A_SKT_VCC

A_A12/CCBE2#

A_A8/CCBE1#

A_A16/CCLK

A_A15/CIRDY#

A_A22/CTRDY#

A_A20/CSTOP#

A_A13/CPAR

A_WE#/CGNT#

A_RST/CRST#

A_R2_D2/RFU

A_VS1/CVS1
A_VS2/CVS2

B_VS2/CVS2
B_VS1/CVS1

B_R2_D2/RFU

B_RST/CRST#

B_WE#/CGNT#

B_A13/CPAR

B_A20/CSTOP#

B_A22/CTRDY#

B_A15/CIRDY#

B_A16/CCLK

B_A8/CCBE1#

B_A12/CCBE2#

B_SKT_VCC
B_SKT_VCC
B_SKT_VCC

OZ6933TQFP

3

U24

117
98
60

112
97
82
70

93
96
95
94
92
90
84
86
108
110
89
91
88
125
106
123
69
85
76
104
61
126
114
118

192
190
202
136
179
152
161
145
198
182
201
164
167
165
186
184
162
159
166
168
170
171
172
169

147
157
173
188

143
160
200

PCMRST# <20,22>

S1_VCC

C351

C368

C239

.1UF

S1_A12
S1_A8

R248 331 2
S1_A23
S1_A15
S1_A22
S1_A21
S1_A20
S1_A13
S1_A14

S1_A19

S1_D2
S1_D14
S1_A18

S2_A18
S2_D14
S2_D2

S2_A19

S2_A14
S2_A13
S2_A20
S2_A21
S2_A22
S2_A15
S2_A23

R247 331 2

S2_A8
S2_A12

S1_REG# <20>

S1_CE1# <20>

S1_A16

S1_WAIT# <20>
S1_INPACK# <20>
S1_WE# <20>
S1_RDY# <20>

S1_WP <20>
S1_RST <20>

S1_VS1 <20>

S1_VS2 <20>
S1_CD1# <20>
S1_CD2# <20>
S1_BVD2 <20>
S1_BVD1 <20>

S2_BVD1 <20>
S2_BVD2 <20>
S2_CD2# <20>
S2_CD1# <20>
S2_VS2 <20>
S2_VS1 <20>

S2_RST <20>
S2_WP <20>

S2_RDY# <20>
S2_WE# <20>
S2_INPACK# <20>
S2_WAIT# <20>

S2_A16

S2_CE1# <20>

S2_REG# <20>

S2_VCC

C348

C223

.1UF

.1UF

Title

Size Document Number Rev

Date: Sheet of

.1UF

.1UF

C360
.1UF

S2_A[0..25]
S2_D[0..15]

Compal Electronics, Inc.

O2Micro OZ6933 Cardbus Controller
888L2 Main Board

2

S2_A[0..25] <20>
S2_D[0..15] <20>

19 42Thursday, January 11, 2001

1

2.0

PCMCIA POWER CTRL.

CARDBUS

SOCKET

1 2
1 2
1 2

1 2
1 2
1 2
1 2

S1_VPP

S2_VPP

S2_WP

C174

1UF

C214

.1UF

C187

.1UF

C213

.1UF

C181

.1UF

C215

.1UF

C180

.1UF

12

C238
.1UF

12

C282
.1UF

1 2

R276 22K_0402

S2_A23

1 2

R252

S1_A23

1 2

R244

S1_WP

R225

SLDATA<19>
SLATCH<19>

RTCCLK<15,19>

+

+

22K_0402

1 2

+3VALW

C234

4.7UF_25V_1206
25V

C264

4.7UF_25V_1206
25V

S2_VCC
S2_VCC

22K_0402

S1_VCC
S1_VCC

22K_0402

+5VALW

S1_VCC

S2_VCC

+12VALW

U18

25

VCC_5V

7

12V

24

12V

1

5V

2

5V

30

5V

15

3.3V

16

3.3V

17

3.3V

3

DATA

5

LATCH

4

CLOCK

13

APWR_GOOD#

19

BPWR_GOOD#

18 12

OC# GND

TPS2216

12

C322
.1UF

12

C288
.1UF

12

C347

10UF_10V_1206

12

C307

10UF_10V_1206

AVPP
AVCC
AVCC
AVCC

BVPP
BVCC
BVCC
BVCC

RESET

RESET#

S1_VPP

S1_VPP
S1_VCC

12

S2_VPP

C221

4.7UF_10V_0805

S2_VPP
S2_VCC

12

C175

4.7UF_10V_0805

PCMRST# <19,22>

C388
1000PF

1 2

S1_D3

S1_VPP

S1_CD1#
S1_D4
S1_D11
S1_D5
S1_D12

S1_D6
S1_D13
S1_D7
S1_D14
S1_CE1#
S1_D15

S1_A10
S1_CE2#
S1_OE#
S1_VS1
S1_A11

S1_IORD#
S1_A9
S1_IOWR#
S1_A8
S1_A17

S1_A13
S1_A18
S1_A14
S1_A19
S1_WE#
S1_A20
S1_RDY#
S1_A21
S1_VCC
S1_VCC
S1_VPP
S1_VPP
S1_A16

S1_A22
S1_A15
S1_A23
S1_A12
S1_A24
S1_A7

S1_A25
S1_A6
S1_VS2
S1_A5
S1_RST
S1_A4
S1_WAIT#

S1_A3

S1_INPACK#

S1_A2
S1_REG#
S1_A1
S1_BVD2
S1_A0

S1_BVD1
S1_D0
S1_D8
S1_D1
S1_D9
S1_D2
S1_D10

S1_WP
S1_CD2#

12

C204
1000PF

S1_CD1#<19>

S1_CE1#<19>

S1_CE2#<19>
S1_OE#<19>
S1_VS1<19>

S1_IORD#<19>

S1_IOWR#<19>

S1_WE#<19>

S1_RDY#<19>

S1_VCC

S1_VS2<19>
S1_RST<19>

S1_WAIT#<19>

S1_INPACK#<19>

S1_REG#<19>
S1_BVD2<19>

S1_BVD1<19>

S1_WP<19>
S1_CD2#<19>

8
9
10
11

23
20
21
22

6
14

26

NC

27

NC

28

NC

29

NC

S1_A[0..25]<19>
S1_D[0..15]<19>

S2_A[0..25]<19>

S2_D[0..15]<19>

A1
A2
A3
A4
A5
A6
A7
A8

A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77

80
81

J1

PCMCIA CONN P154

S1_A[0..25]
S1_D[0..15]
S2_A[0..25]
S2_D[0..15]

C203
1000PF

1 2

S2_CE1# <19>

S2_CE2# <19>
S2_OE# <19>
S2_VS1 <19>

S2_IORD# <19>
S2_IOWR# <19>

S2_WE# <19>
S2_RDY# <19>

S2_VCC

S2_VPP

S2_WP <19>
S2_CD2# <19>

J5
PCMCIA CONN P154
BERG62183-001T

C390
1000PF

S2_CD1# <19>

S2_VS2 <19>
S2_RST <19>
S2_WAIT# <19>

S2_INPACK# <19>
S2_REG# <19>
S2_BVD2 <19>

S2_BVD1 <19>

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77

80
81

B1

B1

B2

B2
B3
B4
B5
B6
B7
B8

B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77

78
79

S2_D3

B3

S2_CD1#

B4

S2_D4

B5

S2_D11

B6

S2_D5

B7

S2_D12

B8
B9

S2_D6

B10

S2_D13

B11

S2_D7

B12

S2_D14

B13

S2_CE1#

B14

S2_D15

B15
B16

S2_A10

B17

S2_CE2#

B18

S2_OE#

B19

S2_VS1

B20

S2_A11

B21
B22

S2_IORD#

B23

S2_A9

B24

S2_IOWR#

B25

S2_A8

B26

S2_A17

B27
B28

S2_A13

B29

S2_A18

B30

S2_A14

B31

S2_A19

B32

S2_WE#

B33

S2_A20

B34

S2_RDY#

B35

S2_A21

B36

S2_VCC

B37

S2_VCC

B38

S2_VPP

B39

S2_VPP

B40

S2_A16

B41
B42

S2_A22

B43

S2_A15

B44

S2_A23

B45

S2_A12

B46

S2_A24

B47

S2_A7

B48
B49

S2_A25

B50

S2_A6

B51

S2_VS2

B52

S2_A5

B53

S2_RST

B54

S2_A4

B55

S2_WAIT#

B56
B57

S2_A3

B58

S2_INPACK#

B59

S2_A2

B60

S2_REG#

B61

S2_A1

B62

S2_BVD2

B63

S2_A0

B64
B65

S2_BVD1

B66

S2_D0

B67

S2_D8

B68

S2_D1

B69

S2_D9

B70

S2_D2

B71

S2_D10

B72
B73

S2_WP

B74

S2_CD2#

B75
B76
B77

78
79

12

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

FOXCONN Cardbus CONN .154PIN
888L2 Main Board

20 42Thursday, January 11, 2001

2.0

5

+3VS

12

C112
.1UF

R135
@33_0402

61

12

12

C144

C148

1000PF

4.7UF_10V_0805
+3VS

R137

4.7K_0402

SUS_STAT#<15>

12

R136

@33_0402

12

C132
@15PF

+3VS

IRQ1<22>

IRQ11<22>
IRQ12<22>

4 5

BASE Address Selection

12

RP14

8P4R-10K

1 8

2 7

3 6

12

C124
.1UF

D D

12

12

C133
@15PF

C C

B B

Signal Pin # Description

BADDR

4

+3VS

1 2

R152 10K_0402

LAD0

LAD0<14,15>

LAD1

LAD1<14,15>

LAD2

LAD2<14,15>

LAD3

LAD3<14,15>

SIRQ<14,16,19>

+3VS

DIR#<17>

DRV0#<17>

XA0<22>
XA1<22>
XA2<22>
XA3<22>

CLK_PCI_SIO
PCIRST#
LFRAME#
LDRQ#0

CLKRUN#
SIRQ

LPCSMI#

1 2

R138 @0_0402

CLK_14M_SIOCLK_PCI_SIO CLK_14M_SIO

1 2

R139 @10K_0402

DISKCHG#
H1SEL#
RDATA#
WRPRT#
TRK0#
WGATE#
WRDATA#
STEP#
DIR#
DRV0#
MTR0#
INDEX#

1.6M_EN#

XA0
XA1
XA2
XA3
XSTB0#
XCNF2

CLK_PCI_SIO<11>

PCIRST#<7,12,14,19,29>

LFRAME#<14,15>

LDRQ#0<15>

CLKRUN#<15,16,19,29>

EC_SMI#<15,22>

CLK_14M_SIO<11>

DISKCHG#<17>

H1SEL#<17>
RDATA#<17>

WRPRT#<17>

TRK0#<17>

WGATE#<17>

WRDATA#<17>

STEP#<17>

MTR0#<17>

INDEX#<17>

1.6M_EN#<17>

XSTB0#<22>

IRQ8

XIOR#<22>

XIOW#<22>

XA12<22>
XA13<22>
XA14<22>
XA15<22>
XA16<22>
XA17<22>
XA18<22>

XIOR#
XIOW#
XA12
XA13
XA14
XA15
XA16
XA17
XA18

U11

15

LAD0

16

LAD1

17

LAD2

18

LAD3

8

LCLK

9

LRESET#

12

LFRAME#

11

LDRQ#

7

LPCPD#

6

CLKRUN#/GPIO36

10

SERIRQ

19

SMI#/GPIO35

20

CLKIN

21

DSKCHG#

22

HDSEL#

23

RDATA#

24

WP#

25

TRK0#

26

WGATE#

27

WDATA#

28

SETP#

29

DIR#

30

DR0#

31

MTR0#

32

INDEX#

33

DENSEL

34

DRATE0/IRSL2

95

XA0/GPIO20

94

XA1/GPIO21

93

XA2/GPIO22

92

XA3/GPIO23

91

XA4/GPIO24/XSTB0#

90

XA5/XSTB1#/XCNF2

87

XA6/GPIO26/PRIQA/XSTB2#

86

XA7/GPIO27/PIRQB

85

XA8/GPIO30/PIRQC

84

XA9/GPIO31/MTR1#/PIRQD

83

XA10/GPIO32/XIORD#/MDRX

82

XA11/GPIO33/XIOWR#/MDTX

81

XA12/GPIO10/JOYABTN1/RI2#

80

XA13/GPIO11/JOYBBTN1/DTR2#_BOUT2

79

XA14/GPIO12/JOYAY/CTS2#

78

XA15/GPIO13/JOYBY/SOUT2

77

XA16/GPIO14/JOYBX/RTS2#

76

XA17/GPIO15/JOYAX/SIN2

75

XA18/GPIO16/JOYBBTN0/DSR2#

74

XA19/DCD2#/JOYABTN0/GPIO17

PC87393

3

+3VS

143963

88

VDD

VDD

VDD

VDD

PC87393

XIOWR#/XCS1#/MTR1#/DRATE0

VSS

VSS

VSS

VSS

133864

89

PD0/INDEX#

PD1/TRK0#

PD2/WP#

PD3/RDATA#

PD4/DSKCHG#

PD5/MSEN0

PD6/DRATE0

PD7/MSEN1

PNF/XRDY

SLCT/WGATE#

PE/WDATA#

BUSY_WAIT#/MTR1#

ACK#/DR1#

SLIN#_ASTRB#/STEP#

INIT#/DIR#

ERR#/HDSEL#

AFD#_DSTRB#/DENSEL

STB#_WRITE#

DCD1#

DSR1#

SIN1

RTS1#/TEST

SOUT1/XCNF0

CTS1#

DTR1#_BOUT1/BADDR

XD0/GPIO00/JOYABTN1
XD1/GPIO01/JOYBBTN1

XD6/GPIO06/JOYBBTN0
XD7/GPIO07/JOYABTN0

XIORD#/GPIO37/IRSL2/DR1#

XCS0#/DR1#/XDRY/GPIO25

RI1#

IRTX

IRRX1

IRRX2_IRSL0

IRSL1

IRSL3/PWUREQ#

XD2/GPIO02/JOYAY
XD3/GPIO03/JOYBY
XD4/GPIO04/JOYBX
XD5/GPIO05/JOYAX

XWR#/XCNF1

XRD#/GPIO34/WDO#

2

LPD0

52

LPD1

50

LPD2

48

LPD3

46

LPD4

45

LPD5

44

LPD6

43

LPD7

42
35

LPTSLCT

36

LPTPE

37

LPTBUSY

40

LPTACK#

41

LPTSLCTIN#

47

LPTINIT#

49

LPTERR#

51

LPTAFD#

53

LPTSTB#

54

DCDA#

55

DSRA#

56

RXDA

57

RTSA#

58

TXDA

59

CTSA#

60

DTRA#

61

RIA#

62

70
69
68
67
66

XD0

3

XD1

2

XD2

1

XD3

100

XD4

99

XD5

98

XD6

97

XD7

96

XMEMW#

4

XMEMR#

5
73
71

XIOCHRDY

72

LPD0 <24>
LPD1 <24>
LPD2 <24>
LPD3 <24>
LPD4 <24>
LPD5 <24>
LPD6 <24>
LPD7 <24>

LPTSLCT <24>
LPTPE <24>
LPTBUSY <24>
LPTACK# <24>
LPTSLCTIN# <24>
LPTINIT# <24>
LPTERR# <24>
LPTAFD# <24>
LPTSTB# <24>

DCDA# <24>
DSRA# <24>
RXDA <24>
RTSA# <24>
TXDA <24>
CTSA# <24>
DTRA# <24>
RIA# <24>

XD0 <22>
XD1 <22>
XD2 <22>
XD3 <22>
XD4 <22>
XD5 <22>
XD6 <22>
XD7 <22>

XMEMW# <22>
XMEMR# <22>

EC_FLASH# <22>
XIOCHRDY <22>

12

+3VS

R10810K_0402

1

"0": 2E~2F (Default)
"1": 4E~4F

TEST

XCNF[2:0]

58

"0": Normal (Default)
"1": Test Mode

90, 4, 59

(default) * 1 ROM SOLUTION

2 1 0 Function
x 0 0 No BIOS
x 0 1 Normal Mode. XRDY disabled
0 1 0 Latch Mode. XA12-19, XRDY enabled
1 1 0 Latch Mode. GPIO10~17,XRDY enabled

TXDA

XCNF0

XMEMW#

XCNF1

XCNF2

R311 @10K_0402

R318 10K_0402

R312 @10K_0402

0 1 1 Latch Mode. XA12-19, XRDY disabled

A A

1 1 1 Latch Mode. GPIO10~17,XRDY disabled

+3VS

1 2

1 2

1 2

BADDR PULL-UP :4E
BADDR PULL-DOWN:2E
(DEFAULT)

DTRA#

1 2

R109 @10K_0402

Pin # 61

BASE ADDRESS CONFIGURATIONXBUS RESET CONFIGURATION

+3VS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

5

4

3

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

SUPER I/O PC87393 CHIP

888L2 Main Board

21 42Thursday, January 11, 2001

1

2.0

5

+3VALW

12

C128
.1UF

D D

XSTB0#<21>

C C

IREF: Charger current control
ADPREF: Adapter current control

B B

A_BATT_PRE#

A A

12

R331
10K_0402

XMEMR#<21>

XMEMW#<21>

POK<33>

1 2

C88 .01UF

Q37

2N7002

2N7002

51RST

12

R11010K_0402

12

R111@0_0402

ECAGND KBD_DATA

5

G

2

13

D

S

Q38

+3VALW

1 2

G

2

S

R308 10K_0402

C434
10PF

R328

100K_0402

13

D

EC_HPOWON<25>

FAN_L_H#<25>

DAC_BRIG

A_BATT_PRE#<31>

FAN0_TACH<25>
FAN1_TACH<25>

SRL_LED#<18>

NUM_LED#<18>

CAP_LED#<18>

SMB_EC_CK1<4,12,23,31>
SMB_EC_DA1<4,12,23,31>

INVT_PWM

PCMRST#<19,20>

12

XIOCHRDY<21>

HMEMR#
HMEMW#

IRQ1<21>

IRQ11<21>
IRQ12<21>

12

IREF<32>

ADPREF<32>

SLP_S5#<15>
SLP_S3#<15>
SLP_S1#<11,15>

SUSP#<24,26,30,33>

RING#<24>

GATEA20<14>

KBRST#<14>
ON/OFF<25>

1 2

32.768KHZ

XA12<21>
XA13<21>
XA14<21>
XA15<21>
XA16<21>
XA17<21>
XA18<21>

XIOR#<21>

XIOW#<21>

+RTCVCC

R329

22M

X2

XD0<21>
XD1<21>
XD2<21>
XD3<21>
XD4<21>
XD5<21>
XD6<21>
XD7<21>

XA0<21>
XA1<21>
XA2<21>
XA3<21>

+5VS

1K_0402

A_BATT_PRE#

SMB_EC_CK1
SMB_EC_DA1

KBRST#

12

12

C426

PFAIL#
51RST

33PF

12

C129

.1UF

XA0
XA1
XA2
XA3
XD0
XD1
XD2
XD3
XD4
XD5
XD6
XD7
XA12
XA13
XA14
XA15
XA16
XA17
XA18

XD0
XD1
XD2
XD3
XD4
XD5
XD6
XD7

PAD_LED#

1UF
C130

1 2

CRY1

CRY2

R330
C435

51K

1000PF

12

R321

4

12

4

12

C111

.1UF

166
167
168
169
170
171
172
173
174

10
11
12

15
16
17
18
19
20
21
22

13

14
158
159
157
162
163

156
155
154
153

79
164
165

95

96

97

98

81

82

83

84

85

86

93

94

61

62

63

64

65

68

71

72

73

74

75

76

77

78

28

25

27

12

C87

1000PF

HA0
HA1
HA2
HA3
HA4
HA5
HA6
HA7
HA8

3

HA9

4

HA10

5

HA11

6

HA12

7

HA13

8

HA14

9

HA15
PA3/HA16
PA4/HA17
PE0/HA18

HD0
HD1
HD2
HD3
HD4
HD5
HD6
HD7

HAEN
HIOCHRDY
HIOR#
HIOW#
HMEMCS#/PA0
HMEMRD#/PA1
HMEMWR#/PA2

IRQ1
IRQ8#
IRQ11
IRQ12

PFAIL#
HMR
HPWRON

DA0
DA1
DA2
DA3

PD0/AD0
PD1/AD1
PD2/AD2
PD3/AD3
PD4/AD4
PD5/AD5
PD6/AD6
PD7/AD7

PC0
PC1
PC2
PC3/EXINT0
PC4/EXINT11
PC5/EXINT15

PB0/RING#
PB1/SCL
PB2/SDA
PB3/TA
PB4/TB/EXINT10
PB5/GA20
PB6/HRSTO#
PB7/SWIN

VBAT

32KX1/32CLKIN
32KX2

PC87570-176PIN

161

1086723

U9

VCC

VCC

VCC

VCC

PC87570

3

L17

1 2

BLM11A20

ECAGND

92

AGND

A13/BE0
A14/BE1

A15/PG1/CBRD

A17/PA6

RD/HDEN

WR0#

HRMS/SEL0#

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

KBSOUT0
KBSOUT1
KBSOUT2
KBSOUT3
KBSOUT4
KBSOUT5
KBSOUT6
KBSOUT7
KBSOUT8

KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12
KBSOUT13
KBSOUT14
KBSOUT15

PSDAT1

PSCLK1

PSDAT2

PSCLK2
PSDAT3/PC7
PSCLK3/PC6

PG4/WR1#
PG3/SEL1#

PG2/CLK

PG0/SELIO

PH0/BST0/ENV0
PH1/BST1/ENV1

PH2/BST2/TRIS

PH3/PFS

PH4/PLI

PH5/ISE#

D8/PF0

D9/PF1
D10/PF2
D11/PF3
D12/PF4
D13/PF5
D14/PF6
D15/PF7

A0
A1
A2
A3
A4
A5
A6
A7
A8

A9
A10
A11
A12

D0
D1
D2
D3
D4
D5
D6
D7

+3VALW

1 2

BLM11A20

114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
135
136

137
138
139
140
141
142
143
144

111
112
105

36
35
34
33
32
31
30
29

56
55
54
53
52
51
50
49
48
47
42
41
40
39
38
37

57
58
59
60
69
70

113
106
107
110

104
103
102
101
100
99

145
146
147
148
149
150
151
152

3

L18

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

FRD#
FWR#
FSEL#

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

KBD_CLK
PS2_DATA
PS2_CLK
TP_DATA
TP_CLK

THRM#

ACOFF
EC_SMI#
EC_ON

+3VALW

+5VALW

L19

12

@BLM11A20

KB_VCC

91

80

AVCC

C89

1 2

.1UF

VREF

A16/PA5/FXBUSEN

A18/PE1/SHBM#

NC: 1,2,43,44,45,46,87,88,89,90,131,132,133,134,175,176

GND

GND

GND

GND

GND

242666

109

160

12

R97
10K_0402

U21

39F040
12
11
10

9
8
7
6

5
27
26
23
25

4
28
29

3

2
30

22
24
31

FWE#

GATEA20
KBRST#
THRM#

KBD_DATA <25>
KBD_CLK <25>
PS2_DATA <25>
PS2_CLK <25>
TP_DATA <23>
TP_CLK <23>

THRM# <15>

SIDE_CS_M#/S <17>
MODEN# <17>
SELIO# <23>

KSO16 <23>
KSO17 <18>
ACOFF <32>
EC_SMI# <15,21>
EC_ON <25>
SCI# <15>

EN_FAN0# <25>
EN_FAN1# <25>
VR_ON <26,30>
FSTCHG <32>
MUTE <27>
SYSON <26,31>
ACIN <15,31>
BKOFF# <13>

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

KBA18

10UF_10V_1206

+3VALW

12

14
12

13
7

12

R116

EC_SMI#

2

12

+

C241

+3VALW

R288

100K_0402

1 2

FWR#

12

R124

10K_0402

1 2

R98 10K_0402

2

+3VALW

12

R242
0_0402

C255
.1UF

1 2

R294

1 2

2

G

1 3

D

S

2N7002

Title

Size Document Number Rev

Date: Sheet of

+5VS

100K_0402

EC_FLASH# <21>

Q33

+5VS

PS2_DATA
PS2_CLK

SMB_EC_DA1
SMB_EC_CK1GATEA20

ADB[0..7]
KBA[0..17]
KSI[0..7]
KSO[0..15]

FSEL#
KBA18
KBA15
KBA17

FRD#

SELIO#
BKOFF#

4.7K_0402

10

+3VALW

R310

Compal Electronics, Inc.

KBC/EC PC87570EXT
888L2 Main Board

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

Pin 130 PU for
Zero Latch

R122

10K_0402

D0
D1
D2
D3
D4
D5
D6
D7

VPP

VCC

GND

11

U25D
74LVC32

+3VS

12

13
14
15
17
18
19
20
21

1

32

16

C402

.1UF

10K_0402

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17

CE#
OE#
WE#

RP6
1 8
2 7
3 6
4 5

8P4R-10K

RP35

9
8
7
6

10P8R-10K

RP30
1 8
2 7
3 6
4 5

8P4R-10K

12

ADB[0..7] <23>
KBA[0..17] <23>
KSI[0..7] <18,23>
KSO[0..15] <23>

12

R316

4.7K_0402

1

1
2
3
4
5

+3VALW

1

KBD_DATA
KBD_CLK
TP_DATA

TP_CLK

+5VS

22 42Thursday, January 11, 2001

2.0

1

ADB[0..7]<22>

KBA[0..17]<22>

A A

SELIO#<22>

ADB[0..7]
KBA[0..17]

+3VS

MODPRES#<17>

CD/FDD#<17>

MINI_PME#<29>

PCM_PME#<19>

ENABKL<12,13>

AIR_ADP#<31>

KBA1

SELIO#

MINI_PME#
PCM_PME#

+3VALW

14

4
5

7

RP26 8P4R-100K
1 8
2 7
3 6
4 5

U25B

74LVC32

2

6

INPUT

11 9
13 7
15 5
17 3

19

CC

+3VALW

1 2

20

1A1 1Y1

VCC

1A2 1Y2
1A3 1Y3
1A4 1Y4
2A1 2Y1
2A2 2Y2
2A3 2Y3
2A4 2Y4

1G
2G

GND

10

U26

74LVC244

2 18
4 16
6 14
8 12

1

C373

.1UF

3

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

4

C403

1 2

.1UF

KBA3
SELIO# LARST#

+3V

14

+3VALW

1
2

7

5

+3VALW

U25A

74LVC32

1 2

R317 20K_0402

6

OUTPUT

+3VALW

C411

1 2

.1UF

20

ADB0
ADB1
ADB2
ADB3
ADB4

13 12

ADB5

14 15

ADB6

17 16

ADB7

18 19

AA

1 2

11

C425

3

1UF

U28

3

Q0

D0

4 5

VCC

D1 Q1

7 6

D2 Q2

8 9

D3 Q3
D4 Q4
D5 Q5
D6 Q6
D7 Q7

CLK

1

CLR

GND

10

+3VALW

2

74LVC273

VLBA#LID_SW#

PWR_LED# <18>
BAT2_LED# <18>
SWI# <15>
LID_OUT# <15>
PWRBTN_OUT# <15>

BAT1_LED# <18>
BEEP# <28>

7

D12 1SS355

21

8

BATTLOW# <15>

R120
100K_0402

B B

NM24C164 Address definition: 1 A2 A1# A0 B2 B1 B0 R/W#

GND

+3VALW

12

R300
100K_0402

1

A0

2

A1

3

A2

4

+3VALW

1 2

C412 .1UF

SMB_EC_CK1<4,12,22,31>
SMB_EC_DA1<4,12,22,31>

8
7
6
5

U27

VCC
WC
SCL
SDA

NM24C16

PCM_PME#
MINI_PME#

1 2

100K_0402

1 2

R119

R278

R279

100K_0402

100K_0402

1 2

1 2
AA
CC

EC I2C Bus Address:

24C164: 1011xxx R/W#
24C16: 1010xxx R/W#

CP8
KSO4
KSO5

C C

KSO4
KSO5
KSO16
KSO0
KSO3
KSO2
KSI3
KSO1
KSI5
KSI6

KSO[0..16]<22>

KSI[0..7]<18,22>

D D

KSO[0..16]
KSI[0..7]

KSI0
KSO8
KSO12
KSI7
KSO10
KSO14
KSI4
KSI2
KSI1
KSO6
KSO7
KSO9
KSO13
KSO15
KSO11

JP10

25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

int. kb

32

30
29
28
27
26

31

KSO16
KSO0

KSO3
KSO2
KSO1
KSO8

KSO12
KSO10
KSO14
KSO6

KSO7
KSO9
KSO13
KSO15

KSO11

@8P4C-10PF

CP9

@8P4C-10PF

CP10

@8P4C-10PF

CP11

@8P4C-10PF

1 2

C487 @10PF

18
27
36
45

18
27
36
45

18
27
36
45

INTSPK_L-<27>
INTSPK_L+<27,28>
INTSPK_R-<27>

INTSPK_R+<27,28>

JP12

1 2

1 2

3 4

3 4

5 6

5 6

7 8

7 8

9 10

9 10

11 12

11 12

13 14

13 14

15 16

15 16

17 18

17 18

19 20

19 20

21 22

21 22

23 24

23 24

25

25

JP 25PIN

RBAT

LID_SW#

LID_CL+

TP_CLK <22>
TP_DATA <22>

1 2

L22 FBM-11-451616-800A

12

C145
.1UF

+5VS

TO TOUCH PAD

18
27
36
45

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

1

2

3

4

5

6

Title

EC Extended I/O Port

Size Document Number Rev

888L2 Main Board

Date: Sheet of

7

23 42Thursday, January 11, 2001

8

2.0

1

2

3

4

5

6

7

8

182736

R169

33_0402

RI0F
DTR0F
CTS0F
TXD0F#
RTS0F
RXD0F#
DSR0F
DCD0F

CP3
8P4C-47PF

+5V_PRN

&

12

+5VS_JP5

R168

2.7K_0402

1 2

1

14

2

15

3

16

4

17

5

18

6

19

7

20

8

21

9
22
10
23
11
24
12
25
13

47PF

JP2

5
9
4
8
3
7
2
6
1

DSUB-9
FOXCONN

SERIAL

C158

JP3

LPTCN-25

SERIAL / PARALLEL PORT

+5V

A A

C1

1 2

.1UF

C11

1 2

.1UF

TXDA<21>
RTSA#<21>
DTRA#<21>

SUSP#<22,26,30,33>

B B

U3

28

C1+

24

C1-

1

C2+

2

C2-

14

T1IN

13

T2IN

12

T3IN

4

R1IN

5

R2IN

6

R3IN

7

R4IN

8 15

R5IN R5OUT

22

FORCEOFF

23

FORCEON

MAX3243/MAX3243E

VCC

T1OUT
T2OUT
T3OUT

R2OUTB

R1OUT
R2OUT
R3OUT
R4OUT

INVILID

GND

V+

V-

26

27

3
9

10
11

20
19
18
17
16

21
25

TXD1
RTS1#
DTR1#

COM_RI

12

1 2

1 2

C13
.1UF

.1UF

.1UF

C12

C14

DCDA# <21>
RIA# <21>
RXDA <21>
CTSA# <21>
DSRA# <21>

1 2

L43 68

1 2

L41 68

1 2

L40 68

1 2

L44 68

1 2

L42 68

1 2

L39 68

1 2

L38 68

1 2

L37 68

8P4C-47PF

PARALLEL

+3VALW

R313

D13

MINI_RI#<29>

C C

PCM_RI#<19>

1
2

RB717F

COM_RI

+5V_PRN +5V_PRN

12345

FD7
FD6
FD5
FD4

RP23

10P8R-2.7K

CP5

8P4C-47PF

18
27
36
45

20K_0402

1 2

3

D

13

2

G

S

Q36
2N7002

12345

SLCT
PE
BUSY
ACK#

RP24

10P8R-2.7K

RING# <22>

CP6

8P4C-47PF

18
27
36
45

LPD[0..7]<21>

LPD[0..7]

LPTSTB#<21>

LPTAFD#<21>

68

LPTERR#<21>

68

LPTINIT#<21>

68

LPTSLCTIN#<21>

68

LPTACK#<21>
LPTBUSY<21>

LPTPE<21>

LPTSLCT<21>

1 2

LPD0

L1

1 2

1 2

1 2
1 2

L2 68

LPD1

1 2

L3

L4 68

LPD2

1 2

L25

L26 68

1 2

L5

L24 68

LPD4

1 2

L23 68

LPD5 FD5

1 2

L31 68

LPD6 FD6

1 2

L30

68

LPD7

1 2

L29 68

1 2

L28 68

1 2

L27 68

1 2

L34 68

1 2

L33 68

SERIAL PARALLEL

182736

45

CP4

+5VS

LPTSTB#

45

D8

2 1

1SS355

1 2

AFD/3M#

FD0
ERR#
FD1

PRNINIT#

FD2
SLCTIN#
FD3LPD3

FD4

FD7

ACK#
BUSY
PE
SLCT

D D

109876

+5V_PRN +5V_PRN

FD3
SLCTIN#
FD2

1

CP2 8P4C-47PF
1 8
2 7
3 6
4 5

2

109876

FD1
ERR#
FD0
AFD/3M#PRNINIT#

CP1 8P4C-47PF
1 8
2 7
3 6
4 5

3

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

4

5

6

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Serial/parallel ports
888L2 Main Board

7

24 42Thursday, January 11, 2001

8

2.0

1

2

3

4

5

6

7

8

+5VALW

R198

33.2K_1%

A A

FAN_L_H#<22>

EN_FAN1#<22>

B B

R333
47K_0402

R327

12

330K

1 2

R197

64.9K_1%

1 2

D

13

2

G

SQ7

2N7002

2N7002

+3VALW

+3VALW +3VALW

12

14

1 2

+3V POWER +3V POWER

12

C438
.1UF

2

G

Q6

U29A

74LVC14

R205
1M

13

D

S

+12VALW

1 2

3
2

14

3 4

U14A

84

LM358

+

1

-

C168

4.7UF_10V_0805

U29B

74LVC14

1K_0402
R182

12

12

2SC2411K

+3VS

12

Q27

2

R181
10K_0402

+5VALW

1
3

JP14

1
2
3

MOLEX 53398-0290

FAN1_TACH <22> FAN0_TACH <22>

FAN_L_H#<22>

EN_FAN0#<22>

PWR ON CKT

R325 100_0402

R326 100_0402

+5VALW

R191

33.2K_1%

1 2

R193

64.9K_1%

1 2

D

13

2

G

SQ5

2N7002

2

G

Q4

2N7002

12

12

EC_HPOWON <22>RSMRST# <15> ITP_VR_POK<13>

SYS_PWROK <15,16>

R192
1M

13

+12VALW

1 2

5

+

6

-

D

S

4.7UF_10V_0805

LM358

C171

1K_0402
R196

7

12

U14B

84

2SC2411K

12

+3VS

12

R177
10K_0402

RTC BATT

BATT1

-

RTCBATT

+RTCVCC

Q26

2

12

+

3

HSM126S

+5VALW

1
3

1

2

JP15

1
2
3

MOLEX 53398-0290

D15

CHGRTC

C C

PS2_DATA<22>

PS2_CLK<22>

POLYSWITCH_1.1A

KBD_DATA<22>

KBD_CLK<22>

D D

1

2

+5VS

F3

4516

PS2_DATA
PS2_CLK

W=40mils

KBD_DATA
KBD_CLK

U2

1

DATA IN

2

GND

3 4

CLK IN CLK OUT

KBMF01SC6

1 2

L32

FBM-11-451616-800A

U1

1

DATA IN

2

GND

3 4

CLK IN CLK OUT

KBMF01SC6

PS2 CONN.

6

DATA OUT

5

VCC

KB_ASPS2KB_VCC +3VALW

W=40mils

12

C159

1UF

6

DATA OUT

5

VCC

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

3

JP1

KBD/PS2_6

4
2
1

4

563

5

POWER BTN

EC_ON<22>

ON/OFFBTN<18>

EC_ON

6

12

R125

4.7K_0402

1 2

22K_0402

R126

+3VALW

12

R123

D5

3

DAN202U

2

Q11
DTC124EK

100K_0402

ON/OFF

1
2

13

22K

22K

Title

PS/2/RTC/RST CKT

Size Document Number Rev

888L2 Main Board

Date: Sheet of

ON/OFF <22>
EC_ON# <32>

D6

12

C127

12

1000PF

RLZ20A

WHEN R=0,Vbe=1.35V
WHEN R=33K,Vbe=0.8V

Compal Electronics, Inc.

7

25 42Thursday, January 11, 2001

8

2.0

1

2

3

4

5

6

7

8

RESET & SUSPEND CKT

+12VALW

12

Q46

2N7002

R372
100K_0402

D

13

2

R371

G

1M_0402

S

A A

SYSON#

+5VALW TO +5V Transfer

+5VALW

SUSON

U31

8

D

7

D

6

D

5

D

12

12

C471
.01UF

+5V

SI4800

1

S

2

S

3

S

G

12

4

C469

10UF_10V_1206

12

12

C468

.1UF

R370
470

D

13

SYSON#

2

G

S

Q45
2N7002

+3VALW TO +3V Transfer

+3V+3VALW

SI4800

U8

D
D
D
D

+12VALW

R374

2

G

U12

D
D
D
D

12

13

SI4800

D

SQ47

1

S

2

S

3

12

S

G

4

R375

1M_0402

22UF_10V_1206

+5VALW

12

C472

4.7UF_10V_0805

12

C476

.01UF

12

C123

C114

.1UF

D

SUSON

S Q12

+5VALW TO +5VS Transfer

+5VALW

U32

8

D

7

D

6

D

5

12

D

RUNON

+3VALW TO +3VS Transfer

1

S

2

S

3

S

4

G

12

C140

22UF_10V_1206

12

C136

.1UF

12

R121
470

13

SYSON#

2

G

SI4800

G

2N7002

S
S
S

12

D

13

S

1
2
3
4

R134
470

Q13
2N7002

2

G

+5VS

VR_ON<22,30>

12

12

12

C474

C473
22UF_10V_1206

.1UF

SUSPRUNON

R373
470

Q48

D

13

SUSP

2

G

S

2N7002

VR_ON

+1_8VALW TO +1_8VS Transfer

+1_8VALW +1_8VS

U13

SI4800

8

S

D

7

S

D

6

S

D

5

G

D

12

C163
10UF_10V_1206

8
7
6

B B

C C

D D

5

12

C131
10UF_10V_1206

100K_0402

SUSP

2N7002

+3VALW +3VS

8
7
6
5

12

C138
10UF_10V_1206

1
2
3
4

2

G

+3VALW

+5V

+3V

R332
@100K_0402

1 2

VR_ON#

D

13

S Q39

@2N7002

12

C166

22UF_10V_1206

JP19
3MM

JP20
3MM

12

C167

.1UF

21

21

+CPU_CORE

12

13

2

G

+5VS

+3VS

R171

D

S Q17

@2N7002

12

D

13

S

@330_0603

2

G

R178
470

Q22
2N7002

2

G

+CPU_IO

12

13

SUSPRUNON

D

S Q2

@2N7002

R1

@330_0603

+12VALW

12

R298
10K_0402

SUSP<27>

SUSP#<22,24,30,33>

SYSON#

SYSON<22,31>

Q63

@SMO5

SUSP

D

SUSP#

1

3

13

Q32

2

G

2N7002

S

+12VALW

12

R284
100K_0402

SYSON#

D

13

Q35

2

G

2N7002

S

2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

1

2

3

4

5

6

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

DC/DC INTERFACE
888L2 Main Board

7

26 42Thursday, January 11, 2001

8

2.0

1

12

C198

INTSPK_L+

INTSPK_R+

INTSPK_L+

INTSPK_R+

MUTE<22>

INT_CD_L<17>

INT_CD_R<17>

MONO_IN<28>

4.7UF_10V_0805

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

HP_SENSE

MUTEOUT

+5VS

12

C376
@4.7UF_10V_0805

INT_CD_GND<17>

R226150K
R23375K
R200150K
R20175K

R23275K
R23175K
R20675K
R20775K

MONO_IN

A A

LEFT

RIGHT

B B

C C

D D

C246 1UF

C178 1UF

C245 1UF

C179 1UF

HP_SENSE<28>

VDDA

1 2

R269 @0_1206

12

C349

4.7UF_10V_0805

1

+5VS

MOD_CD_L<17>

MOD_CD_R<17>

LINE_IN_L<28>
LINE_IN_R<28>

R266

47K_0402

2

VDDA

1 2

R229 0_1206

1 2

R194 @0_1206

C235
.1UF

4

21

5

20

16
14

8

11

1 2

R257 6.8K

1 2

R253 6.8K

1 2

R249 6.8K

1 2

R260 6.8K

1 2

R268

4.7K_0402

2

LLINEIN

RLINEIN

LHPIN

RHPIN

HO/LINE#
SE/BTL#

SHUTDW
MUTEIN

MD_SPK<29>

1 2

R256

1 2

3.3K

7

18

LVDD

RVDD

GND/HS

GND/HS

GND/HS

GND/HS

11213

24

1 2

R95 6.8K

1 2

R94 6.8K

1 2

R91 6.8K

1 2

R90 6.8K

1 2

R238 6.8K

1 2

R241 6.8K

1 2

R239 6.8K

1 2

R240 6.8K

12

C350
2700PF

C294 1UF

R254

1 2

U17

ROUT+

ROUT-

LOUT+

MUTEOUT

LBYPASS

RBYPASS

TPA0202

MD_SPK

1 2

3.3K

3

22

15

3

10

LOUT-

9

2

NC

17

NC

23

NC

6
19

12

C331 1UF
C335 1UF

1 2
1 2

C254 2.2UF_0805

1 2

C306 1UF

1 2

C284 1UF

EXTMICIN<28>

1 2

C341 .1UF

1 2

C361 1UF

PC_BEEP<28>

AC97_RST#<15,29>

IAC_SYNC<15,29>

IAC_SDATAO<15,29>

INT_CD_AGND

3

C199
.1UF

INTSPK_R+

INTSPK_R-

INTSPK_L+

INTSPK_L-

MUTEOUT

C193

4.7UF_10V_0805

C314

.1UF

12
12

4

Note: direct connect GNDA to GND.

GNDA GND

INTSPK_R+ <23,28>

INTSPK_R- <23>

INTSPK_L+ <23,28>

INTSPK_L- <23>

W=25mils

12

C270

4.7UF_10V_0805

CD_L_IN

CD_R_IN
INT_CD_AGND

PHONE

C478
.1UF

1 2

14

AUX_L

15

AUX_R

16

VIDEO_L

17

VIDEO_R

23

LIN_IN_L

24

LIN_IN_R

18

CD_L

20

CD_R

19

CD_GNA

21

MIC1

22

MIC2

13

PHONE

12

PC_BEEP

11

RESET#

10

SYNC

5

SDATA_OUT

45

NC

46

NC

47

NC

48

NC

4

GND

7

GND

U22 STAC9700

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

R282
0_1206

VDDA

25

38

AVCC

AVCC

LINE_OUT_L

LINE_OUT_R

MONO_OUT

HP_OUT_L

HP_OUT_R

ID0#
ID1#

EAPD

SPDF

4

+3VS

12

1

VCC

BIT_CLK

SDATA_IN

XTL_IN

XTL_OUT

AFLT1
AFLT2

VREFOUT

REFFLT

CAP2

AGND
AGND

W=25mils

9

VCC

NC
NC
NC
NC
NC

NC

VDD_AC97

12

C363
.1UF

35

36
37
39

C327 @1000PF

41

C340 @1000PF
BIT_CLK_R

6

SDATA_IN_R

8
2

3

29
30
28
27

FLT3D

32

BPCFG

31

FLT1

33

FLT0

34
43
44

40
26
42

LEFT
RIGHT

1 2
1 2

AFTL1

AFTL2
VREFOUT
REFFLT

1 2

12

4.7UF_10V_0805

C287 1000PF
C283 1000PF

R274 22

R275 47

12

C257
1000PF

5

C369

1 2
1 2

C297 1000PF

C308 1UF

1 2

1 2

XTL_IN

XTL_OUT

C260 1000PF

1 2

CAP2

C501
@1UF

C500
.047UF

1 2

5

D11
AS2431L

1 2

1 2

W=15mils

+5VAU

BLM21A601SPT

12

R309

2.4K

1 3

1 2C253 2.2UF_0805

C375 15PF

C258

1UF

1 2

2

6

L55

12

R306

1 2

100K_0402

C379
.1UF

MD_MICMONO_OUT

1 2

R259

IAC_BITCLK <15,29>

SDATA_IN0 <15>

Y2

24.576 MHz
C261 .1UF

C247 1UF1 2C259 1000PF1 2

C262

.1UF

1 2

6

+5VALW

D

13

12

S Q34

2N7002

R271

1 2

442_1%

C248
C260
C259
C501

MD_MIC <29>

100K_NC

EMI Solution 3/1/2000

ADD 15PF(EMI Request)

1 2

C382 22PF

1 2

12

C248

1UF

G

2

SUSP <26>

R270

1 2

5.11K_0.5%

7

C366 68PF

R277

+12VALW

3

+

2

-

12

1 2

0_0402

1 2

1 2

84

U23A

LM358

5.11K_0.5%R272

C365 220PF

.1UF
C405

1

R273

5.1K

12

2

G

12

12

+5VALW

C364

.1UF

8

12

C378
.1UF

D

13

Q30
SI2306DS

S

VDDA

STAC9700 AD1881A

1UF
1000PF
1000PF
Depop

C374
22PF

1 2

VREFOUT <28>

Title

Size Document Number Rev

Date: Sheet of

4.7UF_10V_0805
270PF
270PF
1UF

Compal Electronics, Inc.

AUDIO CODEC & AMP
888L2 Main Board

7

27 42Thursday, January 11, 2001

8

2.0

A

B

C

D

E

AUDIO JACK

R295

100K_0402

1 2

C401 1UF

1 2

1 2

1 2

R430

4.7K_0402

1 2

@2K_0402

1 2

C232

+5VS+3VALW

C3971UF

C3951UF

C3961UF

12

VDDA

12

R264
100K_0402

1

2

3

D10
1SS355

2 1

@2K_0402

1 2

R219

12

C210

@10UF_10V_1206

EXT_MIC

Q31
2SC2411K

C362

1UF

MONO_IN <27>

VDDA

12

R237
100K_0402

EXT. LINE_OUT

12

12

C295
47PF

J3 JA6333L-100

5
4
3

6
2

1
C230
47PF

EXT. MIC

JA6333L-100

J4

5
4
3

6
2
1

HP_SENSE<27>

C233
150UF_6.3V_E

12

150UF_6.3V_E

R387

2K_0402

1 2

1 2

C281

12

INTSPK_R+<23,27>

INTSPK_L+<23,27>

R424

@2K_0402

INT_MIC<18>

EXT_MIC

+

+

R223

2K_0402

L50 BLM11A121S

1 2

1 2

L51

BLM11A121S

12

1 2

L52 BLM11A121S

1 2

L53 BLM11A121S

12

C280

47PF

VDDA

1 2

R212 1K_0402

C323
47PF

12

12

C252

C236

47PF

47PF

1 2

C219 4.7UF_10V_0805

1 2

C212 .1UF

12

12

C338
47PF

EXT. LINE IN

JA6333L-100

J2

5

LINE_IN_R<27>

LINE_IN_L<27>

LINE_IN_R
LINE_IN_L

L46 BLM11A121S

1 2
1 2

L49

BLM11A121S

12

12

C186

C222
47PF

47PF

4
3

6
2
1

12

C216
47PF

4 4

BEEP#<23>

3 3

2 2

+3VALW

14

9

10

7

U25C

74LVC32

VREFOUT<27>

@4.7UF_10V_0805

EXTMICIN<27>

R320
100K_0402

1 2

1 2

8

R322
10K_0402

12

C313

+3VALW

U29C

14

74LVC14

5 6

12

C439

+3V POWER

.1UF

PCM_SPK#<19>

SPKR<15>

MOD_MON<29> PC_BEEP <27>

VDDA

U16A

84

@APA2308

3

VDDA

7

1 2

R230

+

2

-

0_0402

1 2

84

+

-

C228@220PF

U16B
@APA2308

5
6

12

C195
@.1UF

1 2

1 2

1 2

1 2

1

12

1 2

R228 33_0402

R291

2K_0402

R3042K_0402

R3022K_0402

R30310K_0402

12

C196

@.1UF

1 2

C200 @1UF

1 2

R221
C229

@.1UF

0.47UF

1 1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

A

B

C

D

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

MONO_IN
888L2 Main Board

28 42Thursday, January 11, 2001

E

2.0

1

2

3

4

5

6

7

8

12

+3V_MINIPCI

C141
.1UF

C155
.1UF

12

C154
.1UF

12

C477

10UF_10V_1206

12

For Compal private Mini-PCI combo card - Mini-PCI type IIIc
pin 21. LAN REQ#
pin 22. LAN GNT#
pin 36. LAN PME#

A A

pin 43. LAN IDSEL

12

+3V_MINIPCI

C475
.1UF

12

C451
1000PF

12

C142
.1UF

MINI_PCI CONNECTOR

RP39 8P4R-0

LAN_EECS<16>

LAN_EEDI<16>

LAN_EEDO<16>

LAN_EECLK<16>

LAN_RXD2<16>
LAN_RXD1<16>

LAN_RXD0<16>

L21

1 2

+3V

0

B B

C C

IAC_BITCLK

R409
@33_0402

1 2

C481

@22PF

1 2

D D

1

+3V_MINIPCI

1 2

1 2

MOD_MON

2

CLK_PCI_MINI

R164
33_0402

C156

22PF

AC_CODEC_ID1#

1 8
2 7
3 6
4 5

R403 0_040212
R418 0_040212
R405 0_040212

CLK_PCI_MINI<11>

@100_0402

AD28

1 2

R157

MINI_RI#<24>

+5VS

MD_SPK

12

R128 @0_0402

REQ#2<14,16>

REQ#1<14,16>

C/BE#2<14,19>

IRDY#<14,16,19>

CLKRUN#<15,16,19,21>

SERR#<14,16,19>

PERR#<14,16,19>
C/BE#1<14,19>

IAC_SYNC<15,27>

SDATA_IN1<15>

IAC_BITCLK<15,27>

MOD_MON<28>

LAN_EECS_R
LAN_EEDI_R

LAN_EEDO_R
LAN_EECLK_R
LAN_RXD2_R

LAN_RXD1_R
LAN_RXD0_R

PIRQB#<14,16>

R378 @0_0402

REQ#1
AD31

AD29
AD27

AD25

C/BE#3<14,19>

MD_MIC<27>

1 2

L56 FBM-11-160808-121

+5VS_MINIPCI

3

AD23

AD21
AD19

AD17

CLKRUN#

AD14
AD12 AD11

AD10

AD8

AD7

AD5
AD3

+5VS

AD1

IAC_BITCLK

+3VAUX

MOD_MON

R381 @0_0402

C430
.1UF

12

12

12

JP18

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
51 52
53 54
55 56
57 58
59 60
61 62
63 64
65 66
67 68
69 70
71 72
73 74
75 76
77 78
79 80
81 82
83 84
85 86
87 88
89 90
91 92
93 94
95 96
97 98
99 100
101 102
103 104
105 106
107 108
109 110
111 112
113 114
115 116
117 118
119 120
121 122
123 124

MINI_PCI CONN.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

4

LAN_EECS_R
LAN_PHYRST_R
LAN_TXD2_R

LAN_TXD1_R
LAN_TXD0_R

AD[0..31]<14,19>

R401 0_040212
R402 0_0402
R417 0_040212
R404 0_040212
R406 0_040212
R408 0_040212R407 0_040212

+5VS

R379 @0_0402

+3VAUX

GNT#1

AD30
AD28

AD26
AD24

1 2
R154 100_0402
AD22
AD20

AD18
AD16

AD15
AD13

AD9

AD6
AD4
AD2
AD0

1 2

R419 1K_0402

AC_CODEC_ID0#

MD_SPK

+3VAUX

AD[0..31]

12

12

GNT#1 <14,16>

12

R380 @0_0402

AD27

PAR <14,19>

FRAME# <14,16,19>
TRDY# <14,16,19>
STOP# <14,16,19>

DEVSEL# <14,16,19>

C/BE#0 <14,19>

IAC_SDATAO <15,27>

AC97_RST# <15,27>

MD_SPK <27>

MPCIACT# <14>

+3VAUX +3VALW +3V

5

LAN_PHYRST <16>
LAN_TXD2 <16>

LAN_TXD1 <16>
LAN_TXD0 <16>

PIRQD# <14,16>
GNT#2 <14,16>

PCIRST# <7,12,14,19,21>

0

MINI_PME# <23>

1 2

R165 @0

1 2

R323 0

12

C429
.1UF

R166 @33_040212C157 @22PF

L57

1 2

+3V_MINIPCI

+5VS

12

C137

.1UF

6

LAN_PHYCLK <16>

+3V

AC_CODEC_ID1# AC_CODEC_ID0#Connection

SDATA_IN1 0 1

12

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Mini-PCI Connector
888L2 Main Board

7

29 42Thursday, January 11, 2001

8

2.0

A

1 1

+3VALWP

100K

PC13

1 2

220PF

PR92

100K

2N7002

1 2

21

D

13

PQ7

S

+5VALWP

V_GATE<15>

2 2

PC12

1UF_0805_25V

+3VALWP

VR_POK<13>

3 3

VID4<4>

VID3<4>
VID2<4>

PD22

G

2

RB751V

PC14

7

VID1<4>

VID0<4>

VR_ON<22,26>

12

0.22UF_0805_16V

PR13

1.2M_1%

1 2

PU2B
LM358

1 2

2VREF

PR8

150K_1%

5

+

6

-

12

PC98
1000PF

PR4

CPU_IOP Detector
Low 1.43 1.35 1.29
High 1.08 1.03 0.99

Delay time (ms)
264 156 108

4 4

SUSP#<22,24,26,33>

VR_ON<22,26>

A

PC21

22UF_B_6.3V

+3VALWP

+

1 2

@ 0

PR22

1 2

0

PR23

4

3

PU3

S-816A25

VIN

ON/OFF#

PQ10

2SB1132

SOT-89

3 2

1
1

2

B

PR106

@0

PU1

MAX1711

12

1 2

2.5VREF

+2_5V_CLKP

+

PGND

VCC

PR10

10K_1%

+CPU_IOP

PC22
22UF_B_6.3V

1 2

PR1

0

1 2

21

SKIP

23

LX

24

DH

22

BST

14
13

DL

1

V+

7
3

FB

4

FBS

12

PR14
100K_1%

PR18
200K_1%

1 2

VCCORE

12

LXCORE
DHCORE

BSTCORE

DLCORE

+1_8VALWP

12

PD23

1SS355

PC79
1UF_0805_16V

PR2

100K

VR_HI/LO#<4,15>

SUSP#<22,24,26,33>

16

D4

17

D3

18

D2

19

D1

20

PR50

VOUT

EXT

VSS

D0

2

SHDN

12

PGOOD

15

VDD

5

CC

9

REF

6 11

ILIM GNDS

10 8

GND TON

PR9
1M_1%

PR15

243K_1%

1 2

PR17
100K_1%

1 2

5

BSTCORE1

1 2

PC11

0.22UF_0805_16V

PC16

4.7UF_1206_25V

C

+5VALWP

21

2.2

PR98

PR6

20

12

PR7

0

12

PQ6

SI3442DV

D

6

2
1

G

PD1

RB751V

PC6

0.1UF_0805_25V

+5VALWP

S

45

3

LM358

1

PC20

68PF

PU2A

578

578

3 6

578

PQ1
SI4884DY
IRF7811A

3 6

241

PQ3
SI4404DY
FDS7764A

241

84

3

+

2

-

PC10

2200PF

+5VALWP

12

PR21

5.1K

1 2

PC17

0.1UF_16V

3 6

241

578

3 6

PQ2

SI4884DY
IRF7811A

241

PR99

PR100

1 2

0

@

PR11

5.1K

D

PQ4
SI4404DY
FDS7764A

12

12

1 2

12

PC1

4.7UF_1210_25V

578

2VREF

0

PR12

PC18

220PF

PR19

0.01UF

PC19

1 2

B+CPU_CORE

12

PC2

4.7UF_1210_25V

3 6

241

13

DTC115EK

300K_0.5%

100K

PQ29
@

100K

PQ8

PC3

12

+

PR16

100K_1%

12

PC4

4.7UF_1210_25V

4.7UF_1210_25V

1 2

0.9UH/20A_LPI
1 2

12

PD21

EC31QS04

FBCORE

PC15
150UF_D_6.3V_KO

2VREF

12

+5VALWP

2

PL1
@1UH

1 2
13

12

PL2

100K

PC97

+CPU_IOP

100K

PR20

PQ9

DTC115EK

100K

12

PC5

0.1UF_0805_25V

@4.7UF_1210_25V

0.003_2512_1%

0.003_2512_1%

2

E

12

PR101

12

PR3

12

PD2

EC10QS04

VR_ON <22,26>

PL9

FBM-L11-322513-121AT

12

2 1

PJP11

@3MM

+CPU_CORE

12

12

+

PC8

220UF_D_4V

B+

Compal Electronics, Inc

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

B

C

D

Title

CORE/IO/CLK

Size Document Number Rev

888L2 Main Board 2.0

Date: Sheet of

30 42Thursday, January 11, 2001

E

1

PCN2
PR34-8R-3PDLA

VIN
GND

AIR_ADP

456

PJP10

1 2

FBM-L11-322513-121AT

12

PC82

0.1UF_0805_25V

@3MM

PL8

21

12

PCN1

BP02078-H1

CLK_SMB

DAT_SMB
BATT_PRS#
SYS_PRES#

REMOTE-SNS

BATT+

GND

PC83

BATT++

+3VALWP

2

3

2

2

PR27

PD3

100

1

@BAS40-04

1 2

PR28

100

3

PD4

1

@BAS40-04

1 2

PR26

100

0.1UF_0805_25V

@BAS40-04

1
2
3
4
5
6
7

1 2

3

PR25

47K

PD5

1 2

1

A_BATT_PRE# <22>

SMB_EC_CK1 <4,12,22,23>

SMB_EC_DA1 <4,12,22,23>

Precharge detector while AC adaptor

+3VALWP

12

PR24
47K

12

PC28
@

AIR_ADP# <23>

PL3
OC9080-D601

2

1 4

3

12

PR109

12

10_1206

PZD5

RLZ24B

12

PC23

100PF_50V

12

PC24

1000PF_50V

13

PQ11

12

PC27

100PF_50V

DTC115EK

100K

2

100K

ADPIN

3

2

7

ADPGND

12

PC26

1000UF_50V

BATT+

VIN

12

PC25
@

High 16.5 15.8 15.1
Low 13.9 13.2 12.5

Vin Detector
High 18.7 17.9 17.1

Low 18.0 17.3 16.5

PR33

78.7K_1%

12

PC32
1000PF

PR40
20K_1%

VIN

12

12

0.1UF_16V

PR39
22K

1 2

PC33

7

PC30
1000PF

PU4B

LM393A

+

-

PR30
1M_1%

5
6

12

12

12

PC31

0.1UF_16V

RTCVREF

PR36
249K_1%

PR38
10K

1 2

13

PQ12

2N7002

PQ13

DTC115EK

Title

Detector

Size Document Number Rev

888L2 Main Board

Date: Sheet of

B+

12

PR31

499K_1%

12

PR37

12

499K_1%

PR42
47K

2

PACIN

12

SYSON <22,26>

2

13

100K

100K

Compal Electronics, Inc.

PC93
1000PF

31 42Thursday, January 11, 2001

2.0

PR29
100K

+5VP

PR32
1M_1%

1 2

VS

12

PC29

0.01UF

PU4A

84

LM393A

3

+

1

2

PR43
10K

-

12

RTCVREF

12

VS

12

PR34
10K

12

PZD1
RLZ3.6B

12

PR41
10K

PR35
10K

1 2

ACIN <15,22>

PACIN <32>

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

SHDN#<33>

ACON<32>

1 2

PD6

RB751V

PD7

RB751V

12

12

12

ACOFF#

PACIN<31>

ACON<31>

VIN

PD26

@1SS355

1 2

PR50
47K

1 2

PQ14

SI4835DY

8
7

5

G

IREF<22>

P2

PQ15

1
2
36

4

12

PR47

150K

D

13

PQ18
2N70022

S

SI4835DY

1
2
3 6

12

4

200K

PR45

ADPREF<22>

12

PC96
@

PR55
100K_1%

1 2

12

PR53

69.8K_1%

8
7

5

1 2

PR97

75K_1%

12

PC41

0.1UF_16V

12

PC94
@

P3

0.02_2512_1%

12

PR51
@20K_1%

12

PR93
@30.1K_1%

12

PR60

69.8K_1%

PR44

B+

12

Iadp = 0~3.33A
Iadp = 0.964*ADPREF

PR49
100K

1 2

1 2

PC38
4700PF

1 2

1 2

PC40
2200PF

PR58
10K

PR52
10K

PR54
1K

B++ B+

12

12

12

PC34

PC35

PC36

4.7UF_1210_25V

FSTCHG <22>

4.7UF_1210_25V

4.7UF_1210_25V

12

PR48

1 2

PR59
330K

PC100
22PF

1 2

0

1 2

1 2

PC92

0.1UF_0805_25V

1 2

1 2

PC43
1500PF

PC37
2200PF

0.1UF_0805_25V

PC86

1 2

12

PD8

1SS355

PR61
10K

PU5
MB3878

1

-INC2

12

2

OUTC2

3

+INE2

4

-INE2

5

FB2

6

VREF

7

FB1

8

-INE1

9

+INE1

12

10

OUTC1

11

OUTD

12

-INC1

+INC2

GND

VCC(o)

OUT

VCC

-INE3

+INC1

24

23

22

CS

21

20

PC39

0.1UF_16V

1 2

19

VH

18

1 2

17

RT

FB3

CTL

PR56

66.5K_1%

16

15

14

13

36

578

1

241

2

12

PC84

0.1UF_0805_25V

PQ17

FDS4435

LXCHRG

PL4

22UH_SPC-1205PA

1 2

PD10

EA60QC04

3

CSH

ACOFF#

@DTC115EK

1
2
3 6

PC85

2200PF

PQ28

PR57

0.02_2512_1%

1 2

PQ16
SI4835DY

8
7

5

PR46

4

47K

1 2

PR96

@47K

1 2

13

100K

2

100K

CC = 0~2.7A
Ich = 0.808*IREF
CV = 17.47V

12

+

PC44

PC42

4.7UF_1210_25V

33UF_EC_25V

12

VIN

ACOFF <22>

12

PC45

4.7UF_1210_25V

BATT+

12

PC46

4.7UF_1210_25V

VIN

BATT+

CHGRTCP

PZD4
RLZ16B

PR66
200_0805

PR65

VS

PD11

RLS4148

12

PD13
RLS4148

12

PZD2
RLZ4.3B

1 2

12

PC50
1UF_0805_25V

12

PR75
22K

2

PR68
100K

PU6
S-81235SG

IN

GND

12

EC_ON#<25>

12

PR62
100_1206

1 2

PQ19
TP0610T

12

12

2

PC47

0.22UF_1206_25V

RTCVREF

3

OUT

1

12

PC51

4.7UF_1206_25V

13

12

PC48

0.1UF_0805_25V

PR76
200_0805

1 2

PD12

RLS4148

PR67
10K

1 2

12

12

CHGRTC

PR69
150K

VS1

12

12

PR70

+5VP

PC49

0.1UF_16V

12

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

1K_1206

12

PZD3
RLZ5.1B

PR71
1K_1206

PR63

47.5K_1%

12

12

PR72
1K_1206

12

PR73
1K_1206

12

PR74
1K_1206

12

PC95
@22PF

B+

150K_1%

12

PC99
22PF

12

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Charger

888L2 Main Board

32 42Thursday, January 11, 2001

2.0

12

+3VALWP

12

+

PC67

150UF_D_6.3V_KO

PC80

0.1UF_0805_25V

12

+

PC68

150UF_D_6.3V_KO

B++

12

2200PF

PC81

10UH_SPC-1205P

12

+

PC69

150UF_D_6.3V_KO

FBM-L11-322513-121AT

2 1

12

PC57

4.7UF_1210_25V

PL6

PR81

0.012_2512_1%

12

+

PC70

150UF_D_6.3V_KO

PL10

PJP12
@3MM

PC58

4.7UF_1210_25V

12

12

12

PD17

BYS10-45

CSH3

12

PD24

B+

12

PR78

0

PC64

4.7UF_1210_25V

BST3

PC74

0.047UF_16V

PD15

RB751V

1 2

12

PC91

25
27
26

24

1
2

3
10
23

7
28

PR79

0.1UF_0805_25V

BST3
DH3
LX3

DL3

CSH3
CSL3
FB3
SKIP#
SHDN#

TIME/ON5
RUN/ON3

10_1206

12

VS

12

22

V+

PU7
MAX1632

VL

21

GND

8

VL

SHDN# <31>

VL

12

PC62

12OUT

VDD

BST5

DH5

LX5

DL5

PGND

CSH5

CSL5

FB5
SEQ
REF

SYNC

RST#

PR83

1 2

PC87

1 2

4.7UF_1206_25V

4
5
18
16
17
19
20
14
13
12
15
9
6
11

@ 0

PD16
RB751V

0.1UF_16V

PC63

4.7UF_1210_25V

VDD
BST5
DH5
LX5

PD25

RB751V

1 2

BST51

12

+12VALWP

12

12

PR84

0

1 2

PC90

0.1UF_0805_25V

2.5VREF

12

PC66

+3VALWP

12

0.1UF_0805_25V

PR80

1 2

4.7UF_1206_25V

100K

PR95

PC56

1 2

0

PC55

0.1UF_0805_25V
1 2

578

PQ26

SI4800DY

DH3

3 6

241

578

12

EC10QS04

3 6

241

PR107
@ 0

1 2 PR108

PR102
@ 0

1 2

SUSP#<22,24,26,30>

PQ27

SI4800DY

+5VP

LX3

DL3

12

PC61

1000PF

12

PR104
0

BST31

PR85
10K

1 2

PR94

0

1 2

12

POK <22>

12

PR105

0

PC54

12

1UF_0805_25V

12

PC88

2200PF

@ 0

1 2

PR103
@ 0

PL5
1UH_BLM3216

PC89

0.1UF_0805_25V

12

12

12

12

PC53

470PF_0805_100V

B++

12

PC59

4.7UF_1210_25V

DL5

PC65

1000PF

SNB1

1 2

PC60

4

2

PR77
22_1206

4.7UF_1210_25V
5

6

SI4834DY

1

3
7
8

PQ21

12

12

FLYBACKSNB

PD18

12

PD14
EC11FS2

4

1

PT1

SDT-1205P-100-120

12

+

PC71

BYS10-45

150UF_D_6.3V_KO

PC52

2.2UF_1206_25V
1 2

2

3

CSH5

12

+

PC72

150UF_D_6.3V_KO

12

PR82

0.015_2512_1%

12

+

PC73

+5VALWP

@150UF_D_6.3V_KO

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

3.3V/5V/12V

888L2 Main Board

33 42Thursday, January 11, 2001

2.0

5

4

3

2

1

PL11

LX18

PU8A
LM393A

12

5UH_SPC_06703

@4.7UH_SLF7045T

12

PD19

RB051L-40

PL7

12

PR91
100K_1%

12

12

PR90

38.3K_1%

D D

12

PR87
10K

PQ22

SI3445DV

S

4 5

G

3

VS

1

D

6
2

1

84

3

+

2

-

PC78

0.01UF

+5VALWP

12

PC76

4.7UF_1206_25V

C C

B B

PD20

RB751V

PC77
2200PF

PQ24
2SA1036K

1 2

12

3

1

1 2

2

PR88
1K

PQ23

2SC2411K

2

1
3

12

PR86
10K

12

PR89
@10K

12

+1.8V+-5%

+1_8VALWP

12

+

PC75
150UF_D_6.3V_KO

2.5VREF
+12VALWP

+1_8VALWP

PJP4
3MM

PJP5
2MM

PJP6
3MM

PJP7
3MM

PJP8
2MM

PJP9
3MM

21

+CPU_IO+CPU_IOP

21

+2_5V_CLK+2_5V_CLKP

21

+5VALW+5VALWP

21

+3VALW+3VALWP

21

+12VALW

21

+1_8VALW

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

5

4

3

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

+1_8VS

888L2 Main Board

34 42Thursday, January 11, 2001

1

2.0