Compal LA-8226P VAL40, K45VD Schematic

A

1 1

2 2

B

C

D

E

Compal Confidential

VAL40 MB Schematic Document

LA-8226P

3 3

Rev: 1.0

2012.07.06

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Cover Sheet

Cover Sheet

Cover Sheet

LA-8226P

LA-8226P

LA-8226P

E

1.0

1.0

1 58Monday, July 09, 2012

1 58Monday, July 09, 2012

1 58Monday, July 09, 2012

1.0

of

of

of

1

2

3

4

5

Compal Confidential

ZZZ1

ZZZ1

PCB-MB

PCB-MB

PCB P/N for Load BOM

DA80000V100

DA80000V100

A A

NV
N13M-GE1

PEG 16X

Gb1B-64
23x23mm

Page 20 ~ 28

LCD conn

B B

CRT Conn

HDMI

C C

Page 30

Page 30

Page 35

LVDS, EDID, DISPOFF#, PWM

RGB, HV Sync, DDC

HDMI, DDC

PCI-e

ort 1

LAN/CRT Board

10/100/1000 LAN

Realtek GbE

RTL8111F

Page 32

port 2p

Mini Card-1

WLAN
Bluetooth

Page 40

VAL40

Intel

Ivy Bridge ULV

Processor

BGA 1023

Intel

PCH

HM76

Page 4 ~ 9

Page 12 ~ 19

LPC BUS

DMI x4

100MHz
5GB/s

+VCC_CORE, +VCCP,
+VCC_GFXCORE_AVG, +1.5V_CPU_VD DQ,
+1.8VS, _VCCSA

FDI x8
(UMA)

100MHz

2.7GT/s

PANTHER-POINT

FCBGA 989 Balls

+1.05VS, +1.8VS, +3VS,
+3V_PCH, +5V_PCH, +RTCVCC,
+VCCAFDI_VRM

DDR3 1333/1600MHz 1.5V

Dual Channel

port 2

port 11

USB2.0

port 3

port 10

port 0,1

USB3.0

Azalia

SATA

SPI

port 1,2

port 0

port 2

SPI ROM

DDR3-SO-DIMM X 2

BANK 0, 1, 2, 3

+1.5V, +0.75VS

Page 10, 11

USB conn x1

USB Board

Camera

Page 33

Page 30

Card Reader
RTS5137

MiniCard-1

Page 34

Page 40

USB3.0 conn x2

Page 36

Realtek
ALC269

Page 33

2.5" SATA HDD Connector

Page 31

SATA ODD Connector

Page 31

8MB

Page 12

Memory Card Slot

SD/MMC

Audio Jack (HP)

Audio Jack (MIC)

Speaker Connector

Page 34

Page 33

Page 33

Page 33

D D

DC/DC Interface CKT.

Page 29,41

Fan Control

Page 37

External board

LS-8221P
USB/B

LS-8227P
MIC/B

1

Page 33

Page 30

Click Pad CONN.

2

ENE KB9012QF

+3VLP/+3VALW

page 39

Int. KBD

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Page 38Page 38

Compal Secret Data

Compal Secret Data

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

4

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Block Diagram

Block Diagram

Block Diagram

LA-8226P

LA-8226P

LA-8226P

5

2 58Monday, July 09, 2012

2 58Monday, July 09, 2012

2 58Monday, July 09, 2012

1.0

1.0

1.0

A

BTO Option Table

DIS@ VGA componet

X76L07@ VRAM Hynix 2Gbx8 256Mx8

GCLK@ G-CLK

GCLKDIS@

GCLKUMA@ G-CLK + SLG3NB244

NONGCLK@ NONE G-CLK

AI@ AI Charger

NAI@ Non AI Charger

46@ HDMI royalty rule

I33110@ CPU BGA i3-3110M 2.4G/3M

32350@

CPU BOM Config

i3-3110MI33310@

i3-2370MI32370@

i3-2350MI32350@

BOM Config : DIS

K45B(i3-3110M)

* K45B(i3-2370M)

BOM Config : UMA

K45B(i3-3110M)

K45B(i3-2370M)

* K45B(i3-2350M)

1 1

SMBUS Control Table

EC_SMB_CK1
EC_SMB_DA1

EC_SMB_CK2
EC_SMB_DA2

PCH_SMBCLK
PCH_SMBDATA PCH

PCH_SMLCLK
PCH_SMLDATA

BTO ItemBOM Structure

N13M-GE1_GB1b-64GE8@

G-CLK + SLG3NB300

CPU BGA i3-2370M 2.4G/3MI32370@

CPU BGA i3-2350M 2.3G/3MI

CR

SA00005M830 (INT I3-3110M 2.4G/3M SR0N2 BGA)

2.4G

HR

2.4G

SA000059I60 (INT I3-2370M 2.4G/3M SR0DQ BGA)

HR

2.3G

SA00004QXA0 (INT I3-2350M 2.3G/3M SR0DQ BGA)

DIS@/GE8@/X7607@/GCLK@/GCLKDIS@/I33110@/NAI@

DIS@/GE8@/X7607@/GCLK@/GCLKDIS@/I32370@/NAI@

GCLK@/GCLKUMA@/I33110@/NAI@

CLK@/GCLKUMA@/I32370@/NAI@

G

GCLK@/GCLKUMA@/I32350@/NAI@

SOURCE

KB930

KB930

PCH

MINI1 BATT SODIMM

X
X

V

X X

PCH

X

V

X

V

X

X

X

DESTINATIONDIFFERENTIAL

CLKOUT_PCIE0

MINI CARD WLAN

None

USB3.0 controller

None

None

CLK

CLKOUT_PCIE1

CLKOUT_PCIE2

CLKOUT_PCIE3

CLKOUT_PCIE4

CLKOUT_PCIE5

NoneCLKOUT_PCIE6

CLKOUT_PCIE7 None

CLKOUT_PEG_B

None

VRAMX8X8

N13M-GE1 x8

CPU

EC

X
X

X

V

ZZZ7

X76L07@ZZZ7

X76L07@

CLKOUT

PCI0

VRAM 2G HYN

VRAM 2G HYN

U10

GE8@U10

GE8@

PCI1

PCI2

PCI3

N13M-GE1 GB1b x8

N13M-GE1 GB1b x8

PCI4

Voltage Rails

Power Plane Description

UCPU1

I33110@UCPU1

I33110@

i3-3110M

i3-3110M

UCPU1

I32370@UCPU1

I32370@

i3-2370M

i3-2370M

UCPU1

I32350@UCPU1

I32350@

i3-2350M

i3-2350M

DGPU

X

X
X

V

X

V

X

V

VIN

BATT+

B+

+3VLP 3.3V power rail for 51ON power management ON ON ON ON

+3VALW ON3.3V always on power rail

+LAN_IO OFFON3.3V power rail for ethernet

+3VS_WLAN ON OFF3.3V power rail for WLAN/BT Combo

+3V_PCH ON OFF OFF3.3V power rail for PCH suspend well plane

+3VS 3.3V power rail for DDR SPI,PCH,HDD,Audio,Card Reader ON

+3VSG

+LCDVDD ON OFF OFF

+5VALW ON

+5V_PCH

+5VS OFFON OFF5V power rail for HDD,AUDIO,FAN,Touch PAD

+5VS_ODD

+1.8VS

+1.05VS ON

+VCCP

+1.05VSG

+1.5V

+1.5V_CPU_VDDQ

+1.5VSG

+1.5VS

+0.75VS

+VCCSA

+VCC_CORE

+VCC_GFXCORE_AXG

+VGA_CORE CORE Voltage for N13P Graphics ON OFF OFF ON OFF OFF OFF

FLEX CLOCKS DESTINATION

CLKOUTFLEX010/100/1G LAN

CLKOUTFLEX1

CLKOUTFLEX2

CLKOUTFLEX3

CLK_SD_48M

None

None

None

Symbol Note :

: means Digital Ground

: means Analog Ground

DESTINATION

PCH_LOOPBACK

EC

PCH

None USB2

LPC Debug Port

USB3 PORT

1

2

3

4

None

DESTINATION

USB2.0+3.0

USB2.0+3.0

None

None

USB2 PORT

0

1

2

3

4

5

6

7

8

9

10 Bluetooth

11

12

13

DESTINATION

10/100/1G LAN

MINI CARD WLAN

None

USB3.0 controller

None

None

None

None

Adapter power supply (19V)

Battery power supply (12.6V)

AC or battery power rail for power circuit

3.3V power rail for LCD

5V always on power rail

5V power rail for PCH suspend well plane

5V power rail for SATA ODD

1.8V power rail for CPU,PCH

1.05V power rail for PCH

1.05V power rail for CPU VCCIO,PCH

1.05V power rail for N13P

1.5V power rail for DDR3 system memory

1.5V power rail CPU VDDQ

1.5V power rail for N13P,VRAM

1.5V power rail for PCH,WLAN/BT combo

0.75V power rail for DDR VREF

VCCSA for CPU system agent

CORE Voltage for CPU

1.5V power rail for N13P,VRAM

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

A

SATA

SATA0

SATA1

SATA2

SATA3

SATA4

SATA5

Issued Date

Issued Date

Issued Date

Deep

S0 S3 S5

S3

N/A N/A N/A

N/A N/A N/A N/A

ON OFF OFF3.3V power rail for VGA

ON OFF

ON

ON

ON

ON

ON

ON OFF OFF OFF

ON OFF OFF OFF

ON OFF OFF OFF

ON

ON

ON

N/A

N/A

N/AN/AN/A

ON ON AC/ON; DC/OFF

OFF

ON

OFF OFF

ON

OFF OFF OFF

OFF

OFF

ON AC/ON; DC/OFF

ON

ON OFF

OFF

OFF

OFF

OFF OFF OFF

OFF OFF OFF

OFF OFF

OFF OFF OFF

ON

OFF OFF OFF

OFF

OFF

OFF

ON

OFF

OFF

OFF

OFF

OFFON

OFF

OFF

OFFOFF

DESTINATION

HDD

None

ODD

None

None

None

Compal Secret Data

Compal Secret Data

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

PCH

PCI EXPRESS

Lane 1

Lane 2

Lane 3

Lane 4

Lane 5

Lane 6

Lane 7

Lane 8

DESTINATION

USB2.0+3.0

USB2.0+3.0

Card Reader

None

None

None

None

None

None

JMINI1 (WLAN)

CAMERA

None

None

Compal Electronics, Inc.

Title

Title

Title

Notes List

Notes List

Notes List

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

LA-8226P

LA-8226P

LA-8226P

Date: Sheet of

Date: Sheet of

Date: Sheet of

3 58Monday, July 09, 2012

3 58Monday, July 09, 2012

3 58Monday, July 09, 2012

1.0

1.0

1.0

5

UCPU1A

D D

DMI_CRX_PTX_N014
DMI_CRX_PTX_N114
DMI_CRX_PTX_N214
DMI_CRX_PTX_N314

DMI_CRX_PTX_P014
DMI_CRX_PTX_P114
DMI_CRX_PTX_P214
DMI_CRX_PTX_P314

14

DMI_CTX_PRX_N0

14

DMI_CTX_PRX_N1

14

DMI_CTX_PRX_N2

14

DMI_CTX_PRX_N3

14

DMI_CTX_PRX_P0

14

DMI_CTX_PRX_P1

14

DMI_CTX_PRX_P2

14

DMI_CTX_PRX_P3

14

FDI_CTX_PRX_N0

14

FDI_CTX_PRX_N1

14

FDI_CTX_PRX_N2

14

FDI_CTX_PRX_N3

14

FDI_CTX_PRX_N4

14

FDI_CTX_PRX_N5

14

C C

+1.05VS

12

R2

R2

24.9_0402_1%

24.9_0402_1%

eDP_COMPIO
and ICOMPO
signals
should be
shorted

B B

near balls
and routed
with
typical
impedance
<25 mohms

FDI_CTX_PRX_N6

14

FDI_CTX_PRX_N7

14

FDI_CTX_PRX_P0

14

FDI_CTX_PRX_P1

14

FDI_CTX_PRX_P2

14

FDI_CTX_PRX_P3

14

FDI_CTX_PRX_P4

14

FDI_CTX_PRX_P5

14

FDI_CTX_PRX_P6

14

FDI_CTX_PRX_P7

FDI_FSYNC014
FDI_FSYNC114

FDI_INT14

FDI_LSYNC014
FDI_LSYNC114

FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

FDI_FSYNC0
FDI_FSYNC1

FDI_INT

FDI_LSYNC0
FDI_LSYNC1

EDP_COMP

UCPU1A

M2

DMI_RX#[0]

P6

DMI_RX#[1]

P1

DMI_RX#[2]

P10

DMI_RX#[3]

N3

DMI_RX[0]

P7

DMI_RX[1]

P3

DMI_RX[2]

P11

DMI_RX[3]

K1

DMI_TX#[0]

M8

DMI_TX#[1]

N4

DMI_TX#[2]

R2

DMI_TX#[3]

K3

DMI_TX[0]

M7

DMI_TX[1]

P4

DMI_TX[2]

T3

DMI_TX[3]

U7

FDI0_TX#[0]

W11

FDI0_TX#[1]

W1

FDI0_TX#[2]

AA6

FDI0_TX#[3]

W6

FDI1_TX#[0]

V4

FDI1_TX#[1]

Y2

FDI1_TX#[2]

AC9

FDI1_TX#[3]

U6

FDI0_TX[0]

W10

FDI0_TX[1]

W3

FDI0_TX[2]

AA7

FDI0_TX[3]

W7

FDI1_TX[0]

T4

FDI1_TX[1]

AA3

FDI1_TX[2]

AC8

FDI1_TX[3]

AA11

FDI0_FSYNC

AC12

FDI1_FSYNC

U11

FDI_INT

AA10

FDI0_LSYNC

AG8

FDI1_LSYNC

AF3

eDP_COMPIO

AD2

eDP_ICOMPO

AG11

eDP_HPD#

AG4

eDP_AUX#

AF4

eDP_AUX

AC3

eDP_TX#[0]

AC4

eDP_TX#[1]

AE11

eDP_TX#[2]

AE7

eDP_TX#[3]

AC1

eDP_TX[0]

AA4

eDP_TX[1]

AE10

eDP_TX[2]

AE6

eDP_TX[3]

IVY-BRIDGE_BGA1023

IVY-BRIDGE_BGA1023

@

@

DMI Intel(R) FDI

DMI Intel(R) FDI

eDP

eDP

ER01

4

R1

R1

24.9_0402_1%

24.9_0402_1%

G3

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]

PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]

PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]

PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]

PCI EXPRESS -- GRAPHICS

PCI EXPRESS -- GRAPHICS

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

G1
G4

H22

PCIE_GTX_CRX_N15

J21

PCIE_GTX_CRX_N14

B22

PCIE_GTX_CRX_N13

D21

PCIE_GTX_CRX_N12

A19

PCIE_GTX_CRX_N11

D17

PCIE_GTX_CRX_N10

B14

PCIE_GTX_CRX_N9

D13

PCIE_GTX_CRX_N8

A11

PCIE_GTX_CRX_N7

B10

PCIE_GTX_CRX_N6

G8

PCIE_GTX_CRX_N5

A8

PCIE_GTX_CRX_N4

B6

PCIE_GTX_CRX_N3

H8

PCIE_GTX_CRX_N2

E5

PCIE_GTX_CRX_N1

K7

PCIE_GTX_CRX_N0

K22

PCIE_GTX_CRX_P15

K19

PCIE_GTX_CRX_P14

C21

PCIE_GTX_CRX_P13

D19

PCIE_GTX_CRX_P12

C19

PCIE_GTX_CRX_P11

D16

PCIE_GTX_CRX_P10

C13

PCIE_GTX_CRX_P9

D12

PCIE_GTX_CRX_P8

C11

PCIE_GTX_CRX_P7

C9

PCIE_GTX_CRX_P6

F8

PCIE_GTX_CRX_P5

C8

PCIE_GTX_CRX_P4

C5

PCIE_GTX_CRX_P3

H6

PCIE_GTX_CRX_P2

F6

PCIE_GTX_CRX_P1

K6

PCIE_GTX_CRX_P0

G22

PCIE_CTX_GRX_N15

C23

PCIE_CTX_GRX_N14

D23

PCIE_CTX_GRX_N13

F21

PCIE_CTX_GRX_N12

H19

PCIE_CTX_GRX_N11

C17

PCIE_CTX_GRX_N10

K15

PCIE_CTX_GRX_N9

F17

PCIE_CTX_GRX_N8

F14

PCIE_CTX_GRX_N7

A15

PCIE_CTX_GRX_N6

J14

PCIE_CTX_GRX_N5

H13

PCIE_CTX_GRX_N4

M10

PCIE_CTX_GRX_N3

F10

PCIE_CTX_GRX_N2

D9

PCIE_CTX_GRX_N1

J4

PCIE_CTX_GRX_N0

F22

PCIE_CTX_GRX_P15

A23

PCIE_CTX_GRX_P14

D24

PCIE_CTX_GRX_P13

E21

PCIE_CTX_GRX_P12

G19

PCIE_CTX_GRX_P11

B18

PCIE_CTX_GRX_P10

K17

PCIE_CTX_GRX_P9

G17

PCIE_CTX_GRX_P8

E14

PCIE_CTX_GRX_P7

C15

PCIE_CTX_GRX_P6

K13

PCIE_CTX_GRX_P5

G13

PCIE_CTX_GRX_P4

K10

PCIE_CTX_GRX_P3

G10

PCIE_CTX_GRX_P2

D8

PCIE_CTX_GRX_P1

K4

PCIE_CTX_GRX_P0

PEG_COMP

12 mils

3

+1.05VS

12

PEG_ICOMPI and RCOMPO signals s hould be shorte d and routed
with - max leng th = 500 mils - typical impedan ce = 43 mohms
PEG_ICOMPO sign als should be ro uted with - max length = 500 mi ls

- typical imped ance = 14.5 mohm s

1 2

C1 0.22U_0402_10V6KDIS@ C1 0.22U_0402_10V6KDIS@

1 2

C2 0.22U_0402_10V6KDIS@ C2 0.22U_0402_10V6KDIS@

1 2

C3 0.22U_0402_10V6KDIS@ C3 0.22U_0402_10V6KDIS@

1 2

C4 0.22U_0402_10V6KDIS@ C4 0.22U_0402_10V6KDIS@

1 2

C5 0.22U_0402_10V6KDIS@ C5 0.22U_0402_10V6KDIS@

1 2

C6 0.22U_0402_10V6KDIS@ C6 0.22U_0402_10V6KDIS@

1 2

C7 0.22U_0402_10V6KDIS@ C7 0.22U_0402_10V6KDIS@

1 2

C8 0.22U_0402_10V6KDIS@ C8 0.22U_0402_10V6KDIS@

1 2

C9 0.22U_0402_10V6KDIS@ C9 0.22U_0402_10V6KDIS@

1 2

C10 0.22U_0402_10V6KDIS@ C10 0.22U_0402_10V6KDIS@

1 2

C11 0.22U_0402_10V6KDIS@ C11 0.22U_0402_10V6KDIS@

1 2

C12 0.22U_0402_10V6KDIS@ C12 0.22U_0402_10V6KDIS@

1 2

C13 0.22U_0402_10V6KDIS@ C13 0.22U_0402_10V6KDIS@

1 2

C14 0.22U_0402_10V6KDIS@ C14 0.22U_0402_10V6KDIS@

1 2

C15 0.22U_0402_10V6KDIS@ C15 0.22U_0402_10V6KDIS@

1 2

C16 0.22U_0402_10V6KDIS@ C16 0.22U_0402_10V6KDIS@

1 2

C17 0.22U_0402_10V6KDIS@ C17 0.22U_0402_10V6KDIS@

1 2

C18 0.22U_0402_10V6KDIS@ C18 0.22U_0402_10V6KDIS@

1 2

C19 0.22U_0402_10V6KDIS@ C19 0.22U_0402_10V6KDIS@

1 2

C20 0.22U_0402_10V6KDIS@ C20 0.22U_0402_10V6KDIS@

1 2

C21 0.22U_0402_10V6KDIS@ C21 0.22U_0402_10V6KDIS@

1 2

C22 0.22U_0402_10V6KDIS@ C22 0.22U_0402_10V6KDIS@

1 2

C23 0.22U_0402_10V6KDIS@ C23 0.22U_0402_10V6KDIS@

1 2

C24 0.22U_0402_10V6KDIS@ C24 0.22U_0402_10V6KDIS@

1 2

C25 0.22U_0402_10V6KDIS@ C25 0.22U_0402_10V6KDIS@

1 2

C26 0.22U_0402_10V6KDIS@ C26 0.22U_0402_10V6KDIS@

1 2

C27 0.22U_0402_10V6KDIS@ C27 0.22U_0402_10V6KDIS@

1 2

C28 0.22U_0402_10V6KDIS@ C28 0.22U_0402_10V6KDIS@

1 2

C29 0.22U_0402_10V6KDIS@ C29 0.22U_0402_10V6KDIS@

1 2

C30 0.22U_0402_10V6KDIS@ C30 0.22U_0402_10V6KDIS@

1 2

C31 0.22U_0402_10V6KDIS@ C31 0.22U_0402_10V6KDIS@

1 2

C32 0.22U_0402_10V6KDIS@ C32 0.22U_0402_10V6KDIS@

1 2

C33 0.22U_0402_10V6KDIS@ C33 0.22U_0402_10V6KDIS@

1 2

C34 0.22U_0402_10V6KDIS@ C34 0.22U_0402_10V6KDIS@

1 2

C35 0.22U_0402_10V6KDIS@ C35 0.22U_0402_10V6KDIS@

1 2

C36 0.22U_0402_10V6KDIS@ C36 0.22U_0402_10V6KDIS@

1 2

C37 0.22U_0402_10V6KDIS@ C37 0.22U_0402_10V6KDIS@

1 2

C38 0.22U_0402_10V6KDIS@ C38 0.22U_0402_10V6KDIS@

1 2

C39 0.22U_0402_10V6KDIS@ C39 0.22U_0402_10V6KDIS@

1 2

C40 0.22U_0402_10V6KDIS@ C40 0.22U_0402_10V6KDIS@

1 2

C41 0.22U_0402_10V6KDIS@ C41 0.22U_0402_10V6KDIS@

1 2

C42 0.22U_0402_10V6KDIS@ C42 0.22U_0402_10V6KDIS@

1 2

C43 0.22U_0402_10V6KDIS@ C43 0.22U_0402_10V6KDIS@

1 2

C44 0.22U_0402_10V6KDIS@ C44 0.22U_0402_10V6KDIS@

1 2

C45 0.22U_0402_10V6KDIS@ C45 0.22U_0402_10V6KDIS@

1 2

C46 0.22U_0402_10V6KDIS@ C46 0.22U_0402_10V6KDIS@

1 2

C47 0.22U_0402_10V6KDIS@ C47 0.22U_0402_10V6KDIS@

1 2

C48 0.22U_0402_10V6KDIS@ C48 0.22U_0402_10V6KDIS@

1 2

C49 0.22U_0402_10V6KDIS@ C49 0.22U_0402_10V6KDIS@

1 2

C50 0.22U_0402_10V6KDIS@ C50 0.22U_0402_10V6KDIS@

1 2

C51 0.22U_0402_10V6KDIS@ C51 0.22U_0402_10V6KDIS@

1 2

C52 0.22U_0402_10V6KDIS@ C52 0.22U_0402_10V6KDIS@

1 2

C53 0.22U_0402_10V6KDIS@ C53 0.22U_0402_10V6KDIS@

1 2

C54 0.22U_0402_10V6KDIS@ C54 0.22U_0402_10V6KDIS@

1 2

C55 0.22U_0402_10V6KDIS@ C55 0.22U_0402_10V6KDIS@

1 2

C56 0.22U_0402_10V6KDIS@ C56 0.22U_0402_10V6KDIS@

1 2

C57 0.22U_0402_10V6KDIS@ C57 0.22U_0402_10V6KDIS@

1 2

C58 0.22U_0402_10V6KDIS@ C58 0.22U_0402_10V6KDIS@

1 2

C59 0.22U_0402_10V6KDIS@ C59 0.22U_0402_10V6KDIS@

1 2

C60 0.22U_0402_10V6KDIS@ C60 0.22U_0402_10V6KDIS@

1 2

C61 0.22U_0402_10V6KDIS@ C61 0.22U_0402_10V6KDIS@

1 2

C62 0.22U_0402_10V6KDIS@ C62 0.22U_0402_10V6KDIS@

1 2

C63 0.22U_0402_10V6KDIS@ C63 0.22U_0402_10V6KDIS@

1 2

C64 0.22U_0402_10V6KDIS@ C64 0.22U_0402_10V6KDIS@

PCIE_GTX_C_CRX_N15
PCIE_GTX_C_CRX_N14
PCIE_GTX_C_CRX_N13
PCIE_GTX_C_CRX_N12
PCIE_GTX_C_CRX_N11
PCIE_GTX_C_CRX_N10
PCIE_GTX_C_CRX_N9
PCIE_GTX_C_CRX_N8
PCIE_GTX_C_CRX_N7
PCIE_GTX_C_CRX_N6
PCIE_GTX_C_CRX_N5
PCIE_GTX_C_CRX_N4
PCIE_GTX_C_CRX_N3
PCIE_GTX_C_CRX_N2
PCIE_GTX_C_CRX_N1
PCIE_GTX_C_CRX_N0

PCIE_GTX_C_CRX_P15
PCIE_GTX_C_CRX_P14
PCIE_GTX_C_CRX_P13
PCIE_GTX_C_CRX_P12
PCIE_GTX_C_CRX_P11
PCIE_GTX_C_CRX_P10
PCIE_GTX_C_CRX_P9
PCIE_GTX_C_CRX_P8
PCIE_GTX_C_CRX_P7
PCIE_GTX_C_CRX_P6
PCIE_GTX_C_CRX_P5
PCIE_GTX_C_CRX_P4
PCIE_GTX_C_CRX_P3
PCIE_GTX_C_CRX_P2
PCIE_GTX_C_CRX_P1
PCIE_GTX_C_CRX_P0

PCIE_CTX_C_GRX_N15
PCIE_CTX_C_GRX_N14
PCIE_CTX_C_GRX_N13
PCIE_CTX_C_GRX_N12
PCIE_CTX_C_GRX_N11
PCIE_CTX_C_GRX_N10
PCIE_CTX_C_GRX_N9
PCIE_CTX_C_GRX_N8
PCIE_CTX_C_GRX_N7
PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_N5
PCIE_CTX_C_GRX_N4
PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_N0

PCIE_CTX_C_GRX_P15
PCIE_CTX_C_GRX_P14
PCIE_CTX_C_GRX_P13
PCIE_CTX_C_GRX_P12
PCIE_CTX_C_GRX_P11
PCIE_CTX_C_GRX_P10
PCIE_CTX_C_GRX_P9
PCIE_CTX_C_GRX_P8
PCIE_CTX_C_GRX_P7
PCIE_CTX_C_GRX_P6
PCIE_CTX_C_GRX_P5
PCIE_CTX_C_GRX_P4
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_P0

PCIE_GTX_C_CRX_N[0..15]

PCIE_GTX_C_CRX_P[0..15]

PCIE_CTX_C_GRX_N[0..15]

PCIE_CTX_C_GRX_P[0..15]

20

20

2

UCPU1I

UCPU1I

BG17

VSS[181]

BG21

VSS[182]

BG24

VSS[183]

BG28

VSS[184]

BG37

VSS[185]

BG41

VSS[186]

20

20

BG45

VSS[187]

BG49

VSS[188]

BG53

VSS[189]

BG9

VSS[190]

C29

VSS[191]

C35

VSS[192]

C40

VSS[193]

D10

VSS[194]

D14

VSS[195]

D18

VSS[196]

D22

VSS[197]

D26

VSS[198]

D29

VSS[199]

D35

VSS[200]

D4

VSS[201]

D40

VSS[202]

D43

VSS[203]

D46

VSS[204]

D50

VSS[205]

D54

VSS[206]

D58

VSS[207]

D6

VSS[208]

E25

VSS[209]

E29

VSS[210]

E3

VSS[211]

E35

VSS[212]

E40

VSS[213]

F13

VSS[214]

F15

VSS[215]

F19

VSS[216]

F29

VSS[217]

F35

VSS[218]

F40

VSS[219]

F55

VSS[220]

G51

VSS[221]

G6

VSS[222]

G61

VSS[223]

H10

VSS[224]

H14

VSS[225]

H17

VSS[226]

H21

VSS[227]

H4

VSS[228]

H53

VSS[229]

H58

VSS[230]

J1

VSS[231]

J49

VSS[232]

J55

VSS[233]

K11

VSS[234]

K21

VSS[235]

K51

VSS[236]

K8

VSS[237]

L16

VSS[238]

L20

VSS[239]

L22

VSS[240]

L26

VSS[241]

L30

VSS[242]

L34

VSS[243]

L38

VSS[244]

L43

VSS[245]

L48

VSS[246]

L61

VSS[247]

M11

VSS[248]

M15

VSS[249]

IVY-BRIDGE_BGA1023

IVY-BRIDGE_BGA1023

@

@

ER01

VSS

VSS

1

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8

VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11

NCTF

NCTF

VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14

VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]

M4
M58
M6
N1
N17
N21
N25
N28
N33
N36
N40
N43
N47
N48
N51
N52
N56
N61
P14
P16
P18
P21
P58
P59
P9
R17
R20
R4
R46
T1
T47
T50
T51
T52
T53
T55
T56
U13
U8
V20
V61
W13
W15
W18
W21
W46
W8
Y4
Y47
Y58
Y59
G48

A5
A57
BC61
BD3
BD59
BE4
BE58
BG5
BG57
C3
C58
D59
E1
E61

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(1/6) DMI,FDI,PEG

PROCESSOR(1/6) DMI,FDI,PEG

PROCESSOR(1/6) DMI,FDI,PEG

LA-8226P

LA-8226P

LA-8226P

1

4 58Monday, July 09, 2012

4 58Monday, July 09, 2012

4 58Monday, July 09, 2012

1.0

1.0

1.0

5

Processor Pullups

H_PROCHOT#

D D

@

@

1 2

1 2

C68 100P_0402_50V8J

C68 100P_0402_50V8J

H_PECI

+1.05VS

R1662_0402_5% R1662_0402_5%

Reserve for EMI please close to JCPU1

4

3

1 2

R9

14

SYSTEM_PWROK

PM_DRAM_PWR GD14

+3V_PCH

200_0402_1%

200_0402_1%

R9

1 2

R14

R14

2

+3VS

12

10K_0402_5%

10K_0402_5%

0_0402_5%@

0_0402_5%@

1 2

R11 0_0402_5%R11 0_0402_5%

R3

R3

S_PWG

D_PWG

+3V_PCH

R576

R576

1 2

0_0402_5%

0_0402_5%

1

2

ER03

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

2

5

U1

U1

P

A

4

O

B

G

74AHC1G09GW TSSOP 5P

74AHC1G09GW TSSOP 5P

3

1

+1.5V_CPU_VDDQ

C65

C65

12

R4

R4
200_0402_1%

200_0402_1%

VDDPWRGOOD

UCPU1B

UCPU1B

MISC THERMAL PWR MANAGEMENT

16

H_SNB_IVB#

C C

R23

R23

H_THERMTRIP#

R684

R684

1 2

33_0402_5%

33_0402_5%

R36

R36

H_CATERR#

H_PECI

H_PROCHOT#_R

H_PM_SYNC

H_CPUPWRGD_R

VDDPWRGOOD_R

BUF_CPU_RST#

T1

T1

PAD @

PAD @

39

H_PECI

H_CPUPWRGD

1 2

56_0402_5%

56_0402_5%

1 2

130_0402_1%

130_0402_1%

H_PROCHOT#39

16

H_THERMTRIP#

14

H_PM_SYNC

B B

H_CPUPWRGD16

VDDPWRGOOD

F49

PROC_SELECT#

C57

PROC_DETECT#

C49

CATERR#

A48

PECI

C45

PROCHOT#

D45

THERMTRIP#

C48

PM_SYNC

B46

UNCOREPWRGOOD

BE45

SM_DRAMPWR OK

D44

RESET#

MISC THERMAL PWR MANAGEMENT

DPLL_REF_CLK

DPLL_REF_CLK#

CLOCKS

CLOCKS

SM_DRAMRST#

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

DDR3

MISC

DDR3

MISC

JTAG & BPM

JTAG & BPM

BCLK

BCLK#

PRDY#

PREQ#

TCK
TMS

TRST#

TDO

DBR#

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

TDI

J3

CLK_CPU_DMI_R

H2

CLK_CPU_DMI#_R

AG3

CLK_CPU_DPLL_R

AG1

CLK_CPU_DPLL#_R

AT30

H_DRAMRST#

BF44

SM_RCOMP0

BE43

SM_RCOMP1

BG43

SM_RCOMP2

N53

XDP_PRDY#

N55

XDP_PREQ#

L56

XDP_TCK

L55

XDP_TMS

J58

XDP_TRST#

M60

XDP_TDI_R

L59

XDP_TDO_R

K58

XDP_DBRESET#_R1

G58
E55
E59
G55
G59
H60
J59
J61

1 2

R18 0_0402_5%R18 0_0402_5%

1 2

R19 0_0402_5%R19 0_0402_5%

H_DRAMRST#

1 2

R37 0_0402_5%R37 0_0402_5%

6

CLK_CPU_DMI
CLK_CPU_DMI#

XDP_DBRESET#_R

13
13

PLT_RST#15,32,39,40

14

XDP_DBRESET#_R1

H_CPUPWRGD_R

+3VS

1

5

P

NC

A2Y

G

SN74LVC1G07DCKR_SC70-5

SN74LVC1G07DCKR_SC70-5

3

1 2

R241K_0402_5% R241K_0402_5%

1 2

R2510K_0402_5% R2510K_0402_5%

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C69

C69

2

U2

U2

4

BUFO_CPU_RST# BUF_CPU_RST#

+3VS

DDR3 Compensation Signals

IVY-BRIDGE_BGA1023

IVY-BRIDGE_BGA1023

@

@

ER01

1 2

@

@

C70 100P_0402_50V8J

C70 100P_0402_50V8J

H_DRAMRST#

SM_RCOMP0

SM_RCOMP1

SM_RCOMP2

1 2

1 2

1 2

R34140_0402_1% R34140_0402_1%

R3825.5_0402_1% R3825.5_0402_1%

R39200_0402_1% R39200_0402_1%

+1.05VS

12

R15

R15
75_0402_5%

75_0402_5%

R17

R17

1 2

43_0402_1%

43_0402_1%

12

R21

R21

CLK_CPU_DPLL#_R
CLK_CPU_DPLL_R

1 2
1 2

R22

R22

PU/PD for JTAG signals

XDP_TMS

XDP_TDI_R

XDP_PREQ#

XDP_TDO_R

XDP_TCK

XDP_TRST#

1 2

1 2

1 2

1 2

1 2

1 2

@

@

R20

R20
0_0402_5%

0_0402_5%

1K_0402_1%

1K_0402_1%
1K_0402_1%

1K_0402_1%

+1.05VS

+1.05VS

R2651_0402_5% R2651_0402_5%

R2751_0402_5% R2751_0402_5%

R2851_0402_5% @ R2851_0402_5% @

R2951_0402_5% R2951_0402_5%

R3251_0402_5% R3251_0402_5%

R3351_0402_5% R3351_0402_5%

Reserve for EMI please close to JCPU1

1 2

1 2

VDDPWRGOOD_R

H_CPUPWRGD_R

5

1 2

@

@

C426 100P_0402_50V8J

C426 100P_0402_50V8J

BUF_CPU_RST#

Reserve for EMI please close to JCPU1

4

1 2

@

@

C71 100P_0402_50V8J

C71 100P_0402_50V8J

XDP_DBRESET#_R1

Reserve for EMI please close to JCPU1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Custom

Custom

Custom

Date: Sheet

Date: Sheet of

2

Date: Sheet of

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Compal Electronics, Inc.

PROCESSOR(2/6) PM,XDP,CLK

PROCESSOR(2/6) PM,XDP,CLK

PROCESSOR(2/6) PM,XDP,CLK

LA-8226P

LA-8226P

LA-8226P

1

of

5 58Monday, July 09, 2012

5 58Monday, July 09, 2012

5 58Monday, July 09, 2012

1.0

1.0

1.0

@

@

C72 100P_0402_50V8J

A A

C72 100P_0402_50V8J

Reserve for EMI please close to JCPU1

C421 100P_0402_50V8JC421 100P_0402_50V8J

Reserve for EMI please close to JCPU1

5

UCPU1C

10

DDR_A_D[0..63]

D D

C C

10
10
10

10
10
10

DDR_A_BS0
DDR_A_BS1
DDR_A_BS2

DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#

B B

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

UCPU1C

AG6

SA_DQ[0]

AJ6

SA_DQ[1]

AP11

SA_DQ[2]

AL6

SA_DQ[3]

AJ10

SA_DQ[4]

AJ8

SA_DQ[5]

AL8

SA_DQ[6]

AL7

SA_DQ[7]

AR11

SA_DQ[8]

AP6

SA_DQ[9]

AU6

SA_DQ[10]

AV9

SA_DQ[11]

AR6

SA_DQ[12]

AP8

SA_DQ[13]

AT13

SA_DQ[14]

AU13

SA_DQ[15]

BC7

SA_DQ[16]

BB7

SA_DQ[17]

BA13

SA_DQ[18]

BB11

SA_DQ[19]

BA7

SA_DQ[20]

BA9

SA_DQ[21]

BB9

SA_DQ[22]

AY13

SA_DQ[23]

AV14

SA_DQ[24]

AR14

SA_DQ[25]

AY17

SA_DQ[26]

AR19

SA_DQ[27]

BA14

SA_DQ[28]

AU14

SA_DQ[29]

BB14

SA_DQ[30]

BB17

SA_DQ[31]

BA45

SA_DQ[32]

AR43

SA_DQ[33]

AW48

SA_DQ[34]

BC48

SA_DQ[35]

BC45

SA_DQ[36]

AR45

SA_DQ[37]

AT48

SA_DQ[38]

AY48

SA_DQ[39]

BA49

SA_DQ[40]

AV49

SA_DQ[41]

BB51

SA_DQ[42]

AY53

SA_DQ[43]

BB49

SA_DQ[44]

AU49

SA_DQ[45]

BA53

SA_DQ[46]

BB55

SA_DQ[47]

BA55

SA_DQ[48]

AV56

SA_DQ[49]

AP50

SA_DQ[50]

AP53

SA_DQ[51]

AV54

SA_DQ[52]

AT54

SA_DQ[53]

AP56

SA_DQ[54]

AP52

SA_DQ[55]

AN57

SA_DQ[56]

AN53

SA_DQ[57]

AG56

SA_DQ[58]

AG53

SA_DQ[59]

AN55

SA_DQ[60]

AN52

SA_DQ[61]

AG55

SA_DQ[62]

AK56

SA_DQ[63]

BD37

SA_BS[0]

BF36

SA_BS[1]

BA28

SA_BS[2]

BE39

SA_CAS#

BD39

SA_RAS#

AT41

SA_WE#

IVY-BRIDGE_BGA1023

IVY-BRIDGE_BGA1023

@

@

ER01

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_CK[0]
SA_CK#[0]
SA_CKE[0]

SA_CK[1]
SA_CK#[1]
SA_CKE[1]

SA_CS#[0]
SA_CS#[1]

SA_ODT[0]
SA_ODT[1]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]

SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

4

AU36
AV36
AY26

AT40
AU40
BB26

BB40
BC41

AY40
BA41

AL11
AR8
AV11
AT17
AV45
AY51
AT55
AK55

AJ11
AR10
AY11
AU17
AW45
AV51
AT56
AK54

BG35
BB34
BE35
BD35
AT34
AU34
BB32
AT32
AY32
AV32
BE37
BA30
BC30
AW41
AY28
AU26

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15

DDRA_CLK0
DDRA_CLK0#
DDRA_CKE0

DDRA_CLK1
DDRA_CLK1#
DDRA_CKE1

DDRA_SCS0#
DDRA_SCS1#

DDRA_ODT0
DDRA_ODT1

DDR_A_DQS#[0..7]

DDR_A_DQS[0..7]

DDR_A_MA[0..15]

3

11
10
10
10

10
10
10

10
10

10
10

10

10

10

DDR_B_D[0..63]

11

DDR_B_BS0

11

DDR_B_BS1

11

DDR_B_BS2

11

DDR_B_CAS#

11

DDR_B_RAS#

11

DDR_B_WE#

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

2

UCPU1D

UCPU1D

AL4

SB_DQ[0]

AL1

SB_DQ[1]

AN3

SB_DQ[2]

AR4

SB_DQ[3]

AK4

SB_DQ[4]

AK3

SB_DQ[5]

AN4

SB_DQ[6]

AR1

SB_DQ[7]

AU4

SB_DQ[8]

AT2

SB_DQ[9]

AV4

SB_DQ[10]

BA4

SB_DQ[11]

AU3

SB_DQ[12]

AR3

SB_DQ[13]

AY2

SB_DQ[14]

BA3

SB_DQ[15]

BE9

SB_DQ[16]

BD9

SB_DQ[17]

BD13

SB_DQ[18]

BF12

SB_DQ[19]

BF8

SB_DQ[20]

BD10

SB_DQ[21]

BD14

SB_DQ[22]

BE13

SB_DQ[23]

BF16

SB_DQ[24]

BE17

SB_DQ[25]

BE18

SB_DQ[26]

BE21

SB_DQ[27]

BE14

SB_DQ[28]

BG14

SB_DQ[29]

BG18

SB_DQ[30]

BF19

SB_DQ[31]

BD50

SB_DQ[32]

BF48

SB_DQ[33]

BD53

SB_DQ[34]

BF52

SB_DQ[35]

BD49

SB_DQ[36]

BE49

SB_DQ[37]

BD54

SB_DQ[38]

BE53

SB_DQ[39]

BF56

SB_DQ[40]

BE57

SB_DQ[41]

BC59

SB_DQ[42]

AY60

SB_DQ[43]

BE54

SB_DQ[44]

BG54

SB_DQ[45]

BA58

SB_DQ[46]

AW59

SB_DQ[47]

AW58

SB_DQ[48]

AU58

SB_DQ[49]

AN61

SB_DQ[50]

AN59

SB_DQ[51]

AU59

SB_DQ[52]

AU61

SB_DQ[53]

AN58

SB_DQ[54]

AR58

SB_DQ[55]

AK58

SB_DQ[56]

AL58

SB_DQ[57]

AG58

SB_DQ[58]

AG59

SB_DQ[59]

AM60

SB_DQ[60]

AL59

SB_DQ[61]

AF61

SB_DQ[62]

AH60

SB_DQ[63]

BG39

SB_BS[0]

BD42

SB_BS[1]

AT22

SB_BS[2]

AV43

SB_CAS#

BF40

SB_RAS#

BD45

SB_WE#

IVY-BRIDGE_BGA1023

IVY-BRIDGE_BGA1023

@

@

SB_CK[0]
SB_CK#[0]
SB_CKE[0]

SB_CK[1]
SB_CK#[1]
SB_CKE[1]

SB_CS#[0]
SB_CS#[1]

SB_ODT[0]
SB_ODT[1]

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]

SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

ER01

BA34
AY34
AR22

BA36
BB36
BF27

BE41
BE47

AT43
BG47

AL3
AV3
BG11
BD17
BG51
BA59
AT60
AK59

AM2
AV1
BE11
BD18
BE51
BA61
AR59
AK61

BF32
BE33
BD33
AU30
BD30
AV30
BG30
BD29
BE30
BE28
BD43
AT28
AV28
BD46
AT26
AU22

DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15

1

DDRB_CLK0
DDRB_CLK0#
DDRB_CKE0

DDRB_CLK1
DDRB_CLK1#
DDRB_CKE1

DDRB_SCS0#
DDRB_SCS1#

DDRB_ODT0
DDRB_ODT1

DDR_B_DQS#[0..7]

DDR_B_DQS[0..7]

DDR_B_MA[0..15]

11
11
11

11
11
11

11
11

11
11

11

11

11

+1.5V

12

R40

R40
1K_0402_5%

ER03

R440_0402_5% R440_0402_5%

1K_0402_5%

4

EC_DRAMRST_CNTRL_PCH39

Instant ON

1 2

R41 1K_0402_5%R41 1K_0402_5%

DDR3_DRAMRST#

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

10,11

Compal Secret Data

Compal Secret Data

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

3

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(3/6) DDRIII

PROCESSOR(3/6) DDRIII

PROCESSOR(3/6) DDRIII

LA-8226P

LA-8226P

LA-8226P

1

6 58Monday, July 09, 2012

6 58Monday, July 09, 2012

6 58Monday, July 09, 2012

1.0

1.0

1.0

Q6

Q6

BSS138_SOT23

BSS138_SOT23

D

S

D

S

H_DRAMRST#5

A A

H_DRAMRST# DDR3_DRAMRST#_R

12

R42

R42

4.99K_0402_1%

4.99K_0402_1%

5

13

G

G

2

1

C73

C73

0.047U_0402_16V4Z

0.047U_0402_16V4Z

2

1 2

5

4

3

2

1

CFG Straps for Processor

D D

UCPU1E

UCPU1E

CFG0

CFG2

CFG4
CFG5
CFG6

+VCC_GFXCORE_AXG

PR02

49.9_0402_1%

49.9_0402_1%

C C

Please place as close as JCPU1

R51

R51

49.9_0402_1%

49.9_0402_1%

@

@

+VCC_CORE

12

R46

R46

@

@

VSS_AXG_VAL_SENSE

VSS_VAL_SENSE

12

12

@

@

12

R48

R48

49.9_0402_1%

49.9_0402_1%

@

@

R52

R52

49.9_0402_1%

49.9_0402_1%

T38PAD @T38PAD @
T39PAD @T39PAD @
T40PAD @T40PAD @
T41PAD @T41PAD @
T42PAD @T42PAD @
T43PAD @T43PAD @
T10PAD @T10PAD @
T11PAD @T11PAD @

VCC_VAL_SENSE

VCC_AXG_VAL_SENSE

CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17

VSS_VAL_SENSE

VSS_AXG_VAL_SENSE

Please place as close as JCPU1

B B

B50

CFG[0]

C51

CFG[1]

B54

CFG[2]

D53

CFG[3]

A51

CFG[4]

C53

CFG[5]

C55

CFG[6]

H49

CFG[7]

A55

CFG[8]

H51

CFG[9]

K49

CFG[10]

K53

CFG[11]

F53

CFG[12]

G53

CFG[13]

L51

CFG[14]

F51

CFG[15]

D52

CFG[16]

L53

CFG[17]

H43

VCC_VAL_SENSE

K43

VSS_VAL_SENSE

H45

VAXG_VAL_SENSE

K45

VSSAXG_VAL_SENSE

F48

VCC_DIE_SENSE

H48

RSVD6

K48

RSVD7

BA19

RSVD8

AV19

RSVD9

AT21

RSVD10

BB21

RSVD11

BB19

RSVD12

AY21

RSVD13

BA22

RSVD14

AY22

RSVD15

AU19

RSVD16

AU21

RSVD17

BD21

RSVD18

BD22

RSVD19

BD25

RSVD20

BD26

RSVD21

BG22

RSVD22

BE22

RSVD23

BG26

RSVD24

BE26

RSVD25

BF23

RSVD26

BE24

RSVD27

IVY-BRIDGE_BGA1023

IVY-BRIDGE_BGA1023

@

@

ER01

RESERVED

RESERVED

DC_TEST_A58
DC_TEST_A59

DC_TEST_C59

DC_TEST_A61
DC_TEST_C61
DC_TEST_D61

DC_TEST_BD61
DC_TEST_BE61

DC_TEST_BE59
DC_TEST_BG61
DC_TEST_BG59
DC_TEST_BG58

DC_TEST_BG4
DC_TEST_BG3
DC_TEST_BE3
DC_TEST_BG1
DC_TEST_BE1
DC_TEST_BD1

BCLK_ITP

BCLK_ITP#

RSVD30
RSVD31
RSVD32
RSVD33

RSVD34
RSVD35
RSVD36
RSVD37
RSVD38

RSVD39
RSVD40

RSVD41
RSVD42
RSVD43
RSVD44

RSVD45

DC_TEST_A4
DC_TEST_C4
DC_TEST_D3
DC_TEST_D1

N59
N58

N42
L42
L45
L47

M13
M14
U14
W14
P13

AT49
K24

AH2
AG13
AM14
AM15

N50

A4
C4
D3
D1
A58
A59
C59
A61
C61
D61
BD61
BE61
BE59
BG61
BG59
BG58
BG4
BG3
BE3
BG1
BE1
BD1

ER01

DC_TEST_C4_D3

DC_TEST_A59_C59

DC_TEST_A61_C61

DC_TEST_BE59_BE61

DC_TEST_BG59_BG61

DC_TEST_BE3_BG3

DC_TEST_BE1_BG1

These pins are for solder joint
reliability and non-critical to
function. For BGA only.

PEG Static Lane Reversal - CFG2 is for the 16x

Display Port Presence Strap

PCIE Port Bifurcation Straps

CFG[6:5]

CFG2

12

R45

R45
1K_0402_1%

1K_0402_1%

1:(Default) Nor mal Operation; L ane #

CFG2

definition matc hes socket pin m ap definition
0:Lane Reversed

CFG4

12

R47

@R47

@

1K_0402_1%

1K_0402_1%

1 : Disabled; N o Physical Displ ay Port

CFG4

attached to Emb edded Display Po rt

0 : Enabled; An external Displa y Port device i s
connected to th e Embedded Displ ay Port

CFG6

CFG5

12

12

R49

1K_0402_1%

1K_0402_1%

R49

@

@

R50

@R50

@

1K_0402_1%

1K_0402_1%

11: (Default) x 16 - Device 1 fu nctions 1 and 2 disabled

10: x8, x8 - De vice 1 function 1 enabled ; fun ction 2
disabled
01: Reserved - (Device 1 functi on 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functio ns 1 and 2 enab led

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(4/6) RSVD,CFG

PROCESSOR(4/6) RSVD,CFG

PROCESSOR(4/6) RSVD,CFG

LA-8226P

LA-8226P

LA-8226P

7 58Monday, July 09, 2012

7 58Monday, July 09, 2012

7 58Monday, July 09, 2012

1

1.0

1.0

1.0

5

4

3

2

1

POWER

ER01

POWER

CORE SUPPLY

CORE SUPPLY

VCCIO[1]
VCCIO[3]
VCCIO[4]
VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]

VCCIO[9]
VCCIO[10]
VCCIO[11]
VCCIO[12]
VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]
VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]
VCCIO[21]
VCCIO[22]
VCCIO[23]
VCCIO[24]
VCCIO[25]
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]

VCCIO[30]
VCCIO[31]
VCCIO[32]

PEG IO AND DDR IO

PEG IO AND DDR IO

VCCIO[33]
VCCIO[34]
VCCIO[35]
VCCIO[36]
VCCIO[37]
VCCIO[38]
VCCIO[39]
VCCIO[40]
VCCIO[41]
VCCIO[42]
VCCIO[43]
VCCIO[44]
VCCIO[45]
VCCIO[46]
VCCIO[47]
VCCIO[48]
VCCIO[49]

VCCIO50
VCCIO51

VCCIO_SEL

VCCPQE[1]
VCCPQE[2]

RAILS

RAILS

VIDALERT#

VIDSCLK

VIDSOUT

VCC_SENSE
VSS_SENSE

VCCIO_SENSE

VSS_SENSE_VCCIO

SENSE LINES SVID QUIET

SENSE LINES SVID QUIET

UCPU1F

ULV type
DC 33A

D D

+VCC_CORE

INTEL Recommend VCC
4*470UF,12*22uF(0805) and 35*2.2uF(0402)
PD0.8
CAP at P.51

C C

B B

A A

UCPU1F

A26

VCC[1]

A29

VCC[2]

A31

VCC[3]

A34

VCC[4]

A35

VCC[5]

A38

VCC[6]

A39

VCC[7]

A42

VCC[8]

C26

VCC[9]

C27

VCC[10]

C32

VCC[11]

C34

VCC[12]

C37

VCC[13]

C39

VCC[14]

C42

VCC[15]

D27

VCC[16]

D32

VCC[17]

D34

VCC[18]

D37

VCC[19]

D39

VCC[20]

D42

VCC[21]

E26

VCC[22]

E28

VCC[23]

E32

VCC[24]

E34

VCC[25]

E37

VCC[26]

E38

VCC[27]

F25

VCC[28]

F26

VCC[29]

F28

VCC[30]

F32

VCC[31]

F34

VCC[32]

F37

VCC[33]

F38

VCC[34]

F42

VCC[35]

G42

VCC[36]

H25

VCC[37]

H26

VCC[38]

H28

VCC[39]

H29

VCC[40]

H32

VCC[41]

H34

VCC[42]

H35

VCC[43]

H37

VCC[44]

H38

VCC[45]

H40

VCC[46]

J25

VCC[47]

J26

VCC[48]

J28

VCC[49]

J29

VCC[50]

J32

VCC[51]

J34

VCC[52]

J35

VCC[53]

J37

VCC[54]

J38

VCC[55]

J40

VCC[56]

J42

VCC[57]

K26

VCC[58]

K27

VCC[59]

K29

VCC[60]

K32

VCC[61]

K34

VCC[62]

K35

VCC[63]

K37

VCC[64]

K39

VCC[66]

K42

VCC[67]

L25

VCC[68]

L28

VCC[69]

L33

VCC[70]

L36

VCC[71]

L40

VCC[72]

N26

VCC[73]

N30

VCC[74]

N34

VCC[75]

N38

VCC[76]

IVY-BRIDGE_BGA1023

IVY-BRIDGE_BGA1023

@

@

+1.05VS

8.5A

AF46
AG48
AG50
AG51
AJ17
AJ21
AJ25
AJ43
AJ47
AK50
AK51
AL14
AL15
AL16
AL20
AL22
AL26
AL45
AL48
AM16
AM17
AM21
AM43
AM47
AN20
AN42
AN45
AN48

AA14
AA15
AB17
AB20
AC13
AD16
AD18
AD21
AE14
AE15
AF16
AF18
AF20
AG15
AG16
AG17
AG20
AG21
AJ14
AJ15

+1.05VS

W16
W17

BC22

VCCIO_SEL

+1.05VS

AM25
AN22

A44
B43
C44

F43
G43

AN16
AN17

1 2

C74

C74
1U_0402_6 .3V6K

1U_0402_6 .3V6K

<BOM Structure>

<BOM Structure>

H_CPU_SVIDALRT#
H_CPU_SVIDCLK
VR_SVID_DAT

Place the PU
resistors close to CPU

VCCSENSE_R
VSSSENSE_R

R60 10_0402_1%R60 10_04 02_1%

INTEL Recommend VCCIO
2*330UF,10*10uF(0603) and 26*1uF(0402)
PD0.8
CAP at P.51

VCCIO_SEL after Ivy bridge ES2 Voltage support

1/NC : (Default) +1.05VS_VTT

BC22

*

0: +1.0VS_VTT

@

@

1 2

R75 10K_0402_5%

R75 10K_0402_5%

ER01

130_0402_ 1%

130_0402_ 1%

1 2

R58 0_0402_5%R58 0_0402_5%

1 2

R59 0_0402_5%R59 0_0402_5%

12

+1.05VS

12

R62

R62
10_0402_1 %

10_0402_1 %

R56

R56

VCCIO_SENSE

12

+3VS

ER01

1 2

R55 43_0402_1%R55 43_0402 _1%

1 2

R53 0_0402_5%R53 0_0402_5%

+VCC_CORE

12

R57

R57
100_0402_ 1%

100_0402_ 1%

12

R61

R61
100_0402_ 1%

100_0402_ 1%

48

+1.05VS+1.05VS

12

Place the PU
resistors close to CPU

R54

R54
75_0402_5 %

75_0402_5 %

VR_SVID_ALRT#
VR_SVID_CLK
VR_SVID_DAT

51

VCCSENSE

51

VSSSENSE

51
51
51

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(5/6) PWR,BYPASS

PROCESSOR(5/6) PWR,BYPASS

PROCESSOR(5/6) PWR,BYPASS

LA-8226P

LA-8226P

LA-8226P

8 58Monday, July 09, 20 12

8 58Monday, July 09, 20 12

8 58Monday, July 09, 20 12

1

1.0

1.0

1.0

5

D D

CPU1.5V_S3_GATE39

1 2

R66 0_0402_5%R66 0_0402_5%

+VCC_GFXCORE_AXG

DC 29A

C C

B B

+VCC_GFXCORE_AXG

12

R67

ER08

C262

C262

330U_D2_2VM_R6M

330U_D2_2VM_R6M

1

C97

C97

12

+

+

2 3

Place TOP IN BGA

C246

C246

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

12

12

C250

C250

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

12

12

5

R67
100_0402_1%

100_0402_1%

R68

R68

100_0402_1%

100_0402_1%

C263

C263

10U_0603_6.3V6M

10U_0603_6.3V6M

12

C254

C254

1U_0402_6.3V6K

1U_0402_6.3V6K

12

C252

C252

10U_0603_6.3V6M

10U_0603_6.3V6M

12

12

+1.8VS_VCCPLL

10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C95

C95

2

C248

C248

1U_0402_6.3V6K

1U_0402_6.3V6K

12

C251

C251

10U_0603_6.3V6M

10U_0603_6.3V6M

12

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C96

C96

2

C249

C249

1U_0402_6.3V6K

1U_0402_6.3V6K

C247

C247

10U_0603_6.3V6M

10U_0603_6.3V6M

Place near CPU

51

VCC_AXG_SENSE

51

VSS_AXG_SENSE

+1.8VS

Place BOT OUT Conn

+VCCSA

A A

R242

R242

1 2

0_0805_5%

0_0805_5%

@

@

C245

C245

330U_D2_2VM_R6M

330U_D2_2VM_R6M

1

+

+

C85

C85

2 3

ER01

12

Place BOT OUT BGA

C253

C253

12

ER08

@

@

1.2A

6A

2

UCPU1G

UCPU1G

AA46

VAXG[1]

AB47

VAXG[2]

AB50

VAXG[3]

AB51

VAXG[4]

AB52

VAXG[5]

AB53

VAXG[6]

AB55

VAXG[7]

AB56

VAXG[8]

AB58

VAXG[9]

AB59

VAXG[10]

AC61

VAXG[11]

AD47

VAXG[12]

AD48

VAXG[13]

AD50

VAXG[14]

AD51

VAXG[15]

AD52

VAXG[16]

AD53

VAXG[17]

AD55

VAXG[18]

AD56

VAXG[19]

AD58

VAXG[20]

AD59

VAXG[21]

AE46

VAXG[22]

N45

VAXG[23]

P47

VAXG[24]

P48

VAXG[25]

P50

VAXG[26]

P51

VAXG[27]

P52

VAXG[28]

P53

VAXG[29]

P55

VAXG[30]

P56

VAXG[31]

P61

VAXG[32]

T48

VAXG[33]

T58

VAXG[34]

T59

VAXG[35]

T61

VAXG[36]

U46

VAXG[37]

V47

VAXG[38]

V48

VAXG[39]

V50

VAXG[40]

V51

VAXG[41]

V52

VAXG[42]

V53

VAXG[43]

V55

VAXG[44]

V56

VAXG[45]

V58

VAXG[46]

V59

VAXG[47]

W50

VAXG[48]

W51

VAXG[49]

W52

VAXG[50]

W53

VAXG[51]

W55

VAXG[52]

W56

VAXG[53]

W61

VAXG[54]

Y48

VAXG[55]

Y61

VAXG[56]

F45

VAXG_SENSE

G45

VSSAXG_SENSE

BB3

VCCPLL[1]

BC1

VCCPLL[2]

BC4

VCCPLL[3]

L17

VCCSA[1]

L21

VCCSA[2]

N16

VCCSA[3]

N20

VCCSA[4]

N22

VCCSA[5]

P17

VCCSA[6]

P20

VCCSA[7]

R16

VCCSA[8]

R18

VCCSA[9]

R21

VCCSA[10]

U15

VCCSA[11]

V16

VCCSA[12]

V17

VCCSA[13]

V18

VCCSA[14]

V21

VCCSA[15]

W20

VCCSA[16]

IVY-BRIDGE_BGA1023

IVY-BRIDGE_BGA1023

@

@

4

12

R65

R65
100K_0402_5%

100K_0402_5%

RUN_ON_CPU1.5VS3#

61

Q4A

Q4A

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

POWER

POWER

SENSE

SENSE

4

SA_DIMM_VREFDQ
SB_DIMM_VREFDQ

VREF

VREF

DDR3 - 1.5V RAILS

DDR3 - 1.5V RAILS

GRAPHICS

GRAPHICS

LINES

LINES

QUIET RAILS

QUIET RAILS

VDDQ_SENSE

1.8V RAIL

1.8V RAIL

VSS_SENSE_VDDQ

VCCSA_SENSE

SENSE LINES

SENSE LINES

SA RAIL

SA RAIL

VCCSA_VID[0]
VCCSA_VID[1]

VCCSA VID

lines

VCCSA VID

lines

ER01

SM_VREF

VDDQ[1]
VDDQ[2]
VDDQ[3]
VDDQ[4]
VDDQ[5]
VDDQ[6]
VDDQ[7]
VDDQ[8]

VDDQ[9]
VDDQ[10]
VDDQ[11]
VDDQ[12]
VDDQ[13]
VDDQ[14]
VDDQ[15]
VDDQ[16]
VDDQ[17]
VDDQ[18]
VDDQ[19]
VDDQ[20]
VDDQ[21]
VDDQ[22]
VDDQ[23]
VDDQ[24]
VDDQ[25]
VDDQ[26]

VCCDQ[1]
VCCDQ[2]

+1.5V_CPU_VDDQ

+1.5V +1.5V_CPU_VDDQ

Q7

+5VALW+5VALW

R63

R63

36.5K_0402_1%

36.5K_0402_1%

1 2

34

Q4B

Q4B

5

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

RUN_ON_CPU1.5VS3#

AY43

BE7
BG7

AJ28
AJ33
AJ36
AJ40
AL30
AL34
AL38
AL42
AM33
AM36
AM40
AN30
AN34
AN38
AR26
AR28
AR30
AR32
AR34
AR36
AR40
AV41
AW26
BA40
BB28
BG33

+1.5V_CPU_VDDQ

AM28
AN26

BC43
BA43

U10

D48
D49

RUN_ON_CPU1.5VS3

+V_DDR_REFA_R
+V_DDR_REFB_R

Q7
AO4304L_SO8

AO4304L_SO8

8
7
6
5

41

+1.5V_CPU_VDDQ

12

0.1U_0402_16V4Z

0.1U_0402_16V4Z

12

1

C149

C149

2

5A

C243

C243

C239

C239

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

12

12

ER01

ER01

12

C75

C75
1U_0402_6.3V6K

1U_0402_6.3V6K

<BOM Structure>

<BOM Structure>

50

H_VCCSA_VID0

50

H_VCCSA_VID1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

3

1
2
3

4

C77

C77
2200P_0402_50V7K

2200P_0402_50V7K

1 2

<BOM Structure>

<BOM Structure>

R70

R70
1K_0402_1%

1K_0402_1%

R72

R72
1K_0402_1%

1K_0402_1%

C151

C151

1U_0402_6.3V6K

1U_0402_6.3V6K

12

C238

C238

10U_0603_6.3V6M

10U_0603_6.3V6M

12

12

3

5A

12

1

R64

R64

C76

C76

2

20K_0402_5%

20K_0402_5%

10U_0805_10V4Z~D

10U_0805_10V4Z~D

+V_SM_VREF should
have 10 mil trace width

12

R690_0402_5% @R690_0402_5% @

Q8

Q8

@

@

D

S

D

S

13

G

G

PMV45EN_SOT23-3

PMV45EN_SOT23-3

2

RUN_ON_CPU1.5VS3

Place TOP IN BGA

C157

C157

C219

C219

C197

C197

12

Place BOT OUT BGA

C241

C241

10U_0603_6.3V6M

10U_0603_6.3V6M

12

R74

@ R74

@

0_0402_5%

0_0402_5%

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

12

12

C240

C240

C236

C236

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

12

12

+1.5V_CPU_VDDQ +1.5V

+VCCSA_SENSE

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

+V_SM_VREF+V_SM_VREF_CNT

C237

C237

C181

C181

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

12

12

C244

C244

C156

C156

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

12

12

C90 0.1U_0402_10V7KC90 0.1U_0402_10V7K

C91 0.1U_0402_10V7KC91 0.1U_0402_10V7K

C92 0.1U_0402_10V7KC92 0.1U_0402_10V7K

C93 0.1U_0402_10V7KC93 0.1U_0402_10V7K

50

DRAMRST_CNTRL_PCH

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C153

C153

1U_0402_6.3V6K

1U_0402_6.3V6K

12

C242

C242

10U_0603_6.3V6M

10U_0603_6.3V6M

12

12

12

12

12

12

+V_DDR_REFB

M3 Circuit (Processor Generated SO-DIMM VREF_DQ)

+1.5V

@

@

C192

C192

1U_0402_6.3V6K

1U_0402_6.3V6K

12

C143

C143

10U_0603_6.3V6M

10U_0603_6.3V6M

+V_DDR_REFA

12

12

2

R71

R71
1K_0402_1%

1K_0402_1%

R73

R73
1K_0402_1%@

1K_0402_1%@

@

@

2

+1.5V_CPU_VDDQ

330U_D2_2VM_R6M

330U_D2_2VM_R6M

1

C78

C78

+

+

2 3

R77 0_0402_5%@R77 0_0402_5%@
R78 0_0402_5%@R78 0_0402_5%@

13

D

D

2

G

G

S

S

1 2
1 2

Q10

Q10

BSS138_SOT23

BSS138_SOT23

1

UCPU1H

UCPU1H

A13

VSS[1]

A17

VSS[2]

A21

VSS[3]

A25

VSS[4]

A28

VSS[5]

A33

VSS[6]

A37

VSS[7]

A40

VSS[8]

A45

VSS[9]

A49

VSS[10]

A53

VSS[11]

A9

VSS[12]

AA1

VSS[13]

AA13

VSS[14]

AA50

VSS[15]

AA51

VSS[16]

AA52

VSS[17]

AA53

VSS[18]

AA55

VSS[19]

AA56

VSS[20]

AA8

VSS[21]

AB16

VSS[22]

AB18

VSS[23]

AB21

VSS[24]

AB48

VSS[25]

AB61

VSS[26]

AC10

VSS[27]

AC14

VSS[28]

AC46

VSS[29]

AC6

VSS[30]

AD17

VSS[31]

AD20

VSS[32]

AD4

VSS[33]

AD61

VSS[34]

AE13

VSS[35]

AE8

VSS[36]

AF1

VSS[37]

AF17

VSS[38]

AF21

VSS[39]

AF47

VSS[40]

AF48

VSS[41]

AF50

VSS[42]

AF51

VSS[43]

AF52

VSS[44]

AF53

VSS[45]

AF55

VSS[46]

AF56

VSS[47]

AF58

VSS[48]

AF59

VSS[49]

AG10

VSS[50]

AG14

VSS[51]

AG18

VSS[52]

AG47

VSS[53]

AG52

VSS[54]

AG61

VSS[55]

AG7

VSS[56]

AH4

VSS[57]

AH58

VSS[58]

AJ13

VSS[59]

AJ16

VSS[60]

AJ20

VSS[61]

AJ22

VSS[62]

AJ26

VSS[63]

AJ30

VSS[64]

AJ34

VSS[65]

AJ38

VSS[66]

AJ42

VSS[67]

AJ45

VSS[68]

AJ48

VSS[69]

AJ7

VSS[70]

AK1

VSS[71]

AK52

VSS[72]

AL10

VSS[73]

AL13

VSS[74]

AL17

VSS[75]

AL21

VSS[76]

AL25

VSS[77]

AL28

VSS[78]

AL33

VSS[79]

AL36

VSS[80]

AL40

VSS[81]

AL43

VSS[82]

AL47

VSS[83]

AL61

VSS[84]

AM13

VSS[85]

AM20

VSS[86]

AM22

VSS[87]

AM26

VSS[88]

AM30

VSS[89]

AM34

VSS[90]

IVY-BRIDGE_BGA1023

IVY-BRIDGE_BGA1023

@

@

Q9

Q9

13

D

D

BSS138_SOT23

BSS138_SOT23

2

G

G

S

S

12

12

R79

R79

R80

R80

1K_0402_1%

1K_0402_1%

1K_0402_1%

1K_0402_1%

@

@

@

@

Title

Title

Title

PROCESSOR(6/6) PWR,VSS

PROCESSOR(6/6) PWR,VSS

PROCESSOR(6/6) PWR,VSS

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-8226P

LA-8226P

LA-8226P

Date: Sheet of

Date: Sheet of

Date: Sheet of

VSS

VSS

ER01

DRAMRST_CNTRL_PCH13,39

+V_DDR_REFA_R
+V_DDR_REFB_R

Compal Electronics, Inc.

VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]

1

VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]

9 58Monday, July 09, 2012

9 58Monday, July 09, 2012

9 58Monday, July 09, 2012

AM38
AM4
AM42
AM45
AM48
AM58
AN1
AN21
AN25
AN28
AN33
AN36
AN40
AN43
AN47
AN50
AN54
AP10
AP51
AP55
AP7
AR13
AR17
AR21
AR41
AR48
AR61
AR7
AT14
AT19
AT36
AT4
AT45
AT52
AT58
AU1
AU11
AU28
AU32
AU51
AU7
AV17
AV21
AV22
AV34
AV40
AV48
AV55
AW13
AW43
AW61
AW7
AY14
AY19
AY30
AY36
AY4
AY41
AY45
AY49
AY55
AY58
AY9
BA1
BA11
BA17
BA21
BA26
BA32
BA48
BA51
BB53
BC13
BC5
BC57
BD12
BD16
BD19
BD23
BD27
BD32
BD36
BD40
BD44
BD48
BD52
BD56
BD8
BE5
BG13

1.0

1.0

1.0

5

+1.5V

12

R81

R81

1K_0402_1%

1K_0402_1%

+V_DDR_REFA

12

R82

D D

C C

B B

A A

R82

1K_0402_1%

1K_0402_1%

0.1U_0402_10V6K

0.1U_0402_10V6K
C98

C98

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

1

12

C99

C99

2

DDRA_CKE06

DDR_A_BS26

DDRA_CLK06
DDRA_CLK0#6

DDR_A_BS06

DDR_A_WE#6
DDR_A_CAS#6

DDRA_SCS1#6

0.1U_0402_10V6K

+3VS

5

0.1U_0402_10V6K

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

1

12

C118

C118

2

3.56A

+1.5V +1.5V

DDR3 SO-DIMM A

DDR_A_D0
DDR_A_D1

DDR_A_D2
DDR_A_D3

DDR_A_D8
DDR_A_D9

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_D10
DDR_A_D11

DDR_A_D16
DDR_A_D17

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D18
DDR_A_D19

DDR_A_D24
DDR_A_D25

DDR_A_D26
DDR_A_D27

DDRA_CKE0

DDR_A_BS2

DDR_A_MA12
DDR_A_MA9

DDR_A_MA8
DDR_A_MA5

DDR_A_MA3
DDR_A_MA1

DDRA_CLK0
DDRA_CLK0#

DDR_A_MA10
DDR_A_BS0

DDR_A_WE#
DDR_A_CAS# DDRA_ODT0

DDR_A_MA13
DDRA_SCS1#

DDR_A_D32
DDR_A_D33

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D34
DDR_A_D35

DDR_A_D40
DDR_A_D41

DDR_A_D42
DDR_A_D43

DDR_A_D48
DDR_A_D49

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D51

DDR_A_D56
DDR_A_D57

DDR_A_D58
DDR_A_D59

C119

C119

R85

10K_0402_5%

R85

10K_0402_5%

R86

10K_0402_5%

R86

10K_0402_5%

12

12

JDIMM1

JDIMM1

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1
DQS129RESET#
VSS1131VSS12

33

DQ10

35

DQ11
VSS1337VSS14

39

DQ16

41

DQ17
VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25
VSS2261DQS#3

63

DM3
VSS2365VSS24

67

DQ26

69

DQ27
VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

TYCO 2-1932323-1

TYCO 2-1932323-1

PR01

4

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206

DDR_A_D4
DDR_A_D5

DDR_A_DQS#0
DDR_A_DQS0

DDR_A_D6
DDR_A_D7

DDR_A_D12
DDR_A_D13

DDR3_DRAMRST#

DDR_A_D14
DDR_A_D15

DDR_A_D20
DDR_A_D21

DDR_A_D22
DDR_A_D23

DDR_A_D28
DDR_A_D29

DDR_A_DQS#3
DDR_A_DQS3

DDR_A_D30
DDR_A_D31

DDRA_CKE1

DDR_A_MA15
DDR_A_MA14

DDR_A_MA11
DDR_A_MA7

DDR_A_MA6
DDR_A_MA4

DDR_A_MA2
DDR_A_MA0

DDRA_CLK1
DDRA_CLK1#

DDR_A_BS1
DDR_A_RAS#

DDRA_SCS0#

DDRA_ODT1

DDR_A_D36
DDR_A_D37

DDR_A_D38
DDR_A_D39

DDR_A_D44
DDR_A_D45

DDR_A_DQS#5
DDR_A_DQS5

DDR_A_D46
DDR_A_D47

DDR_A_D52
DDR_A_D53

DDR_A_D54
DDR_A_D55

DDR_A_D60
DDR_A_D61

DDR_A_DQS#7
DDR_A_DQS7

DDR_A_D62
DDR_A_D63

PCH_SMBDATA
PCH_SMBCLK

+0.75VS

0.65A@0.75V

0.65A@0.75V

0.65A@0.75V0.65A@0.75V

DDR3_DRAMRST#

DDRA_CLK1
DDRA_CLK1#

DDR_A_BS1
DDR_A_RAS#

DDRA_SCS0#
DDRA_ODT0

DDRA_ODT1

PCH_SMBDATA
PCH_SMBCLK

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

DQ4
DQ5

VSS3

DQS#0

DQS0
VSS6

DQ6

DQ7
VSS8
DQ12
DQ13

VSS10

DM1

DQ14
DQ15

DQ20
DQ21

DM2

VSS17

DQ22
DQ23

VSS19

DQ28
DQ29

VSS21

DQS3

DQ30
DQ31

CKE1
VDD2

A15
A14

VDD4

A11

A7

VDD6

A6
A4

VDD8

A2
A0

VDD10

CK1

CK1#

VDD12

BA1

RAS#

VDD14

S0#

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36
DQ37

VSS30

DM4

VSS31

DQ38
DQ39

VSS33

DQ44
DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46
DQ47

VSS40

DQ52
DQ53

VSS42

DM6

VSS43

DQ54
DQ55

VSS45

DQ60
DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62
DQ63

VSS52

EVENT#

SDA

SCL

VTT2

G2

4

DDRA_CKE1

1

2

3

6

DDR_A_D[0..63]

6

DDR_A_DQS[0..7]

6

DDR_A_DQS#[0..7]

6

DDR_A_MA[0..15]

11,6

6

6
6

6
6

6
6

6

+VREF_CA

0.1U_0402_10V6K

0.1U_0402_10V6K
C108

C108

12

11,13,38,40
11,13,38,40

3

+1.5V

12

R83

R83
1K_0402_1%

1K_0402_1%

12

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M
C109

C109

R84

R84
1K_0402_1%

1K_0402_1%

Compal Secret Data

Compal Secret Data

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Layout Note:

+1.5V

330U_B2_2.5VM_R15M

330U_B2_2.5VM_R15M

C100

C100

1

+

+

2

2

Place near JDDRL

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

C102

C102

C101

C101

1

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

10U_0603_6.3V6M

C103

C103

1

1

2

2

Layout Note: Place these 4 Caps near
Command and Control signals of JDDRL

+1.5V

1U_0402_6.3V6K

1U_0402_6.3V6K

C110

C110

1

1

2

2

Layout Note:
Place near JDDRL.203,204

+0.75VS

C114

1U_0402_6.3V6K

C114

1U_0402_6.3V6K

1

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

LA-8226P

LA-8226P

LA-8226P

1

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

C105

C105

C104

C104

1

1

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

C111

C111

C112

C112

1

2

C115

1U_0402_6.3V6K

C115

1U_0402_6.3V6K

C116

1U_0402_6.3V6K

C116

1U_0402_6.3V6K

1

1

2

2

DDRIII-DDRL

DDRIII-DDRL

DDRIII-DDRL

1

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

C107

C107

C106

C106

1

1

@

@

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

C113

C113

1

2

C117

1U_0402_6.3V6K

C117

1U_0402_6.3V6K

1

2

1.0

1.0

10 58Monday, July 09, 2012

10 58Monday, July 09, 2012

10 58Monday, July 09, 2012

1.0

5

+1.5V

12

R87

R87

1K_0402_1%

12

1K_0402_1%

0.1U_0402_10V6K

0.1U_0402_10V6K

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M
C120

C120

DDRB_CKE06

DDR_B_BS26

DDRB_CLK06
DDRB_CLK0#6

DDR_B_BS06

DDR_B_WE#6
DDR_B_CAS#6

DDRB_SCS1#6

+3VS

R88

R88

1

12

C121

C121

2

1K_0402_1%

1K_0402_1%

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

12

C141

C141

DDR_B_D0
DDR_B_D1

DDR_B_D2
DDR_B_D3

DDR_B_D8
DDR_B_D9

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_D10
DDR_B_D11

DDR_B_D16
DDR_B_D17

DDR_B_DQS#2
DDR_B_DQS2

DDR_B_D18
DDR_B_D19

DDR_B_D24
DDR_B_D25

DDR_B_D26
DDR_B_D27

DDRB_CKE0

DDR_B_BS2

DDR_B_MA12
DDR_B_MA9

DDR_B_MA8
DDR_B_MA5

DDR_B_MA3
DDR_B_MA1

DDRB_CLK0
DDRB_CLK0#

DDR_B_MA10
DDR_B_BS0

DDR_B_WE#
DDR_B_CAS# DDRB_ODT0

DDR_B_MA13
DDRB_SCS1#

DDR_B_D32
DDR_B_D33

DDR_B_DQS#4
DDR_B_DQS4

DDR_B_D34
DDR_B_D35

DDR_B_D40
DDR_B_D41

DDR_B_D42
DDR_B_D43

DDR_B_D48
DDR_B_D49

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D50
DDR_B_D51

DDR_B_D56
DDR_B_D57

DDR_B_D58
DDR_B_D59

1 2

R91

R91

10K_0402_5%

10K_0402_5%

0.1U_0402_10V6K

0.1U_0402_10V6K
C142

C142

1

R92 10K_04 02_5%R92 10K_0402_5%

2

5

+V_DDR_REFB

D D

C C

B B

A A

+1.5V +1.5V

3.56A

JDIMM2

JDIMM2

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1
DQS129RESET#
VSS1131VSS12

33

DQ10

35

DQ11
VSS1337VSS14

39

DQ16

41

DQ17
VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25
VSS2261DQS#3

63

DM3
VSS2365VSS24

67

DQ26

69

DQ27
VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

1 2

203

VTT1

205

G1

TYCO_2-2013287-1

TYCO_2-2013287-1

VSS3

DQS#0

DQS0
VSS6

VSS8
DQ12
DQ13

VSS10

DQ14
DQ15

DQ20
DQ21

VSS17

DQ22
DQ23

VSS19

DQ28
DQ29

VSS21

DQS3

DQ30
DQ31

CKE1
VDD2

VDD4

VDD6

VDD8

VDD10

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36
DQ37

VSS30

VSS31

DQ38
DQ39

VSS33

DQ44

DQ45
VSS35
DQS#5

DQS5
VSS38

DQ46

DQ47
VSS40

DQ52

DQ53
VSS42

VSS43

DQ54

DQ55
VSS45

DQ60

DQ61
VSS47
DQS#7

DQS7
VSS50

DQ62

DQ63
VSS52

EVENT#

DQ4
DQ5

DQ6
DQ7

DM1

DM2

CK1

BA1

NC2

DM4

DM6

SDA
SCL

VTT2

4

2
4

DDR_B_D4

6

DDR_B_D5

8
10

DDR_B_DQS#0

12

DDR_B_DQS0

14
16

DDR_B_D6

18

DDR_B_D7

20
22

DDR_B_D12

24

DDR_B_D13

26
28
30

DDR3_DRAMRST#

32
34

DDR_B_D14

36

DDR_B_D15

38
40

DDR_B_D20

42

DDR_B_D21

44
46
48
50

DDR_B_D22

52

DDR_B_D23

54
56

DDR_B_D28

58

DDR_B_D29

60
62

DDR_B_DQS#3

64

DDR_B_DQS3

66
68

DDR_B_D30

70

DDR_B_D31

72

74

DDRB_CKE1

76
78

A15
A14

A11

A7

A6
A4

A2
A0

S0#

G2

DDR_B_MA15

80

DDR_B_MA14

82
84

DDR_B_MA11

86

DDR_B_MA7

88
90

DDR_B_MA6

92

DDR_B_MA4

94
96

DDR_B_MA2

98

DDR_B_MA0

100
102

DDRB_CLK1

104

DDRB_CLK1#

106
108

DDR_B_BS1

110

DDR_B_RAS#

112
114

DDRB_SCS0#

116
118
120

DDRB_ODT1

122
124
126

+VREF_CB

128
130

DDR_B_D36

132

DDR_B_D37

134
136
138
140

DDR_B_D38

142

DDR_B_D39

144
146

DDR_B_D44

148

DDR_B_D45

150
152

DDR_B_DQS#5

154

DDR_B_DQS5

156
158

DDR_B_D46

160

DDR_B_D47

162
164

DDR_B_D52

166

DDR_B_D53

168
170
172
174

DDR_B_D54

176

DDR_B_D55

178
180

DDR_B_D60

182

DDR_B_D61

184
186

DDR_B_DQS#7

188

DDR_B_DQS7

190
192

DDR_B_D62

194

DDR_B_D63

196
198
200

PCH_SMBDATA

202

PCH_SMBCLK

204

206

4

0.65A@0.75V

0.65A@0.75V

0.65A@0.75V0.65A@0.75V

DDR3_DRAMRST#

DDRB_CKE1

DDRB_CLK1
DDRB_CLK1#

DDR_B_BS1
DDR_B_RAS#

DDRB_SCS0#
DDRB_ODT0

DDRB_ODT1

1

2

PCH_SMBDATA
PCH_SMBCLK

+0.75VS

10,6

6

6
6

6
6

6
6

6

0.1U_0402_10V6K

0.1U_0402_10V6K

C139

C139

10,13,38,40
10,13,38,40

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

6

DDR_B_DQS#[0..7]

6

DDR_B_D[0..63]

6

DDR_B_DQS[0..7]

6

DDR_B_MA[0..15]

Layout Note: Place these 4 Caps near
Command and Control signals of JDDRH

+1.5V

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

C131

C131

1

1

2

2

+1.5V

12

R89

R89

1K_0402_1%

1K_0402_1%

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

12

1K_0402_1%

1K_0402_1%

12

C140

C140

R90

R90

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

3

2

Layout Note:
Place near JDDRH

+1.5V

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

C134

C132

C132

1

2

C134

C133

C133

1

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

10U_0603_6.3V6M

10U_0603_6.3V6M

330U_B2_2.5VM_R15M

330U_B2_2.5VM_R15M

@

@

C122

C122

C123

C123

C124

1

+

+

2

C124

1

@

@

@

@

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

C125

C125

C126

C126

1

1

2

1

2

2

Layout Note:
Place near JDDRH.203 and 204

+0.75VS

1U_0603_10V4Z

1U_0603_10V4Z

C135

C135

1

2

10U_0603_6.3V6M

10U_0603_6.3V6M

C127

C127

1U_0603_10V4Z

1U_0603_10V4Z

C136

C136

1

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

C128

C128

1

1

2

2

1U_0603_10V4Z

1U_0603_10V4Z

1U_0603_10V4Z

1U_0603_10V4Z

C138

C138

C137

C137

1

1

2

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

LA-8226P

LA-8226P

LA-8226P

1

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

C129

C129

10U_0603_6.3V6M

C130

C130

1

1

2

2

DDRIII-DDRH

DDRIII-DDRH

DDRIII-DDRH

1

1.0

1.0

11 58Monday, July 09, 2012

11 58Monday, July 09, 2012

11 58Monday, July 09, 2012

1.0

5

NONGCLK@

NONGCLK@

1 2

R93 10M_0402_5%

R93 10M_0402_5%

Y1

Y1

1 2

32.768KHZ_12.5PF_9H03200019

32.768KHZ_12.5PF_9H03200019

NONGCLK@

NONGCLK@

1

C144

C144
18P_0402_50V8J

18P_0402_50V8J

NONGCLK@

NONGCLK@

2

D D

PCH_RTCX1

PCH_RTCX2

1

C145

C145
18P_0402_50V8J

18P_0402_50V8J

2

NONGCLK@

NONGCLK@

+RTCVCC

PCH_RTCX1

R94 1M_0402_5%R94 1M_0402_5%

R683 0_0402_5%

R683 0_0402_5%

ER02

1 2

1 2

GCLK@

GCLK@

4

SM_INTRUDER#

42

CLK_32K_RTC_XIN

3

2

1

ER02

far away hot spot

HDA_SDO39

HDA for AUDIO

HDA_BITCLK_AUDIO33

@ C148

@

C C

33

HDA_RST_AUDIO#

HDA_SDOUT_AUDIO33

+3V_PCH +3V_PCH+3V_PCH

R111

R116

R116

R124

R124

C152

C152

C155

C155

12

@

@

12

@

@

12

@R112

@

200_0402_5%

200_0402_5%

12

100_0402_1%

100_0402_1%

51_0402_5%

51_0402_5%

R127 33_0402_5%R127 33_0402_5%

R139

R139

1 2

33_0402_5% @

33_0402_5% @

R142

R142

1 2

0_0402_5% @

0_0402_5% @

EC_SPI_WP39

12

@R111

@

200_0402_5%

200_0402_5%

PCH_JTAG_TDO PCH_JTAG_TDIPCH_JTAG_TMS

12

100_0402_1%

100_0402_1%

B B

HDA_SYNC_AUDIO33 FLASH_EN 39

22P_0402_50V8J

22P_0402_50V8J

Reserve for EMI please close to U4

10P_0402_50V8J

10P_0402_50V8J

Reserve for EMI please close to U5

A A

+RTCVCC

R99 20K_0402_5%R99 20K_0402_5%

R100 20K_0402_5%R100 20K_0402_5%

1 2

R101 0_0402_5%R101 0_0402_5%

1

2

R108 33_0402_5%R108 33_0402_5%

R109 33_0402_5%R109 33_0402_5%

R112

R117

R117

12

1 2

HDA_SDOUT

1 2

R102 33_0402_5%R102 33_0402_5%

C148
10P_0402_50V8J

10P_0402_50V8J

Reserve for EMI
please close to R102

1 2

1 2

12

R113

@R113

@

200_0402_5%

200_0402_5%

12

R118

R118

100_0402_1%

100_0402_1%

PCH_JTAG_TCK

12

R129

R129

1M_0402_5%

1M_0402_5%

PCH_SPI_CLK_RRR

PCH_SPI_CLK_R

PCH_SPI_WP PCH_WP

5

1U_0603_10V4Z

1U_0603_10V4Z

1 2

1 2

1U_0603_10V4Z

1U_0603_10V4Z

HDA_RST#

HDA_SDOUT

R137 0_0402_5%

R137 0_0402_5%

R135 0_0402_5%R135 0_0402_5%

CLRP1 & CLRP2 place near DIMM

1

12

2

1

2

+5VS

G

G

2

S

S

BSS138_SOT23

BSS138_SOT23
Q11

Q11

+3V_SPI

R132

R132

R134

R134

@

@

33

13

D

D

SHORT PADS

SHORT PADS

12

SHORT PADS

SHORT PADS

1 2

1 2

CMOS

CLRP1

CLRP1

CLRP2

CLRP2

ME CMOS

HDA_SDIN0

T45

T45

PAD @

PAD @

T46

T46

PAD @

PAD @

T47

T47

PAD @

PAD @

T48

T48

PAD @

PAD @

HDA_SYNC

PCH_SPI_WP#

3.3K_0402_5%

3.3K_0402_5%

PCH_SPI_HOLD#

3.3K_0402_5%

3.3K_0402_5%

2

G

G

13

C146

C146

C147

C147

HDA_BIT_CLK

1 2

1 2

PCH_RTCX1

PCH_RTCX2

PCH_RTCRST#

PCH_SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

HDA_BIT_CLK

HDA_SYNC

HDA_SPKR

HDA_RST#

HDA_SDIN0

HDA_SDOUT

PCH_SPI_WP

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

PCH_SPI_CLK_RR

PCH_SPI_CS#_RR

PCH_SPI_SI_RR

PCH_SPI_SO_RR

PCH_SPI_WP#

D

D

Q63

Q63
SSM3K7002BFU_SC70-3

SSM3K7002BFU_SC70-3

S

S

U3A

U3A

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

HDA_DOCK_EN# / GPIO33

N32

HDA_DOCK_RST # / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989

SPI ROM ( 8MByte )

4

RTCIHDA

RTCIHDA

JTAG

JTAG

SPI

SPI

+3V_SPI

1

C150

C150

2

PCH_SPI_WP#

PCH_SPI_HOLD#

PCH_SPI_CS#_R

PCH_SPI_CLK_R

PCH_SPI_SI_R

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

LPC

LPC

FWH4 / LFRAME#

LDRQ1# / GPIO23

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

SATA1RXN
SATA1RXP

SATA 6G

SATA 6G

SATA1TXN
SATA1TXP

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

SATA4RXN
SATA4RXP
SATA4TXN

SATA

SATA

SATA4TXP

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATALED#

SATA0GP / GPIO21

SATA1GP / GPIO19

0.1U_0402_16V4Z

0.1U_0402_16V4Z

U5

U5

8

VCC

3

W

7

HOLD

1

S

6

C

5

D

W25Q64FVSSIG_SO8

W25Q64FVSSIG_SO8

8M ROM=SA000039 A20

LDRQ0#

SERIRQ

ER01

VSS

C38
A38
B37
C37

D36

E36
K36

V5

AM3
AM1
AP7
AP5

AM10
AM8
AP11
AP10

AD7
AD5
AH5
AH4

AB8
AB10
AF3
AF1

Y7
Y5
AD3
AD1

Y3
Y1
AB3
AB1

Y11

Y10

AB12

AB13

AH1

P3

V14

P1

Q

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_FRAME#

LPC_LDRQ0#
LPC_LDRQ1#

SERIRQ

PCH_SATALED#

PCH_GPIO21

BBS_BIT0_R

4

2

PCH_SPI_SO_R

T12 PAD~D

T12 PAD~D
T13 PAD~D

T13 PAD~D

31
31

31
31

+1.05VS_VCC_SATA

+1.05VS_SATA3

PCH_SATALED#

R131

R131

1 2

0_0402_5%

0_0402_5%

EMI

+3VALW
KSI438,39
KSI538,39
KSI638,39
KSI738,39

39,40
39,40
39,40
39,40

39,40

HDD1

ODD

PCH_INTVRMEN

INTVRMEN

H：Integrated VRM enable

*

：

Integrated VRM disable

L

38

+3V_PCH

PCH_SPI_CS#_RR
PCH_SPI_CLK_RRR
PCH_SPI_SI_RR
PCH_SPI_SO_RR

KSI4
KSI5
KSI6
KSI7

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

U4

U4

1

VDD

4

VDD

9

VDD

19

VDD

24

A0

22

B0

18

C0

17

D0

14

E0

23

A1

21

B1

16

C1

15

D1

13

E1

PI3V512QE_QSOP24

PI3V512QE_QSOP24

Compal Secret Data

Compal Secret Data

Compal Secret Data

12

SEL

2

YA

5

YB

6

YC

8

YD

11

YE

3

GND

7

GND

10

GND

20

GND

Deciphered Date

Deciphered Date

Deciphered Date

R106 330K_0402_5%R106 330K_0402_5%

R123

R123

12

10K_0402_5%

10K_0402_5%

FLASH_EN

PCH_SPI_CS#_R
PCH_SPI_CLK

PCH_SPI_SI_R
PCH_SPI_SO_R

2

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_FRAME#

@

@
@

@

SERIRQ 39

SATA_PRX_DTX_N031
SATA_PRX_DTX_P031
SATA_PTX_DRX_N0
SATA_PTX_DRX_P0

SATA_PRX_DTX_N231
SATA_PRX_DTX_P231
SATA_PTX_DRX_N2
SATA_PTX_DRX_P2

1 2

SATA_COMP

R114 37.4_0402_1%R114 37.4_0402_1%

1 2

SATA3_COMP

R115 49.9_0402_1%R115 49.9_0402_1%

1 2

RBIAS_SATA3

R120 750_0402_1%R120 750_0402_1%

+3VS

PCH_SPI_CLK_RR

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

12

FLASH_EN

+3V_SPI

1 2

0_0402_5%

0_0402_5%

R133

R133

EMI

+RTCVCC

PCH_SATALED#

SERIRQ

R103 10K_0402_5%R103 10K_0402_5%

PCH_GPIO21

R104 10K_0402_5%R104 10K_0402_5%

PCH_SATALED#

R105 10K_0402_5%R105 10K_0402_5%

BBS_BIT0_R

R107 10K_0402_5%R107 10K_0402_5%

HDA_SPKR

R110 1K_0402_5%@R110 1K_0402_5%@

*

1 2

C653 0.1U_0402_10V7KC653 0.1U_0402_10V7K

12

12

12

12

12

LOW=Default
HIGH=No Reboot

Reserve for ESD please close t o U3

HDA_SYNC

This signal has a weak interna l pull-down
On Die PLL VR i s supplied by

1.5V when smapl ed high

1.8V when sampl ed low
Needs to be pul led High for Ch ief River platfr om

12

PCH_SPI_CLK_R

HDA_SYNC

R128 1K_0402_5%R128 1K_0402_5%

RTC Battery

MAX. 8000mil

D1

+RTCVCC

W=20mils

1

C154

C154

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Title

Title

Title

PCH (1/8) SATA,HDA,SPI, LPC

PCH (1/8) SATA,HDA,SPI, LPC

PCH (1/8) SATA,HDA,SPI, LPC

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-8226P

LA-8226P

LA-8226P

Date: Sheet of

Date: Sheet of

Date: Sheet of

D1

2

1

3

DAN202UT106_SC70-3

DAN202UT106_SC70-3

NONGCLK@

NONGCLK@

Compal Electronics, Inc.

1

+3V_PCH

+RTCBATT

W=20mils

W=20mils

+3VS

+3VS

12

R136

R136
1K_0402_5%

1K_0402_5%

NONGCLK@

NONGCLK@

12 58Monday, July 09, 2012

12 58Monday, July 09, 2012

12 58Monday, July 09, 2012

close to U3_P3

+CHGRTC

1.0

1.0

1.0

5

4

3

2

1

SMBALERT#

SMBCLK

U3B

U3B

D D

10/100/1G LAN --->

MiniWLAN (Mini Card 1)--->

C C

10/100/1G LAN --->

MiniWLAN (Mini Card 1)--->

R180

2

R180

33_0402_5%

33_0402_5%

12

R1831M_0402_5%

R1831M_0402_5%

NONGCLK@

NONGCLK@

3

3

GND

25MHZ_10PF_7V25000014

25MHZ_10PF_7V25000014

4

ER02

@

@

R185

R185

33_0402_5%

33_0402_5%

CLK_PCI_LPBACK

B B

A A

Reserve for EMI please close t o
U3

Y2

Y2

1

1

GND

2

C163

C163
12P_0402_50V8J

12P_0402_50V8J

NONGCLK@

NONGCLK@

1

CLK_25M_PCH_XIN

@

@

12

NONGCLK@

NONGCLK@

12

22P_0402_50V8J

22P_0402_50V8J

PCIE_PRX_GLANTX_N132
PCIE_PRX_GLANTX_P132
32

PCIE_PTX_GLANRX_N1

32

PCIE_PTX_GLANRX_P1

PCIE_PRX_WLANTX_N240
PCIE_PRX_WLANTX_P240
40

PCIE_PTX_WLANRX_N2

40

PCIE_PTX_WLANRX_P2

@

@

C162

C162

1 2

22P_0402_50V8J

22P_0402_50V8J

XTAL25_IN

XTAL25_OUT

2

C164

C164
12P_0402_50V8J

12P_0402_50V8J

1

NONGCLK@

NONGCLK@

@

@

C255

C255

1 2

32

CLK_PCIE_LAN#

32

CLK_PCIE_LAN

40

CLK_PCIE_WLAN#

40

CLK_PCIE_WLAN

1 2

C158 0.1U_0402_10V7KC158 0.1U_0402_10V7K

1 2

C159 0.1U_0402_10V7KC159 0.1U_0402_10V7K

1 2

C160 0.1U_0402_10V7KC160 0.1U_0402_10V7K

1 2

C161 0.1U_0402_10V7KC161 0.1U_0402_10V7K

1 2

R167 0_0402_5%R167 0_0402_5%

1 2

R168 0_0402_5%R168 0_0402_5%

1 2

+3V_PCH

LANCLK_REQ#32

WLANCLK_REQ#40

+3V_PCH

+3V_PCH

+3V_PCH

+3V_PCH

+3V_PCH

+3V_PCH

R169 10K_0402_5%R169 10K_0402_5%

R170 0_0402_5%R170 0_0402_5%
R171 0_0402_5%R171 0_0402_5%
R172 10K_0402_5%R172 10K_0402_5%

+3VS

R175 10K_0402_5%R175 10K_0402_5%

+3VS

ER04

R176 10K_0402_5%R176 10K_0402_5%

R177 10K_0402_5%R177 10K_0402_5%

R178 10K_0402_5%R178 10K_0402_5%

R179 10K_0402_5%R179 10K_0402_5%

R182 10K_0402_5%R182 10K_0402_5%

R184 10K_0402_5%R184 10K_0402_5%

1 2

1 2

1 2

1 2

1 2

R637 0_0402_5%

R637 0_0402_5%

Reserve for EMI.

ER04

5

12
12
12

12

12

12

GCLK@

GCLK@

ER02

PCIE_PRX_GLANTX_N1
PCIE_PRX_GLANTX_P1
PCIE_PTX_GLANRX_N1_C
PCIE_PTX_GLANRX_P1_C

PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2
PCIE_PTX_WLANRX_N2_C
PCIE_PTX_WLANRX_P2_C

PCIE_LAN#
PCIE_LAN

LANCLK_REQ#

WLANCLK_REQ#

PEG_B_CLKREQ#

PCIE_CLKREQ6#

CLK_BCLK_ITP#
CLK_BCLK_ITPCLK_BCLK_ITP

4

ER04

PCIE_WLAN#
PCIE_WLAN

GPIO46

CLK_25M_PCH_XINXTAL25_IN

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_ITPXDP_N

AK13

CLKOUT_ITPXDP_P

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989

<BOM Structure>

<BOM Structure>

CLK_25M_PCH_XIN

SMBUSController

SMBUSController

SML1ALERT# / PCHHOT# / GPIO74

PCI-E*

PCI-E*

CLOCKS

CLOCKS

42

E12

SMBALERT# / GPIO11

SMBCLK

SMBDATA

SML0ALERT# / GPIO60

SML0CLK

SML0DATA

SML1CLK / GPIO58

SML1DATA / GPIO75

CL_CLK1

CL_DATA1

Link

Link

FLEX CLOCKS

FLEX CLOCKS

CL_RST1#

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

CLKOUT_DMI_N
CLKOUT_DMI_P

CLKOUT_DP_N
CLKOUT_DP_P

CLKIN_DMI_N
CLKIN_DMI_P

CLKIN_GND1_N
CLKIN_GND1_P

CLKIN_DOT_96N
CLKIN_DOT_96P

CLKIN_SATA_N

CLKIN_SATA_P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

SMBALERT#

H14

SMBCLK

C9

SMBDATA

A12

DRAMRST_CNTRL_PCH

C8

SML0CLK

G12

SML0DATA

C13

PCH_HOT#

E14

PCH_SMLCLK

M16

PCH_SMLDATA

M7

T11

P10

M10

PEG_CLKREQ#_R

AB37

CLK_PCIE_VGA#

AB38

CLK_PCIE_VGA

AV22

CLK_CPU_DMI#

AU22

CLK_CPU_DMI

AM12
AM13

BF18

CLKIN_DMI#

BE18

CLKIN_DMI

BJ30

CLKIN_DMI2#

BG30

CLKIN_DMI2

G24

CLKIN_DOT96#

E24

CLKIN_DOT96

AK7

CLKIN_SATA#

AK5

CLKIN_SATA

K45

CLK_PCH_14M

H45

CLK_PCI_LPBACK

V47

XTAL25_IN

V49

XTAL25_OUT

Y47

K43

CLK_SD_48M_R

F47

H47

K49

XCLK_RCOMP

MEMORY

T14 PAD@ T14 PA D@

T15 PAD@ T15 PA D@

T16 PAD@ T16 PAD@

1 2

R181 90.9_0402_1%R181 90.9_0402_1%

R277 0_0402_5%R277 0_0402_5%

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

SMBALERT#

DRAMRST_CNTRL_PCH

PEG_CLKREQ#_R

CLK_PCIE_VGA#
CLK_PCIE_VGA

CLK_CPU_DMI#
CLK_CPU_DMI

CLK_PCI_LPBACK

12

CLK_SD_48M

T17 PAD@ T17 PA D@

T18 PAD@ T18 PA D@

T19 PAD@ T19 PA D@

Compal Secret Data

Compal Secret Data

Compal Secret Data

38

39,9

PCH_SMLCLK 20,39

PCH_SMLDATA 20,39

20

20

VGA

20

5
5

15

+1.05VS_VCCDIFFCLKN

Deciphered Date

Deciphered Date

Deciphered Date

2

EC

CLK_SD_48M

SMBCLK

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

SMBDATA

34

2

6 1

Q2A

Q2A

3

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

SMBDATA

SML0CLK

SML0DATA

PCH_SMLCLK

PCH_SMLDATA

PCH_HOT#

DRAMRST_CNTRL_PCH

CLKIN_DMI2#
CLKIN_DMI2
CLKIN_DMI#
CLKIN_DMI
CLKIN_DOT96#
CLKIN_DOT96
CLKIN_SATA#
CLKIN_SATA
CLK_PCH_14M

If use extenal CLK gen, please place close to CLK gen
else, please pl ace close to PC H

+3VS+3VS

R173

R173

2.2K_0402_5%

2.2K_0402_5%

5

Q2B

Q2B

+3V_PCH

CLK_PCH_14M

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

1 2

4

1 2

C672 0.1U_0402_10V7KC672 0.1U_0402_10V7K

EMI close to R178

@

@

R189

R189

12

33_0402_5%

33_0402_5%

22P_0402_50V8J

22P_0402_50V8J

Compal Electronics, Inc.

PCH (2/8) PCIE, SMBUS, CLK

PCH (2/8) PCIE, SMBUS, CLK

PCH (2/8) PCIE, SMBUS, CLK

LA-8226P

LA-8226P

LA-8226P

12

R149 10K_0402_5%R149 10K_0402_5%

1 2

R150 2.2K_0402_5%R150 2.2K_0402_5%

1 2

R151 2.2K_0402_5%R151 2.2K_0402_5%

1 2

R152 2.2K_0402_5%R152 2.2K_0402_5%

1 2

R153 2.2K_0402_5%R153 2.2K_0402_5%

1 2

R154 2.2K_0402_5%R154 2.2K_0402_5%

1 2

R155 2.2K_0402_5%R155 2.2K_0402_5%

1 2

R156 10K_0402_5%R156 10K_0402_5%

1 2

R157 1K_0402_1%R157 1K_0402_1%

ER03

1 2

R158 10K_0402_5%R158 10K_0402_5%

1 2

R159 10K_0402_5%R159 10K_0402_5%

1 2

R160 10K_0402_5%R160 10K_0402_5%

1 2

R161 10K_0402_5%R161 10K_0402_5%

1 2

R162 10K_0402_5%R162 10K_0402_5%

1 2

R163 10K_0402_5%R163 10K_0402_5%

1 2

R164 10K_0402_5%R164 10K_0402_5%

1 2

R165 10K_0402_5%R165 10K_0402_5%

1 2

R166 10K_0402_5%R166 10K_0402_5%

R174

R174

2.2K_0402_5%

2.2K_0402_5%

1 2

PCH_SMBCLK

PCH_SMBDATA

@

@

C165

C165

1 2

13 58Monday, July 09, 2012

13 58Monday, July 09, 2012

1

13 58Monday, July 09, 2012

+3V_PCH

10,11,38,40

10,11,38,40

1.0

1.0

1.0

5

4

3

2

1

U3C

U3C

PCH_GPIO72

RI#

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN#/SUSPWRDNACK/GPIO30

E20

PWRBTN#

H20

ACPRESENT / GPIO31

E10

BATLOW# / GPIO72

A10

RI#

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989

DMI

FDI

DMI

FDI

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

System Power Management

System Power Management

SLP_LAN# / GPIO29

DMI_CTX_PRX_N04
DMI_CTX_PRX_N14
DMI_CTX_PRX_N24
DMI_CTX_PRX_N34

DMI_CTX_PRX_P04
DMI_CTX_PRX_P14

D D

SUSACK#39

C C

Reserve

PCH_PWROK39

5

PM_DRAM_PWRGD

PCH_RSMRST#39

39

SUSWARN#

AC_PRESENT39

4
4
4
4

4
4
4
4

XDP_DBRESET#_R5

SYSTEM_PWROK

PBTN_OUT#39

ACIN39,44

1 2

@

@

C166 100P_0402_50V8J

C166 100P_0402_50V8J

DMI_CTX_PRX_P24
DMI_CTX_PRX_P34

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

+1.05VS_VCC_EXP

R192 49.9_0402_1%R192 49.9_0402_1%

R193 750_0402_1%R193 750_0402_1%

4mil width and place
within 500mil of the PCH

1 2

R802

1 2

R196 0_0402_5%R196 0_0402_5%

1 2

R197 0_0402_5%R197 0_0402_5%

PM_DRAM_PWRGD

1 2

R200 0_0402_5%R200 0_0402_5%

1 2

R801

1 2

RB751V-40_SOD323-2

RB751V-40_SOD323-2

1 2

R751 0_0402_5%R751 0_0402_5%

XDP_DBRESET#_R

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

1 2

1 2

@R802

@

0_0402_5%

0_0402_5%

@R801

@

0_0402_5%

0_0402_5%

1 2

R203 0_0402_5%R203 0_0402_5%

D2

DMI_IRCOMP

RBIAS_CPY

SUSACK#_R

XDP_DBRESET#_R

SYSTEM_PWROK_I

PM_PWROK_R

1 2

R198 0_0402_5%R198 0_0402_5%

PCH_RSMRST#_R

SUSWARN#_R

PBTN_OUT#_R

@D2

@

AC_PRESENT_R

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9

BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9

AW16

AV12

BC10

AV14

BB10

A18

E22

PCH_DPWROK_R

B9

WAKE#

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

PM_CLKRUN#

SUSCLK

FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWODVREN

SUS_STAT#

PM_SLP_S5#

PM_SLP_S4#

PM_SLP_S3#

H_PM_SYNC

PCH_GPIO29

1 2

R800 0_0402_5%@R800 0_0402_5%@

1 2

R194 0_0402_5%R194 0_0402_5%

1 2

R195 0_0402_5%R195 0_0402_5%

1 2

R529

R529

0_0402_5% @

0_0402_5% @

12

R199

R199

0_0402_5%

0_0402_5%

T23 PADT23 PAD

T24 PADT24 PAD

T25 PADT25 PAD

T22 PADT22 PAD

H_PM_SYNC

FDI_CTX_PRX_N04
FDI_CTX_PRX_N14
FDI_CTX_PRX_N24
FDI_CTX_PRX_N34
FDI_CTX_PRX_N44
FDI_CTX_PRX_N54
FDI_CTX_PRX_N64
FDI_CTX_PRX_N74

FDI_CTX_PRX_P04
FDI_CTX_PRX_P14
FDI_CTX_PRX_P24
FDI_CTX_PRX_P34
FDI_CTX_PRX_P44
FDI_CTX_PRX_P54
FDI_CTX_PRX_P64
FDI_CTX_PRX_P74

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

PCH_DPWROK

PCH_RSMRST#_R

PCIE_WAKE# 32,40

PM_CLKRUNEC#39

SUSCLK_R

PM_SLP_S5#

PM_SLP_S4#

PM_SLP_S3#

4

4

4

4

4

PCH_DPWROK 39

39

39

39

39

5

PCH_CRT_HSYNC30
PCH_CRT_VSYNC30

39

30

30

30
30

PCH_ENBKL

PCH_ENVDD

PCH_INV_PWM

PCH_LCD_CLK
PCH_LCD_DATA

30

PCH_TXCLK-

30

PCH_TXCLK+

30

PCH_TXOUT0-

30

PCH_TXOUT1-

30

PCH_TXOUT2-

30

PCH_TXOUT0+

30

PCH_TXOUT1+

30

PCH_TXOUT2+

30

PCH_CRT_BLU

30

PCH_CRT_GRN

30

PCH_CRT_RED

30

PCH_CRT_DDC_CLK

30

PCH_CRT_DDC_DAT

PCH_ENBKL

1 2

R190

R190

100K_0402_5%

100K_0402_5%

CTRL_CLK
CTRL_DATA

12

T20

T20
PAD

PAD

PCH_TXCLK­PCH_TXCLK+

PCH_TXOUT0­PCH_TXOUT1­PCH_TXOUT2-

PCH_TXOUT0+
PCH_TXOUT1+
PCH_TXOUT2+

PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED

PCH_CRT_DDC_CLK
PCH_CRT_DDC_DAT

R204

R204

LVDS_IBG

HSYNC_PCH
VSYNC_PCH

12

R191 2.37K_0402_1%R191 2.37K_0402_1%

R201 33_0402_5%R201 33_0402_5%

1 2
1 2

R202 33_0402_5%R202 33_0402_5%

1K_0402_0.5%

1K_0402_0.5%

CRT_IREF

U3D

U3D

J47

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

AF37

LVD_IBG

AF36

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CLK

M40

CRT_DDC_DATA

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989

<BOM Structure>

<BOM Structure>

SDVO_INTN
SDVO_INTP

DDPB_AUXN
DDPB_AUXP

DDPB_HPD

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P

DDPC_AUXN
DDPC_AUXP

DDPC_HPD

DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P

DDPD_AUXN
DDPD_AUXP

DDPD_HPD

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

AP43
AP45

AM42
AM40

AP39
AP40

P38
M39

AT49
AT47
AT40

AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49

P46
P42

AP47
AP49
AT38

AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49

M43
M36

AT45
AT43
BH41

BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42

HDMICLK_NB
HDMIDAT_NB

TMDS_B_HPD

TMDS_B_DATA2#
TMDS_B_DATA2
TMDS_B_DATA1#
TMDS_B_DATA1
TMDS_B_DATA0#
TMDS_B_DATA0
TMDS_B_CLK#
TMDS_B_CLK

SDVO_TVCLKINN
SDVO_TVCLKINP

SDVO_STALLN
SDVO_STALLP

SDVO_CTRLCLK

SDVO_CTRLDATA

LVDS

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

Digital Display Interface

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

CRT

CRT

HDMICLK_NB
HDMIDAT_NB

TMDS_B_HPD

TMDS_B_DATA2#
TMDS_B_DATA2
TMDS_B_DATA1#
TMDS_B_DATA1
TMDS_B_DATA0#
TMDS_B_DATA0
TMDS_B_CLK#
TMDS_B_CLK

35
35

35

35
35
35
35
35
35
35
35

B B

A A

Reserve for EMI please close t o U3

VGATE51

PM_PWROK_R

SYSTEM_PWROK_I

1 2

R210 0_0402_5%R210 0_0402_5%

R226 10K_0402_5%R226 10K_0402_5%

R227 100K_0402_5%@R227 100K_0402_5%@

5

+3VS

5

2

B

1

A

3

PCH_GPIO29

PCH_GPIO72

RI#

WAKE#

AC_PRESENT_R

SUSWARN#_R

PCH_DPWROK

PCH_RSMRST#

12

12

P

G

U7

U7

4

SYSTEM_PWROK

Y

NC7SZ08P5X_NL_SC70-5

NC7SZ08P5X_NL_SC70-5

1 2

R230 10K_0402_5%R230 10K_0402_5%

1 2

R217 10K_0402_5%R217 10K_0402_5%

1 2

R219 10K_0402_5%R219 10K_0402_5%

1 2

R221 10K_0402_5%R221 10K_0402_5%

1 2

R222 200K_0402_5%R222 200K_0402_5%

1 2

R223 10K_0402_5%R223 10K_0402_5%

R803 100K_0402_5%@R803 100K_0402_5%@

1 2

R225 10K_0402_5%R225 10K_0402_5%

Intel CRB EMRLDLKE2 Rev1.0

12

SYSTEM_PWROK

+3V_PCH

5

DSWODVREN

DSWODVREN

4

R213 330K_0402_5%R213 330K_0402_5%

R214 330K_0402_5%@R214 330K_0402_5%@

DSWODVREN - On Die DSW VR Enab le

H：Enable

*

：

Disable

L

PM_CLKRUN#

+3VS

12

@ R224

@

1 2

12

12

R224

8.2K_0402_5%

8.2K_0402_5%

R130

R130
10K_0402_5%

10K_0402_5%

+RTCVCC

3

+3VS

1 2

R206 2.2K_0402_5%R206 2.2K_0402_5%

1 2

R207 2.2K_0402_5%R207 2.2K_0402_5%

1 2

R208 2.2K_0402_5%R208 2.2K_0402_5%

1 2

R209 2.2K_0402_5%R209 2.2K_0402_5%

1 2

R215 150_0402_1%~DR215 150_0402_1%~D

1 2

R216 150_0402_1%~DR216 150_0402_1%~D

1 2

R218 150_0402_1%~DR218 150_0402_1%~D

1 2

R220 100K_0402_5%~D@R220 100K_0402_5%~D@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PCH_CRT_DDC_CLK

PCH_CRT_DDC_DAT

CTRL_CLK

CTRL_DATA

PCH_CRT_BLU

PCH_CRT_GRN

PCH_CRT_RED

PCH_ENVDD

Compal Secret Data

Compal Secret Data

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

+3VS

1 2

R211 2.2K_0402_5%R211 2.2K_0402_5%

1 2

R212 2.2K_0402_5%R212 2.2K_0402_5%

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PCH (3/8) DMI,FDI,PM,GFX,DP

PCH (3/8) DMI,FDI,PM,GFX,DP

PCH (3/8) DMI,FDI,PM,GFX,DP

LA-8226P

LA-8226P

LA-8226P

PCH_LCD_CLK
PCH_LCD_DATAPCH_PWROK

14 58Monday, July 09, 2012

14 58Monday, July 09, 2012

1

14 58Monday, July 09, 2012

1.0

1.0

1.0

5

D D

USB3_RX1_N36
USB3_RX2_N36

USB3_RX1_P36
USB3_RX2_P36

USB3_TX1_N
USB3_TX2_N

USB3_TX1_P

20,29,54

PCH_WAN_RADIO_OFF#40

CLK_PCI_LPBACK
CLK_PCI_LPC
CLK_LPC_DEBUG1

USB3_TX2_P

DGPU_PWR_EN

ODD_DA#31

T26PAD @T26PAD @

R232 22_0402_5%R232 22_0402_5%

13

1 2

R233 22_0402_5%R233 22_0402_5%

1 2

R234 22_0402_5%R234 22_0402_5%

ER06

1 2

R7848.2K_0402_5% R7848.2K_0402_5%

1 2

R7858.2K_0402_5% R7858.2K_0402_5%

1 2

R7868.2K_0402_5% R7868.2K_0402_5%

1 2

R7878.2K_0402_5% R7878.2K_0402_5%

1 2

R7888.2K_0402_5% R7888.2K_0402_5%

1 2

R7898.2K_0402_5% R7898.2K_0402_5%

1 2

R7908.2K_0402_5% R7908.2K_0402_5%

1 2

R7918.2K_0402_5% R7918.2K_0402_5%

1 2

R7928.2K_0402_5% R7928.2K_0402_5%

1 2

R7938.2K_0402_5% R7938.2K_0402_5%

1 2

R244 10K_0402_5%

R244 10K_0402_5%

@

@
1 2

R288 10K_0402_5%

R288 10K_0402_5%

@

@

1 2

R811 10K_0402_5%R811 10K_0402_5%

12

C C

C167

C167

1 2

@

@

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

ODD_DA#

Reserve for EMI please close t o U3

B B

A A

CLK_PCI_LPBACK
39
40

CLK_LPC_DEBUG1

PCH_WAN_RADIO_OFF#

CLK_PCI_LPC

PCH_GPIO4
PCI_PIRQB#
PCI_PIRQD#
PCI_PIRQC#

PCI_PIRQA#
ODD_DA#
PCH_GPIO5

PCH_GPIO52
PCH_GPIO2

DGPU_HOLD_RST#

DGPU_PWR_EN

DGPU_HOLD_RST#

5

36
36

36
36

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

DGPU_HOLD_RST#

PCH_GPIO52

DGPU_PWR_EN

PCH_WAN_RADIO_OFF#

PCH_GPIO2
ODD_DA#
PCH_GPIO4
PCH_GPIO5

PCH_PLTRST#

CLK_PCI0
CLK_PCI1 USB_OC4#
CLK_PCI3

+3VS

4

U3E

U3E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

B21

TP21

M20

TP22

AY16

TP23

BG46

TP24

BE28

USB3Rn1

BC30

USB3Rn2

BE32

USB3Rn3

BJ32

USB3Rn4

BC28

USB3Rp1

BE30

USB3Rp2

BF32

USB3Rp3

BG32

USB3Rp4

AV26

USB3Tn1

BB26

USB3Tn2

AU28

USB3Tn3

AY30

USB3Tn4

AU26

USB3Tp1

AY26

USB3Tp2

AV28

USB3Tp3

AW30

USB3Tp4

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1# / GPIO50

C44

REQ2# / GPIO52

E40

REQ3# / GPIO54

D47

GNT1# / GPIO51

E42

GNT2# / GPIO53

F46

GNT3# / GPIO55

G42

PIRQE# / GPIO2

G40

PIRQF# / GPIO3

C42

PIRQG# / GPIO4

D44

PIRQH# / GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989

<BOM Structure>

<BOM Structure>

4

32,39,40,5

RSVD

RSVD

PCI

PCI

USB

USB

PLT_RST#

USBRBIAS#

USBRBIAS

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43

OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

10K_0402_5%

10K_0402_5%

RSVD1
RSVD2
RSVD3
RSVD4

RSVD5
RSVD6

RSVD7
RSVD8

RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22

RSVD23
RSVD24

RSVD25

RSVD26
RSVD27

RSVD28
RSVD29

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P

USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

@

@

R238

R238

+3VS

AY7
AV7
AU3
BG4

AT10
BC8

AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6

AV5

NV_ALE

AV10

AT8

AY5
BA2

AT12
BF3

C24

USB20_N0

A24

USB20_P0

C25

USB20_N1

B25

USB20_P1

C26

USB20_N2

A26

USB20_P2

K28

USB20_N3

H28

USB20_P3

E28
D28
C28

USB20_N5

A28

USB20_P5

C29
B29
N28

HM76 not Support USB Port6,7

M28
L30
K30
G30
E30
C30

USB20_N10

A30

USB20_P10

L32

USB20_N11

K32

USB20_P11

G32
E32
C32
A32

C33

USBRBIAS

B33

A14

USB_OC0#

K20

USB_OC1#

B17

USB_OC2#

C16

USB_OC3#

L16
A16

USB_OC5#

D14

USB_OC6#

C14

USB_OC7#

0_0402_5%

0_0402_5%

U8

1 2

U8

12

R243

R243
100K_0402_5%

100K_0402_5%

USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3

USB20_N5 33
USB20_P5 33

USB20_N10
USB20_P10
USB20_N11
USB20_P11

Within 500 mils

1 2

R231 22.6_0402_1%R231 22.6_0402_1%

1 2

@

@

R235 0_0402_5%

R235 0_0402_5%

+3VS+3V_PCH

12

R626

R626

C168

C168

1 2

5

VCC

IN1

4

OUT

IN2

GND

3

3

2

GPIO19 => BBS_BIT0
GPIO51 => BBS_BIT1

Boot BIOS Strap

0

0

Panther Point USB Port Mapping

USB 2.0 Port Number

USB 2.0 Port Number USB 3.0 Port Number

USB 2.0 Port NumberUSB 2.0 Port Number

USB 3.0 Port Number

USB 3.0 Port NumberUSB 3.0 Port Number

0000 1111

1111

2222

3333

36
36

USB2/3 port 1

36
36

USB2/3 port 2

33
33

USB2 Conn. R

34

Card Reader

34

USB2 Conn. R

40

Mini Card(BT)

40
30
30

Camera

USB_OC0#
USB_OC1#

12

R631

R631
0_0402_5%

0_0402_5%

@

@

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

PCH_PLTRST#

2

MC74VHC1G08DFT2G_SC70-5

MC74VHC1G08DFT2G_SC70-5

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2222

3333

4444

Reserve

USB_OC0#
USB_OC2#
USB_OC7#
USB_OC5#

USB_OC6#
USB_OC4#
USB_OC3#
USB_OC1#

(For USB Port0, 1)

36

(For USB Port2)

36

20

DGPU_RST#

Compal Secret Data

Compal Secret Data

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

1

Intel Anti-Theft Techonlogy

NV_ALE

NV_ALE

1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2

C673 0.1U_0402_10V7KC673 0.1U_0402_10V7K

+3V_PCH

DIS@

DIS@

100_0402_5%

100_0402_5%

100K_0402_5%

100K_0402_5%

2

High=Endabled

Low=Disable(flo ating)

1 2

EMI close to R776

12

R240

R240

R241

R241

DIS@

DIS@

BBS_BIT1BBS_BIT0

R228 1K_0402_5%@R228 1K_0402_5%@

R77610K_0402_5% R77610K_0402_5%
R77710K_0402_5% R77710K_0402_5%
R77810K_0402_5% R77810K_0402_5%
R77910K_0402_5% R77910K_0402_5%

R78010K_0402_5% R78010K_0402_5%
R78110K_0402_5% R78110K_0402_5%
R78210K_0402_5% R78210K_0402_5%
R78310K_0402_5% R78310K_0402_5%

12

Boot BIOS
Location

LPC

0

1

Reserved(NAND)

0

Reserved

11

SPI

1 2

+3V_PCH

1 2

@

@

R236 0_0402_5%

R236 0_0402_5%

+3VS

5

4

Y

3

1

*

*

+1.8VS

Over Current Pin Default Usage

OC Pin

OC Pin PCH Mapping

PCH Mapping

OC PinOC Pin

PCH MappingPCH Mapping

Port 0 & 1

Port 0 & 1

Port 0 & 1Port 0 & 1

0000

Port 2 & 3

Port 2 & 3

Port 2 & 3Port 2 & 3

1111

Port 4 & 5

Port 4 & 5

Port 4 & 5Port 4 & 5

2222

Port 6 & 7

Port 6 & 7

Port 6 & 7Port 6 & 7

3333

Port 8 & 9

Port 8 & 9

Port 8 & 9Port 8 & 9

4444

Port 10 & 11

Port 10 & 11

Port 10 & 11Port 10 & 11

5555

Port 12 & 13

Port 12 & 13

Port 12 & 13Port 12 & 13

6666

C169

DIS@C169

DIS@

1 2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

U9

2

PCH_PLTRST#

P

B

1

DGPU_HOLD_RST#

A

G

NC7SZ08P5X_NL_SC70-5DIS@U9NC7SZ08P5X_NL_SC70-5DIS@

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PCH (4/8) PCI, USB, NVRAM

PCH (4/8) PCI, USB, NVRAM

PCH (4/8) PCI, USB, NVRAM

LA-8226P

LA-8226P

LA-8226P

1

1.0

1.0

15 58Monday, July 09, 2012

15 58Monday, July 09, 2012

15 58Monday, July 09, 2012

1.0

5

+3VS

1 2

@

@

1 2

R268

R268

1 2

R269

R269

1 2

R270

R270

1 2

R271

R271

R80710K_0402_5% R80710K_0402_5%

12

R25710K_0402_5% R25710K_0402_5%

R25910K_0402_5%@R25910K_0402_5%

12

R26010K_0402_5% R26010K_0402_5%

12

R26110K_0402_5% R26110K_0402_5%

R26210K_0402_5% R26210K_0402_5%

12

R26310K_0402_5% R26310K_0402_5%

12

100K_0402_5%

100K_0402_5%

R80510K_0402_5%@R80510K_0402_5%

PCH_GPIO27

1 2

R245

R245

1 2

R246

R246

1 2

R247

R247

1 2

R248

R248

1 2

R249

R249

1 2

R250

R250

1 2

R252

R252

1 2

R253

R253

1 2

R255

R255

PCH_GPIO22

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

1K_0402_5%

1K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%@

10K_0402_5%@

200K_0402_5%

200K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%@

10K_0402_5%@

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

PCH_GPIO69

PCH_GPIO1

PCH_GPIO37

PCH_GPIO38

PCH_GPIO39

PCH_GPIO49

USB30_SMI#

30

PCH_GPIO37

DS_WAKE#

+3V_PCH

GPIO28

On-Die PLL Voltage Regulator
This signal has a weak internal pull up

H：On-Die voltage regulator enabl e

*

L

：

On-Die PLL Voltage Regulator d isable

EC_LID_OUT#

DS_WAKE#

CABC_SAVING

1 2

R272 1K_0402_5%@R272 1K_0402_5%@

PCH_GPIO28

CRT_DET

ODD_DETECT#

PCH_GPIO16

PCH_BT_ON

D D

C C

B B

KB_RST#

PCH_GPIO48

PCH_GPIO22

ODD_EN#

DGPU_PWROK

+3VS

R264

R264

+3VALW

R266 10K_0402_5%@R266 10K_0402_5%@

PCH_GPIO28

HDD2_DETECT#

PCH_LID_SW_IN#

EC_SMI#

R812 10K_0402_5%R812 10K_0402_5%

1 2

1 2

1 2

1 2

1 2

DS_WAKE#

31

4

EC_SCI#39

EC_SMI#39

DGPU_PWROK

39

PCH_BT_ON

ODD_DETECT#

R265 0_0402_5%

R265 0_0402_5%

@

@

CRT_DET

1 2

39

1 2

@

@

PCH_GPIO1

USB30_SMI#

EC_SCI#

EC_SMI#

PCH_LID_SW_IN#EC_LID_OUT#

PCH_GPIO16

DGPU_PWROK

PCH_GPIO22

PCH_GPIO27

PCH_GPIO28

PCH_BT_ON

ODD_DETECT#

PCH_GPIO37

PCH_GPIO38

PCH_GPIO39

PCH_GPIO48

PCH_GPIO49

HDD2_DETECT#

ER04

R498 0_0402_5%R498 0_0402_5%

R804 0_0402_5%

R804 0_0402_5%

12

U3F

U3F

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

39

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24

E16

GPIO27

P8

GPIO28

K1

40

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49 / TEMP_ALERT#

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989

<BOM Structure>

<BOM Structure>

GPIO

GPIO

NCTF

NCTF

3

TACH4 / GPIO68

TACH5 / GPIO69

TACH6 / GPIO70

TACH7 / GPIO71

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

INIT3_3V#

DF_TVS

CPU/MISC

CPU/MISC

TS_VSS1

TS_VSS2

TS_VSS3

TS_VSS4

NC_1

VSS_NCTF_15

VSS_NCTF_16

VSS_NCTF_17

VSS_NCTF_18

VSS_NCTF_19

VSS_NCTF_20

VSS_NCTF_21

VSS_NCTF_22

VSS_NCTF_23

VSS_NCTF_24

VSS_NCTF_25

VSS_NCTF_26

VSS_NCTF_27

VSS_NCTF_28

VSS_NCTF_29

VSS_NCTF_30

VSS_NCTF_31

VSS_NCTF_32

C40

B41

C41

A40

P4

AU16

P5

AY11

AY10

T14

AY1

AH8

AK11

AH10

AK10

P37

BG2

BG48

BH3

BH47

BJ4

BJ44

BJ45

BJ46

BJ5

BJ6

C2

C48

D1

D49

E1

E49

F1

F49

ODD_EN#

PCH_GPIO69

GPIO70

GPIO71

H_THERMTRIP#_C

DF_TVS

T30 PAD@ T30 P AD@

GATEA20

T28 PAD@ T28 PAD@

T29 PAD@ T29 PAD@

KB_RST#

H_CPUPWRGD

1 2

2

31

ODD_EN#

+3VS

R251

R251
10K_0402_5%

10K_0402_5%

R258390_0402_5% R258390_0402_5%

39

5

H_THERMTRIP#

H_THERMTRIP#

1 2

GATEA20

1 2

C663 100P_0402_50V8JC663 100P_0402_50V8J

Reserve for ESD please close t o U3

1 2

@

@

C170 100P_0402_50V8J

C170 100P_0402_50V8J

Reserve for EMI please close t o U3

39

H_CPUPWRGD

H_THERMTRIP# 5

Close to R258

1

DMI Termination Voltage

Set to Vcc when HIGH

DF_TVS

Set to Vss when LOW

R254

R254

2.2K_0402_5%

2.2K_0402_5%

DF_TVS

12

R2561K_0402_5% R2561K_0402_5%

CLOSE TO THE BR ANCHING POINT

+1.8VS

12

H_SNB_IVB# 5

+3VS

R273

2

G

G

5

R273
10K_0402_5%

10K_0402_5%

1 2

13

D

D

Q12

Q12

30

SSM3K7002BFU_SC70-3

SSM3K7002BFU_SC70-3

S

S

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PCH (5/8) GPIO, CPU, MISC

PCH (5/8) GPIO, CPU, MISC

PCH (5/8) GPIO, CPU, MISC

LA-8226P

LA-8226P

LA-8226P

1

16 58Monday, July 09, 2012

16 58Monday, July 09, 2012

16 58Monday, July 09, 2012

1.0

1.0

1.0

High: CRT Plugged

A A

CRT_DET

CRT_DET#

5

4

3

2

1

+1.05VS

1

1

C174

2

1

2

+3VS

1

0.1U_0402_10V7K

0.1U_0402_10V7K

2

C174

2

+1.05VS_VCC_EXP

1

1

C185

C185

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

C190

C190

C175

C175

1U_0402_6.3V6K

1U_0402_6.3V6K

+1.05VS

C186

C186

1U_0402_6.3V6K

1U_0402_6.3V6K

+1.05VS

+VCCP_VCCDMI

10U_0805_6.3V6M

D D

R274

R274

0_0805_5%

C C

B B

0_0805_5%

10U_0805_6.3V6M

+1.05VS

12

12

R275

R275

0_0805_5%

0_0805_5%

C184

C184

10U_0805_6.3V6M

10U_0805_6.3V6M

1

1

C176

C176

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

+1.05VS_VCC_EXP

1

1

C187

C187

C188

C188

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

C177

C177

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

+1.5VS

U3G

U3G

AA23

VCCCORE[1]

AC23

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

VCCAPLLEXP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM[2]

BG6

VccAFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989

<BOM Structure>

<BOM Structure>

1300mA

POWER

POWER

3709mA

CRTLVDS

CRTLVDS

VCC CORE

VCC CORE

40mA

75mA

DMI

DMI

VCCIO

VCCIO

2mA

DFT / SPI HVCMOS

DFT / SPI HVCMOS

FDI

FDI

1mA

VCCADAC

VSSADAC

1mA

VCCALVDS

VSSALVDS

VCCTX_LVDS[1]

VCCTX_LVDS[2]

VCCTX_LVDS[3]

VCCTX_LVDS[4]

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCCLKDMI

VCCDFTERM[1]

VCCDFTERM[2]

VCCDFTERM[3]

VCCDFTERM[4]

10mA

VCCSPI

U48

+VCCADAC

U47

AK36

AK37

AM37

AM38

AP36

AP37

V33

V34

AT16

AT20

+VCCP_VCCDMI

AB36

+1.05VS_VCC_DMI_CCI

AG16

AG17

AJ16

AJ17

V1

+3V_VCCPSPI

1

C171

C171

2

+VCCTX_LVDS

C178

C178

0.01U_0402_16V7K

0.01U_0402_16V7K

1

C182

C182

0.1U_0402_10V7K

0.1U_0402_10V7K

2

+1.5VS

1

C191

C191

2

1

C193

C193
1U_0402_6.3V6K

1U_0402_6.3V6K

2

0.01U_0402_16V7K

0.01U_0402_16V7K

1

2

0.1U_0402_10V7K

0.1U_0402_10V7K

1

2

1

C189

C189

2

1U_0402_6.3V6K

1U_0402_6.3V6K

+1.8VS

1

C173

C173
10U_0805_6.3V6M

10U_0805_6.3V6M

C172

C172

2

0.1U_0402_10V7K

0.1U_0402_10V7K

Near AP43

1

C179

C179

0.01U_0402_16V7K

0.01U_0402_16V7K

2

+3VS

+VCCP_VCCDMI

R387

R387

1 2

0_0805_5%

0_0805_5%

R279 0_0603_5%R279 0_0603_5%

L1

L1

12

C180

C180

1

2

+1.05VS

+3VS

12

22U_0805_6.3V6M

22U_0805_6.3V6M

1

2

ER06

C183

C183

1U_0402_6.3V6K

1U_0402_6.3V6K

BLM18PG181SN1_0603

BLM18PG181SN1_0603

ER03

+3VS

+3VS

L2

L2

12

0.1UH_MLF1608DR10KT_10%_1608

0.1UH_MLF1608DR10KT_10%_1608

0.1uH inductor, 200mA

+1.05VS

R276

R276

1 2

0_0805_5%

0_0805_5%

+1.8VS

PCH Power Rail Table
Refer to CPU EDS R1.5

Voltage Rail

V_PROC_IO

V5REF

V5REF_Sus

Vcc3_3

VccADAC

VccADPLLA

VccADPLLB

VccCore

VccDMI

Voltage

1.05

3.3

3.3

1.05

1.05

1.05

1.05

S0 Iccmax
Current (A)

0.001

5

5

0.001

0.001

0.228

0.001

0.075

0.075

1.3

0.042

1.05VccIO 3.709

1.05VccASW 0.903

3.3VccSPI 0.01

3.3VccDSW 0.001

1.8 0.002VccDFTERM

3.3VccRTC 6 uA

3.3VccSus3_3

3.3 / 1.5VccS usHDA

0.065

0.01

VccVRM 1.8 / 1.5 0.167

1.05VccCLKDMI

0.075

VccSSC 1.05 0.095

ccDIFFCLKN 1 .05 0 .055

V

VccALVDS 3.3

0.001

1.8VccTX_LVDS 0.04

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH (6/8) PWR

PCH (6/8) PWR

PCH (6/8) PWR

LA-8226P

LA-8226P

LA-8226P

1

1.0

1.0

17 58Monday, July 09, 2012

17 58Monday, July 09, 2012

17 58Monday, July 09, 2012

1.0

5

4

3

2

1

+1.05VS

+3V_PCH

1 2

R281 0_0603_5%R281 0_0603_5%

D D

C C

+3VS

+1.05VS

R285 0_0603_5%

R285 0_0603_5%

B B

+1.05VS

A A

+1.05VS

12

@

@

+1.05VS

+1.05VS

10UH_LBR2012T100M_20%~D

10UH_LBR2012T100M_20%~D

5

ER03

R289

R289

1 2

0_0805_5%

0_0805_5%

+1.05VM_VCCSUS

1

C218

C218

1U_0402_6.3V6K

1U_0402_6.3V6K

2

R287 0_0603_5%R287 0_0603_5%

+1.05VS

10UH_LBR2012T100M_20%~D

10UH_LBR2012T100M_20%~D

1 2

1 2

12

L8

L8

L9

L9

+1.05VS

+1.05VS

+3VS_VCC_CLKF33

1

@

@

C212

C212

2

10U_0805_10V4Z

10U_0805_10V4Z

+1.05VS_VCCDIFFCLKN

1

C220

C220
1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C222

C222
1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C225

C225

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

2

1

1

+

+

C232

C232

2

2

220U_B2_2.5VM_R35M

220U_B2_2.5VM_R35M

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

C234

C234

R280 0_0603_5%

R280 0_0603_5%

1

C194

C194

0.1U_0402_10V7K

0.1U_0402_10V7K

2

0.1U_0402_10V7K

0.1U_0402_10V7K

C203

C203

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C213

C213

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

+1.05VS_VCCDIFFCLKN

1

C223

C223

0.1U_0402_10V7K

0.1U_0402_10V7K

2

1

C226

C226

2

0.1U_0402_10V7K

0.1U_0402_10V7K

1

1

+

+

C233

C233

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

220U_B2_2.5VM_R35M

220U_B2_2.5VM_R35M

12

@

@

C196

@C196

@

1

1

2

2

1

1

C206

C206

2

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

+VCCRTCEXT

C217

C217

0.1U_0402_10V7K

0.1U_0402_10V7K

1

+RTCVCC

C227

C227

2

0.1U_0402_10V7K

0.1U_0402_10V7K

C235

C235

1U_0402_6.3V6K

1U_0402_6.3V6K

4

+VCCACLK

1

2

1

@

@

C200

C200
1U_0402_6.3V6K

1U_0402_6.3V6K

2

C204

C204
22U_0805_6.3V6M

22U_0805_6.3V6M

1

C207

C207

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

+1.5VS

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

18mil

18mil

+VCCSST

+1.05VM_VCCSUS

1

@

@

C224

C224
1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C228

C228

2

+VCCPDSW

+PCH_VCCDSW

+3VS_VCC_CLKF33

+VCCSUS1

C208

C208

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

C229

C229

2

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

POWER

U3J

U3J

AD49

VCCACLK

T16

VCCDSW3_3

V12

DCPSUSBYP

T38

VCC3_3[5]

BH23

VCCAPLLDMI2

AL29

VCCIO[14]

AL24

DCPSUS[3]

AA19

VCCASW[1]

AA21

VCCASW[2]

AA24

VCCASW[3]

AA26

VCCASW[4]

AA27

VCCASW[5]

AA29

VCCASW[6]

AA31

VCCASW[7]

AC26

VCCASW[8]

AC27

VCCASW[9]

AC29

VCCASW[10]

AC31

VCCASW[11]

AD29

VCCASW[12]

AD31

VCCASW[13]

W21

VCCASW[14]

W23

VCCASW[15]

W24

VCCASW[16]

W26

VCCASW[17]

W29

VCCASW[18]

W31

VCCASW[19]

W33

VCCASW[20]

N16

DCPRTC

Y49

VCCVRM[4]

BD47

VCCADPLLA

BF47

VCCADPLLB

AF17

VCCIO[7]

AF33

VCCDIFFCLKN[1]

AF34

VCCDIFFCLKN[2]

AG34

VCCDIFFCLKN[3]

AG33

VCCSSC

V16

DCPSST

T17

DCPSUS[1]

V19

DCPSUS[2]

BJ8

V_PROC_IO

A22

1

2

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989

<BOM Structure>

<BOM Structure>

C230

C230

1U_0402_6.3V6K

1U_0402_6.3V6K

VCCRTC

POWER

N26

VCCIO[29]

P26

1mA

PCI/GPIO/LPCMISC

PCI/GPIO/LPCMISC

SATA USB

SATA USB

10mA

HDA

HDA

3

VCCIO[30]

VCCIO[31]

VCCIO[32]

VCCIO[33]

VCCSUS3_3[7]

VCCSUS3_3[8]

VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

VCCIO[34]

V5REF_SUS

DCPSUS[4]

VCCSUS3_3[1]

V5REF

1mA

VCCSUS3_3[2]

VCCSUS3_3[3]

VCCSUS3_3[4]

VCCSUS3_3[5]

VCC3_3[1]

VCC3_3[8]

VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12]

VCCIO[13]

VCCIO[6]

VCCAPLLSATA

VCCVRM[1]

VCCIO[2]

VCCIO[3]

VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

P28

T27

T29

T23

T24

V23

V24

P24

T26

M26

AN23

AN24

P34

N20

N22

P20

P22

AA16

W16

T34

AJ2

AF13

AH13

AH14

AF14

AK1

AF11

AC16

AC17

AD17

T21

V21

T19

P32

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

3mA

119mA

903mA

Clock and Miscellaneous

Clock and Miscellaneous

75mA

75mA

55mA

95mA

1mA

CPURTC

CPURTC

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

1

2

1

C198

C198

2

+PCH_V5REF_SUS

+VCCA_USBSUS

+PCH_V5REF_RUN

1

2

+1.05VS_VCC_SATA

+VCCSUSHDA

1

C231

C231

2

0.1U_0402_10V7K

0.1U_0402_10V7K

Compal Secret Data

Compal Secret Data

Compal Secret Data

C195

C195
1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_10V7K

0.1U_0402_10V7K

C209

C209
1U_0402_6.3V

1U_0402_6.3V

1

C215

C215

0.1U_0402_10V7K

0.1U_0402_10V7K

2

+1.5VS

+1.05VS_VCC_SATA

1

C199

C199

2

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

+3VS

+1.05VS_SATA3

12

@

@

R292

R292

150_0402_1%

150_0402_1%

Deciphered Date

Deciphered Date

Deciphered Date

+1.05VS

+3V_PCH

+3V_PCH

+3V_PCH

1

C205

C205

2

+3V_PCH

+3VS

1

C211

C211

0.1U_0402_10V7K

0.1U_0402_10V7K

2

1

C214

C214

0.1U_0402_10V7K

0.1U_0402_10V7K

2

+1.05VS_SATA3

1

2

R286

R286

12

0_0805_5%

0_0805_5%

1

C221

C221

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1 2

R291 0_0402_5%R291 0_0402_5%

2

+1.05VS

+3VS

R284

R284

0_0805_5%

0_0805_5%

C216

C216
1U_0402_6.3V6K

1U_0402_6.3V6K

+1.05VS

+VCCA_USBSUS

12

+1.05VS

+3V_PCH

+3V_PCH+5V_PCH

D3

1 2

1 2

D3
RB751V40_SC76-2

RB751V40_SC76-2

1 2

+PCH_V5REF_SUS

1

C202

C202

0.1U_0603_25V7K

0.1U_0603_25V7K

2

+3VS+5VS

D4

D4
RB751V40_SC76-2

RB751V40_SC76-2

1 2

+PCH_V5REF_RUN

1

C210

C210
1U_0603_10V6K

1U_0603_10V6K

2

1

18 58Monday, July 09, 2012

18 58Monday, July 09, 2012

18 58Monday, July 09, 2012

R282

R282

10_0402_5%

1

2

+1.05VS

If it support 3.3V audio signals
POP:RH12 (0ohm)

If it support 1.5V audio signals
POP:RH12 (180 ohm)/RH13 (150 ohm)

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

10_0402_5%

C201

@ C201

@

1U_0402_6.3V6K

1U_0402_6.3V6K

R283

R283

10_0402_5%

10_0402_5%

Compal Electronics, Inc.

PCH (7/8) PWR

PCH (7/8) PWR

PCH (7/8) PWR

LA-8226P

LA-8226P

LA-8226P

1.0

1.0

1.0