Compal LA-8223P Schematics Rev1.0

A

B

C

D

E

1 1

2 2

Compal Confidential

QCL90 MB Schematic Document

LA-8223P

3 3

Rev: 1.0

2012.01.19

4 4

A

sualaptop365.edu.vn

B

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

4019G7

4019G7

4019G7

E

of

of

of

159Monday, September 03, 2012

159Monday, September 03, 2012

159Monday, September 03, 2012

B

B

B

1

2

3

4

5

Compal Confidential

ZZZ1

ZZZ1

PCB-MB

PCB-MB

PCB P/N for Load BOM

A A

Page 30

Page 30

Page 34

Page 32

PEG 16X

LVDS, EDID, DISPOFF#, PWM

RGB, HV Sync, DDC

HDMI, DDC

PCI-e

port 2

Mini Card-1

WLAN
Bluetooth

Page 39

Touch Pad CONN.

2

Page 37

NV N13P-GL
(N13P-GS)

Page 20 ~ 28

LCD conn

B B

CRT Conn

HDMI

C C

port 1

LAN/CRT Board

10/100/1000 LAN

Realtek GbE

RTL8111F

External board

LS-8224P
USB/B

port 4

ASM1042 USB3.0
Controller

page 35

page 35

DC/DC Interface CKT.

LS-8229P
LED/B

D D

page 37

Fan Control

LS-8226P
PWR/B

LS-8228P
ODD/B

page 36

page 31

1

LS-8227P
MIC/B

sualaptop365.edu.vn

Page 29,40

Page 36

page 30

QCL90

Mobile

Ivy Bridge
Processor

rPGA 988B Socket

+VCC_CORE, +VCCP,
+VCC_GFXCORE_AVG, +1.5V_CPU_VDDQ,
+1.8VS, _VCCSA

FDI x8
(UMA)

100MHz

2.7GT/s

Intel

PANTHER-POINT

PCH

HM77

FCBGA 989 Balls

Page 12 ~ 19

+1.05VS, +1.8VS, +3VS,
+3V_PCH, +5V_PCH, +RTCVCC,
+VCCAFDI_VRM

LPC BUS

ENE KB930QF

Reserve KB9012QF

+3VLP/+3VALW

SPI ROM

128KB

page 38

Page 38

DDR3 1333/1600MHz 1.5V

Dual Channel

Page 4 ~ 9

port 2,5

DDR3-SO-DIMM X 4

BANK 0, 1, 2, 3

+1.5V, +0.75VS

Page 10, 11

USB conn x2

USB Board

DMI x4

100MHz
5GB/s

port 3

Camera

USB2.0

port 4

Card Reader
RTS5129

USB3.0

Azalia

port 10

port 0,1

port 1,2

MiniCard

USB3.0 conn x2

Realtek
ALC269

SATA

SPI

Int. KBD

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

port 0

port 1

port 2

3.5" SATA HDD Connector

2.5" SATA HDD Connector

SATA ODD Connector

SPI ROM
4MB

Page 37

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

Page 12

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

4

Page 35

Page 30

Page 37

Page 39

Page 35

Page 33

Page 31

Page 31

Page 31

Memory Card Slot

SD/MMC

IO Board (LED)

Audio Jack (HP)

Audio Jack (MIC)

Speaker Connector

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

4019G7

4019G7

4019G7

5

Page 33

Page 33

Page 33

259Monday, September 03, 2012

259Monday, September 03, 2012

259Monday, September 03, 2012

of

of

of

B

B

B

A

X76@:

VGA GS/ VRAMX16X8

ZZZ5

X76L05@ZZZ5

X76L05@

ZZZ6

X76L06@ZZZ6

X76L06@

2G SAM

2G SAM

ZZZ7

1G SAM

1G SAM

X76L07@ZZZ7

X76L07@

2G HYN-B-DIE

2G HYN-B-DIE

ZZZ8

X76L08@ZZZ8

X76L08@

1G HYN

1G HYN

N13M-GE1
GE@

UV1

N13M-GE1

N13M-GE1

GE@UV1

GE@

N13M-GE1 x8
GE8@

ZZZ12

X76L12@ZZZ12

X76L12@

2G HYN-D-DIE

2G HYN-D-DIE

UV1

GE8@UV1

GE8@ UV1

N13M-GE1 x8

N13M-GE1 x8

VGA GL/ VRAMX16X8

ZZZ2

X76L02@ZZZ2

ZZZ

X76L01@ZZZ

X76L01@

2G SAM

2G SAM

ZZZ3

X76L03@ZZZ3

X76L03@

1G SAM

1G SAM

N13P-GS N13P-GL
GS@ GL@

N13P-GS

N13P-GS

X76L02@

2G HYN-B-DIE

2G HYN-B-DIE

ZZZ4

X76L04@ZZZ4

X76L04@

1G HYN

1G HYN

GS@UV1

GS@

ZZZ11

2G HYN-D-DIE

2G HYN-D-DIE

UV1

N13P-GL

N13P-GL

X76L11@ZZZ11

X76L11@

GL@UV1

GL@

SATA Re-Driver

GEL@:
GS@:

9012@:

USB30@:

SMBUS Control Table

1 1

N13M-GE1 or N13P-GL
N13P-GS
VGA componet

DIS@:

EC(ENE 9012 chip)
EC(ENE 930 chip)

930@:

USB3.0 by ASMEDIA
USB3.0 by PCH

IU3@:

AI Charger

AI@:

Non AI Charger

NAI@:

SOURCE

EC_SMB_CK1
EC_SMB_DA1

EC_SMB_CK2
EC_SMB_DA2

PCH_SMBCLK
PCH_SMBDATA PCH

PCH_SMLCLK
PCH_SMLDATA

KB930

KB930

PCH

MINI1 BATT SODIMM

X

V

X

X
X

VV

XX

DESTINATIONDIFFERENTIAL
10/100/1G LAN
MINI CARD WLAN
None
ASMEDIA USB3.0
None
None

CLK

CLKOUT_PCIE0
CLKOUT_PCIE1
CLKOUT_PCIE2
CLKOUT_PCIE3
CLKOUT_PCIE4
CLKOUT_PCIE5

X76@

ZZZ10

PARADE PS8520 SATA Re-Driver

PARADE PS8520 SATA Re-Driver

ZZZ9

ASM1466 SATA REPEATER

ASM1466 SATA REPEATER

PCH

EC

X

X

X

V

X

X
X

V

X76L10@ZZZ10

X76L10@

X76L09@ZZZ9

X76L09@

DGPU

X
X

X

FLEX CLOCKS DESTINATION
CLKOUTFLEX0
CLKOUTFLEX1
CLKOUTFLEX2
CLKOUTFLEX3

Symbol Note :

NoneCLKOUT_PCIE6
CLKOUT_PCIE7
CLKOUT_PEG_B

None

None

CLKOUT
PCI0
PCI1
PCI2
PCI3
PCI4

Voltage Rails

Power Plane Description

VIN
BATT+
B+
+3VLP 3.3V power rail for 51ON power management ON ON ON ON
+3VALW ON3.3V always on power rail
+LAN_IO OFFONON3.3V power rail for ethernet
+3VS_WLAN ON OFF3.3V power rail for WLAN/BT Combo
+3V_PCH ON OFF OFF3.3V power rail for PCH suspend well plane
+3VS 3.3V power rail for DDR SPI,PCH,HDD,Audio,Card Reader ON
+3VSG
+LCDVDD ON OFF OFF
+5VALW ON
+5V_PCH
+5VS OFFON OFF5V power rail for HDD,AUDIO,FAN,Touch PAD
+5VS_ODD
+1.8VS
+1.05VS ON
+VCCP
+1.05VSG

X

V

X

V

+1.5V

+1.5V_CPU_VDDQ

+1.5VSG
+1.5VS
+0.75VS
+VCCSA
+VCC_CORE

+VCC_GFXCORE_AXG

+VGA_CORE CORE Voltage for N13P Graphics ON OFF OFF ON OFF OFF OFF

: means Digital Ground

: means Analog Ground

DESTINATION

PCH_LOOPBACK

EC
None USB2

LPC Debug Port

None

Adapter power supply (19V)
Battery power supply (12.6V)
AC or battery power rail for power circuit

3.3V power rail for LCD
5V always on power rail
5V power rail for PCH suspend well plane

5V power rail for SATA ODD

1.8V power rail for CPU,PCH

1.05V power rail for PCH

1.05V power rail for CPU VCCIO,PCH

1.05V power rail for N13P

1.5V power rail for DDR3 system memory

1.5V power rail CPU VDDQ

1.5V power rail for N13P,VRAM

1.5V power rail for PCH,WLAN/BT combo

0.75V power rail for DDR VREF
VCCSA for CPU system agent
CORE Voltage for CPU

1.5V power rail for N13P,VRAM

CLK_SD_48M
None
None
None

SATA
SATA0
SATA1
SATA2
SATA3
SATA4
SATA5

PCH

DESTINATION

USB3 PORT

1
2
3
4

S1 S3 S5

N/A N/A N/A

N/A N/A N/A N/A

ON OFF OFF3.3V power rail for VGA

ON OFF

ON
ON

ON
ON

ON
ON OFF OFF OFF
ON OFF OFF OFF
ON OFF OFF OFF
ON
ON
ON

3.5'' HDD

2.5'' HDD
ODD
None
None
None

DESTINATION

USB2.0+3.0
USB2.0+3.0

None
None

Deep
S3

N/A

N/AN/AN/A

N/A

ON ON AC/ON; DC/OFF

OFF
OFF OFF
ON
OFF OFF OFF

OFF

OFF

ON AC/ON; DC/OFF

ON
ON OFF

OFF

OFF

OFF
OFF OFF OFF
OFF OFF OFF
OFF OFF
OFF OFF OFF
ON ON
OFF OFF OFF

OFF
OFF
OFF

OFF

OFF

OFFON

OFF

OFF

OFF

OFF
OFFOFF

QCL90 * 16 (LA8223P)
Board ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

*

PCH

PCI EXPRESS

Lane 1
Lane 2
Lane 3
Lane 4
Lane 5
Lane 6
Lane 7
Lane 8

100K +/- 5%Ra / Rc

Rb / Rd V min

56K +/- 5% 0.958 V 1.185 V 1.359 V

USB2 PORT

0
1

USB2.0+3.0
USB2.0+3.0

DESTINATION

2
3
4
5
6
7
8
9
10 Bluetooth
11
12
13

CAMERA
Card Reader
USB2
None
None
None
None
JMINI1 (WLAN)
None
None
None

DESTINATION
10/100/1G LAN
MINI CARD WLAN
None
ASMEDIA USB3.0
None
None
None
None

typ: 0.958~1.359V

AD_BID

V typ

AD_BID

V

AD_BID

max

Security Classification

Security Classification

sualaptop365.edu.vn

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Title

Title

Title

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

4019G7

4019G7

4019G7

Date: Sheet

Date: Sheet

Date: Sheet

of

of

of

359Monday, September 03, 2012

359Monday, September 03, 2012

359Monday, September 03, 2012

B

B

B

5

JCPUA

D D

DMI_CRX_PTX_N014
DMI_CRX_PTX_N114
DMI_CRX_PTX_N214
DMI_CRX_PTX_N314

DMI_CRX_PTX_P014
DMI_CRX_PTX_P114
DMI_CRX_PTX_P214
DMI_CRX_PTX_P314

DMI_CTX_PRX_N014
DMI_CTX_PRX_N114
DMI_CTX_PRX_N214
DMI_CTX_PRX_N314

DMI_CTX_PRX_P014
DMI_CTX_PRX_P114
DMI_CTX_PRX_P214
DMI_CTX_PRX_P314

FDI_CTX_PRX_N014
FDI_CTX_PRX_N114
FDI_CTX_PRX_N214
FDI_CTX_PRX_N314
FDI_CTX_PRX_N414
FDI_CTX_PRX_N514

C C

+VCCP

12

24.9_0402_1%

24.9_0402_1%

eDP_COMPIO
and ICOMPO
signals
should be
shorted

B B

near balls
and routed
with
typical
impedance
<25 mohms

FDI_CTX_PRX_N614
FDI_CTX_PRX_N714

FDI_CTX_PRX_P014
FDI_CTX_PRX_P114
FDI_CTX_PRX_P214
FDI_CTX_PRX_P314
FDI_CTX_PRX_P414
FDI_CTX_PRX_P514
FDI_CTX_PRX_P614
FDI_CTX_PRX_P714

FDI_FSYNC014
FDI_FSYNC114

FDI_INT14
FDI_LSYNC014

R56

R56

FDI_LSYNC114

FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

FDI_FSYNC0
FDI_FSYNC1

FDI_INT
FDI_LSYNC0

FDI_LSYNC1

EDP_COMP

JCPUA

B27

DMI_RX#[0]

B25

DMI_RX#[1]

A25

DMI_RX#[2]

B24

DMI_RX#[3]

B28

DMI_RX[0]

B26

DMI_RX[1]

A24

DMI_RX[2]

B23

DMI_RX[3]

G21

DMI_TX#[0]

E22

DMI_TX#[1]

F21

DMI_TX#[2]

D21

DMI_TX#[3]

G22

DMI_TX[0]

D22

DMI_TX[1]

F20

DMI_TX[2]

C21

DMI_TX[3]

A21

FDI0_TX#[0]

H19

FDI0_TX#[1]

E19

FDI0_TX#[2]

F18

FDI0_TX#[3]

B21

FDI1_TX#[0]

C20

FDI1_TX#[1]

D18

FDI1_TX#[2]

E17

FDI1_TX#[3]

A22

FDI0_TX[0]

G19

FDI0_TX[1]

E20

FDI0_TX[2]

G18

FDI0_TX[3]

B20

FDI1_TX[0]

C19

FDI1_TX[1]

D19

FDI1_TX[2]

F17

FDI1_TX[3]

J18

FDI0_FSYNC

J17

FDI1_FSYNC

H20

FDI_INT

J19

FDI0_LSYNC

H17

FDI1_LSYNC

A18

eDP_COMPIO

A17

eDP_ICOMPO

B16

eDP_HPD#

C15

eDP_AUX

D15

eDP_AUX#

C17

eDP_TX[0]

F16

eDP_TX[1]

C16

eDP_TX[2]

G15

eDP_TX[3]

C18

eDP_TX#[0]

E16

eDP_TX#[1]

D16

eDP_TX#[2]

F15

eDP_TX#[3]

TYCO_2013620-2_IVY BRIDGE

TYCO_2013620-2_IVY BRIDGE

CONN@

CONN@

DMI

DMI

Intel(R) FDI

Intel(R) FDI

eDP

eDP

4

+VCCP

12

R54

R54

24.9_0402_1%

24.9_0402_1%

PEG_COMP

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]

PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

J22
J21
H22

PCIE_GTX_CRX_N15

K33

PCIE_GTX_CRX_N14

M35

PCIE_GTX_CRX_N13

L34

PCIE_GTX_CRX_N12

J35

PCIE_GTX_CRX_N11

J32

PCIE_GTX_CRX_N10

H34

PCIE_GTX_CRX_N9

H31

PCIE_GTX_CRX_N8

G33

PCIE_GTX_CRX_N7

G30

PCIE_GTX_CRX_N6

F35

PCIE_GTX_CRX_N5

E34

PCIE_GTX_CRX_N4

E32

PCIE_GTX_CRX_N3

D33

PCIE_GTX_CRX_N2

D31

PCIE_GTX_CRX_N1

B33

PCIE_GTX_CRX_N0

C32

PCIE_GTX_CRX_P15

J33

PCIE_GTX_CRX_P14

L35

PCIE_GTX_CRX_P13

K34

PCIE_GTX_CRX_P12

H35

PCIE_GTX_CRX_P11

H32

PCIE_GTX_CRX_P10

G34

PCIE_GTX_CRX_P9

G31

PCIE_GTX_CRX_P8

F33

PCIE_GTX_CRX_P7

F30

PCIE_GTX_CRX_P6

E35

PCIE_GTX_CRX_P5

E33

PCIE_GTX_CRX_P4

F32

PCIE_GTX_CRX_P3

D34

PCIE_GTX_CRX_P2

E31

PCIE_GTX_CRX_P1

C33

PCIE_GTX_CRX_P0

B32

PCIE_CTX_GRX_N15

M29

PCIE_CTX_GRX_N14

M32

PCIE_CTX_GRX_N13

M31

PCIE_CTX_GRX_N12

L32

PCIE_CTX_GRX_N11

L29

PCIE_CTX_GRX_N10

K31

PCIE_CTX_GRX_N9

K28

PCIE_CTX_GRX_N8

J30

PCIE_CTX_GRX_N7

J28

PCIE_CTX_GRX_N6

H29

PCIE_CTX_GRX_N5

G27

PCIE_CTX_GRX_N4

E29

PCIE_CTX_GRX_N3

F27

PCIE_CTX_GRX_N2

D28

PCIE_CTX_GRX_N1

F26

PCIE_CTX_GRX_N0

E25

PCIE_CTX_GRX_P15

M28

PCIE_CTX_GRX_P14

M33

PCIE_CTX_GRX_P13

M30

PCIE_CTX_GRX_P12

L31

PCIE_CTX_GRX_P11

L28

PCIE_CTX_GRX_P10

K30

PCIE_CTX_GRX_P9

K27

PCIE_CTX_GRX_P8

J29

PCIE_CTX_GRX_P7

J27

PCIE_CTX_GRX_P6

H28

PCIE_CTX_GRX_P5

G28

PCIE_CTX_GRX_P4

E28

PCIE_CTX_GRX_P3

F28

PCIE_CTX_GRX_P2

D27

PCIE_CTX_GRX_P1

E26

PCIE_CTX_GRX_P0

D25

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]

PCI EXPRESS* - GRAPHICS

PCI EXPRESS* - GRAPHICS

PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]

PEG_ICOMPI and RCOMPO signals should be shorted and routed
with - max length = 500 mils - typical impedance = 43 mohms
PEG_ICOMPO signals should be routed with - max length = 500 mils

- typical impedance = 14.5 mohms

CV37 0.22U_0402_10V6KDIS@ CV37 0.22U_0402_10V6KDIS@

1 2

CV35 0.22U_0402_10V6KDIS@ CV35 0.22U_0402_10V6KDIS@

1 2

CV33 0.22U_0402_10V6KDIS@ CV33 0.22U_0402_10V6KDIS@

1 2

CV31 0.22U_0402_10V6KDIS@ CV31 0.22U_0402_10V6KDIS@

1 2

CV29 0.22U_0402_10V6KDIS@ CV29 0.22U_0402_10V6KDIS@

1 2

CV27 0.22U_0402_10V6KDIS@ CV27 0.22U_0402_10V6KDIS@

1 2

CV25 0.22U_0402_10V6KDIS@ CV25 0.22U_0402_10V6KDIS@

1 2

CV23 0.22U_0402_10V6KDIS@ CV23 0.22U_0402_10V6KDIS@

1 2

CV21 0.22U_0402_10V6KDIS@ CV21 0.22U_0402_10V6KDIS@

1 2

CV19 0.22U_0402_10V6KDIS@ CV19 0.22U_0402_10V6KDIS@

1 2

CV17 0.22U_0402_10V6KDIS@ CV17 0.22U_0402_10V6KDIS@

1 2

CV15 0.22U_0402_10V6KDIS@ CV15 0.22U_0402_10V6KDIS@

1 2

CV13 0.22U_0402_10V6KDIS@ CV13 0.22U_0402_10V6KDIS@

1 2

CV11 0.22U_0402_10V6KDIS@ CV11 0.22U_0402_10V6KDIS@

1 2

CV9 0.22U_0402_10V6KDIS@ CV9 0.22U_0402_10V6KDIS@

1 2

CV7 0.22U_0402_10V6KDIS@ CV7 0.22U_0402_10V6KDIS@

1 2

CV36 0.22U_0402_10V6KDIS@ CV36 0.22U_0402_10V6KDIS@

1 2

CV34 0.22U_0402_10V6KDIS@ CV34 0.22U_0402_10V6KDIS@

1 2

CV32 0.22U_0402_10V6KDIS@ CV32 0.22U_0402_10V6KDIS@

1 2

CV30 0.22U_0402_10V6KDIS@ CV30 0.22U_0402_10V6KDIS@

1 2

CV28 0.22U_0402_10V6KDIS@ CV28 0.22U_0402_10V6KDIS@

1 2

CV26 0.22U_0402_10V6KDIS@ CV26 0.22U_0402_10V6KDIS@

1 2

CV24 0.22U_0402_10V6KDIS@ CV24 0.22U_0402_10V6KDIS@

1 2

CV22 0.22U_0402_10V6KDIS@ CV22 0.22U_0402_10V6KDIS@

1 2

CV20 0.22U_0402_10V6KDIS@ CV20 0.22U_0402_10V6KDIS@

1 2

CV18 0.22U_0402_10V6KDIS@ CV18 0.22U_0402_10V6KDIS@

1 2

CV16 0.22U_0402_10V6KDIS@ CV16 0.22U_0402_10V6KDIS@

1 2

CV14 0.22U_0402_10V6KDIS@ CV14 0.22U_0402_10V6KDIS@

1 2

CV12 0.22U_0402_10V6KDIS@ CV12 0.22U_0402_10V6KDIS@

1 2

CV10 0.22U_0402_10V6KDIS@ CV10 0.22U_0402_10V6KDIS@

1 2

CV8 0.22U_0402_10V6KDIS@ CV8 0.22U_0402_10V6KDIS@

1 2

CV6 0.22U_0402_10V6KDIS@ CV6 0.22U_0402_10V6KDIS@

1 2

C10 0.22U_0402_10V6KDIS@ C10 0.22U_0402_10V6KDIS@

1 2

C11 0.22U_0402_10V6KDIS@ C11 0.22U_0402_10V6KDIS@

1 2

C12 0.22U_0402_10V6KDIS@ C12 0.22U_0402_10V6KDIS@

1 2

C13 0.22U_0402_10V6KDIS@ C13 0.22U_0402_10V6KDIS@

1 2

C14 0.22U_0402_10V6KDIS@ C14 0.22U_0402_10V6KDIS@

1 2

C15 0.22U_0402_10V6KDIS@ C15 0.22U_0402_10V6KDIS@

1 2

C16 0.22U_0402_10V6KDIS@ C16 0.22U_0402_10V6KDIS@

1 2

C17 0.22U_0402_10V6KDIS@ C17 0.22U_0402_10V6KDIS@

1 2

C18 0.22U_0402_10V6KDIS@ C18 0.22U_0402_10V6KDIS@

1 2

C19 0.22U_0402_10V6KDIS@ C19 0.22U_0402_10V6KDIS@

1 2

C20 0.22U_0402_10V6KDIS@ C20 0.22U_0402_10V6KDIS@

1 2

C21 0.22U_0402_10V6KDIS@ C21 0.22U_0402_10V6KDIS@

1 2

C22 0.22U_0402_10V6KDIS@ C22 0.22U_0402_10V6KDIS@

1 2

C23 0.22U_0402_10V6KDIS@ C23 0.22U_0402_10V6KDIS@

1 2

C24 0.22U_0402_10V6KDIS@ C24 0.22U_0402_10V6KDIS@

1 2

C25 0.22U_0402_10V6KDIS@ C25 0.22U_0402_10V6KDIS@

1 2

C26 0.22U_0402_10V6KDIS@ C26 0.22U_0402_10V6KDIS@

1 2

C27 0.22U_0402_10V6KDIS@ C27 0.22U_0402_10V6KDIS@

1 2

C28 0.22U_0402_10V6KDIS@ C28 0.22U_0402_10V6KDIS@

1 2

C29 0.22U_0402_10V6KDIS@ C29 0.22U_0402_10V6KDIS@

1 2

C30 0.22U_0402_10V6KDIS@ C30 0.22U_0402_10V6KDIS@

1 2

C31 0.22U_0402_10V6KDIS@ C31 0.22U_0402_10V6KDIS@

1 2

C32 0.22U_0402_10V6KDIS@ C32 0.22U_0402_10V6KDIS@

1 2

C33 0.22U_0402_10V6KDIS@ C33 0.22U_0402_10V6KDIS@

1 2

C34 0.22U_0402_10V6KDIS@ C34 0.22U_0402_10V6KDIS@

1 2

C35 0.22U_0402_10V6KDIS@ C35 0.22U_0402_10V6KDIS@

1 2

C36 0.22U_0402_10V6KDIS@ C36 0.22U_0402_10V6KDIS@

1 2

C37 0.22U_0402_10V6KDIS@ C37 0.22U_0402_10V6KDIS@

1 2

C38 0.22U_0402_10V6KDIS@ C38 0.22U_0402_10V6KDIS@

1 2

C39 0.22U_0402_10V6KDIS@ C39 0.22U_0402_10V6KDIS@

1 2

C40 0.22U_0402_10V6KDIS@ C40 0.22U_0402_10V6KDIS@

1 2

C41 0.22U_0402_10V6KDIS@ C41 0.22U_0402_10V6KDIS@

1 2

3

PCIE_GTX_C_CRX_N15
PCIE_GTX_C_CRX_N14
PCIE_GTX_C_CRX_N13
PCIE_GTX_C_CRX_N12
PCIE_GTX_C_CRX_N11
PCIE_GTX_C_CRX_N10
PCIE_GTX_C_CRX_N9
PCIE_GTX_C_CRX_N8
PCIE_GTX_C_CRX_N7
PCIE_GTX_C_CRX_N6
PCIE_GTX_C_CRX_N5
PCIE_GTX_C_CRX_N4
PCIE_GTX_C_CRX_N3
PCIE_GTX_C_CRX_N2
PCIE_GTX_C_CRX_N1
PCIE_GTX_C_CRX_N0

PCIE_GTX_C_CRX_P15
PCIE_GTX_C_CRX_P14
PCIE_GTX_C_CRX_P13
PCIE_GTX_C_CRX_P12
PCIE_GTX_C_CRX_P11
PCIE_GTX_C_CRX_P10
PCIE_GTX_C_CRX_P9
PCIE_GTX_C_CRX_P8
PCIE_GTX_C_CRX_P7
PCIE_GTX_C_CRX_P6
PCIE_GTX_C_CRX_P5
PCIE_GTX_C_CRX_P4
PCIE_GTX_C_CRX_P3
PCIE_GTX_C_CRX_P2
PCIE_GTX_C_CRX_P1
PCIE_GTX_C_CRX_P0

PCIE_CTX_C_GRX_N15
PCIE_CTX_C_GRX_N14
PCIE_CTX_C_GRX_N13
PCIE_CTX_C_GRX_N12
PCIE_CTX_C_GRX_N11
PCIE_CTX_C_GRX_N10
PCIE_CTX_C_GRX_N9
PCIE_CTX_C_GRX_N8
PCIE_CTX_C_GRX_N7
PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_N5
PCIE_CTX_C_GRX_N4
PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_N0

PCIE_CTX_C_GRX_P15
PCIE_CTX_C_GRX_P14
PCIE_CTX_C_GRX_P13
PCIE_CTX_C_GRX_P12
PCIE_CTX_C_GRX_P11
PCIE_CTX_C_GRX_P10
PCIE_CTX_C_GRX_P9
PCIE_CTX_C_GRX_P8
PCIE_CTX_C_GRX_P7
PCIE_CTX_C_GRX_P6
PCIE_CTX_C_GRX_P5
PCIE_CTX_C_GRX_P4
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_P0

PCIE_CTX_C_GRX_N[0..15] 20

PCIE_CTX_C_GRX_P[0..15] 20

2

PCIE_GTX_C_CRX_N[0..15] 20

PCIE_GTX_C_CRX_P[0..15] 20

JCPUI

JCPUI

T35

VSS161

T34

VSS162

T33

VSS163

T32

VSS164

T31

VSS165

T30

VSS166

T29

VSS167

T28

VSS168

T27

VSS169

T26

VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

P3

VSS175

P2

VSS176

N35

VSS177

N34

VSS178

N33

VSS179

N32

VSS180

N31

VSS181

N30

VSS182

N29

VSS183

N28

VSS184

N27

VSS185

N26

VSS186

M34

VSS187

L33

VSS188

L30

VSS189

L27

VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198

K35

VSS199

K32

VSS200

K29

VSS201

K26

VSS202

J34

VSS203

J31

VSS204

H33

VSS205

H30

VSS206

H27

VSS207

H24

VSS208

H21

VSS209

H18

VSS210

H15

VSS211

H13

VSS212

H10

VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222

G35

VSS223

G32

VSS224

G29

VSS225

G26

VSS226

G23

VSS227

G20

VSS228

G17

VSS229

G11

VSS230

F34

VSS231

F31

VSS232

F29

VSS233

TYCO_2013620-2_IVY BRIDGE

TYCO_2013620-2_IVY BRIDGE

CONN@

CONN@

VSS

VSS

1

F22

VSS234

F19

VSS235

E30

VSS236

E27

VSS237

E24

VSS238

E21

VSS239

E18

VSS240

E15

VSS241

E13

VSS242

E10

VSS243

E9

VSS244

E8

VSS245

E7

VSS246

E6

VSS247

E5

VSS248

E4

VSS249

E3

VSS250

E2

VSS251

E1

VSS252

D35

VSS253

D32

VSS254

D29

VSS255

D26

VSS256

D20

VSS257

D17

VSS258

C34

VSS259

C31

VSS260

C28

VSS261

C27

VSS262

C25

VSS263

C23

VSS264

C10

VSS265

C1

VSS266

B22

VSS267

B19

VSS268

B17

VSS269

B15

VSS270

B13

VSS271

B11

VSS272

B9

VSS273

B8

VSS274

B7

VSS275

B5

VSS276

B3

VSS277

B2

VSS278

A35

VSS279

A32

VSS280

A29

VSS281

A26

VSS282

A23

VSS283

A20

VSS284

A3

VSS285

A A

5

sualaptop365.edu.vn

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

4019G7

4019G7

4019G7

1

of

of

of

459Monday, September 03, 2012

459Monday, September 03, 2012

459Monday, September 03, 2012

B

B

B

5

H_CPUPWRGD H_CPUPWRGD_XDP

D D

PBTN_OUT#12,14,39

CFG07
VGATE14,49

+VCCP

XDP_TRST#
XDP_TMS
XDP_TCK
XDP_PREQ#
XDP_PRDY#

For CPU XDP

R441K_0402_5% @ R441K_0402_5% @

1 2

R461K_0402_5% @ R461K_0402_5% @

1 2

R48

@ R48

@

1 2

1K_0402_5%

1K_0402_5%

T45 PAD@ T45 PAD@
T46 PAD@ T46 PAD@
T47 PAD@ T47 PAD@
T49 PAD@ T49 PAD@
T48 PAD@ T48 PAD@

XDP_HOOK2

XDP_RST#_RPLT_RST#
XDP_DBRESET#
XDP_TDO
XDP_TDI

4

T59 PAD@ T59 PAD@
T60 PAD@ T60 PAD@
T61 PAD@ T61 PAD@
T64 PAD@ T64 PAD@

T62 PAD@ T62 PAD@
T63 PAD@ T63 PAD@
T67 PAD@ T67 PAD@
T68 PAD@ T68 PAD@
T69 PAD@ T69 PAD@

3

SYSTEM_PWROK14

PM_DRAM_PWRGD14

+3V_PCH

1 2

2

+3V_PCH +3VALW

@

PR05

R37

@R37

@

0_0402_5%

0_0402_5%
1 2

1 2

R1714

R1714
0_0402_5%

R261200_0402_1% R261200_0402_1%

0_0402_5%

0_0402_5%

0_0402_5%

+3VS

12

PR05

R576

R576

1 2

R1712

R1712

10K_0402_5%

10K_0402_5%

S_PWG
D_PWG

@

R279

R279

1 2

5

U1

U1

1

P

A

O

2

B

G

74AHC1G09GW TSSOP 5P

74AHC1G09GW TSSOP 5P

3

0_0402_5%

0_0402_5%

0.1U_0402_16V4Z~DC30.1U_0402_16V4Z~D

C3

1

2

4

1

+1.5V_CPU_VDDQ

12

R36

R36
200_0402_1%

200_0402_1%

VDDPWRGOOD

+VCCP

12

R50

R50
75_0402_5%

75_0402_5%

R52

R52

1 2

43_0402_1%

43_0402_1%

12

R53

R53
0_0402_5%

0_0402_5%

PU/PD for JTAG signals

XDP_TMS
XDP_TDI_R
XDP_PREQ#
XDP_TDO_R

XDP_TCK
XDP_TRST#

1 2
1 2
1 2
1 2

1 2
1 2

Compal Electronics, Inc.

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

4019G7

4019G7

4019G7

1

@

@

+VCCP

R3951_0402_5% R3951_0402_5%
R4051_0402_5% R4051_0402_5%
R171851_0402_5% @ R171851_0402_5% @
R4151_0402_5% R4151_0402_5%

R4251_0402_5% R4251_0402_5%
R4351_0402_5% R4351_0402_5%

B

B

B

of

of

of

559Monday, September 03, 2012

559Monday, September 03, 2012

559Monday, September 03, 2012

1 2

1 2

1 2
1 2
1 2

+3VS

0.1U_0402_16V4ZC60.1U_0402_16V4Z

1

C6

2

5

1

U3

U3

P

BUFO_CPU_RST# BUF_CPU_RST#

4

NC

A2Y

G

SN74LVC1G07DCKR_SC70-5

SN74LVC1G07DCKR_SC70-5

3

+3VS

R201K_0402_5% R201K_0402_5%

R2310K_0402_5% R2310K_0402_5%

R7140_0402_1% R7140_0402_1%
R825.5_0402_1% R825.5_0402_1%
R9200_0402_1% R9200_0402_1%

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

C C

Processor Pullups

H_PROCHOT#

H_PECI39

H_PROCHOT#39,42

B B

H_THERMTRIP#16

H_PM_SYNC14

H_CPUPWRGD16

A A

Reserve for EMI please close to JCPU1

1 2

H_SNB_IVB#16

T24

T24

PAD @

PAD @

R30 0_0402_5%R30 0_0402_5%

VDDPWRGOOD

1 2

VDDPWRGOOD_R

@

@

C1569 100P_0402_50V8J

C1569 100P_0402_50V8J

@

@

C421 100P_0402_50V8J

C421 100P_0402_50V8J

H_CPUPWRGD BUF_CPU_RST#

1 2

R6

R6

1 2

56_0402_5%

56_0402_5%

1 2

R22

R22

1 2

130_0402_1%

130_0402_1%

+VCCP

R1762_0402_5% R1762_0402_5%

H_CATERR#

H_PROCHOT#_R

H_THERMTRIP#

H_PM_SYNC

H_CPUPWRGD_R

VDDPWRGOOD_R

BUF_CPU_RST#

C26

AN34

AL33

AN33

AL32

AN32

AM34

AP33

V8

AR33

@

@

C1567 100P_0402_50V8J

C1567 100P_0402_50V8J

Reserve for EMI please close to JCPU1

JCPUB

JCPUB

PROC_SELECT#

SKTOCC#

CATERR#

PECI

PROCHOT#

THERMTRIP#

PM_SYNC

UNCOREPWRGOOD

SM_DRAMPWROK

RESET#

TYCO_2013620-2_IVY BRIDGE

TYCO_2013620-2_IVY BRIDGE

CONN@

CONN@

@

@

1 2

C426 100P_0402_50V8J

C426 100P_0402_50V8J

Reserve for EMI please close to JCPU1 Reserve for EMI please close to JCPU1

5

sualaptop365.edu.vn

H_PECI

1 2

MISCTHERMALPWR MANAGEMENT

MISCTHERMALPWR MANAGEMENT

CLOCKS

CLOCKS

DDR3

DDR3

JTAG & BPM

JTAG & BPM

4

DPLL_REF_CLK

DPLL_REF_CLK#

SM_DRAMRST#

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

MISC

MISC

BCLK

BCLK#

PRDY#

PREQ#

TCK
TMS

TRST#

TDO

DBR#

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

TDI

CLK_CPU_DMI_R

A28

CLK_CPU_DMI#_R

A27

CLK_CPU_DPLL_R

A16

CLK_CPU_DPLL#_R

A15

H_DRAMRST#

R8

SM_RCOMP0

AK1

SM_RCOMP1

A5

SM_RCOMP2

A4

XDP_PRDY#

AP29

XDP_PREQ#

AP27

XDP_TCK

AR26

XDP_TMS

AR27

XDP_TRST#

AP30

XDP_TDI_R

AR28

XDP_TDO_R

AP26

XDP_DBRESET#_R1

AL35

XDP_BPM#0

AT28

XDP_BPM#1

AR29

XDP_BPM#2

AR30

XDP_BPM#3

AT30

XDP_BPM#4

AP32

XDP_BPM#5

AR31

XDP_BPM#6

AT31

XDP_BPM#7

AR32

R1716 0_0402_5%R1716 0_0402_5%

1 2

R1717 0_0402_5%R1717 0_0402_5%

1 2

R3 1K_0402_1%R3 1K_0402_1%

1 2

R4 1K_0402_1%R4 1K_0402_1%

1 2

H_DRAMRST# 6

@

@

1 2

C1568 100P_0402_50V8J

C1568 100P_0402_50V8J

Reserve for EMI please close to JCPU1

R16 0_0402_5% @R16 0_0402_5% @

1 2

R18 0_0402_5% @R18 0_0402_5% @

1 2

R21 0_0402_5% @R21 0_0402_5% @

1 2

R1719 0_0402_5%R1719 0_0402_5%

1 2

T32 PAD@ T32 PAD@
T33 PAD@ T33 PAD@
T34 PAD@ T34 PAD@
T35 PAD@ T35 PAD@
T36 PAD@ T36 PAD@
T37 PAD@ T37 PAD@
T38 PAD@ T38 PAD@
T39 PAD@ T39 PAD@

XDP_TDI
XDP_TDO

XDP_DBRESET#

CLK_CPU_DMI 13
CLK_CPU_DMI# 13

H_DRAMRST#

@

@

1 2

C73 100P_0402_50V8J

C73 100P_0402_50V8J

+VCCP

XDP_DBRESET#_R 12,14

XDP_DBRESET#_R1

PLT_RST#15,32,35,39,40

XDP_DBRESET#_R1

H_CPUPWRGD

DDR3 Compensation Signals

SM_RCOMP0
SM_RCOMP1
SM_RCOMP2

Reserve for EMI please close to JCPU1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

5

JCPUC

DDR_A_D[0..63]10

D D

C C

B B

DDR_A_BS010
DDR_A_BS110
DDR_A_BS210

DDR_A_CAS#10
DDR_A_RAS#10
DDR_A_WE#10

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

JCPUC

C5

SA_DQ[0]

D5

SA_DQ[1]

D3

SA_DQ[2]

D2

SA_DQ[3]

D6

SA_DQ[4]

C6

SA_DQ[5]

C2

SA_DQ[6]

C3

SA_DQ[7]

F10

SA_DQ[8]

F8

SA_DQ[9]

G10

SA_DQ[10]

G9

SA_DQ[11]

F9

SA_DQ[12]

F7

SA_DQ[13]

G8

SA_DQ[14]

G7

SA_DQ[15]

K4

SA_DQ[16]

K5

SA_DQ[17]

K1

SA_DQ[18]

J1

SA_DQ[19]

J5

SA_DQ[20]

J4

SA_DQ[21]

J2

SA_DQ[22]

K2

SA_DQ[23]

M8

SA_DQ[24]

N10

SA_DQ[25]

N8

SA_DQ[26]

N7

SA_DQ[27]

M10

SA_DQ[28]

M9

SA_DQ[29]

N9

SA_DQ[30]

M7

SA_DQ[31]

AG6

SA_DQ[32]

AG5

SA_DQ[33]

AK6

SA_DQ[34]

AK5

SA_DQ[35]

AH5

SA_DQ[36]

AH6

SA_DQ[37]

AJ5

SA_DQ[38]

AJ6

SA_DQ[39]

AJ8

SA_DQ[40]

AK8

SA_DQ[41]

AJ9

SA_DQ[42]

AK9

SA_DQ[43]

AH8

SA_DQ[44]

AH9

SA_DQ[45]

AL9

SA_DQ[46]

AL8

SA_DQ[47]

AP11

SA_DQ[48]

AN11

SA_DQ[49]

AL12

SA_DQ[50]

AM12

SA_DQ[51]

AM11

SA_DQ[52]

AL11

SA_DQ[53]

AP12

SA_DQ[54]

AN12

SA_DQ[55]

AJ14

SA_DQ[56]

AH14

SA_DQ[57]

AL15

SA_DQ[58]

AK15

SA_DQ[59]

AL14

SA_DQ[60]

AK14

SA_DQ[61]

AJ15

SA_DQ[62]

AH15

SA_DQ[63]

AE10

SA_BS[0]

AF10

SA_BS[1]

V6

SA_BS[2]

AE8

SA_CAS#

AD9

SA_RAS#

AF9

SA_WE#

TYCO_2013620-2_IVY BRIDGE

TYCO_2013620-2_IVY BRIDGE

CONN@

CONN@

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_CLK[0]

SA_CLK#[0]

SA_CKE[0]

SA_CLK[1]

SA_CLK#[1]

SA_CKE[1]

RSVD_TP[1]
RSVD_TP[2]
RSVD_TP[3]

RSVD_TP[4]
RSVD_TP[5]
RSVD_TP[6]

SA_CS#[0]

SA_CS#[1]
RSVD_TP[7]
RSVD_TP[8]

SA_ODT[0]

SA_ODT[1]
RSVD_TP[9]

RSVD_TP[10]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]

SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

4

AB6
AA6
V9

AA5
AB5
V10

AB4
AA4
W9

AB3
AA3
W10

AK3
AL3
AG1
AH1

AH3
AG3
AG2
AH2

C4
G6
J3
M6
AL6
AM8
AR12
AM15

D4
F6
K3
N6
AL5
AM9
AR11
AM14

AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15

DDRA_CLK0 10
DDRA_CLK0# 10
DDRA_CKE0 10

DDRA_CLK1 10
DDRA_CLK1# 10
DDRA_CKE1 10

DDRA_CLK2 10
DDRA_CLK2# 10
DDRA_CKE2 10

DDRA_CLK3 10
DDRA_CLK3# 10
DDRA_CKE3 10

DDRA_SCS0# 10
DDRA_SCS1# 10
DDRA_SCS2# 10
DDRA_SCS3# 10

DDRA_ODT0 10
DDRA_ODT1 10
DDRA_ODT2 10
DDRA_ODT3 10

DDR_A_DQS#[0..7] 10

DDR_A_DQS[0..7] 10

DDR_A_MA[0..15] 10

3

DDR_B_D[0..63]11

DDR_B_BS011
DDR_B_BS111
DDR_B_BS211

DDR_B_CAS#11
DDR_B_RAS#11
DDR_B_WE#11

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

2

JCPUD

JCPUD

C9

SB_DQ[0]

A7

SB_DQ[1]

D10

SB_DQ[2]

C8

SB_DQ[3]

A9

SB_DQ[4]

A8

SB_DQ[5]

D9

SB_DQ[6]

D8

SB_DQ[7]

G4

SB_DQ[8]

F4

SB_DQ[9]

F1

SB_DQ[10]

G1

SB_DQ[11]

G5

SB_DQ[12]

F5

SB_DQ[13]

F2

SB_DQ[14]

G2

SB_DQ[15]

J7

SB_DQ[16]

J8

SB_DQ[17]

K10

SB_DQ[18]

K9

SB_DQ[19]

J9

SB_DQ[20]

J10

SB_DQ[21]

K8

SB_DQ[22]

K7

SB_DQ[23]

M5

SB_DQ[24]

N4

SB_DQ[25]

N2

SB_DQ[26]

N1

SB_DQ[27]

M4

SB_DQ[28]

N5

SB_DQ[29]

M2

SB_DQ[30]

M1

SB_DQ[31]

AM5

SB_DQ[32]

AM6

SB_DQ[33]

AR3

SB_DQ[34]

AP3

SB_DQ[35]

AN3

SB_DQ[36]

AN2

SB_DQ[37]

AN1

SB_DQ[38]

AP2

SB_DQ[39]

AP5

SB_DQ[40]

AN9

SB_DQ[41]

AT5

SB_DQ[42]

AT6

SB_DQ[43]

AP6

SB_DQ[44]

AN8

SB_DQ[45]

AR6

SB_DQ[46]

AR5

SB_DQ[47]

AR9

SB_DQ[48]

AJ11

SB_DQ[49]

AT8

SB_DQ[50]

AT9

SB_DQ[51]

AH11

SB_DQ[52]

AR8

SB_DQ[53]

AJ12

SB_DQ[54]

AH12

SB_DQ[55]

AT11

SB_DQ[56]

AN14

SB_DQ[57]

AR14

SB_DQ[58]

AT14

SB_DQ[59]

AT12

SB_DQ[60]

AN15

SB_DQ[61]

AR15

SB_DQ[62]

AT15

SB_DQ[63]

AA9

SB_BS[0]

AA7

SB_BS[1]

R6

SB_BS[2]

AA10

SB_CAS#

AB8

SB_RAS#

AB9

SB_WE#

TYCO_2013620-2_IVY BRIDGE

TYCO_2013620-2_IVY BRIDGE

CONN@

CONN@

1

AE2

SB_CLK[0]

AD2

SB_CLK#[0]

R9

SB_CKE[0]

AE1

SB_CLK[1]

AD1

SB_CLK#[1]

R10

SB_CKE[1]

AB2

RSVD_TP[11]

AA2

RSVD_TP[12]

T9

RSVD_TP[13]

AA1

RSVD_TP[14]

AB1

RSVD_TP[15]

T10

RSVD_TP[16]

AD3

SB_CS#[0]

AE3

SB_CS#[1]

AD6

RSVD_TP[17]

AE6

RSVD_TP[18]

AE4

SB_ODT[0]

AD4

SB_ODT[1]

AD5

RSVD_TP[19]

AE5

RSVD_TP[20]

DDR_B_DQS#0

D7

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]

SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

F3
K6
N3
AN5
AP9
AK12
AP15

C7
G3
J6
M3
AN6
AP8
AK11
AP14

AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4

DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15

DDRB_CLK0 11
DDRB_CLK0# 11
DDRB_CKE0 11

DDRB_CLK1 11
DDRB_CLK1# 11
DDRB_CKE1 11

DDRB_CLK2 11
DDRB_CLK2# 11
DDRB_CKE2 11

DDRB_CLK3 11
DDRB_CLK3# 11
DDRB_CKE3 11

DDRB_SCS0# 11
DDRB_SCS1# 11
DDRB_SCS2# 11
DDRB_SCS3# 11

DDRB_ODT0 11
DDRB_ODT1 11
DDRB_ODT2 11
DDRB_ODT3 11

DDR_B_DQS#[0..7] 11

DDR_B_DQS[0..7] 11

DDR_B_MA[0..15] 11

+1.5V

12

R60

R60
1K_0402_5%

R1720

R1720
0_0402_5%

0_0402_5%

1K_0402_5%

1 2

R61 1K_0402_5%R61 1K_0402_5%

DRAMRST_CNTRL_PCH 9,13,39
EC_DRAMRST_CNTRL_PCH 39

PR05

4

DDR3_DRAMRST# 10,11

Instant ON

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2011/12/31

2009/12/01 2011/12/31

2009/12/01 2011/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

4019G7

4019G7

4019G7

1

of

of

of

659Monday, September 03, 2012

659Monday, September 03, 2012

659Monday, September 03, 2012

B

B

B

Q2

Q2

BSS138_SOT23

BSS138_SOT23

D

S

D

H_DRAMRST#5

A A

H_DRAMRST# DDR3_DRAMRST#_R

12

R62

R62

4.99K_0402_1%

4.99K_0402_1%

sualaptop365.edu.vn

5

S

13

G

G

2

1

2

C42

C42

0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

R63

R63
0_0402_5% @

0_0402_5% @

1 2
1 2

5

4

3

2

1

CFG Straps for Processor

D D

JCPUE

CFG05

+VCC_GFXCORE_AXG

+VCC_CORE

12

R1721

R1721

49.9_0402_1%

49.9_0402_1%

12

R1722

R1722

49.9_0402_1%

49.9_0402_1%
@

@

C C

B B

Please place as close as JCPU

@

@

T23PAD @T23PAD @
T40PAD @T40PAD @
T41PAD @T41PAD @
T42PAD @T42PAD @
T43PAD @T43PAD @
T44PAD @T44PAD @
T21PAD @T21PAD @
T22PAD @T22PAD @

VCC_AXG_VAL_SENSE
VCC_VAL_SENSE

CFG0
CFG2
CFG4

CFG5
CFG6

CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17

VSS_AXG_VAL_SENSE
VSS_VAL_SENSE

JCPUE

AK28

CFG[0]

AK29

CFG[1]

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

VAXG_VAL_SENSE

AH31

VSSAXG_VAL_SENSE

AJ33

VCC_VAL_SENSE

AH33

VSS_VAL_SENSE

AJ26

RSVD5

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

J15

RSVD27

TYCO_2013620-2_IVY BRIDGE

TYCO_2013620-2_IVY BRIDGE

CONN@

CONN@

CFG

CFG

RESERVED

RESERVED

VCC_DIE_SENSE
VSS_DIE_SENSE

RSVD28
RSVD29
RSVD30
RSVD31

RSVD32

RSVD33
RSVD34
RSVD35

RSVD37
RSVD38
RSVD39
RSVD40

RSVD_NCTF1
RSVD_NCTF2
RSVD_NCTF3
RSVD_NCTF4
RSVD_NCTF5

RSVD_NCTF6
RSVD_NCTF7
RSVD_NCTF8
RSVD_NCTF9

RSVD_NCTF10

RSVD51
RSVD52

BCLK_ITP

BCLK_ITP#

RSVD_NCTF11
RSVD_NCTF12
RSVD_NCTF13

AH27
AH26

L7
AG7
AE7
AK2

W8

AT26
AM33
AJ27

T8
J16
H16
G16

AR35
AT34
AT33
AP35
AR34

B34
A33
A34
B35
C35

AJ32
AK32

AN35
AM35

AT2
AT1
AR1

B1

KEY

PEG Static Lane Reversal - CFG2 is for the 16x

Display Port Presence Strap

0922 change R91 BOM structure.
From GE8@ to @.

PCIE Port Bifurcation Straps

CFG[6:5]

CFG2

12

R87

R87
1K_0402_1%

1K_0402_1%

1:(Default) Normal Operation; Lane #

CFG2

definition matches socket pin map definition
0:Lane Reversed

CFG4

12

R88

@R88

@

1K_0402_1%

1K_0402_1%

1 : Disabled; No Physical Display Port

CFG4

attached to Embedded Display Port
0 : Enabled; An external Display Port device is

connected to the Embedded Display Port

CFG6
CFG5

1K_0402_1%

1K_0402_1%

12

12

R92

@R92

R91

R91
@

@

@

1K_0402_1%

1K_0402_1%

11: (Default) x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2

disabled
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

VSS_AXG_VAL_SENSE

VSS_VAL_SENSE

12

12

R1724

R1723

R1723

49.9_0402_1%

A A

49.9_0402_1%
@

@

Please place as close as JCPU1

sualaptop365.edu.vn

5

R1724

49.9_0402_1%

49.9_0402_1%
@

@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

4019G7

4019G7

4019G7

1

B

B

B

of

of

of

759Monday, September 03, 2012

759Monday, September 03, 2012

759Monday, September 03, 2012

5

D D

C C

B B

A A

5

sualaptop365.edu.vn

4

JCPUF

JCPUF

+VCC_CORE

97A

AG35

VCC1

AG34

VCC2

AG33

VCC3

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28

VCC38

AC27

VCC39

AC26

VCC40

AA35

VCC41

AA34

VCC42

AA33

VCC43

AA32

VCC44

AA31

VCC45

AA30

VCC46

AA29

VCC47

AA28

VCC48

AA27

VCC49

AA26

VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

TYCO_2013620-2_IVY BRIDGE

TYCO_2013620-2_IVY BRIDGE

CONN@

CONN@

4

3

POWER

POWER

+VCCP

2

8.5A

AH13

VCCIO1

AH10

VCCIO2

AG10

VCCIO3

AC10

VCCIO4

Y10

VCCIO5

U10

VCCIO6

P10

VCCIO7

L10

VCCIO8

J14

VCCIO9

J13

VCCIO10

J12

VCCIO11

J11

VCCIO12

H14

VCCIO13

H12

VCCIO14

H11

VCCIO15

G14

VCCIO16

G13

VCCIO17

G12

VCCIO18

F14

VCCIO19

F13

VCCIO20

F12

VCCIO21

F11

VCCIO22

E14

VCCIO23

E12

VCCIO24

E11

VCCIO25

D14

VCCIO26

D13

VCCIO27

D12

VCCIO28

D11

VCCIO29

C14

VCCIO30

C13

VCCIO31

PEG AND DDR

PEG AND DDR

CORE SUPPLY

CORE SUPPLY

VCCIO_SENSE

VSS_SENSE_VCCIO

SENSE LINES SVID

SENSE LINES SVID

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

C12

VCCIO32

C11

VCCIO33

B14

VCCIO34

B12

VCCIO35

A14

VCCIO36

A13

VCCIO37

A12

VCCIO38

A11

VCCIO39

J23

VCCIO40

+VCCP

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C1570

C1570

@

@

2

AJ29

VIDALERT#

AJ30

VIDSCLK

AJ28

VIDSOUT

Place the PU
resistors close to CPU

H_CPU_SVIDALRT#
H_CPU_SVIDCLK
VR_SVID_DAT

R67

R67

1 2

VR_SVID_DAT

43_0402_1%

43_0402_1%

R65

R65

130_0402_1%

130_0402_1%

+VCCP

PR05

R72

R72
0_0402_5%

VCC_SENSE
VSS_SENSE

VSSSENSE_R

AJ34

B10
A10

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

VCCSENSE_R

AJ35

0_0402_5%
1 2
1 2

R73

R73

0_0402_5%

0_0402_5%

R1725

R1725
10_0402_1%

10_0402_1%

12

R74

R74
10_0402_1%

10_0402_1%

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

+VCCP

12

H_CPU_SVIDCLK

Place the PU
resistors close to CPU

12

R66

R66
75_0402_5%

75_0402_5%

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C1571

C1571

12

@

@

2

Close to CPU

VCCIO_SENSE 46

2

1

PR05

R68

R68
0_0402_5%

0_0402_5%

1 2

+VCC_CORE

12

R70

R70
100_0402_1%

100_0402_1%

12

R71

R71
100_0402_1%

100_0402_1%

Title

Title

Title

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

4019G7

4019G7

4019G7

Date: Sheet

Date: Sheet

Date: Sheet

VR_SVID_CLK 49

VR_SVID_ALRT# 49

VR_SVID_DAT 49

VCCSENSE 49
VSSSENSE 49

Compal Electronics, Inc.

1

B

B

859Monday, September 03, 2012

859Monday, September 03, 2012

859Monday, September 03, 2012

B

of

of

of

5

4

3

2

1

12

R83

D D

PR05

R84

R84

+VCC_GFXCORE_AXG

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C82

C82

2

13

D

D

BSS138_SOT23

BSS138_SOT23
2

G

G

S

S

R1733

R1733

1K_0402_1%

1K_0402_1%

1 2
0_0402_5%

0_0402_5%

33A

330U_D2_2VM_R6M

330U_D2_2VM_R6M

1

C79

C79

+

+

2 3

Q39

Q39

12

@

@

AT24
AT23
AT21
AT20
AT18
AT17
AR24
AR23
AR21
AR20
AR18
AR17
AP24
AP23
AP21
AP20
AP18
AP17
AN24
AN23
AN21
AN20
AN18

AN17
AM24
AM23
AM21
AM20
AM18
AM17

AL24

AL23

AL21

AL20

AL18

AL17

AK24

AK23

AK21

AK20

AK18

AK17

AJ24

AJ23

AJ21

AJ20

AJ18

AJ17

AH24

AH23

AH21

AH20

AH18

AH17

1.5A

12

R1734

R1734
1K_0402_1%

1K_0402_1%
@

@

B6
A6
A2

CPU1.5V_S3_GATE39

C C

B B

+1.8VS

A A

DRAMRST_CNTRL_PCH

1 2

+V_DDR_REFA

+V_DDR_REFB

R280

R280

0_0805_5%

0_0805_5%

PR05

10U_0805_6.3VAM

10U_0805_6.3VAM

1

2

R1731 0_0402_5%@R1731 0_0402_5%@
R1732 0_0402_5%@R1732 0_0402_5%@

2

G

G

+1.8VS_CPU_VCCPLL

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C80

C80

2

1 2
1 2

13

D

D

Q40

Q40

BSS138_SOT23

BSS138_SOT23

S

S

C81

C81

R83
100K_0402_5%

100K_0402_5%

RUN_ON_CPU1.5VS3#

61

Q35A

Q35A

2

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

POWER

JCPUG

JCPUG

VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VAXG38
VAXG39
VAXG40
VAXG41
VAXG42
VAXG43
VAXG44
VAXG45
VAXG46
VAXG47
VAXG48
VAXG49
VAXG50
VAXG51
VAXG52
VAXG53
VAXG54

VCCPLL1
VCCPLL2
VCCPLL3

TYCO_2013620-2_IVY BRIDGE

TYCO_2013620-2_IVY BRIDGE

CONN@

CONN@

DRAMRST_CNTRL_PCH 6,13,39

+V_DDR_REFA_R
+V_DDR_REFB_R

POWER

GRAPHICS

GRAPHICS

1.8V RAIL

1.8V RAIL

VAXG_SENSE

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

SA_DIMM_VREFDQ
SB_DIMM_VREFDQ

VREFMISC

VREFMISC

DDR3 -1.5V RAILS

DDR3 -1.5V RAILS

SA RAIL

SA RAIL

VCCSA_SENSE

VCCSA_VID[0]
VCCSA_VID[1]

SM_VREF

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15

VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8

VCCIO_SEL

+5VALW+5VALW

R81

R81

36.5K_0402_1%

36.5K_0402_1%

1 2
34

Q35B

Q35B

5

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

RUN_ON_CPU1.5VS3# 41

Intel check list V1.0

AK35
AK34

+V_SM_VREF_CNT

AL1

+V_DDR_REFA_R

B4

+V_DDR_REFB_R

D1

+1.5V_CPU_VDDQ

AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1

6A

M27
M26
L26
J26
J25
J24
H26
H25

H23

C22
C24

A19

M3 Circuit (Processor Generated SO-DIMM VREF_DQ)

sualaptop365.edu.vn

5

4

+1.5V_CPU_VDDQ

Q4

+1.5V +1.5V_CPU_VDDQ

RUN_ON_CPU1.5VS3

+VCC_GFXCORE_AXG

12

+1.5V_CPU_VDDQ

1

t1

2

AO4304L_SO8

AO4304L_SO8

8
7
6
5

R131

R131
100_0402_1%

100_0402_1%

R129

R129

100_0402_1%

100_0402_1%

12

R75

R75
1K_0402_1%

1K_0402_1%

0.1U_0402_16V4Z

0.1U_0402_16V4Z
12

R77

R77

C236

C236

1K_0402_1%

1K_0402_1%

Q4

4

C86

C86
2200P_0402_50V7K

2200P_0402_50V7K

1 2

12

RUN_ON_CPU1.5VS3

5A

10U_0805_6.3VAM

10U_0805_6.3VAM

10U_0805_6.3VAM

10U_0805_6.3VAM

10U_0805_6.3VAM

10U_0805_6.3VAM

1

1

1

2

H_VCCSA_VID0 48
H_VCCSA_VID1 48

VCCIO_SEL

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C66

C66

2

10U_0805_6.3VAM

10U_0805_6.3VAM

1

C74

C74

2

10K_0402_5% @

10K_0402_5% @

3

C67

C67

2

10U_0805_6.3VAM

10U_0805_6.3VAM

1

C75

C75

2

12

@ R80

@

R1729

R1729

C68

C68

0_0402_5%

0_0402_5%

5A

1
2

12

3

1

2

R1726

R1726

C1572

C1572

20K_0402_5%

20K_0402_5%

10U_0805_10V4Z~D

10U_0805_10V4Z~D

Place near CPU

VCC_AXG_SENSE 49
VSS_AXG_SENSE 49

12
R760_0402_5% @R760_0402_5% @

Q3

Q3

@

@

D

S

D

S

13

G

G

PMV45EN_SOT23-3

PMV45EN_SOT23-3

2

10U_0805_6.3VAM

10U_0805_6.3VAM

10U_0805_6.3VAM

10U_0805_6.3VAM

10U_0805_6.3VAM

10U_0805_6.3VAM

1

1

1

1

+

+

C71

C71

C69

C69

C70

C70

2

2

10U_0805_6.3VAM

10U_0805_6.3VAM

1

1

C76

C76

2

2

+VCCSA_SENSE 48

R80

+3VS

1 2

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2

10U_0603_6.3V6M

10U_0603_6.3V6M

1

@

@

+

+

C1692

C1692

2 3

2 3

330U_D2_2VM_R6M

330U_D2_2VM_R6M

C78

C78

Compal Secret Data

Compal Secret Data

Compal Secret Data

+V_SM_VREF

330U_D2_2VM_R6M

330U_D2_2VM_R6M

C72

C72

+VCCSA

Deciphered Date

Deciphered Date

Deciphered Date

+V_SM_VREF should
have 10 mil trace width

+1.5V

12

@

@

12

2

R1727

R1727
1K_0402_1%

1K_0402_1%

R1728

R1728
1K_0402_1%@

1K_0402_1%@

JCPUH

JCPUH

AT35

VSS1

AT32

VSS2

AT29

VSS3

AT27

VSS4

AT25

VSS5

AT22

VSS6

AT19

VSS7

AT16

VSS8

AT13

VSS9

AT10

VSS10

AT7

VSS11

AT4

VSS12

AT3

VSS13

AR25

VSS14

AR22

VSS15

AR19

VSS16

AR16

VSS17

AR13

VSS18

AR10

VSS19

AR7

VSS20

AR4

VSS21

AR2

VSS22

AP34

VSS23

AP31

VSS24

AP28

VSS25

AP25

VSS26

AP22

VSS27

AP19

VSS28

AP16

VSS29

AP13

VSS30

AP10

VSS31

AP7

VSS32

AP4

VSS33

AP1

VSS34

AN30

VSS35

AN27

VSS36

AN25

VSS37

AN22

VSS38

AN19

VSS39

AN16

VSS40

AN13

VSS41

AN10

VSS42

AN7

VSS43

AN4

VSS44

AM29

VSS45

AM25

VSS46

AM22

VSS47

AM19

VSS48

AM16

VSS49

AM13

VSS50

AM10

VSS51

AM7

VSS52

AM4

VSS53

AM3

VSS54

AM2

VSS55

AM1

VSS56

AL34

VSS57

AL31

VSS58

AL28

VSS59

AL25

VSS60

AL22

VSS61

AL19

VSS62

AL16

VSS63

AL13

VSS64

AL10

VSS65

AL7

VSS66

AL4

VSS67

AL2

VSS68

AK33

VSS69

AK30

VSS70

AK27

VSS71

AK25

VSS72

AK22

VSS73

AK19

VSS74

AK16

VSS75

AK13

VSS76

AK10

VSS77

AK7

VSS78

AK4

VSS79

AJ25

VSS80

TYCO_2013620-2_IVY BRIDGE

TYCO_2013620-2_IVY BRIDGE

CONN@

CONN@

Title

Title

Title

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

4019G7

4019G7

4019G7

Date: Sheet

Date: Sheet

Date: Sheet

VSS

VSS

+1.5V_CPU_VDDQ +1.5V

CC15 0.1U_0402_16V7KCC15 0.1U_0402_16V7K

12

CC16 0.1U_0402_16V7KCC16 0.1U_0402_16V7K

12

CC17 0.1U_0402_16V7KCC17 0.1U_0402_16V7K

12

CC18 0.1U_0402_16V7KCC18 0.1U_0402_16V7K

12

Compal Electronics, Inc.

1

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

959Monday, September 03, 2012

959Monday, September 03, 2012

959Monday, September 03, 2012

AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2

B

B

B

of

of

of

5

+1.5V

1K_0402_1%

1K_0402_1%

12

R94

R94

+V_DDR_REFA

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

0.1U_0402_10V6K

0.1U_0402_10V6K
C121

C121

C127

1K_0402_1%

1K_0402_1%

D D

C127

1

1

12

R95

R95

2

2

DDRA_CKE06

C C

B B

Layout Note:
Place near
JDIMMA1.203,204

+0.75VS

A A

DDR_A_BS26

DDRA_CLK06
DDRA_CLK0#6

DDR_A_BS06
DDR_A_WE#6

DDR_A_CAS#6

DDRA_SCS1#6

C135

1U_0402_6.3V6K

C135

1U_0402_6.3V6K

C136

1U_0402_6.3V6K

C136

1U_0402_6.3V6K

1

1

2

2

+3VS

1

2

+V_DDR_REFA
DDR_A_D0

DDR_A_D1

DDR_A_D2
DDR_A_D3

DDR_A_D8
DDR_A_D9

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_D10
DDR_A_D11

DDR_A_D16
DDR_A_D17

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D18
DDR_A_D19

DDR_A_D24
DDR_A_D25

DDR_A_D26
DDR_A_D27

DDRA_CKE0

DDR_A_BS2
DDR_A_MA12

DDR_A_MA9
DDR_A_MA8

DDR_A_MA5
DDR_A_MA3

DDR_A_MA1
DDRA_CLK0

DDRA_CLK0#
DDR_A_MA10

DDR_A_BS0
DDR_A_WE#

DDR_A_CAS# DDRA_ODT0
DDR_A_MA13

DDRA_SCS1#

DDR_A_D32
DDR_A_D33

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D34
DDR_A_D35

DDR_A_D40
DDR_A_D41

DDR_A_D42
DDR_A_D43

DDR_A_D48
DDR_A_D49

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D51

DDR_A_D56
DDR_A_D57

DDR_A_D58
DDR_A_D59

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

0.1U_0402_10V6K

0.1U_0402_10V6K

C143

C143

C144

C144

1

2

5

sualaptop365.edu.vn

+1.5V +1.5V

R99

10K_0402_5%

R99

10K_0402_5%

R100

10K_0402_5%

R100

10K_0402_5%

12

12

3A@1.5V

JDDR1

JDDR1

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1
DQS129RESET#
VSS1131VSS12

33

DQ10

35

DQ11
VSS1337VSS14

39

DQ16

41

DQ17
VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25
VSS2261DQS#3

63

DM3
VSS2365VSS24

67

DQ26

69

DQ27
VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

TYCO_2-2013289-1

TYCO_2-2013289-1
@

@

Standard:5.2mm
<Address: SA1:SA0=00>
BOT

DQ4
DQ5

VSS3

DQS#0

DQS0

VSS6

DQ6
DQ7

VSS8
DQ12
DQ13

VSS10

DM1

DQ14
DQ15

DQ20
DQ21

DM2

VSS17

DQ22
DQ23

VSS19

DQ28
DQ29

VSS21

DQS3
DQ30

DQ31

CKE1
VDD2

VDD4

VDD6

VDD8

VDD10

CK1

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36
DQ37

VSS30

DM4

VSS31

DQ38
DQ39

VSS33

DQ44
DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46
DQ47

VSS40

DQ52
DQ53

VSS42

DM6

VSS43

DQ54
DQ55

VSS45

DQ60
DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62
DQ63

VSS52

EVENT#

SDA
SCL

VTT2

4

Support SO DIMM X 4

2

DDR_A_D4

4

DDR_A_D5

6
8

DDR_A_DQS#0

10

DDR_A_DQS0

12
14

DDR_A_D6

16

DDR_A_D7

18
20

DDR_A_D12

22

DDR_A_D13

24
26
28

DDR3_DRAMRST#

30
32

DDR_A_D14

34

DDR_A_D15

36
38

DDR_A_D20

40

DDR_A_D21

42
44
46
48

DDR_A_D22

50

DDR_A_D23

52
54

DDR_A_D28

56

DDR_A_D29

58
60

DDR_A_DQS#3

62

DDR_A_DQS3

64
66

DDR_A_D30

68

DDR_A_D31

70
72

DDRA_CKE1

74
76

DDR_A_MA15

78

A15
A14

A11

A7
A6

A4
A2

A0

BA1

S0#

G2

DDR_A_MA14

80
82

DDR_A_MA11

84

DDR_A_MA7

86
88

DDR_A_MA6

90

DDR_A_MA4

92
94

DDR_A_MA2

96

DDR_A_MA0

98
100

DDRA_CLK1

102

DDRA_CLK1#

104
106

DDR_A_BS1

108

DDR_A_RAS#

110
112

DDRA_SCS0#

114
116
118

DDRA_ODT1

120
122
124

+VREF_CA

126
128

DDR_A_D36

130

DDR_A_D37

132
134
136
138

DDR_A_D38

140

DDR_A_D39

142
144

DDR_A_D44

146

DDR_A_D45

148
150

DDR_A_DQS#5

152

DDR_A_DQS5

154
156

DDR_A_D46

158

DDR_A_D47

160
162

DDR_A_D52

164

DDR_A_D53

166
168
170
172

DDR_A_D54

174

DDR_A_D55

176
178

DDR_A_D60

180

DDR_A_D61

182
184

DDR_A_DQS#7

186

DDR_A_DQS7

188
190

DDR_A_D62

192

DDR_A_D63

194
196
198

PCH_SMBDATA

200

PCH_SMBCLK

202
204

206

4

+0.75VS

0.65A@0.75V

Support 1066/1333MHz

DDR_A_D[0..63]6
DDR_A_DQS[0..7]6
DDR_A_DQS#[0..7]6
DDR_A_MA[0..15]6

DDR3_DRAMRST# 6,11

Layout Note:
Place near JDIMMA

+1.5V

330U_B2_2.5VM_R15M

330U_B2_2.5VM_R15M

10U_0603_6.3V6M

10U_0603_6.3V6M

C128

C128

C122

C122

1

1

+

+

2

2

DDRA_CKE1 6

DDRA_CLK1 6
DDRA_CLK1# 6

DDR_A_BS1 6
DDR_A_RAS# 6

DDRA_SCS0# 6
DDRA_ODT0 6

DDRA_ODT1 6

0.1U_0402_10V6K

0.1U_0402_10V6K

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

C131

C131

C132

1

2

PCH_SMBDATA 11,13,38,40
PCH_SMBCLK 11,13,38,40

C132

1

2

Layout Note: Place these 4 Caps near
Command and Control signals of JDIMMA

+1.5V

3

+V_DDR_REFA
DDR_A_D0

DDR_A_D1

DDR_A_D2
DDR_A_D3

DDR_A_D8
DDR_A_D9

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_D10
DDR_A_D11

DDR_A_D16
DDR_A_D17

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

C123

C123

C129

C129

1

1

2

2

+1.5V

12

R96

R96
1K_0402_1%

1K_0402_1%

12

R97

R97
1K_0402_1%

1K_0402_1%

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

C137

C137

C138

1

2

Issued Date

Issued Date

Issued Date

C138

3

1

2

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C124

C124

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

1

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

2

10U_0603_6.3V6M

10U_0603_6.3V6M

C130

47P_0402_50V8J

C130

C125

C125

C139

C139

1

2

1

2

47P_0402_50V8J

C126

C126

1

12

2

DDRA_CKE26

DDRA_CLK26
DDRA_CLK2#6

DDRA_SCS3#6

0.1U_0402_10V6K

0.1U_0402_10V6K
C140

C140

+3VS

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M
1

C145

C145

2

2010/12/03 2011/12/03

2010/12/03 2011/12/03

2010/12/03 2011/12/03

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D18
DDR_A_D19

DDR_A_D24
DDR_A_D25

DDR_A_D26
DDR_A_D27

DDRA_CKE2

DDR_A_BS2
DDR_A_MA12

DDR_A_MA9
DDR_A_MA8

DDR_A_MA5
DDR_A_MA3

DDR_A_MA1
DDRA_CLK2

DDRA_CLK2#
DDR_A_MA10

DDR_A_BS0
DDR_A_WE#

DDR_A_CAS# DDRA_ODT2
DDR_A_MA13

DDRA_SCS3#

DDR_A_D32
DDR_A_D33

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D34
DDR_A_D35

DDR_A_D40
DDR_A_D41

DDR_A_D42
DDR_A_D43

DDR_A_D48
DDR_A_D49

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D51

DDR_A_D56
DDR_A_D57

DDR_A_D58
DDR_A_D59

1 2

0.1U_0402_10V6K

0.1U_0402_10V6K
1

C146

C146

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

+1.5V +1.5V

R9810K_0402_5% R9810K_0402_5%

R101

10K_0402_5%

R101

10K_0402_5%

12

3
5
7

9
11
13
15
17
19
21
23
25
27

33
35

39
41

45
47
49
51
53
55
57
59

63
67

69

73
75
77
79
81
83
85
87
89
91
93
95
97
99

101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203

205

2

3A@1.5V

JDDR2

JDDR2

VREF_DQ1VSS1
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS129RESET#
VSS1131VSS12
DQ10
DQ11
VSS1337VSS14
DQ16
DQ17
VSS1543VSS16
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS2261DQS#3
DM3
VSS2365VSS24
DQ26
DQ27
VSS2571VSS26

CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1

G1

TYCO_2-2013287-1

TYCO_2-2013287-1
@

@

DQ4
DQ5

VSS3

DQS#0

DQS0

VSS6

DQ6

DQ7
VSS8
DQ12
DQ13

VSS10

DM1

DQ14
DQ15

DQ20
DQ21

DM2

VSS17

DQ22
DQ23

VSS19

DQ28
DQ29

VSS21

DQS3

DQ30
DQ31

CKE1
VDD2

VDD4

VDD6

VDD8

VDD10

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36
DQ37

VSS30

DM4

VSS31

DQ38
DQ39

VSS33

DQ44
DQ45

VSS35
DQS#5

DQS5

VSS38

DQ46
DQ47

VSS40

DQ52
DQ53

VSS42

DM6

VSS43

DQ54
DQ55

VSS45

DQ60
DQ61

VSS47
DQS#7

DQS7

VSS50

DQ62
DQ63

VSS52

EVENT#

SDA
VTT2

1

+1.5V

2

DDR_A_D4

4

DDR_A_D5

6
8

DDR_A_DQS#0

10

DDR_A_DQS0

12
14

DDR_A_D6

16

DDR_A_D7

18
20

DDR_A_D12

22

DDR_A_D13

24
26
28

DDR3_DRAMRST#

30
32

DDR_A_D14

34

DDR_A_D15

36
38

DDR_A_D20

40

DDR_A_D21

42
44
46
48

DDR_A_D22

50

DDR_A_D23

52
54

DDR_A_D28

56

DDR_A_D29

58
60

DDR_A_DQS#3

62

DDR_A_DQS3

64
66

DDR_A_D30

68

DDR_A_D31

70
72

DDRA_CKE3

74
76

DDR_A_MA15

78

A15
A14

A11

A7
A6

A4
A2

A0

CK1

BA1

S0#

SCL

G2

DDR_A_MA14

80
82

DDR_A_MA11

84

DDR_A_MA7

86
88

DDR_A_MA6

90

DDR_A_MA4

92
94

DDR_A_MA2

96

DDR_A_MA0

98
100

DDRA_CLK3

102

DDRA_CLK3#

104
106

DDR_A_BS1

108

DDR_A_RAS#

110
112

DDRA_SCS2#

114
116
118

DDRA_ODT3

120
122
124
126
128

DDR_A_D36

130

DDR_A_D37

132
134
136
138

DDR_A_D38

140

DDR_A_D39

142
144

DDR_A_D44

146

DDR_A_D45

148
150

DDR_A_DQS#5

152

DDR_A_DQS5

154
156

DDR_A_D46

158

DDR_A_D47

160
162

DDR_A_D52

164

DDR_A_D53

166
168
170
172

DDR_A_D54

174

DDR_A_D55

176
178

DDR_A_D60

180

DDR_A_D61

182
184

DDR_A_DQS#7

186

DDR_A_DQS7

188
190

DDR_A_D62

192

DDR_A_D63

194
196
198

PCH_SMBDATA

200

PCH_SMBCLK

202
204

206

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

+0.75VS

0.65A@0.75V

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

SCHEMATIC MB A7441

SCHEMATIC MB A7441

SCHEMATIC MB A7441

4019G7

4019G7

4019G7

0.1U_0402_10V6K

0.1U_0402_10V6K
C202

C202

1

1

2

2

DDRA_CKE3 6

DDRA_CLK3 6
DDRA_CLK3# 6

DDRA_SCS2# 6
DDRA_ODT2 6

DDRA_ODT3 6

0.1U_0402_10V6K

0.1U_0402_10V6K
C133

C133

1

2

Layout Note:
Place near
JDIMMA2.203,204

+0.75VS

Reverse:4mm
<Address: SA1:SA0=01>
TOP

1

0.1U_0402_10V6K

0.1U_0402_10V6K
C208

C208

1

2

For EMI

+VREF_CA

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

C134

C134

1

2

C141

1U_0402_6.3V6K

C141

1U_0402_6.3V6K

1

2

10 59Monday, September 03, 2012

10 59Monday, September 03, 2012

10 59Monday, September 03, 2012

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

C216

C216

C218

C218

1

2

C142

1U_0402_6.3V6K

C142

1U_0402_6.3V6K

1

2

B

B

B

of

of

of

5

+1.5V

1K_0402_1%

1K_0402_1%

12

R102

R102

+V_DDR_REFB

0.1U_0402_10V6K

0.1U_0402_10V6K

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

C147

C147

C148

1K_0402_1%

1K_0402_1%

1

12

R103

D D

R103

2

C148

1

2

C C

B B

Layout Note:
Place near
JDIMMB1.203,204

+0.75VS

A A

DDRB_CKE06

DDR_B_BS26

DDRB_CLK06
DDRB_CLK0#6

DDR_B_BS06
DDR_B_WE#6

DDR_B_CAS#6

DDRB_SCS1#6

C162

1U_0402_6.3V6K

C162

1U_0402_6.3V6K

C161

1U_0402_6.3V6K

C161

1U_0402_6.3V6K

1

1

2

2

+3VS

C171

2.2U_0402_6.3V6M

C171

2.2U_0402_6.3V6M

1

2

+V_DDR_REFB
DDR_B_D0

DDR_B_D1

DDR_B_D2
DDR_B_D3

DDR_B_D8
DDR_B_D9

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_D10
DDR_B_D11

DDR_B_D16
DDR_B_D17

DDR_B_DQS#2
DDR_B_DQS2

DDR_B_D18
DDR_B_D19

DDR_B_D24
DDR_B_D25

DDR_B_D26
DDR_B_D27

DDRB_CKE0

DDR_B_BS2
DDR_B_MA12

DDR_B_MA9
DDR_B_MA8

DDR_B_MA5
DDR_B_MA3

DDR_B_MA1
DDRB_CLK0

DDRB_CLK0#
DDR_B_MA10

DDR_B_BS0
DDR_B_WE#

DDR_B_CAS# DDRB_ODT0
DDR_B_MA13

DDRB_SCS1#

DDR_B_D32
DDR_B_D33

DDR_B_DQS#4
DDR_B_DQS4

DDR_B_D34
DDR_B_D35

DDR_B_D40
DDR_B_D41

DDR_B_D42
DDR_B_D43

DDR_B_D48
DDR_B_D49

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D50
DDR_B_D51

DDR_B_D56
DDR_B_D57

DDR_B_D58
DDR_B_D59

R107

R107

1 2

10K_0402_5%

10K_0402_5%

C172

0.1U_0402_10V6K

C172

0.1U_0402_10V6K

1

R109 10K_0402_5%R109 10K_0402_5%

2

5

sualaptop365.edu.vn

+1.5V +1.5V

3A@1.5V

JDDR3

JDDR3

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1
DQS129RESET#

31

VSS11

33

DQ10

35

DQ11

37

VSS13

39

DQ16

41

DQ17

43

VSS15

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25
VSS2261DQS#3

63

DM3

65

VSS23

67

DQ26

69

DQ27

71

VSS25

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

1 2

203

VTT1

205

G1

TYCO_2-2013310-1

TYCO_2-2013310-1
@

@

Standard:9.2mm
<Address: SA1:SA0=10>
BOT

DQ4
DQ5

VSS3

DQS#0

DQS0

VSS6

DQ6
DQ7

VSS8
DQ12
DQ13

VSS10

DM1

VSS12

DQ14
DQ15

VSS14

DQ20
DQ21

VSS16

DM2

VSS17

DQ22
DQ23

VSS19

DQ28
DQ29

VSS21

DQS3

VSS24

DQ30
DQ31

VSS26

CKE1
VDD2

VDD4

VDD6

VDD8

VDD10

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36
DQ37

VSS30

DM4

VSS31

DQ38
DQ39

VSS33

DQ44
DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46
DQ47

VSS40

DQ52
DQ53

VSS42

DM6

VSS43

DQ54
DQ55

VSS45

DQ60
DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62
DQ63

VSS52

EVENT#

SDA

VTT2

A15
A14

A11

CK1

BA1

S0#

NC2

SCL

A7
A6

A4
A2

A0

G2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206

4

DDR_B_D4
DDR_B_D5

DDR_B_DQS#0
DDR_B_DQS0

DDR_B_D6
DDR_B_D7

DDR_B_D12
DDR_B_D13

DDR3_DRAMRST#
DDR_B_D14

DDR_B_D15
DDR_B_D20

DDR_B_D21

DDR_B_D22
DDR_B_D23

DDR_B_D28
DDR_B_D29

DDR_B_DQS#3
DDR_B_DQS3

DDR_B_D30
DDR_B_D31

DDRB_CKE1
DDR_B_MA15

DDR_B_MA14
DDR_B_MA11

DDR_B_MA7
DDR_B_MA6

DDR_B_MA4
DDR_B_MA2

DDR_B_MA0
DDRB_CLK1

DDRB_CLK1#
DDR_B_BS1

DDR_B_RAS#
DDRB_SCS0#

DDRB_ODT1

+VREF_CB
DDR_B_D36

DDR_B_D37

DDR_B_D38
DDR_B_D39

DDR_B_D44
DDR_B_D45

DDR_B_DQS#5
DDR_B_DQS5

DDR_B_D46
DDR_B_D47

DDR_B_D52
DDR_B_D53

DDR_B_D54
DDR_B_D55

DDR_B_D60
DDR_B_D61

DDR_B_DQS#7
DDR_B_DQS7

DDR_B_D62
DDR_B_D63

PCH_SMBDATA
PCH_SMBCLK

4

0.65A@0.75V

DDR_B_DQS#[0..7]6
DDR_B_D[0..63]6
DDR_B_DQS[0..7]6
DDR_B_MA[0..15]6

DDR3_DRAMRST# 6,10

+1.5V

330U_B2_2.5VM_R15M

330U_B2_2.5VM_R15M

C149

C149

1

+

+

2

DDRB_CKE1 6

DDRB_CLK1 6
DDRB_CLK1# 6

DDR_B_BS1 6
DDR_B_RAS# 6

DDRB_SCS0# 6
DDRB_ODT0 6

DDRB_ODT1 6

0.1U_0402_10V6K

0.1U_0402_10V6K
C157

C157

1

2

PCH_SMBDATA 10,13,38,40
PCH_SMBCLK 10,13,38,40
+0.75VS

3

Layout Note:
Place near JDIMMB

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

C150

C150

1

2

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M
C158

C158

1

2

Layout Note: Place these 4 Caps near
Command and Control signals of JDIMMB

+1.5V

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

C153

C153

10U_0603_6.3V6M

C154

C154

1

1

2

2

0.1U_0402_10V6K

0.1U_0402_10V6K
C165

C165

1

1

2

2

3

10U_0603_6.3V6M

10U_0603_6.3V6M

C152

C152

C151

C151

1

1

2

2

+1.5V

12

R104

R104
1K_0402_1%

1K_0402_1%

12

R105

R105
1K_0402_1%

1K_0402_1%

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K
C164

C164

C163

C163

1

1

2

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+1.5V +1.5V

+V_DDR_REFB
DDR_B_D0

DDR_B_D1

DDR_B_D2
DDR_B_D3

DDR_B_D8
DDR_B_D9

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_D10
DDR_B_D11

DDR_B_D16
DDR_B_D17

DDR_B_DQS#2
DDR_B_DQS2

10U_0603_6.3V6M

10U_0603_6.3V6M

C156

47P_0402_50V8J

C156

47P_0402_50V8J

C155

C155

1

12

2

DDRB_CKE26

DDRB_CLK26
DDRB_CLK2#6

DDRB_SCS3#6

0.1U_0402_10V6K

0.1U_0402_10V6K
C166

C166

+3VS

C169

2.2U_0402_6.3V6M

C169

2.2U_0402_6.3V6M

1

2

2010/12/03 2011/12/03

2010/12/03 2011/12/03

2010/12/03 2011/12/03

DDR_B_D18
DDR_B_D19

DDR_B_D24
DDR_B_D25

DDR_B_D26
DDR_B_D27

DDRB_CKE2

DDR_B_BS2
DDR_B_MA12

DDR_B_MA9
DDR_B_MA8

DDR_B_MA5
DDR_B_MA3

DDR_B_MA1
DDRB_CLK2

DDRB_CLK2#
DDR_B_MA10

DDR_B_BS0
DDR_B_WE#

DDR_B_CAS# DDRB_ODT2
DDR_B_MA13

DDRB_SCS3#

DDR_B_D32
DDR_B_D33

DDR_B_DQS#4
DDR_B_DQS4

DDR_B_D34
DDR_B_D35

DDR_B_D40
DDR_B_D41

DDR_B_D42
DDR_B_D43

DDR_B_D48
DDR_B_D49

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D50
DDR_B_D51

DDR_B_D56
DDR_B_D57

DDR_B_D58
DDR_B_D59

R10610K_0402_5% R10610K_0402_5%

1 2

1 2

C170

0.1U_0402_10V6K

C170

0.1U_0402_10V6K
R108 10K_0402_5%R108 10K_0402_5%

1

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

11
13
15
17
19
21
23
25
27

31
33
35
37
39
41
43
45
47
49
51
53
55
57
59

63
65
67
69
71

73
75
77
79
81
83
85
87
89
91
93
95
97

99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203

205

2

3A@1.5V

JDDR4

JDDR4

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS129RESET#
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS2261DQS#3
DM3
VSS23
DQ26
DQ27
VSS25

CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1

G1

TYCO 2-1932323-1

TYCO 2-1932323-1
@

@

2

VSS3

DQS#0

DQS0

VSS6

VSS8
DQ12
DQ13

VSS10

DM1

VSS12

DQ14
DQ15

VSS14

DQ20
DQ21

VSS16

DM2

VSS17

DQ22
DQ23

VSS19

DQ28
DQ29

VSS21

DQS3

VSS24

DQ30
DQ31

VSS26

CKE1
VDD2

VDD4

VDD6

VDD8

VDD10

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36
DQ37

VSS30

DM4

VSS31

DQ38
DQ39

VSS33

DQ44
DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46
DQ47

VSS40

DQ52
DQ53

VSS42

DM6

VSS43

DQ54
DQ55

VSS45

DQ60
DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62
DQ63

VSS52

EVENT#

VTT2

DQ4
DQ5

DQ6
DQ7

CK1

BA1

NC2

SDA
SCL

1

2

DDR_B_D4

4

DDR_B_D5

6
8

DDR_B_DQS#0

10

DDR_B_DQS0

12
14

DDR_B_D6

16

DDR_B_D7

18
20

DDR_B_D12

22

DDR_B_D13

24
26
28

DDR3_DRAMRST#

30
32

DDR_B_D14

34

DDR_B_D15

36
38

DDR_B_D20

40

DDR_B_D21

42
44
46
48

DDR_B_D22

50

DDR_B_D23

52
54

DDR_B_D28

56

DDR_B_D29

58
60

DDR_B_DQS#3

62

DDR_B_DQS3

64
66

DDR_B_D30

68

DDR_B_D31

70
72

DDRB_CKE3

74
76

DDR_B_MA15

78

A15
A14

A11

A7
A6

A4
A2

A0

S0#

G2

DDR_B_MA14

80
82

DDR_B_MA11

84

DDR_B_MA7

86
88

DDR_B_MA6

90

DDR_B_MA4

92
94

DDR_B_MA2

96

DDR_B_MA0

98
100

DDRB_CLK3

102

DDRB_CLK3#

104
106

DDR_B_BS1

108

DDR_B_RAS#

110
112

DDRB_SCS2#

114
116
118

DDRB_ODT3

120
122
124

+VREF_CB

126
128

DDR_B_D36

130

DDR_B_D37

132
134
136
138

DDR_B_D38

140

DDR_B_D39

142
144

DDR_B_D44

146

DDR_B_D45

148
150

DDR_B_DQS#5

152

DDR_B_DQS5

154
156

DDR_B_D46

158

DDR_B_D47

160
162

DDR_B_D52

164

DDR_B_D53

166
168
170
172

DDR_B_D54

174

DDR_B_D55

176
178

DDR_B_D60

180

DDR_B_D61

182
184

DDR_B_DQS#7

186

DDR_B_DQS7

188
190

DDR_B_D62

192

DDR_B_D63

194
196
198

PCH_SMBDATA

200

PCH_SMBCLK

202
204

206

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

DDRB_CKE3 6

DDRB_CLK3 6
DDRB_CLK3# 6

DDRB_SCS2# 6
DDRB_ODT2 6

DDRB_ODT3 6

0.1U_0402_10V6K

0.1U_0402_10V6K
C159

C159

1

2

Layout Note:
Place near
JDIMMB2.203,204

+0.75VS

+0.75VS

0.65A@0.75V

4019G7

4019G7

4019G7

Reverse:8mm
<Address: SA1:SA0=11>
TOP

SCHEMATIC MB A7441

SCHEMATIC MB A7441

SCHEMATIC MB A7441

1

1

2

1

2

+VREF_CB

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M
C160

C160

C167

1U_0402_6.3V6K

C167

1U_0402_6.3V6K

11 59Monday, September 03, 2012

11 59Monday, September 03, 2012

11 59Monday, September 03, 2012

C168

1U_0402_6.3V6K

C168

1U_0402_6.3V6K

1

2

B

B

B

of

of

of

5

PCH_RTCX1

1 2

R170 10M_0402_5%R170 10M_0402_5%

Y1

Y1

1 2

32.768KHZ_12.5PF_9H03200019

32.768KHZ_12.5PF_9H03200019

1

C204

C204
15P_0402_50V8J

15P_0402_50V8J

2

D D

HDA_SDO39

HDA for AUDIO

HDA_BITCLK_AUDIO33

C C

HDA_RST_AUDIO#33

HDA_SDOUT_AUDIO33

+3V_PCH +3V_PCH+3V_PCH

12

R199

R199

@

@

200_0402_5%

200_0402_5%

PCH_JTAG_TDO PCH_JTAG_TDIPCH_JTAG_TMS

12

R202

R202

100_0402_1%

100_0402_1%

R205

R205

B B

HDA_SYNC_AUDIO33

22P_0402_50V8J

22P_0402_50V8J

Reserve for EMI please close to UH5

A A

10P_0402_50V8J

10P_0402_50V8J

Reserve for EMI please close to UH6

PCH_RTCX2

1

C207

C207
18P_0402_50V8J

18P_0402_50V8J

2

+RTCVCC

R175 1M_0402_5%R175 1M_0402_5%

1 2

SM_INTRUDER#

CLRP1 & CLRP2 place near DIMM

+RTCVCC

1U_0603_10V4Z

1U_0603_10V4Z
1 2

R169 20K_0402_5%R169 20K_0402_5%

1 2

PR05

R172 33_0402_5%R172 33_0402_5%

1

C1573

@ C1573

@

10P_0402_50V8J

10P_0402_50V8J

2

Reserve for EMI
please close to RH170

R174 33_0402_5%R174 33_0402_5%
R189 33_0402_5%R189 33_0402_5%

12

R198

R198

@

@

200_0402_5%

200_0402_5%

12

R201

R201

100_0402_1%

100_0402_1%

PCH_JTAG_TCK

12

51_0402_5%

51_0402_5%

1 2

R188 33_0402_5%R188 33_0402_5%

R1747

R1747

C1578

C1578

1 2

12

@

@

33_0402_5% @

33_0402_5% @

C1581

C1581

R1755

R1755

12

1 2

0_0402_5% @

0_0402_5% @

@

@

5

R173 20K_0402_5%R173 20K_0402_5%

1U_0603_10V4Z

HDA_SDOUT

12

R200

R200

@

@

200_0402_5%

200_0402_5%

12

R203

R203

100_0402_1%

100_0402_1%

12

R193

R193

PCH_SPI_CLK_R

1U_0603_10V4Z

HDA_BIT_CLK

HDA_RST#
HDA_SDOUT

R191

R191

1 2

0_0402_5%

0_0402_5%

1 2

1 2
1 2

1M_0402_5%

1M_0402_5%

sualaptop365.edu.vn

C206

C206

C205

C205

+3V_SPI

R1742

R1742

R1743

R1743

+5VS

1

2

1

2

G

G

2

13

D

S

D

S

BSS138_SOT23

BSS138_SOT23
Q12

Q12

1 2

1 2

EC_SPI_WP39

12

CMOS

JCMOS

JCMOS

SHORT PADS

SHORT PADS

12

JME

JME

SHORT PADS

SHORT PADS

ME CMOS

HDA_SDIN033

HDA_SYNC

PCH_SPI_WP#

3.3K_0402_5%

3.3K_0402_5%
PCH_SPI_HOLD#

3.3K_0402_5%

3.3K_0402_5%

PCH_SPI_WP PCH_WP

4

UPCHA

PCH_RTCX1
PCH_RTCX2
PCH_RTCRST#
PCH_SRTCRST#
SM_INTRUDER#
PCH_INTVRMEN

HDA_BIT_CLK
HDA_SYNC
HDA_SPKR
HDA_RST#

HDA_SDIN0

HDA_SDOUT

PCH_SPI_WP

PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO

PCH_SPI_CLK_RR
PCH_SPI_CS#_RR

PCH_SPI_SI_RR
PCH_SPI_SO_RR

UPCHA

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

HDA_DOCK_EN# / GPIO33

N32

HDA_DOCK_RST# / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989

SPI ROM ( 4MByte )

@

@

1 2

R137 0_0402_5%

R137 0_0402_5%

1 2

R135 0_0402_5%R135 0_0402_5%

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

4

+3V_SPI

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C1575

C1575

2

PCH_SPI_WP#
PCH_SPI_HOLD#
PCH_SPI_CS#_R
PCH_SPI_CLK_R
PCH_SPI_SI_RPCH_SPI_CLK_RRR

Q71

Q71
2

G

G

8
3
7
1
6
5

PCH_SPI_WP#

13

D

D

S

S

LPC

LPC

FWH4 / LFRAME#

LDRQ1# / GPIO23

RTCIHDA

RTCIHDA

SATA 6G

SATA 6G

SATA

SATA

JTAG

JTAG

SATA3RCOMPO

SPI

SPI

SATA0GP / GPIO21
SATA1GP / GPIO19

U59

WIN7@U59

WIN7@

VCC

VSS
W
HOLD
S
C

Q

D

W25Q32BVSSIG_SO8

W25Q32BVSSIG_SO8

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

LDRQ0#

SERIRQ

SATA0RXN
SATA0RXP
SATA0TXN

SATA0TXP

SATA1RXN
SATA1RXP
SATA1TXN

SATA1TXP

SATA2RXN
SATA2RXP
SATA2TXN

SATA2TXP

SATA3RXN
SATA3RXP
SATA3TXN

SATA3TXP

SATA4RXN
SATA4RXP
SATA4TXN

SATA4TXP

SATA5RXN
SATA5RXP
SATA5TXN

SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3COMPI

SATA3RBIAS

SATALED#

4

PCH_SPI_SO_R

2

LPC_AD0

C38

LPC_AD1

A38

LPC_AD2

B37

LPC_AD3

C37

LPC_FRAME#

D36

LPC_LDRQ0#

E36

LPC_LDRQ1#

K36

SERIRQ

V5

AM3
AM1
AP7
AP5

AM10
AM8
AP11
AP10

AD7
AD5
AH5
AH4

AB8
AB10
AF3
AF1

Y7
Y5
AD3
AD1

Y3
Y1
AB3
AB1

Y11

SATA_COMP

Y10

AB12

SATA3_COMP

AB13

RBIAS_SATA3

AH1

PCH_SATALED#

P3

PCH_GPIO21

V14

BBS_BIT0_R

P1

+3VS

PCH_SPI_CLK_RR

U59

U59

WIN8@

WIN8@

W25Q64FVSSIG_SO8

W25Q64FVSSIG_SO8

8M ROM=SA000039A20

3

2

For PCH XDP

1K_0402_5%

1K_0402_5%

R195

@R195

@

PCH_RSMRST#14,39

PBTN_OUT#5,14,39

+1.05VS

LPC_AD0 39,40
LPC_AD1 39,40
LPC_AD2 39,40
LPC_AD3 39,40

LPC_FRAME# 39,40
@

@

T19 PAD~D

T19 PAD~D

@

@

T20 PAD~D

T20 PAD~D

SERIRQ 39

SATA_PRX_DTX_N0 31
SATA_PRX_DTX_P0 31
SATA_PTX_DRX_N0 31
SATA_PTX_DRX_P0 31

SATA_PRX_DTX_N1 31
SATA_PRX_DTX_P1 31
SATA_PTX_DRX_N1 31
SATA_PTX_DRX_P1 31

SATA_PRX_DTX_N2 31
SATA_PRX_DTX_P2 31
SATA_PTX_DRX_N2 31
SATA_PTX_DRX_P2 31

PCH_SATALED# 38

+3VALW

Issued Date

Issued Date

Issued Date

+1.05VS_VCC_SATA

+1.05VS_SATA3

PCH_SPI_CS#_RR
PCH_SPI_CLK_RRR
PCH_SPI_SI_RR
PCH_SPI_SO_RR

KSI4
KSI5
KSI6
KSI7

1 2

R181 37.4_0402_1%R181 37.4_0402_1%

1 2

RH8 49.9_0402_1%RH8 49.9_0402_1%

1 2

RH9 750_0402_1%RH9 750_0402_1%

R1741

R1741

1 2

0_0402_5%

0_0402_5%

EMI

KSI438,39
KSI538,39
KSI638,39
KSI738,39

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

HDD1

HDD2

ODD

R31

R31

12

10K_0402_5%

10K_0402_5%

FLASH_EN:

+3V_PCH

H: Flash mode
L: Normal mode

U12

U12

1

VDD

4

VDD

9

VDD

19

VDD

24

A0

22

B0

18

C0

17

D0

14

E0

23

A1

21

B1

16

C1

15

D1

13

E1

PI3V512QE_QSOP24

PI3V512QE_QSOP24

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

12

SEL

2

YA

5

YB

6

YC

8

YD

11

YE

3

GND

7

GND

10

GND

20

GND

Compal Secret Data

Compal Secret Data

Compal Secret Data

1 2

R197

@R197

@

1 2

0_0402_5%

0_0402_5%

+3V_PCH

XDP_DBRESET#_R5,14

PCH_INTVRMEN

INTVRMEN

H：Integrated VRM enable

*

：

Integrated VRM disable

L

FLASH_EN

FLASH_EN

PCH_SPI_CS#_R
PCH_SPI_CLK PCH_SPI_CLK_R

PCH_SPI_SI_R
PCH_SPI_SO_R

Deciphered Date

Deciphered Date

Deciphered Date

XDP_DBRESET#_R

PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_TMS
PCH_JTAG_TCK

R176 330K_0402_5%R176 330K_0402_5%

FLASH_EN 39

+3V_SPI

2

RSMRST#_XDP

12

1 2

0_0402_5%

0_0402_5%

R134

R134

EMI

1

T57 PAD@ T57 PAD@
T58 PAD@ T58 PAD@

T51 PAD@ T51 PAD@
T56 PAD@ T56 PAD@
T50 PAD@ T50 PAD@

T52 PAD@ T52 PAD@
T53 PAD@ T53 PAD@
T54 PAD@ T54 PAD@
T55 PAD@ T55 PAD@

SERIRQ

+RTCVCC

HDA_SYNC

This signal has a weak internal pull-down
On Die PLL VR is supplied by

1.5V when smapled high

1.8V when sampled low
Needs to be pulled High for Chief River platfrom

R171 10K_0402_5%R171 10K_0402_5%

PCH_GPIO21

R190 10K_0402_5%R190 10K_0402_5%

PCH_SATALED#

R184 10K_0402_5%R184 10K_0402_5%

BBS_BIT0_R

R185 10K_0402_5%R185 10K_0402_5%

HDA_SPKR

R412 1K_0402_5%@R412 1K_0402_5%@

HDA_SYNC

R186 1K_0402_5%R186 1K_0402_5%

12
12
12
12

12

LOW=Default

*

HIGH=No Reboot

12

RTC Battery

MAX. 8000mil

D6

+RTCVCC

W=20mils

1

C209

C209

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Title

Title

Title

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

4019G7

4019G7

4019G7

Date: Sheet

Date: Sheet

Date: Sheet

D6

2

1

3

DAN202UT106_SC70-3

DAN202UT106_SC70-3

Compal Electronics, Inc.

1

+3V_PCH

+RTCBATT

W=20mils

W=20mils

+3VS

+3VS

12

R204

R204
1K_0402_5%

1K_0402_5%

+CHGRTC

12 59Monday, September 03, 2012

12 59Monday, September 03, 2012

12 59Monday, September 03, 2012

B

B

B

of

of

of

5

4

3

2

1

UPCHB

D D

10/100/1G LAN --->

MiniWLAN (Mini Card 1)--->

USB3.0 controller --->

C C

10/100/1G LAN --->

MiniWLAN (Mini Card 1)--->

USB3.0 controller --->

B B

@

@

R1757

CLK_PCI_LPBACK

Reserve for EMI please close to
UH4

Y3

1

2

C288

C288
12P_0402_50V8J

12P_0402_50V8J

1

Y3

1

GND

2

A A

R1757

33_0402_5%

33_0402_5%

12

R2551M_0402_5% R2551M_0402_5%

3

3

GND

25MHZ 10PF +-20PPM 7V25000014

25MHZ 10PF +-20PPM 7V25000014

4

12

1 2

22P_0402_50V8J

22P_0402_50V8J

2

C243

C243
12P_0402_50V8J

12P_0402_50V8J

1

5

PCIE_PRX_GLANTX_N132
PCIE_PRX_GLANTX_P132
PCIE_PTX_GLANRX_N132
PCIE_PTX_GLANRX_P132

PCIE_PRX_WLANTX_N240
PCIE_PRX_WLANTX_P240
PCIE_PTX_WLANRX_N240
PCIE_PTX_WLANRX_P240

PCIE_PRX_USB3TX_N435
PCIE_PRX_USB3TX_P435
PCIE_PTX_USB3RX_N435
PCIE_PTX_USB3RX_P435

@

@
C1582

C1582

XTAL25_IN

XTAL25_OUT

CLK_PCH_14M

CLK_PCIE_LAN#32
CLK_PCIE_LAN32

LANCLK_REQ#32

CLK_PCIE_WLAN#40
CLK_PCIE_WLAN40

WLANCLK_REQ#40

CLK_PCIE_USB30#35
CLK_PCIE_USB3035

CLKREQ_USB30#35

+3VS

+3V_PCH

R1760

R1760

33_0402_5%

33_0402_5%

C210 0.1U_0402_16V7KC210 0.1U_0402_16V7K

1 2

C215 0.1U_0402_16V7KC215 0.1U_0402_16V7K

1 2

C211 0.1U_0402_16V7KC211 0.1U_0402_16V7K

1 2

C212 0.1U_0402_16V7KC212 0.1U_0402_16V7K

1 2

C1043 0.1U_0402_16V7K

C1043 0.1U_0402_16V7K

1 2

C1044 0.1U_0402_16V7K

C1044 0.1U_0402_16V7K

1 2

RH127 0_0402_5%RH127 0_0402_5%
RH128 0_0402_5%RH128 0_0402_5%

+3V_PCH

+3V_PCH

+3V_PCH

+3V_PCH

+3V_PCH

+3V_PCH

@

@

RH130 10K_0402_5%RH130 10K_0402_5%

R225 0_0402_5%R225 0_0402_5%
R226 0_0402_5%R226 0_0402_5%
R215 10K_0402_5%R215 10K_0402_5%

+3VS

R217 10K_0402_5%R217 10K_0402_5%

R1054 0_0402_5%USB30@R1054 0_0402_5%USB30@
R1055 0_0402_5%USB30@R1055 0_0402_5%USB30@

R177 10K_0402_5%R177 10K_0402_5%

R1899 0_0402_5%@R1899 0_0402_5%@

R232 10K_0402_5%R232 10K_0402_5%

R233 10K_0402_5%R233 10K_0402_5%

R221 10K_0402_5%R221 10K_0402_5%

R240 10K_0402_5%R240 10K_0402_5%

R219 10K_0402_5%R219 10K_0402_5%

@

@
C1583

C1583

12

1 2

22P_0402_50V8J

22P_0402_50V8J

USB30@

USB30@

USB30@

USB30@

1 2
1 2

1 2

1 2

1 2

1 2

1 2

1 2

12
12
12

12
12

12

12

12

T72PAD @T72PAD @
T73PAD @T73PAD @

PCIE_PRX_GLANTX_N1
PCIE_PRX_GLANTX_P1
PCIE_PTX_GLANRX_N1_C
PCIE_PTX_GLANRX_P1_C

PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2
PCIE_PTX_WLANRX_N2_C
PCIE_PTX_WLANRX_P2_C

PCIE_PRX_USB3TX_N4
PCIE_PRX_USB3TX_P4
PCIE_PTX_USB3RX_N4_C
PCIE_PTX_USB3RX_P4_C

PCIE_LAN#
PCIE_LAN

LANCLK_REQ#

PCIE_WLAN#
PCIE_WLAN

WLANCLK_REQ#

PCIE_USB30#
PCIE_USB30

PEG_B_CLKREQ#

PCIE_CLKREQ6#

GPIO46

CLK_CPU_ITP#
CLK_CPU_ITP

4

UPCHB

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_ITPXDP_N

AK13

CLKOUT_ITPXDP_P

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989

SMBUSController

SMBUSController

SML1ALERT# / PCHHOT# / GPIO74

PCI-E*

PCI-E*

CLOCKS

CLOCKS

SMBALERT#

SMBCLK

SMBDATA

SML0CLK

SML0DATA

CL_CLK1

CL_DATA1

CL_RST1#

REFCLK14IN

XTAL25_IN

XTAL25_OUT

Issued Date

Issued Date

Issued Date

E12

SMBCLK

H14

SMBDATA

C9

DRAMRST_CNTRL_PCH

A12

SML0CLK

C8

SML0DATA

G12

PCH_HOT#

C13

PCH_SMLCLK

E14

PCH_SMLDATA

M16

M7

T11

P10

PEG_CLKREQ#_R

M10

CLK_PCIE_VGA#

AB37

CLK_PCIE_VGA

AB38

CLK_CPU_DMI#

AV22

CLK_CPU_DMI

AU22

AM12
AM13

CLKIN_DMI#

BF18

CLKIN_DMI

BE18

CLKIN_DMI2#

BJ30

CLKIN_DMI2

BG30

CLKIN_DOT96#

G24

CLKIN_DOT96

E24

CLKIN_SATA#

AK7

CLKIN_SATA

AK5

CLK_PCH_14M

K45

CLK_PCI_LPBACK

H45

XTAL25_IN

V47

XTAL25_OUT

V49

XCLK_RCOMP

Y47

K43
F47
H47
K49

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SML1CLK / GPIO58

SML1DATA / GPIO75

Link

Link

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

CLKOUT_DMI_N

CLKOUT_DMI_P

CLKOUT_DP_N
CLKOUT_DP_P

CLKIN_DMI_N
CLKIN_DMI_P

CLKIN_GND1_N
CLKIN_GND1_P

CLKIN_DOT_96N
CLKIN_DOT_96P

CLKIN_SATA_N

CLKIN_SATA_P

CLKIN_PCILOOPBACK

XCLK_RCOMP

CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67

FLEX CLOCKS

FLEX CLOCKS

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

SMBALERT# 38

MEMORY / Click Pad

DRAMRST_CNTRL_PCH 6,9,39

PCH_SMLCLK 20,39
PCH_SMLDATA 20,39

T14 PAD@ T14 PAD@

T15 PAD@ T15 PAD@

T16 PAD@ T16 PAD@

PEG_CLKREQ#_R 20

CLK_PCIE_VGA# 20
CLK_PCIE_VGA 20

CLK_CPU_DMI# 5
CLK_CPU_DMI 5

CLK_PCI_LPBACK 15

1 2

R237 90.9_0402_1%R237 90.9_0402_1%

T18 PAD@ T18 PAD@
T25 PAD@ T25 PAD@
T26 PAD@ T26 PAD@

Compal Secret Data

Compal Secret Data

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

EC

VGA

+1.05VS_VCCDIFFCLKN

2

SMBCLK

SMBDATA

6 1

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

2

Q34A

Q34A

3

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

SMBALERT#
SMBCLK
SMBDATA
SML0CLK
SML0DATA
PCH_SMLCLK
PCH_SMLDATA

PCH_HOT#

DRAMRST_CNTRL_PCH

DRAMRST_CNTRL_PCH

CLKIN_DMI2#
CLKIN_DMI2
CLKIN_DMI#
CLKIN_DMI
CLKIN_DOT96#
CLKIN_DOT96
CLKIN_SATA#
CLKIN_SATA
CLK_PCH_14M

If use extenal CLK gen, please place close to CLK gen
else, please place close to PCH

+3VS+3VS

R236

R236

2.2K_0402_5%

2.2K_0402_5%

5

Q34B

Q34B

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

1 2

4

Compal Electronics, Inc.

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

4019G7

4019G7

4019G7

12

R206 10K_0402_5%R206 10K_0402_5%

1 2

R211 2.2K_0402_5%R211 2.2K_0402_5%

1 2

R212 2.2K_0402_5%R212 2.2K_0402_5%

1 2

R209 2.2K_0402_5%R209 2.2K_0402_5%

1 2

R210 2.2K_0402_5%R210 2.2K_0402_5%

1 2

R245 2.2K_0402_5%R245 2.2K_0402_5%

1 2

R246 2.2K_0402_5%R246 2.2K_0402_5%

1 2

R208 10K_0402_5%R208 10K_0402_5%

1 2

R207 1K_0402_1%R207 1K_0402_1%

1 2

R1911 100K_0402_1%

R1911 100K_0402_1%

@

@

RH12

RH12
RH13

RH13
RH10 10K_0402_5%RH10 10K_0402_5%
RH11 10K_0402_5%RH11 10K_0402_5%
RH14 10K_0402_5%RH14 10K_0402_5%
RH15 10K_0402_5%RH15 10K_0402_5%
RH16 10K_0402_5%RH16 10K_0402_5%
RH17 10K_0402_5%RH17 10K_0402_5%
RH18 10K_0402_5%RH18 10K_0402_5%

1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2

R241

R241

2.2K_0402_5%

2.2K_0402_5%

PCH_SMBCLK 10,11,38,40

PCH_SMBDATA 10,11,38,40

1

10K_0402_5%

10K_0402_5%
10K_0402_5%

10K_0402_5%

13 59Monday, September 03, 2012

13 59Monday, September 03, 2012

13 59Monday, September 03, 2012

of

of

of

+3V_PCH

B

B

B

sualaptop365.edu.vn

5

4

3

2

1

UPCHC

UPCHC

DMI_CTX_PRX_N04
DMI_CTX_PRX_N14
DMI_CTX_PRX_N24
DMI_CTX_PRX_N34

DMI_CTX_PRX_P04
DMI_CTX_PRX_P14

D D

SUSACK#39

SYSTEM_PWROK

C C

B B

PCH_PWROK39

PM_DRAM_PWRGD5

PCH_RSMRST#12,39

SUSWARN#39

AC_PRESENT39

PR05

VGATE5,49

A A

PM_PWROK_R
SYSTEM_PWROK_I

DMI_CTX_PRX_P24
DMI_CTX_PRX_P34

DMI_CRX_PTX_N04
DMI_CRX_PTX_N14
DMI_CRX_PTX_N24
DMI_CRX_PTX_N34

DMI_CRX_PTX_P04
DMI_CRX_PTX_P14
DMI_CRX_PTX_P24
DMI_CRX_PTX_P34

+1.05VS_VCC_EXP

R249 49.9_0402_1%R249 49.9_0402_1%
RH21 750_0402_1%RH21 750_0402_1%

4mil width and place
within 500mil of the PCH

R802

1 2

XDP_DBRESET#_R5,12

1 2

RH69 0_0402_5%RH69 0_0402_5%

PR05

PR05

PM_DRAM_PWRGD

PR05

1 2

R1765 0_0402_5%R1765 0_0402_5%

R801

1 2

PBTN_OUT#5,12,39

Reserve for EMI please close to UH1

R1769

R1769
0_0402_5%

0_0402_5%

1 2

R248 10K_0402_5%R248 10K_0402_5%

R250 100K_0402_5%@R250 100K_0402_5%@

PR05

1 2

ACIN39,43

RB751V-40_SOD323-2

RB751V-40_SOD323-2

PR05

1 2

R751 0_0402_5%R751 0_0402_5%

@

@

1 2

C1584 100P_0402_50V8J

C1584 100P_0402_50V8J

PCH_GPIO29
PCH_GPIO72
RI#
WAKE#
AC_PRESENT_R
SUSWARN#

PCH_DPWROK
PCH_RSMRST#

1 2

12

5

sualaptop365.edu.vn

D8

D8

2
1

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

1 2

1 2

@R802

@
0_0402_5%

0_0402_5%

R1763 0_0402_5%R1763 0_0402_5%

R253 0_0402_5%R253 0_0402_5%

@R801

@
0_0402_5%

0_0402_5%

R1768 0_0402_5%R1768 0_0402_5%

@

@

XDP_DBRESET#_R

+3VS

B
A

DMI_IRCOMP
RBIAS_CPY

SUSACK#_R

XDP_DBRESET#_R

SYSTEM_PWROK_I

1 2

1 2

PCH_RSMRST#_R

SUSWARN#_R

1 2

AC_PRESENT_R

t1

5

U6

U6

P

SYSTEM_PWROK

4

Y

G

NC7SZ08P5X_NL_SC70-5

NC7SZ08P5X_NL_SC70-5

3

R230 10K_0402_5%R230 10K_0402_5%

1 2

R265 10K_0402_5%R265 10K_0402_5%

1 2

R264 10K_0402_5%R264 10K_0402_5%

1 2

R259 10K_0402_5%R259 10K_0402_5%

1 2

R263 200K_0402_5%R263 200K_0402_5%

1 2

R262 10K_0402_5%R262 10K_0402_5%

1 2

R803 100K_0402_5%@R803 100K_0402_5%@
R247 10K_0402_5%R247 10K_0402_5%

1 2

Intel CRB EMRLDLKE2 Rev1.0

PM_PWROK_R

PBTN_OUT#_R

PCH_GPIO72

RI#

12

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN#/SUSPWRDNACK/GPIO30

E20

PWRBTN#

H20

ACPRESENT / GPIO31

E10

BATLOW# / GPIO72

A10

RI#

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989

SYSTEM_PWROK 5

+3V_PCH

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6

DMI

FDI

DMI

FDI

FDI_RXP7

FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

SLP_S4#

System Power Management

System Power Management

4

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

SLP_LAN# / GPIO29

DSWODVREN
DSWODVREN

RH25 330K_0402_5%RH25 330K_0402_5%
RH26 330K_0402_5%@RH26 330K_0402_5%@

DSWODVREN - On Die DSW VR Enable

H：Enable

*

：

Disable

L

PM_CLKRUN#

FDI_CTX_PRX_N0

BJ14

FDI_CTX_PRX_N1

AY14

FDI_CTX_PRX_N2

BE14

FDI_CTX_PRX_N3

BH13

FDI_CTX_PRX_N4

BC12

FDI_CTX_PRX_N5

BJ12

FDI_CTX_PRX_N6

BG10

FDI_CTX_PRX_N7

BG9

FDI_CTX_PRX_P0

BG14

FDI_CTX_PRX_P1

BB14

FDI_CTX_PRX_P2

BF14

FDI_CTX_PRX_P3

BG13

FDI_CTX_PRX_P4

BE12

FDI_CTX_PRX_P5

BG12

FDI_CTX_PRX_P6

BJ10

FDI_CTX_PRX_P7

BH9

FDI_INT

AW16

FDI_FSYNC0

AV12

FDI_FSYNC1

BC10

FDI_LSYNC0

AV14

FDI_LSYNC1

BB10

DSWODVREN

A18

PCH_DPWROK_R

E22

WAKE#

B9

R1762 0_0402_5%R1762 0_0402_5%

PM_CLKRUN#

N3

SUS_STAT#

G8

SUSCLK

N14

PM_SLP_S5#

D10

PM_SLP_S4#

H4

PM_SLP_S3#

F4

G10

G16

H_PM_SYNC

AP14

PCH_GPIO29

K14

12
12

+3VS

12

R256

R256

8.2K_0402_5%@

8.2K_0402_5%@

R133

R133
10K_0402_5%

10K_0402_5%

1 2

R800 0_0402_5%@R800 0_0402_5%@

1 2

RH22 0_0402_5%RH22 0_0402_5%

1 2

1 2

0_0402_5% @

0_0402_5% @

R1764

R1764

12

0_0402_5%

0_0402_5%

T11 PADT11 PAD

T12 PADT12 PAD

+RTCVCC

1 2

R529

R529

T10 PADT10 PAD

FDI_CTX_PRX_N0 4
FDI_CTX_PRX_N1 4
FDI_CTX_PRX_N2 4
FDI_CTX_PRX_N3 4
FDI_CTX_PRX_N4 4
FDI_CTX_PRX_N5 4
FDI_CTX_PRX_N6 4
FDI_CTX_PRX_N7 4

FDI_CTX_PRX_P0 4
FDI_CTX_PRX_P1 4
FDI_CTX_PRX_P2 4
FDI_CTX_PRX_P3 4
FDI_CTX_PRX_P4 4
FDI_CTX_PRX_P5 4
FDI_CTX_PRX_P6 4
FDI_CTX_PRX_P7 4

FDI_INT 4
FDI_FSYNC0 4
FDI_FSYNC1 4
FDI_LSYNC0 4
FDI_LSYNC1 4

SUSCLK_R 39

PM_SLP_S5# 39

PM_SLP_S4# 39

PM_SLP_S3# 39

H_PM_SYNC 5

PCH_DPWROK
PCH_RSMRST#_R

PR05

PCIE_WAKE# 32,35,40

PM_CLKRUNEC# 39

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+3VS

Issued Date

Issued Date

Issued Date

PCH_DPWROK 39

PR05

PCH_CRT_HSYNC30
PCH_CRT_VSYNC30

1 2

RH291 2.2K_0402_5%RH291 2.2K_0402_5%

1 2

RH292 2.2K_0402_5%RH292 2.2K_0402_5%

1 2

R363 2.2K_0402_5%R363 2.2K_0402_5%

1 2

R364 2.2K_0402_5%R364 2.2K_0402_5%

PCH_ENBKL39

PCH_ENVDD30

PCH_INV_PWM30

PCH_LCD_CLK30
PCH_LCD_DATA30

PCH_TXCLK-30
PCH_TXCLK+30

PCH_TXOUT0-30
PCH_TXOUT1-30
PCH_TXOUT2-30

PCH_TXOUT0+30
PCH_TXOUT1+30
PCH_TXOUT2+30

PCH_TZCLK-30
PCH_TZCLK+30

PCH_TZOUT0-30
PCH_TZOUT1-30
PCH_TZOUT2-30

PCH_TZOUT0+30
PCH_TZOUT1+30
PCH_TZOUT2+30

PCH_CRT_BLU30
PCH_CRT_GRN30
PCH_CRT_RED30

PCH_CRT_DDC_CLK30
PCH_CRT_DDC_DAT30

PCH_CRT_DDC_CLK
PCH_CRT_DDC_DAT

PCH_CRT_BLU

1 2

RH131 150_0402_1%~DRH131 150_0402_1%~D

PCH_CRT_GRN

1 2

RH132 150_0402_1%~DRH132 150_0402_1%~D

PCH_CRT_RED

1 2

RH133 150_0402_1%~DRH133 150_0402_1%~D

PCH_ENVDD

1 2

R1770 100K_0402_5%~D@R1770 100K_0402_5%~D@

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

PCH_ENBKL

R1761

R1761

1 2

100K_0402_5%

100K_0402_5%

CTRL_CLK
CTRL_DATA

LVDS_IBG

RH244 2.37K_0402_1%~DRH244 2.37K_0402_1%~D

R1766 33_0402_5%R1766 33_0402_5%

R1767 33_0402_5%R1767 33_0402_5%

CTRL_CLK
CTRL_DATA

12

T8
PAD~DT8PAD~D

PCH_TXCLK­PCH_TXCLK+

PCH_TXOUT0­PCH_TXOUT1­PCH_TXOUT2-

PCH_TXOUT0+
PCH_TXOUT1+
PCH_TXOUT2+

PCH_TZCLK­PCH_TZCLK+

PCH_TZOUT0­PCH_TZOUT1­PCH_TZOUT2-

PCH_TZOUT0+
PCH_TZOUT1+
PCH_TZOUT2+

PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED

PCH_CRT_DDC_CLK
PCH_CRT_DDC_DAT

HSYNC_PCH

1 2

VSYNC_PCH

1 2

12

R1250

R1250

1K_0402_0.5%

1K_0402_0.5%

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

CRT_IREF

UPCHD

UPCHD

J47

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

AF37

LVD_IBG

AF36

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CLK

M40

CRT_DDC_DATA

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989

2

SDVO_TVCLKINN
SDVO_TVCLKINP

SDVO_STALLN
SDVO_STALLP

SDVO_CTRLCLK

SDVO_CTRLDATA

LVDS

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

Digital Display Interface

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

CRT

CRT

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

AP43
AP45

AM42
AM40

AP39

SDVO_INTN

AP40

SDVO_INTP

HDMICLK_NB

P38

HDMIDAT_NB

M39

AT49

DDPB_AUXN

AT47

DDPB_AUXP

DDPB_HPD

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P

DDPC_AUXN
DDPC_AUXP

DDPC_HPD

DDPC_0N

DDPC_0P

DDPC_1N

DDPC_1P

DDPC_2N

DDPC_2P

DDPC_3N

DDPC_3P

DDPD_AUXN
DDPD_AUXP

DDPD_HPD

DDPD_0N

DDPD_0P

DDPD_1N

DDPD_1P

DDPD_2N

DDPD_2P

DDPD_3N

DDPD_3P

+3VS

TMDS_B_HPD

AT40

TMDS_B_DATA2#

AV42

TMDS_B_DATA2

AV40

TMDS_B_DATA1#

AV45

TMDS_B_DATA1

AV46

TMDS_B_DATA0#

AU48

TMDS_B_DATA0

AU47

TMDS_B_CLK#

AV47

TMDS_B_CLK

AV49

P46
P42

AP47
AP49
AT38

AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49

M43
M36

AT45
AT43
BH41

BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42

R373 2.2K_0402_5%R373 2.2K_0402_5%

1 2

R376 2.2K_0402_5%R376 2.2K_0402_5%

1 2

Compal Electronics, Inc.

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

4019G7

4019G7

4019G7

1

HDMICLK_NB 34
HDMIDAT_NB 34

TMDS_B_HPD 34
TMDS_B_DATA2# 34

TMDS_B_DATA2 34
TMDS_B_DATA1# 34
TMDS_B_DATA1 34
TMDS_B_DATA0# 34
TMDS_B_DATA0 34
TMDS_B_CLK# 34
TMDS_B_CLK 34

PCH_LCD_CLK
PCH_LCD_DATAPCH_PWROK

14 59Monday, September 03, 2012

14 59Monday, September 03, 2012

14 59Monday, September 03, 2012

B

B

B

of

of

of

5

D D

USB3_RX1_N36
USB3_RX2_N36

USB3_RX1_P36
USB3_RX2_P36

USB3_TX1_N36
USB3_TX2_N36

USB3_TX1_P36

C C

C1585

C1585

@

@

1 2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

ODD_DA#

Reserve for EMI please close to UH1

B B

A A

CLK_PCI_LPBACK13

CLK_PCI_LPC39

CLK_LPC_DEBUG140

CLK_PCI_LPBACK
CLK_PCI_LPC

PCH_GPIO4

PCI_PIRQC#
PCI_PIRQA#
PCH_GPIO2

PCH_GPIO52

PCH_WAN_RADIO_OFF#

ODD_DA#
DGPU_PWR_EN

PCH_GPIO5

PCI_PIRQB#

PCI_PIRQD#

DGPU_HOLD_RST#

5

USB3_TX2_P36

DGPU_PWR_EN29,52

PCH_WAN_RADIO_OFF#40

R285 22_0402_5%R285 22_0402_5%
R286 22_0402_5%R286 22_0402_5%
R1778 22_0402_5%

R1778 22_0402_5%

1 2

R1900 8.2K_0201_5%R1900 8.2K_0201_5%

1 2

R1901 8.2K_0201_5%R1901 8.2K_0201_5%

1 2

R1902 8.2K_0201_5%R1902 8.2K_0201_5%

1 2

R1903 8.2K_0201_5%R1903 8.2K_0201_5%

1 2

R1904 8.2K_0201_5%R1904 8.2K_0201_5%

1 2

R1905 8.2K_0201_5%R1905 8.2K_0201_5%

1 2

R1906 8.2K_0201_5%R1906 8.2K_0201_5%

1 2

R1907 8.2K_0201_5%@R1907 8.2K_0201_5%@

1 2

R1908 8.2K_0201_5%R1908 8.2K_0201_5%

1 2

R1909 8.2K_0201_5%R1909 8.2K_0201_5%

1 2

R1910 8.2K_0201_5%R1910 8.2K_0201_5%

R271 10K_0402_5%

R271 10K_0402_5%

1 2

@

@

R272 10K_0402_5%R272 10K_0402_5%

1 2

ODD_DA#31

1 2
1 2

DGPU_PWR_EN

PCH_WAN_RADIO_OFF#

T7PAD @T7PAD @

12

@

@

PR17

+3VS

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

DGPU_HOLD_RST#

PCH_GPIO52

PCH_GPIO2
ODD_DA#
PCH_GPIO4
PCH_GPIO5

PCH_PLTRST#

CLK_PCI0
CLK_PCI1
CLK_PCI3CLK_LPC_DEBUG1

4

UPCHE

UPCHE

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

B21

TP21

M20

TP22

AY16

TP23

BG46

TP24

BE28

USB3Rn1

BC30

USB3Rn2

BE32

USB3Rn3

BJ32

USB3Rn4

BC28

USB3Rp1

BE30

USB3Rp2

BF32

USB3Rp3

BG32

USB3Rp4

AV26

USB3Tn1

BB26

USB3Tn2

AU28

USB3Tn3

AY30

USB3Tn4

AU26

USB3Tp1

AY26

USB3Tp2

AV28

USB3Tp3

AW30

USB3Tp4

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1# / GPIO50

C44

REQ2# / GPIO52

E40

REQ3# / GPIO54

D47

GNT1# / GPIO51

E42

GNT2# / GPIO53

F46

GNT3# / GPIO55

G42

PIRQE# / GPIO2

G40

PIRQF# / GPIO3

C42

PIRQG# / GPIO4

D44

PIRQH# / GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989

PLT_RST#5,32,35,39,40

4

RSVD

RSVD

PCI

PCI

10K_0402_5%

10K_0402_5%

@

@

R1780

R1780

USB

USB

+3VS

1 2

RSVD1
RSVD2
RSVD3
RSVD4

RSVD5
RSVD6

RSVD7
RSVD8

RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22

RSVD23
RSVD24

RSVD25
RSVD26

RSVD27
RSVD28

RSVD29

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N

USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43

OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

AY7
AV7
AU3
BG4

AT10
BC8

AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6

AV5
AV10

AT8
AY5

BA2
AT12

BF3

C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32

C33

B33

A14
K20
B17
C16
L16
A16
D14
C14

R398

R398
0_0402_5%

0_0402_5%

12

R396

R396
100K_0402_5%

100K_0402_5%

NV_ALE

USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5

USB20_N10
USB20_P10

USBRBIAS

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#

U11

U11

4

3

USB20_N0 36
USB20_P0 36
USB20_N1 36
USB20_P1 36
USB20_N2 36
USB20_P2 36
USB20_N3 30
USB20_P3 30
USB20_N4 38
USB20_P4 38
USB20_N5 36
USB20_P5 36

HM76 not Support USB Port6,7

USB20_N10 40
USB20_P10 40

Within 500 mils

1 2

R281 22.6_0402_1%R281 22.6_0402_1%

@

@

1 2

R395 0_0402_5%

R395 0_0402_5%

+3VS+3V_PCH

12

5

VCC

OUT

GND

3

PR09

12

R397

R397
0_0402_5%

0_0402_5%
@

@

C1586

C1586

1 2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

PCH_PLTRST#

1

IN1

2

IN2

MC74VHC1G08DFT2G_SC70-5

MC74VHC1G08DFT2G_SC70-5

3

2

GPIO19 => BBS_BIT0
GPIO51 => BBS_BIT1

Boot BIOS Strap

BBS_BIT1BBS_BIT0

0
0

Panther Point USB Port Mapping

USB 2.0 Port Number USB 3.0 Port Number

1

01
1
2
3

2
3
4

Intel Anti-Theft Techonlogy

NV_ALE

NV_ALE

USB2/3 port 1
USB2/3 port 2
USB2 Conn. R_1
Camera
Card Reader
USB2 Conn. R_2

USB_OC0#
USB_OC2#
USB_OC7#

Mini Card(WLAN) Bluetooth

USB_OC0# 36
USB_OC1# 36
USB_OC2# 36

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

(For USB Port 0,1)
(For USB Port 2)
(For USB Port 5)

DGPU_RST#20

Compal Secret Data

Compal Secret Data

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

Compal Secret Data

USB_OC5#

USB_OC1#
USB_OC4#
USB_OC3#
USB_OC6#

Deciphered Date

Deciphered Date

Deciphered Date

2

DIS@

DIS@
100_0402_5%

100_0402_5%

100K_0402_5%

100K_0402_5%

0
1
0
11

High=Endabled
Low=Disable(floating)

R1771 1K_0402_5%@ R1771 1K_0402_5%@

1 2

1 2

R276 10K_0402_5%R276 10K_0402_5%

1 2

R282 10K_0402_5%R282 10K_0402_5%

1 2

R1772 10K_0402_5%R1772 10K_0402_5%

1 2

R1773 10K_0402_5%R1773 10K_0402_5%

1 2

R1774 10K_0402_5%R1774 10K_0402_5%

1 2

R1775 10K_0402_5%R1775 10K_0402_5%

1 2

R1776 10K_0402_5%R1776 10K_0402_5%

1 2

R1777 10K_0402_5%R1777 10K_0402_5%

1 2

R1779 0_0402_5%

R1779 0_0402_5%

+3VS

R528

R528

DIS@

DIS@

R530

R530

4

Y

12

12

Boot BIOS
Location
LPC

Reserved(NAND)
Reserved
SPI

*

*

+1.8VS

+3V_PCH

Over Current Pin Default Usage

OC Pin PCH Mapping

0
1
2
3
4
5
6

@

@

C508

DIS@C508

DIS@

1 2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

5

U20

U20

PCH_PLTRST#

2

P

B

DGPU_HOLD_RST#

1

A

G

NC7SZ08P5X_NL_SC70-5DIS@

NC7SZ08P5X_NL_SC70-5DIS@

3

Title

Title

Title

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

4019G7

4019G7

4019G7

Date: Sheet

Date: Sheet

Date: Sheet

1

Port 0 & 1

Port 2 & 3

Port 4 & 5

Port 6 & 7

Port 8 & 9

Port 10 & 11

Port 12 & 13

Compal Electronics, Inc.

15 59Monday, September 03, 2012

15 59Monday, September 03, 2012

1

15 59Monday, September 03, 2012

B

B

B

of

of

of

sualaptop365.edu.vn

5

+3VS

10K_0402_5% @

10K_0402_5% @

200K_0402_5%

200K_0402_5%

10K_0402_5%

10K_0402_5%
10K_0402_5%

10K_0402_5%
10K_0402_5%

1 2

10K_0402_5%

10K_0402_5%
10K_0402_5%

10K_0402_5%

1K_0402_5%

1K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%
10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%
10K_0402_5%

10K_0402_5%

10K_0402_5% @

10K_0402_5% @
10K_0402_5%

10K_0402_5%

1 2

@

1 2

1 2

100K_0402_5%

100K_0402_5%

@

D D

+3VS

C C

PCH_GPIO37

PCH_GPIO27

+3VALW

B B

+3V_PCH

R295

R295
R289

R289
R288

R288
R294

R294

R80710K_0402_5% R80710K_0402_5%
R29610K_0402_5% R29610K_0402_5%
R178310K_0402_5%@R178310K_0402_5%
R30610K_0402_5% R30610K_0402_5%
R30810K_0402_5% R30810K_0402_5%
R31010K_0402_5% R31010K_0402_5%
R30310K_0402_5% R30310K_0402_5%

R80510K_0402_5%@R80510K_0402_5%

12

12
12

12

R292

R292
R302

R302
R301

R301
R300

R300
R297

R297
R309

R309

R293

R293
R311

R311

R298

R298

R812

R812

1 2

12

HDD2_DETECT#

12

PCH_LID_SW_IN#

12
12

GPIO69
PCH_GPIO1
PCH_GPIO37
PCH_GPIO38
PCH_GPIO39
PCH_GPIO49
USB30_SMI#

12

DS_WAKE#

PCH_GPIO28

12
12
12
12
12
12

12
12

12
12

R313

R313

R31410K_0402_5% @R31410K_0402_5% @

EC_SMI#

CRT_DET

ODD_DETECT#

PCH_GPIO16

PCH_BT_ON

KB_RST#

PCH_GPIO48

ODD_EN#

DGPU_PWROK

PCH_GPIO22

GPIO28

On-Die PLL Voltage Regulator
This signal has a weak internal pull up

：

On-Die voltage regulator enable

H

*

L：On-Die PLL Voltage Regulator disable

CABC_SAVING30

1 2

R315 1K_0402_5%~D@R315 1K_0402_5%~D@

USB30_SMI#35

EC_LID_OUT#39

DS_WAKE#39

PCH_GPIO28

4

CRT_DET
PCH_GPIO1
USB30_SMI#

1 2

@

@

1 2

EC_SCI#
EC_SMI#

PCH_GPIO16

DGPU_PWROK
PCH_GPIO22

PCH_GPIO27
PCH_GPIO28
PCH_BT_ON

ODD_DETECT#
PCH_GPIO37
PCH_GPIO38
PCH_GPIO39
PCH_GPIO48
PCH_GPIO49
HDD2_DETECT#

EC_SCI#39
EC_SMI#39

PR05

EC_LID_OUT# PCH_LID_SW_IN#

DS_WAKE#

R498 0_0402_5%R498 0_0402_5%

DGPU_PWROK39

R804 0_0402_5%

R804 0_0402_5%

PCH_BT_ON40

ODD_DETECT#31

R1784 0_0402_5%

R1784 0_0402_5%

12

@

@

UPCHF

UPCHF

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49 / TEMP_ALERT#

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989

GPIO

GPIO

NCTF

NCTF

3

TACH4 / GPIO68
TACH5 / GPIO69
TACH6 / GPIO70
TACH7 / GPIO71

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

INIT3_3V#

DF_TVS

CPU/MISC

CPU/MISC

TS_VSS1
TS_VSS2
TS_VSS3
TS_VSS4

NC_1

VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32

C40
B41
C41
A40

P4
AU16
P5
AY11
AY10
T14
AY1

AH8
AK11
AH10
AK10

P37

BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49

ODD_EN#
GPIO69
GPIO70
GPIO71

GATEA20

H_THERMTRIP#_C

DF_TVS

T6 PAD@ T6 PAD@

ODD_EN# 31

T3 PAD@ T3 PAD@
T4 PAD@ T4 PAD@
T5 PAD@ T5 PAD@

KB_RST# 39
H_CPUPWRGD 5

1 2

R299390_0402_5% R299390_0402_5%

+3VS

R291

R291
10K_0402_5%

10K_0402_5%

1 2

H_THERMTRIP#

@

@

1 2

C1587 100P_0402_50V8J

C1587 100P_0402_50V8J

Reserve for EMI please close to UH1

2

GATEA20 39

H_CPUPWRGD

H_THERMTRIP# 5

1

DMI Termination Voltage

Set to Vcc when HIGH

NV_CLE

Set to Vss when LOW

R1781

R1781

2.2K_0402_5%

DF_TVS

2.2K_0402_5%

12

R17821K_0402_5% R17821K_0402_5%

CLOSE TO THE BRANCHING POINT

CLOSE TO THE BRANCHING POINT

+1.8VS

12

H_SNB_IVB# 5

+3VS

R1786

High: CRT Plugged

A A

CRT_DET

CRT_DET#30

R1786
10K_0402_5%

10K_0402_5%

1 2
13

D

D

Q41

Q41

2

2N7002_SOT23-3

2N7002_SOT23-3

G

G

S

S

5

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

4019G7

4019G7

4019G7

1

16 59Monday, September 03, 2012

16 59Monday, September 03, 2012

16 59Monday, September 03, 2012

of

of

of

B

B

B

sualaptop365.edu.vn

5

4

3

2

1

+1.05VS

JP2

D D

JP2

12

PAD-OPEN 4x4m

PAD-OPEN 4x4m
@

@

10U_0805_6.3V6M

10U_0805_6.3V6M

+1.05VS_VCCCORE

1

1

C221

C221

C224

2

C224

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

C223

C223

C222

C222

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

+1.05VS

+1.05VS

PR05

R320

R320

0_0805_5%

0_0805_5%

C C

B B

R1787

R1787
0_0805_5%

0_0805_5%

1 2

1 2

C227

C227

10U_0805_6.3V6M

10U_0805_6.3V6M

1

2

+3VS

1

2

+1.05VS_VCC_EXP

1

1

C228

C228

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

C234

C234

0.1U_0402_16V7K

0.1U_0402_16V7K

+1.05VS_VCC_EXP

1

C230

C230

C229

C229

2

1U_0402_6.3V6K

1U_0402_6.3V6K

+1.05VS

+VCCP_VCCDMI

1

C231

C231

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

+1.5VS

UPCHG

UPCHG

1300mA

AA23

VCCCORE[1]

AC23

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

VCCAPLLEXP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM[2]

BG6

VccAFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989

POWER

POWER

3709mA

CRTLVDS

CRTLVDS

VCC CORE

VCC CORE

40mA

75mA

DMI

DMI

VCCIO

VCCIO

2mA

DFT / SPI HVCMOS

DFT / SPI HVCMOS

FDI

FDI

1mA

VCCADAC

VSSADAC

1mA

VCCALVDS
VSSALVDS

VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCCLKDMI

VCCDFTERM[1]

VCCDFTERM[2]

VCCDFTERM[3]

VCCDFTERM[4]

10mA

VCCSPI

+VCCADAC

U48

U47

AK36
AK37

AM37
AM38
AP36
AP37

V33

V34

AT16

+VCCP_VCCDMI

AT20

+1.05VS_VCC_DMI_CCI

AB36

AG16

AG17

AJ16

AJ17

+3V_VCCPSPI

V1

1

C287

C287

2

+VCCTX_LVDS

C296

C296

0.01U_0402_16V7K

0.01U_0402_16V7K

1

CH54

CH54

0.1U_0402_16V7K

0.1U_0402_16V7K

2

1

C235

C235

2

1

C237

C237
1U_0402_6.3V6K

1U_0402_6.3V6K

2

0.01U_0402_16V7K

0.01U_0402_16V7K

+1.5VS

0.1U_0402_16V7K

0.1U_0402_16V7K

1

C294

C294

2

Near AP43

1

2

1

C233

C233
1U_0402_6.3V6K

1U_0402_6.3V6K

2

+1.8VS

0.1U_0402_16V7K

0.1U_0402_16V7K

+VCCP_VCCDMI

BLM18PG181SN1_0603

BLM18PG181SN1_0603

1

C289

C289
10U_0805_6.3V6M

10U_0805_6.3V6M

2

C295

C295

1

22U_0805_6.3X5R

C297

C297

0.01U_0402_16V7K

0.01U_0402_16V7K

+3VS

R304

R304
0_0805_5%

0_0805_5%

1 2

22U_0805_6.3X5R

2

PR05

@

@

12

R1788 0_0603_5%

R1788 0_0603_5%

1 2

R326

R326
0_0603_5%

0_0603_5%

L12

L12

1

2

+1.05VS

12

1

2

+3V_PCH

+3VS

PR05

+3VS

+3VS

L21

L21

0.1UH_MLF1608DR10KT_10%_1608

0.1UH_MLF1608DR10KT_10%_1608

0.1uH inductor, 200mA

R321

R321
0_0805_5%

0_0805_5%

1 2

C232

C232
1U_0402_6.3V6K

1U_0402_6.3V6K

+1.8VS

12

+VCCP

PR05

PCH Power Rail Table
Refer to CPU EDS R1.5

Voltage Rail

V_PROC_IO

V5REF

V5REF_Sus

Vcc3_3

VccADAC

VccADPLLA

VccADPLLB

VccCore

VccDMI

Voltage

1.05

3.3

3.3

1.05

1.05

1.05

1.05

S0 Iccmax
Current (A)

0.001

5

5

0.001

0.001

0.228

0.001

0.075

0.075

1.3

0.042

1.05VccIO 3.709

1.05VccASW 0.903

3.3VccSPI 0.01

3.3VccDSW 0.001

1.8 0.002VccDFTERM

3.3VccRTC 6 uA

3.3VccSus3_3

3.3 / 1.5VccSusHDA

0.065

0.01

VccVRM 1.8 / 1.5 0.167

1.05VccCLKDMI

0.075

VccSSC 1.05 0.095

VccDIFFCLKN 1.05 0.055

VccALVDS 3.3

0.001

1.8VccTX_LVDS 0.04

A A

5

sualaptop365.edu.vn

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

4019G7

4019G7

4019G7

1

of

of

of

17 59Monday, September 03, 2012

17 59Monday, September 03, 2012

17 59Monday, September 03, 2012

B

B

B

5

4

3

2

1

PR05

+3V_PCH

+3VALW

D D

1 2

1 2

R381 0_0603_5%@R381 0_0603_5%@

R378 0_0603_5%R378 0_0603_5%

+1.05VS

C C

+3VS

+1.05VS

@

@

R354 0_0603_5%

R354 0_0603_5%

B B

+1.05VS

A A

12

+1.05VS

+VCCP

+1.05VS

5

PR05

R290

R290

1 2

0_0805_5%

0_0805_5%

+1.05VM_VCCSUS

1

C264

C264
1U_0402_6.3V6K

1U_0402_6.3V6K

2

R350

R350

1 2

0_0603_5%

0_0603_5%

PR05

+1.05VS

1

2

1

2

L15

L15

10UH_LBR2012T100M_20%~D

10UH_LBR2012T100M_20%~D

1 2

1 2

L16

L16

10UH_LBR2012T100M_20%~D

10UH_LBR2012T100M_20%~D

sualaptop365.edu.vn

+1.05VS

1

2

+1.05VS

+3VS_VCC_CLKF33

1

1

C239

C239

C238

C238

2

2

10U_0805_10V4Z

10U_0805_10V4Z

+1.05VS_VCCDIFFCLKN

1

2

C269

C269
1U_0402_6.3V6K

1U_0402_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1

+

+

2

C267

C267
1U_0402_6.3V6K

1U_0402_6.3V6K

CH32

CH32

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

1

C258

C258

C259

C259

2

220U_B2_2.5VM_R35M

220U_B2_2.5VM_R35M

+1.05VS_VCCDIFFCLKN

1U_0402_6.3V6K

1U_0402_6.3V6K

R329 0_0603_5%

R329 0_0603_5%

C240

C240

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

1

C249

C249

22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C266

C266

0.1U_0402_16V7K

0.1U_0402_16V7K

2

1

C271

C271

0.1U_0402_16V7K

0.1U_0402_16V7K

2

1

1

CH33

CH33

2

2

0.1U_0402_16V7K

0.1U_0402_16V7K

1

1

+

+

C260

C260

C261

C261

2

2

220U_B2_2.5VM_R35M

220U_B2_2.5VM_R35M

C242

@C242

@

C252

C252

CH34

CH34

1U_0402_6.3V6K

1U_0402_6.3V6K

@

@

1

2

1

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

+VCCRTCEXT

+RTCVCC

0.1U_0402_16V7K

0.1U_0402_16V7K

4

+VCCACLK

12

1

2

1

@

@
C247

C247
1U_0402_6.3V6K

1U_0402_6.3V6K

2

C250

C250
22U_0805_6.3V6M

22U_0805_6.3V6M

1

C253

C253

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

+1.5VS

+1.05VS_VCCA_A_DPL
+1.05VS_VCCA_B_DPL

18mil
18mil

+1.05VM_VCCSUS

1

@

@
C272

C272
1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

2

+VCCPDSW

+PCH_VCCDSW

+3VS_VCC_CLKF33

+VCCSUS1

C254

C254

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

+VCCSST

1

C278

C278

2

0.1U_0402_16V7K

0.1U_0402_16V7K

C277

C277

UPCHJ

UPCHJ

AD49

VCCACLK

T16

VCCDSW3_3

V12

DCPSUSBYP

T38

VCC3_3[5]

BH23

VCCAPLLDMI2

AL29

VCCIO[14]

AL24

DCPSUS[3]

AA19

VCCASW[1]

AA21

VCCASW[2]

AA24

VCCASW[3]

AA26

VCCASW[4]

AA27

VCCASW[5]

AA29

VCCASW[6]

AA31

VCCASW[7]

AC26

VCCASW[8]

AC27

VCCASW[9]

AC29

VCCASW[10]

AC31

VCCASW[11]

AD29

VCCASW[12]

AD31

VCCASW[13]

W21

VCCASW[14]

W23

VCCASW[15]

W24

VCCASW[16]

W26

VCCASW[17]

W29

VCCASW[18]

W31

VCCASW[19]

W33

VCCASW[20]

N16

DCPRTC

Y49

VCCVRM[4]

BD47

VCCADPLLA

BF47

VCCADPLLB

AF17

VCCIO[7]

AF33

VCCDIFFCLKN[1]

AF34

VCCDIFFCLKN[2]

AG34

VCCDIFFCLKN[3]

AG33

VCCSSC

V16

DCPSST

T17

DCPSUS[1]

V19

DCPSUS[2]

BJ8

V_PROC_IO

A22

1

2

0.1U_0402_16V7K

0.1U_0402_16V7K

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989

C276

C276

1U_0402_6.3V6K

1U_0402_6.3V6K

VCCRTC

POWER

POWER

N26

VCCIO[29]

P26

1mA

PCI/GPIO/LPCMISC

PCI/GPIO/LPCMISC

SATA USB

SATA USB

10mA

HDA

HDA

3

VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]

VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

VCCIO[34]

V5REF_SUS

DCPSUS[4]

VCCSUS3_3[1]

1mA

V5REF

VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]

VCC3_3[1]
VCC3_3[8]
VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12]
VCCIO[13]

VCCIO[6]

VCCAPLLSATA

VCCVRM[1]

VCCIO[2]
VCCIO[3]
VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

P28
T27
T29

T23
T24
V23
V24
P24

T26

M26

AN23
AN24

P34

N20
N22
P20
P22

AA16
W16
T34

AJ2

AF13

AH13
AH14

AF14
AK1

AF11

AC16
AC17
AD17

T21

V21

T19

P32

2011/07/12 2012/12/31

2011/07/12 2012/12/31

2011/07/12 2012/12/31

3mA

119mA

903mA

Clock and Miscellaneous

Clock and Miscellaneous

75mA
75mA

55mA

95mA

1mA

CPURTC

CPURTC

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

1

2

+PCH_V5REF_SUS

+VCCA_USBSUS

+PCH_V5REF_RUN

1

2

+1.05VS_VCC_SATA

+VCCSUSHDA

1

C279

C279

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

C241

C241
1U_0402_6.3V6K

1U_0402_6.3V6K

C244

C244

0.1U_0402_16V7K

0.1U_0402_16V7K

C255

C255
1U_0402_6.3V

1U_0402_6.3V

1

C263

C263

0.1U_0402_16V7K

0.1U_0402_16V7K

2

+1.5VS

+1.05VS_VCC_SATA

0.1U_0402_16V7K

0.1U_0402_16V7K

1

C246

C246

2

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

+3VS

+1.05VS_SATA3

12

@

@

R1789

R1789

150_0402_1%

150_0402_1%

Deciphered Date

Deciphered Date

Deciphered Date

+1.05VS

+3V_PCH
+3V_PCH

+3V_PCH

1

2

C1589

C1589

+3V_PCH

+3VS

1

C257

C257

0.1U_0402_16V7K

0.1U_0402_16V7K

2

1

C262

C262

0.1U_0402_16V7K

0.1U_0402_16V7K

2

+1.05VS_SATA3

1

2

R353

R353

1 2

0_0805_5%

0_0805_5%

1

C270

C270

2

1U_0402_6.3V6K

1U_0402_6.3V6K

Delete R355,R356,R358

R359

R359

1 2
0_0402_5%

0_0402_5%

2

+1.05VS

+3VS

R349

R349

1 2

0_0805_5%

0_0805_5%

C265

C265
1U_0402_6.3V6K

1U_0402_6.3V6K

PR05

+1.05VS

+1.05VS

PR05

+VCCA_USBSUS

PR05

+1.05VS

+3V_PCH

+3V_PCH+5V_PCH

R339

R339

10_0402_5%

1

2

If it support 3.3V audio signals
POP:RH12 (0ohm)

If it support 1.5V audio signals
POP:RH12 (180 ohm)/RH13 (150 ohm)

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

10_0402_5%

C251
@ C251

@

1U_0402_6.3V6K

1U_0402_6.3V6K

R343

R343

10_0402_5%

10_0402_5%

Compal Electronics, Inc.

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

SCHEMATIC, MB A8223

4019G7

4019G7

4019G7

1 2

1 2

D9

D9
RB751V40_SC76-2

RB751V40_SC76-2

1 2

+PCH_V5REF_SUS

1

C248

C248

0.1U_0603_25V7K

0.1U_0603_25V7K

2

+3VS+5VS

D10

D10
RB751V40_SC76-2

RB751V40_SC76-2

1 2

+PCH_V5REF_RUN

1

C256

C256
1U_0603_10V6K

1U_0603_10V6K

2

1

of

of

of

18 59Monday, September 03, 2012

18 59Monday, September 03, 2012

18 59Monday, September 03, 2012

B

B

B