COMPAL LA-8124P Schematics

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1 1

B

C

D

E

Compal Confidential

2 2

QALEA/QALEB Schematics Document

AMD APU Trinity FS1r2 + FCH Hudson-M3 + GPU Seymour XTX/Thames XT

2012-01-16

3 3

4 4

A

B

REV:0.4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/04/18 2015/07/08

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

Cover Page

LA-8124P

1 50Monday, January 16, 2 012

E

0.4

A

Compal confidential

File Name : QALEA/QALEB

Themes XT M2/Seymour XTX M2

B

C

D

E

1 1

VRAM 64M16/128M16/256M16 DDR3 x 8

Page 17

～～～～

24

LVDS translator

RTD2132S

Page 25

HDMI Conn.

Page 27

4 * x1 PCI-E 2.0

LVDS Conn.

Page 26

GPP1GPP3

CardReader

2 2

4 in 1 Conn.

PCI Express Mini card Slot 1

WLAN

Page 33

IC

RTS5229

USB(BT)

PCI-E(WLAN)

CRT CONN

Page 28

GPP0

LAN

RTL 8111F

FCH CRT (VGA DAC)

SPI ROM 4MB

3 3

Sub board

Power Board

LAN

Page 35

15" only

ODD board

G Sensor

ST LIS34ALTR

Audio Jack+ USB2.0

Gen2PCIE x 16

DP Port0

DP Port2

DP Port1

Page 13

Page 30

Track Point

AMD FS1r2 APU

Trinity uPGA 722 pin 35mm x 35mm

x4 UMI Gen. 1

2.5GT/s per lane

Hudson M3

uFCBGA-656

24.5mm x 24.5mm

EC

ENE KB9012

Page 33

Click Pad

Page 33

Page 5

～～～～

Page 12

LPC BUS

Page 31

Memory BUS(DDRIII)

Dual Channel

1.5V DDRIII 1600 (1866)

9

AZALIA

14*USB2.0/ 4*USB3.0,10*USB2.0

6*SATA serial

～～～～

16

Int.KBD

Page 33

SATA0

SATA1

204pin DDRIII-SO-DIMM X2

Page 10

～～～～

BANK 0, 1, 2

11

2Channel Speaker

Audio Codec

CX20671-21Z

Page 29

CMOS Camera

BlueTooth CONN

USB PORT 3.0 x3

Internal MIC

Audio Jacks

Combo jack

Page 26

Page 32

Page 34

USB PORT 2.0 x1 +Charger

WLAN

Page 33

Finger Printer

UPEK TCS5DA6C0

SATA3.0 HDD CONN

SATA ODD CONN

Page 30

4 4

FingerPrint

Card reader

A

B

Thermal Sensor

Fintek 5303

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Page 32

Compal Secret Data

2011/04/18 2015/07/08

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

Block Diagrams

LA-8124P

2 50Monday, January 16, 2 012

E

0.4

A

Voltage Rails

Power Plane Description

VIN

B+

+APU_CORE

+APU_CORE_NB ON OFF OFFVoltage for On-die VGA of APU

1 1

+1.5V ON

+0.75VS OFFON OFF0.75V switched power rail for DDR termi nator

+1.2VS ON OFF OFF

+2.5VS

+1.1VALW 1.1V switched power rail for FCH ON ON*ON

+1.1VS

+1.5VS OFF1.5V switched power rail ON OFF

+VGA_CORE OFFOFFON0.95-1.2V switched power rai l

+1.5VGS

+1.8VGS OFFON OFF1.8V switched power rail

+1.0VGS ON OFF OFF1.0V switched power rail for VGA

+3VALW

+3VS_WLAN ON OFF

+3VS

+5VALW

+5VS

2 2

+VSB ON ON*

+RTCVCC

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

EC SM Bus1 address

Device Address Address

Smart Battery

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for APU

1.5V power rail for APU VDDIO and DDR

1.2V (VDDR, VDDP) switched power rail for APU

2.5V for APU VDDA

1.5V switched power rail

3.3V always on power rail

3.3V power rail for WLAN

3.3V switched power rail

5V always on power rail

5V switched power rail

VSB always on power rail

RTC power

EC SM Bus2 address

0001-011xb

HEX

15H

Device

F75303 (DDR,VRAM,CPUCORE)1001-101xb

SB-TSI

Seymour XTX

LVDS translator

B

S0 S3 S5

N/A N/A N/A

ON OFF

ON

ON OFF OFF1.1V switched power rail for FCH

ON OFF

ON

1001-100xb

1000-0010b

N/AN/AN/A

OFF

ON

OFF

ON ON*

OFF

ON

ON*

OFF

OFFON

ONON

HEX

9AH

98H

82H

FCH Hudson-M2/3 SATA Port List

SATA0

SATA1

SATA2

SATA3

SATA4

SATA5

HDD

ODD

NC

BOM Structure

UMA@ : UMA only DIS@ : DIS muxluss PX40@ : PX4.0 Support PX50@ : PX5.0 Support CMOS@ : USB camera

C

Comal PCIE Port List

LAN

WLAN

NC

Card Reader

NC

APUFCH

PCIE0

PCIE1

PCIE2

PCIE3

PCIE0

PCIE1

PCIE2

PCIE3

D

FCH Hudson-M2/3 USB Port List

USB1.1

Port0

Port1

USB2.0

Port0

Port1

Port2

Port3

Port4

Port5

Port6

Port7

Port8

Port9

Port10

Port11

Port12

Port13

NC

USB2.0 Port

NC

WLAN

CMOS

FP

BT

NC

USB 3.0

NC

E

CONN@ : ME components X76@, H2G@, S2G@ : VRAM

3 3

Tha@: Thames VGA Sey@: Seymour VGA

BOM option and stencil

SDV:

FCH SMB0

Device Address

DDR DIMM1 (FCH_SMB0)

DDR DIMM2 (FCH_SMB0)

WLAN (FCH_SMB 0)

Security ROM

1001-000xb

1001-001xb

(FCH_SMB0)

HEX

90

92

CMOS@/DIS@/PX40@/SEY@ + X76@

PJ201,PJ401,PJ502,PJ503,PJ504,PJ601,PJ603,PJ604, PJ701,PJ702,PJ703,PJ704,J1,J2301,J2401,J2402,J2403 PJ402,PJ403,PJ501,PJ602,PJ801,PJ802,PJ803,PJ804,PJ805

Stencil Memo

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/04/18 2015/07/08

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Notes List

LA-8124P

3 50Monday, January 16, 2 012

E

0.4

5

4

3

2

1

Without BACO option :

Power-Up/Down Sequence

All the ASIC supplies, except for VDDR3, must fully reach their respective

‧

nominal voltages within 20 ms of the start of the ramp-up sequence, though a shorter ramp-up duration is preferred. There is no timing requirement on the ramp up of VDDR3 relative to other power rails.

D D

The external pull-up resistors on the DDC/AUX signals (if applicable) should

‧

ramp up before or after both VDDC and VDD_CT have ramped up.

VDDC and VDD_CT should not ramp up simultaneously. For example, VDDC

‧

should reach 90% before VDD_CT starts to ramp up (or vice versa).

For power down, reversing the ramp-up sequence is recommended.

‧

VDDR3(3.3VGS)

PCIE_VDDC(1.0V)

C C

VDDR1(1.5VGS)

PE_GPIO0 : Low -> Reset dGPU ; High ->Normal operation PE_GPIO1 : Low -> dGPU Power OFF ; High -> dGPU Power ON

BACO option :

PE_GPIO0 : High ->Normal operation (dGPU is not reset on BACO mode) PE_GPIO1 : Low -> dGPU Power OFF ; High -> dGPU Power ON (always High)

dGPU Power Pins Max current

PCIE_PVDD, PCIE_VDDR, TSVDD, VDDR4, VDD_CT, DPE_PVDD, DP[F:E]_VDD18, DP[D:A]_PVDD, DP[D:A]_VDD18, AVDD, VDD1DI, A2VDDQ, VDD2DI, DPLL_PVDD, MPV18, and SPV18

DP[F:E]_VDD10, DP[D:A]_VDD10, DPLL_VDDC, and SPV10

PCIE_VDDC

VDDR3

BIF_VDDC (current consumption = 55mA@1.0V, in BACO mode)

VDDR1

VDDC/VDDCI

Voltage

1.8V

1.0V

3.3V

Same as VDDC

1.5V

TBD

PX 3.0

OFF

BACO Mode

ON

ON Same as PCIE_VDDC

OFF

1679mA

775mA

1.1A

60mA

70mA

1.2A

28

VDDC/VDDCI(1.12V)

VDD_CT(1.8V)

iGPU

PERSTb

REFCLK

B B

Straps Reset

Straps Valid

Global ASIC Reset

T4+16clock

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF COMP AL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF COMP AL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION IT CONTAIN S

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION IT CONTAIN S

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION IT CONTAIN S MAY BE USED BY OR DISCLOSED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

2011/04/18 2015/07/08

3

Compal Secret Data

Deciphered Date

PE_GPIO0(PXS_RST#) PE_EN

dGPU

BIF_VDDC

PE_GPIO1(PXS_PWREN )

+3.3VALW

+1.5V

+5VLAW

MOS

LDO

Regulator

2

+3.3VGS

1

+1.0VGS

2

+1.8VGS

5

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

BACO Switch

PX_mode

+1.5V

SI4800

+B

Regulator

dGPU Block Diagram

LA-8124P

3

4

1

+1.5VGS

+VGA_CORE

PWRGOOD

4 50Monday, January 16, 2012

0.4

A

B

C

D

E

PCIE_CRX_GTX_P[0..15]17

JCPU1A

PCI EXPRESS

P_GFX_RXP0 P_GFX_RXN0 P_GFX_RXP1 P_GFX_RXN1 P_GFX_RXP2 P_GFX_RXN2 P_GFX_RXP3 P_GFX_RXN3 P_GFX_RXP4 P_GFX_RXN4 P_GFX_RXP5 P_GFX_RXN5 P_GFX_RXP6 P_GFX_RXN6 P_GFX_RXP7 P_GFX_RXN7 P_GFX_RXP8 P_GFX_RXN8 P_GFX_RXP9 P_GFX_RXN9 P_GFX_RXP10 P_GFX_RXN10 P_GFX_RXP11 P_GFX_RXN11 P_GFX_RXP12 P_GFX_RXN12 P_GFX_RXP13 P_GFX_RXN13 P_GFX_RXP14 P_GFX_RXN14 P_GFX_RXP15 P_GFX_RXN15

P_GPP_RXP0 P_GPP_RXN0 P_GPP_RXP1 P_GPP_RXN1 P_GPP_RXP2 P_GPP_RXN2 P_GPP_RXP3 P_GPP_RXN3

P_UMI_RXP0 P_UMI_RXN0 P_UMI_RXP1 P_UMI_RXN1 P_UMI_RXP2 P_UMI_RXN2 P_UMI_RXP3 P_UMI_RXN3

P_ZVDDP

LOTES_ACA-ZIF-109-P12-A_FS1R2

CONN@

GPP GRAPHICS

UMI

P_GFX_TXP0 P_GFX_TXN0 P_GFX_TXP1 P_GFX_TXN1 P_GFX_TXP2 P_GFX_TXN2 P_GFX_TXP3 P_GFX_TXN3 P_GFX_TXP4 P_GFX_TXN4 P_GFX_TXP5 P_GFX_TXN5 P_GFX_TXP6 P_GFX_TXN6 P_GFX_TXP7 P_GFX_TXN7 P_GFX_TXP8 P_GFX_TXN8 P_GFX_TXP9

P_GFX_TXN9 P_GFX_TXP10 P_GFX_TXN10 P_GFX_TXP11 P_GFX_TXN11 P_GFX_TXP12 P_GFX_TXN12 P_GFX_TXP13 P_GFX_TXN13 P_GFX_TXP14 P_GFX_TXN14 P_GFX_TXP15 P_GFX_TXN15

P_GPP_TXP0

P_GPP_TXN0

P_GPP_TXP1

P_GPP_TXN1

P_GPP_TXP2

P_GPP_TXN2

P_GPP_TXP3

P_GPP_TXN3

P_UMI_TXP0 P_UMI_TXN0 P_UMI_TXP1 P_UMI_TXN1 P_UMI_TXP2 P_UMI_TXN2 P_UMI_TXP3 P_UMI_TXN3

P_ZVSS

AB2

PCIE_CTX_C_GRX_P0

AB1

PCIE_CTX_C_GRX_N0

AA3

PCIE_CTX_C_GRX_P1

AA2

PCIE_CTX_C_GRX_N1

Y5

PCIE_CTX_C_GRX_P2

Y4

PCIE_CTX_C_GRX_N2

Y2

PCIE_CTX_C_GRX_P3

Y1

PCIE_CTX_C_GRX_N3

W3

PCIE_CTX_C_GRX_P4

W2

PCIE_CTX_C_GRX_N4

V5

PCIE_CTX_C_GRX_P5

V4

PCIE_CTX_C_GRX_N5

V2

PCIE_CTX_C_GRX_P6

V1

PCIE_CTX_C_GRX_N6

U3

PCIE_CTX_C_GRX_P7

U2

PCIE_CTX_C_GRX_N7

T5

PCIE_CTX_C_GRX_P8

T4

PCIE_CTX_C_GRX_N8

T2

PCIE_CTX_C_GRX_P9

T1

PCIE_CTX_C_GRX_N9

R3

PCIE_CTX_C_GRX_P10

R2

PCIE_CTX_C_GRX_N10

P5

PCIE_CTX_C_GRX_P11

P4

PCIE_CTX_C_GRX_N11

P2

PCIE_CTX_C_GRX_P12

P1

PCIE_CTX_C_GRX_N12

N3

PCIE_CTX_C_GRX_P13

N2

PCIE_CTX_C_GRX_N13

M5

PCIE_CTX_C_GRX_P14

M4

PCIE_CTX_C_GRX_N14

M2

PCIE_CTX_C_GRX_P15

M1

PCIE_CTX_C_GRX_N15

AD5

PCIE_CTX_C_DRX_P0

AD4

PCIE_CTX_C_DRX_N0

AD2

PCIE_CTX_C_DRX_P1

AD1

PCIE_CTX_C_DRX_N1

AC3 AC2 AB5

PCIE_CTX_C_DRX_P3

AB4

PCIE_CTX_C_DRX_N3

AG2

UMI_TXP0_C

AG3

UMI_TXN0_C

AF4

UMI_TXP1_C

AF5

UMI_TXN1_C

AF1

UMI_TXP2_C

AF2

UMI_TXN2_C

AE2

UMI_TXP3_C

AE3

UMI_TXN3_C

AH11

P_ZVSS

1 2

R2 196_0402_1%R2 196_0402_1%

P_ZVDDP

AG11

AB8 AB7 AA9 AA8 AA5 AA6

Y8

Y7 W9 W8 W5 W6

V8 V7 U9 U8 U5 U6

T8

T7

R9 R8 R5 R6 P8 P7 N9 N8 N5 N6 M8 M7

AE5 AE6 AD8 AD7 AC9 AC8 AC5 AC6

AG8 AG9 AG6 AG5 AF7 AF8 AE8 AE9

PCIE_CRX_GTX_P0 PCIE_CRX_GTX_N0 PCIE_CRX_GTX_P1 PCIE_CRX_GTX_N1

1 1

PCIE_CRX_DTX_P035 PCIE_CRX_DTX_N035

LAN

PCIE_CRX_DTX_P133 PCIE_CRX_DTX_N133

2 2

WLAN

Card Reader

PCIE_CRX_DTX_P335 PCIE_CRX_DTX_N335

UMI_RXP012 UMI_RXN012 UMI_RXP112 UMI_RXN112 UMI_RXP212 UMI_RXN212 UMI_RXP312 UMI_RXN312

+1.2VS

PCIE_CRX_GTX_P2 PCIE_CRX_GTX_N2 PCIE_CRX_GTX_P3 PCIE_CRX_GTX_N3 PCIE_CRX_GTX_P4 PCIE_CRX_GTX_N4 PCIE_CRX_GTX_P5 PCIE_CRX_GTX_N5 PCIE_CRX_GTX_P6 PCIE_CRX_GTX_N6 PCIE_CRX_GTX_P7 PCIE_CRX_GTX_N7 PCIE_CRX_GTX_P8 PCIE_CRX_GTX_N8 PCIE_CRX_GTX_P9 PCIE_CRX_GTX_N9 PCIE_CRX_GTX_P10 PCIE_CRX_GTX_N10 PCIE_CRX_GTX_P11 PCIE_CRX_GTX_N11 PCIE_CRX_GTX_P12 PCIE_CRX_GTX_N12 PCIE_CRX_GTX_P13 PCIE_CRX_GTX_N13 PCIE_CRX_GTX_P14 PCIE_CRX_GTX_N14 PCIE_CRX_GTX_P15 PCIE_CRX_GTX_N15

1 2

R1 196_0402_1%R1 196_0402_1%

1 2

C1 .1U_0402_16V7KDIS@C1 .1U_0402_16V7KDIS@

1 2

C2 .1U_0402_16V7KDIS@C2 .1U_0402_16V7KDIS@

1 2

C3 .1U_0402_16V7KDIS@C3 .1U_0402_16V7KDIS@

1 2

C4 .1U_0402_16V7KDIS@C4 .1U_0402_16V7KDIS@

1 2

C5 .1U_0402_16V7KDIS@C5 .1U_0402_16V7KDIS@

1 2

C6 .1U_0402_16V7KDIS@C6 .1U_0402_16V7KDIS@

1 2

C7 .1U_0402_16V7KDIS@C7 .1U_0402_16V7KDIS@

1 2

C8 .1U_0402_16V7KDIS@C8 .1U_0402_16V7KDIS@

1 2

C9 .1U_0402_16V7KDIS@C9 .1U_0402_16V7KDIS@

1 2

C10 .1U_0402_16V7KDIS@C10 .1U_0402_16V7KDIS@

1 2

C11 .1U_0402_16V7KDIS@C11 .1U_0402_16V7KDIS@

1 2

C12 .1U_0402_16V7KDIS@C12 .1U_0402_16V7KDIS@

1 2

C13 .1U_0402_16V7KDIS@C13 .1U_0402_16V7KDIS@

1 2

C14 .1U_0402_16V7KDIS@C14 .1U_0402_16V7KDIS@

1 2

C15 .1U_0402_16V7KDIS@C15 .1U_0402_16V7KDIS@

1 2

C16 .1U_0402_16V7KDIS@C16 .1U_0402_16V7KDIS@

1 2

C17 .1U_0402_16V7KDIS@C17 .1U_0402_16V7KDIS@

1 2

C18 .1U_0402_16V7KDIS@C18 .1U_0402_16V7KDIS@

1 2

C19 .1U_0402_16V7KDIS@C19 .1U_0402_16V7KDIS@

1 2

C20 .1U_0402_16V7KDIS@C20 .1U_0402_16V7KDIS@

1 2

C21 .1U_0402_16V7KDIS@C21 .1U_0402_16V7KDIS@

1 2

C22 .1U_0402_16V7KDIS@C22 .1U_0402_16V7KDIS@

1 2

C23 .1U_0402_16V7KDIS@C23 .1U_0402_16V7KDIS@

1 2

C24 .1U_0402_16V7KDIS@C24 .1U_0402_16V7KDIS@

1 2

C25 .1U_0402_16V7KDIS@C25 .1U_0402_16V7KDIS@

1 2

C26 .1U_0402_16V7KDIS@C26 .1U_0402_16V7KDIS@

1 2

C27 .1U_0402_16V7KDIS@C27 .1U_0402_16V7KDIS@

1 2

C28 .1U_0402_16V7KDIS@C28 .1U_0402_16V7KDIS@

1 2

C29 .1U_0402_16V7KDIS@C29 .1U_0402_16V7KDIS@

1 2

C30 .1U_0402_16V7KDIS@C30 .1U_0402_16V7KDIS@

1 2

C31 .1U_0402_16V7KDIS@C31 .1U_0402_16V7KDIS@

1 2

C32 .1U_0402_16V7KDIS@C32 .1U_0402_16V7KDIS@

1 2

C33 . 1U_0402_16V7KC33 .1U_0402_16 V7K

1 2

C34 . 1U_0402_16V7KC34 .1U_0402_16 V7K

1 2

C123 .1U_0402_16V7KC123 .1U_0402_16V7K

1 2

C124 .1U_0402_16V7KC124 .1U_0402_16V7K

1 2

C35 . 1U_0402_16V7KC35 .1U_0402_16 V7K

1 2

C36 . 1U_0402_16V7KC36 .1U_0402_16 V7K

1 2

C37 . 1U_0402_16V7KC37 .1U_0402_16 V7K

1 2

C38 . 1U_0402_16V7KC38 .1U_0402_16 V7K

1 2

C39 . 1U_0402_16V7KC39 .1U_0402_16 V7K

1 2

C40 . 1U_0402_16V7KC40 .1U_0402_16 V7K

1 2

C41 . 1U_0402_16V7KC41 .1U_0402_16 V7K

1 2

C42 .1U_0402_16V7KC42 .1U_0402_16V7K

1 2

C43 . 1U_0402_16V7KC43 .1U_0402_16 V7K

1 2

C44 . 1U_0402_16V7KC44 .1U_0402_16 V7K

PCIE_CTX_GRX_P0 PCIE_CTX_GRX_N0 PCIE_CTX_GRX_P1 PCIE_CTX_GRX_N1 PCIE_CTX_GRX_P2 PCIE_CTX_GRX_N2 PCIE_CTX_GRX_P3 PCIE_CTX_GRX_N3 PCIE_CTX_GRX_P4 PCIE_CTX_GRX_N4 PCIE_CTX_GRX_P5 PCIE_CTX_GRX_N5 PCIE_CTX_GRX_P6 PCIE_CTX_GRX_N6 PCIE_CTX_GRX_P7 PCIE_CTX_GRX_N7 PCIE_CTX_GRX_P8 PCIE_CTX_GRX_N8 PCIE_CTX_GRX_P9 PCIE_CTX_GRX_N9 PCIE_CTX_GRX_P10 PCIE_CTX_GRX_N10 PCIE_CTX_GRX_P11 PCIE_CTX_GRX_N11 PCIE_CTX_GRX_P12 PCIE_CTX_GRX_N12 PCIE_CTX_GRX_P13 PCIE_CTX_GRX_N13 PCIE_CTX_GRX_P14 PCIE_CTX_GRX_N14 PCIE_CTX_GRX_P15 PCIE_CTX_GRX_N15

PCIE_CTX_GRX_P[0..15] 17

PCIE_CTX_GRX_N[0..15] 17PCIE_CRX_GTX_N[0..15]17

PCIE_CTX_DRX_P0 35 PCIE_CTX_DRX_N0 35 PCIE_CTX_DRX_P1 33 PCIE_CTX_DRX_N1 33

PCIE_CTX_DRX_P3 35 PCIE_CTX_DRX_N3 35

UMI_TXP0 12 UMI_TXN0 12 UMI_TXP1 12 UMI_TXN1 12 UMI_TXP2 12 UMI_TXN2 12 UMI_TXP3 12 UMI_TXN3 12

3 3

Power Sequence of APU

+1.5V

+2.5VS

+1.5VS

+APU_CORE

4 4

+APU_CORE_NB

+1.2VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/04/18 2015/07/08

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

FS1r2 PCIE/UMI

LA-8121P

E

5 50Monday, January 16, 2 012

Group A

Group B

0.4

A

1 1

JCPU1B

MEMORY CHANNEL A

DDRA_SMA[15..0]10

DDRA_SBS0#10 DDRA_SBS1#10 DDRA_SBS2#10 DDRA_SDM[7..0]10

2 2

DDRA_SDQS010 DDRA_SDQS0#10 DDRA_SDQS110 DDRA_SDQS1#10 DDRA_SDQS210 DDRA_SDQS2#10 DDRA_SDQS310 DDRA_SDQS3#10 DDRA_SDQS410 DDRA_SDQS4#10 DDRA_SDQS510 DDRA_SDQS5#10 DDRA_SDQS610 DDRA_SDQS6#10 DDRA_SDQS710 DDRA_SDQS7#10

DDRA_CLK010 DDRA_CLK0#10 DDRA_CLK110 DDRA_CLK1#10

DDRA_CKE010 DDRA_CKE110

DDRA_ODT010 DDRA_ODT110

3 3

DDRA_SCS0#10 DDRA_SCS1#10

DDRA_SRAS#10 DDRA_SCAS#10 DDRA_SWE#10

MEM_MA_RST#10 MEM_MA_EVENT#10

+MEM_VREF

+1.5V

15mil

Place them close to APU within 1"

DDRA_SMA0 DDRA_SMA1 DDRA_SMA2 DDRA_SMA3 DDRA_SMA4 DDRA_SMA5 DDRA_SMA6 DDRA_SMA7 DDRA_SMA8 DDRA_SMA9 DDRA_SMA10 DDRA_SMA11 DDRA_SMA12 DDRA_SMA13 DDRA_SMA14 DDRA_SMA15

DDRA_SBS0# DDRA_SBS1# DDRA_SBS2#

DDRA_SDM0 DDRA_SDM1 DDRA_SDM2 DDRA_SDM3 DDRA_SDM4 DDRA_SDM5 DDRA_SDM6 DDRA_SDM7

DDRA_SDQS0 DDRA_SDQS0# DDRA_SDQS1 DDRA_SDQS1# DDRA_SDQS2 DDRA_SDQS2# DDRA_SDQS3 DDRA_SDQS3# DDRA_SDQS4 DDRA_SDQS4# DDRA_SDQS5 DDRA_SDQS5# DDRA_SDQS6 DDRA_SDQS6# DDRA_SDQS7 DDRA_SDQS7#

DDRA_CLK0 DDRA_CLK0# DDRA_CLK1 DDRA_CLK1#

DDRA_CKE0 DDRA_CKE1

DDRA_ODT0 DDRA_ODT1

DDRA_SCS0# DDRA_SCS1#

DDRA_SRAS# DDRA_SCAS# DDRA_SWE#

MEM_MA_RST#

MEM_MA_EVENT#

1 2

R3 39.2_0402_1%R3 39.2_0402_1%

M_ZVDDIO

AA25

AD27 AC23 AD19 AC15

AE26 AD26 AB22 AA22 AB18 AA18 AA14 AA15

AA27

AA26

W24 W23

W20

W21

U20 R20 R21 P22 P21 N24 N23 N20 N21 M21 U23 M22

L24

L21 L20

U24 U21

L23

E14

J17 E21 F25

G14 H14 G18 H18

J21 H21 E27 E26

T21 T22 R23 R24

H28 H27

Y25

V22

V21

H25 T24

MEMORY CHANNEL A

MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15

MA_BANK0 MA_BANK1 MA_BANK2

MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7

MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7

MA_CLK_H0 MA_CLK_L0 MA_CLK_H1 MA_CLK_L1

MA_CKE0 MA_CKE1

MA_ODT0 MA_ODT1

MA_CS_L0 MA_CS_L1

MA_RAS_L MA_CAS_L MA_WE_L

MA_RESET_L MA_EVENT_L

M_VREF

M_ZVDDIO

LOTES_ACA-ZIF-109-P12-A_FS1R2

CONN@

B

MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7

MA_DATA8

MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15

MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23

MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31

MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39

MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47

MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55

MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63

E13 J13 H15 J15 H13 F13 F15 E15

H17 F17 E19 J19 G16 H16 H19 F19

H20 F21 J23 H23 G20 E20 G22 H22

G24 E25 G27 G26 F23 H24 E28 F27

AB28 AC27 AD25 AA24 AE28 AD28 AB26 AC25

Y23 AA23 Y21 AA20 AB24 AD24 AA21 AC21

AA19 AC19 AC17 AA17 AB20 Y19 AD18 AD17

AA16 Y15 AA13 AC13 Y17 AB16 AB14 Y13

DDRA_SDQ0 DDRA_SDQ1 DDRA_SDQ2 DDRA_SDQ3 DDRA_SDQ4 DDRA_SDQ5 DDRA_SDQ6 DDRA_SDQ7

DDRA_SDQ8 DDRA_SDQ9 DDRA_SDQ10 DDRA_SDQ11 DDRA_SDQ12 DDRA_SDQ13 DDRA_SDQ14 DDRA_SDQ15

DDRA_SDQ16 DDRA_SDQ17 DDRA_SDQ18 DDRA_SDQ19 DDRA_SDQ20 DDRA_SDQ21 DDRA_SDQ22 DDRA_SDQ23

DDRA_SDQ24 DDRA_SDQ25 DDRA_SDQ26 DDRA_SDQ27 DDRA_SDQ28 DDRA_SDQ29 DDRA_SDQ30 DDRA_SDQ31

DDRA_SDQ32 DDRA_SDQ33 DDRA_SDQ34 DDRA_SDQ35 DDRA_SDQ36 DDRA_SDQ37 DDRA_SDQ38 DDRA_SDQ39

DDRA_SDQ40 DDRA_SDQ41 DDRA_SDQ42 DDRA_SDQ43 DDRA_SDQ44 DDRA_SDQ45 DDRA_SDQ46 DDRA_SDQ47

DDRA_SDQ48 DDRA_SDQ49 DDRA_SDQ50 DDRA_SDQ51 DDRA_SDQ52 DDRA_SDQ53 DDRA_SDQ54 DDRA_SDQ55

DDRA_SDQ56 DDRA_SDQ57 DDRA_SDQ58 DDRA_SDQ59 DDRA_SDQ60 DDRA_SDQ61 DDRA_SDQ62 DDRA_SDQ63

DDRA_SDQ[63..0] 10

C

DDRB_SMA[15..0]11

DDRB_SBS0#11 DDRB_SBS1#11 DDRB_SBS2#11 DDRB_SDM[7..0]11

DDRB_SDQS011 DDRB_SDQS0#1 1 DDRB_SDQS111 DDRB_SDQS1#1 1 DDRB_SDQS211 DDRB_SDQS2#1 1 DDRB_SDQS311 DDRB_SDQS3#1 1 DDRB_SDQS411 DDRB_SDQS4#1 1 DDRB_SDQS511 DDRB_SDQS5#1 1 DDRB_SDQS611 DDRB_SDQS6#1 1 DDRB_SDQS711 DDRB_SDQS7#1 1

DDRB_CLK011 DDRB_CLK0#11 DDRB_CLK111 DDRB_CLK1#11

DDRB_CKE011 DDRB_CKE111

DDRB_ODT011 DDRB_ODT111

DDRB_SCS0#11 DDRB_SCS1#11

DDRB_SRAS#11 DDRB_SCAS#11 DDRB_SWE#11

MEM_MB_RST#11 MEM_MB_EVENT#11

DDRB_SMA0 DDRB_SMA1 DDRB_SMA2 DDRB_SMA3 DDRB_SMA4 DDRB_SMA5 DDRB_SMA6 DDRB_SMA7 DDRB_SMA8 DDRB_SMA9 DDRB_SMA10 DDRB_SMA11 DDRB_SMA12 DDRB_SMA13 DDRB_SMA14 DDRB_SMA15

DDRB_SBS0# DDRB_SBS1# DDRB_SBS2#

DDRB_SDM0 DDRB_SDM1 DDRB_SDM2 DDRB_SDM3 DDRB_SDM4 DDRB_SDM5 DDRB_SDM6 DDRB_SDM7

DDRB_SDQS0 DDRB_SDQS0# DDRB_SDQS1 DDRB_SDQS1# DDRB_SDQS2 DDRB_SDQS2# DDRB_SDQS3 DDRB_SDQS3# DDRB_SDQS4 DDRB_SDQS4# DDRB_SDQS5 DDRB_SDQS5# DDRB_SDQS6 DDRB_SDQS6# DDRB_SDQS7 DDRB_SDQS7#

DDRB_CLK0 DDRB_CLK0# DDRB_CLK1 DDRB_CLK1#

DDRB_CKE0 DDRB_CKE1

DDRB_ODT0 DDRB_ODT1

DDRB_SCS0# DDRB_SCS1#

DDRB_SRAS# DDRB_SCAS# DDRB_SWE#

MEM_MB_RST# MEM_MB_EVENT#

D

JCPU1C

MEMORY CHANNEL B

MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8 MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15

MB_BANK0 MB_BANK1 MB_BANK2

MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7

MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7

MB_CLK_H0 MB_CLK_L0 MB_CLK_H1 MB_CLK_L1

MB_CKE0 MB_CKE1

MB_ODT0 MB_ODT1

MB_CS_L0 MB_CS_L1

MB_RAS_L MB_CAS_L MB_WE_L

MB_RESET_L MB_EVENT_L

LOTES_ACA-ZIF-109-P12-A_FS1R2

CONN@

W26

AF25 AG22 AH18 AD14

AG24 AG25 AG21 AF21 AG17 AG18 AH14 AG14

W27

T27 P24 P25 N27 N26 M28 M27 M24 M25

L26

U26

L27

K27

K25

K24

U27

T28

K28

D14

A18

A22

C25

C15

B15

E18

D18

E22

D22

B26

A26

R26

R27

P27

P28

J26

J27

Y28

V25

Y27

V24

V27

V28

J25

T25

MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7

MB_DATA8

MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15

MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23

MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31

MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39

MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47

MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55

MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63

A14 B14 D16 E16 B13 C13 B16 A16

C17 B18 B20 A20 E17 B17 B19 C19

C21 B22 C23 A24 D20 B21 E23 B23

E24 B25 B27 D28 B24 D24 D26 C27

AG26 AH26 AF23 AG23 AG27 AF27 AH24 AE24

AE22 AH22 AE20 AH20 AD23 AD22 AD21 AD20

AF19 AE18 AE16 AH16 AG20 AG19 AF17 AD16

AG15 AD15 AG13 AD13 AG16 AF15 AE14 AF13

DDRB_SDQ0 DDRB_SDQ1 DDRB_SDQ2 DDRB_SDQ3 DDRB_SDQ4 DDRB_SDQ5 DDRB_SDQ6 DDRB_SDQ7

DDRB_SDQ8 DDRB_SDQ9 DDRB_SDQ10 DDRB_SDQ11 DDRB_SDQ12 DDRB_SDQ13 DDRB_SDQ14 DDRB_SDQ15

DDRB_SDQ16 DDRB_SDQ17 DDRB_SDQ18 DDRB_SDQ19 DDRB_SDQ20 DDRB_SDQ21 DDRB_SDQ22 DDRB_SDQ23

DDRB_SDQ24 DDRB_SDQ25 DDRB_SDQ26 DDRB_SDQ27 DDRB_SDQ28 DDRB_SDQ29 DDRB_SDQ30 DDRB_SDQ31

DDRB_SDQ32 DDRB_SDQ33 DDRB_SDQ34 DDRB_SDQ35 DDRB_SDQ36 DDRB_SDQ37 DDRB_SDQ38 DDRB_SDQ39

DDRB_SDQ40 DDRB_SDQ41 DDRB_SDQ42 DDRB_SDQ43 DDRB_SDQ44 DDRB_SDQ45 DDRB_SDQ46 DDRB_SDQ47

DDRB_SDQ48 DDRB_SDQ49 DDRB_SDQ50 DDRB_SDQ51 DDRB_SDQ52 DDRB_SDQ53 DDRB_SDQ54 DDRB_SDQ55

DDRB_SDQ56 DDRB_SDQ57 DDRB_SDQ58 DDRB_SDQ59 DDRB_SDQ60 DDRB_SDQ61 DDRB_SDQ62 DDRB_SDQ63

E

DDRB_SDQ[63..0] 1 1

EVENT# pull high 0.75V reference voltage

+1.5V

4 4

1 2

R5 1K_0402_5%R5 1K_0402_5%

1 2

R6 1K_0402_5%R6 1K_0402_5%

MEM_MA_EVENT#

MEM_MB_EVENT# +MEM_VREF

A

R4

1K_0402_1%

R7

1K_0402_1%

+1.5V

1 2

1

C45

C45 1000P_0402_50V7K

1000P_0402_50V7K

2

1 2

B

15mil

2

C46

C46 .1U_0402_16V7K

.1U_0402_16V7K

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/04/18 2015/07/08

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

FS1r2 DDRIII Memory I/F

LA-8121P

6 50Monday, January 16, 2 012

E

0.4

A

Place near APU

1 2

DP0_TXP0_C25 DP0_TXN0_C25

1 1

2 2

+1.5V

3 3

4 4

1 2

R49 1K_0402_5%R49 1K_0402_5%

1 2

R52 1K_0402_5%R52 1K_0402_5%

1 2

R32 1K_0402_5%R32 1K_0402_5%

1 2

R37 1K_0402_5%R37 1K_0402_5%

1 2

R39 1K_0402_5%R39 1K_0402_5%

R36 1K_0402_5%R36 1K_0402_5%

1 2

R33 1K_0402_5%@R33 1K_0402_5%@

1 2

R38 1K_0402_5%@R38 1K_0402_5%@

1 2

R40 1K_0402_5%@R40 1K_0402_5%@

1 2

R41 1K_0402_5%R41 1K_0402_5%

1 2

R43 1K_0402_5%R43 1K_0402_5%

1 2

R46 1K_0402_5%R46 1K_0402_5%

+1.5VS

1 2

R54 300_0402_5%R54 300_0402_5%

1 2

R57 300_0402_5%R57 300_0402_5%

+3VS

1 2

R60 10K_0402_5%R60 10K_0402_5%

1 2

R61 10K_0402_5%R61 10K_0402_5%

Aux signal are re-configured as I2C signals for DDC. APU AUX pin are 3.3V tolerant Default follow PAWGX setting for pull-high resistor value

ML_VGA_TXP013 ML_VGA_TXN01 3

ML_VGA_TXP113 ML_VGA_TXN11 3

ML_VGA_TXP213 ML_VGA_TXN21 3

ML_VGA_TXP313 ML_VGA_TXN31 3

HDMI_TX2P27 HDMI_TX2N27

HDMI_TX1P27 HDMI_TX1N27

HDMI_TX0P27 HDMI_TX0N27

HDMI_CLKP27 HDMI_CLKN27

Route as differential with VSS_SENSE

ALLOW_STOP

APU_DBREQ#

12

APU_TRST#

APU_RST#

APU_PWRGD

A

APU_TCK

APU_TMS

APU_TDI

APU_SVT

APU_SVC

APU_SVD

APU_SIC

APU_SID

ALERT_L

HDMI_CLK

HDMI_DATA

C52 .1U_0402_16V7KC52 .1U_0402_16V7K

1 2

C47 .1U_0402_16V7KC47 .1U_0402_16V7K

1 2

C61 .1U_0402_16V7KC61 .1U_0402_16V7K

1 2

C62 .1U_0402_16V7KC62 .1U_0402_16V7K

1 2

C63 .1U_0402_16V7KC63 .1U_0402_16V7K

1 2

C64 .1U_0402_16V7KC64 .1U_0402_16V7K

1 2

C65 .1U_0402_16V7KC65 .1U_0402_16V7K

1 2

C66 .1U_0402_16V7KC66 .1U_0402_16V7K

1 2

C67 .1U_0402_16V7KC67 .1U_0402_16V7K

1 2

C68 .1U_0402_16V7KC68 .1U_0402_16V7K

1 2

C50 .1U_0402_16V7KC50 .1U_0402_16V7K

1 2

C51 .1U_0402_16V7KC51 .1U_0402_16V7K

1 2

C55 .1U_0402_16V7KC55 .1U_0402_16V7K

1 2

C56 .1U_0402_16V7KC56 .1U_0402_16V7K

1 2

C57 .1U_0402_16V7KC57 .1U_0402_16V7K

1 2

C58 .1U_0402_16V7KC58 .1U_0402_16V7K

1 2

C59 .1U_0402_16V7KC59 .1U_0402_16V7K

1 2

C60 .1U_0402_16V7KC60 .1U_0402_16V7K

APU_CLK12 APU_CLK#12

APU_DISP_CLK12 APU_DISP_CLK#12

APU_SVC45 APU_SVD45

APU_SVT45

T32T32

APU_RST#1 2 APU_PWRGD12,45

APU_PROCHOT#1 2

APU_VDD_SEN_L4 5

APU_VDDNB_SEN45

APU_VDD_SEN_H45

T33T33

T23T23 T24T24 T25T25 T26T26 T27T27 T28T28 T29T29

APU_RST# APU_PWRGD

APU_PROCHOT# APU_THERMTRIP# ALERT_L

APU_TDI APU_TDO APU_TCK APU_TMS APU_TRST# APU_DBRDY APU_DBREQ#

APU_VDD_SEN_L

APU_VDDNB_SEN

APU_VDD_SEN_H

FVT, NO.37

APU_CLK APU_CLK#

APU_DISP_CLK APU_DISP_CLK#

APU_SIC APU_SID

T20T20

T21T21

DP0_TXP0 DP0_TXN0

DP1_TXP0 DP1_TXN0

DP1_TXP1 DP1_TXN1

DP1_TXP2 DP1_TXN2

DP1_TXP3 DP1_TXN3

DP2_TXP0 DP2_TXN0

DP2_TXP1 DP2_TXN1

DP2_TXP2 DP2_TXN2

DP2_TXP3 DP2_TXN3

B

ANALOG/DISPLAY/MISC

DP0_TXP0 DP0_TXN0

DP0_TXP1 DP0_TXN1

DP0_TXP2 DP0_TXN2

DP0_TXP3 DP0_TXN3

DP1_TXP0 DP1_TXN0

DP1_TXP1 DP1_TXN1

To FCH

DP1_TXP2 DP1_TXN2

DP1_TXP3 DP1_TXN3

DP2_TXP0 DP2_TXN0

DP2_TXP1

HDMI

DP2_TXN1

DP2_TXP2 DP2_TXN2

DP2_TXP3 DP2_TXN3

CLKIN_H CLKIN_L

DISP_CLKIN_H DISP_CLKIN_L

SVC SVD

SVT

SIC SID

RESET_L PWROK

PROCHOT_L THERMTRIP_L ALERT_L

TDI TDO TCK TMS TRST_L DBRDY DBREQ_L

VSS_SENSE VDDP_SENSE VDDNB_SENSE VDDIO_SENSE VDD_SENSE VDDR_SENSE

LOTES_ACA-ZIF-109-P12-A_FS1R2

CONN@

+3VS

AE11

AD11

AB11 AA11

AG12 AH12

AF10 AB12

AC10

AE12 AF12

L3 L2

K5 K4

K2 K1

J3 J2

H5 H4

H2 H1

G3 G2

F2 F1

L9 L8

L5 L6

K8 K7

J6 J5

B3 A3

C3

H10

J10 F10

G10

F9 G9 H9

B4 C5

A4

A5 C4

B5

SIT, NO.3

APU_SIC

B

LVDS

JCPU1D

DISPLAY PORT 0

DISPLAY PORT MISC.

DISPLAY PORT 2 DISPLAY PORT 1

TEST

CTRL SER. CLK

JTAG

SENSE

1 2

R34

31.6K_0402_1%

D1

DP0_AUXP

D2

DP0_AUXN

E1

DP1_AUXP

E2

DP1_AUXN

D5

DP2_AUXP

D6

DP2_AUXN

E5

DP3_AUXP

E6

DP3_AUXN

F5

DP4_AUXP

F6

DP4_AUXN

G5

DP5_AUXP

G6

DP5_AUXN

D3

DP0_HPD

E3

DP1_HPD

D7

DP2_HPD

E7

DP3_HPD

F7

DP4_HPD

G7

DP5_HPD

C6

DP_BLON

B6

DP_DIGON

DP_VARY_BL

DP_AUX_ZVSS

DMAACTIVE_L

RSVD

A6

C1

AD12

TEST6

M18

TEST9

N18

TEST10

F11

TEST14

G11

TEST15

H11

TEST16

J11

TEST17

F12

TEST18

G12

TEST19

J12

TEST20

H12

TEST24

AE10

TEST25_H

AD10

TEST25_L

L10

TEST28_H

M10

TEST28_L

P19

TEST30_H

R19

TEST30_L

K22

TEST31

T19

TEST32_H

N19

TEST32_L

AA12

TEST35

W10

FS1R2

AC12

P18

TEST4

R18

TEST5

Y10

RSVD1

AA10

RSVD2

Y12

RSVD3

K21

RSVD4

@

1 2

C69 0.1U_0402_16V4Z

1 2

R35

30K_0402_1%

2

3 1

SGD

BSH111_SOT23-3

2

3 1

SGD

BSH111_SOT23-3

DP0_AUXP DP0_AUXN

ML_VGA_AUXP ML_VGA_AUXN

HDMI_CLK HDMI_DATA

LVDS_HPD ML_VGA_HPD HDMI_DET

DP_INT_PWM

DP_AUX_ZVSS

APU_TEST18 APU_TEST19 APU_TEST20 APU_TEST24 TEST25_H TEST25_L TEST28_H TEST28_L TEST30_H TEST30_L APU_TEST31

APU_TEST35

FS1R2 ALLOW_STOP

C

1 2

C53 . 1U_0402_16V7KC53 .1U_0402_16 V7K

1 2

C48 . 1U_0402_16V7KC48 .1U_0402_16 V7K

1 2

C54 . 1U_0402_16V7KC54 .1U_0402_16 V7K

1 2

C49 . 1U_0402_16V7KC49 .1U_0402_16 V7K

SIT, NO.4

LVDS_HPD 25 ML_VGA_HPD 13 HDMI_DET 27

DP_INT_PWM 9

1 2

R13 150_0402_1%R13 150_0402_1%

T1T1 T2T2 T3T3 T4T4 T5T5 T6T6

T14T14 T15T15 T7T7 T8T8

T9T9 T10T10

T30T30 T31T31

1 2

R14 1K_0402_5%R14 1K_0402_5%

1 2

R15 1K_0402_5%R15 1K_0402_5%

1 2

R16 1K_0402_5%R16 1K_0402_5%

1 2

R17 1K_0402_5%R17 1K_0402_5%

1 2

R20 510_0402_1%R20 510_0402_1%

1 2

R23 510_0402_1%R23 510_0402_1%

1 2

R25 39.2_0402_1%R25 39.2_0402_1%

1 2

R26 300_0402_5%R26 300_0402_5%

1 2

R27 300_0402_5%@R27 300_0402_5%@

1 2

R28 10K_0402_5%R28 10K_0402_5%

ALLOW_STOP 12

DP0_AUXP_C 25 DP0_AUXN_C 25

ML_VGA_AUXP_C 13 ML_VGA_AUXN_C 13

HDMI_CLK 27 HDMI_DATA 27

+1.2VS

+1.5V

+3VALW

To LVDS Translater

To FCH MainLink

To HDMI

Asserted as an input to force the processor into the HTC-active state

D

SDV2, NO.45

R12

1K_0402_5%

APU_PROCHOT#

THERMTRIP shutdown Temperature: 125 degree

ALERT_L

To FCH

+1.5V

1 2

R78 0_0402_5%@R78 0_0402_5%@

APU_THERMTRIP#

3 1

MMBT3904_NL_SOT23-3

CPU TSI interface level shift

BSH111, the Vgs is: min = 0.4V Max = 1.3V

Q4

EC_SMB_DAAPU_SID

1 2

R50

@ R50

@

0_0402_5%

Q5

EC_SMB_CK

1 2

R59

@ R59

@

0_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

@ R47

@

@ R58

@

R44

R47

R55

R58

1 2

0_0402_5%

1 2

0_0402_5%

1 2

0_0402_5%

1 2

0_0402_5%

2011/04/18 2015/07/08

EC_SMB_DA2 18,25,31,32,33

FCH_SID 14

EC_SMB_CK2 18,25,31,32,33

FCH_SIC 14

Compal Secret Data

Deciphered Date

To EC

To FCH

To EC

To FCH

D

E

If not used, pins are left unconnected (DG ref.) 20101111

ML_VGA_AUXP

R9 1.8K_0402_5%R9 1.8K_0402_5%

ML_VGA_AUXN

R8 1.8K_0402_5%R8 1.8K_0402_5%

DP0_AUXP

R79 1.8K_0402_5%R79 1.8K_0402_5%

DP0_AUXN

R81 1.8K_0402_5%R81 1.8K_0402_5%

H_PROCHOT#_EC: default low/a ctive high APU_PROCHOT# : default high/ active low H_PROCHOT#: default high/ ac tive low

Q7

13

2N7002K_SOT23-3

D

2

G

S

1 2

+1.5V

R21

1K_0402_5%

1 2

E

3 1

MMBT3904_NL_SOT23-3

+1.5V

12

R29

R29 10K_0402_5%@

10K_0402_5%@

B

2

Q3

@

Q3

@

E

C

R30 0_0402_5%@R30 0_0402_5%@

R31 0_0402_5%@R31 0_0402_5%@

Title

FS1r2 Display/MISC/HDT

Size Document Number Rev

Custom

Date: Sheet of

SIT, NO.16

Indicates to the FCH that a thermal trip has occurred. Its assertion will cause the FCH to transition the system to S5 immediately

12

R18

R18 10K_0402_5%

10K_0402_5%

B

2

Q2

C

1 2

Compal Electronics, Inc.

LA-8121P

12

H_THERMTRIP# 14

E

H_PROCHOT#_EC 31,38

H_PROCHOT# 38,45

APU_ALERT#_FCH 13

APU_ALERT#_EC 3 1

0.4

7 50Monday, January 16, 2 012

0.4

A

Power Name

VDD +APU_CORE

VDDNB +APU_CORE_NB

VDDIO +1.5V

VDDP / VDDR +1.2VS

VDDA

1 1

+2.5VS 0.5A

2 2

3 3

Consumption

5A / 3.5A

VDDR decoupling

180P_0402_50V8J

C104

C103

1

2

60A

44A

3.2A

180P_0402_50V8J

+APU_CORE

F8

VDD_1

H6

VDD_2

J1

VDD_3

J14

VDD_4

P6

VDD_5

P10

VDD_6

J16

VDD_7

J18

VDD_8

J9

VDD_9

K19

VDD_10

K3

VDD_11

K17

VDD_12

M3

VDD_13

K6

VDD_14

V10

VDD_15

V18

VDD_16

V3

VDD_17

F3

VDD_18

L18

VDD_19

V6

VDD_20

W1

VDD_21

T18

VDD_22

Y14

VDD_23

AA1

VDD_24

AB6

VDD_25

AC1

VDD_26

R1

VDD_27

P3

VDD_28

K10

VDD_29

H3

VDD_30

M19

VDD_31

+APU_CORE_NB

+1.5V

+1.2VS

C106

0.22U_0402_6.3V6K

C106

0.22U_0402_6.3V6K

C105

0.22U_0402_6.3V6K

C105

0.22U_0402_6.3V6K

1

2

C8

VDDNB_1

D10

VDDNB_2

B8

VDDNB_3

B12

VDDNB_4

C9

VDDNB_5

A9

VDDNB_6

A10

VDDNB_7

A8

VDDNB_8

A11

VDDNB_9

E10

VDDNB_10

E11

VDDNB_11

C10

VDDNB_12

H26

VDDIO_1

K20

VDDIO_2

J28

VDDIO_3

K23

VDDIO_4

K26

VDDIO_5

L22

VDDIO_6

L25

VDDIO_7

L28

VDDIO_8

M20

VDDIO_9

M23

VDDIO_10

M26

VDDIO_11

N22

VDDIO_12

N25

VDDIO_13

N28

VDDIO_14

P20

VDDIO_15

P23

VDDIO_16

P26

VDDIO_17

AA28

VDDIO_18

AH6

VDDP_1

AH5

VDDP_2

AH4

VDDP_3

AH3

VDDP_4

AH7

VDDP_5

AB10

VDDA

LOTES_ACA-ZIF-109-P12-A_FS1R2

CONN@

JCPU1E

VDDNB_13 VDDNB_14 VDDNB_15 VDDNB_16 VDDNB_17 VDDNB_18 VDDNB_19 VDDNB_20 VDDNB_21 VDDNB_22 VDDNB_23

VDDNB_CAP_1 VDDNB_CAP_2

VDDIO_19 VDDIO_20 VDDIO_21 VDDIO_22 VDDIO_23 VDDIO_24 VDDIO_25 VDDIO_26 VDDIO_27 VDDIO_28 VDDIO_29 VDDIO_30 VDDIO_31 VDDIO_32 VDDIO_33 VDDIO_34 VDDIO_35 VDDIO_36

VDDR_1 VDDR_2 VDDR_3 VDDR_4

VDD_32 VDD_33 VDD_34 VDD_35 VDD_36 VDD_37 VDD_38 VDD_39 VDD_40 VDD_41 VDD_42 VDD_43 VDD_44 VDD_45 VDD_46 VDD_47 VDD_48 VDD_49 VDD_50 VDD_51 VDD_52 VDD_53 VDD_54 VDD_55 VDD_56 VDD_57 VDD_58 VDD_59 VDD_60 VDD_61 VDD_62

B

+APU_CORE

R11 T10 H8 G1 U11 W11 W13 W15 W17 W19 AB3 AD3 AD6 AE1 L1 Y6 M6 N11 N1 T3 T6 U19 U1 Y16 Y18 Y3 D4 F4 AF6 AF3 L11

C11 C12 D9 D8 D12 D11 B11 A12 B10 E12 B9

K13 K12

T23 T26 U22 U25 U28 Y26 T20 R28 R25 R22 V20 V23 V26 W22 W25 W28 Y24 G28

AG10 AH8 AH9 AH10

+APU_CORE_NB

+APU_CORE_NB_CAP

+1.5V

C107

180P_0402_50V8J

C107

180P_0402_50V8J

1

2

C108

180P_0402_50V8J

C108

180P_0402_50V8J

1

2

+APU_CORE

C73

0.22U_0402_6.3V6K

C73

0.22U_0402_6.3V6K

1

2

+APU_CORE_NB

C77

0.22U_0402_6.3V6K

C77

0.22U_0402_6.3V6K

1

2

+1.5V

C82

22U_0603_6.3V6M@C82

22U_0603_6.3V6M

1

@

2

+1.5V

C99

0.22U_0402_6.3V6K

C99

0.22U_0402_6.3V6K

1

2

C110

C109

1000P_0402_50V7K

C109

1000P_0402_50V7K

1

2

@

C70

0.01U_0402_16V7K

C70

0.01U_0402_16V7K

C74

0.22U_0402_6.3V6K

C74

0.22U_0402_6.3V6K

1

2

C78

0.22U_0402_6.3V6K

C78

0.22U_0402_6.3V6K

C79

180P_0402_50V8J

C79

180P_0402_50V8J

1

2

C84

22U_0603_6.3V6M

C84

22U_0603_6.3V6M

C83

22U_0603_6.3V6M

C83

22U_0603_6.3V6M

1

2

Across VDDIO and VSS split

C100

0.22U_0402_6.3V6K

C100

0.22U_0402_6.3V6K

C101

180P_0402_50V8J

C101

180P_0402_50V8J

1

2

1000P_0402_50V7K@C110

1000P_0402_50V7K

C112

C111

1000P_0402_50V7K@C111

1000P_0402_50V7K

1

2

@

C

C71

0.01U_0402_16V7K

C71

0.01U_0402_16V7K

C75

1

2

C80

180P_0402_50V8J

C80

180P_0402_50V8J

C81

1

2

C85

22U_0603_6.3V6M

C85

22U_0603_6.3V6M

C86

1

2

C102

180P_0402_50V8J

C102

180P_0402_50V8J

1

2

VDDR decoupling

C113

0.22U_0402_6.3V6K

C113

0.22U_0402_6.3V6K

1000P_0402_50V7K@C112

1000P_0402_50V7K

1

2

D

C72

180P_0402_50V8J

C72

180P_0402_50V8J

0.01U_0402_16V7K

C76

180P_0402_50V8J

C76

180P_0402_50V8J

1

2

180P_0402_50V8J

4.7U_0603_6.3V6K

22U_0603_6.3V6M

C114

1

2

4.7U_0603_6.3V6K

C87

C88

1

2

+1.2VS

0.22U_0402_6.3V6K

4.7U_0603_6.3V6K

C91

C90

C89

1

2

1

2

0.22U_0402_6.3V6K

C92

0.22U_0402_6.3V6K

C92

0.22U_0402_6.3V6K

1

2

+APU_CORE_NB_CAP

C216

1

@

2

C93

0.22U_0402_6.3V6K

C93

0.22U_0402_6.3V6K

C94

1

2

22U_0603_6.3V6M@C216

22U_0603_6.3V6M

C215

C214

22U_0603_6.3V6M

C214

22U_0603_6.3V6M

1

2

C96

0.22U_0402_6.3V6K

C96

0.22U_0402_6.3V6K

22U_0603_6.3V6M

1

2

0.22U_0402_6.3V6K

C97

180P_0402_50V8J

C97

C95

0.22U_0402_6.3V6K

C95

0.22U_0402_6.3V6K

1

2

C217

180P_0402_50V8J

C217

180P_0402_50V8J

1

2

180P_0402_50V8J

C136

180P_0402_50V8J

C136

180P_0402_50V8J

C98

330U_D2_2.5VY_R9M+C98

330U_D2_2.5VY_R9M

1

2

1

+

2

Demo Board Capacitor

APU_CORE 22uF x 10

0.22uF x 2

0.01uF x 3 180pF x 2

CORE_NB 22uF x 2 10uF x 1

0.22uF x 2 180pF x 3

CORE_NB_CAP 22uF x 2 180pF x 1

E

JCPU1F

J20

VSS_1

L4

VSS_2

R7

VSS_3

W18

VSS_4

A15

VSS_5

AB17

VSS_6

AC22

VSS_7

AE21

VSS_8

AF24

VSS_9

AH23

VSS_10

AH25

VSS_11

B7

VSS_12

C14

VSS_13

C16

VSS_14

C2

VSS_15

C20

VSS_16

C22

VSS_17

C24

VSS_18

C26

VSS_19

C28

VSS_20

D13

VSS_21

D15

VSS_22

D17

VSS_23

D19

VSS_24

D23

VSS_25

D25

VSS_26

D27

VSS_27

E4

VSS_28

E9

VSS_29

F14

VSS_30

F16

VSS_31

F18

VSS_32

F20

VSS_33

F22

VSS_34

F26

VSS_35

F28

VSS_36

G13

VSS_37

G15

VSS_38

G17

VSS_39

G19

VSS_40

G21

VSS_41

G23

VSS_42

G25

VSS_43

G4

VSS_44

J22

VSS_45

J24

VSS_46

J4

VSS_47

J7

VSS_48

K11

VSS_49

K14

VSS_50

K9

VSS_51

AC11

VSS_52

L19

VSS_53

L7

VSS_54

M11

VSS_55

AF11

VSS_56

V19

VSS_57

V9

VSS_58

W16

VSS_59

W4

VSS_60

W7

VSS_61

Y11

VSS_62

Y20

VSS_63

Y22

VSS_64

Y9

VSS_65

A17

VSS_66

A13

VSS_67

K16

VSS_68

F24

VSS_69

G8

VSS_70

H7

VSS_71

J8

VSS_72

LOTES_ACA-ZIF-109-P12-A_FS1R2

CONN@

VDDIO_SUS (CPU side) 22uF x 4

4.7uF x 4

0.22uF x 6 +2(split) 180pF x 1 + 2(split)

VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98

VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143

A19 A21 A23 A25 A7 AA4 AA7 AB13 AB15 AB19 AB21 AB23 AB25 AB27 AB9 AC14 AC16 AC18 AC20 AC24 AC26 AC28 AC4 AC7 AD9 AE13 AE15 AE17 M9 N10 N4 N7 R10 R4 T11 T9 U10 U18 U4 U7 V11 AE19 AE23 AE25 AE27 AE4 AE7 AF14 AF16 AF18 AF20 AF22 AF26 AF28 AF9 AG4 AG7 AH13 AH15 AH17 AH19 AH21 P9 C18 D21 W14 P11 C7 E8 K18 W12

4 4

+2.5VS

L1

L1 FBMA-L11-201209-221LMA30T_0 805

FBMA-L11-201209-221LMA30T_0 805

12

C116

C115

3300P_0402_50V7-K

C115

3300P_0402_50V7-K

1

2

A

40mil

0.22U_0402_6.3V6K

+VDDA

C117

4.7U_0402_6.3V6M

C117

4.7U_0402_6.3V6M

1

2

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/04/18 2015/07/08

Compal Secret Data

Deciphered Date

VDDP

0.22uF x 2 180pF x 2

D

VDDR

0.22uF x 2 1nF x 4 180pF x 2

Title

Size Document Number Rev

Custom

Date: Sheet of

VDDA

4.7uF x 1

0.22uF x 1

3.3nF x 1

Compal Electronics, Inc.

FS1r2 PWR/GND

VDDIO_SUS (DIMM x2) 100uF x 2

0.1uF x 12

LA-8121P

E

8 50Monday, January 16, 2 012

0.4

5

4

3

2

1

Panel PWM

D D

C C

SIT, NO.4

HPD

DP_INT_PWM7

1 2

R66 2.2K_0402_5%R66 2.2K_0402_5%

12

R67

4.7K_0402_5%

+3VS

R62

R62 47K_0402_5%

47K_0402_5%

2

MMBT3904_NL_SOT23-3

G

12

R63

4.7K_0402_5%

13

D

Q6

2N7002K_SOT23-3

S

APU_INVT_PWM 25

12

C

Q8

2

B

E

3 1

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/04/18 2015/07/08

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Docum ent Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

FS1r2 Signal Level Shifter

LA-8121P

9 50Monday, January 16, 2012

1

0.4

A

B

C

D

E

+VREF_DQ

DDRA_SDQ0 DDRA_SDQ1

DDRA_SDM0

DDRA_SDQ2 DDRA_SDQ3

DDRA_SDQ8

C2011

0.1U_0402_16V4Z

DDRA_SDQ9

DDRA_SDQS1# DDRA_SDQS1

DDRA_SDQ10 DDRA_SDQ11

DDRA_SDQ16 DDRA_SDQ17

DDRA_SDQS2# DDRA_SDQS2

DDRA_SDQ18 DDRA_SDQ19

DDRA_SDQ24 DDRA_SDQ25

DDRA_SDM3

DDRA_SDQ26 DDRA_SDQ27

DDRA_CKE0

DDRA_SBS2#

DDRA_SMA12 DDRA_SMA9

DDRA_SMA8 DDRA_SMA5

DDRA_SMA3 DDRA_SMA1

DDRA_CLK0 DDRA_CLK0#

DDRA_SMA10 DDRA_SBS0#

DDRA_SWE# DDRA_SCAS#

DDRA_SMA13 DDRA_SCS1#

DDRA_SDQ32 DDRA_SDQ33

DDRA_SDQS4# DDRA_SDQS4

DDRA_SDQ34 DDRA_SDQ35

DDRA_SDQ40 DDRA_SDQ41

DDRA_SDM5

DDRA_SDQ42 DDRA_SDQ43

DDRA_SDQ48 DDRA_SDQ49

DDRA_SDQS6# DDRA_SDQS6

DDRA_SDQ50 DDRA_SDQ51

DDRA_SDQ56 DDRA_SDQ57

DDRA_SDM7

DDRA_SDQ58 DDRA_SDQ59

R2005 10K_0402_5%

1 2

12

R2000

R2000 10K_0402_5%

10K_0402_5%

1 1

2 2

3 3

2.2U_0603_6.3V6K

+3VS

C2010

DDRA_SDQS1#6 DDRA_SDQS16

DDRA_SDQS2#6 DDRA_SDQS26

DDRA_SBS2#6

DDRA_CLK06 DDRA_CLK0#6

DDRA_SBS0#6

DDRA_SWE#6

DDRA_SCAS#6

DDRA_SCS1#6

DDRA_SDQS4#6 DDRA_SDQS46

DDRA_SDQS6#6 DDRA_SDQS66

1

2

JDIMM2

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1 VSS49DQS#0

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9 VSS925VSS10

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2 DQS247VSS17 VSS1849DQ22

51

DQ18 DQ1953VSS19 VSS2055DQ28

57

DQ24 DQ2559VSS21 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3 A12/BC#83A11

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1 VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

FOX_AS0A626-U2RN-7F

CONN@

VREF_CA

VSS3

DQS0

VSS6

VSS8 DQ12 DQ13

DQ14 DQ15

DQ20 DQ21

DQ23

DQ29

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VSS28

DQ36 DQ37

VSS30

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

VTT2

+1.5V+1.5V

2 4

DQ4 DQ5

DQ6 DQ7

DM1

DM2

A15 A14

A7

A6 A4

A2 A0

CK1

BA1

S0#

NC2

DM4

DM6

SDA SCL

G2

DDRA_SDQ4

6

DDRA_SDQ5

8 10

DDRA_SDQS0#

12

DDRA_SDQS0

14 16

DDRA_SDQ6

18

DDRA_SDQ7

20 22

DDRA_SDQ12

24

DDRA_SDQ13

26 28

DDRA_SDM1

30

MEM_MA_RST#

32 34

DDRA_SDQ14

36

DDRA_SDQ15

38 40

DDRA_SDQ20

42

DDRA_SDQ21

44 46

DDRA_SDM2

48 50

DDRA_SDQ22

52

DDRA_SDQ23

54 56

DDRA_SDQ28

58

DDRA_SDQ29

60 62

DDRA_SDQS3#

64

DDRA_SDQS3

66 68

DDRA_SDQ30

70

DDRA_SDQ31

72

74

DDRA_CKE1

76 78

DDRA_SMA15

80

DDRA_SMA14

82 84

DDRA_SMA11

86

DDRA_SMA7

88 90

DDRA_SMA6

92

DDRA_SMA4

94 96

DDRA_SMA2

98

DDRA_SMA0

100 102

DDRA_CLK1

104

DDRA_CLK1#

106 108

DDRA_SBS1#

110

DDRA_SRAS#

112 114

DDRA_SCS0#

116

DDRA_ODT0

118 120

DDRA_ODT1

122 124 126 128 130

DDRA_SDQ36

132

DDRA_SDQ37

134 136

DDRA_SDM4

138 140

DDRA_SDQ38

142

DDRA_SDQ39

144 146

DDRA_SDQ44

148

DDRA_SDQ45

150 152

DDRA_SDQS5#

154

DDRA_SDQS5

156 158

DDRA_SDQ46

160

DDRA_SDQ47

162 164

DDRA_SDQ52

166

DDRA_SDQ53

168 170

DDRA_SDM6

172 174

DDRA_SDQ54

176

DDRA_SDQ55

178 180

DDRA_SDQ60

182

DDRA_SDQ61

184 186

DDRA_SDQS7#

188

DDRA_SDQS7

190 192

DDRA_SDQ62

194

DDRA_SDQ63

196 198

MEM_MA_EVENT#

200 202 204

206

+0.75VS

DDRA_SDQS0# 6 DDRA_SDQS0 6

MEM_MA_RST# 6

DDRA_SDQS3# 6 DDRA_SDQS3 6

DDRA_CKE1 6DDRA_CKE06

DDRA_CLK1 6 DDRA_CLK1# 6

DDRA_SBS1# 6 DDRA_SRAS# 6

DDRA_SCS0# 6 DDRA_ODT0 6

DDRA_ODT1 6

+VREF_CA

DDRA_SDQS5# 6 DDRA_SDQS5 6

DDRA_SDQS7# 6 DDRA_SDQS7 6

MEM_MA_EVENT# 6

FCH_SDATA0 11,14,31,33 FCH_SCLK0 11,14,31,33

DDRA_SDQ[0..63]

DDRA_SDM[0..7]

DDRA_SMA[0..15]

+1.5V

2

1

0.1U_0402_16V4Z

+VREF_DQ

15mil

0.1U_0402_16V4Z

C2001

1

2

0.1U_0402_16V4Z

DDRA_SDQ[0..63] 6

DDRA_SDM[0..7] 6

DDRA_SMA[0..15] 6

2

C2002

1

0.1U_0402_16V4Z

+VREF_DQ

1

C2007

2

1000P_0402_50V7K

2

1

C2008

C2003

0.1U_0402_16V4Z

2

C2004

1

+1.5V

R2001

R2001 1K_0402_1%

1K_0402_1%

1 2

R2003

R2003 1K_0402_1%

1K_0402_1%

1 2

Place near DIMM1

2

C2005

1

0.1U_0402_16V4Z

+1.5V

1

+

2

0.1U_0402_16V4Z

2

C2006

1

+VREF_CA

C2025

C2025 330U_D2_2V_Y

330U_D2_2V_Y

15mil

+1.5V

R2002

R2002 1K_0402_1%

1K_0402_1%

+VREF_CA

1

C2000

2

0.1U_0402_16V4Z

1 2

1

C2009

R2004

R2004 1K_0402_1%

1K_0402_1%

2

1 2

1000P_0402_50V7K

Reverse H:5.2mm

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

A

B

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

C

2011/04/18 2015/07/08

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Num ber Rev

C

Date: Sheet of

DDRIII SO-DIMM 1

LA-8121P

E

10 50Monday, January 16, 2012

0.4

A

B

C

D

E

DDRB_SDQ[0..63]

DDRB_SDM[0..7]

DDRB_SMA[0..15]

VSS3

DQS0

VSS6

VSS8 DQ12 DQ13

DQ14 DQ15

DQ20 DQ21

DQ23

DQ29

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VSS28

DQ36 DQ37

VSS30

VSS31

DQ38 DQ39

VSS33

DQ44

DQ45 VSS35 DQS#5

DQS5

VSS38

DQ46

DQ47 VSS40

DQ52

DQ53 VSS42

VSS43

DQ54

DQ55 VSS45

DQ60

DQ61 VSS47 DQS#7

DQS7

VSS50

DQ62

DQ63 VSS52

EVENT#

VTT2

+1.5V+1.5V

2 4

DQ4 DQ5

DQ6 DQ7

DM1

DM2

A15 A14

CK1

BA1

S0#

NC2

DM4

DM6

SDA SCL

DDRB_SDQ4

6

DDRB_SDQ5

8 10

DDRB_SDQS0#

12

DDRB_SDQS0

14 16

DDRB_SDQ6

18

DDRB_SDQ7

20 22

DDRB_SDQ12

24

DDRB_SDQ13

26 28

DDRB_SDM1

30

MEM_MB_RST#

32 34

DDRB_SDQ14

36

DDRB_SDQ15

38 40

DDRB_SDQ20

42

DDRB_SDQ21

44 46

DDRB_SDM2

48 50

DDRB_SDQ22

52

DDRB_SDQ23

54 56

DDRB_SDQ28

58

DDRB_SDQ29

60 62

DDRB_SDQS3#

64

DDRB_SDQS3

66 68

DDRB_SDQ30

70

DDRB_SDQ31

72

74

DDRB_CKE1

76 78

DDRB_SMA15

80

DDRB_SMA14

82 84

DDRB_SMA11

86

A7

A6 A4

A2 A0

G2

DDRB_SMA7

88 90

DDRB_SMA6

92

DDRB_SMA4

94 96

DDRB_SMA2

98

DDRB_SMA0

100 102

DDRB_CLK1

104

DDRB_CLK1#

106 108

DDRB_SBS1#

110

DDRB_SRAS#

112 114

DDRB_SCS0#

116

DDRB_ODT0

118 120

DDRB_ODT1

122 124 126 128 130

DDRB_SDQ36

132

DDRB_SDQ37

134 136

DDRB_SDM4

138 140

DDRB_SDQ38

142

DDRB_SDQ39

144 146

DDRB_SDQ44

148

DDRB_SDQ45

150 152

DDRB_SDQS5#

154

DDRB_SDQS5

156 158

DDRB_SDQ46

160

DDRB_SDQ47

162 164

DDRB_SDQ52

166

DDRB_SDQ53

168 170

DDRB_SDM6

172 174

DDRB_SDQ54

176

DDRB_SDQ55

178 180

DDRB_SDQ60

182

DDRB_SDQ61

184 186

DDRB_SDQS7#

188

DDRB_SDQS7

190 192

DDRB_SDQ62

194

DDRB_SDQ63

196 198

MEM_MB_EVENT#

200 202 204

206

+0.75VS

DDRB_SDQS0# 6 DDRB_SDQS0 6

DDRB_SDQS3# 6 DDRB_SDQS3 6

DDRB_CKE1 6

DDRB_CLK1 6 DDRB_CLK1# 6

DDRB_SBS1# 6 DDRB_SRAS# 6

DDRB_SCS0# 6 DDRB_ODT0 6

DDRB_ODT1 6

+VREF_CA

DDRB_SDQS5# 6 DDRB_SDQS5 6

DDRB_SDQS7# 6 DDRB_SDQS7 6

MEM_MB_EVENT# 6

FCH_SDATA0 10,14,31,33 FCH_SCLK0 10,14,31,33

+VREF_DQ

DDRB_SDQ0

+3VS

DDRB_SDQ1

DDRB_SDM0

DDRB_SDQ2 DDRB_SDQ3

DDRB_SDQ8 DDRB_SDQ9

DDRB_SDQS1# DDRB_SDQS1

DDRB_SDQ10 DDRB_SDQ11

DDRB_SDQ16 DDRB_SDQ17

DDRB_SDQS2# DDRB_SDQS2

DDRB_SDQ18 DDRB_SDQ19

DDRB_SDQ24 DDRB_SDQ25

DDRB_SDM3

DDRB_SDQ26 DDRB_SDQ27

DDRB_CKE0

DDRB_SBS2#

DDRB_SMA12 DDRB_SMA9

DDRB_SMA8 DDRB_SMA5

DDRB_SMA3 DDRB_SMA1

DDRB_CLK0 DDRB_CLK0#

DDRB_SMA10 DDRB_SBS0#

DDRB_SWE# DDRB_SCAS#

DDRB_SMA13 DDRB_SCS1#

DDRB_SDQ32 DDRB_SDQ33

DDRB_SDQS4# DDRB_SDQS4

DDRB_SDQ34 DDRB_SDQ35

DDRB_SDQ40 DDRB_SDQ41

DDRB_SDM5

DDRB_SDQ42 DDRB_SDQ43

DDRB_SDQ48 DDRB_SDQ49

DDRB_SDQS6# DDRB_SDQS6

DDRB_SDQ50 DDRB_SDQ51

DDRB_SDQ56 DDRB_SDQ57

DDRB_SDM7

DDRB_SDQ58 DDRB_SDQ59

R2006 10K_0402_5%

1 2

12

R2007

<BOM Structure>R2007

10K_0402_5%

1 1

DDRB_SDQS1#6 DDRB_SDQS16 MEM_MB_RST# 6

DDRB_SDQS2#6 DDRB_SDQS26

2 2

3 3

DDRB_CKE06

DDRB_SBS2#6

DDRB_CLK06 DDRB_CLK0#6

DDRB_SBS0#6

DDRB_SWE#6

DDRB_SCAS#6

DDRB_SCS1#6

DDRB_SDQS4#6 DDRB_SDQS46

DDRB_SDQS6#6 DDRB_SDQS66

JDIMM1

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1 VSS49DQS#0

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9 VSS925VSS10

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2 DQS247VSS17 VSS1849DQ22

51

DQ18 DQ1953VSS19 VSS2055DQ28

57

DQ24 DQ2559VSS21 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3 A12/BC#83A11

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1 VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

FOX_AS0A626-UARN-7F

FOX_AS0A626-UARN-7F CONN@

CONN@

VREF_CA

DDRB_SDQ[0..63] 6

DDRB_SDM[0..7] 6

DDRB_SMA[0..15] 6

0.1U_0402_16V4Z

+VREF_DQ

15mil

+VREF_DQ +VREF_CA

1000P_0402_50V7K

0.1U_0402_16V4Z

C2012

C2013

1

2

+1.5V

0.1U_0402_16V4Z

C2022

2

1

C2016

+0.75VS

2

1

0.1U_0402_16V4Z

2

1

C2017

0.1U_0402_16V4Z

1

C2023

4.7U_0603_6.3V6K

2

C2018

1

0.1U_0402_16V4Z

+VREF_CA

2

C2019

1

0.1U_0402_16V4Z

15mil

1000P_0402_50V7K

C2014

1

C2015

2

Place near DIMM2

0.1U_0402_16V4Z

2

C2020

1

+1.5V

1

+

2

8/25

2

C2021

1

C2024

C2024 330U_D2_2V_Y

330U_D2_2V_Y

@

4 4

A

Reverse H:9.2mm

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

B

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

C

2011/04/18 2015/07/08

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Num ber Rev

C

Date: Sheet of

DDRIII SO-DIMM 2

LA-8121P

E

11 50Monday, January 16, 2012

0.4

A

150P_0402_50V8J

R90/ C146 close to FCH

1 1

150P_0402_50V8J

SDV2, NO.42

1 2

C129

22P_0402_50V8J

20M_0402_5%

C130

27P_0402_50V8J

8/26 G3 mode RTC time issue - need to check

2 2

8/26 follow CRB

R75

1 2

33P_0402_50V8J

1 2

C131

1M_0402_5%

C134

1 2

33P_0402_50V8J

12

Close to HUDSON-M2/3

X1

X1 25MHZ_20PF_7V25000016

25MHZ_20PF_7V25000016

1

R88

1

GND

FVT, NO.22

32K_X1

12

Y1

32.768KHZ_12.5PF_CM31532768DZFT

32K_X2

25M_X1

3

GND

2

4

25M_X2

WLAN

3 3

LAN

Card Reader

For PCIE device reset on FS1 (GFX,GLAN,WLAN,LVDS Travis) APU_PCIE_RST #: Reset PCIE device on APU

MC74VHC1G08DFT2G_SC70-5

4 4

APU_PCIE_RST#_C

R89/ C135 close to FCH

MC74VHC1G08DFT2G_SC70-5

R89

1 2

33_0402_5%

C135

A

1

R90

@

2

1 2

150P_0402_50V8J

+3V_FCH

5

2

B

1

A

3

8.2K_0402_5%

R92

@R92

@

1 2

0_0402_5%

CLK_PCIE_VGA17 CLK_PCIE_VGA#17

CLK_PCIE_WLAN#33

CLK_PCIE_LAN35

CLK_PCIE_LAN#35

SDV2, NO.54

CLK_PCIE_CARD35 CLK_PCIE_CARD#35

SDV2, NO.64

CLK_LAN_25M35

C133

1 2

0.1U_0402_16V4Z

P

4

Y

G

U3

C125

8/25

1 2

UMI_RXP05 UMI_RXN05 UMI_RXP15 UMI_RXN15 UMI_RXP25 UMI_RXN25 UMI_RXP35 UMI_RXN35

UMI_TXP05 UMI_TXN05 UMI_TXP15 UMI_TXN15 UMI_TXP25 UMI_TXN25 UMI_TXP35 UMI_TXN35

+VDDAN_11_PCIE

12

B

PLT_RST#

1 2

C126 .1U_0402_16V7KC126 .1U_0402_16V7K

1 2

C118 .1U_0402_16V7KC118 .1U_0402_16V7K

1 2

C119 .1U_0402_16V7KC119 .1U_0402_16V7K

1 2

C120 .1U_0402_16V7KC120 .1U_0402_16V7K

1 2

C127 .1U_0402_16V7KC127 .1U_0402_16V7K

1 2

C121 .1U_0402_16V7KC121 .1U_0402_16V7K

1 2

C128 .1U_0402_16V7KC128 .1U_0402_16V7K

1 2

C122 .1U_0402_16V7KC122 .1U_0402_16V7K

R71 590_0402_1%R71 590_0402_1% R73 2K_0402_1%R73 2K_0402_1%

+1.1VS_CKVDD

1 2

R76 0_0402_5%R76 0_0402_5%

1 2

R77 0_0402_5%R77 0_0402_5%

1 2

R150 0_0402_5%R150 0_0402_5%

1 2

R142 0_0402_5%R142 0_0402_5%

1 2

R80 33_0402_5%R80 33_0402_5%

1 2

R82 33_0402_5%R82 33_0402_5%

1 2

R83 33_0402_5%R83 33_0402_5%

1 2

R84 33_0402_5%R84 33_0402_5%

1 2

R86 22_0402_5%@R86 22_0402_5%@

APU_PCIE_RST# 17,33,35

R91

R91 0_0402_5%

0_0402_5%

@

PLT_RST# 31,35

B

1 2

R72 3 3_0402_5%R72 3 3_0402_5%

1 2 1 2

R74

1 2

APU_DISP_CLK7

APU_DISP_CLK#7

APU_CLK7 APU_CLK#7

8/26

APU_PCIE_RST#_C

A_RST#

UMI_RXP0_C UMI_RXN0_C UMI_RXP1_C UMI_RXN1_C UMI_RXP2_C UMI_RXN2_C UMI_RXP3_C UMI_RXN3_C

PCIE_CALRP PCIE_CALRN

CLK_CALRN

2K_0402_1%

CLK_PCIE_VGA_R CLK_PCIE_VGA#_R

CLK_PCIE_WLAN_R CLK_PCIE_WLAN#_R

CLK_PCIE_LAN_R CLK_PCIE_LAN#_R

CLK_PCIE_CARD_R CLK_PCIE_CARD#_R

CLK_LAN_25M_R

C

U2A

HUDSON-2

AE2

PCIE_RST#

AD5

A_RST#

AE30

UMI_TX0P

AE32

UMI_TX0N

AD33

UMI_TX1P

AD31

UMI_TX1N

AD28

UMI_TX2P

AD29

UMI_TX2N

AC30

UMI_TX3P

AC32

UMI_TX3N

AB33

UMI_RX0P

AB31

UMI_RX0N

AB28

UMI_RX1P

AB29

UMI_RX1N

Y33

UMI_RX2P

Y31

UMI_RX2N

Y28

UMI_RX3P

Y29

UMI_RX3N

AF29

PCIE_CALRP

AF31

PCIE_CALRN

V33

GPP_TX0P

V31

GPP_TX0N

W30

GPP_TX1P

W32

GPP_TX1N

AB26

GPP_TX2P

AB27

GPP_TX2N

AA24

GPP_TX3P

AA23

GPP_TX3N

AA27

GPP_RX0P

AA26

GPP_RX0N

W27

GPP_RX1P

V27

GPP_RX1N

V26

GPP_RX2P

W26

GPP_RX2N

W24

GPP_RX3P

W23

GPP_RX3N

F27

CLK_CALRN

G30

PCIE_RCLKP

G28

PCIE_RCLKN

R26

DISP_CLKP

T26

DISP_CLKN

H33

DISP2_CLKP

H31

DISP2_CLKN

T24

APU_CLKP

T23

APU_CLKN

J30

SLT_GFX_CLKP

K29

SLT_GFX_CLKN

H27

GPP_CLK0P

H28

GPP_CLK0N

J27

GPP_CLK1P

K26

GPP_CLK1N

F33

GPP_CLK2P

F31

GPP_CLK2N

E33

GPP_CLK3P

E31

GPP_CLK3N

M23

GPP_CLK4P

M24

GPP_CLK4N

M27

GPP_CLK5P

M26

GPP_CLK5N

N25

GPP_CLK6P

N26

GPP_CLK6N

R23

GPP_CLK7P

R24

GPP_CLK7N

N27

GPP_CLK8P

R27

GPP_CLK8N

J26

14M_25M_48M_OSC

C31

25M_X1

25M_X2

25M_X1

C33

25M_X2

21807-A13-HUDSON-M3_FCBGA656

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

HUDSON-2

PCICLK1/GPO36 PCICLK2/GPO37

PCI CLKS

PCI EXPRESS INTERFACES

PCI INTERFACE

CLOCK GENERATOR

LPCAPUS5 PLUS

2011/04/18 2015/07/08

PCICLK3/GPO38

PCICLK4/14M_OSC/G PO39

AD10/GPIO10 AD11/GPIO11 AD12/GPIO12 AD13/GPIO13 AD14/GPIO14 AD15/GPIO15 AD16/GPIO16 AD17/GPIO17 AD18/GPIO18 AD19/GPIO19 AD20/GPIO20 AD21/GPIO21 AD22/GPIO22 AD23/GPIO23 AD24/GPIO24 AD25/GPIO25 AD26/GPIO26 AD27/GPIO27 AD28/GPIO28 AD29/GPIO29 AD30/GPIO30 AD31/GPIO31

REQ1#/GPIO40 REQ2#/CLK_REQ8#/G PIO41 REQ3#/CLK_REQ5#/G PIO42

GNT1#/GPO44

GNT2#/SD_LED/GPO 45

GNT3#/CLK_REQ7#/G PIO46

INTE#/GPIO32

INTF#/GPIO33 INTG#/GPIO34 INTH#/GPIO35

LDRQ1#/CLK_REQ6#/ GPIO49

SERIRQ/GPIO48

DMA_ACTIVE#

S5_CORE_EN

INTRUDER_ALERT#

VDDBT_RTC_G

Compal Secret Data

PCICLK0

PCIRST#

AD0/GPIO0 AD1/GPIO1 AD2/GPIO2 AD3/GPIO3 AD4/GPIO4 AD5/GPIO5 AD6/GPIO6 AD7/GPIO7 AD8/GPIO8 AD9/GPIO9

CBE0# CBE1# CBE2# CBE3#

FRAME#

DEVSEL#

IRDY#

TRDY#

PAR STOP# PERR# SERR# REQ0#

GNT0#

CLKRUN#

LOCK#

LPCCLK0

LPCCLK1

LAD0 LAD1 LAD2 LAD3

LFRAME#

LDRQ0#

PROCHOT#

APU_PG

LDT_STP#

APU_RST#

RTCCLK

32K_X1

32K_X2

Deciphered Date

AF3 AF1 AF5 AG2 AF6

AB5

AJ3 AL5 AG4 AL6 AH3 AJ5 AL1 AN5 AN6 AJ1 AL8 AL3 AM7 AJ6 AK7 AN8 AG9 AM11 AJ10 AL12 AK11 AN12 AG12 AE12 AC12 AE13 AF13 AH13 AH14 AD15 AC15 AE16 AN3 AJ8 AN10 AD12 AG10 AK9 AL10 AF10 AE10 AH1 AM9 AH8 AG15 AG13 AF15 AM17 AD16 AD13 AD21 AK17 AD19 AH9

AF18 AE18 AC16 AD18

B25

D25 D27 C28 A26 A29 A31 B27 AE27 AE19

G25 E28 E26 G26 F26

H7 F1 F3 E6

G2

G4

D

1 2

R209 0_0402_5%@R209 0_0402_5%@

1 2

R208 0_0402_5%@R208 0_0402_5%@

LPCCLK0

APU_PROCHOT#_R

32K_X1

32K_X2

D

PCI_CLK1 16

PCI_CLK3 16 PCI_CLK4 16

PCI_AD23 16 PCI_AD24 16 PCI_AD25 16 PCI_AD26 16 PCI_AD27 16

T11T11

T22T22

1 2

R110 0_0402_5%@R110 0_0402_5%@

1 2

R215 33_0402_5%R215 33_0402_5%

LPC_CLK1 16 LPC_AD0 31,33,35 LPC_AD1 31,33,35 LPC_AD2 31,33,35 LPC_AD3 31,33,35 LPC_FRAME# 31,33,35

SERIRQ 31

R85 0_0402_5%@R85 0_0402_5%@

APU_PWRGD 45,7

APU_RST# 7

RTC_CLK 16,31

1 2

E

PXS_RST# 14,17 PXS_PWREN 14,19,43,44

CLK_PCI_DB 33,35CLK_PCIE_WLAN33

CLK_PCI_EC 16,31

ALLOW_STOP 7 APU_PROCHOT# 7

+RTCBATT

12

JCMOS1

@JC MOS1

@

SHORT PADS

1U_0402_6.3V6K

W=20mils

1

C132

2

1 2

R87 510_0402_5%R87 510_04 02_5%

for Clear CMOS

Compal Electronics, Inc.

Title

Size D ocument Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

FCH PCIE/CLK/PCI/LPC/RTC

LA-8121P

12 50Monday, January 16, 2012

E

0.4

A

B

C

D

E

4MB SPI ROM

SPI_CLK_FCH_R

R99

R99 0_0402_5%

0_0402_5%

SPI_CLK_FCH

R93

33_0402_5%

@

22P_0402_50V8J

@

+3V_FCH

13 50Mon day, January 16, 2012

C138

12

0.4

& Non-share ROM.

8/26 use +3VALW

U2B

1 1

HDD

ODD

2 2

3 3

4 4

SATA_FTX_DRX_P030 SATA_FTX_DRX_N030

SATA_FRX_C_DTX_N030 SATA_FRX_C_DTX_P030

SATA_FTX_DRX_P130 SATA_FTX_DRX_N130

SATA_FRX_C_DTX_N130 SATA_FRX_C_DTX_P130

+AVDD_SATA

A

1 2

C139 0.01U_0402_16V7KC139 0.01U_04 02_16V7K

1 2

C140 0.01U_0402_16V7KC140 0.01U_04 02_16V7K

1 2

C143 0.01U_0402_16V7KC143 0.01U_04 02_16V7K

1 2

C142 0.01U_0402_16V7KC142 0.01U_04 02_16V7K

+3VS

8/26

BT_ON#32

WLBT_OFF#33

WL_OFF#33

8/25

ODD_EN30

APU_ALERT#_FCH7

SATA_FTX_C_DRX_P0 SATA_FTX_C_DRX_N0

SATA_FTX_C_DRX_P1 SATA_FTX_C_DRX_N1

12

SATA_CALRP

R1071K_0402_1 % R1071K_0 402_1%

12

SATA_CALRN

R108931_0402 _1% R108931_0402_1%

12

R21410K_0402_ 5% R21410K_0402_ 5%

BT_ON#

WLBT_OFF# WL_OFF#

ODD_EN

1 2

R119 10K_0402_5%R119 10K_0402_5%

1 2

R122 10K_0402_5%R122 10K_0402_5%

1 2

R123 10K_0402_5%R123 10K_0402_5%

B

U2B

AK19

SATA_TX0P

AM19

SATA_TX0N

AL20

SATA_RX0N

AN20

SATA_RX0P

AN22

SATA_TX1P

AL22

SATA_TX1N

AH20

SATA_RX1N

AJ20

SATA_RX1P

AJ22

SATA_TX2P

AH22

SATA_TX2N

AM23

SATA_RX2N

AK23

SATA_RX2P

AH24

SATA_TX3P

AJ24

SATA_TX3N

AN24

SATA_RX3N

AL24

SATA_RX3P

AL26

SATA_TX4P

AN26

SATA_TX4N

AJ26

SATA_RX4N

AH26

SATA_RX4P

AN29

SATA_TX5P

AL28

SATA_TX5N

AK27

SATA_RX5N

AM27

SATA_RX5P

AL29

NC6

AN31

NC7

AL31

NC8

AL33

NC9

AH33

NC10

AH31

NC11

AJ33

NC12

AJ31

NC13

AF28

SATA_CALRP

AF27

SATA_CALRN

AD22

SATA_ACT#/GPIO67

AF21

SATA_X1

AG21

SATA_X2

AH16

FANOUT0/GPIO52

AM15

FANOUT1/GPIO53

AJ16

FANOUT2/GPIO54

AK15

FANIN0/GPIO56

AN16

FANIN1/GPIO57

AL16

FANIN2/GPIO58

K6

TEMPIN0/GPIO171

K5

TEMPIN1/GPIO172

K3

TEMPIN2/GPIO173

M6

TEMPIN3/TALERT#/GPIO174

21807-A13-HUDSON-M3_FCBGA656

HUDSON-2

SERIAL ATA

HW MONITOR

SD_CLK/SCLK_2/GPIO73

SD_CMD/SLOAD_2/GPIO74

SD_CD/GPIO75

SD_WP/GPIO76

SD_DATA0/SDATI_2/GPIO77

SD_DATA1/SDATO_2/GPIO78

SD CARDGBE LANSPI ROMVGA DACVGA MAINLINK

SD_DATA2/GPIO79 SD_DATA3/GPIO80

GBE_RXCTL/RXDV

GBE_TXCTL/TXEN

GBE_PHY_PD

GBE_PHY_RST#

GBE_PHY_INTR

SPI_DI/GPIO164

SPI_DO/GPIO163

SPI_CLK/GPIO162

SPI_CS1#/GPIO165

ROM_RST#/SPI_WP#/GPIO161

VGA_HSYNC/GPO68 VGA_VSYNC/GPO69

VGA_DDC_SDA/GPO70 VGA_DDC_SCL/GPO71

VGA_DAC_RSET

AUX_VGA_CH_P AUX_VGA_CH_N

ML_VGA_L0N ML_VGA_L1P ML_VGA_L1N ML_VGA_L2P ML_VGA_L2N ML_VGA_L3P ML_VGA_L3N

ML_VGA_HPD/GPIO229

VIN0/GPIO175

VIN1/GPIO176

VIN2/SDATI_1/GPIO177

VIN3/SDATO_1/GPIO178

VIN4/SLOAD_1/GPIO179

VIN5/SCLK_1/GPIO180

VIN6/GBE_STAT3/GPIO181

VIN7/GBE_LED3/GPIO182

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

GBE_COL GBE_CRS

GBE_MDCK

GBE_MDIO

GBE_RXCLK

GBE_RXD3 GBE_RXD2 GBE_RXD1 GBE_RXD0

GBE_RXERR

GBE_TXCLK

GBE_TXD3 GBE_TXD2 GBE_TXD1 GBE_TXD0

VGA_RED

VGA_GREEN

VGA_BLUE

AUXCAL

ML_VGA_L0P

NC1 NC2 NC3 NC4 NC5

C

AL14 AN14 AJ12 AH12 AK13 AM13 AH15 AJ14

AC4 AD3 AD9 W10

FCH SCLv1.20 19:

AB8

GBE_COL/GBE_CRS/GBE_RXERR NC

AH7 AF7 AE7 AD7 AG8 AD1 AB7 AF9 AG6 AE8 AD8 AB9 AC2 AA7 W9

GBE_PHY_INTR

V6

SPI_SO

V5

SPI_SI

V3

SPI_CLK_FCH_R

T6

SPI_SB_CS0#

V1

SPI_WP#

L30

L32

M29

M28 N30

M33 N32

K31

V28 V29

U28

T31 T33 T29 T28 R32 R30 P29 P28

C29

N2

M3

L2

N4

P1

P3

M1

M5

AG16 AH10 A28 G27 L4

1 2

R104 150 _0402_1%R1 04 150_0402_1%

1 2

R105 150 _0402_1%R1 05 150_0402_1%

1 2

R106 150 _0402_1%R1 06 150_0402_1%

1 2

R109 715 _0402_1%R1 09 715_0402_1%

AUXCAL

1 2

R111 100 _0402_1%R1 11 100_0402_1%

1 2

R113 10K_0402_5%R113 10K_0402_5%

1 2

R114 10K_0402_5%R114 10K_0402_5%

1 2

R115 10K_0402_5%R115 10K_0402_5%

1 2

R116 10K_0402_5%R116 10K_0402_5%

1 2

R117 10K_0402_5%R117 10K_0402_5%

1 2

R118 10K_0402_5%R118 10K_0402_5%

1 2

R120 10K_0402_5%R120 10K_0402_5%

1 2

R121 10K_0402_5%R121 10K_0402_5%

Follow Comal ORB Rework Memo

Compal Secret Data

2011/04/18 2015/07/08

Compal Secret Data

+3VALW

CRT_HSYNC 28 CRT_VSYNC 28

CRT_DDC_DATA 28 CRT_DDC_CLK 28

ML_VGA_AUXP_C 7 ML_VGA_AUXN_C 7

ML_VGA_TXP0 7 ML_VGA_TXN0 7 ML_VGA_TXP1 7 ML_VGA_TXN1 7 ML_VGA_TXP2 7 ML_VGA_TXN2 7 ML_VGA_TXP3 7 ML_VGA_TXN3 7

ML_VGA_HPD 7

Deciphered Date

R94 10K_040 2_5%R94 10K_0402_5%

SIT, NO.4

+3VALW

1 2

R95

R101

R101 10K_0402_5%

10K_0402_5%

1 2

SPI_SB_CS0# SPI_SO

1 2

SPI_WP#

DAC_RED 28

DAC_GRN 28

DAC_BLU 28

+VDDAN_11_ML

+FCH_VDDAN_33_DAC

12

R11210K_0402_5% R11210K_ 0402_5%

Used as GPIO181 or configure as one of the following:

-> 10-KΩ 5% pull-down resistor.

-> 10-KΩ 5% pull-up resistor to +3.3V_S5.

-> Enabled integrated pull-down/up and left unconnected.

D

SPI_HOLD#

10K_0402_5%

FVT, No.45

U4

1

CS#

2

DO

HOLD#

3

WP#

4

GND

W25Q32BVSSIG_SO8

Title

Size Document Number Rev

Custom

Date: Sheet of

+3VALW

C141

1 2

0.1U_0402_16V4Z

8

VCC

7

SPI_HOLD#

6

SPI_CLK_FCH

CLK

5

SPI_SI

DI

GBE_PHY_INTR

Compal Electronics, Inc.

FCH SATA/SPI/VGA/HWM/SD

LA-8121P

1 2

R100 10K_ 0402_5%R100 10K_0402_5%

E

A

+3VS

@

C144 .1U_0402_16V7K

1 2

5

2

P

B

Y

1

A

G

MC74VHC1G08DFT2G_SC70-5

3

U5

S

Q43

Q43 2N7002K_SOT23-3

2N7002K_SOT23-3

TEST0

TEST1

TEST2

USB_OC3#

USB_OC1#

USB_OC0#

ODD_DETECT#

H_THERMTRIP#

EC_LID_OUT#

FCH_PCIE_WAKE#

ODD_DA#_FCH_R

WLAN_CLKREQ#

CARD_CLKREQ#

FCH_SCLK0

FCH_SDATA0

WD_PWRGD

LAN_CLKREQ#

FCH_SCLK1

FCH_SDATA1

EC_RSMRST#

HDA_BITCLK

HDA_SDIN0

PEG_CLKREQ#_R

12

FCH_POK 31

VGATE 31,45

@

+3V_FCH

2

G

13

ODD_DA#_FCH_R

D

PEG_CLKREQ#18

HDA_BITCLK_AUDIO29 HDA_SDOUT_AUDIO29

HDA_SDIN029

HDA_SYNC_AUDIO29

HDA_RST_AUDIO#29

PXS_RST#12,17 PXS_PWREN12,19,43,44

SDV2, NO.51

+3V_FCH

1 2

R211 10K_ 0402_5%DIS@R211 10K_0402_5%DIS@

EC_PXCONTROL3 1

SCL1/SDA1: ASF-Capable LAN Devices Not Implemented: Used as GPIO227 or configured for one of the following options: 10-KΩ 5% pull-up resistor to +3.3V_S5; 10-KΩ 5% pull-down resistor.

+3V_FCH

12

UMA@

12

DIS@

10K_0402_5%

8/26

12

@

UMA@

R157

R164

R206

R158

10K_0402_5%

GPIO188

GPIO189

GPIO190

12

DIS@

R165

R210

10K_0402_5%

R124 0_040 2_5%@R124 0_ 0402_5%@

R125 0_040 2_5%R125 0_0402_5%

FCH_PWRGD45

1 1

For ODD Power Leakage issue

ODD_DA#_FCH3 0

2 2

+3V_FCH

For FCH internal debug use

1 2

R128 2.2 K_0402_5%@R128 2.2K_0402_5%@

1 2

R129 2.2 K_0402_5%@R129 2.2K_0402_5%@

1 2

R130 2.2 K_0402_5%@R130 2.2K_0402_5%@

+3V_FCH

1 2

R154 10K_0402_ 5%R154 10K_0402_5%

1 2

R137 10K_0402_ 5%R137 10K_0402_5%

1 2

R139 10K_0402_ 5%R139 10K_0402_5%

1 2

R205 10K_0402_ 5%@R205 10K_0402_5%@

1 2

R143 10K_0402_ 5%@R143 10K_0402_5%@

1 2

R145 100K_0402 _5%@R145 100K_04 02_5%@

1 2

R149 10K_0402_ 5%R149 10K_0402_5%

3 3

4 4

1 2

R155 10K_0402_ 5%@R155 10K_0402_5%@

+3VS

1 2

R174 10K_ 0402_5%R174 10K_0402_5%

1 2

R156 10K_ 0402_5%R156 10K_0402_5%

1 2

R151 2.2 K_0402_5%R151 2.2 K_0402_5%

1 2

R152 2.2 K_0402_5%R152 2.2 K_0402_5%

1 2

R153 10K_ 0402_5%R153 10K_0402_5%

1 2

R159 8.2 K_0402_5%R159 8.2 K_0402_5%

1 2

R160 10K_ 0402_5%R160 10K_0402_5%

1 2

R161 10K_ 0402_5%R161 10K_0402_5%

1 2

R162 2.2 K_0402_5%R162 2.2 K_0402_5%

1 2

R163 10K_ 0402_5%@R163 10K_0402_5%@

1 2

R166 10K_ 0402_5%@R166 10K_0402_5%@

1 2

R167 10K_ 0402_5%@R167 10K_0402_5%@

CLKREQG Not Implemented: Used as GPIO65, IDLEEXIT#, or left unconnected.

4

2

@

C145

C145 .1U_0402_16V7K

.1U_0402_16V7K

1

+3VS +3VS

R213

R213 10K_0402_5%

10K_0402_5%

1 2

THERMTRIP 8/16 AMD confirmed: The FCH already have internal PU resistor and don't need external PU resistor. Note: need BIOS check: Ensure FCH internal pull-up resistor to +3.3V S5 is disabled to prevent leakage when APU is powered down.

8/25

A

B

PCIE_RST2 : Reset PCIE device on Hudson2/3

EC_LID_OUT#31

PM_SLP_S3#31 PM_SLP_S5#31 PBTN_OUT#31

GATEA2031

KB_RST#31 EC_SCI#31 EC_SMI#31

1 2

R126 10K_ 0402_5%@R126 10K_0402_5%@

FCH_PCIE_WAKE#35

H_THERMTRIP#7

EC_RSMRST#31

LAN_CLKREQ#35

CARD_CLKREQ#35

FCH_SPKR29 FCH_SCLK010,11,31,33 FCH_SDATA010,11,31,33

WLAN_CLKREQ#33

VGA_PWRGD19,44

R131 0_0 402_5%@R131 0_0402_5%@

ODD_DETECT#3 0

R134 33_ 0402_5%R134 33_0402 _5% R135 33_ 0402_5%R135 33_0402 _5%

R138 33_ 0402_5%R138 33_0402 _5% R140 33_ 0402_5%R140 33_0402 _5%

DMN66D0LDW-7_SOT363-6

EC_PXCONTROL

0

12

USB_OC3#35

USB_OC1#34 USB_OC0#34

1 2 1 2

12

R1460_0402_5% DIS@ R1460_0402_5% DIS@

12

R1480_0402_5% DIS@ R1480_0402_5% DIS@

DIS@

Q44A

61

DIS@

Q44B

DMN66D0LDW-7_SOT363-6

2

3 4

5

0 0

0

1 1

B

FCH_PWRGD

TEST0 TEST1 TEST2

SYS_RESET#

WD_PWRGD

FCH_SCLK0 FCH_SDATA0 FCH_SCLK1 FCH_SDATA1

PEG_CLKREQ#_R

ODD_DA#_FCH_R

ODD_DETECT# USB_OC3#

USB_OC1# USB_OC0#

10

01

T13T13

T19T19

HDA_BITCLK HDA_SDOUT HDA_SDIN0

HDA_SYNC HDA_RST#

GPIO188

GPIO189 GPIO190

T34T34 T35T35 T36T36 T37T37 T38T38 T39T39 T43T43 T44T44 T45T45 T40T40 T41T41 T42T42 T49T49 T50T50 T51T51 T46T46 T47T47 T48T48

FunctionGPIO188 GPIO189 GPIO190

PX

Reserved

DISCRET

UMA

C

U2D

HUDSON-2

AB6

PCIE_RST2#/PCI_PME#/GEVENT4#

R2

RI#/GEVENT22#

W7

SPI_CS3#/GBE_STAT1/GEVENT21#

T3

SLP_S3#

W2

SLP_S5#

J4

PWR_BTN#

N7

PWR_GOOD

T9

TEST0

T10

TEST1/TMS

V9

TEST2

AE22

GA20IN/GEVENT0#

AG19

KBRST#/GEVENT1#

R9

LPC_PME#/GEVENT3#

C26

LPC_SMI#/GEVENT23#

T5

LPC_PD#/GEVENT5#

U4

SYS_RESET#/GEVENT19#

K1

WAKE#/GEVENT8#

V7

IR_RX1/GEVENT20#

R10

THRMTRIP#/SMBALERT#/GEVENT2#

AF19

WD_PWRGD

U2

RSMRST#

AG24

CLK_REQ4#/SATA_IS0#/GPIO64

AE24

CLK_REQ3#/SATA_IS1#/GPIO63

AE26

SMARTVOLT1/SATA_IS2#/GPIO50

AF22

CLK_REQ0#/SATA_IS3#/GPIO60

AH17

SATA_IS4#/FANOUT3/GPIO55

AG18

SATA_IS5#/FANIN3/GPIO59

AF24

SPKR/GPIO66

AD26

SCL0/GPIO43

AD25

SDA0/GPIO47

T7

SCL1/GPIO227

R7

SDA1/GPIO228

AG25

CLK_REQ2#/FANIN4/GPIO62

AG22

CLK_REQ1#/FANOUT4/GPIO61

J2

IR_LED#/LLB#/GPIO184

AG26

SMARTVOLT2/SHUTDOWN#/GPIO51

V8

DDR3_RST#/GEVENT7#/VGA_PD

W8

GBE_LED0/GPIO183

Y6

SPI_HOLD#/GBE_LED1/GEVENT9#

V10

GBE_LED2/GEVENT10#

AA8

GBE_STAT0/GEVENT11#

AF25

CLK_REQG#/GPIO65/OSCIN/IDLEEXIT#

M7

BLINK/USB_OC7#/GEVENT18#

R8

USB_OC6#/IR_TX1/GEVENT6#

T1

USB_OC5#/IR_TX0/GEVENT17#

P6

USB_OC4#/IR_RX0/GEVENT16#

F5

USB_OC3#/AC_PRES/TDO/GEVENT15#

P5

USB_OC2#/TCK/GEVENT14#

J7

USB_OC1#/TDI/GEVENT13#

T8

USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12#

AB3

AZ_BITCLK

AB1

AZ_SDOUT

AA2

AZ_SDIN0/GPIO167

Y5

AZ_SDIN1/GPIO168

Y3

AZ_SDIN2/GPIO169

Y1

AZ_SDIN3/GPIO170

AD6

AZ_SYNC

AE4

AZ_RST#

K19

PS2_DAT/SDA4/GPIO187

J19

PS2_CLK/CEC/SCL4/GPIO188

J21

SPI_CS2#/GBE_STAT2/GPIO166

D21

PS2KB_DAT/GPIO189

C20

PS2KB_CLK/GPIO190

D23

PS2M_DAT/GPIO191

C22

PS2M_CLK/GPIO192

F21

KSO_0/GPIO209

E20

KSO_1/GPIO210

F20

KSO_2/GPIO211

A22

KSO_3/GPIO212

E18

KSO_4/GPIO213

A20

KSO_5/GPIO214

J18

KSO_6/GPIO215

H18

KSO_7/GPIO216

G18

KSO_8/GPIO217

B21

KSO_9/GPIO218

K18

KSO_10/GPIO219

D19

KSO_11/GPIO220

A18

KSO_12/GPIO221

C18

KSO_13/GPIO222

B19

KSO_14/GPIO223

B17

KSO_15/GPIO224

A24

KSO_16/GPIO225

D17

KSO_17/GPIO226

21807-A13-HUDSON-M3_FCBGA656

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

HUDSON-2

EMBEDDED CTRL

2011/04/18 2015/07/08

USBCLK/14M_25M_48M_OSC

USB MISCUSB 1.1USB 2.0USB 3.0

USB_FSD1P/GPIO186

USB_FSD0P/GPIO185

USB OC GPIO ACPI / WAKE UP EVENTSHD AUDIO

SCL3_LV/GPIO195

SDA3_LV/GPIO196 EC_PWM0/EC_TIMER0/GPIO197 EC_PWM1/EC_TIMER1/GPIO198

EC_PWM2/EC_TIMER2/WOL_EN/GPIO199

EC_PWM3/EC_TIMER3/GPIO200

Compal Secret Data

Deciphered Date

USB_RCOMP

USB_FSD1N

USB_FSD0N

USB_HSD13P USB_HSD13N

USB_HSD12P USB_HSD12N

USB_HSD11P USB_HSD11N

USB_HSD10P USB_HSD10N

USB_HSD9P USB_HSD9N

USB_HSD8P USB_HSD8N

USB_HSD7P USB_HSD7N

USB_HSD6P USB_HSD6N

USB_HSD5P USB_HSD5N

USB_HSD4P USB_HSD4N

USB_HSD3P USB_HSD3N

USB_HSD2P USB_HSD2N

USB_HSD1P USB_HSD1N

USB_HSD0P USB_HSD0N

USBSS_CALRP

USBSS_CALRN

USB_SS_TX3P USB_SS_TX3N

USB_SS_RX3P USB_SS_RX3N

USB_SS_TX2P USB_SS_TX2N

USB_SS_RX2P USB_SS_RX2N

USB_SS_TX1P USB_SS_TX1N

USB_SS_RX1P USB_SS_RX1N

USB_SS_TX0P USB_SS_TX0N

USB_SS_RX0P USB_SS_RX0N

SCL2/GPIO193 SDA2/GPIO194

KSI_0/GPIO201 KSI_1/GPIO202 KSI_2/GPIO203 KSI_3/GPIO204 KSI_4/GPIO205 KSI_5/GPIO206 KSI_6/GPIO207 KSI_7/GPIO208

D

G8

B9

USB_RCOMP

H1 H3

H6 H5

H10 G10

K10 J12

G12 F12

K12 K13

B11 D11

E10 F10

C10 A10

H9 G9

A8 C8

F8 E8

FVT, NO.28 Near Device

C6 A6

C5 A5

C1 C3

E1 E3

C16

USBSS_CALRP

A16

USBSS_CALRN

A14 C14

C12 A12

D15

USB30_FTX_DRX_P2_C

B15

USB30_FTX_DRX_N2_C

E14

USB30_FRX_DTX_P2

F14

USB30_FRX_DTX_N2

F15

USB30_FTX_DRX_P1_C

G15

USB30_FTX_DRX_N1_C

H13

USB30_FRX_DTX_P1

G13

USB30_FRX_DTX_N1

J16

USB30_FTX_DRX_P0_C

H16

USB30_FTX_DRX_N0_C

J15

USB30_FRX_DTX_P0

K15

USB30_FRX_DTX_N0

1 2

H19

R144 10K_ 0402_5%R144 10K_0402_5%

1 2

G19

R147 10K_ 0402_5%R147 10K_0402_5%

G22

FCH_SIC

G21

FCH_SID

E22 H22 J22

EC_PWM2

H21

K21 K22 F22 F24 E24 B23 C24 F18

D

1 2

R127 11.8K_0 402_1%R127 11.8K_0 402_1%

USB30_P12 34 USB30_N12 34

USB30_P11 34 USB30_N11 34

USB30_P10 34 USB30_N10 34

USB20_P8 32 USB20_N8 32

USB20_P7 35 USB20_N7 35

USB20_P6 26 USB20_N6 26

USB20_P5 33 USB20_N5 33

USB30_N12 USB30_N11 USB30_N10 USB20_N6 USB20_N0

R230 300 _0402_5%@R230 300_0402_5 %@ R231 300 _0402_5%@R231 300_0402_5 %@ R232 300 _0402_5%@R232 300_0402_5 %@ R233 300 _0402_5%@R233 300_0402_5 %@ R234 300 _0402_5%@R234 300_0402_5 %@

1 2

R132 1K_0 402_1%R132 1K_0402_1%

1 2

R133 1K_0 402_1%R133 1K_0402_1%

C212 .1U_0402_16V7KC212 .1U_0402_16V7K C213 .1U_0402_16V7KC213 .1U_0402_16V7K

C218 .1U_0402_16V7KC218 .1U_0402_16V7K C219 .1U_0402_16V7KC219 .1U_0402_16V7K

C220 .1U_0402_16V7KC220 .1U_0402_16V7K C221 .1U_0402_16V7KC221 .1U_0402_16V7K

Title

Size Document Number Rev

Custom

Date: Sheet of

E

LP3

LP2

LP1

BT

FP

CMOS

WLAN

1 2 1 2 1 2 1 2 1 2

USB20_P0 35 USB20_N0 35

1 2 1 2

RP1

FCH_SIC 7 FCH_SID 7

EC_PWM2 1 6

Compal Electronics, Inc.

FCH SATA/SPI/VGA/HWM/SD

1 2

C222 10P_0402_50V8J@C222 10P_0 402_50V8J@

1 2

C223 10P_0402_50V8J@C223 10P_0 402_50V8J@

1 2

C224 10P_0402_50V8J@C224 10P_0 402_50V8J@

1 2

C225 10P_0402_50V8J@C225 10P_0 402_50V8J@

1 2

C226 10P_0402_50V8J@C226 10P_0 402_50V8J@

+FCH_VDD_11_SSUSB_S

USB30_FTX_DRX_P2 34 USB30_FTX_DRX_N2 34

USB30_FRX_DTX_P2 34 USB30_FRX_DTX_N2 34

USB30_FTX_DRX_P1 34 USB30_FTX_DRX_N1 34

USB30_FRX_DTX_P1 34 USB30_FRX_DTX_N1 34

USB30_FTX_DRX_P0 34 USB30_FTX_DRX_N0 34

USB30_FRX_DTX_P0 34 USB30_FRX_DTX_N0 34

strap pin

LA-8121P

E

LP3

LP2

LP1

0.4

14 50Mon day, January 16, 2012

0.4

A

B

C

D

E

+3VS

+FCH_VDDAN_33_DAC

1 1

+3VS

+3VS +FCH_VDDAN_33_DAC

FBMA-L11-201209-221LMA30T_0 805

2 2

SIT, NO.52

+3V

SIT, NO.53

+3V

3 3

+3VS

4 4

L2

1 2

MBK1608221YZF_2P

220 ohm

1 2

R168 0_0402_5%R168 0_0402_5%

L3

1 2

MBK1608221YZF_2P

@

L5

1 2

30mil

220 ohm

L7

1 2

MBK1608221YZF_2P

220 ohm

L11

1 2

MBK1608221YZF_2P

220 ohm

L14

1 2

MBK1608221YZF_2P

220 ohm

L15

1 2

MBK1608221YZF_2P

220 ohm

A

+VDDPL_33_SYS

C154

2.2U_0402_6.3V6M

C154

2.2U_0402_6.3V6M

1

2

+VDDPL_33_MLDAC

.1U_0402_16V7K

C153

1

2

C175

2.2U_0603_6.3V6K

C175

2.2U_0603_6.3V6K

C176

1

2

+VDDPL_33_SSUSB_S

C185

2.2U_0402_6.3V6M

C185

2.2U_0402_6.3V6M

1

2

+VDDPL_33_USB_S

C193

2.2U_0402_6.3V6M

C193

2.2U_0402_6.3V6M

1

2

+VDDPL_33_PCIE

+VDDPL_33_SATA

C147

.1U_0402_16V7K

C147

.1U_0402_16V7K

1

2

.1U_0402_16V7K

C158

1

2

LDO_CAP: Internally generated 1.8V supply for the RGB outputs

+1.1VS

0.1U_0402_16V4Z

1

2

+3VS

+VDDPL_33_MLDAC

L4

1 2

MBK1608221YZF_2P

220 ohm/2A

R171 0_0603_5%R171 0_0603_5%

SIT, NO.51

C186

.1U_0402_16V7K

C186

.1U_0402_16V7K

1

2

C194

.1U_0402_16V7K

C194

.1U_0402_16V7K

1

2

C200

2.2U_0402_6.3V6M

C200

2.2U_0402_6.3V6M

1

2

C207

2.2U_0402_6.3V6M

C207

2.2U_0402_6.3V6M

1

2

SIT, NO.49

+1.1V

+3V

FBMA-L11-201209-221LMA30T_0 805

SIT, NO.47

+1.1V

SIT, NO.48

+1.1V

FBMA-L11-201209-221LMA30T_0 805

1 2

220 ohm/2A

1 2

MBK1608221YZF_2P

1 2

MBK1608221YZF_2P

+FCH_VDD_11_SSUSB_S

40mils

L16

42 ohm/4A

L6

L10

220 ohm

L12

220 ohm

12

1 2

+VDDPL_33_SYS

1 2

R173 0_0402_5%R173 0_0402_5%

1 2

R169 0_0402_5%R169 0_0402_5%

+VDDPL_33_SSUSB_S

+VDDPL_33_USB_S

+VDDPL_33_PCIE

+VDDPL_33_SATA

1 2

R176 0_0 402_5%R176 0_0402_5%

1 2

R177 0_0 603_5%R177 0_0603_5%

C180

1

2

C188

1

2

C195

1

2

1 2

R183 0_0603_5%R183 0_0603_5%

1 2

R185 0_0603_5%R185 0_0603_5%

B

22U_0603_6.3V6M

C151

C146

1

2

C168

1

2

R180 0_0402_5%R180 0_0402_5%

10U_0603_6.3V6M

C181

1

2

C189

.1U_0402_16V7K

C189

.1U_0402_16V7K

2.2U_0402_6.3V6M

1

2

C196

.1U_0402_16V7K

C196

.1U_0402_16V7K

10U_0603_6.3V6M

1

2

C201

1

2

C208

1

2

+VDDIO_33_PCIGP

.1U_0402_16V7K

C152

C157

1

2

+VDDPL_33_DAC

+VDDPL_33_ML

+FCH_VDDAN_33_DAC

@

1 2

C164 2.2U_0603 _6.3V6K

+VDDPL_11_DAC

+VDDAN_11_ML

4.7U_0402_6.3V6M

C170

.1U_0402_16V7K

C170

.1U_0402_16V7K

C169

.1U_0402_16V7K

C169

.1U_0402_16V7K

1

2

1 2

+VDDAN_33_USB

C182

1

2

+VDDAN_11_USB_S

C190

1

@

2

+VDDCR_11V_USB

C197

1

2

+VDDAN_11_SSUSB

1U_0402_6.3V6K

+VDDCR_11_SSUSB

10U_0603_6.3V6M

C184

C183

1U_0402_6.3V6K

C183

1U_0402_6.3V6K

.1U_0402_16V7K@C190

.1U_0402_16V7K

1

2

C203

.1U_0402_16V7K

C203

.1U_0402_16V7K

C202

.1U_0402_16V7K

C202

.1U_0402_16V7K

1

2

C210

C209

1U_0402_6.3V6K

C209

1U_0402_6.3V6K

1

2

U2C

HUDSON-2

102mA

AB17

VDDIO_33_PCIGP_1

AB18

VDDIO_33_PCIGP_2

AE9

VDDIO_33_PCIGP_3

AD10

VDDIO_33_PCIGP_4

AG7

VDDIO_33_PCIGP_5

AC13

VDDIO_33_PCIGP_6

AB12

VDDIO_33_PCIGP_7

AB13

VDDIO_33_PCIGP_8

AB14

VDDIO_33_PCIGP_9

AB16

VDDIO_33_PCIGP_10

47mA

H24

VDDPL_33_SYS

20mA

V22

VDDPL_33_DAC

12mA

U22

VDDPL_33_ML

30mA

T22

VDDAN_33_DAC

11mA

L18

VDDPL_33_SSUSB_S

14mA

D7

VDDPL_33_USB_S

11mA

AH29

VDDPL_33_PCIE

12mA

AG28

VDDPL_33_SATA

M31

LDO_CAP

7mA

V21

VDDPL_11_DAC

226mA

Y22

VDDAN_11_ML_1

V23

VDDAN_11_ML_2

V24

VDDAN_11_ML_3

V25

VDDAN_11_ML_4

AB10

VDDIO_33_GBE_S

AB11

VDDCR_11_GBE_S_1

AA11

VDDCR_11_GBE_S_2

AA9

VDDIO_GBE_S_1

AA10

VDDIO_GBE_S_2

470mA

G7

VDDAN_33_USB_S_1

H8

.1U_0402_16V7K

VDDAN_33_USB_S_2

J8

VDDAN_33_USB_S_3

K8

VDDAN_33_USB_S_4

K9

VDDAN_33_USB_S_5

M9

VDDAN_33_USB_S_6

M10

VDDAN_33_USB_S_7

N9

VDDAN_33_USB_S_8

N10

VDDAN_33_USB_S_9

M12

VDDAN_33_USB_S_10

N12

VDDAN_33_USB_S_11

M11

VDDAN_33_USB_S_12

140mA

U12

VDDAN_11_USB_S_1

U13

VDDAN_11_USB_S_2

42mA

T12

VDDCR_11_USB_S_1

T13

VDDCR_11_USB_S_2

282mA

P16

VDDAN_11_SSUSB_S_1

M14

VDDAN_11_SSUSB_S_2

N14

VDDAN_11_SSUSB_S_3

P13

VDDAN_11_SSUSB_S_4

P14

VDDAN_11_SSUSB_S_5

424mA

N16

VDDCR_11_SSUSB_S_1

N17

VDDCR_11_SSUSB_S_2

P17

VDDCR_11_SSUSB_S_3

M17

VDDCR_11_SSUSB_S_4

21807-A13-HUDSON-M3_FCBGA656

C211

.1U_0402_16V7K

C211

.1U_0402_16V7K

1

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

HUDSON-2

PCI/GPIO I/O

USB SS USB MAIN LINKGBE LAN

POWER

C

VDDCR_11_1 VDDCR_11_2 VDDCR_11_3 VDDCR_11_4 VDDCR_11_5 VDDCR_11_6 VDDCR_11_7 VDDCR_11_8

CORE S0

VDDCR_11_9

VDDAN_11_CLK_1 VDDAN_11_CLK_2 VDDAN_11_CLK_3 VDDAN_11_CLK_4 VDDAN_11_CLK_5 VDDAN_11_CLK_6

CLKGEN I/OPCI EXPRESSSERIAL ATA3.3V_S5 I/O

VDDAN_11_CLK_7 VDDAN_11_CLK_8

VDDAN_11_PCIE_1 VDDAN_11_PCIE_2 VDDAN_11_PCIE_3 VDDAN_11_PCIE_4 VDDAN_11_PCIE_5 VDDAN_11_PCIE_6 VDDAN_11_PCIE_7 VDDAN_11_PCIE_8

VDDAN_11_SATA_1 VDDAN_11_SATA_4 VDDAN_11_SATA_2 VDDAN_11_SATA_3 VDDAN_11_SATA_5 VDDAN_11_SATA_6 VDDAN_11_SATA_7 VDDAN_11_SATA_8 VDDAN_11_SATA_9

VDDAN_11_SATA_10

VDDIO_33_S_1 VDDIO_33_S_2 VDDIO_33_S_3 VDDIO_33_S_4 VDDIO_33_S_5 VDDIO_33_S_6 VDDIO_33_S_7 VDDIO_33_S_8

VDDXL_33_S

VDDCR_11_S_1 VDDCR_11_S_2

VDDPL_11_SYS_S

VDDAN_33_HWM_S

VDDIO_AZ_S

2011/04/18 2015/07/08

1007mA

C155

.1U_0402_16V7K

C155

T14 T17 T20 U16 U18 V14 V17 V20 Y17

340mA

H26 J25 K24 L22 M22 N21 N22 P22

1088mA

AB24 Y21 AE25 AD24 AB23 AA22 AF26 AG27

1337mA

AA21 Y20 AB21 AB22 AC22 AC21 AA20 AA18 AB20 AC19

59mA

N18 L19 M18 V12 V13 Y12 Y13 W11

5mA

G24

187mA

N20 M20

70mA

J24

12mA

M8

26mA

AA4

Compal Secret Data

.1U_0402_16V7K

1

2

C159

.1U_0402_16V7K

C159

.1U_0402_16V7K

1

2

C165

.1U_0402_16V7K

C165

.1U_0402_16V7K

1

2

C171

.1U_0402_16V7K

C171

.1U_0402_16V7K

1

2

C177

1U_0402_6.3V6K

C177

1U_0402_6.3V6K

1

2

C187

2.2U_0402_6.3V6M

C187

2.2U_0402_6.3V6M

1

2

C191

1U_0402_6.3V6K

C191

1U_0402_6.3V6K

1

2

C198

2.2U_0402_6.3V6M

C198

2.2U_0402_6.3V6M

1

2

C204

2.2U_0402_6.3V6M

C204

2.2U_0402_6.3V6M

1

2

Deciphered Date

+VCC_VDDCR_11

C149

C148

.1U_0402_16V7K

C148

.1U_0402_16V7K

1

2

+1.1VS_CKVDD

C160

.1U_0402_16V7K

C160

.1U_0402_16V7K

C161

1

2

+VDDAN_11_PCIE

C166

1U_0402_6.3V6K

C166

1U_0402_6.3V6K

C167

1

2

C172

1U_0402_6.3V6K

C172

1U_0402_6.3V6K

C173

1

2

+VDDIO_33_S

C178

1U_0402_6.3V6K

C178

1U_0402_6.3V6K

C179

1

2

+VDDXL_3.3V

+VDDCR_1.1V

C192

1U_0402_6.3V6K

C192

1U_0402_6.3V6K

1

2

+VDDPL_11_SYS_S

.1U_0402_16V7K

C199

1

2

+VDDAN_33_HWM

C205

.1U_0402_16V7K

C205

.1U_0402_16V7K

1

2

+VDDIO_AZ

C206 2.2U_0402_6.3V6MC206 2.2U_0402_6.3V6M

D

C150

1U_0402_6.3V6K

1

2

C162

1U_0402_6.3V6K

1

2

+VDDAN_11_PCIE

22U_0603_6.3V6M

C174

1U_0402_6.3V6K

1

2

2.2U_0402_6.3V6M

1 2

1U_0402_6.3V6K

C156

10U_0603_6.3V6M

C156

10U_0603_6.3V6M

1

2

+1.1VS_CKVDD

1U_0402_6.3V6K

C163

22U_0603_6.3V6M

C163

22U_0603_6.3V6M

1

2

+AVDD_SATA

22U_0603_6.3V6M

1 2

R179 0_0402_5%R179 0_0402_5%

1 2

MBK1608221YZF_2P

220 ohm

1 2

R181 0_0603_5%R181 0_0603_5%

1 2

MBK1608221YZF_2P

220 ohm

1 2

R182 0_0402_5%R182 0_0402_5%

1 2

R184 0_0402_5%R184 0_0402_5%

1 2

R170 0_0805_5%R170 0_0805_5%

42ohm @ 100MHz

1 2

R172 0_0603_5%R172 0_0603_5%

42ohm @ 100MHz

R175 0_0805_5%R175 0_0805_5%

42ohm @ 100MHz

R178 0_0805_5%R178 0_0805_5%

L8

L13

+1.1VS

1 2

+1.1VS

SIT, NO.54

+3V_FCH

SIT, NO.56

+3V

+VDDXL_3.3V Tie to +3.3V_S5 rail if USB3 Wake is supported; otherwise, tie to +3.3V_S0 rail. Hudson-2 designs: Tie to +3.3V_S0 rail.

+1.1VALW

SIT, NO.50

VDDPL_11_SYS_S should be

+1.1V

tied to +1.1V_S5 rail if USB 3.0 Wake is supported; otherwise, it can be tied to +1.1V_S0 rail.

SIT, NO.55

+3V_FCH

AMD reply: VDDAN_33_HWM_S: Please connect it to +3.3V_S5 directly if HWM is not used.

VDDIO_AZ_S

+3VS

Wake on Ring supported: Tie to +3.3/

1.5V_S5 rail, and treat like a 3.3/1.1V_S5 rail. Wake on Ring not supported: Tie to +3.3/

1.5V_S0 rail, and treat like a 3.3/1.1V S0 rail.

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

FCH PWR

FCH PWR LA-8121P

LA-8121P

15 50Mon day, January 16, 2012

E

0.4

5

4

3

2

1

U2E

HUDSON-2

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSAN_HWM

VSSXL

VSSPL_SYS

HUDSON-2

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

GROUND

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSPL_DAC

VSSAN_DAC

VSSANQ_DAC

VSSIO_DAC

EFUSE

T25 T27 U6 U14 U17 U20 U21 U30 U32 V11 V16 V18 W4 W6 W25 W28 Y14 Y16 Y18 AA6 AA12 AA13 AA14 AA16 AA17 AA25 AA28 AA30 AA32 AB25 AC6 AC18 AC28 AD27 AE6 AE15 AE21 AE28 AF8 AF12 AF16 AF33 AG30 AG32 AH5 AH11 AH18 AH19 AH21 AH23 AH25 AH27 AJ18 AJ28 AJ29 AK21 AK25 AL18 AM21 AM25 AN1 AN18 AN28 AN33

T21 L28 K33 N28

R6

A3

A33

B7

B13

D D

C C

B B

D13

E12 E16 E29

F11 F13 F16 F17 F19 F23 F25 F29

G16 G32 H12 H15 H29

K16 K27 K28

M13 M16 M21 M25

N11 N13 N23 N24 P12 P18 P20 P21 P31 P33

R11 R25 R28

K25

H25

J10 J13 J28 J32

L12 L13 L15 L16 L21

T11 T16 T18

D9

E5

F7 F9

G6

J6 J9

K7

L6

N6

R4

N8

STRAP PINS

PCI_CLK1

ALLOW

PULL

PCIE GEN2

HIGH

DEFAULT

FORCE

PULL

PCIE GEN1

LOW

PCI_CLK112

PCI_CLK312

PCI_CLK412

CLK_PCI_EC12,31

LPC_CLK112

EC_PWM214

RTC_CLK12,31

PCI_CLK3

USE DEBUG STRAPS

IGNORE DEBUG STRAP

DEFAULT

12

@

PCI_CLK4 CLK_PCI_EC

NON_FUSION CLOCK MODE

FUSION CLOCK MODE

DEFAULT

R187 10K_0402_5%@R187 10K_0402_5%

R186 10K_0402_5%R186 10K_0402_5%

12

@

R198 10K_0402_5%@R198 10K_0402_5%

12

R188 10K_0402_5%@R188 10K_0402_5%

12

@

R200 10K_0402_5%R200 10K_0402_5%

R199 10K_0402_5%R199 10K_0402_5%

12

EC ENABLED

EC DISABLED

DEFAULT

R189 10K_0402_5%@R189 10K_0402_5%

12

@

R201 10K_0402_5%R201 10K_0402_5%

12

@

CLKGEN ENABLED

DEFAULT

CLKGEN DISABLE

R190 10K_0402_5%R190 10K_0402_5%

@

R202 10K_0402_5%@R202 10K_0402_5%

EC_PWM2

LPC ROM

SPI ROM

DEFAULT

+3V_FCH+3V_FCH+3V_FCH+3V_FCH+3VS+3VS+3VS

R192 10K_0402_5%R192 10K_0402_5%

R191 10K_0402_5%@R191 10K_0402_5%

12

R204 2.2K_0402_5%@R204 2.2K_0402_5%

R203 2.2K_0402_5%R203 2.2K_0402_5%

12

@

RTC_CLKLPC_CLK1

S5 PLUS MODE DISABLED

DEFAULT

S5 PLUS MODE ENABLED

DEBUG STRAPS

FCH HAS 15K INTERNAL PU FOR PCI_AD[27:23]

PCI_AD27 PCI_AD26

PULL HIGH

PULL LOW

PCI_AD2712

PCI_AD2612

PCI_AD2512

PCI_AD2412

PCI_AD2312

USE PCI PLL

DEFAULT

BYPASS PCI PLL

DISABLE ILA AUTORUN

DEFAULT

ENABLE ILA AUTORUN

R193 2.2K_0402_5%@R193 2.2K_0402_5%

12

@

PCI_AD25 PCI_AD24

USE FC PLL

BYPASS FC PLL

R194 2.2K_0402_5%@R194 2.2K_0402_5%

12

@

R195 2.2K_0402_5%@R195 2.2K_0402_5%

12

USE DEFAULT PCIE STRAPS

DEFAULT

USE EEPROM PCIE STRAPS

12

@

R196 2.2K_0402_5%@R196 2.2K_0402_5%

PCI_AD23

DISABLE PCI MEM BOOT

DEFAULTDEFAULT

ENABLE PCI MEM BOOT

12

@

R197 2.2K_0402_5%@R197 2.2K_0402_5%

21807-A13-HUDSON-M3_FCBGA656

A A

21807-A13-HUDSON-M3_FCBGA656

5

Security Classification

2011/04/18 2015/07/08

Issued Date

THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF COMP AL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF COMP AL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION IT CONTAIN S

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION IT CONTAIN S

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION IT CONTAIN S MAY BE USED BY OR DISCLOSED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

2011/04/18 2015/07/08

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

FCH-VSS/Strap

LA-8121P

16 50Monday, January 16, 2012

1

0.4

5

4

3

2

1

R1404 1K_0402_5%DI S@R1404 1K_0402_5%DI S@

PCIE_CTX_GRX_P[15..0]

PCIE_CTX_GRX_N[15..0]

PCIE_CTX_GRX_P0 PCIE_CTX_GRX_N0

PCIE_CTX_GRX_P1 PCIE_CTX_GRX_N1

PCIE_CTX_GRX_P2 PCIE_CTX_GRX_N2

PCIE_CTX_GRX_P3 PCIE_CTX_GRX_N3

PCIE_CTX_GRX_P4 PCIE_CTX_GRX_N4

PCIE_CTX_GRX_P5 PCIE_CTX_GRX_N5

PCIE_CTX_GRX_P6 PCIE_CTX_GRX_N6

PCIE_CTX_GRX_P7 PCIE_CTX_GRX_N7

PCIE_CTX_GRX_P8 PCIE_CTX_GRX_N8

PCIE_CTX_GRX_P9 PCIE_CTX_GRX_N9

PCIE_CTX_GRX_P10 PCIE_CTX_GRX_N10

PCIE_CTX_GRX_P11 PCIE_CTX_GRX_N11

PCIE_CTX_GRX_P12 PCIE_CTX_GRX_N12

PCIE_CTX_GRX_P13 PCIE_CTX_GRX_N13

PCIE_CTX_GRX_P14 PCIE_CTX_GRX_N14

PCIE_CTX_GRX_P15 PCIE_CTX_GRX_N15

CLK_PCIE_VGA CLK_PCIE_VGA#

12

GPU_RST#

D D

C C

B B

PCIE_CTX_GRX_P[15..0]5

PCIE_CTX_GRX_N[15..0]5

CLK_PCIE_VGA#12

U1401A

AA38

PCIE_RX0P

Y37

PCIE_RX0N

Y35

PCIE_RX1P

W36

PCIE_RX1N

W38

PCIE_RX2P

V37

PCIE_RX2N

V35

PCIE_RX3P

U36

PCIE_RX3N

U38

PCIE_RX4P

T37

PCIE_RX4N

T35

PCIE_RX5P

R36

PCIE_RX5N

R38

PCIE_RX6P

P37

PCIE_RX6N

P35

PCIE_RX7P

N36

PCIE_RX7N

N38

PCIE_RX8P

M37

PCIE_RX8N

M35

PCIE_RX9P

L36

PCIE_RX9N

L38

PCIE_RX10P

K37

PCIE_RX10N

K35

PCIE_RX11P

J36

PCIE_RX11N

J38

PCIE_RX12P

H37

PCIE_RX12N

H35

PCIE_RX13P

G36

PCIE_RX13N

G38

PCIE_RX14P

F37

PCIE_RX14N

F35

PCIE_RX15P

E37

PCIE_RX15N

CLOCK

AB35

PCIE_REFCLKP

AA36

PCIE_REFCLKN

AH16

PWRGOOD

AA30

PERSTB

12

2160809000A11SEYMOU_FCBGA962

R2486

DIS@

100K_0402_5%

for PX5.0 experiment

@

PCIE_TX0P PCIE_TX0N

PCIE_TX1P PCIE_TX1N

PCIE_TX2P PCIE_TX2N

PCIE_TX3P PCIE_TX3N

PCIE_TX4P

PCI EXPRESS INTERFACE

PCIE_TX4N

PCIE_TX5P PCIE_TX5N

PCIE_TX6P PCIE_TX6N

PCIE_TX7P PCIE_TX7N

PCIE_TX8P PCIE_TX8N

PCIE_TX9P PCIE_TX9N

PCIE_TX10P PCIE_TX10N

PCIE_TX11P PCIE_TX11N

PCIE_TX12P PCIE_TX12N

PCIE_TX13P PCIE_TX13N

PCIE_TX14P PCIE_TX14N

PCIE_TX15P PCIE_TX15N

CALIBRATION

PCIE_CALRP

PCIE_CALRN

PCIE_CRX_GTX_P[15..0]

PCIE_CRX_GTX_N[15..0]

Y33

PCIE_CRX_C_GTX_P0

Y32

PCIE_CRX_C_GTX_N0

W33

PCIE_CRX_C_GTX_P1

W32

PCIE_CRX_C_GTX_N1 PCIE_CRX_GTX_N1

U33

PCIE_CRX_C_GTX_P2

U32

PCIE_CRX_C_GTX_N2

U30

PCIE_CRX_C_GTX_P3

U29

PCIE_CRX_C_GTX_N3 PCIE_CRX_GTX_N3

T33

PCIE_CRX_C_GTX_P4

T32

PCIE_CRX_C_GTX_N4 PCIE_CRX_GTX_N4

T30

PCIE_CRX_C_GTX_P5

T29

PCIE_CRX_C_GTX_N5 PCIE_CRX_GTX_N5

P33

PCIE_CRX_C_GTX_P6

P32

PCIE_CRX_C_GTX_N6

P30

PCIE_CRX_C_GTX_P7

P29

PCIE_CRX_C_GTX_N7 PCIE_CRX_GTX_N7

N33

PCIE_CRX_C_GTX_P8

N32

PCIE_CRX_C_GTX_N8 PCIE_CRX_GTX_N8

N30

PCIE_CRX_C_GTX_P9

N29

PCIE_CRX_C_GTX_N9 PCIE_CRX_GTX_N9

L33

PCIE_CRX_C_GTX_P10

L32

PCIE_CRX_C_GTX_N10 PCIE_C RX_GTX_N10

L30

PCIE_CRX_C_GTX_P11

L29

PCIE_CRX_C_GTX_N11 PCIE_C RX_GTX_N11

K33

PCIE_CRX_C_GTX_P12

K32

PCIE_CRX_C_GTX_N12 PCIE_C RX_GTX_N12

J33

PCIE_CRX_C_GTX_P13

J32

PCIE_CRX_C_GTX_N13 PCIE_C RX_GTX_N13

K30

PCIE_CRX_C_GTX_P14

K29

PCIE_CRX_C_GTX_N14

H33

PCIE_CRX_C_GTX_P15

H32

PCIE_CRX_C_GTX_N15 PCIE_C RX_GTX_N15

Y30

Y29

1 2

PCIE_CRX_GTX_P[15..0] 5

PCIE_CRX_GTX_N[15..0] 5

R14031.27K_0402_1% DIS@ R14031.27K_0402_1% DIS@

R14052K_0402_1% DIS@ R14052K_0402_1% DIS@

+1.0VGS

12

C1401.1U_0402_16V7K DIS@C1401.1U_0402_16V7K DIS@

12

C1402.1U_0402_16V7K DIS@C1402.1U_0402_16V7K DIS@

12

C1404.1U_0402_16V7K

12

C1405.1U_0402_16V7K DIS@C1405.1U_0402_16V7K DIS@

12

C1406.1U_0402_16V7K

12

C1407.1U_0402_16V7K DIS@C1407.1U_0402_16V7K DIS@

12

C1408.1U_0402_16V7K

12

C1403.1U_0402_16V7K DIS@C1403.1U_0402_16V7K DIS@

12

C1409.1U_0402_16V7K

12

C1410.1U_0402_16V7K DIS@C1410.1U_0402_16V7K DIS@

12

C1411.1U_0402_16V7K

12

C1412.1U_0402_16V7K DIS@C1412.1U_0402_16V7K DIS@

12

C1413.1U_0402_16V7K

12

C1414.1U_0402_16V7K DIS@C1414.1U_0402_16V7K DIS@

12

C1415.1U_0402_16V7K

12

C1416.1U_0402_16V7K DIS@C1416.1U_0402_16V7K DIS@

12

C1417.1U_0402_16V7K

12

C1418.1U_0402_16V7K DIS@C1418.1U_0402_16V7K DIS@

12

C1419.1U_0402_16V7K

12

C1420.1U_0402_16V7K DIS@C1420.1U_0402_16V7K DIS@

12

C1421.1U_0402_16V7K

12

C1422.1U_0402_16V7K DIS@C1422.1U_0402_16V7K DIS@

12

C1423.1U_0402_16V7K

12

C1424.1U_0402_16V7K DIS@C1424.1U_0402_16V7K DIS@

12

C1425.1U_0402_16V7K

12

C1426.1U_0402_16V7K DIS@C1426.1U_0402_16V7K DIS@

12

C1427.1U_0402_16V7K

12

C1428.1U_0402_16V7K DIS@C1428.1U_0402_16V7K DIS@

12

C1429.1U_0402_16V7K

12

C1430.1U_0402_16V7K DIS@C1430.1U_0402_16V7K DIS@

12

C1400.1U_0402_16V7K

12

C1431.1U_0402_16V7K DIS@C1431.1U_0402_16V7K DIS@

DIS@

PCIE_CRX_GTX_P0 PCIE_CRX_GTX_N0

PCIE_CRX_GTX_P1

PCIE_CRX_GTX_P2 PCIE_CRX_GTX_N2

PCIE_CRX_GTX_P3

PCIE_CRX_GTX_P4

PCIE_CRX_GTX_P5

PCIE_CRX_GTX_P6 PCIE_CRX_GTX_N6

PCIE_CRX_GTX_P7

PCIE_CRX_GTX_P8

PCIE_CRX_GTX_P9

PCIE_CRX_GTX_P10

PCIE_CRX_GTX_P11

PCIE_CRX_GTX_P12

PCIE_CRX_GTX_P13

PCIE_CRX_GTX_P14 PCIE_CRX_GTX_N14

PCIE_CRX_GTX_P15

LVDS Interface

U1401G

LVDS CONTROL

TXCLK_UP_DPF3P

TXCLK_UN_DPF3N

TXOUT_U0P_DPF2P TXOUT_U0N_DPF2N

TXOUT_U1P_DPF1P TXOUT_U1N_DPF1N

TXOUT_U2P_DPF0P TXOUT_U2N_DPF0N

LVTMDP

TXCLK_LP_DPE3P TXCLK_LN_DPE3N

TXOUT_L0P_DPE2P

TXOUT_L0N_DPE2N

TXOUT_L1P_DPE1P

TXOUT_L1N_DPE1N

TXOUT_L2P_DPE0P

TXOUT_L2N_DPE0N

2160809000A11SEYMOU_FCBGA962

DIS@

+3VGS

5

U1400

PXS_RST#12,14CLK_PCIE_VGA12

APU_PCIE_RST#12,33,35

1

IN1

2

IN2

3

VCC

4

OUT

GND

MC74VHC1G08DFT2G_SC70-5

DIS@

GPU_RST#

VARY_BL

DIGON

TXOUT_U3P TXOUT_U3N

TXOUT_L3P TXOUT_L3N

AK27 AJ27

AK35 AL36

AJ38 AK37

AH35 AJ36

AG38 AH37

AF35 AG36

AP34 AR34

AW37 AU35

AR37 AU39

AP35 AR35

AN36 AP37

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2011/04/18 2015/07/08

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

ATI_Themes XT_M2_PCIE/LVDS

Size Document Num ber Rev

C

Date: Sheet of

LA-8121P

1

17 50Monday, January 16, 2012

0.4

5

U1401B

Option for MEM ID MEM_ID0

+1.8VGS

1 2

D D

C C

+1.8VGS

+1.0VGS

B B

20P_0402_50V8

1 2

STRAPS

+3VGS

1 2

DIS@

L1403

12

BLM15BD121SN1D_2P~D

1

C1439

2

1U_0402_6.3V6K

DIS@ C1439

DIS@

10U_0603_6.3V6M

DIS@

L1400

12

BLM15BD121SN1D_2P~D

1

C1442

2

DIS@ C1442

DIS@

10U_0603_6.3V6M

XTALOUT XTALIN

R1437 1M_0402_5%DIS@R1437 1M_0402_5%DIS@

DIS@

Y1400

1

GND

DIS@

C1445

2

4

27MHZ 16PF 5YEA27000163IF50Q5

FVT, NO.21

1

C1440

2

DIS@ C1440

DIS@

1U_0402_6.3V6K

3

R140710K_0402_5% X76@ R140710K_0402_5% X76@

R140810K_0402_5% X76@ R140810K_0402_5% X76@

R140910K_0402_5% X76@ R140910K_0402_5% X76@

R141010K_0402_5% X76@ R141010K_0402_5% X76@

R142510K_0402_5% X76@ R142510K_0402_5% X76@

R142610K_0402_5% X76@ R142610K_0402_5% X76@

R143110K_0402_5% X76@ R143110K_0402_5% X76@

R143210K_0402_5% X76@ R143210K_0402_5% X76@

R152810K_0402_5% @ R152810K_0402_5% @

R141110K_0402_5% DIS@ R141110K_0402_5% DIS@

R141210K_0402_5% DIS@ R141210K_0402_5% DIS@

R141310K_0402_5% @ R141310K_0402_5% @

R141410K_0402_5% @ R141410K_0402_5% @

R141510K_0402_5% @ R141510K_0402_5% @

R141610K_0402_5% @ R141610K_0402_5% @

R141710K_0402_5% @ R141710K_0402_5% @

R141810K_0402_5% @ R141810K_0402_5% @

R141910K_0402_5% @ R141910K_0402_5% @

R142010K_0402_5% @ R142010K_0402_5% @

R142110K_0402_5% @ R142110K_0402_5% @

1

C1443

2

DIS@ C1443

DIS@

3

GPU_GPIO9

GPU_GPIO0

GPU_GPIO1

GPU_GPIO2

GPU_GPIO11

GPU_GPIO12

GPU_GPIO13

GPU_GPIO16

GPIO24_TRSTB

GPIO25_TDI

GPIO27_TMS

GPIO26_TCK

+DPLL_PVDD

1

C1441

2

.1U_0402_16V7K

DIS@ C1441

DIS@

+DPLL_VDDC

1

C1444

2

.1U_0402_16V7K

DIS@ C1444

DIS@

C1446

C1446 20P_0402_50V8

20P_0402_50V8

VRAM_ID0

VRAM_ID1

VRAM_ID2

VRAM_ID3

MEM_ID1

+1.8VGS

GPU_VID044

R1423 10K_0402_5%@R1423 10K_0402_5%@

GPU_VID144

PEG_CLKREQ#14

T1400T1400

+1.8VGS

R1424

R1424 499_0402_1%

499_0402_1%

DIS@

1 2

12

DIS@

R1429

R1429 249_0402_1%

249_0402_1%

DIS@

L1404

1 2

BLM15BD121SN1D_2P~D

8/25

T1408T1408

1 2

DIS@

1

C1438

C1438 .1U_0402_16V7K

.1U_0402_16V7K

2

(1.8V@20mA TSVDD)

1

C1447

2

10U_0603_6.3V6M

DIS@ C1447

DIS@

VRAM_ID0 VRAM_ID1 VRAM_ID2 VRAM_ID3

GPU_GPIO0 GPU_GPIO1 GPU_GPIO2 VGA_SMB_DA2 VGA_SMB_CK2

GPU_GPIO6

GPU_GPIO9

GPU_GPIO11 GPU_GPIO12 GPU_GPIO13

GPU_VID0 GPU_GPIO16

GPU_VID1

PEG_CLKREQ# GPIO24_TRSTB GPIO25_TDI GPIO26_TCK GPIO27_TMS GPIO28_TDO

+VREFG_GPU

+DPLL_PVDD

+DPLL_VDDC

XTALIN XTALOUT

+TSVDD

1

C1448

2

1U_0402_6.3V6K

DIS@ C1448

DIS@

1

C1449

2

0.1U_0402_16V4Z

DIS@ C1449

DIS@

MUTI GFX

AR8

NC_DVPCNTL_MVP_0

AU8

NC_DVPCNTL_MVP_1

AP8

NC_DVPCNTL_0

AW8

NC_DVPCNTL_1

AR3

NC_DVPCNTL_2

AR1

NC_DVPCLK

AU1

DVPDATA_0

AU3

DVPDATA_1

AW3

DVPDATA_2

AP6

DVPDATA_3

AW5

DVPDATA_4

AU5

DVPDATA_5

AR6

DVPDATA_6

AW6

DVPDATA_7

AU6

DVPDATA_8

AT7

DVPDATA_9

AV7

DVPDATA_10

AN7

DVPDATA_11

AV9

DVPDATA_12

AT9

DVPDATA_13

AR10

DVPDATA_14

AW10

DVPDATA_15

AU10

DVPDATA_16

AP10

NC_DVPDATA_17

AV11

NC_DVPDATA_18

AT11

NC_DVPDATA_19

AR12

NC_DVPDATA_20

AW12

NC_DVPDATA_21

AU12

NC_DVPDATA_22

AP12

NC_DVPDATA_23

AJ21

SWAPLOCKA

AK21

SWAPLOCKB

I2C

AK26

SCL

AJ26

SDA

GENERAL PURPOSE I/O

AH20

GPIO_0

AH18

GPIO_1

AN16

GPIO_2

AH23

GPIO_3_SMBDATA

AJ23

GPIO_4_SMBCLK

AH17

GPIO_5_AC_BATT

AJ17

GPIO_6

AK17

GPIO_7_BLON

AJ13

GPIO_8_ROMSO

AH15

GPIO_9_ROMSI

AJ16

GPIO_10_ROMSCK

AK16

GPIO_11

AL16

GPIO_12

AM16

GPIO_13

AM14

GPIO_14_HPD2

AM13

GPIO_15_PWRCNTL_0

AK14

GPIO_16

AG30

GPIO_17_THERMAL_INT

AN14

GPIO_18_HPD3

AM17

GPIO_19_CTF

AL13

GPIO_20_PWRCNTL_1

AJ14

GPIO_21_BB_EN

AK13

GPIO_22_ROMCSB

AN13

GPIO_23_CLKREQB

AM23

JTAG_TRSTB

AN23

JTAG_TDI

AK23

JTAG_TCK

AL24

JTAG_TMS

AM24

JTAG_TDO

AJ19

GENERICA

AK19

GENERICB

AJ20

GENERICC

AK20

GENERICD

AJ24

GENERICE_HPD4

AH26

NC_GENERICF_HPD5

AH24

NC_GENERICG_HPD6

AK24

HPD1

AH13

VREFG

AM32

DPLL_PVDD

AN32

DPLL_PVSS

PLL/CLOCK

AN31

DPLL_VDDC

AV33

XTALIN

AU34

XTALOUT

AW34

XO_IN

AW35

XO_IN2

AF29

DPLUS

THERMAL

AG29

DMINUS

AK32

TS_FDO

AL31

TS_A/NC

AJ32

TSVDD

AJ33

TSVSS

2160809000A11SEYMOU_FCBGA962

DIS@

DPA

DPB

DPC

DPD

DAC1

DAC2

V2SYNC/GENLK_VSYNC

DDC/AUX

TXCAP_DPA3P

TXCAM_DPA3N

TX0P_DPA2P TX0M_DPA2N

TX1P_DPA1P TX1M_DPA1N

TX2P_DPA0P TX2M_DPA0N

TXCBP_DPB3P

TXCBM_DPB3N

TX3P_DPB2P

TX3M_DPB2N

TX4P_DPB1P

TX4M_DPB1N

TX5P_DPB0P

TX5M_DPB0N

TXCCP_DPC3P TXCCM_DPC3N

TX0P_DPC2P

TX0M_DPC2N

TX1P_DPC1P

TX1M_DPC1N

TX2P_DPC0P

TX2M_DPC0N

NC_TXCDP_DPD3P NC_TXCDM_DPD3N

NC_TX3P_DPD2P NC_TX3M_DPD2N

NC_TX4P_DPD1P NC_TX4M_DPD1N

NC_TX5P_DPD0P NC_TX5M_DPD0N

HSYNC

VDD1DI

R2B/NC

G2B/NC

B2B/NC

COMP/NC

H2SYNC/GENLK_CLK

VDD2DI/NC VSS2DI/NC

A2VDD/NC

A2VDDQ/NC

A2VSSQ/TSVSSQ

R2SET/NC

DDC1CLK

DDC1DATA

DDC2CLK

DDC2DATA

DDCCLK_AUX3P

DDCDATA_AUX3N

NC_DDCCLK_AUX4P

NC_DDCDATA_AUX4N

DDCCLK_AUX5P

DDCDATA_AUX5N

DDC6CLK

DDC6DATA

NC_DDCCLK_AUX7P

NC_DDCDATA_AUX7N

4

AU24 AV23

AT25 AR24

AU26 AV25

AT27 AR26

AR30 AT29

AV31 AU30

AR32 AT31

AT33 AU32

AU14 AV13

AT15 AR14

AU16 AV15

AT17 AR16

AU20 AT19

AT21 AR20

AU22 AV21

AT23 AR22

AD39

R

AD37

RB

AE36

G

AD35

GB

AF37

B

AE38

BB

AC36 AC38

VSYNC

AB34

R1422 499_0402_1%DIS@R1422 499_0402_1%DIS@

RSET

AD34

+AVDD

AVDD

AE34

AVSSQ

AC33

+VDD1DI

AC34

VSS1DI

AC30

R2/NC

AC31

AD30

G2/NC

AD31

AF30

B2/NC

AF31

AC32

C/NC

AD32

Y/NC

AF32

AD29

GENLK_CLK

AC29

GENLK_VSYNC

AG31 AG32

AG33

AD33

AF33

AA29

AM26 AN26

AM27

AUX1P

AL27

AUX1N

AM19 AL19

AN20

AUX2P

AM20

AUX2N

AL30

For GDDR5 support, or for any memory data rate above 2 Gb/s

AM30

a 100-MHz reference clock is required Clock Input Configuraiton -GDDR5 with Park, Madison and Broadway

AL29

a) 27MHz (3.3V) oscillator connected to XO_IN, AND

AM29

b) 100MHz (3.3V) oscillator (no spread or spreaded) connected to XO_IN2 Clock Input Configuraiton -GDDR5 with M97

AN21 AM21

a) 100MHz (1.8V) oscillator connected to XTALIN Clock Input Configuraiton -GDDR3/DDR3

AJ30

a) 27MHz crystal connected to XTALIN or XTALOUT or

AJ31

b) 27MHz (1.8V) oscillator connected to XTALIN or c) 27MHz (3.3V) oscillator connected to XO_IN (Park, Madison, and Broadway only)

AK30 AK29

1 2

(1.8V@65mA AVDD)

(1.8V@100mA VDD1DI)

1

C1435

2

.1U_0402_16V7K

1U_0402_6.3V6K

DIS@ C1435

DIS@

T1401T1401 T1402T1402

1

C1436

2

DIS@ C1436

DIS@

10U_0603_6.3V6M

128M x 16 x 4 (1G)

1 2

L1402

DIS@L1402

DIS@

BLM15BD121SN1D_2P~D

1

C1437

2

DIS@ C1437

DIS@

+1.8VGS

Seymour XTX / Themes XT

Vendor VRAM_ID0 VRAM_ID1

H5TQ2G63BFR-11C

Hynix 1GB PN:SA00003YO00

K4W2G1646C-HC11

Samsung 1GB PN:SA000047Q00

DIS@

L1401 BLM15BD121SN1D_2P~D

1

C1433

C1432

2

1U_0402_6.3V6K

.1U_0402_16V7K

DIS@ C1433

DIS@

DIS@ C1432

DIS@

10U_0603_6.3V6M

1

C1434

2

DIS@ C1434

DIS@

0

1

1 2

3

VRAM_ID2

1

0

1

0

+1.8VGS

CONFIGURATION STRAPS -- SEE EACH DATABOOK FOR STRAP DETAILS

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED

STRAPS

MLPS_DISABLE NA GPIO_28_FDO

TX_PWRS_ENB PS_1[4] GPIO0

TX_DEEMPH_EN GPIO1

BIF_GEN3_EN_A

BIF_VGA DIS

ROMIDCFG[2:0]

BIOS_ROM_EN

AUD[1] AUD[0]

CEC_DIS

RESERVED RESERVED RESERVED RESERVED

AUD_PORT_CONN_PINSTRAP[2] AUD_PORT_CONN_PINSTRAP[1] AUD_PORT_CONN_PINSTRAP[0]

THEY MUST NOT CONFLICT DURING RESET

MLPS

PS_1[5]

GPIO2

PS_1[1]

GPIO9

PS_2[4]

PS_0[3..1]

GPIO[13:11]

PS_2[3]

GPIO22

NANAHSYNC

VSYNC

PS_1[3]

GENLK_CLK

PS_1[2]

GPIO8

NA

GPIO21

NA

GENERICC

PS_3[5]

NA

PS_3[4]

NA

PS_0[5]

NA

FVT, NO.34

10K_0402_5%

VGA_SMB_CK2

VGA_SMB_DA2

2

DESCRIPTION OF DEFAULT SETTINGS

Enable MLPS, NA for Thames/Whistler/Seymour 0: Enable MLPS, disable GPIO PINSTRAP 1: Disable MLPS, enable GPIO PINSTRAP

Transmitter Power Savings Enable 0: 50% Tx output swing 1: Full Tx output swing

PCIE Transmitter De-emphasis Enable 0: Tx de-emphasis disabled 1: Tx de-emphasis enabled

PCIE Gen3 Enable 0: GEN3 not supported at power-on 1: GEN3 supported at power-on (NOTE: RESERVED for Thames/Whistler/Seymour)

VGA Control 0: VGA controller capacity enabled 1: VGA controller capacity disabled (for multi-GPU)

Serial ROM type or Memory Aperture Size Select If GPIO22 = 0, defines memory aperture size If GPIO22 = 1, defines ROM type

100 - 512Kbit M25P05A (ST) 101 - 1Mbit M25P10A (ST) 101 - 2Mbit M25P20 (ST) 101 - 4Mbit M25P40 (ST) 101 - 8Mbit M25P80 (ST) 100 - 512Kbit Pm25LV512 (Chingis) 101 - 1Mbit Pm25LV010 (Chingis)

Enable external BIOS ROM device 0: Disabled 1: Enabled

00 - No audio function 01 - Audio for DP only 10 - Audio for DP and HDMI if dongle is detected 11 - Audio for both DP and HDMI

HDMI must only be enabled on systems that are legally entitled. It is the responsibility of the system designer to ensure that the system is entitled to support this feature.

Reserved for future ASICPS_0[4]

NOTE: ALLOW FOR PULLUP PADS FOR THE RESERVED STRAPS BUT DO NOT INSTALL RESISTOR IF THESE GPIOS ARE USEED, THEY MUST KEEP LOW AND NOT CONFLICT DURING RESET

RESERVED RESERVED RESERVED RESERVED (for Thames/Whistler/Seymour only)

STRAPS TO INDICATE THE NUMBER OF AUDIO CAPABLE DISPLAY OUTPUTS

111 = 0 usable endpoints 110 = 1 usable endpoints 101 = 2 usable endpoints 100 = 3 usable endpoints 011 = 4 usable endpoints 010 = 5 usable endpoints 001 = 6 usable endpoints 000 = All usable endpoints

+3VGS

Internal VGA Thermal Sensor

+3VGS

12

DIS@

R1427

R1428

R1428 10K_0402_5%

10K_0402_5%

5

34

2

Q1400B

DIS@ Q1400B

DIS@

2N7002KDWH_SOT363-6

R1433 0_0402_5%@R1433 0_0402_5%@

1 2

R1435 0_0402_5%@R1435 0_0402_5%@

Q1400A

DIS@ Q1400A

DIS@

2N7002KDWH_SOT363-6

1 2

61

Default SETTINGS

X

1

0

XXX

X

XX

0

EC_SMB_CK2 25,31,32,33,7

EC_SMB_DA2 25,31,32,33,7

1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

Compal Secret Data

2011/04/18 2015/07/08

Deciphered Date

Compal Electronics, Inc.

Title

ATI_Themes XT_M2_Main_MSIC

Size Document Number Rev

D

Date: Sheet of

LA-8121P

18 50Monday, January 16, 2012

1

18 50Monday, January 16, 2012

0.4

5

4

3

2

1

+3VGS

1

5

2

B

1

A

3

PX_MODE 44

PXS_PWREN

.1U_0402_16V7K

U1402

P

Y

G

100K_0402_5%

C1459

@ C1459

@

2

PX40@

PX40@ 4

2

R1443

IN

+3VALW

@

12

1

3

VGA_PWRGD14,44

PX40@

1 2

R1440

10K_0402_5%

1 2

R1461 0_0603_5%PX50@R1461 0_0603_5%PX50@

D1400

RB751V-40_SOD323-2

PX40@

R1440

2

20K_0402_5%

21

1U_0603_10V6K

G

PX40@

R1442

PX40@

C1463

+3VGS

13

PX40@

D

Q1406

2N7002K_SOT23-3

S

12

1

2

RUNPWROK

+3VGS

C1462 .1U_0402_16V7K

.1U_0402_16V7K

1 2

5

2

P

B

Y

1

A

G

PX40@

3

MC74VHC1G08DFT2G_SC70-5

1 2

R1460 0_0402_5%PX50@R1460 0_0402_5%PX50@

@C1462

@

U1403

4

PX_MODE

PXS_PWREN12,14,43,44

MC74VHC1G08DFT2G_SC70-5

1

C1461

.1U_0402_16V7K

2

@

+3VGS

D D

PX_EN20

SDV2, NO.52

FVT, NO.8

PXS_PWREN

C C

R1439

10K_0402_5%

PX40@

2

PXS_PWREN#

@

Q1409

OUT

DDTC124EKA-7-F_SC59-3

GND

12

61

PX40@

Q1403A

Q1403A 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

R1438

10K_0402_5%

PX40@

5

+5VS+5VS

12

34

PX40@

Q1403B

Q1403B 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

VDDC_ON#

1.0V_ON#

+3.3VS TO +3.3VGS

PXS_PWREN

+5VALW

+1.0VGS

+VGA_CORE

PX50@

R1445

20K_0402_5%

2

1.0V_ON#

VDDC_ON#

+3VS +3VGS

PX50@

R1446

20K_0402_5%

13

D

PX50@

G

Q1410

G

Q1410 2N7002K_SOT23-3

2N7002K_SOT23-3

S

D

S

D

S

13

G

2

D

S

D

S

13

G

2

short Jumper J2

J1

@J1

@

2 1

2MM

3 1

Q1407

AP2301GN-HF_SOT23-3

2

PX50@

1

C1466

C1466 .1U_0603_25V7K

.1U_0603_25V7K

2

PX40@

Q1401

Q1401 AO3416_SOT23-3

AO3416_SOT23-3

PX40@

Q1404

Q1404 AO3416_SOT23-3

AO3416_SOT23-3

10U_0603_6.3V6M

PX50@Q1407

PX50@

1 3

D

2

1 3

D

2

1

C1464

PX50@

2

PXS_PWREN#

55mA@1.0V, in BACO mode

PX40@

Q1402

S

AO3416_SOT23-3

G

PX40@

Q1405

S

AO3416_SOT23-3

G

1U_0603_10V6K

1

C1465

PX50@

2

1 2

D

S

R1447

12

13

+BIF_VDDC

R1444

R1444 470_0603_5%

470_0603_5%

@

Q1408

2

G

2N7002K_SOT23-3

0_0402_5%@

R1401

1

PX40@

C1460

C1460 22U_0805_6.3V6M

22U_0805_6.3V6M

2

8/25

1 2

PX50@R1401

PX50@

0_0603_5%

+VGA_CORE

SDV2, NO.57

+1.5VS TO +1.5VGS

+1.5V

B B

DIS@

C1467

10U_0603_6.3V6M

+VSB

+3VALW

12

DIS@

R1451

100K_0402_5%

PX_MODE

DIS@ R1454

DIS@

100K_0402_5%

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

100K_0402_5%

5

12

R1454

2011/04/18 2015/07/08

PX_MODE#

34

DIS@

Q1412B

Q1412B 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

Compal Secret Data

Deciphered Date

2

61

2

2 1

DIS@

U1404

U1404 AO4430L_SO8

AO4430L_SO8

8 7

1

6 5

2

FVT, No.48

DIS@

R1449

R1449 330K_0402_5%

330K_0402_5%

R1450

1 2

20K_0402_5%

DIS@

Q1412A

Q1412A 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

2MM

1 2

+1.5VGS

J2

@J2

@

1 2

DIS@

1

3

C1468

C1468 10U_0603_6.3V6M

10U_0603_6.3V6M

2

4

FVT, No.46FVT, No.47

1

R1452

DIS@

0_0402_5%

C1470

@

.1U_0603_25V7K

2

Title

ATI_Themes XT_M2_BACO

Size Document Num ber Rev

C

Date: Sheet of

DIS@

1

12

C1469

C1469 1U_0603_10V6K

1U_0603_10V6K

2

PX_MODE#

Compal Electronics, Inc.

LA-8121P

@

1 2

R1453 0_0402_5%

1

13

D

S

R1448 470_0603_5%

470_0603_5%

@R1448

@

Q1411

Q1411 2N7002K_SOT23-3

2N7002K_SOT23-3

2

G

19 50Monday, January 16, 2012

0.4

5

U1401H

DP C/D POWER

DP_VDDR

DP_VDDC

D D

DP_VDDR

DP_VDDC

DP_VDDR

DP_VDDC DP_VDDR

C C

DP_VDDR

DP_VDDC

B B

A A

AP20

DPCD/DPC_VDD18#1

AP21

DPCD/DPC_VDD18#2

AP13

DPCD/DPC_VDD10#1

AT13

DPCD/DPC_VDD10#2

AN17

DP/DPC_VSSR#1

AP16

DP/DPC_VSSR#2

AP17

DP/DPC_VSSR#3

AW14

DP/DPC_VSSR#4

AW16

DP/DPC_VSSR#5

AP22

DPCD/DPD_VDD18#1

AP23

DPCD/DPD_VDD18#2

AP14

DPCD/DPD_VDD10#1

AP15

DPCD/DPD_VDD10#2

AN19

DP/DPD_VSSR#1

AP18

DP/DPD_VSSR#2

AP19

DP/DPD_VSSR#3

AW20

DP/DPD_VSSR#4

AW22

DP/DPD_VSSR#5

AW18

12

R1458150_0402_1% DI S@ R1458150_0402_1% DIS@

12

R1459150_0402_1% DI S@ R1459150_0402_1% DIS@

DPCD_CALR

DP E/F POWER

AH34

DPEF/DPE_VDD18#1

AJ34

DPEF/DPE_VDD18#2

AL33

DPEF/DPE_VDD10#1

AM33

DPEF/DPE_VDD10#2

AN34

DP/DPE_VSSR#1

AP39

DP/DPE_VSSR#2

AR39

DP/DPE_VSSR#3

AU37

DP/DPE_VSSR#4

AF34

DPEF/DPF_VDD18#1

AG34

DPEF/DPF_VDD18#2

AK33

DPEF/DPF_VDD10#1

AK34

DPEF/DPF_VDD10#2

AF39

DP/DPF_VSSR#1

AH39

DP/DPF_VSSR#2

AK39

DP/DPF_VSSR#3

AL34

DP/DPF_VSSR#4

AM34

DP/DPF_VSSR#5

AM39

DPEF_CALR

2160809000A11SEYMOU_FCBGA962

DIS@

DP A/B POWER

DPAB/DPA_VDD18#1 DPAB/DPA_VDD18#2

DPAB/DPA_VDD10#1 DPAB/DPA_VDD10#2

DPAB/DPB_VDD18#1 DPAB/DPB_VDD18#2

DPAB/DPB_VDD10#1 DPAB/DPB_VDD10#2

DP PLL POWER

DPAB_VDD18/DPA_PVDD

DP_VSSR/DPA_PVSS

DPAB_VDD18/DPB_PVDD

DP_VSSR/DPB_PVSS

DPCD_VDD18/DPC_PVDD

DP_VSSR/DPC_PVSS

DPCD_VDD18/DPD_PVDD

DP_VSSR/DPD_PVSS

DPEF_VDD18/DPE_PVDD

DP_VSSR/DPE_PVSS

DPEF_VDD18/DPF_PVDD

DP_VSSR/DPF_PVSS

DP/DPA_VSSR#1 DP/DPA_VSSR#2 DP/DPA_VSSR#3 DP/DPA_VSSR#4 DP/DPA_VSSR#5

DP/DPB_VSSR#1 DP/DPB_VSSR#2 DP/DPB_VSSR#3 DP/DPB_VSSR#4 DP/DPB_VSSR#5

DPAB_CALR

4

AN24

DP_VDDR

AP24

AP31

DP_VDDC

AP32

AN27 AP27 AP28 AW24 AW26

AP25 AP26

AN33 AP33

AN29 AP29 AP30 AW30 AW32

AW28

AU28 AV27

AV29 AR28

AU18 AV17

AV19 AR18

AM37 AN38

AL38 AM35

DP_VDDR

DP_VDDC

1 2

R1457 150_0402_1%DIS@R1457 150_0402_1%DIS@

DP_VDDR

DP_VDDC

3

+1.8VGS

12

R14560_0402_5% DIS@ R14560_0402_5% DIS@

@C 1477

@

@C 1482

@

@C 1483

@C 1476

@

@C 1472

@

@C 1471

@

1

2

C1476

C1472

C1471

1U_0402_6.3V6K

.1U_0402_16V7K

@C 1475

@

@C 1474

@

@C 1473

@

1

2

C1475

C1474

C1473

.1U_0402_16V7K

1U_0402_6.3V6K

10U_0603_6.3V6M

@

@C 1481

@C 1487

@

@C 1488

@

1

2

C1487

C1488

.1U_0402_16V7K

10U_0603_6.3V6M

@C 1478

@

@C 1479

@

1

2

C1478

C1479

1U_0402_6.3V6K

10U_0603_6.3V6M

@

1

2

C1482

C1483

C1481

.1U_0402_16V7K

1U_0402_6.3V6K

@C 1480

@

1

2

C1480

1U_0402_6.3V6K

10U_0603_6.3V6M

@C 1486

@

@C 1484

@

@C 1485

@

1

2

C1486

C1484

C1485

.1U_0402_16V7K

1U_0402_6.3V6K

10U_0603_6.3V6M

AMD: no display from GPU,

8/26

can uninstall the capacitors

2

C1477

10U_0603_6.3V6M

1 2

8/26

.1U_0402_16V7K

+1.0VGS

R14550_0402_5% DIS@ R14550_0402_5% DIS@

2

U1401F

AB39

PCIE_VSS#1

E39

PCIE_VSS#2

F34

PCIE_VSS#3

F39

PCIE_VSS#4

G33

PCIE_VSS#5

G34

PCIE_VSS#6

H31

PCIE_VSS#7

H34

PCIE_VSS#8

H39

PCIE_VSS#9

J31

PCIE_VSS#10

J34

PCIE_VSS#11

K31

PCIE_VSS#12

K34

PCIE_VSS#13

K39

PCIE_VSS#14

L31

PCIE_VSS#15

L34

PCIE_VSS#16

M34

PCIE_VSS#17

M39

PCIE_VSS#18

N31

PCIE_VSS#19

N34

PCIE_VSS#20

P31

PCIE_VSS#21

P34

PCIE_VSS#22

P39

PCIE_VSS#23

R34

PCIE_VSS#24

T31

PCIE_VSS#25

T34

PCIE_VSS#26

T39

PCIE_VSS#27

U31

PCIE_VSS#28

U34

PCIE_VSS#29

V34

PCIE_VSS#30

V39

PCIE_VSS#31

W31

PCIE_VSS#32

W34

PCIE_VSS#33

Y34

PCIE_VSS#34

Y39

PCIE_VSS#35

F15

GND#100

F17

GND#101

F19

GND#102

F21

GND#103

F23

GND#104

F25

GND#105

F27

GND#106

F29

GND#107

F31

GND#108

F33

GND#109

F7

GND#110

F9

GND#111

G2

GND#112

G6

GND#113

H9

GND#114

J2

GND#115

J27

GND#116

J6

GND#117

J8

GND#118

K14

GND#119

K7

GND#120

L11

GND#121

L17

GND#122

L2

GND#123

L22

GND#124

L24

GND#125

L6

GND#126

M17

GND#127

M22

GND#128

M24

GND#129

N16

GND#130

N18

GND#131

N2

GND#132

N21

GND#133

N23

GND#134

N26

GND#135

N6

GND#136

R15

GND#137

R17

GND#138

R2

GND#139

R20

GND#140

R22

GND#141

R24

GND#142

R27

GND#143

R6

GND#144

T11

GND#145

T13

GND#146

T16

GND#147

T18

GND#148

T21

GND#149

T23

GND#150

T26

GND#151

U15

GND#153

U17

GND#154

U2

GND#155

U20

GND#156

U22

GND#157

U24

GND#158

U27

GND#159

U6

GND#160

V11

GND#161

V16

GND#163

V18

GND#164

V21

GND#165

V23

GND#166

V26

GND#167

W2

GND#168

W6

GND#169

Y15

GND#170

Y17

GND#171

Y20

GND#172

Y22

GND#173

Y24

GND#174

Y27

GND#175

U13

GND#152

V13

GND#162

2160809000A11SEYMOU_FCBGA962

DIS@

GND

GND#1 GND#2 GND#3 GND#4 GND#5 GND#6 GND#7 GND#8

GND#9 GND#10 GND#11 GND#12 GND#13 GND#14 GND#15 GND#16 GND#17 GND#18 GND#19 GND#20 GND#21 GND#22 GND#23 GND#24 GND#25 GND#26 GND#27 GND#28 GND#29 GND#30 GND#31 GND#32 GND#33 GND#34 GND#35 GND#36 GND#37 GND#38 GND#39 GND#40 GND#41 GND#42 GND#43 GND#44 GND#45 GND#46 GND#47 GND#48 GND#49 GND#50 GND#51 GND#52 GND#53 GND#54 GND#55 GND#56 GND#57 GND#58 GND#59 GND#60

GND/PX_EN#61

GND#62 GND#63 GND#64 GND#65 GND#66 GND#67 GND#68 GND#69 GND#70 GND#71 GND#72 GND#73 GND#74 GND#75 GND#76 GND#77 GND#78 GND#79 GND#80 GND#81 GND#82 GND#83 GND#84 GND#85 GND#86 GND#87 GND#88 GND#89 GND#90 GND#91 GND#92 GND#93 GND#94 GND#95 GND#96 GND#97 GND#98

VSS_MECH#1 VSS_MECH#2 VSS_MECH#3

A3 A37 AA16 AA18 AA2 AA21 AA23 AA26 AA28 AA6 AB12 AB15 AB17 AB20 AB22 AB24 AB27 AC11 AC13 AC16 AC18 AC2 AC21 AC23 AC26 AC28 AC6 AD15 AD17 AD20 AD22 AD24 AD27 AD9 AE2 AE6 AF10 AF16 AF18 AF21 AG17 AG2 AG20 AG22 AG6 AG9 AH21 AJ10 AJ11 AJ2 AJ28 AJ6 AK11 AK31 AK7 AL11 AL14 AL17 AL2 AL20 AL21 AL23 AL26 AL32 AL6 AL8 AM11 AM31 AM9 AN11 AN2 AN30 AN6 AN8 AP11 AP7 AP9 AR5 B11 B13 B15 B17 B19 B21 B23 B25 B27 B29 B31 B33 B7 B9 C1 C39 E35 E5 F11 F13

A39 AW1 AW39

MECH#1 MECH#2 MECH#3

1

1 2

R1430

4.7K_0402_5%

T1403PADT1403PAD T1404PADT1404PAD T1405PADT1405PAD

PX_EN 19

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2011/04/18 2015/07/08

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

ATI_Themes XT_M2_PWR/GND

Size Document Num ber Rev

C

Date: Sheet of

LA-8121P

1

20 50Monday, January 16, 2012

0.4

5

4

3

2

1

(1.8V@504mA PCIE_VDDR)

+1.5VGS

1

+

C1495

C1496

@

2

+SPLL_PVDD

1

C1455

2

DIS@ C1455

DIS@

+SPLL_VDDC

1

C1458

2

.1U_0402_16V7K

DIS@ C1458

DIS@

2

DIS@ C1496

DIS@

10U_0603_6.3V6M

D D

220U_B2_2.5VM_R35

VDDR1 CRB Design

0.1u 11 6 1u 10 5 10u 6 5

VDD_CT CRB Design

0.1u 1 1 1u 3 3 10u 1 1

VDDR3 CRB Design 1u 3 3

C C

10u 1 1

VDDR4 CRB Design

0.1u 2 1 1u 2 1 10u 2 0

MPV18 CRB Design

0.1u 2 1 1u 2 1 10u 1 1

SPV18 CRB Design

0.1u 1 1 1u 1 1 10u 1 1

SPV10 CRB Design

0.1u 1 1

B B

1u 1 1 10u 1 1

+1.8VGS

DIS@

L1405

BLM15BD121SN1D_2P~D

+1.8VGS

A A

+1.0VGS

12

DIS@

L1406

BLM15BD121SN1D_2P~D

DIS@

L1407

BLM15BD121SN1D_2P~D

1

C1450

2

DIS@ C1450

DIS@

10U_0603_6.3V6M

12

10U_0603_6.3V6M

12

+MPLL_PVDD

1

C1451

C1452

2

1U_0402_6.3V6K

.1U_0402_16V7K

DIS@ C1451

DIS@

DIS@ C1452

DIS@

1

C1453

C1454

2

1U_0402_6.3V6K

.1U_0402_16V7K

DIS@ C1453

DIS@

DIS@ C1454

DIS@

1

C1456

C1457

2

1U_0402_6.3V6K

DIS@ C1456

DIS@

DIS@ C1457

DIS@

10U_0603_6.3V6M

5

1

C1498

C1503

C1497

C1504

2

DIS@ C1498

DIS@

DIS@ C1503

DIS@

DIS@ C1497

DIS@

DIS@ C1504

DIS@

10U_0603_6.3V6M

+3VGS

1

C1538

C1537

2

1U_0402_6.3V6K

DIS@ C1538

DIS@

DIS@ C1537

DIS@

10U_0603_6.3V6M

For DDR3/GDDR5, MVDDQ = 1.5V

1

C1499

C1500

C1507

C1506

C1505

2

1U_0402_6.3V6K

DIS@ C1499

DIS@

DIS@ C1500

DIS@

DIS@ C1507

DIS@

DIS@ C1506

DIS@

DIS@ C1505

DIS@

+1.8VGS +VDDC_CT

1

C1539

2

DIS@ C1539

DIS@

DIS@ L1409

DIS@

1 2

BLM15BD121SN1D_2P~D

1

C1540

2

1U_0402_6.3V6K

DIS@ C1540

DIS@

+1.8VGS

1 2

BLM15BD121SN1D_2P~D

L1409

(1.8V@250mA VDD_CT)

1

C1532

2

DIS@ C1532

DIS@

10U_0603_6.3V6M

(3.3V@60mA VDDR3)

L1410

DIS@ L1410

DIS@

4

1

C1509

C1501

C1508

2

.1U_0402_16V7K

DIS@ C1509

DIS@

DIS@ C1501

DIS@

DIS@ C1508

DIS@

1

C1535

C1534

C1533

2

1U_0402_6.3V6K

DIS@ C1535

DIS@

DIS@ C1534

DIS@

DIS@ C1533

DIS@

(1.8V@300mA VDDR4)

1

C1553

2

1U_0402_6.3V6K

DIS@ C1553

DIS@

VCCSENSE_VGA44

VSSSENSE_VGA44

1

C1510

2

.1U_0402_16V7K

DIS@ C1510

DIS@

1

C1536

2

.1U_0402_16V7K

DIS@ C1536

DIS@

1

C1554

2

.1U_0402_16V7K

DIS@ C1554

DIS@

1

C1502

2

DIS@ C1502

DIS@

+VDDR3

+VDDR4

+MPLL_PVDD

+SPLL_PVDD

+SPLL_VDDC

U1401E

MEM I/O

AC7

VDDR1#1

AD11

VDDR1#2

AF7

VDDR1#3

AG10

VDDR1#4

AJ7

VDDR1#5

AK8

VDDR1#6

AL9

VDDR1#7

G11

VDDR1#8

G14

VDDR1#9

G17

VDDR1#10

G20

VDDR1#11

G23

VDDR1#12

G26

VDDR1#13

G29

VDDR1#14

H10

VDDR1#15

J7

VDDR1#16

J9

VDDR1#17

K11

VDDR1#18

K13

VDDR1#19

K8

VDDR1#20

L12

VDDR1#21

L16

VDDR1#22

L21

VDDR1#23

L23

VDDR1#24

L26

VDDR1#25

L7

VDDR1#26

M11

VDDR1#27

N11

VDDR1#28

P7

VDDR1#29

R11

VDDR1#30

U11

VDDR1#31

U7

VDDR1#32

Y11

VDDR1#33

Y7

VDDR1#34

LEVEL

LEVEL TRANSLATION

TRANSLATION

AF26

VDD_CT#1

AF27

VDD_CT#2

AG26

VDD_CT#3

AG27

VDD_CT#4

I/O

AF23

VDDR3#1

AF24

VDDR3#2

AG23

VDDR3#3

AG24

VDDR3#4

AF13

VDDR4#4

AF15

VDDR4#5

AG13

VDDR4#7

AG15

VDDR4#8

AD12

VDDR4#1

AF11

VDDR4#2

AF12

VDDR4#3

AG11

VDDR4#6

M20

NC_VDDRHA

M21

NC_VSSRHA

V12

NC_VDDRHB

U12

NC_VSSRHB

PLL

H7

MPV18#1

H8

MPV18#2

AM10

SPV18

AN9

SPV10

AN10

SPVSS

VOLTAGE

VOLTAGE SENESE

SENESE

AF28

FB_VDDC

AG28

FB_VDDCI

AH29

FB_GND

2160809000A11SEYMOU_FCBGA962

DIS@

PCIE

PCIE_VDDR#1 PCIE_VDDR#2 PCIE_VDDR#3 PCIE_VDDR#4 PCIE_VDDR#5 PCIE_VDDR#6 PCIE_VDDR#7 PCIE_VDDR#8

PCIE_VDDR/PCIE_PVDD

PCIE_VDDC#1 PCIE_VDDC#2 PCIE_VDDC#3 PCIE_VDDC#4 PCIE_VDDC#5 PCIE_VDDC#6 PCIE_VDDC#7 PCIE_VDDC#8

PCIE_VDDC#9 PCIE_VDDC#10 PCIE_VDDC#11 PCIE_VDDC#12

VDDC#1

CORE

VDDC#2 VDDC#3 VDDC#4 VDDC#5 VDDC#6 VDDC#7 VDDC#8

VDDC#9 VDDC#10 VDDC#11 VDDC#12 VDDC#13 VDDC#14 VDDC#15

POWER

VDDC#16 VDDC#17 VDDC#18 VDDC#19 VDDC#20 VDDC#21 VDDC#22 VDDC#23 VDDC#24 VDDC#25 VDDC#26 VDDC#27 VDDC#28 VDDC#29 VDDC#30 VDDC#31 VDDC#32

VDDC/BIF_VDDC#33

VDDC#34 VDDC#35 VDDC#36 VDDC#37 VDDC#38 VDDC#39 VDDC#40 VDDC#41

VDDC/BIF_VDDC#42

VDDC#43 VDDC#44 VDDC#45 VDDC#46 VDDC#47 VDDC#48 VDDC#49 VDDC#50 VDDC#51 VDDC#52 VDDC#53 VDDC#54 VDDC#55 VDDC#56 VDDC#57 VDDC#58

VDDCI#1 VDDCI#2 VDDCI#3 VDDCI#4 VDDCI#5 VDDCI#6 VDDCI#7 VDDCI#8

VDDCI#9 VDDCI#10 VDDCI#11 VDDCI#12 VDDCI#13 VDDCI#14 VDDCI#15

ISOLATED

VDDCI#16

CORE I/O

VDDCI#17 VDDCI#18 VDDCI#19 VDDCI#20 VDDCI#21 VDDCI#22

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

+PCIE_VDDR

1

AA31 AA32 AA33 AA34 V28 W29 W30 Y31 AB37

G30 G31 H29 H30 J29 J30 L28 M28 N28 R28 T28 U28

AA15 AA17 AA20 AA22 AA24 AA27 AB16 AB18 AB21 AB23 AB26 AB28 AC17 AC20 AC22 AC24 AC27 AD18 AD21 AD23 AD26 AF17 AF20 AF22 AG16 AG18 AG21 AH22 AH27 AH28 M26 N24 N27 R18 R21 R23 R26 T17 T20 T22 T24 T27 U16 U18 U21 U23 U26 V17 V20 V22 V24 V27 Y16 Y18 Y21 Y23 Y26 Y28

AA13 AB13 AC12 AC15 AD13 AD16 M15 M16 M18 M23 N13 N15 N17 N20 N22 R12 R13 R16 T12 T15 V15 Y13

C1489

2

.1U_0402_16V7K

DIS@ C1489

DIS@

(1.0V@1920mA PCIE_VDDC)

+PCIE_VDDC

BIF_VDDC : 0.935V @ 1.2A

VDDCI 0.8-1.15V @ 6A

Depending on the performace requirement VDDCI and VDDC might require seperate regulators with a merge option on PCB or VDDCI and VDDC can share one common regulator

2011/04/18 2015/07/08

C1490

2

.1U_0402_16V7K

DIS@ C1490

DIS@

1

C1511

2

1U_0402_6.3V6K

DIS@ C1511

DIS@

1

C1523

2

1U_0402_6.3V6K

DIS@ C1523

DIS@

1

C1541

2

1U_0402_6.3V6K

DIS@ C1541

DIS@

+VGA_CORE

1

C1555

2

DIS@ C1555

DIS@

10U_0603_6.3V6M

1U_0402_6.3V6K

1

C1557

2

1U_0402_6.3V6K

DIS@ C1557

DIS@

1

C1491

C1492

2

1U_0402_6.3V6K

DIS@ C1491

DIS@

DIS@ C1492

DIS@

1

C1513

C1512

2

1U_0402_6.3V6K

DIS@ C1513

DIS@

DIS@ C1512

DIS@

1

C1525

C1524

2

1U_0402_6.3V6K

DIS@ C1525

DIS@

DIS@ C1524

DIS@

1

C1542

C1543

2

1U_0402_6.3V6K

DIS@ C1542

DIS@

DIS@ C1543

DIS@

1

C1556

2

DIS@ C1556

DIS@

22U_0603_6.3V6M

1

C1517

C1518

2

1U_0402_6.3V6K

DIS@ C1517

DIS@

DIS@ C1518

DIS@

1

C1558

C1559

2

1U_0402_6.3V6K

DIS@ C1558

DIS@

DIS@ C1559

DIS@

MBK1608121YZF_0603

1

C1493

C1494

2

1U_0402_6.3V6K

DIS@ C1493

DIS@

DIS@ C1494

DIS@

10U_0603_6.3V6M

1

C1515

C1514

C1516

2

@ C1515

@

1U_0402_6.3V6K

DIS@ C1514

DIS@

DIS@ C1516

DIS@

10U_0603_6.3V6M

1

C1526

C1519

C1527

2

1U_0402_6.3V6K

DIS@ C1526

DIS@

DIS@ C1519

DIS@

DIS@ C1527

DIS@

1

C1546

C1545

C1544

2

1U_0402_6.3V6K

DIS@ C1546

DIS@

DIS@ C1545

DIS@

DIS@ C1544

DIS@

+BIF_VDDC

For Thames/Whistler/Seymour while in BACO mode, BIF_VDDC is connected to +1.0V BIF_VDDC is connected to VDDC in non BACO designs In BACO designs, switch circuits is required so that when GPU is operating, BIF_VDDC is connected to VDDC

1

C1561

C1562

C1560

2

1U_0402_6.3V6K

DIS@ C1561

DIS@

DIS@ C1562

DIS@

DIS@ C1560

DIS@

Compal Secret Data

Deciphered Date

DIS@ L1408

DIS@

+1.0VGS

1

C1528

2

1U_0402_6.3V6K

DIS@ C1528

DIS@

1

C1547

2

1U_0402_6.3V6K

DIS@ C1547

DIS@

1

C1563

2

1U_0402_6.3V6K

DIS@ C1563

DIS@

2

L1408

+1.8VGS

12

PCIE_VDDR CRB Design

0.01u 1 0

0.1u 1 2 1u 3 (2@) 3 10u 1 1

+VGA_CORE

1

C1520

C1530

C1529

2

1U_0402_6.3V6K

DIS@ C1520

DIS@

DIS@ C1530

DIS@

DIS@ C1529

DIS@

1

C1548

C1549

C1550

2

1U_0402_6.3V6K

DIS@ C1548

DIS@

DIS@ C1549

DIS@

DIS@ C1550

DIS@

1

C1564

C1566

C1565

2

1U_0402_6.3V6K

DIS@ C1564

DIS@

DIS@ C1566

DIS@

DIS@ C1565

DIS@

1

C1521

2

1U_0402_6.3V6K

DIS@ C1521

DIS@

+VGA_CORE

1

C1551

2

1U_0402_6.3V6K

DIS@ C1551

DIS@

+VGA_CORE

1

C1567

2

DIS@ C1567

DIS@

10U_0603_6.3V6M

1

C1531

C1522

2

1U_0402_6.3V6K

DIS@ C1531

DIS@

DIS@ C1522

DIS@

1

C1552

2

1U_0402_6.3V6K

DIS@ C1552

DIS@

1

C1568

2

DIS@ C1568

DIS@

22U_0603_6.3V6M

PCIE_VDDC CRB Design

0.1u 3 0 1u 10 5 (1@) 10u 2 1

+BIF_VDDC CRB Design 1u 2 2 10u 1 0

VDDC CRB Design 1u 30 25 10u 9 1 22u 0 1

VDDCI CR B Design 1u 10 9 10u 3 2 22u 0 1

Compal Electronics, Inc.

Title

ATI_Themes XT_M2_Power

Size Document Num ber Rev

C

Date: Sheet of

LA-8121P

1

21 50Monday, January 16, 2012

0.4

5

The Seymour M2 only support channel B (64 bit)

U1401C

DDR2

DDR2 GDDR3/GDDR5

D D

C C

+1.5VGS

1 2

R1466 240_0402_1%Tha@R1466 240_0402_1%Tha@

1 2

R1467 240_0402_1%Sey@R1467 240_0402_1%Sey@

1 2

R1468 240_0402_1%Tha@R1468 240_0402_1%Tha@

1 2

R1469 240_0402_1%Sey@R1469 240_0402_1%Sey@

1 2

R1470 240_0402_1%Tha@R1470 240_0402_1%Tha@

1 2

R1471 240_0402_1%Tha@R1471 240_0402_1%Tha@

B B

R1466

R1467

R1468

R1469

R1470

R1471 POP

+1.5VGS +1.5VGS

R1473

40.2_0402_1%

DIS@

A A

R1477

100_0402_1%

DIS@

MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63

+VDD_MEM15_REFDA +VDD_MEM15_REFSA

Themes XT Seymour XTX

POP

12

+VDD_MEM15_REFDA

1

12

DIS@

C1571

C1571 1U_0402_6.3V6K

1U_0402_6.3V6K

2

C37 C35 A35 E34 G32 D33 F32 E32 D31 F30 C30 A30 F28 C28 A28 E28 D27 F26 C26 A26 F24 C24 A24 E24 C22 A22 F22 D21 A20 F20 D19 E18 C18 A18 F18 D17 A16 F16 D15 E14 F14 D13 F12 A12 D11 F10 A10 C10 G13 H13 J13 H11 G10

G8

K9

K10

G9

A8

C8

E8 A6

C6

E6 A5

L18 L20

L27 N12

AG12

M12 M27

AH12

@

GDDR3/GDDR5 DDR3

DDR3

NC_DQA0_0/DQA_0 NC_DQA0_1/DQA_1 NC_DQA0_2/DQA_2 NC_DQA0_3/DQA_3 NC_DQA0_4/DQA_4 NC_DQA0_5/DQA_5 NC_DQA0_6/DQA_6 NC_DQA0_7/DQA_7 NC_DQA0_8/DQA_8 NC_DQA0_9/DQA_9 NC_DQA0_10/DQA_10 NC_DQA0_11/DQA_11 NC_DQA0_12/DQA_12 NC_DQA0_13/DQA_13 NC_DQA0_14/DQA_14 NC_DQA0_15/DQA_15 NC_DQA0_16/DQA_16 NC_DQA0_17/DQA_17 NC_DQA0_18/DQA_18 NC_DQA0_19/DQA_19 NC_DQA0_20/DQA_20 NC_DQA0_21/DQA_21 NC_DQA0_22/DQA_22 NC_DQA0_23/DQA_23 NC_DQA0_24/DQA_24 NC_DQA0_25/DQA_25 NC_DQA0_26/DQA_26 NC_DQA0_27/DQA_27 NC_DQA0_28/DQA_28 NC_DQA0_29/DQA_29 NC_DQA0_30/DQA_30 NC_DQA0_31/DQA_31 NC_DQA1_0/DQA_32 NC_DQA1_1/DQA_33 NC_DQA1_2/DQA_34 NC_DQA1_3/DQA_35 NC_DQA1_4/DQA_36 NC_DQA1_5/DQA_37 NC_DQA1_6/DQA_38 NC_DQA1_7/DQA_39 NC_DQA1_8/DQA_40 NC_DQA1_9/DQA_41 NC_DQA1_10/DQA_42 NC_DQA1_11/DQA_43 NC_DQA1_12/DQA_44 NC_DQA1_13/DQA_45 NC_DQA1_14/DQA_46 NC_DQA1_15/DQA_47 NC_DQA1_16/DQA_48 NC_DQA1_17/DQA_49 NC_DQA1_18/DQA_50 NC_DQA1_19/DQA_51 NC_DQA1_20/DQA_52 NC_DQA1_21/DQA_53 NC_DQA1_22/DQA_54 NC_DQA1_23/DQA_55 NC_DQA1_24/DQA_56 NC_DQA1_25/DQA_57 NC_DQA1_26/DQA_58 NC_DQA1_27/DQA_59 NC_DQA1_28/DQA_60 NC_DQA1_29/DQA_61 NC_DQA1_30/DQA_62 NC_DQA1_31/DQA_63

NC_MVREFDA NC_MVREFSA

NC_MEM_CALRN0 MEM_CALRN1 NC_MEM_CALRN2

MEM_CALRP1 NC_MEM_CALRP0 NC_MEM_CALRP2

2160809000A11SEYMOU_FCBGA962

DIS@

12

R1474

40.2_0402_1%

DIS@

12

DIS@

R1478

100_0402_1%

DDR2

DDR2 GDDR5/GDDR3

GDDR5/GDDR3 DDR3

DDR3

NC_MAA0_0/MAA_0 NC_MAA0_1/MAA_1 NC_MAA0_2/MAA_2 NC_MAA0_3/MAA_3 NC_MAA0_4/MAA_4 NC_MAA0_5/MAA_5 NC_MAA0_6/MAA_6 NC_MAA0_7/MAA_7 NC_MAA1_0/MAA_8

NC_MAA1_1/MAA_9 NC_MAA1_2/MAA_10 NC_MAA1_3/MAA_11 NC_MAA1_4/MAA_12

NC_MAA1_5/MAA_13_BA2 NC_MAA1_6/MAA_14_BA0

NC_MAA1_7/MAA_A15_BA1

NC_WCKA0_0/DQMA_0

NC_WCKA0B_0/DQMA_1

NC_WCKA0_1/DQMA_2

NC_WCKA0B_1/DQMA_3

NC_WCKA1_0/DQMA_4

NC_WCKA1B_0/DQMA_5

NC_WCKA1_1/DQMA_6

NC_WCKA1B_1/DQMA_7

GDDR5/DDR2/GDDR3

MEMORY INTERFACE A

NC_EDCA0_0/QSA_0/RDQSA_0 NC_EDCA0_1/QSA_1/RDQSA_1 NC_EDCA0_2/QSA_2/RDQSA_2 NC_EDCA0_3/QSA_3/RDQSA_3 NC_EDCA1_0/QSA_4/RDQSA_4 NC_EDCA1_1/QSA_5/RDQSA_5 NC_EDCA1_2/QSA_6/RDQSA_6 NC_EDCA1_3/QSA_7/RDQSA_7

NC_DDBIA0_0/QSA_0B/WDQSA_0 NC_DDBIA0_1/QSA_1B/WDQSA_1 NC_DDBIA0_2/QSA_2B/WDQSA_2 NC_DDBIA0_3/QSA_3B/WDQSA_3 NC_DDBIA1_0/QSA_4B/WDQSA_4 NC_DDBIA1_1/QSA_5B/WDQSA_5 NC_DDBIA1_2/QSA_6B/WDQSA_6 NC_DDBIA1_3/QSA_7B/WDQSA_7

NC_ADBIA0/ODTA0

NC_ADBIA1/ODTA1

NC_CLKA0

NC_CLKA0B

NC_CLKA1

NC_CLKA1B

NC_RASA0B NC_RASA1B

NC_CASA0B NC_CASA1B

NC_CSA0B_0 NC_CSA0B_1

NC_CSA1B_0 NC_CSA1B_1

NC_CKEA0 NC_CKEA1

NC_WEA0B NC_WEA1B

NC_MAA0_8 NC_MAA1_8

GDDR5

@

POP

@

POP

@

+VDD_MEM15_REFSA

1

DIS@

C1572

C1572 1U_0402_6.3V6K

1U_0402_6.3V6K

2

4

12

R1462

40.2_0402_1%

DIS@

+VDD_MEM15_REFDB

1

12

DIS@

C1569

MAA[12..0]

A_BA[2..0]

4.7K_0402_5%

1 2

R1475

DIS@

MDA[0..63]

+1.5VGS

R1472

@

C1569 1U_0402_6.3V6K

1U_0402_6.3V6K

2

12

MAA[12..0] 23

A_BA[2..0] 23

SDV2, NO.39

1 2

1

DIS@

C1573

C1573 120P_0402_50V8

120P_0402_50V8

2

R1464

100_0402_1%

G24

MAA0

J23

MAA1

H24

MAA2

J24

MAA3

H26

MAA4

J26

MAA5

H21

MAA6

G21

MAA7

H19

MAA8

H20

MAA9

L13

MAA10

G16

MAA11

J16

MAA12

H16

A_BA2

J17

A_BA0

H17

A_BA1

A32

DQMA#0

C32

DQMA#1

D23

DQMA#2

E22

DQMA#3

C14

DQMA#4

A14

DQMA#5

E10

DQMA#6

D9

DQMA#7

C34

QSA0

D29

QSA1

D25

QSA2

E20

QSA3

E16

QSA4

E12

QSA5

J10

QSA6

D7

QSA7

A34

QSA#0

E30

QSA#1

E26

QSA#2

C20

QSA#3

C16

QSA#4

C12

QSA#5

J11

QSA#6

F8

QSA#7

J21

ODTA0

G19

ODTA1

H27

CLKA0

G27

CLKA0#

J14

CLKA1

H14

CLKA1#

K23

RASA0#

K19

RASA1#

K20

CASA0#

K17

CASA1#

K24

CSA0#_0

K27

M13

CSA1#_0

K16

K21

CKEA0

J20

CKEA1

K26

WEA0#

L15

WEA1#

H23

MAA13

J19

MAA14

MDA[0..63]23

DQMA#[7..0] 23

QSA[7..0] 23

QSA#[7..0] 23

ODTA0 23 ODTA1 23

CLKA0 23 CLKA0# 23

CLKA1 23 CLKA1# 23

RASA0# 23 RASA1# 23

CASA0# 23 CASA1# 23

CSA0#_0 23

CSA1#_0 23

CKEA0 23 CKEA1 23

WEA0# 23 WEA1# 23

MAA13 23 MAA14 23

Place all these componets very close to GPU (within 25mm) and keep all components close to each other ** This basic topology should be used for DRAM_RAT for DDR3/GDDR5

These Capacitors and Resistor values arre an example only The series R and || cap values will depend on the DRAM loads and will have to be calculated for differrent Memory, DRAM loads and board to pass Reset Signal Spec

DRAM_RST#23,24

51.1_0402_1%

DIS@

R1476

10_0402_5%

3

40.2_0402_1%

100_0402_1%

DRAM_RST#_R

DIS@

R1479

4.99K_0402_1%

1 2

DIS@

R1463

DIS@

R1465

+1.5VGS+1.5VGS

12

+VDD_MEM15_REFSB

1

DIS@

C1570

C1570 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+VDD_MEM15_REFDB +VDD_MEM15_REFSB

1 2

R1434 1K_0402_5%DIS@R1434 1K_0402_5%DI S@

T1406T1406 T1407T1407

GPUTESTA GPUTESTB

8/25

MDB0 MDB1 MDB2 MDB3 MDB4 MDB5 MDB6 MDB7 MDB8 MDB9 MDB10 MDB11 MDB12 MDB13 MDB14 MDB15 MDB16 MDB17 MDB18 MDB19 MDB20 MDB21 MDB22 MDB23 MDB24 MDB25 MDB26 MDB27 MDB28 MDB29 MDB30 MDB31 MDB32 MDB33 MDB34 MDB35 MDB36 MDB37 MDB38 MDB39 MDB40 MDB41 MDB42 MDB43 MDB44 MDB45 MDB46 MDB47 MDB48 MDB49 MDB50 MDB51 MDB52 MDB53 MDB54 MDB55 MDB56 MDB57 MDB58 MDB59 MDB60 MDB61 MDB62 MDB63

2

U1401D

DDR2

DDR2 GDDR3/GDDR5

GDDR3/GDDR5 DDR3

DDR3

C5

DQB0_0/DQB_0

C3

DQB0_1/DQB_1

E3

DQB0_2/DQB_2

E1

DQB0_3/DQB_3

F1

DQB0_4/DQB_4

F3

DQB0_5/DQB_5

F5

DQB0_6/DQB_6

G4

DQB0_7/DQB_7

H5

DQB0_8/DQB_8

H6

DQB0_9/DQB_9

J4

DQB0_10/DQB_10

K6

DQB0_11/DQB_11

K5

DQB0_12/DQB_12

L4

DQB0_13/DQB_13

M6

DQB0_14/DQB_14

M1

DQB0_15/DQB_15

M3

DQB0_16/DQB_16

M5

DQB0_17/DQB_17

N4

DQB0_18/DQB_18

P6

DQB0_19/DQB_19

P5

DQB0_20/DQB_20

R4

DQB0_21/DQB_21

T6

DQB0_22/DQB_22

T1

DQB0_23/DQB_23

U4

DQB0_24/DQB_24

V6

DQB0_25/DQB_25

V1

DQB0_26/DQB_26

V3

DQB0_27/DQB_27

Y6

DQB0_28/DQB_28

Y1

DQB0_29/DQB_29

Y3

DQB0_30/DQB_30

Y5

DQB0_31/DQB_31

AA4

DQB1_0/DQB_32

AB6

DQB1_1/DQB_33

AB1

DQB1_2/DQB_34

AB3

DQB1_3/DQB_35

AD6

DQB1_4/DQB_36

AD1

DQB1_5/DQB_37

AD3

DQB1_6/DQB_38

AD5

DQB1_7/DQB_39

AF1

DQB1_8/DQB_40

AF3

DQB1_9/DQB_41

AF6

DQB1_10/DQB_42

AG4

DQB1_11/DQB_43

AH5

DQB1_12/DQB_44

AH6

DQB1_13/DQB_45

AJ4

DQB1_14/DQB_46

AK3

DQB1_15/DQB_47

AF8

DQB1_16/DQB_48

AF9

DQB1_17/DQB_49

AG8

DQB1_18/DQB_50

AG7

DQB1_19/DQB_51

AK9

DQB1_20/DQB_52

AL7

DQB1_21/DQB_53

AM8

DQB1_22/DQB_54

AM7

DQB1_23/DQB_55

AK1

DQB1_24/DQB_56

AL4

DQB1_25/DQB_57

AM6

DQB1_26/DQB_58

AM1

DQB1_27/DQB_59

AN4

DQB1_28/DQB_60

AP3

DQB1_29/DQB_61

AP1

DQB1_30/DQB_62

AP5

DQB1_31/DQB_63

Y12

MVREFDB

AA12

MVREFSB

AD28

TESTEN

AK10

CLKTESTA

AL10

CLKTESTB

2160809000A11SEYMOU_FCBGA962

DIS@

DDR2

DDR2 GDDR5/GDDR3

GDDR5/GDDR3 DDR3

DDR3

MAB0_0/MAB_0 MAB0_1/MAB_1 MAB0_2/MAB_2 MAB0_3/MAB_3 MAB0_4/MAB_4 MAB0_5/MAB_5 MAB0_6/MAB_6 MAB0_7/MAB_7 MAB1_0/MAB_8

MAB1_1/MAB_9 MAB1_2/MAB_10 MAB1_3/MAB_11 MAB1_4/MAB_12

MAB1_5/BA2 MAB1_6/BA0 MAB1_7/BA1

WCKB0_0/DQMB_0

WCKB0B_0/DQMB_1

WCKB0_1/DQMB_2

WCKB0B_1/DQMB_3

WCKB1_0/DQMB_4

WCKB1B_0/DQMB_5

WCKB1_1/DQMB_6

WCKB1B_1/DQMB_7

GDDR5/DDR2/GDDR3

EDCB0_0/QSB_0/RDQSB_0

MEMORY INTERFACE B

EDCB0_1/QSB_1/RDQSB_1 EDCB0_2/QSB_2/RDQSB_2 EDCB0_3/QSB_3/RDQSB_3 EDCB1_0/QSB_4/RDQSB_4 EDCB1_1/QSB_5/RDQSB_5 EDCB1_2/QSB_6/RDQSB_6 EDCB1_3/QSB_7/RDQSB_7

DDBIB0_0/QSB_0B/WDQSB_0 DDBIB0_1/QSB_1B/WDQSB_1 DDBIB0_2/QSB_2B/WDQSB_2 DDBIB0_3/QSB_3B/WDQSB_3 DDBIB1_0/QSB_4B/WDQSB_4 DDBIB1_1/QSB_5B/WDQSB_5 DDBIB1_2/QSB_6B/WDQSB_6 DDBIB1_3/QSB_7B/WDQSB_7

ADBIB0/ODTB0 ADBIB1/ODTB1

CLKB0

CLKB0B

CLKB1

CLKB1B

RASB0B RASB1B

CASB0B CASB1B

CSB0B_0 CSB0B_1

CSB1B_0 CSB1B_1

CKEB0 CKEB1

WEB0B WEB1B

MAB0_8 MAB1_8

DRAM_RST

GDDR5

P8 T9 P9 N7 N8 N9 U9 U8 Y9 W9 AC8 AC9 AA7 AA8 Y8 AA9

H3 H1 T3 T5 AE4 AF5 AK6 AK5

F6 K3 P3 V5 AB5 AH1 AJ9 AM5

G7 K1 P1 W4 AC4 AH3 AJ8 AM3

T7 W7

L9 L8

AD8 AD7

T10 Y10

W10 AA10

P10 L10

AD10 AC10

U10 AA11

N10 AB11

T8 W8

AH11

MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 B_BA2 B_BA0 B_BA1

DQMB#0 DQMB#1 DQMB#2 DQMB#3 DQMB#4 DQMB#5 DQMB#6 DQMB#7

QSB0 QSB1 QSB2 QSB3 QSB4 QSB5 QSB6 QSB7

QSB#0 QSB#1 QSB#2 QSB#3 QSB#4 QSB#5 QSB#6 QSB#7

ODTB0 ODTB1

CLKB0 CLKB0#

CLKB1 CLKB1#

RASB0# RASB1#

CASB0# CASB1#

CSB0#_0

CSB1#_0

CKEB0 CKEB1

WEB0# WEB1#

MAB13 MAB14

DRAM_RST#_R

MDB[0..63]24

DQMB#[7..0] 24

QSB[7..0] 24

QSB#[7..0] 24

ODTB0 24 ODTB1 24

CLKB0 24 CLKB0# 24

CLKB1 24 CLKB1# 24

RASB0# 24 RASB1# 24

CASB0# 24 CASB1# 24

CSB0#_0 24

CSB1#_0 24

CKEB0 24 CKEB1 24

WEB0# 24 WEB1# 24

MAB13 24 MAB14 24

1

MDB[0..63]

MAB[12..0]

B_BA[2..0]

MAB[12..0] 24

B_BA[2..0] 24

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2011/04/18 2015/07/08

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

ATI_Themes XT_M2_MEM IF

Size Document Number Rev

Custom

Date: Sheet of

LA-8121P

1

22 50Monday, January 16, 2012

0.4

5

The Seymour M2 only support channel B (64 bit), this page unmount all parts

VREFC_A1 VREFD_Q1

D D

MDA[0..63]22

MAA[14..0]22

DQMA#[7..0]22

QSA[7..0]22

QSA#[7..0]22

C C

CLKA0

R1484 40.2_0402_1%

CLKA0#

R1485 40.2_0402_1%

B B

CLKA1

R1494 40.2_0402_1%

CLKA1#

R1495 40.2_0402_1%

1 2

Tha@

1 2

Tha@

1 2

Tha@

1 2

Tha@

MDA[0..63]

MAA[14..0]

DQMA#[7..0]

QSA[7..0]

QSA#[7..0]

12

C1574

0.01U_0402_16V7K

Tha@

12

C1575

0.01U_0402_16V7K

Tha@

A_BA022 A_BA122 A_BA222

CLKA022 CLKA0#22 CKEA022

ODTA022 CSA0#_022 RASA0#22 CASA0#22 WEA0#22

DRAM_RST#22,24

243_0402_1%

Tha@

R1480

QSA2 QSA0

DQMA#2 DQMA#0

QSA#2 QSA#0

U1405

M8

VREFCA

H1

VREFDQ

N3

MAA0

A0

P7

MAA1

A1

P3

MAA2

A2

N2

MAA3

A3

P8

MAA4

A4

P2

MAA5

A5

R8

MAA6

A6

R2

MAA7

A7

T8

MAA8

A8

R3

MAA9

A9

L7

MAA10

A10/AP

R7

MAA11

A11

N7

MAA12

A12

T3

MAA13

A13

T7

MAA14

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

12

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

X76@

+1.5VGS +1.5VGS

12

Tha@

R1486

4.99K_0402_1%

12

Tha@

12

R1496

C1576

4.99K_0402_1%

Tha@

C1576

4

U1406

E3

MDA23

DQL0

F7

MDA19

DQL1

F2

MDA22

DQL2

F8

MDA18

DQL3

H3

MDA21

DQL4

H8

MDA17

DQL5

G2

MDA20

DQL6

H7

MDA16

DQL7

D7

MDA0

DQU0

C3

MDA5

DQU1

C8

MDA1

DQU2

C2

MDA6

DQU3

A7

MDA3

DQU4

A2

MDA4

DQU5

B8

MDA2

DQU6

A3

MDA7

DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VREFD_Q1 VREFD_Q2

.1U_0402_16V7K

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

+1.5VGS

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VGS

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

+1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS

12

Tha@

R1487

4.99K_0402_1%

12

Tha@

R1497

4.99K_0402_1%

VREFC_A2 VREFD_Q2

12

Tha@

R1481

243_0402_1%

VREFC_A1 VREFC_A2

.1U_0402_16V7K

12

C1577

Tha@

U1406

M8 H1

N3

MAA0 MAA0 MAA0

P7

MAA1 MAA1 MAA1

P3

MAA2 MAA2 MAA2

N2

MAA3 MAA3 MAA3

P8

MAA4 MAA4 MAA4

P2

MAA5 MAA5 MAA5

R8

MAA6 MAA6 MAA6

R2

MAA7 MAA7 MAA7

T8

MAA8 MAA8 MAA8

R3

MAA9 MAA9 MAA9

L7

MAA10 MAA10 MAA10

R7

MAA11 MAA11 MAA11

N7

MAA12 MAA12 MAA12

T3

MAA13 MAA13 MAA13

T7

MAA14 MAA14 MAA14

M7

M2

A_BA0 A_BA0 A_BA0

N8

A_BA1 A_BA1 A_BA1

M3

A_BA2 A_BA2 A_BA2

J7

CLKA0

K7

CLKA0#

K9

CKEA0 CKEA1

K1

ODTA0 ODTA1

L2

CSA0#_0 CSA1#_0

J3

RASA0# RASA1#

K3

CASA0# CASA1#

L3

WEA0# WEA1#

F3

QSA3 QSA4

C7

QSA1

E7

DQMA#3 DQMA#4

D3

DQMA#1

G3

QSA#3 QSA#4

B7

QSA#1

T2

DRAM_RST# DRAM_RST# DRAM_RST#

L8

J1 L1 J9 L9

K4W1G1646E-HC12_FBGA96

X76@

R1488

4.99K_0402_1%

Tha@

R1498

4.99K_0402_1%

Tha@

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3

BA0 BA1 BA2

CK CK CKE/CKE0

ODT/ODT0 CS/CS0 RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET

ZQ/ZQ0

NC/ODT1 NC/CS1 NC/CE1 NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

12

Tha@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

.1U_0402_16V7K

12

C1578

3

E3

MDA24

F7

MDA30

F2

MDA27

F8

MDA29

H3

MDA25

H8

MDA28

G2

MDA26

H7

MDA31 MDA32

D7

MDA15

C3

MDA10

C8

MDA14

C2

MDA11

A7

MDA13

A2

MDA9

B8

MDA12

A3

MDA8

+1.5VGS

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

4.99K_0402_1%

Tha@

R1489

Tha@

R1499

+1.5VGS

12

243_0402_1%

12

C1579

Tha@

R1482

.1U_0402_16V7K

CLKA122 CLKA1#22 CKEA122

ODTA122 CSA1#_022 RASA1#22 CASA1#22 WEA1#22

12

VREFC_A3 VREFD_Q3

QSA5

DQMA#5

QSA#5

M8 H1

N3

N2

R8 R2

R3

R7 N7

M7

M2 N8 M3

C7

D3

G3

R1490

4.99K_0402_1%

Tha@

R1500

4.99K_0402_1%

Tha@

U1407

VREFCA VREFDQ

A0

P7

A1

P3

A2 A3

P8

A4

P2

A5 A6 A7

T8

A8 A9

L7

A10/AP A11 A12

T3

A13

T7

A14 A15/BA3

BA0 BA1 BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL DQSU

E7

DML DMU

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

X76@

12

C1580

Tha@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VREFC_A3

.1U_0402_16V7K

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

R1491

4.99K_0402_1%

Tha@

R1501

4.99K_0402_1%

Tha@

MDA38 MDA36 MDA39 MDA34 MDA35 MDA33 MDA37

MDA42 MDA44 MDA40 MDA46 MDA43 MDA45 MDA41 MDA47

12

+1.5VGS

243_0402_1%

Tha@

C1581

2

12

Tha@

R1483

VREFD_Q3

.1U_0402_16V7K

VREFC_A4 VREFD_Q4

CLKA1 CLKA1#

QSA6 QSA7

DQMA#6 DQMA#7

QSA#6 QSA#7

12

M8 H1

N3

P7 P3

N2

P8

P2 R8 R2

T8 R3

L7 R7 N7

T3

T7 M7

M2 N8 M3

J7

K7

K9

K1

L2

J3

K3

L3

F3 C7

E7 D3

G3

B7

T2

L8

J1

L1

J9

L9

R1492

4.99K_0402_1%

Tha@

R1502

4.99K_0402_1%

Tha@

U1408

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

12

Tha@

C1582

12

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VREFC_A4

.1U_0402_16V7K

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3

BA0 BA1 BA2

CK CK CKE/CKE0

ODT/ODT0 CS/CS0 RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET

ZQ/ZQ0

NC/ODT1 NC/CS1 NC/CE1 NCZQ1

K4W1G1646E-HC12_FBGA96

X76@

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

R1493

4.99K_0402_1%

Tha@

R1503

4.99K_0402_1%

Tha@

MDA55 MDA51 MDA48 MDA52 MDA50 MDA53 MDA49 MDA54

MDA60 MDA57 MDA63 MDA56 MDA61 MDA59 MDA62 MDA58

+1.5VGS

12

Tha@

C1583

VREFD_Q4

12

1

ZZZ1

H2G

H2G@

X7635939L01

ZZZ2

S2G

S2G@

X7635939L02

.1U_0402_16V7K

+1.5VGS

1

C1584

2

.1U_0402_16V7K

Tha@ C1584

A A

Tha@

1

C1585

C1586

2

.1U_0402_16V7K

Tha@ C1585

Tha@

Tha@ C1586

Tha@

5

1

C1587

C1588

2

.1U_0402_16V7K

Tha@ C1587

Tha@

Tha@ C1588

Tha@

1

C1589

2

.1U_0402_16V7K

Tha@ C1589

Tha@

1

C1590

C1591

2

.1U_0402_16V7K

Tha@ C1590

Tha@

Tha@ C1591

Tha@

1

C1593

C1592

2

.1U_0402_16V7K

Tha@ C1593

Tha@

Tha@ C1592

Tha@

1

C1594

2

.1U_0402_16V7K

Tha@ C1594

Tha@

1

C1595

C1596

2

.1U_0402_16V7K

Tha@ C1595

Tha@

Tha@ C1596

Tha@

4

+1.5VGS

C1597

Tha@ C1597

Tha@

10U_0603_6.3V6M

+1.5VGS +1.5VGS

1

C1598

2

Tha@ C1598

Tha@

10U_0603_6.3V6M

1

C1599

C1600

2

Tha@ C1599

Tha@

Tha@ C1600

Tha@

10U_0603_6.3V6M

3

1

C1601

2

1U_0402_6.3V6K

Tha@ C1601

Tha@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

1

C1603

C1602

2

1U_0402_6.3V6K

Tha@ C1603

Tha@

Tha@ C1602

Tha@

1

C1605

C1604

2

1U_0402_6.3V6K

Tha@ C1605

Tha@

Tha@ C1604

Tha@

2011/04/18 2015/07/08

1

C1607

C1606

2

1U_0402_6.3V6K

Tha@ C1607

Tha@

Tha@ C1606

Tha@

Compal Secret Data

1

C1608

2

1U_0402_6.3V6K

Tha@ C1608

Tha@

Deciphered Date

1

C1610

C1609

2

1U_0402_6.3V6K

Tha@ C1610

Tha@

Tha@ C1609

Tha@

2

1

C1611

2

1U_0402_6.3V6K

Tha@ C1611

Tha@

1

C1612

2

1U_0402_6.3V6K

Tha@ C1612

Tha@

1

C1613

C1614

2

1U_0402_6.3V6K

Tha@ C1613

Tha@

Tha@ C1614

Tha@

Title

Size Document Num ber Rev

C

Date: Sheet of

1

C1615

2

1U_0402_6.3V6K

Tha@ C1615

Tha@

ATI_Themes XT_M2_VRAM_A

1

C1616

C1617

2

1U_0402_6.3V6K

Tha@ C1616

Tha@

Tha@ C1617

Tha@

Compal Electronics, Inc.

1

C1619

C1618

2

1U_0402_6.3V6K

Tha@ C1619

Tha@

Tha@ C1618

Tha@

LA-8121P

1

C1620

2

1U_0402_6.3V6K

Tha@ C1620

Tha@

23 50Monday, January 16, 2012

0.4

5

4

3

2

1

The Seymour M2 only support channel B (64 bit)

U1410

U1409

VREFC_A1_B VREFD_Q1_B

D D

MDB[0..63]22

MAB[14..0]22

DQMB#[7..0]22

QSB[7..0]22

QSB#[7..0]22

C C

CLKB0

R1504 56_0402_1%

CLKB0#

R1505 56_0402_1%

1 2

CLKB1

R1510 56_0402_1%

1 2

CLKB1#

R1511 56_0402_1%

1 2

Sey@

1 2

Sey@

MDB[0..63]

MAB[14..0]

DQMB#[7..0]

QSB[7..0]

QSB#[7..0]

12

C1621

0.01U_0402_16V7K

DIS@

C1622

0.01U_0402_16V7K

DIS@

R1504

40.2_0402_1%

Tha@

R1505

40.2_0402_1%

Tha@

R1510

40.2_0402_1%

Tha@

R1511

B_BA022 B_BA122 B_BA222

CLKB022 CLKB0#22 CKEB022

ODTB022 CSB0#_022 RASB0#22 CASB0#22 WEB0#22

QSB2 QSB3 QSB4 QSB0 QSB1

DQMB#2 DQMB#3 DQMB#4 DQMB#0 DQMB#1

QSB#2 QSB#3 QSB#4 QSB#0 QSB#1

DRAM_RST#22,23

12

DIS@

R1506

243_0402_1%

VREFCA

H1

VREFDQ

N3

MAB0 MAB0 MAB0 MAB0

A0

P7

MAB1 MAB1 MAB1 MAB1

A1

P3

MAB2 MAB2 MAB2 MAB2

A2

N2

MAB3 MAB3 MAB3 MAB3

A3

P8

MAB4 MAB4 MAB4 MAB4

A4

P2

MAB5 MAB5 MAB5 MAB5

A5

R8

MAB6 MAB6 MAB6 MAB6

A6

R2

MAB7 MAB7 MAB7 MAB7

A7

T8

MAB8 MAB8 MAB8 MAB8

A8

R3

MAB9 MAB9 MAB9 MAB9

A9

L7

MAB10 MAB10 MAB10 MAB10

A10/AP

R7

MAB11 MAB11 MAB11 MAB11

A11

N7

MAB12 MAB12 MAB12 MAB12

A12

T3

MAB13 MAB13 MAB13 MAB13

A13

T7

MAB14 MAB14 MAB14 MAB14

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

X76@

U1409

M8

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

E3

MDB19

F7

MDB20

F2

MDB22

F8

MDB16

H3

MDB23

H8

MDB17

G2

MDB21

H7

MDB18

D7

MDB0

C3

MDB4

C8

MDB1

C2

MDB6

A7

MDB3

A2

MDB7

B8

MDB2

A3

MDB5

+1.5VGS

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

+1.5VGS

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

VREFC_A2_B VREFD_Q2_B

B_BA0 B_BA0 B_BA0 B_BA1 B_BA1 B_BA1 B_BA2 B_BA2 B_BA2

CLKB0 CLKB0# CKEB0 CKEB1

ODTB0 ODTB1 CSB0#_0 CSB1#_0 RASB0# RASB1# CASB0# CASB1# WEB0# WEB1#

DRAM_RST# DRAM_RST# DRAM_RST#

12

DIS@

R1507

243_0402_1%

U1410

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

X76@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

E3

MDB26

F7

MDB30

F2

MDB24

F8

MDB29

H3

MDB27

H8

MDB28

G2

MDB25

H7

MDB31

D7

MDB15

C3

MDB10

C8

MDB14

C2

MDB11

A7

MDB12

A2

MDB9

B8

MDB13

A3

MDB8

+1.5VGS

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

+1.5VGS

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

243_0402_1%

DIS@

R1508

CLKB122 CLKB1#22 CKEB122

ODTB122 CSB1#_022 RASB1#22 CASB1#22 WEB1#22

VREFC_A3_B VREFD_Q3_B

QSB5

DQMB#5

QSB#5

12

U1411

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

X76@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

U1412

E3

MDB33

F7

MDB37

F2

MDB35

F8

MDB39

H3

MDB32

H8

MDB36

G2

MDB34

H7

MDB38

D7

MDB44

C3

MDB41

C8

MDB47

C2

MDB43

A7

MDB45

A2

MDB40

B8

MDB46

A3

MDB42

+1.5VGS

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

+1.5VGS

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

243_0402_1%

DIS@

R1509

VREFC_A4_B VREFD_Q4_B

CLKB1 CLKB1#

QSB6 QSB7

DQMB#6 DQMB#7

QSB#6 QSB#7

12

U1412

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

X76@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

E3

MDB55

F7

MDB50

F2

MDB54

F8

MDB51

H3

MDB53

H8

MDB49

G2

MDB52

H7

MDB48

D7

MDB56

C3

MDB59

C8

MDB63

C2

MDB62

A7

MDB57

A2

MDB61

B8

MDB58

A3

MDB60

+1.5VGS

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

+1.5VGS

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

40.2_0402_1%

Tha@

B B

+1.5VGS

1

C1631

C1632

2

A A

2

.1U_0402_16V7K

DIS@ C1631

DIS@

DIS@ C1632

DIS@

5

Tha@

1

C1635

C1634

C1633

2

.1U_0402_16V7K

DIS@ C1633

DIS@

DIS@ C1635

DIS@

DIS@ C1634

DIS@

1

C1637

C1636

2

.1U_0402_16V7K

DIS@ C1637

DIS@

DIS@ C1636

DIS@

+1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS

4.99K_0402_1%

1

C1638

2

.1U_0402_16V7K

DIS@ C1638

DIS@

R1512

DIS@

R1520

DIS@

.1U_0402_16V7K

12

VREFD_Q1_B VREFD_Q2_B

12

1

C1623

2

.1U_0402_16V7K

DIS@ C1623

DIS@

1

C1639

2

DIS@ C1639

DIS@

1

C1640

2

.1U_0402_16V7K

DIS@ C1640

DIS@

1

C1641

C1642

2

.1U_0402_16V7K

DIS@ C1641

DIS@

DIS@ C1642

DIS@

4

R1513

4.99K_0402_1%

DIS@

R1521

4.99K_0402_1%

DIS@

1

C1643

2

.1U_0402_16V7K

DIS@ C1643

DIS@

12

C1624

.1U_0402_16V7K

DIS@ C1624

DIS@

4.99K_0402_1%

VREFC_A1_B VREFC_A2_B

1

4.99K_0402_1%

2

+1.5VGS

1

C1644

2

DIS@ C1644

DIS@

10U_0603_6.3V6M

R1514

DIS@

R1522

DIS@

12

1

C1625

2

.1U_0402_16V7K

DIS@ C1625

DIS@

1

C1645

DIS@ C1645

DIS@

10U_0603_6.3V6M

C1647

C1646

2

DIS@ C1647

DIS@

DIS@ C1646

DIS@

10U_0603_6.3V6M

4.99K_0402_1%

1

2

12

R1515

DIS@

12

1

R1523

DIS@

3

C1626

2

.1U_0402_16V7K

DIS@ C1626

DIS@

+1.5VGS +1.5VGS

1

C1648

C1649

2

1U_0402_6.3V6K

DIS@ C1648

DIS@

DIS@ C1649

DIS@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

12

R1516

4.99K_0402_1%

DIS@

VREFC_A3_B

12

1

4.99K_0402_1%

1

C1650

2

1U_0402_6.3V6K

DIS@ C1650

DIS@

R1524

DIS@

C1627

2

.1U_0402_16V7K

DIS@ C1627

DIS@

1

C1651

2

1U_0402_6.3V6K

DIS@ C1651

DIS@

2011/04/18 2015/07/08

1

C1652

2

1U_0402_6.3V6K

DIS@ C1652

DIS@

1

C1653

2

1U_0402_6.3V6K

DIS@ C1653

DIS@

Compal Secret Data

R1517

4.99K_0402_1%

DIS@

R1526

4.99K_0402_1%

DIS@

1

C1654

2

1U_0402_6.3V6K

DIS@ C1654

DIS@

Deciphered Date

12

1

C1655

C1656

2

1U_0402_6.3V6K

DIS@ C1655

DIS@

DIS@ C1656

DIS@

2

.1U_0402_16V7K

1

2

VREFD_Q3_B

1

C1628

2

DIS@ C1628

DIS@

C1657

1U_0402_6.3V6K

DIS@ C1657

DIS@

1

2

R1518

4.99K_0402_1%

DIS@

R1525

4.99K_0402_1%

DIS@

1

C1658

2

1U_0402_6.3V6K

DIS@ C1658

DIS@

12

.1U_0402_16V7K

1

C1659

C1660

2

1U_0402_6.3V6K

DIS@ C1659

DIS@

DIS@ C1660

DIS@

12

R1519

4.99K_0402_1%

DIS@

VREFC_A4_B

1

C1629

2

DIS@ C1629

DIS@

Date: Sheet of

R1527

4.99K_0402_1%

DIS@

1

C1661

C1662

2

1U_0402_6.3V6K

Title

Size Document Num ber Rev

C

1U_0402_6.3V6K

DIS@ C1661

DIS@

DIS@ C1662

DIS@

Compal Electronics, Inc.

ATI_Themes XT_M2_VRAM_B

12

1

C1663

2

DIS@ C1663

DIS@

VREFD_Q4_B

1

C1630

2

.1U_0402_16V7K

DIS@ C1630

DIS@

1

C1664

C1665

2

1U_0402_6.3V6K

DIS@ C1664

DIS@

DIS@ C1665

DIS@

LA-8121P

1

C1667

C1666

2

1U_0402_6.3V6K

DIS@ C1667

DIS@

DIS@ C1666

DIS@

24 50Monday, January 16, 2012

0.4

5

+3VS +3VS_PS

30mil 30mil

R2101 0_0603_5%R2101 0_0603_5%

Close to Pin3

0.1U_0402_16V4Z

10U_0603_6.3V6M

D D

1

C2102

2

0.1U_0402_16V4Z

1

C2103

2

Close to L27

10U_0603_6.3V6M

0.1U_0402_16V4Z

1

C2104

C2105

2

22U_0603_6.3V6M

+DP_V33

1

C2101

2

Close to Pin18

0.1U_0402_16V4Z

1

C2106

2

+SWR_VDD

0.1U_0402_16V4Z

1

C2107

C2108

2

LVDS_HPD7

Close to Pin13

Close to L29

C C

0.1U_0402_16V4Z

22U_0603_6.3V6M

1

C2109

2

0.1U_0402_16V4Z

1

2

1

C2110

2

Close to Pin27

C2111

Close to Pin7

+SWR_V12

FBMA-L11-201209- 221LMA30T_0805

0.1U_0402_16V4Z

1

C2100

2

FBMA-L11-201209- 221LMA30T_0805

L2103

@ L21 03

@

+1.2VS

12

20110124 Modify

4

+3VS_PS

L2101

L2101 FBMA-L11-201209- 221LMA30T_0805

FBMA-L11-201209- 221LMA30T_0805

L2102

L2102 FBMA-L11-201209- 221LMA30T_0805

FBMA-L11-201209- 221LMA30T_0805

1 2

L2100

4.7UH_PG031B-4R7MS_1.1 A_20%

DP0_AUXP_C7 DP0_AUXN_C7

DP0_TXP0_C7 DP0_TXN0_C7

Reserved for EC programming ROM Need EC confirm

R2106

100K_0402_5%

1 2

R2171 1K_04 02_1%R2171 1K_0402_1%

SDV2, NO.49

12

+DP_V33

12

+SWR_VDD

+SWR_LX+SWR_V12

CSCL CSDA

LVDS_HPD_C

R2107

12K_0402_1%

1 2

Change to 12Kohm 1% (DG ref.) 20101114

3

Part number: SA00004EU10

U2101

3

40mil

DP_V33

60mil

60mil 60mil60mil

13 18

12 11 27

7

2 1

5 6

9

10

32

8 4

SWR_VDD PVCC

SWR_LX SWR_VCCK VCCK DP_V12

AUX_P AUX_N

LANE0P LANE0N

CIICSCL1 CIICSDA1

HPD

DP_REXT DP_GND

Power

LVDS

RTD2132S

DP-IN

GPIO(PWM OUT)

GPIO(Panel_VCC)

GPIO

LVDS

Other

EDID

ROM

RTD2132S-GR_QFN32_5X5

TXEC+

TXEC-

TXE2+

TXE2-

TXE1+

TXE1-

TXE0+

TXE0-

GPIO(PWM IN)

GPIO(BL_EN)

MIICSCL1

MIICDA1

MIICSCL0 MIICSDA0

GND

19 20

21 22

23 24

25 26

14 15 16 17

29 28

31 30

33

TL_BKOFF#_R

MIIC_SCL MIIC_SDA

2

LVDS_ACLK 26 LVDS_ACLK# 26

LVDS_A2 26 LVDS_A2# 26

LVDS_A1 26 LVDS_A1# 26

LVDS_A0 26 LVDS_A0# 26

TL_INVT_PWM 26

TL_ENVDD 26

APU_INVT_PWM 9

EDID_CLK 26 EDID_DATA 26

MIIC_SDA

R2102

R2102 R2103

R2103

0_0402_5%

1 2 1 2

0_0402_5%

EDID_DATA

EDID_CLK

1

E

R

+SWR_VDD

O

M

MIIC_SCL_R MIIC_SDA_R

2132S-Ver E: External ROM, pin31 PU +3VS Internal RAM support, pin31 PD to GND EEROM EEROM EEROM EEROM

A0

A1

WP

R2169 1 0K_0402_5%R2169 10 K_0402_5%

U2100

8

VCC

7

WP

6

SCL

5

SDA

CAT24C64WI-GT3_SO8

+3VS_PS

MIIC_SCL

R2167 10K_0 402_5%R2167 10K_040 2_5%

R2168 10K_0 402_5%R2168 10K_040 2_5%

R2170 10K_0 402_5%R2170 10K_040 2_5%

R2108 4 .7K_0402_5%R2108 4.7K_040 2_5%

1 2

R2109 4 .7K_0402_5%R2109 4.7K_040 2_5%

1 2

12

A0 A1 A2

GND

R2104

4.7K_0402_5%

R2105

4.7K_0402_5%

@

1 2 3 4

+3VS_PS

A0 A1WP A2MIIC_SCL

Vendor advise reserve it

1 2

R2100 0_0402_5 %R2100 0_0402_5%

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

TL_BKOFF#_R

+3VS_PS

BKOFF#26,31

+3VS_PS

2

Q2107A

DMN66D0LDW-7_ SOT363-6

2011/04/18 2015/07/08

1 2

R2160 0_0402_5 %@R2160 0_0402_ 5%@

C2112

C2112 .1U_0402_16V7K

.1U_0402_16V7K

1 2

5

2

P

B

4

Y

1

A

G

U2104

3

MC74VHC1G08DFT2G_SC70-5

61

5

Q2107B

DMN66D0LDW-7_ SOT363-6

34

Compal Secret Data

Deciphered Date

EC_SMB_DA2CSDA

EC_SMB_CK2CSCL

ENBKL 31

TL_BKOFF# 26

EC_SMB_DA2 18,31,32 ,33,7

EC_SMB_CK2 18,31,32 ,33,7

2

MIIC_SDA

CSCL

CSDA

TL_INVT_PWM

TL_ENVDD

TL_BKOFF#_R

Vendor Suggest 2011.08.15

+3VS

CSDA

CSCL

FVT, NO.23

Title

LVDS Translator - RTD2132S

Size Docum ent Number Rev

Custom

Date: Sheet of

1 2

R2110 4 .7K_0402_5%R2110 4.7K_040 2_5%

1 2

R2158 4 .7K_0402_5%R2158 4.7K_040 2_5%

R2159 4 .7K_0402_5%R2159 4.7K_040 2_5%

1 2

R2163 1 00K_0402_5%R2163 100K_ 0402_5%

R2164 1 00K_0402_5%R2164 100K_ 0402_5%

1 2

R2165 1 00K_0402_5%R2165 100K_ 0402_5%

1 2

R2177 10K_0 402_5%R2177 10K_040 2_5%

R2178 10K_0 402_5%R2178 10K_040 2_5%

Compal Electronics, Inc.

12

@

R2117 0_0402_5%

@

R2116 0_0402_5%

LA-8121P

1

25 50Monday, January 16, 2012

TL_DATA 31

TL_CLK 3 1

0.4

1

LCD POWER CIRCUIT

2

3

4

5

LCD/LED PANEL Conn.

SDV2, NO.29

2

1

2

CMOS

D2101

@ D2101

@

12

D2110

12

R2172

R2172 10K_0402_5%

10K_0402_5%

@

+3VS

W=60mils

1

C2114

4.7U_0805_10V4Z

2

31

AP2301GN-HF_SOT23-3

AP2301GN-HF_SOT23-3 Q2101

Q2101

+LCDVDD

W=60mils

1 2

FBMA-L11-201209-221LMA30T_0805

L2104

+3VS

12

R2118

@ R2118

@

4.7K_0402_5%

DISPOFF#

12

R2121

@ R2121

@

10K_0402_5%

+3VS

12

R2175

4.7K_0402_5%

@

INVPWM

12

+LCDVDD_CONN

C2120

0.1U_0402_16V4Z

C2120

0.1U_0402_16V4Z

1

2

Place closed to JLVDS1

+3VS

1

C2115

0.1U_0402_16V4Z

C2119

4.7U_0805_25V6-K

C2119

4.7U_0805_25V6-K

1

2

SIT, NO.74

+3VS_CMOS DMIC_CLK29 DMIC_1_229

LOGO RED LIGHT

8/25

tune LED

+3VS Logo_LED#31,35

+3VALW USB20_N614 USB20_P614 LVDS_ACLK25 LVDS_ACLK#25

LVDS_A225 LVDS_A2#25 LVDS_A125 LVDS_A1#25 LVDS_A025 LVDS_A0#25

EDID_DATA25 EDID_CLK25

+3VS

+LCDVDD_CONN

+3VS

2

1 2

R2166 4.99K_0402_1%R2166 4.99K_0402_1%

1 2

R2123 10K_0402_5%R2123 10K_0402_5%

1 2

C2121 220P_0402_50V7KC2121 220P_0402_50V7K

1 2

C2124 220P_0402_50V7KC2124 220P_0402_50V7K

1 2

C2122 10P_0402_50V8J@C2122 10P_0402_50V8J@

1 2

C2123 10P_0402_50V8J@C2123 10P_0402_50V8J@

+LEDVDD

DISPOFF# INVPWM

DMIC_CLK DMIC_1_2

Logo_LED#

USB20_N6 USB20_P6

EDID_DATA EDID_CLK

INVPWM

DISPOFF#

EDID_CLK

EDID_DATA

C2116

4.7U_0805_25V6-K

(20 MIL)

40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9 8 7 6 5 4 3 2 1

STARC_107K40-000001-G2

CONN@

JLCD1

40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

1

2

G6 G5 G4 G3 G2 G1

DISPOFF#INVPWM

2

3

1

B+

R2113

1 2

0_0805_5%

C2117

@C2117

@

680P_0402_50V7K

46 45 44 43 42 41

D2100

@ D2100

@

PJSOT24C 3P C/A SOT-23

PN:SCA00001G00

SIT, NO.78

C2145 22P_0402_50V8J C2145 22P_0402_50V8J

C2144 22P_0402_50V8J C2144 22P_0402_50V8J

1 2

DMIC_CLK

DMIC_1_2

CMOS Camera Conn

CMOS@

Q2103

(20 MIL)

+3VALW

1

C2127

0.1U_0402_16V4Z

CMOS@

1 2

2

1

C2128

0.1U_0402_16V4Z

CMOS@

2

CMOS@

R2125

CMOS_ON#31

R2125

150K_0402_5%

Q2103

3 1

AP2301GN-HF_SOT23-3

2

4.7V

CMOS@

C2125

0.1U_0402_16V4Z

(20 MIL)

CMOS SUSPEND 2.4mA

1

10U_0603_6.3V6M

2

CMOS@

C2126

+3VS_CMOS+3VS

+LCDVDD +5VALW

12

R2111

150_0603_1%

BKOFF#25,31

TL_BKOFF#25

150_0603_1%

TL_ENVDD

R2115

100K_0402_5%

SDV2, NO.76

A A

TL_ENVDD25

B B

C C

D D

12

R2112

100K_0402_5%

13

D

Q2100

2

G

2N7002K_SOT23-3

S

13

D

Q2102

2

G

2N7002K_SOT23-3

S

12

1 2

R2161 0_0402_5%@R2161 0_0402_5%@

1 2

R2162 0_0402_5%R2162 0_0402_5%

TL_INVT_PWM25

1 2

R2114

R2114 220K_0402_1%

220K_0402_1%

C2118

0.1U_0402_16V4Z

RB751V-40_SOD323-2

1 2

R2119 0_0402_5%R2119 0_0402_5%

12

R2120

10K_0402_5%

@ D2110

@

RB751V-40_SOD323-2

1 2

R2173 0_0402_5%R2173 0_0402_5%

12

@

R2174

R2174 10K_0402_5%

10K_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/04/18 2015/07/08

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

4

Date: Sheet of

LVDS CONN/CAMERA

LA-8121P

5

26 50Monday, January 16, 2012

0.4

5

4

3

2

1

FVT, NO.6

HDMI_CLKP7 HDMI_CLKN7

HDMI_TX0P7

HDMI_TX0N7 HDMI_TX1P7 HDMI_TX1N7 HDMI_TX2P7 HDMI_TX2N7

D D

R2126 0_0402_5%@R2126 0_0402_5%@ R2127 0_0402_5%@R2127 0_0402_5%@ R2128 0_0402_5%@R2128 0_0402_5%@ R2129 0_0402_5%@R2129 0_0402_5%@ R2130 0_0402_5%@R2130 0_0402_5%@ R2131 0_0402_5%@R2131 0_0402_5%@ R2132 0_0402_5%@R2132 0_0402_5%@ R2133 0_0402_5%@R2133 0_0402_5%@

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

HDMI_CLK+_CONN

HDMI_CLK-_CONN HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_TX1+_CONN

HDMI_TX1-_CONN

HDMI_TX2+_CONN

HDMI_TX2-_CONN

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6 Q2104A

Q2104A

2N7002KDWH_SOT363-6

R2146

1 2

+3VS

2

1 2

@

R2142

1 2

R2144

F2100

R2147

R2147 2K_0402_5%

2K_0402_5%

1 2

HDMI_CLK-_CONN

HDMI_CLK+_CONN HDMI_TX0-_CONN

HDMI_TX0+_CONN HDMI_TX1-_CONN

HDMI_TX1+_CONN HDMI_TX2-_CONN

HDMI_TX2+_CONN

61

5

34

Q2104B

0_0402_5%

0_0402_5%@

R2145

@R21 45

@

0_0805_5%

+5VS_HDMI_F

21

+5VS_HDMI

1

2

HDMI_HPD

HDMIDAT_R HDMICLK_R

Title

Size Document Number Rev

Custom

Date: Sheet of

3

2

RB491D-YS_SOT23-3

RB491D-YS_SOT23-3 D2104

D2104

C2129

0.1U_0402_16V4Z

JHDMI1

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11

CK_shield

10

CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

SUYIN_100042GR019M23DZL

CONN@

Compal Electronics, Inc.

HDMI Connector

HDMICLK_R

HDMIDAT_R

+5VS

20

GND

21

GND

22

GND

23

GND

LA-8121P

1

0.4

27 50Mon day, January 16, 2012

0.4

HDMI_CLK+_CONN

L2105

HDMI_CLKP

HDMI_CLKN

HDMI_TX0P

HDMI_TX0N

HDMI_TX1P

C C

HDMI_TX1N

HDMI_TX2P

HDMI_TX2N

1

4

WCM-2012-900T_4P

L2106

1

4

WCM-2012-900T_4P

L2107

1

4

WCM-2012-900T_4P

L2108

1

4

WCM-2012-900T_4P

2

3

2

3

2

3

2

3

HDMI_CLK+_CONN

HDMI_CLK-_CONN

HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_TX1+_CONN

HDMI_TX1-_CONN

HDMI_TX2+_CONN

HDMI_TX2-_CONN

HDMI_CLK-_CONN

HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_TX1+_CONN

HDMI_TX1-_CONN

HDMI_TX2+_CONN

HDMI_TX2-_CONN

NEAR CONNECTOR

1 2

R2134 604_0402_1%R2134 604_0 402_1%

1 2

R2135 604_0402_1%R2135 604_0 402_1%

1 2

R2136 604_0402_1%R2136 604_0 402_1%

1 2

R2137 604_0402_1%R2137 604_0 402_1%

1 2

R2138 604_0402_1%R2138 604_0 402_1%

1 2

R2139 604_0402_1%R2139 604_0 402_1%

1 2

R2140 604_0402_1%R2140 604_0 402_1%

1 2

R2141 604_0402_1%R2141 604_0 402_1%

12

@

R2143

R2143 100K_0402_5%

100K_0402_5%

2

+5VS

G

13

D

Q2105

2N7002K_SOT23-3

S

HDMI_CLK7

HDMI_DATA7

ESD Request 2011.08.13

D2105

HDMI_CLK-_CONN

HDMI_CLK+_CONN

HDMI_TX1-_CONN

HDMI_TX1+_CONN HDMI_TX1+_CONN

B B

HDMI_TX0-_CONN

HDMI_TX0+_CONN

HDMI_TX2-_CONN

HDMI_TX2+_CONN

HDMI_HPD HDMI_HPD

HDMICLK_R HDMICLK_R

A A

+5VS_HDMI +5VS_HDMI

SDV2, NO.56

1

2

4

5

3

8

YSCLAMP0524P_SLP2510P8-10-9

D2102

1

2

4

5

3

8

YSCLAMP0524P_SLP2510P8-10-9

D2103

1

2

4

5

3

8

YSCLAMP0524P_SLP2510P8-10-9

5

9

HDMI_CLK-_CONN

10

8

HDMI_CLK+_CONN

9

7

HDMI_TX1-_CONN

7

6

65

+3VS

C

3

Q2106

C

E

3 1

12

R2150

R2150 100K_0402_5%

100K_0402_5%

R2148

2

1 2

B

150K_0402_5%

200K_0402_5%

2011/04/18 2015/07/08

HDMI_HPD

@

R2149

1 2

Compal Secret Data

Deciphered Date

9

HDMI_TX0-_CONN

10

8

HDMI_TX0+_CONN

9

7

HDMI_TX2-_CONN

7

6

HDMI_TX2+_CONN

65

9

10

8

9

7

6

65

HDMIDAT_RHDMIDAT_R

4

HDMI_DET7

MMBT3904_NL_SOT23-3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1.1A_6V_SMD1812P110TF

2K_0402_5%

2

A

1 1

DAC_RED13

DAC_GRN13

DAC_BLU13

DAC_RED

DAC_GRN

DAC_BLU

12

R2151

R2151 150_0402_1%

150_0402_1%

12

R2152

R2152 150_0402_1%

150_0402_1%

12

R2153

R2153 150_0402_1%

150_0402_1%

CLOSE TO CONN

+CRT_VCC

R2154

1 2

1

C2136

0.1U_0402_16V4Z

2 2

CRT_HSYNC13

CRT_VSYNC13

3 3

0.1U_0402_16V4Z

C2138

2

1

2

SDV2, NO.93

CRT_DDC_DATA13

CRT_DDC_CLK13

4 4

1

5

U2102

P

OE#

A2Y

G

74AHCT1G125GW_SOT353-5

3

+CRT_VCC

1 2

1

5

U2103

P

OE#

A2Y

G

74AHCT1G125GW_SOT353-5

3

1K_0402_5%

4

R2155

1K_0402_5%

4

1

2

10P_0402_50V8J

CRT_HSYNC_1

CRT_VSYNC_1

R2156

4.7K_0402_5%

100P_0402_50V8J

B

C2130

+R_CRT_VCC

12

@

C2141

FCM1608CF-121T03_2P

1 2

FCM1608CF-121T03_2P

1 2

FCM1608CF-121T03_2P

1 2

1

C2132

C2131

10P_0402_50V8J

2

10P_0402_50V8J

1 2

L2112

FCM1608CF-121T03_2P

1 2

L2113

FCM1608CF-121T03_2P

12

R2157

4.7K_0402_5%

CRT_DDC_DATA

CRT_DDC_CLK

1

@

C2142

C2142 68P_0402_50V8J

68P_0402_50V8J

2

L2109

L2110

L2111

1

C2133

2

10P_0402_50V8J

1

2

1

2

1

C2134

2

10P_0402_50V8J

JVGA_HS

@

C2137

C2137 10P_0402_50V8J

10P_0402_50V8J

JVGA_VS

@

C2139

C2139 10P_0402_50V8J

10P_0402_50V8J

C

RED

GREEN

BLUE

C2135

C2135 10P_0402_50V8J

10P_0402_50V8J

D

ESD Request 2011.08.13

D2107

+R_CRT_VCC

CRT_DDC_DATA

+R_CRT_VCC

BLUE

CRT_DDC_CLK

6

I/O4

5

VDD

4

I/O3

AZC099-04S.R7G_SOT23-6

D2108

6

I/O4

5

VDD

4

I/O3

AZC099-04S.R7G_SOT23-6

I/O2

GND

I/O1

I/O2

GND

I/O1

3

2

1

3

2

1

CRT Connector

+5VS

2

3

RB491D-YS_SOT23-3

RED

CRT_DDC_DATA GREEN

JVGA_HS BLUE

JVGA_VS

CRT_DDC_CLK

D2106

+R_CRT_VCC

1

1.1A_6V_SMD1812P110TF

W=40mils

1

2

RED

GREEN

JVGA_HS

JVGA_VS

F2101

21

C2143

100P_0402_50V8J

E

1

C2140

0.1U_0402_16V4Z

2

JCRT1

6

11

1 7

12

2 8

13

3 9

14

4 10 15

5

C-H_13-12201558CP

CONN@

+CRT_VCC

SDV2, NO.22

16 17

Security Classification

AMD check list update 20101110

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/04/18 2015/07/08

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

CRT Connector

LA-8121P

28 50Monday, January 16, 2012

E

0.4

1

CX20671 High Definition Audio Codec SoC With Integrated Class-D Stereo Amplifier. An integrated 5 V to 3.3 V Low-dropout voltage regulator (LDO).

An integrated 3.3 V to 1.8V Low-dropout voltage regulator (LDO).

A A

PC Beep

EC Beep

ICH Beep

BEEP#31

FCH_SPKR14

RB751V-40_SOD323-2

C1111 0.1U_0402_16V4Z

C1141 0.1U_0402_16V4Z

RB751V-40_SOD323-2

SDV2, NO.35

Combo Jack detect (normal close)

MIC_JD

Q1103

PLUG_IN

CX_GPIO0

13

D

LBSS138LT1G_SOT-23-3

2

G

S

+5VS

G

2

S

1 2

R1136

R1136 0_0402_5%

0_0402_5%

@

Q1104

Q1104 BSS138_NL_SOT23-3

BSS138_NL_SOT23-3

13

D

B B

PLUG_IN35

HDA_SYNC_AUDIO14

C C

SDV2, NO.71

D1102

12

1 2

@

1 2

@

D1101

12

R1121

10K_0402_5%

1 2

R1130 33K_0402_5%R1130 33K_0402_5%

1

C1146

C1146 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1 2

R1129 33K_0402_5%

@

R1129 33K_0402_5%

@

1

C1147

C1147 1U_0402_6.3V6K

1U_0402_6.3V6K

@

2

HDA_SYNC_AUDIO

1 2

R1120 33_0402_5%R1120 33_0402_5%

12

EXT_MIC

potential leakage concern

Decoupling CAP

+CLASSD_5V

1 2

C1115 0.1U_0402_16V4ZC1115 0.1U_0402_16V4Z

1 2

C1117 10U_0603_6.3V6MC1117 10U_0603_6.3V6M

1 2

C1118 0.1U_0402_16V4ZC1118 0.1U_0402_16V4Z

1 2

C1120 10U_0603_6.3V6M

@

Near Pin 12

Near Pin 15

2

Layout Note:Path from +5VS to Pin12, Pin15 must be very low resistance (<0.01 ohms)

To support Wake-on-Jack or W ake-on-Ring, the CODEC VAUX_3.3 & VDD_IO pins must be powerd by a rail that is not removed unless AC power is removed. *DSH page42 has more detail.

1 2

PC_BEEP_C PC_BEEP

0.1U_0402_16V4Z

0.1U_0402_16V4Z C1142

C1142

HDA_RST_AUDIO#14

HDA_BITCLK_AUDIO14

HDA_SDIN014 HDA_SDOUT_AUDIO14

EAPD31 EC_MUTE#31

Internal DMIC

DMIC_CLK26

DMIC_1_226

Internal SPEAKER

10K only needed if supply to VAUX_3.3 is removed during system re-start.

1 2

R1112 @ 4.7K_0402_5%R1112 @ 4.7K_0402_5%

1 2

R1115 33_0402_5%R1115 33_0402_5%

EAPD active low 0=power down ex AMP 1=power up ex AMP

1 2

R1111 0_0402_5%R1111 0_0402_5%

1 2

R1131 0_0402_5%R1131 0_0402_5%

1 2

R1138

FBMA-10-100505-301T_2P

R1139 0_0402_5%R1139 0_0402_5%

+3VS

0.1U_0402_16V4Z

1 2

C1121

C1116

C1132

3

12

C1119

@

C1119

@

4.7U_0603_6.3V6K

Near Pin 2

12

C1114

@C1114

@

1U_0402_6.3V6K

Near Pin 7

12

C1130

4.7U_0603_6.3V6K

Near Pin 3

HDA_RST#_AUDIO

HDA_BITCLK_AUDIO HDA_SYNC_AUDIO

HDA_SDOUT_AUDIO

PC_BEEP

SDV2, NO.13

CX_GPIO0

DMIC_CLK_R

DMIC_1_2_R

SPK_L2+ SPK_L1-

SPK_R2+ SPK_R1-

FILT_1.8_R

U1101

9

RESET#

5

BIT_CLK

8

SYNC

6

SDATA_IN

4

SDATA_OUT

10

PC_BEEP

38

GPIO0/EAPD#

37

GPIO1/SPK_MUTE#

40

DMIC_CLK

1

DMIC_1/2

11

LEFT+

13

LEFT-

16

RIGHT+

14

RIGHT-

FVT, NO.13

SPK_RT_Detect#31

3

7

FILT_1.8

GND

41

4

1 2

C1135 1U_0402_6.3V6KC1135 1U_0402_6.3V6K

1 2

C1136 0.1U_0402_16V4ZC1136 0.1U_0402_16V4Z

1 2

C1133 4.7U_0603_6.3V6KC1133 4.7U_0603_6.3V6K

1 2

C1134 0.1U_0402_16V4ZC1134 0.1U_0402_16V4Z

12

C1113

12

C1124

SENSE_A

PORTC_R PORTC_L

EXT_MIC

HP_OUTR_R HP_OUTL_R

AVEE FLY_P FLY_N

Rdc < 0.05 ohms Rated Current > 2A

2

18

29

VDD_IO

FILT_1.65

VAUX_3.3

DVDD_3.3

CX20671-21Z_QFN40_6X6

27

28

AVDD_5V

AVDD_3.3

FILT_1.65_R

+LDO_OUT_3.3V

26

LPWR_5.0 RPWR_5.0

AVDD_HP

CLASS-D_REF

SENSE_A

PORTB_R PORTB_L

B_BIAS

C_BIAS PORTC_R PORTC_L

PORTA_R PORTA_L

FLY_N

AVEE

FLY_P

NC NC NC

0.1U_0402_16V4Z

4.7U_0603_6.3V6K

12 15 17

36

35 34 33

32 31 30

23 22

24 25 39

21 19 20

Width 20 mil

SPK_R1SPK_R2+ SPK_L1- SPK_L1-_CONN SPK_L2+ SPK_L2+_CONN

1 2

L1102 0_0603_5%L1102 0_0603_5%

1 2

L1103 0_0603_5%L1103 0_0603_5%

1 2

L1104 0_0603_5%L1104 0_0603_5%

1 2

L1105 0_0603_5%L1105 0_0603_5%

1 2

R1140 0_0402_5%R1140 0_0402_5%

Near Pin 29

Near Pin 27

+5VS

12

C1112

@

C1112

@

4.7U_0603_6.3V6K

12

C1129

@

C1129

@

0.1U_0402_16V4Z

Near Pin 28

+3VS

Near Pin 26

Near Pin 17

1 2

C1107 0.1U_0402_16V4ZC1107 0.1U_0402_16V4Z

1 2

R1113 5.11K_0402_1%R1113 5.11K_0402_1%

1 2

R1114 20K_0402_1%R1114 20K_0402_1%

1 2

R1116 39.2K_0402_1%R1116 39.2K_0402_1%

1 2

C1108 2.2U_0603_6.3V6KC1108 2.2U_0603_6.3V6K

1 2

R1132 2K_0402_5%R1132 2K_0402_5%

1 2

R1117 15_0402_5%R1117 15_0402_5%

1 2

R1118 15_0402_5%R1118 15_0402_5%

Changed from 5.1ohm to 15ohm for "zi zi"noise.

1 2

C1110 1U_0603_10V4ZC1110 1U_0603_10V4Z

+MICBIASB

Internal Speaker

SPK_R1-_CONN SPK_R2+_CONN

SPK_RT_Detect#_RSPK_RT_Detect#

+CLASSD_5V

+3VS

MIC_JD PLUG_IN

1 2

R1133 100_0402_1%R1133 100_0402_1%

+MICBIASB

1 2

R1128 4.7K_0402_5%R1128 4.7K_0402_5%

HP_OUTR HP_OUTL

EMI

HP_OUTR 35 HP_OUTL 35

C1122 0.1U_0402_16V4ZC1122 0.1U_0402_16V4Z

C1125 4.7U_0603_6.3V6KC1125 4.7U_0603_6.3V6K

@

C1138

1000P_0402_50V7K@C1138

1000P_0402_50V7K

C1137

1000P_0402_50V7K@C1137

1000P_0402_50V7K

1

2

5

EMI

1 2

C1102 0.1U_0402_16V4Z@C1102 0.1U_0402_16V4Z@

1 2

C1103 0.1U_0402_16V4Z@C1103 0.1U_0402_16V4Z@

1 2

C1104 0.1U_0402_16V4Z@C1104 0.1U_0402_16V4Z@

1 2

R1102 0_0402_5%

@

R1102 0_0402_5%

@

1 2

R1104 0_0402_5%@R1104 0_0402_5%@

1 2

R1105 0_0402_5%@R1105 0_0402_5%@

SIT, NO.81

GND GNDA

1 2

R1137 0_0805_5%R1137 0_0805_5%

1 2

@

C1139

1000P_0402_50V7K@C1139

1000P_0402_50V7K

1

2

GND

Sense resistors must be connected same power that is used for VAUX_3.3

Port B Port A

External MIC

EXT_MIC

Headphone

@

C1140

1000P_0402_50V7K@C1140

1000P_0402_50V7K

1

2

+5VS+3VS

EXT_MIC 35

Near Pin 21

JSPK1

1 2 3 4 5 6

7 8

E-T_4070K-G06N-00L

1 2 3 4 5 6

GND GND

Note.

D D

HDA_RST#_AUDIO

HDA_SYNC_AUDIO

HDA_SDOUT_AUDIO

HDA_BITCLK_AUDIO HDA_BITCLK_AUDIO_R

1 2

R1123 33_0402_5%@R1123 33_0402_5%@

1

EMI

C1123 22P_0402_50V8J@C1123 22P_0402_50V8J@

C1126 22P_0402_50V8J@C1126 22P_0402_50V8J@

C1128 22P_0402_50V8J@C1128 22P_0402_50V8J@

C1131 22P_0402_50V8J@C1131 22P_0402_50V8J@

1 2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/04/18 2015/07/08

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet of

4

Date: Sheet of

QALEA 14" => J SPK1 => 4Pin QALEB 15" => J SPK1 => 6Pin

Compal Electronics, Inc.

HD Audio Codec CX20671

LA-8121P

5

29 50Monday, January 16, 2012

0.4

A

B

C

D

E

F

G

H

SATA HDD Conn.

JHDD1

1

GND

SATA_FTX_DRX_P013 SATA_FTX_DRX_N013

SATA_FRX_C_DTX_N013

1 1

SATA_FRX_C_DTX_P013

HDD_DETECT#31

1 2

C2401 0.01U_0402_16V7KC2401 0.01U_0402_1 6V7K

1 2

C2402 0.01U_0402_16V7KC2402 0.01U_0402_1 6V7K

SATA_FTX_DRX_P0 SATA_FTX_DRX_N0

SATA_FRX_DTX_N0 SATA_FRX_DTX_P0

+3VS

+5VS_HDD

SDV2, NO.77

+5VS_HDD

@

C2405

1000P_0402_50V7K@C2405

1000P_0402_50V7K

1

2

@

C2471

1U_0603_10V4Z@C2471

1U_0603_10V4Z

C2406

10U_0603_6.3V6M

C2406

10U_0603_6.3V6M

1

2

SDV2, NO.5

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

V33

9

V33

10

V33

11

GND

12

GND

13

GND

14

V5

15

V5

16

V5

17

GND

18

Reserved

19

GND

20

V12

21

V12

22

V12

SANTA_198202-1

CONN@

GND GND

+5VS +5VS_HDD

23 24

J2401@

112

JUMP_43X79

2

2 2

SATA ODD Conn.

FVT, NO.9

JODD2

SATA_FTX_DRX_P113 SATA_FTX_DRX_N113

SATA_FRX_C_DTX_N113 SATA_FRX_C_DTX_P113

ODD_DETECT#1 4

+5VS_ODD

ODD_DA#_FCH14

3 3

SATA_FRX_C_DTX_N1 SATA_FRX_C_DTX_P1 SATA_FRX_DTX_P1

+5VS_ODD

1 2

C2408 0 .01U_0402_16V7KC2408 0 .01U_0402_16V7K

1 2

C2409 0 .01U_0402_16V7KC2409 0 .01U_0402_16V7K

1 2

R2406 0_0402_5%R2406 0_0402_5%

1 2

R2401 0_0402_5%

@

R2401 0_0402_5%

@

1 2

R2437 0_0402_5%R2437 0_0402_5%

SATA_FTX_DRX_P1 SATA_FTX_DRX_N1

SATA_FRX_DTX_N1

ODD_DETECT#_R

ODD_DA#_R

SATA_FTX_DRX_P1 SATA_FTX_DRX_N1

SATA_FRX_DTX_N1 SATA_FRX_DTX_P1

ODD_DETECT#_R +5VS_ODD

ODD_DA#_R

1

2

3

4

5

6

7

8

9

10

11

GND

12

GND

ACES_88514-104N

CONN@

Note. QALEA 14" => JODD1 QALEB 15" => JODD2

10K_0402_5%

ODD_EN13

2

APS G-Sensor

12

R2402

R2402 100K_0402_5%

100K_0402_5%

U2406

C2410

1

2

APS_GND

2

ST

14

Vs

15

.1U_0402_16V7K

Vs

3

COM

5

COM

6

COM

7

COM

LIS34ALTR LGA 16P G-SENSOR

B

@ J2402

@

2MM

GS_SELFTEST31 GS_VOUTX 31

+3VS +3VS_GS

1 2

R2405 0_0603_5%

@

R2405 0_0603_5%

@

FVT, NO.17

4 4

Note. Main Source => C2417 use 10U (SE000005T80) 2nd Source => C2417 use 10K (SD013100280)

A

C2417

10U_0603_6.3V6M

C2417

10U_0603_6.3V6M

1

2

J2402

12

VOUTX

Xout

10

VOUTY

Yout

8

Zout

1

NC

4

NC

9

NC

11

NC

13

NC

16

NC

21

APS_GND

C

C2411

1

2

APS_GND

1 2

R2403 56K_0402_5%R2403 56K_0402_5%

1 2

R2404 56K_0402_5%R2404 56K_0402_5%

.1U_0402_16V7K

C2418

.1U_0402_16V7K

C2418

.1U_0402_16V7K

1

2

GS_VOUTY 31

C2416

.1U_0402_16V7K

C2416

.1U_0402_16V7K

C2412

.1U_0402_16V7K

C2412

.1U_0402_16V7K

1

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

GS_ON#31

2011/04/18 2015/07/08

E

GS_ON#

Compal Secret Data

FVT, NO.12

150K_0402_5%

R2410

1 2

150K_0402_5%

Deciphered Date

ODD Power Control

R2438

IN

@

R2411

+5VS

+3VS

F

12

R2440

1 2

1

100K_0402_5%

OUT

Q2410

Q2410 DDTC124EKA-7-F_SC59-3

DDTC124EKA-7-F_SC59-3

GND

3

12

1

@

C2421

0.01U_0402_16V7K

2

AP2301GN-HF_SOT23-3

3 1

J4

@J4

@

2

112

JUMP_43X79

Q2411

2

C2413 0.01U_0402_16V7KC2413 0.01U_0402_1 6V7K

3 1

2

1

C2420

0.01U_0402_16V7K

2

C2486

0.01U_0402_16V7K

1 2

Q2402

Q2402 AP2301GN-HF_SOT23-3

AP2301GN-HF_SOT23-3

1

C2419

0.1U_0402_16V4Z

2

Title

Size Document Number Rev

B

Date: Sheet of

+5VS_ODD

1

2

Compal Electronics, Inc.

G

1

C2501

C2501 10U_0805_10V4Z

10U_0805_10V4Z

2

12

R2409

R2409 0_0603_5%

0_0603_5%

1

C2487

C2487 10U_0603_6.3V6M

10U_0603_6.3V6M

@

2

HDD/ODD/G-Sensor

LA-8124P

+3VS_GS

0.4

30 50Mon day, January 16, 2012

H

0.4

1

SIT, NO.71

+3VALW_EC

A A

+3VALW_EC

B B

+3VALW

1 2

R2212 47K_0402_5%

@

R2212 47K_0402_5%

@

1 2

R2213 47K_0402_5%

@

R2213 47K_0402_5%

@

1 2

R2214 2.2K_0402_5%R2214 2.2K_0402_5%

1 2

R2215 2.2K_0402_5%R2215 2.2K_0402_5%

+3VS

1 2

R2236 100K_0402_5%

@

R2236 100K_0402_5%

@

1 2

R2235 10K_0402_5%

@

R2235 10K_0402_5%

@

C C

FVT NO.33

+3VALW

1 2

R2217 2.2K_0402_5%R2217 2.2K_0402_5%

1 2

R2218 2.2K_0402_5%R2218 2.2K_0402_5%

1 2

C2220 100P_0402_50V8J@C2220 100P_0402_50V8J@

1 2

C2219 100P_0402_50V8J@C2219 100P_0402_50V8J@

+3VS

1 2

R2227 2.2K_0402_5%@R2227 2.2K_0402_5%@

1 2

R2226 2.2K_0402_5%@R2226 2.2K_0402_5%@

D D

1 2

L2200 0_0603_5%L2200 0_0603_5%

0.1U_0402_16V4Z

1 2

L2201 0_0603_5%L2201 0_0603_5%

1 2

C2209 @ 22P_0402_50V8JC2209 @ 22P_0402_50V8J

1 2

R2203 47K_0402_5%R2203 47K_0402_5%

0.1U_0402_16V4Z

KSO1

KSO2

EC_SMB_CK1

EC_SMB_DA1

SPK_RT_Detect#

H_PROCHOT#_EC

FCH_POK14

+3VS

10K_0402_5%

EC_SMB_CK2

EC_SMB_DA2

EC_SMB_CK2

EC_SMB_DA2

EC_SMB_CK2

EC_SMB_DA2

1

C2201

2

ECAGND

1 2

R2204 @ 10_0402_5%R2204 @ 10_0402_5%

1

C2210

2

KSO[0..17]33

KSI[0..7]33

SDV2, NO.65

SIT, NO.2

SDV2, NO.82

SIT, NO.65

RB751V-40_SOD323-2

12

R2220

@

0_0402_5%

FVT, NO.38

FVT, NO.35

+EC_AVCC

1

C2202

C2202 1000P_0402_50V7K

1000P_0402_50V7K

2

@

D2200

2 1

12

R2221

KSO[0..17]

KSI[0..7]

GATEA2014 KB_RST#14 SERIRQ12 LPC_FRAME#12,33,35 LPC_AD312,33,35 LPC_AD212,33,35 LPC_AD112,33,35 LPC_AD012,33,35

CLK_PCI_EC12,16

PLT_RST#12,31,35

EC_SCI#14 ADP_PROTECT38

EC_SMB_CK138,39 EC_SMB_DA138,39 EC_SMB_CK218,25,32,33,7 EC_SMB_DA218,25,32,33,7

PM_SLP_S3#14 PM_SLP_S5#14 EC_SMI#14 CMOS_ON#26 TP_RESET33 GS_ON#30 WL_OFF_EC#33

EC_TACH32

EC_TX_P80_DATA33,35 EC_RX_P80_CLK33,35

EC_FAN_PWM32

GS_SELFTEST30

RTC_CLK12,16

@

C2217

C2217 18P_0402_50V8J

18P_0402_50V8J

2

C2204

0.1U_0402_16V4Z

C2204

0.1U_0402_16V4Z

C2203

0.1U_0402_16V4Z

C2203

0.1U_0402_16V4Z

1

2

GATEA20 KB_RST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

EC_RST# EC_SCI# ADP_PROTECT

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

PM_SLP_S3# PM_SLP_S5# EC_SMI# CMOS_ON# TP_RESET GS_ON# WL_OFF_EC#

EC_TACH EC_PME# EC_TX_P80_DATA EC_RX_P80_CLK FCH_PWROK EC_FAN_PWM GS_SELFTEST

XCLKI

1 2

XCLKO

R2200 0_0402_5%R2200 0_0402_5%

R2225

100K_0402_5%

1 2

R2231 10M_0402_5%@R2231 10M_0402_5%@

@

Y2200

1 2

32.768KHZ_12.5PF_CM31532768DZFT

1

SDV2, NO.44

2

C2206

0.1U_0402_16V4Z

C2206

0.1U_0402_16V4Z

C2205

0.1U_0402_16V4Z

C2205

0.1U_0402_16V4Z

1

2

U2200

1

GATEA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ

4

LPC_FRAME#

5

LPC_AD3

7

LPC_AD2

8

LPC_AD1

10

LPC_AD0

12

CLK_PCI_EC

13

PCIRST#/GPIO05

37

EC_RST#

20

EC_SCII#/GPIO0E

38

GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

EC_SMB_CK1/GP IO44

78

EC_SMB_DA1/GPIO45

79

EC_SMB_CK2/GP IO46

80

EC_SMB_DA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

GPIO0A

17

GPIO0B

18

GPIO0C

19

GPIO0D

25

EC_INVT_PWM/GP IO11

28

FAN_SPEED1/GPIO14

29

EC_PME#/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

PCH_PWR OK/GPIO18

34

SUSP_LED#/GPIO19

36

NUM_LED#/GPIO1A

122

XCLKI/GPIO5D

123

XCLKO/GPIO5E

12

C2215

C2215 20P_0402_50V8

20P_0402_50V8

1 2

POP for susclk implemented 20100810

XCLKI

XCLKO

@

1

C2218

C2218 18P_0402_50V8J

18P_0402_50V8J

2

+3VALW_EC +EC_AVCC

C2208

1000P_0402_50V7K

C2208

1000P_0402_50V7K

C2207

1000P_0402_50V7K

C2207

1000P_0402_50V7K

1

2

LPC & MISC

Int. K/B

Int. K/B Matrix

Matrix

9

EC_VDD/VCC

PS2 Interface

SM Bus

22

EC_VDD/VCC

GND/GND

11

+3VLP

33

67

96

111

125

EC_VDD0

EC_VDD/VCC

EC_VDD/AVCC

PWM Output

AD Input

DA Output

CPU1.5V_S3_GATE/GP XIOA00

VCIN0_PH/GPXIOD00

SPI Device Interface

SPI Flash ROM

BATT_CHG_LE D#/GPIO52

GPIO

BATT_LOW_ LED#/GPIO55

PM_SLP_S4#/GPIO59

EC_RSMRST# /GPXIOA03 EC_LID_OUT#/GPXIOA04

PROCHOT_IN/GPXIOA05

H_PROCHOT# _EC/GPXIOA06

VCOUT0_PH/GPXIOA07

GPO

GPIO

PBTN_OUT# /GPXIOA09

PCH_APWROK /GPXIOA10

SA_PGOOD/GPXIOA11

GPI

PECI_KB9012/GPXIOD07

GND/GND

AGND/AGND

GND/GND

GND0

24

35

69

94

113

ECAGND

3

J2200

+3VLP +3VALW_EC

+3VALW +3VALW_EC

FVT, NO.14

BEEP#/GPIO10

ACOFF/GPIO13

BATT_TEMP/GPIO38

ADP_I/GPIO3A

IMON/GPIO43

DAC_BRIG/GPIO3C EN_DFAN1/GPIO3D

IREF/GPIO3E

CHGVADJ/GPIO3F

EC_MUTE#/GPIO4A

USB_EN#/GPIO4B

CAP_INT#/GPIO4C

EAPD/GPIO4D

TP_CLK/GPIO4E

TP_DATA/GPIO4F

WOL_EN/GPXIOA01

ME_EN/GPXIOA02

SPIDI/GPIO5B

SPIDO/GPIO5C SPICLK/GPIO58 SPICS#/GPIO5A

ENBKL/GPIO40

PECI_KB930/GPIO41

FSTCHG/GPIO50

CAPS_LED#/GPIO53

PWR_LED #/GPIO54

SYSON/GPIO56

VR_ON/GPIO57

BKOFF#/GPXIOA08

AC_IN/GPXIOD01

EC_ON/GPXIOD02

ON/OFF/GPXIOD03

LID_SW#/GPXIOD04

SUSP#/GPXIOD05

GPXIOD06

KB9012QF-A3_LQFP128_14X14

112

JUMP_43X39@

J2201

112

JUMP_43X39@

21

GPIO0F

23

BEEP#

26

GPIO12

GPIO39

GPIO3B

GPIO42

WLAN_WAKE#

27

ACOFF

63

BATT_TEMP

64

GS_VOUTX

65

ADP_I

66

GS_VOUTY

75

BRDID

76

APU_IMON

68

AOU_CTL2

70

FCH_PWR_EN

71

AOU_CTL3

72

SPK_RT_Detect#

83

EC_MUTE#

84

USB_ON#

85

TL_CLK

86

TL_DATA

87

TP_CLK

88

TP_DATA

97

VGATE

98 99

APU_ALERT#_EC

109

9012_PH1

119

EAPD_R

120 126

BATT_LEN#

128

BM#

73

ENBKL

74

ADP_ID

89

FSTCHG

90

AOU_EN

91

AOAC_WLAN

92

HDD_DETECT#

93

CP_RESET#

95

SYSON

121

VR_ON

127

VSB_ON

100

EC_RSMRST#

101

EC_LID_OUT#

102

Turbo_V

103

H_PROCHOT#_EC

104

MAINPWON_R

105

BKOFF#

106

PBTN_OUT#

107 108

EC_PXCONTROL

110

ACIN

112

EC_ON

114

ON/OFF

115

LID_SW#

116

SUSP#

117 118

124

+V18R

V18R

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

4

2

SIT, NO.63

1

C2216

4.7U_0805_10V4Z

2

Logo_LED#

13

D

Q2201

2

2N7002K_SOT23-3

G

S

BEEP# 29 WLAN_WAKE# 33 ACOFF 37,39

BATT_TEMP 38 GS_VOUTX 30 ADP_I 38,39 GS_VOUTY 30

APU_IMON 45

SDV2, NO.58

AOU_CTL2 35 FCH_PWR_EN 36 AOU_CTL3 35 SPK_RT_Detect# 29

EC_MUTE# 29 USB_ON# 34 TL_CLK 25 TL_DATA 25 TP_CLK 33 TP_DATA 33

VGATE 14,45

APU_ALERT#_EC 7 9012_PH1 38

BATT_LEN# 38 BM# 39,40

ENBKL 25 ADP_ID 37 FSTCHG 39 AOU_EN 35 AOAC_WLAN 33 HDD_DETECT# 30 CP_RESET# 33 SYSON 41,43 VR_ON 42,45 VSB_ON 38

EC_RSMRST# 14 EC_LID_OUT# 14 Turbo_V 38 H_PROCHOT#_EC 38,7

BKOFF# 25,26 PBTN_OUT# 14

EC_PXCONTROL 14

ACIN 35,37 EC_ON 35,40 ON/OFF 35 LID_SW# 35 SUSP# 36,39,42,44

SDV2, NO.79

2011/04/18 2015/07/08

Logo_LED# 26,35

SIT, NO.72

SIT, NO.62

SIT, NO.58

SDV2, NO.66

FVT, NO.24

1 2

R2233 100K_0402_5%

@

R2233 100K_0402_5%

@

1 2

R2234 100K_0402_5%

@

R2234 100K_0402_5%

@

SIT, NO.64

ENBKL

VR_ON

8/25

FVT, NO.31

SDV2, NO.46

2011.10.13 Fol low ABO Common Design

+3VS

Security ROM

12

R2222

R2222 10K_0402_5%

10K_0402_5%

@

U2201

1

NC

2

NC

3

PLT_RST#12,31,35

Compal Secret Data

PLT_RST#

Deciphered Date

4

PROT#

4

GND

PCA24S08D_SO8

EEPROM SA00004MK00

3.3V +/- 5%

Vcc

100K +/- 5%

R2207

Board ID

0K +/- 5%

0

8.2K +/- 5%

1

18K +/- 5%

2

33K +/- 5%

3 4 56K +/- 5% 1.036 V 1.185 V 1.264 V

HDD_DETECT#

BM#

EC_MUTE#

BEEP#

LID_SW#

FVT, NO.26

EAPD_R TL_CLK

USB_ON#

1 2

R2232 100K_0402_5%R2232 100K_0402_5%

1 2

R2230 100K_0402_5%

@

R2230 100K_0402_5%

@

1 2

R2202 10K_0402_5%R2202 10K_0402_5%

1 2

R2205 10K_0402_5%

@

R2205 10K_0402_5%

@

1 2

R2206 100K_0402_5%R2206 100K_0402_5%

1 2

R2223 0_0402_5%R2223 0_0402_5%

1 2

R2224 0_0402_5%

@

R2224 0_0402_5%

@

1 2

R2208 10K_0402_5%

@

R2208 10K_0402_5%

@

VR2209

AD_BID

0 V

0.436 V

0.712 V

min

+3VALW

+3VALW_EC

+5VALW

SIT, NO.88

TP_CLK

TP_DATA

BATT_TEMP

ACIN

LAN_WAKE#35

SIT, NO.1

VCC

WP SCL SDA

1 2

R2210 4.7K_0402_5%R2210 4.7K_0402_5%

1 2

R2211 4.7K_0402_5%R2211 4.7K_0402_5%

1 2

C2211 100P_0402_50V8JC2211 100P_0402_50V8J

1 2

C2212 100P_0402_50V8JC2212 100P_0402_50V8J

R2219 0_0402_5%R2219 0_0402_5%

MAINPWON_R

R2228 0_0402_5%

8 7

ROM_WP

6 5

+3VALW

1 2

@

FCH_SCLK0 10,11,14,33

FCH_SDATA0 10,11,14,33

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

5

typ

V

AD_BID

0.503 V

0.819 V

SIT, NO.70

SIT, NO.69

EAPD 29

+5VS

R2216

R2216 10K_0402_5%

10K_0402_5%

1 2

EC_PME#

MAINPWON 37,38,40

+3VS

1

C2200

0.1U_0402_16V4Z

2

EC ENE-KB9012

LA-8121P

5

V

AD_BID

0 V0 V

0.289 V0.250 V0.216 V

0.538 V

0.875 V

100K_0402_1%

BRDID

33K_0402_5%

SIT, NO.73

31 50Monday, January 16, 2012

R2207

R2209

max

+3VALW

SDV SDV2 FVT SIT SVT

12

0.4

5

4

3

2

1

Fintek Thermal sensor

1

2

B

2

1

2

B

2

Close to DDR

C

Q2406

Q2406 MMST3904-7-F_SOT323-3

MMST3904-7-F_SOT323-3

E

3 1

Under VRAM

C

Q2407

DIS@

Q2407

DIS@

MMST3904-7-F_SOT323-3

E

3 1

Close U2402

C2439

2200P_0402_50V7K

D D

C2441

2200P_0402_50V7K

REMOTE1+

1

2

REMOTE1-

REMOTE2+

1

@

2

REMOTE2-

C2443

0.1U_0402_16V4Z

Placed near by APU_CORE

+3VS

U2402

1

VCC

REMOTE1+

2

REMOTE1-

REMOTE2+

1

REMOTE2-

2

DP1

3

DN1

4

DP2

5

DN2

F75303M_MSOP10

Address 1001_101xb

SCL

SDA

ALERT#

THERM#

GND

+3VS

12

R2434

R2434 10K_0402_5%

10K_0402_5%

@

10

9

8

7

6

EC_SMB_CK2 18,25,31,33,7

EC_SMB_DA2 18,25,31,33,7

REMOTE1+

@

C2440

100P_0402_50V8J

REMOTE1-

REMOTE2+

@

C2442

100P_0402_50V8J

REMOTE2-

REMOTE1,2+/-: Trace width/space:10/10 mil Trace length:<8"

C C

BT Connector

FAN1 Conn

SDV2, NO.33

R2467

10K_0402_5%

+3VS

12

R2468@

10K_0402_5%

2

+5VS

1 2

C2499 1U_0603_10V4ZC2499 1U_0603_10V4Z

40mil

1 2 3 4 5 6

ACES_50273-00401-001

Title

Size Document Number Rev

B

Date: Sheet of

JFAN1

1 2 3 4 G5 G6

CONN@

Compal Electronics, Inc.

Thermal/FAN/BT

LA-8121P

0.4

32 50Monday, January 16, 2012

1

0.4

JBT1

1

2

3

4

5

7

5

G1

6

8

6

G2

ACES_50224-00601-001

CONN@

B B

A A

5

SIT, NO.17

+3VS

BT_ON#13

+3VAUX_BT

R475

1 2

220K_0402_5%

USB20_P8 14 USB20_N8 14

Q30

Q30 AP2301GN-HF_SOT23-3

AP2301GN-HF_SOT23-3

3 1

2

SDV2, NO.78

4

+3VAUX_BT

C469 10U_0805_10V4ZC469 10U_0805_10V4Z

C468 0.1U_0402_16V4ZC468 0.1U_0402_16V4Z

12

@

R500

R500 470_0402_5%

470_0402_5%

13

@

D

Q42

2

G

2N7002K_SOT23-3

S

1

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/04/18 2015/07/08

3

EC_TACH31 EC_FAN_PWM31

Compal Secret Data

Deciphered Date

WLAN Conn

SIT, NO.61

SDV2, NO.12

WLAN_WAKE#31

WLBT_OFF#13,33 WLAN_CLKREQ#14

CLK_PCIE_WLAN#12 CLK_PCIE_WLAN12

PCIE_CRX_DTX_N15 PCIE_CRX_DTX_P15

PCIE_CTX_DRX_N15 PCIE_CTX_DRX_P15

+3VS_WLAN

EC_TX_P80_DATA31,35 EC_RX_P80_CLK31,35

WLBT_OFF#13,33

WLAN_WAKE#

WLAN_CLKREQ#

CLK_PCIE_WLAN# CLK_PCIE_WLAN

R2489 0_0402_5%R2489 0_0402_5% R2490 0_0402_5%R2490 0_0402_5%

PCIE_CTX_DRX_N1 PCIE_CTX_DRX_P1

EC_TX_P80_DATA EC_RX_P80_CLK

R2484 0_0402_5%R2484 0_0402_5%

1 2 1 2

1 2

For EC to detect debug card insert.

R24611K_0402_5% R24611K_0402_5%

1 2

1 2 1 2

PCI_RST#_R CLK_PCI_DB

PCIE_CRX_C_DTX_N1 PCIE_CRX_C_DTX_P1

R2432

100_0402_1%

100_0402_1% 100_0402_1%

100_0402_1%

R2433

R2441

100K_0402_5%

Mini Card Power Rating

RF_OFF#

1 2 1 2 1 2 1 2 1 2 1 2

Primary Power (mA)

NormalPeak

1000

330

500

R2495 0_0402_5%

R2495 0_0402_5% R2496 0_0402_5%R2496 0_0402_5%

1 2

@

1 2

750

250

375

LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0 APU_PCIE_RST#

Auxiliary Power (mA)

Normal

250 (wake enable)

5 (Not wake enable)

WL_OFF# 13 WL_OFF_EC# 31

LPC_FRAME# 12,31,35 LPC_AD3 12,31,35 LPC_AD2 12,31,35 LPC_AD1 12,31,35 LPC_AD0 12,31,35

CLK_PCI_DB 12,35

SIT, NO.57

AOAC_WLAN31

470K_0402_5%

Q2403

2N7002K_SOT23-3

@

R2493

@

2

+VSB

12

13

D

G

S

+3VALW

1

C2494

1U_0402_6.3V6K

@

R2492

1.5M_0402_5%

@

2

12

WLAN_EN

For AOAC assessment

+3VS_WLAN path:

1. +3VS (default)

2. +3VALW

3. +3VALW + Switch

1 2

R2494 @ 0_0805_5%R2494 @ 0_0805_5%

D

6

S

45 2 1

Q2400

Q2400 SI3456DDV-T1-GE3_TSOP6

SI3456DDV-T1-GE3_TSOP6

G

@

3

R2491

1 2

0_0402_5%

@

1

C2493

C2493 .1U_0603_25V7K

.1U_0603_25V7K

2

@

+3VS_WLAN

+1.5VS+3VS_WLAN+3VS

1

J2403@

1

JUMP_43X79

2

JMINI1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

GND1

GND2

12

BELLW_80003-7021

CONN@

2

2 4 6 8 10 12 14 16

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

LPC_FRAME#_R LPC_AD3_R LPC_AD2_R LPC_AD1_R LPC_AD0_R

SIT, NO.68

RF_OFF# APU_PCIE_RST#

FCH_SCLK0 FCH_SDATA0

USB20_N5 USB20_P5

Reserve for SW mini-pcie debug card. Series resistors closed to KBC side.

LPC_FRAME#_R LPC_AD3_R LPC_AD2_R LPC_AD1_R LPC_AD0_R PCI_RST#_R CLK_PCI_DB

+3VS

+3V

+1.5VS

SIT, NO.67

APU_PCIE_RST# 12,17,35

FCH_SCLK0 10,11,14,31 FCH_SDATA0 10,11,14,31

USB20_N5 14 USB20_P5 14

R2477 0_0402_5%R2477 0_0402_5% R2478 0_0402_5%R2478 0_0402_5% R2474 0_0402_5%R2474 0_0402_5% R2475 0_0402_5%R2475 0_0402_5% R2476 0_0402_5%R2476 0_0402_5% R2479 0_0402_5%R2479 0_0402_5%

Power

INT_KBD Conn.

KSI[0..7]

KSO[0..17]

KSO2

KSO15

KSO6

KSO8

KSO13

KSO12

KSO11

KSO10

KSO3

KSO4

KSI0

KSO0

CONN PIN define need double check

1 2

C2445 100P_0402_50V8J@C2445 100P_0402_50V8J@

1 2

C2448 100P_0402_50V8J@C2448 100P_0402_50V8J@

1 2

C2449 100P_0402_50V8J@C2449 100P_0402_50V8J@

1 2

C2451 100P_0402_50V8J@C2451 100P_0402_50V8J@

1 2

C2453 100P_0402_50V8J@C2453 100P_0402_50V8J@

1 2

C2455 100P_0402_50V8J@C2455 100P_0402_50V8J@

1 2

C2457 100P_0402_50V8J@C2457 100P_0402_50V8J@

1 2

C2459 100P_0402_50V8J@C2459 100P_0402_50V8J@

1 2

C2461 100P_0402_50V8J@C2461 100P_0402_50V8J@

1 2

C2463 100P_0402_50V8J@C2463 100P_0402_50V8J@

1 2

C2465 100P_0402_50V8J@C2465 100P_0402_50V8J@

1 2

C2467 100P_0402_50V8J@C2467 100P_0402_50V8J@

KSI[0..7] 31

KSO[0..17] 31

Screw Holes

H3

H4

H_4P0

H_2P3

H4

H_4P0

@

1

H10

H19

H_5P2X5P7N

@

1

H_4P0

H_3P3

H2

@

1

H22

@

1

Track Point Conn

C2470

TP_DATA2 TP_RESET MIDDLE RIGHT LEFT TP_CLK2

+5VS

1

2

JTP1

1

2

3

4

5

6

7

8

9

10

11

GND

12

GND

ACES_50524-0100N-001

CONN@

TP_CLK

TP_DATA

2

3

PJDLC05_SOT23-3

1

D2402

1 2

LEFT

C2490 100P_0402_50V8J@C2490 100P_0402_50V8J@

1 2

MIDDLE

C2491 100P_0402_50V8J@C2491 100P_0402_50V8J@

1 2

RIGHT

C2492 100P_0402_50V8J@C2492 100P_0402_50V8J@

1 2

KSO16

C2483 100P_0402_50V8J@C2483 100P_0402_50V8J@

1 2

KSO17

C2482 100P_0402_50V8J@C2482 100P_0402_50V8J@

1 2

KSO1

C2446 100P_0402_50V8J@C2446 100P_0402_50V8J@

1 2

KSO7

C2447 100P_0402_50V8J@C2447 100P_0402_50V8J@

1 2

KSI2

C2450 100P_0402_50V8J@C2450 100P_0402_50V8J@

1 2

KSO5

C2452 100P_0402_50V8J@C2452 100P_0402_50V8J@

1 2

KSI3

C2454 100P_0402_50V8J@C2454 100P_0402_50V8J@

1 2

KSO14

C2456 100P_0402_50V8J@C2456 100P_0402_50V8J@

1 2

KSI7

C2458 100P_0402_50V8J@C2458 100P_0402_50V8J@

1 2

KSI6

C2460 100P_0402_50V8J@C2460 100P_0402_50V8J@

1 2

KSI5

C2462 100P_0402_50V8J@C2462 100P_0402_50V8J@

1 2

KSI4

C2464 100P_0402_50V8J@C2464 100P_0402_50V8J@

1 2

KSO9

C2466 100P_0402_50V8J@C2466 100P_0402_50V8J@

1 2

KSI1

C2468 100P_0402_50V8J@C2468 100P_0402_50V8J@

H13

H8

H5

H_4P0

@

1

H23

H_5P2X5P7N

@

H7

H6

H_2P3

@

1

H20

H_2P1N

H_3P5X4P5N

@

1

H8

H9

H_2P3

@

1

H17

H24

H_3P5X4P5N

@

1

H12

H_2P3

H25

H_4P0N

H13

H_2P3

@

1

H11

H_4P0N

@

1

KSI1 KSI7 KSI6 KSO9 KSI4 KSI5 KSO0 KSI2 KSI3 KSO5 KSO1 KSI0 KSO2 KSO4 KSO7 KSO8 KSO6 KSO3 KSO12 KSO13 KSO14 KSO11 KSO10 KSO15

LEFT MIDDLE RIGHT KSO16 KSO17

H16

H15

H_2P3

@

1

H21

@

1

JKB1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

GND1

32

GND2

JAE_FL4S030HA3R3000A-DT

CONN@

FVT, No32

H14

H18

H_2P3

@

1

ZZZ3

0.1U_0402_16V4Z

SDV2, NO.4

TP_RESET31

SDV2, NO.73

ESD Request 2011.08.13

TP_CLK2

TP_DATA2

2

3

D2403

PJDLC05_SOT23-3

@

1

Click pad 10PIN

+5VS

SIT, NO.20

EC_SMB_CK218,25,31,32,7

EC_SMB_DA218,25,31,32,7

CP_RESET#31 TP_CLK31 TP_DATA31

C2489

@ C2489

@

100P_0402_50V8J

1 2

R2483 0_0402_5%

@

R2483 0_0402_5%

@

TP_DETECT TP_DATA2 TP_CLK2

1 2

R2485 0_0402_5%

@

R2485 0_0402_5%

@

CP_RESET# TP_CLK TP_DATA

1

C2488

@ C2488

@

100P_0402_50V8J

2

+5VS

1 2

R2473 4.7K_0402_5%@R2473 4.7K_0402_5%@

1 2

R2464 @ 4.7K_0402_5%R2464 @ 4.7K_0402_5%

1 2

R2470 @ 4.7K_0402_5%R2470 @ 4.7K_0402_5%

1 2

R2472 0_0402_5%R2472 0_0402_5%

1 2

R2471 100K_0402_1%R2471 100K_0402_1%

JCP1

1

2

3

4

5

6

7

8

9

GND

10

GND

ACES_51522-01001-001

CONN@

TP_CLK2

TP_DATA2

TP_RESET

TP_DETECT

CP_RESET#

11 12

Security Classification

FD2FD2

FD1FD1

1

FD3FD3

FD4FD4

LA-8124_PCB

1

LA-8124_PCB

DA80000R800

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

2011/04/18 2015/07/08

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

TP/KBD/Screw Hole/Debug

Size Document Num ber Rev

C

Date: Sheet of

LA-8124P

33 50Monday, January 16, 2012

0.4

5

4

3

2

1

USB3.0 Conn *3

For EMI request

L2400

USB30_FTX_DRX_P0

FVT, No.5

USB30_FTX_DRX_N014

D D

USB30_FTX_DRX_P014

USB30_FRX_DTX_N014

USB30_FRX_DTX_P014

USB30_P1014

USB30_N1014

C C

USB30_FTX_DRX_N114

USB30_FTX_DRX_P114

USB30_FRX_DTX_N114

USB30_FRX_DTX_P114

USB30_P1114

USB30_N1114

USB30_FTX_DRX_N0

USB30_FTX_DRX_P0

USB30_FRX_DTX_N0

USB30_P10

USB30_N10

USB30_FTX_DRX_N1

USB30_FTX_DRX_P1

USB30_FRX_DTX_N1

USB30_P11

USB30_N11

1 2

R2443

@R2443

@

1 2

R2442

@R2442

@

1 2

R2444

@R2444

@

1 2

R2445

@R2445

@

1 2

R2446

@R2446

@

1 2

R2447

@R2447

@

1 2

R2448

@ R2448

@

1 2

R2449

@ R2449

@

1 2

R2450

@ R2450

@

1 2

R2452

@ R2452

@

1 2

R2451

@ R2451

@

1 2

R2453

@ R2453

@

USB30_FTX_DRX_N0_L

0_0402_5%

USB30_FTX_DRX_P0_L

0_0402_5%

USB30_FRX_DTX_N0_L

0_0402_5%

USB30_FRX_DTX_P0_LUSB30_FRX_DTX_P0

0_0402_5%

USB30_P10_L

0_0402_5%

USB30_N10_L

0_0402_5%

USB30_FTX_DRX_N1_L

0_0402_5%

USB30_FTX_DRX_P1_L

0_0402_5%

USB30_FRX_DTX_N1_L

0_0402_5%

USB30_FRX_DTX_P1_LUSB30_FRX_DTX_P1

0_0402_5%

USB30_P11_L

0_0402_5%

USB30_N11_L

0_0402_5%

USB30_FTX_DRX_N0

USB30_FRX_DTX_N0 USB30_FRX_DTX_N0_L

USB30_P10

USB30_N10

USB30_FTX_DRX_N1

USB30_FTX_DRX_P1

USB30_FRX_DTX_P1 USB30_FRX_DTX_P1_L

USB30_P11

USB30_N11

1

4

WCM-2012HS-900T_4P

L2401

1

4

WCM-2012HS-900T_4P

L2402

1

4

WCM-2012-670T_4P

For EMI request

L2403

1

4

WCM-2012HS-900T_4P

L2404

1

4

WCM-2012HS-900T_4P

L2405

1

4

WCM-2012-670T_4P

2

USB30_FTX_DRX_P0_L

2

3

USB30_FTX_DRX_N0_L

3

2

USB30_FRX_DTX_P0_LUSB30_FRX_DTX_P0

2

3

2

3

2

USB30_FTX_DRX_N1_L

2

3

USB30_FTX_DRX_P1_L

3

2

USB30_FRX_DTX_N1_LUSB30_FRX_DTX_N1

2

3

2

3

USB30_P10_L

USB30_N10_L

USB30_P11_L

USB30_N11_L

D2404

USB30_FRX_DTX_N0_L USB30_FRX_DTX_N0_L

USB30_FRX_DTX_P0_L

USB30_FTX_DRX_N0_L

USB30_FTX_DRX_P0_L

USB30_FRX_DTX_N1_L

USB30_FRX_DTX_P1_L

USB30_FTX_DRX_P1_L

9

8

7

6

TVWDF1004AD0_DFN9

D2406

9

8

7

6

TVWDF1004AD0_DFN9

1

2

USB30_FRX_DTX_P0_L

4

USB30_FTX_DRX_N0_L

5

USB30_FTX_DRX_P0_L

3

C2475

0.1U_0402_16V4Z

1 2

USB_ON#31

1

USB30_FRX_DTX_N1_L

2

USB30_FRX_DTX_P1_L

4

USB30_FTX_DRX_N1_LUSB30_FTX_DRX_N1_L

5

USB30_FTX_DRX_P1_L

3

USB30_P10_L

USB_ON#

USB30_P11_L

D2405

3

I/O2

2

GND

1

I/O1

AZC099-04S.R7G_SOT23-6

U2404

1

GND

VOUT

2

VOUT7VIN

VIN3VOUT

4

FLG

EN

G547I2P81U_MSOP8

Low Active

D2407

3

I/O2

2

GND

1

I/O1

AZC099-04S.R7G_SOT23-6

+5VALW

+USB3_VCCA

2

C2476

0.1U_0402_16V4Z

1

C2473

+

2

470P_0402_50V7K

150U_B2_6.3VM_R35M

USB_OC0# 14

C2474

1

2

USB30_FTX_DRX_P0_L

USB30_FTX_DRX_N0_L USB30_P10_L

USB30_N10_L USB30_FRX_DTX_P0_L

USB30_FRX_DTX_N0_L

USB30_FTX_DRX_P1_L

USB30_FTX_DRX_N1_L USB30_P11_L

USB30_N11_L USB30_FRX_DTX_P1_L

USB30_FRX_DTX_N1_L

+USB3_VCCA

6

I/O4

5

VDD

4

USB30_N10_L

I/O3

+USB3_VCCA+5VALW

W=80mils

8

6

R2487

5

1 2

10K_0402_5%

6

I/O4

5

VDD

4

USB30_N11_L

I/O3

+USB3_VCCA

LP1

W=80mils

JUSB3

9

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND

2

D-

6

SSRX+

4

GND

5

SSRX-

ACON_TARA4-9K1311

CONN@

LP2

W=80mils

JUSB2

9

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND

2

D-

6

SSRX+

4

GND

5

SSRX-

ACON_TARA4-9K1311

CONN@

10

GND

11

GND

12

GND

13

GND

10

GND

11

GND

12

GND

13

GND

+USB3_VCCB+5VALW

U2405

C2477

0.1U_0402_16V4Z

For EMI request

L2406

1 2

USB30_FTX_DRX_N214

B B

USB30_FTX_DRX_P214

USB30_FRX_DTX_N214

USB30_FRX_DTX_P214

USB30_P1214

USB30_N1214

A A

USB30_FTX_DRX_N2

USB30_FRX_DTX_N2

USB30_FRX_DTX_P2 USB30_FRX_DTX_P2_L

USB30_P12

USB30_N12

5

R2454

@R2454

@

1 2

R2455

@R2455

@

1 2

R2457

@R2457

@

1 2

R2456

@R2456

@

1 2

R2458

@R2458

@

1 2

R2459

@R2459

@

USB30_FTX_DRX_N2_L

0_0402_5%

USB30_FRX_DTX_N2_L

0_0402_5%

USB30_P12_L

0_0402_5%

USB30_FTX_DRX_N2

USB30_FTX_DRX_P2

USB30_FRX_DTX_N2 USB30_FRX_DTX_N2_L

USB30_P12

USB30_N12

1

4

WCM-2012HS-900T_4P

L2407

1

4

WCM-2012HS-900T_4P

L2408

1

4

WCM-2012-670T_4P

4

2

USB30_FTX_DRX_N2_L

2

3

USB30_FTX_DRX_P2_LUSB30_FTX_DRX_P2 USB30_FTX_DRX_P2_L

3

2

3

USB30_FRX_DTX_P2_LUSB30_FRX_DTX_P2USB30_N12_L

3

2

3

USB30_P12_L

USB30_N12_L

USB30_FRX_DTX_N2_L

USB30_FRX_DTX_P2_L

USB30_FTX_DRX_N2_L

USB30_FTX_DRX_P2_L

D2408

9

8

7

6

TVWDF1004AD0_DFN9

3

1 2

1

USB30_FRX_DTX_N2_L

2

USB30_FRX_DTX_P2_L

4

USB30_FTX_DRX_N2_L

5

USB30_FTX_DRX_P2_L

3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

1

GND

VOUT

2

VOUT7VIN

VIN3VOUT

4

USB_ON#

EN

G547I2P81U_MSOP8

Low Active

3

USB30_P12_L

2

1

2011/04/18 2015/07/08

W=80mils

8

6

R2488

5

1 2

FLG

10K_0402_5%

D2409

I/O4

I/O2

VDD

GND

I/O3

I/O1

AZC099-04S.R7G_SOT23-6

Compal Secret Data

Deciphered Date

USB_OC1# 14

2

C2480

0.1U_0402_16V4Z

1

6

5

+5VALW

4

USB30_N12_L

2

+USB3_VCCB

1

C2479

C2478

1

+

2

470P_0402_50V7K

150U_B2_6.3VM_R35M

LP3

+USB3_VCCB

USB30_FTX_DRX_P2_L

USB30_FTX_DRX_N2_L USB30_P12_L

USB30_N12_L USB30_FRX_DTX_P2_L

USB30_FRX_DTX_N2_L

Compal Electronics, Inc.

Title

Size Document Num ber Rev

C

Date: Sheet of

W=80mils

JUSB1

9

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND

2

GND

D-

6

GND

SSRX+

4

GND

5

SSRX-

GND

ACON_TARA4-9K1311

CONN@

USB 3.0 Conn

LA-8121P

1

10 11 12 13

34 50Monday, January 16, 2012

0.4

5

4

3

2

1

ON/OFF switch

+3VLP

R2460

R2460 100K_0402_5%

100K_0402_5%

D2410

2

3

BAV70W_SOT 323-3

PCIE_CRX_DTX _N0 PCIE_CRX_DTX _P0

PCIE_CTX_DRX _N0 PCIE_CTX_DRX _P0

CLK_PCIE_LAN# CLK_PCIE_LAN LAN_CLKREQ# APU_PCIE_RST# LAN_WAKE# FCH_PCIE_W AKE# CLK_LAN_25MCLK_LA N_25M ACIN

1 2

ON/OFF

51_ON#

13

D

Q2408

2

G

2N7002K_SOT23-3

S

ON/OFF 31

51_ON# 37

SDV2, NO.32

JRJ45

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

GND

20

GND

ACES_50506-01841-P 01

CONN@

D D

J2405

1 2

ON/OFFBTN #

SHORT PAD S

EC_ON

EC_ON31,40

C C

Lan Conn

SDV2, NO.80

PCIE_CRX_DTX_N05 PCIE_CRX_DTX_P05

PCIE_CTX_DRX_N05 PCIE_CTX_DRX_P05

CLK_PCIE_LAN#12 CLK_PCIE_LAN12 LAN_CLKREQ#14

APU_PCIE_RST#12,17,33,35 LAN_WAKE#31 FCH_PCIE_WAKE#14 CLK_LAN_25M12

ACIN31,37

1 2

+3VS

+3VALW

+RTCBATT

1

R2463

R2463 10K_0402_5%

10K_0402_5%

ESD Request 2011.08.13

CLK_LAN_25M

B B

1 2

R2480 33_0402_5%R2480 33_0402_5%

2

C2500

C2500 22P_0402_50V8J

22P_0402_50V8J

1

Power Button Board Conn

+3VLP +3VALW

R2482

R2481

0_0402_5%

1 2

0_0402_5%

@

1 2

ON/OFFBTN #

LID_SW#

3

2

@

1

D2416

D2416 PJSOT24CH_S OT23-3

PJSOT24CH_S OT23-3

LID_SW#ON/OFF BTN#

0_0402_5%

FVT, NO.20 FVT, NO.55

LID_SW#3 1

SDV2, NO.98 SDV2, NO.14

ESD Request 2011.08.13

Finger Printer

+3VS

1

C2481

0.1U_0402_16V4Z

2

AZC199-02SPR 7G_SOT23-3

SDV2, NO.31

JPWR1

1

2

3

G1

3

4

G2

4

ACES_50504-0040N- 001

CONN@

USB20_N714 USB20_P714

For ESD

D2413

5 6

SDV2, NO.30

1

+3VS_FP

2

USB20_N7

3

USB20_P7

4

FP_GND

ACES_50504-0040N- 001

CONN@

223

3

1

CONN@

USB2.0/Audio Jack SB CONN

+5VALW

HP_OUTL29 HP_OUTR29

EXT_MIC29 PLUG_IN2 9

USB20_N014 USB20_P014

USB_OC3#14 AOU_EN31

AOU_CTL231 AOU_CTL331

SDV2, NO.68

JFPB1

1 2

5

G1

3

6

G2

4

JAUD1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

GND1

22

GND2

ACES_88194-2041

CONN@

Card Reader

SDV2, NO.3

+3VALW

PCIE_CRX_DTX _P3 PCIE_CRX_DTX _N3

CLK_PCIE_CARD CLK_PCIE_CARD #

PCIE_CTX_DRX _P3 PCIE_CTX_DRX _N3 CARD_CLKR EQ# APU_PCIE_RST#

PCIE_CRX_DTX_P35 PCIE_CRX_DTX_N35

CLK_PCIE_CARD12 CLK_PCIE_CARD#12

PCIE_CTX_DRX_P35 PCIE_CTX_DRX_N35

CARD_CLKREQ#14

APU_PCIE_RST#12,17,33,35

Logo_LED#2 6,31

A A

5

+3VS

SDV2, NO.34

JCARD1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

GND

16

GND

ACES_50224-0140N- 001

CONN@

4

Debug Conn.

SDV2, NO.25

+3VS +3VALW

LPC_FRAME#12,31,33 LPC_AD312,31,33 LPC_AD212,31,33 LPC_AD112,31,33 LPC_AD012,31,33

PLT_RST#1 2,31

CLK_PCI_DB12,33

EC_TX_P80_DATA31,33 EC_RX_P80_CLK31,33

PLT_RST#

CLK_PCI_DB

12P_0402_50V8J

3

JDB3

1

2

3

4

5

6

7

8

9

10

11

13

11

GND

12

14

12

GND

ACES_85201-1205N

CONN@

C2502

@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/04/18 2015 /07/08

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Numb er Rev

Custom

Date: Sheet of

Sub Board

LA-8121P

1

35 50Monday, January 16, 2012

0.4

A

+3VALW TO +3VS

+3VALW +3VS

U2302

R2308

10K_0402_5%

1

2 3

C2308

C2308 10U_0603_6.3V6M

10U_0603_6.3V6M

2

4

12

3VS_GATE_R3VS_GATE

1

C2311

C2311 .1U_0603_25V7K

.1U_0603_25V7K

2

12

13

D

S

R2303

R2303 470_0603_5%

470_0603_5%

@

2

G

@

Q2302

Q2302 2N7002K_SOT23-3

2N7002K_SOT23-3

8

1

7 6

C2307

5

10U_0603_6.3V6M

2

+VSB

AP4800BGM-HF_SO-8

FVT, No.3

2

G

12

R2304

R2304 470K_0402_5%

470K_0402_5%

13

D

Q2305

Q2305 2N7002K_SOT23-3

2N7002K_SOT23-3

S

1 1

SUSP

B

+5VALW TO +5VS

FVT, No.2

SUSP

1

C2304

C2304 10U_0603_6.3V6M

10U_0603_6.3V6M

2

+VSB

2

G

+5VALW

R2305

R2305 150K_0402_5%

150K_0402_5%

5VS_GATE

13

D

Q2304

Q2304 2N7002K_SOT23-3

2N7002K_SOT23-3

S

8 7 6 5

R2307

10K_0402_5%

U2301

AP4800BGM-HF_SO-8

4

12

5VS_GATE_R

+5VS

1 2 3

1

C2310

C2310 .1U_0603_25V7K

.1U_0603_25V7K

2

1

C2305

C2305 10U_0603_6.3V6M

10U_0603_6.3V6M

2

C

+1.5V to +1.5VS

12

R2302

R2302 470_0603_5%

470_0603_5%

@

13

D

2

SUSP

G

@

S

Q2300

Q2300 2N7002K_SOT23-3

2N7002K_SOT23-3

SUSP#

D

1

C2301

10U_0603_6.3V6M

2

+5VALW

12

100K_0402_5%

100K_0402_5% R2306

R2306

1.5VS_GATE 1.5VS_GATE_R

13

D

2

Q2306

G

2N7002K_SOT23-3

G

2N7002K_SOT23-3

S

+1.5V +1.5VS

3 1

AP2301GN-HF_SOT23-3

FVT, No.41

1 2

R2309

150K_0402_5%

2

Q2301

1

@

C2302

C2302 10U_0603_6.3V6M

10U_0603_6.3V6M

2

1

C2300

C2300 .1U_0603_25V7K

.1U_0603_25V7K

2

1

C2303

C2303 1U_0603_10V6K

1U_0603_10V6K

2

12

13

D

S

E

R2301

R2301 470_0603_5%

470_0603_5%

@

2

G

@

G

@

Q2303

Q2303 2N7002K_SOT23-3

2N7002K_SOT23-3

SUSP

+1.1VALW to +1.1VS

+1.1VALW +1.1VS

U2300

8

1

7 6

C2313

5

10U_0603_6.3V6M

2 2

FVT, No.4

SUSP

3 3

10U_0603_6.3V6M

2

+VSB

12

1.1VS_GATE 1.1VS_GATE_R

13

D

2

G

S

R2315

R2315 220K_0402_5%

220K_0402_5%

47K_0402_5%

Q2310

Q2310 2N7002K_SOT23-3

2N7002K_SOT23-3

AP4800BGM-HF_SO-8

R2316

1

2 3

C2314

C2314 10U_0603_6.3V6M

10U_0603_6.3V6M

2

4

12

1

2

C2316

C2316 1U_0603_25V6K

1U_0603_25V6K

1

C2315

C2315 1U_0603_10V6K

1U_0603_10V6K

2

2N7002K_SOT23-3@G

2N7002K_SOT23-3

@

Q2307

12

13

D

S

R2311

R2311 470_0603_5%

470_0603_5%

@

2

SUSP

G

SIT, No.77

+3VALW TO +3V +1.1VALW to +1.1V

SIT, No.89

FCH_PWR_EN_R

+0.75VS

12

R2319

R2319 470_0603_5%

470_0603_5%

@

13

D

G

S

+3VALW +3V

1

@

C2309

C2309 10U_0603_6.3V6M

10U_0603_6.3V6M

2

+5VALW

12

@

R2323

R2323 100K_0402_5%

100K_0402_5%

13

D

@

Q2313

2

G

2N7002K_SOT23-3

G

2N7002K_SOT23-3

S

@

Q2312

2

SUSP

2N7002K_SOT23-3

SIT, No.83

@

Q2318

S

G

2

SI2305CDS-T1-GE3_SOT23-3

@

12

3V_FCH_GATE_R3V_FCH_GATE

R2310

0_0402_5%

SUSP#31,39,42,44

D

13

SUSP43

SIT, No.43

1

@

C2321

C2321 10U_0603_6.3V6M

10U_0603_6.3V6M

2

1

2

SUSP

@

C2312

C2312 .1U_0603_25V7K

.1U_0603_25V7K

12

R2312

R2312 100K_0402_5%

100K_0402_5%

12

@

R2324

R2324 470_0603_5%

470_0603_5%

13

D

2

FCH_PWR_EN_R

G

@

S

Q2314

Q2314 2N7002K_SOT23-3

2N7002K_SOT23-3

+3V+3VALW

J2303 @

2

112

JUMP_43X79

+5VALW+RTCBATT

12

@

R2313

R2313 100K_0402_5%

100K_0402_5%

1

Q2308

OUT

DDTC124EKA-7-F_SC59-3

2

IN

GND

3

SIT, No.90

1

C2317

C2317 10U_0603_6.3V6M

10U_0603_6.3V6M

2

@

+5VALW

12

@

R2322

R2322 150K_0402_5%

150K_0402_5%

1.1V_FCH_GATE 1.1V_FCH_GATE_R

13

D

@

FCH_PWR_EN_R

2

G

@

Q2316

Q2316 2N7002K_SOT23-3

2N7002K_SOT23-3

S

+3VALW TO +3V_FCH

+1.1VALW +1.1V

SIT, No.83

S

SI2305CDS-T1-GE3_SOT23-3

@

R2317

0_0402_5%

@

Q2317

G

SIT, No.45

D

13

1

@

C2320

2

12

C2320 10U_0603_6.3V6M

10U_0603_6.3V6M

2

1

@

C2319

C2319 1U_0603_10V6K

1U_0603_10V6K

2

SIT, No.46SIT, No.44

+1.1VALW +1.1V

Short J2301 for PCH VCCSUS3.3

+3VALW +3V_FCH

J2301 @

2

112

JUMP_43X79

1

@

C2318

C2318 1U_0603_10V6K

1U_0603_10V6K

2

2N7002K_SOT23-3@G

2N7002K_SOT23-3

@

Q2309

J2302 @

112

JUMP_43X79

12

13

D

S

2

@

R2321

R2321 470_0603_5%

470_0603_5%

2

FCH_PWR_EN_R

G

SIT, No.59

12

FCH_PWR_EN31

4 4

A

B

R2325 0_0402_5%R2325 0_0402_5%

FCH_PWR_EN_R

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

C

2011/04/18 2015/07/08

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

DC V TO VS INTERFACE

Size Document Num ber Rev

C

Date: Sheet of

LA-8121P

E

36 50Monday, January 16, 2012

0.4

5

PR101

PR101 10K_0402_1%

10K_0402_1%

21

VINDE-2

PR117

PR117 10K_0402_5%

10K_0402_5%

APDIN1

3

2

1 2

PR102

PR102 270_0402_1%

270_0402_1%

1 2

PR109

PR109 1M_0402_1%

1M_0402_1%

1 2

VS

8

P

+

-

G

PU101A

PU101A LM393DG_SO8

LM393DG_SO8

4

12

51_ON#35

12

1

O

RTCVREF

BATT+

12

PC107

12

PC101

1000P_0402_50V7K

0.01U_0402_25V7K

PD101

LLZ4V3B_LL34-2

3.3V

CHGRTCP

12

PC102

0.1U_0402_16V7K

1 2

PL101

SMB3025500YA_2P

100P_0402_50V8J

PC104

VIN

12

PR111

2 1

PD105

LL4148_LL34-2

PR125

200_0603_5%

1 2

100K_0402_1%

PR129

22K_0402_1%

1 2

PC103

10K_0805_5%

PR128

680P_0603_50VK

12

+3VLP

+3VALW

JDCIN1

12

PC108

0.068U_0603_16V7K

JDCIN1

1

2

APDIN

2

3

4

5

ACES_50312-00541-001

@

VIN

12

VINDE-1

12

PR110

84.5K_0402_1%

PR113

PR113 22K_0402_1%

22K_0402_1%

1 2

PR114

20K_0402_1%

PF101

7A_24VDC_429007.W RML

VINDE-3

12

PC109

0.1U_0402_16V7K

D D

C C

B B

4

ADP_ID

AC Adapter 135W 90W 65W

ADP_ID 31

A/D

R(K ohm) 0 open 10 ADP_ID(V) 0 3.3 1.65

Detection voltage <0.33 >2.64 1.32~1.98

VIN

12

100P_0402_50V8J

PC106

PC105

1000P_0402_50V7K

VINBATT+

+3VLP

@

2

3

PD107

PD107 RB715F_SOT323-3

RB715F_SOT323-3

12

1

12

PR134

@

2

12

PR135

100K_0402_1%

PQ107A

2N7002KDW-2N_SOT363-6

100K_0402_1%

12

PR138

PR138 0_0402_5%

0_0402_5%

1 2

100K_0402_1%

61

@

5

PR136

100K_0402_1%

@

PR137

34

100K_0402_1%

PQ107B

PQ107B 2N7002KDW-2N_SOT36 3-6

2N7002KDW-2N_SOT36 3-6

12

PR116

10K_0402_5%

VIN

PD104

LL4148_LL34-2

1 2

51ON-1

12

PR124

12

PC115

0.1U_0603_25V7K

PR124 68_1206_5%

68_1206_5%

PR123

2

PR123

68_1206_5%

13

PQ101

TP0610K-T1-E3_SOT23-3

51ON-2

12

PC114

1 2

0.22U_0603_25V7K

51ON-3

3

PR112

PR112 10K_0402_1%

10K_0402_1%

1 2

PACIN

ACIN 31,35

PACIN 37,39

Vin Detector

Min. typ. Max. L-->H 17.430V 17.901V 18.384V H-->L 16.976V 17.262V 17.728V

MAINPWON31,38,40

ACON39

PRECHG39,40

VS

PR122

PR122 200K_0402_1%

200K_0402_1%

PD103

RB715F_SOT323-3

2

3

12

PR119

1

2

PR103

PR103 1K_1206_5%

1K_1206_5%

1 2

PR104

PR104 1K_1206_5%

1K_1206_5%

1 2

PR105

PR105 1K_1206_5%

1K_1206_5%

1 2

ACOFF31,39

VL

12

100K_0402_1%

PC111

0.1U_0603_25V7K

Precharge detector

15.97V/14.84V FOR ADAPTOR

PD102

LL4148_LL34-2

PU101B

LM393DG_SO8

7

O

12

PR126

10K_0402_5%

RTCVREF

2

PR115

4.99M_0402_5%

VS

8

P

+

-

G

4

12

PQ103

PC110

5

6

12

1

PQ102

TP0610K-T1-E3_SOT23-3

13

12

PR106

PR107

100K_0402_1%

13

LTC015EUBFS8TL_SOT323-3

2

12

PR108

100K_0402_1%

PQ104

13

2

LTC015EUBFS8TL_SOT323-3

B+

12

0.01U_0402_25V7K

12

PC112

1000P_0402_50V7K

12

PR120

61.9K_0402_1%

PRG++

13

D

2

G

PQ105

S

2N7002W-T/R7_SOT323-3

13

PR118

150K_0402_1%

12

PR121

887K_0402_1%

PR127

47K_0402_5%

12

PQ106

LTC015EUBFS8TL_SOT323-3

2

12

PACIN37,39

+5VALW

PC113

0.01U_0402_25V7K

+CHGRTC

PR132

PD106

5

1 2

RB751V-40_SOD323-2

+RTCBATT

A A

PR132

560_0603_5%

1 2

RTCVREF

PR133

560_0603_5%

1 2

3.3V

12

PC116

PC116 10U_0603_6.3V6M

10U_0603_6.3V6M

PU102

BIT3021A-ST9 SOT89 3P

3

VOUT

VIN

GND

1

4

2

CHGRTCIN

12

PR131

PR131 200_0603_5%

200_0603_5%

12

PC117

PC117 1U_0805_25V6K

1U_0805_25V6K

ACIN

Precharge detector

Min. typ. Max. L-->H 14.991V 15.381V 15.782V H-->L 13.860V 14.247V 14.621V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/04/18 2015/07/08

Compal Secret Data

Deciphered Date

2

BATT ONLY

Precharge detector

Min. typ. Max. L-->H 7.196V 7.349V 7.505V H-->L 6.138V 6.214V 6.056V

Compal Electronics, Inc.

Title

PWR DCIN / Vin Detector /Pre-charge

Size Docum ent Number Rev

Custom

C38-G series Chief River Schematic

Date: Sheet of

37 48Monday, January 16, 2012

1

0.1

5

4

3

2

1

VMB2

JBATT1

1

2

3

3 4

D D

5 6

7 GND GND

SUYIN_200082GR007M211 ZR

@

EC_SMCA

4

EC_SMDA

5 6 7 8 9

12

PR201

100_0402_1%

PR201

100_0402_1%

PR202

100_0402_1%

PR202

100_0402_1%

PF201

PF201 12A_65V_451012MRL

12A_65V_451012MRL

21

VMB

SMB3025500YA_2P

12

PC201

PC201 1000P_0402_50V7K

1000P_0402_50V7K

PL201

1 2

BATT+

12

PC202

0.01U_0402_25V7K

PH1 under CPU botten side : CPU thermal protection at 93 +-3 degree C Recovery at 56 +-3 degree C

For KB930 --> Keep PU201 circuit (Vth = 1.25V)

For KB9012 (Red square) --> Remove PU201 circuit, but keep PR206 PH201

EC_SMB_CK1 31,39

EC_SMB_DA1 31,39

1 2

PR203

6.49K_0402_1%

1 2

PR204

PR204 10K_0402_5%

10K_0402_5%

C C

+3VALW

BATT_TEMP 31

A/D

PC203

0.1U_0603_25V7K

VL

12

+3VS

H_PROCHOT#45,7

VS

VMB2

PR216

@

768K_0402_1%

PR217

10K_0402_1%

1 2

B B

A A

@

PR219

PR219 221K_0402_1%

221K_0402_1%

1 2

@

12

PC207

0.01U_0402_25V7K

8

3

+

2

-

4

@

PR221

PR221 10K_0402_1%

10K_0402_1%

@

10M_0402_5%

P

O

G

PU202A

LM393DG_SO8

12

PR222

1 2

1

2VREF_8205

@PR222

@

BATT_LEN#31

+3VLP

PR218

@ PR2 18

@

100K_0402_1%

1 2

2N7002KW_SOT323- 3

PQ203

2

G

+3VLP

@

PR223

@ PR223

@

100K_0402_1%

1 2

+3VALW

PR220

@ PR220

@

100K_0402_1%

1 2

13

D

S

2

G

PQ204

13

D

2N7002KW_SOT323- 3

S

@

H_PROCHOT#_EC31,7

BATT_OUT 39

SPOK40,41

VSB_ON31

100K_0402_1%

PQ206

13

D

2

G

SSM3K7002FU_SC70-3

S

1 2

VL

PR213

1 2

PR227

1 2

ADP_OCP_1

PR226

PR226 0_0402_5%

0_0402_5%

@

PR212

PR212 1K_0402_5%

1K_0402_5%

PR233

PR233 0_0402_5%

0_0402_5%

@

100K_0402_1%

12

PU201

1

2

3

4

G718TM1U_SOT23-8

2

G

PC206

1U_0402_6.3V6K

ADP_I31, 39

VCC

TMSNS1

GND

RHYST1

OT1

TMSNS2

RHYST2

OT2

10K_0402_1%

B+

PR215

22K_0402_1%

1 2

13

D

PQ201

2N7002W-T/R7_SOT32 3-3

S

PR224

4.42K_0402_1%

8

7

6

5

PR209

1 2

12

PR214

100K_0402_1%

PQ205

1 2

PR208

1 2

27.4K_0402_1%

12

PC204

0.22U_0603_25V7K

PR225

2.1K_0402_1%

1 2

13

D

2

G

S

ADP_PROTECT31

2N7002W-T/R7_SOT323-3

12

PH201

100K_0402_1%_TSM0B104F4251RZ

12

PR230

PR230 0_0402_5%

0_0402_5%

PQ202

TP0610K-T1-E3_SOT23-3

2

Turbo_V31

12

13

PR205

21.5K_0402_1%

PR228

PR228 0_0402_5%

0_0402_5%

@

12

0.1U_0603_25V7K

PC205

+VSBP

+3VLP

PR229

1 2

+VSBP

+3VLP

12

@

PR207

10K_0402_1%

1 2

@

100K_0402_1%

PR206

12.7K_0402_1%

PR232

0_0402_5%

PR211

0_0402_5%

1 2

PJ201

PJ201 JUMP_43X39@

JUMP_43X39@

112

+3VALW

+3VLP

PR231

PR234

1 2

PR234

1 2

47K_0402_1%

MAINPWON 31,37,40

+VSB

9012_PH1 31

@PR211

@

47K_0402_1%

@

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/04/18 2015/07/08

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

PWR-BATTERY CONN/OTP

Size Docum ent Number Rev

Custom

C38-G series Chief River Schematic

Date: Sheet of

2

Date: Sheet of

38 48Monday, January 16, 2012

1

0.1

5

PQ301

PQ301 AO4407A_SO8

AO4407A_SO8

DTA144EUA_SC70-3

47K_0402_5%

PQ307

13

2

PQ310A

PACIN

PR321

1 2

10K_0402_5%

2

G

8 7

5

PQ305

2

PR317

47K_0402_1%

1 2

ACOFF-1

12

13

D

S

1 3

LTC015EUBFS8TL_UMT3F

PQ313

2

PR332

PR332 0_0402_5%

0_0402_5%

@

PQ318

@

4

2N7002KW 1N SOT323-3

VIN

D D

C C

B B

2

PACIN37

ACON37

ACOFF31,37

BATT_OUT38,39

12

PR301

61

2N7002KDW-2N_SOT363-6

P2

1 2 36

12

PR306

PC301

0.1U_0603_25V7K

P2-1

12

P2-2

34

PQ310B

5

13

LTC015EUBFS8TL_UMT3F

AO4423_SO8

1 2 3 6

200K_0402_1%

12

PR330

@ PR33 0

@

20K_0402_1%

13

D

2

G

S

PQ317

2N7002KW_SOT323-3

PR309

@

150K_0402_1%

1 2

64.9K_0603_1%

1 2

0.1U_0603_25V7K

2N7002KDW-2N_SOT363-6

EC_SMB_DA131,38

EC_SMB_CK131,38

PQ304

4

5600P_0402_25V7K

PR319

PC324

PR314

CHGVADJ=(Vcell-4)/0.10627

Vcell

4V

4.2V

4.35V

CC=0.25A~3A

IREF=1.016*Icharge

IREF=0.254V~3.048V

VCHLIM need over 95mV

A A

CHGVADJ

0V

1.882V

3.2935V

P2

12

PR328

100K_0402_1%

PQ315 TP0610K-T1-E3_SOT23-3PQ315 TP0610K-T1-E3_SOT23-3

2

4

P3

8 7

5

1UH_PCMB061H-1R0MS_7A _20%

1 2

PC302

BATT_OUT 38,39

VIN

12

PR315

@

432K_0603_1%

@PC324

@

PR333

PR333 0_0402_5%

0_0402_5%

1 2

PR334

PR334 0_0402_5%

0_0402_5%

1 2

+3VALW

13

PR329

12

100K_0402_1%

SH00000AA00

1 2

PL302

1 2

PC303

10U_0805_25V6K@

+3VALW

@

PR316

10K_0402_5%

1 2

ADP_I31,38

PC313

1 2

0.1u_0603_50V8

PR322

1 2

316K_0402_1%

PR325

100K_0402_1%

BM#31,40

BQ24727VCC

13

2

LTC015EUBFS8TL_UMT3F

LTC015EUBFS8TL_UMT3F PQ316

PQ316

0.01_1206_1%

1

2

1 2

PC304

6

ACDET

7

IOUT

8

SDA

9

SCL

10

12

ILIM

PR335

PR335 0_0402_5%

0_0402_5%

12

@

PD304

RB715F_SOT323-3

1

B+

PR302

4

3

10U_0805_25V6K@

ACP

PC309

1 2

5

3

4

ACOK

CMPIN

CMPOUT

PU301

BQ24737RGRR_VQFN20_3P5X3P5

SA000051W00

SRN12BM

SRP

11

13 12

12

PR326

PR327

6.8_0603_5%

12

PC320

0.1U_0603_25V7K

@

PR331

10K_0402_1%

+3VS

2

FSTCHG

3

SUSP#

12

PC321

0.1U_0603_25V7K

FSTCHG 31

SUSP# 31,36,42,44

3

Need EC write ChargeOption() bit[8]=1

1

+

PC323

100U_25V_M

2

ACN

0.1U_0603_25V7K

PC312

0.1U_0603_25V7K

12

1

2

ACP

GND

15

14

10_0603_5%

PC310

12

0.1U_0603_25V7K

ACN

21

TP

20

VCC

19

PHASE

18

HIDRV

17

BTST

16

REGN

LODRV

DL_CHG

12

@

PC322

0.1U_0603_25V7K

1 2

PC305

BQ24727VCC-1

LX_CHG

DH_CHG

BST_CHG

12

PC318

PC318 1U_0603_25V6

1U_0603_25V6

1 2

PC306

4.7U_0805_25V6-K

PR318

PD303

12

RB751V-40_SOD323-2

1 2

PC307

4.7U_0805_25V6-K

BQ24727VCC

10_1206_5%

1 2

PC314

1 2

1U_0603_25V6

PR324

2.2_0603_5%

1 2

PC308

1 2

2200P_0402_50V7K

PC315

0.047U_0603_25V7M

2

PQ302

AO4407A_SO8

1 2 3 6

B+

1 2

PR307

10K_0402_1%

DISCHG_G-1

13

LTC015EUBFS8TL_UMT3F

LTC015EUBFS8TL_UMT3F PQ308

PQ308

6

578

PQ312

6

578

PQ312

AO4466L_SO8

123

PQ314

AO4466L_SO8

123

4

12

4

8 7

5

4

VIN

PR305

47K_0402_1%

1 2

ACOFF

PD301

1SS355_SOD323-2

1 2

2

PD302

PD302 1SS355_SOD323-2

1SS355_SOD323-2

PC311

0.1U_0603_25V7K

PL301

@

PR323

4.7_1206_5%

PC319

680P_0603_50V7K

PL301

1 2

10UH_+-20%_PCMB104T-100MS_6A

12

24727_SN

12

PR308

PR308 200K_0402_1%

200K_0402_1%

1 2

13

12

D

S

2N7002W-T/R7_SOT323-3

1

CHGCHG

2

PACIN

G

PQ311

PR320

0.01_1206_1%

SRP

SRN

8 7

5

4

3

1

PQ303

AO4407A_SO8

4

12

PR304

49.9K_0402_1%

D

S

12

PC316

10U_0805_25V6K

1 2 36

1 2

PR303

PR303 499K_0402_1%

499K_0402_1%

2

13

2

G

PQ309

2N7002KW_SOT323-3

12

PC317

10U_0805_25V6K

BATT+

PQ306

1 3

PRECHG 37,40

BA+

DTA144EUA_SC70-3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

2015/07/082011/04/18

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

CHARGER

C38-G series Chief River Schematic

39 48Monday, January 16, 2012

1

0.1

5

Note: Use TPS51125 IC can remove RTC refernece LDO Use TPS51427 IC must keep RTC refernece LDO

4

3

2

1

2VREF_8205

+3VALWP +3VALW

D D

PR401

13K_0402_1%

1 2

RT8205_B+

PJ401

B+

C C

B B

A A

PJ401

2

112

JUMP_43X118@

12

PC401

0.1U_0603_25V7K

EC_ON31,35

MAINPWON31,37,38

PR419

BM#31,39

0_0402_5%

12

PC421

0.1U_0603_25V7K

1 2

5

12

PC403

4.7U_0805_25V6-K

+3VALWP

47K_0402_1%

+3VLP

PR420

PR420 100K_0402_1%

100K_0402_1%

12

PC404

PC423

PR418

PR414

PR414 0_0402_5%

0_0402_5%

PC424

0.1U_0603_10V7K

12

4.7U_0805_25V6-K

12

1U_0603_10V6K

2

G

12

PC405

2200P_0402_50V7K

4.7UH +-20% PCMC063T-4R7MN 5.5A

1 2

1

+

PC413

PC413 150U_B2_6.3VM_R45M

150U_B2_6.3VM_R45M

2

PQ405A

VS

13

D

S

PQ405A

VL

1 2

PR415

100K_0402_1%

@

PQ407

2N7002KW 1N SOT323-3

2N7002KDW-2N_SOT363-6

12

AO4466L_SO8

PL401

61

12

PR416

@

PQ401

12

PR409

4.7_1206_5%

12

PC415

680P_0603_50V7K

2

100K_0402_1%

12

40.2K_0402_1%

PR413

PC420

123

2

1U_0603_10V6K

241

12

PQ406

6

3 6

+3VLP

PRECHG37,39

578

4

578

PQ403

PQ403 AO4712L_SO8

AO4712L_SO8

13

4

FDV301N_G_1N_SOT23-3

PQ408

S

@

PC425

34

5

LTC015EUBFS8TL_UMT3F

Typ: 175mA

+3VLPP

D

13

G

2

12

PC410

0.1U_0402_16V7K

PC410

1 2

PC411

0.1U_0603_25V7K

499K_0402_1%

1 2

VS

499K_0402_1%@

1 2

B+

ENTRIP2ENTRIP1

PQ405B

PQ405B 2N7002KDW-2N_SOT363-6

2N7002KDW-2N_SOT363-6

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4.7U_0805_10V6K

2.2_0603_5%

1 2

PR417

PR411

Issued Date

PR412

PR407

100K_0402_1%

12

PR403

20K_0402_1%

1 2

PR405

130K_0402_1%

1 2

25

7

8

9

BST_3V

10

UG_3V

11

LX_3V

12

LG_3V

12

PC417

1U_0603_10V6K

2VREF_8205

PU401

P PAD

VO2

VREG3

BOOT2

UGATE2

PHASE2

LGATE2

3

12

PC402

1U_0603_10V6K

PR402

30K_0402_1%

1 2

PR404

20K_0402_1%

1 2

PR406

66.5K_0402_1%

ENTRIP2

4

5

6

FB2

TONSEL

ENTRIP2

VFB=2.0V

SKIPSEL

EN

14

15

13

RT8205_B+

2011/04/18 2015/07/08

1 2

ENTRIP1

2

3

1

FB1

REF

ENTRIP1

VO1

PGOOD

BOOT1

UGATE1

PHASE1

LGATE1

NC18VREG5

VIN16GND

17

12

Typ: 175mA

PC418

12

4.7U_0805_10V6K

PC419

0.1U_0603_25V7K

Compal Secret Data

Deciphered Date

24

23

22

BST_5V

21

UG_5V

20

LX_5V

19

LG_5V

RT8205LZQW(2) WQFN24_4X4

VL

12

PC406

4.7U_0805_25V6-K

PR408

2.2_0603_5%

1 2

RT8205_B+

PC407

4.7U_0805_25V6-K

SPOK 38,41

PC412

0.1U_0603_25V7K

1 2

2

+5VALWP +5VALW

12

PC409

PC408

0.1U_0603_25V7K

2200P_0402_50V7K

PQ402

5

PQ404TPC8A03-H_SO8 PQ404TPC8A03-H_SO8

4

+3.3VALWP OCP(min)=5.81A +5VALWP OCP(min)=8.44A

Compal Electronics, Inc.

Title

3VALWP/5VALWP

Size Document Number Rev

Custom

C38-G series Chief River Schematic

Date: Sheet of

PJ402

2

112

JUMP_43X118@

PJ403

2

112

JUMP_43X118@

678

TPC8037-H_SO8

35241

PL402

4.7UH_20%_VMPI1004AR-4R7M-Z01_10A

1 2

12

786

PR410

4.7_1206_5%

12

123

PC416

680P_0603_50V7K

+5VALWP

1

+

PC414

12

150U_B2_6.3VM_R45M

2

PC422

1U_0603_10V6K

0.1

40 48Monday, January 16, 2012

1

0.1

5

4

3

+1.1VALWP_B+

2

PJ501

@ PJ501

@

2

112

JUMP_43X118

B+

1

12

D D

PR502

2.2_0603_5%

PU501

1

PR501

1 2

12

0.1U_0402_16V7K

1 2

PR510

1 2

12

@

0.1U_0402_16V7K

1 2

TRIP_+1.1VALWP

EN_+1.1VALWP

FB_+1.1VALWP

RF_+1.1VALWP

12

470K_0402_1%

PR508

PR508 10K_0402_1%

10K_0402_1%

TRIP_+1.5VP

EN_+1.5VP

FB_+1.5VP

RF_+1.5VP

12

470K_0402_1%

PR516

PR516 10K_0402_1%

10K_0402_1%

PR506

PR514

34K_0402_1%

PR503

0_0402_5%

1 2

SPOK38,40

@

C C

B B

SYSON31,43

A A

PR511

0_0402_5%

1 2

34K_0402_1%

@

PR504

PC501

1 2

47K_0402_1%

140K_0402_1%

PR512

PC515

1 2

47K_0402_1%

@

2

3

4

5

PR507

5.76K_0402_1%

1

2

3

4

5

PR515

11.5K_0402_1%

PGOOD

TRIP

EN

VFB

RF

TPS51212DSCR_SON10_3X3

12

PU502

PGOOD

TRIP

EN

VFB

RF

TPS51212DSCR_SON10_3X3

12

VBST

DRVH

V5IN

DRVL

VBST

DRVH

V5IN

DRVL

10

BST_+1.1VALWP

9

UG_+1.1VALWP

8

7

6

11

10

9

8

7

6

11

SW_+1.1VALWP

+1.1VALWP_5V

LG_+1.1VALWP

BST_+1.5VP

UG_+1.5VP

SW_+1.5VP

+1.5VP_5V

LG_+1.5VP

SW

TP

SW

TP

1 2

PR509

2.2_0603_5%

1 2

0.1U_0603_25V7K

12

PC507

PC507 1U_0603_6.3V6M

1U_0603_6.3V6M

0.1U_0603_25V7K

12

PC516

PC516 1U_0603_6.3V6M

1U_0603_6.3V6M

PC506

1 2

+5VALW

PC514

1 2

+5VALW

786

5

PQ501

5

123

786

123

786

123

786

123

PQ501 TPC8037-H 1N SO8

TPC8037-H 1N SO8

PQ502

PQ502 TPC8A03_SO8

TPC8A03_SO8

+1.5VP_B+

PQ503

PQ503 TPC8037-H 1N SO8

TPC8037-H 1N SO8

PQ504

PQ504 TPC8A03_SO8

TPC8A03_SO8

4

PC502

0.1U_0402_25V6

PL501

1UH +-20%_VMPI0703AR-1R0M-Z01_ 11A

1 2

12

@

PR505

4.7_1206_5%

12

PC509

@PC50 9

@

680P_0603_50V7K

12

PC510

0.1U_0402_25V6

PL502

PR513

PC518

PL502

1 2

1.0UH_PCMC104T-1R0MN_20A_20%

12

@

4.7_1206_5%

12

@PC51 8

@

680P_0603_50V7K

12

PC503

2200P_0402_50V7K

12

PC504

PC505

4.7U_0805_25V6-K

PJ502

2

112

JUMP_43X118@

+1.1VALW+1.1VALWP

+1.1VALWP

B+

+1.1VALWP Iocp=5.85A

1

12

+

PC519

PC508

2

1U_0603_10V6K

220U_D2_4VY_R15M

PJ503

@ PJ503

@

2

112

JUMP_43X118

12

PC511

2200P_0402_50V7K

PC513

PC512

4.7U_0805_25V6-K

+1.5VP

1

12

+

PC517

PC520

2

220U_6.3V_M

1U_0603_10V6K

+1.5VP

PJ504

2

112

JUMP_43X118@

+1.5VP Iocp=15.6A

+1.5V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/04/18

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

+1.1VALWP/+1.5VP

41 48Mon day, January 16, 2012

1

0.1

5

D D

VR_ON31, 45

PR610 0_0402_ 5%

12

@

PR603

SUSP#31 ,36,39,44

243K_0402_1%

1 2

PR604

47K_0402_1%

@

C C

PR601

1 2

75K_0402_1%

PC601

1 2

TRIP_+1.2VSP

EN_+1.2VSP

FB_+1.2VSP

1U_0402_16V7K

1 2

RF_+1.2VSP

12

470K_0402_1%

PR608

PR608 10K_0402_1%

10K_0402_1%

PR606

PR607

7.15K_0402_1%

12

4

PU601

1

VBST

PGOOD

2

TRIP

DRVH

3

EN

4

5

SW

V5IN

VFB

DRVL

RF

TPS51212DSCR_SON10_3X 3

TP

12

10

9

8

7

6

11

BST_+1.2VSP

UG_+1.2VSP

SW_+1.2V SP

+1.2VSP_5V

LG_+1.2VSP

PR602

2.2_0603_5%

1 2

0.1U_0603_25V7K

12

PC607

PC607 1U_0603_6.3V6M

1U_0603_6.3V6M

3

PC606

1 2

+5VALW

2

PJ601

@ PJ601

@

+1.2VSP_B+

12

PC603

786

5

PQ601

5

123

786

123

PQ601 TPC8037-H 1N SO8

TPC8037-H 1N SO8

PQ602

PQ602 TPC8A03_SO8

TPC8A03_SO8

1UH +-20%_VMPI0703AR -1R0M-Z01_11A

12

PR605

4.7_1206_5%

12

PC609

680P_0603_50V7K

4

PC603

PC602

0.1U_0402_25V6

PL601

1 2

2200P_0402_50V7K

12

PC604

4.7U_0805_25V6-K

2

112

JUMP_43X118

PC605

4.7U_0805_25V6-K

+1.2VSP

1

12

+

PC612

PC608

2

1U_0603_10V6K

220U_D2_4VY_R15M

+1.2VSP

B+

PJ602

2

JUMP_43X118@

+1.2VSP Iocp=13A

1

112

+1.2VS

B B

PU602

APL5508-25DC-TRL_SO T89-3

PJ603

+3VS

A A

5

4

2

112

JUMP_43X39@

PC610

1U_0603_10V6K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

APL5508-25DC-TRL_SO T89-3

2

12

2011/04/18

3

IN

GND

1

3

OUT

12

PC611

4.7U_0805_6.3V6K

Compal Secret Data

Deciphered Date

12

PR609

PR609 10K_1206_5%

10K_1206_5%

@

+2.5VSP

2

PJ604

2

112

JUMP_43X39@

(0.38A,20mils ,Via NO.=1)

Title

Size Document Number Rev

Date: Sheet of

JUMP_43X39@

Compal Electronics, Inc.

+1.2VSP/+2.5VSP

+2.5VS+2.5VSP

42 48Monday, January 16, 2012

1

0.1

5

4

3

2

1

+1.5V

D D

PR701

@ PR701

@

0_0402_5%

SYSON31,41

SUSP36

C C

1 2

PR703

0_0402_5%

1 2

PC701

@PC70 1

@

1U_0402_6.3V6K

PQ701

PQ701 2N7002KW 1N SOT323-3

2N7002KW 1N SOT323-3

2

G

12

13

D

S

2

PJ701

2

JUMP_43X79

@

1

PC702

4.7U_0805_6.3V6K

PR702

1 2

1K_0402_1%

PR704

PU701

VIN1VCNTL

2

12

PC704

1K_0402_1%

0.1U_0402_16V7K

GND

3

VREF

4

VOUT

APL5336KAI-TRL_SOP8P8

12

PC706

PC705

10U_0603_6.3V6M

6

5

NC

7

NC

8

NC

9

TP

+0.75VSP

12

+3VALW

PC703

1U_0603_10V6K

PJ702

2

JUMP_43X79

@

112

+0.75VS+0.75VSP

PL701

PU702

PJ703

+5VALW

B B

A A

2

112

JUMP_43X118@

PXS_PWREN

5

PR707

12

PC707

PC707 22U_0805_6.3VAM

22U_0805_6.3VAM

1 2

200K_0402_1%

EN_1.8V

1M_0402_5%

PR708

1 2

PC712

1 2

4

10

PVIN

9

PVIN

8

SVIN

5

EN

0.047U_0402_16V7-K

2

LX

PG

3

LX

6

FB

TP

NC

7

1

11

SY8033BDBC_DFN10_3X3

4

LX_1.8V

FB=0.6Volt

PL701

1UH_PH041H-1R0MS_3.8A_20%

1 2

12

PR706

30K_0402_1%

PR705

4.7_1206_5%

12

PC709

680P_0603_50V7K

FB_1.8V

PR709

14.7K_0402_1%

12

PC708

68P_0402_50V8J

12

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

12

PC710

22U_0805_6.3VAM

2011/04/18

+1.8VSP

PC711

22U_0805_6.3VAM

Compal Secret Data

Deciphered Date

2

+1.8VSP +1.8VGS

PJ704

2

112

JUMP_43X118@

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

+0.75VP/+1.8VP

43 48Mon day, January 16, 2012

1

0.1

5

D D

12

PR805

11K_0402_1%

PR809

11K_0402_1%

PC818

0.1U_0402_16V7K

1 2

10P_0402_25V8J

1 2

PR807

1 2

5.62K_0402_1%

1 2 12

PR810

93.1K_0402_1%

+3VS

12

PR811

PR801

0_0402_5%

PR813

PR813 47K_0402_5%

47K_0402_5%

1 2

PR814

PR814 0_0402_5%

0_0402_5%

1 2

@

1 2

PR804

100K_0402_1%

PR812

0_0402_5%

1 2

VRON_VGA

VSSSENSE_VGA21

Thames must change PR807 from

5.62k to 11k. Change PR809 from 11k to 5.49k.

C C

VGA_PWRGD14,19

PX_MODE19

SUSP#31,36,39,42

10P_0402_25V8J

PC801

1

2

3

4

5

10K_0402_1%

PC806

PU801

GSNS

V3

V2

V1

V0

VCCSENSE_VGA21

12

21

12

4

12

PR802

PR802 0_0402_5%

0_0402_5%

PR803

41.2K_0402_1%

1 2

PC807

19

18

20

4700P_0402_25V7K

PAD

TPS51518RUKR_QFN20_3X3

VREF

6

PC817

TRIP

VSNS

SLEW

VID08PGOOD

VID19EN

7

0.1U_0402_10V7K

18

GPU_VID0

3

5

4

16

17

GND

MODE

15

V5IN

14

DRVL

13

DRVH

12

SW

11

BST

10

18

GPU_VID1

2.2_0603_5%

1

0

12

1U_0603_10V6K

PR808

GPU_VID0

1

0

1

0

PC808

12

+5VALW

UGATE2_VGA

BOOT2_2_VGABOOT2_VGA

LGATE2_VGA

Core Voltage L evelGPU_VID1

PC816

0.1U_0603_25V7K

1 2

Seymour

0.9V

1.0V

1.05V

1.15V

4

GPU_VID1

1

0

123

123 5

GPU_VID0

1

0

1

0

PQ801

TPCA8065-H_SOP-ADV8-5

4

PQ802

TPCA8057-H 1N PPAK56-8

Core Voltage L evel

VGA_CORE_B+

123 5

Thames

0.9V

1.0V

1.1V

1.15V

2

12

PC802

0.1U_0402_25V6

0.36UH_PCMC104T-R36MN1R1 7_30A_20%

12

@ PR80 6

@

PQ803

12

TPCA8057-H 1N PPAK56-8

PC803

2200P_0402_50V7K

PL801

1 2

PR806

4.7_1206_5%

PC815

@PC815

@

680P_0603_50V7K

12

PC804

4.7U_0805_25V6-K

+VGA_COREP +VGA_CORE

PJ801

@ PJ801

@

2

112

JUMP_43X118

12

PC805

4.7U_0805_25V6-K

1

+

2

@

+

PC809

2

470U_D2_2VM_R4.5M

+VGA_COREP Iocp=32.5A

2

+

PC811

PC810

2

470U_D2_2VM_R4.5M

PJ802

112

JUMP_43X118@

PJ803

112

JUMP_43X118@

1

B+

+VGA_COREP

12

PC812

10U_0805_6.3V6M

470U_D2_2VM_R4.5M

12

PC814

PC813

10U_0805_6.3V6M

B B

+5VALW

12

PC819

PC819 1U_0402_6.3V6K

1U_0402_6.3V6K

12

PR815

PD801

RB751V-40_SOD323-2@

1 2

PR816

40.2K_0402_1%

PXS_PWREN12,14,19,43

A A

5

4

PXS_PWREN

1 2

PR815

0_0402_5%

@

12

PR818

PC822

20K_0402_1%

1U_0603_25V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

PU802

7

POK

8

EN

6

5

VIN

4

VOUT

VCNTL

3

VOUT

2

FB

9

VIN

GND

APL5912-KAC-TRL_SO8

1

2011/04/18

+1.5V

1

PJ804

1

JUMP_43X79

2

@

12

4.7U_0805_6.3V6K

PR817

1.15K_0402_1%

PR819

4.53K_0402_1%

Compal Secret Data

Deciphered Date

PC820

12

PC821

0.01U_0402_25V7K

2

PJ805

+VGA_PCIEP +1.0VGS

+VGA_PCIEP

12

PC823

22U_0805_6.3V6M

2

112

JUMP_43X79

@

1.0VVG A_PCIE

PR819 4.53K

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

VGA_COREP

1.1 V

3K

1

0.1

44 48Monday, January 16, 2012

0.1

5

PC902

PR902

2K_0402_1%

330P_0402_50V7K

1000P_0402_50V7K

12

PC910

12

@

12

PC915

@

220P_0402_50V7K

12

PC904

12

APU_VDDNB_SEN7

PR907

PR906

0_0402_5%

10_0402_5%

D D

VSUMP_NB

+APU_CORE_NB

12

PR909

12

2.61K_0402_1%

PH902

1 2

10K_0402_5%_ERTJ0ER103J

12

PC914

0.1U_0603_50V7K

10_0402_5%

12

1000P_0402_50V7K

PR911

1 2

PC912

PC913

PR912

11K_0402_1%

PR912

0.1U_0402_25V6

0.1U_0402_25V6 590_0402_1%

590_0402_1%

0.047U_0402_16V7-K

PR914

@PR914

@

100_0402_1%

12

After rev1.1 must change to 133k

PR920

PC919

133K_0402_1%

PR921 27.4K_0402_1%PR921 27.4K_0402_1%

12

PH901

470K_0402_5%_TSM0B474J4702RE

C C

After rev1.1 must change to 133k

B B

A A

12

PR926

10.5K_0402_1%

PR934

133K_0402_1%

1 2

PC927

1000P_0402_25V6K

1 2

PR936 27.4K_0402_1%PR936 27.4K_0402_1%

PH903

470K_0402_5%_TSM0B474J4702RE

12

PR945

10.5K_0402_1%

PC919

1000P_0402_25V6K

1 2

PR971

PR971 0_0402_5%

0_0402_5%

APU_SVC7

APU_SVD7

+1.5VS

APU_SVT7

VR_ON31,42

APU_PWRGD12,7

FCH_PWRGD14

+5VS

VSUM-

VSUM+

VSUM-

H_PROCHOT#38,7

12

APU_IMON31

+5VS

PR938

0_0402_5%

PR942

10_0402_5%

@

PR923

10_0402_5%

PR901 0_0402_5%PR901 0_0402_5%

PR925 0_0402_5%PR925 0_0402_5%

PR927 0_0402_5%PR927 0_0402_5%

PR929 0_0402_5%PR929 0_0402_5%

PR930 0_0402_5%PR930 0_0402_5%

PR933 0_0402_5%PR933 0_0402_5%

PR932 0_0402_5%PR932 0_0402_5%

PR968 0_0402_5%

@

12

PR947

2.61K_0402_1%

12

PH904

10K_0402_5%_ERTJ0ER103J

12

PC946

0.1U_0603_50V7K

PR903

3.3K_0402_1%

12

SVC

12

SVD

12

VDDIO

12

SVT

12

ENABLE

12

PWROK

12

PC929

0.22U_0402_10V6K

PR950

1 2

11K_0402_1%

12

PR908

301_0402_1%

PR969

10K_0402_1%

1

2

3

4

5

6

7

8

9

10

11

12

PC930

0.22U_0402_10V6K

1 2

PC935

100_0402_1%

@

12

PU901

ISEN2_NB

NTC_NB

IMON_NB

SVC

VR_HOT_L

SVD

VDDIO

SVT

ENABLE

PWROK

IMON

NTC

ISEN3

ISEN2

ISEN1

1 2

0.082U_0402_16V7K

PR957

PR904

137K_0402_1%

100P_0402_50V8J

12

48

ISEN1_NB

ISEN3

13

PR970

PR970 10K_0402_1%

10K_0402_1%

@

PC936

PR955

0.22U_0402_10V6K

0.22U_0402_10V6K 604_0402_1%

604_0402_1%

820P_0402_50V7K

12

PC903

390P_0402_50V7K

12

PC905

12

44

45

46

47

FB_NB

VSEN_NB

ISUMP_NB

ISUMN_NB

ISL6277HRTZ-T_TQFN48_6X6

ISUMP16ISEN2

15

14

12

PC944

12

@

4

43

COMP_NB

18

1 2

PR905

@ PR905

@

32.4K_0402_1%

41

42

FCCM_NB

PGOOD_NB

RTN19ISUMN17ISEN1

FB220VSEN

1000P_0402_50V7K

PC937

330P_0402_50V7K

1 2

PC948

0.01U_0402_25V7K

12

40

PWM2_NB

FB21PGOOD

38

39

LGATEX

COMP

22

23

PC933

PR962

0_0402_5%

PR964

0_0402_5%

FCCM_NBVSUMN_NB

37

PHASEX

UGATEX

BOOT1

24

BOOT1

301_0402_1%

12

PR951

2.94K_0402_1%

12

LGATE_NB1

PHASE_NB1

UGATE_NB1

BOOTX

VIN

BOOT2

UGATE2

PHASE2

LGATE2

VDDP

VDD

PWM_Y

LGATE1

PHASE1

UGATE1

TP

49

PR948

12

10_0402_5%

12

PR956

PR966

36

35

34

33

32

31

30

29

28

27

26

25

12

PR913

@

BOOT_NB1

BOOT2

UGATE2

PHASE2

LGATE2

LGATE1

PHASE1

UGATE1

PR939

100K_0402_5%

10P_0402_25V8K

100P_0402_50V8J

PR952

137K_0402_1%

PR954

2K_0402_1%

12

0_0603_5%

PR924

0_0603_5%

12

PC920

0.22U_0603_25V7K

1_0603_5%

12

+3VS

12

PC932

12

PC934

12

PC942

390P_0402_50V7K

12

PC943

680P_0402_50V7K

12

+APU_CORE

APU_VDD_SEN_H 7

APU_VDD_SEN_L 7

12

PR931

PC925

1U_0603_16V6K

CPU_B+

12

VGATE 14,31

PR949

32.4K_0402_1%

@

PR972

0_0603_5%

PR973

0_0603_5%

PC926

1U_0603_16V6K

12

3

5

UGATE_NB1

PHASE_NB1

BOOT_NB1

12

+5VALW

12

+5VS

@

PR915

2.2_0603_5%

1 2

LGATE_NB1

TPCA8057-H_PPAK56-8-5

UGATE1

PHASE1

2.2_0603_5%

1 2

BOOT1

LGATE1

UGATE2

PHASE2

2.2_0603_5%

1 2

BOOT2

4

PC916

0.22U_0603_25V7K

12

4

PQ902

PR941

PC928

0.22U_0603_25V7K

12

TPCA8057-H_PPAK56-8-5

PR960

PC945

0.22U_0603_25V7K

12

LGATE2

PQ906

TPCA8057-H_PPAK56-8-5

PQ904

PQ901

123

TPCA8065-H_SOP-ADV8-5

5

4

PQ907

123

TPCA8057-H_PPAK56-8-5

5

4

PQ903

123

5

4

123

5

4

PQ905

123

TPCA8065-H_SOP-ADV8-5

5

4

123

5

123

TPCA8065-H_SOP-ADV8-5

12

PR943

4.7_1206_5%

PC931

12

680P_0603_50V7K

12

PR961

4.7_1206_5%

12

PC947

680P_0603_50V7K

12

PC907

10U_0805_25V6K

12

ISEN2

VSUM+

VSUM-

2

CPU_B+

12

PC908

10U_0805_25V6K

PR916

4.7_1206_5%

PC917

680P_0603_50V7K

PC921

ISEN1

VSUM+

VSUM-

PR958

10K_0402_1%

PR963

3.65K_0402_1%

PR965

1_0402_1%

12

PC909

PC911

0.01U_0402_25V7K

2200P_0402_50V7K

0.36UH_VMPI1004AR-R36M-Z03_30A_20%

PR919

3.65K_0402_1%

VSUMP_NB

VSUMN_NB

12

10U_0805_25V6K

PR937

10K_0402_1%

PR944

3.65K_0402_1%

PR946

1_0402_1%

12

PC938

10U_0805_25V6K

12

PR922

1_0402_1%

CPU_B+

12

PC924

PC922

PC923

10U_0805_25V6K

0.01U_0402_25V7K

0.36UH_VMPI1004AR-R36M-Z03_30A_20%

1

12

2

12

CPU_B+

12

PC940

PC939

10U_0805_25V6K

0.01U_0402_25V7K

PL904

0.36UH_VMPI1004AR-R36M-Z03_30A_20%

1

2

PL902

FBMA-L18-453215-900LMA90T_1812

PL901

1

4

3

2

12

2200P_0402_50V7K

PL903

4

1 2

3

PR940

PR940 10K_0402_1%

10K_0402_1%

12

PC941

2200P_0402_50V7K

4

3

1 2

PR959

PR959 10K_0402_1%

10K_0402_1%

ISEN1

1

12

PC906

68U_25V_M

B+

1

+

PC949

2

68U_25V_M

@

+APU_CORE_NB

+APU_CORE_NB Iocp=39A

ISEN2

+APU_CORE

+APU_CORE Iocp=60A

+APU_CORE

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2011/04/18 2015/07/08

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

CPU_COREP

45 48Monday, January 16, 2012

1

45 48Monday, January 16, 2012

0.1

5

4

3

2

1

+CPU_CORE_NB

12

PC1005

22U_0603_6.3V6K

12

PC1016

22U_0603_6.3V6K

+CPU_CORE

+APU_CORE_NB

12

PC1006

22U_0603_6.3V6K

1

+

2

12

PC1007

PC1008

22U_0603_6.3V6K

1

+

PC1020

PC1021

2

330U_D2_2VM_R7M

12

PC1009

PC1010

PC1011

22U_0603_6.3V6K

10U_0603_6.3V6K

22U_0603_6.3V6K

@

+APU_CORE

12

D D

C C

PC1001

22U_0603_6.3V6K

12

PC1012

22U_0603_6.3V6K

+APU_CORE

12

PC1002

22U_0603_6.3V6K

12

PC1013

22U_0603_6.3V6K

12

PC1017

@

22U_0603_6.3V6K

12

PC1003

22U_0603_6.3V6K

12

PC1014

22U_0603_6.3V6K

12

PC1018

@

22U_0603_6.3V6K

12

PC1004

22U_0603_6.3V6K

12

PC1015

22U_0603_6.3V6K

12

PC1019

@

22U_0603_6.3V6K

1

+

PC1022

2

330U_D2_2VM_R7M

1

+

@

PC1026

2

330U_D2_2VM_R7M

B B

1

+

PC1023

2

330U_D2_2VM_R7M

1

+

PC1024

2

330U_D2_2VM_R7M

1

+

PC1025

2

330U_D2_2VM_R7M

PC1027

22U_0603_6.3V6K

+1.2VS

12

PC1028

10U_0603_6.3V6K

12

PC1030

PC1029

10U_0603_6.3V6K

12

PC1031

10U_0603_6.3V6K

12

PC1032

PC1033

10U_0603_6.3V6K

+1.2VS

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/04/18

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

A3

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR DECOUPLING

46 48Monday, January 16, 2012

1

0.1

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 1

for PWR

Reason for change PG# Modify List Date PhaseItem

1

D D

2

3

4

5

6

7

8

C C

10

11

12

13

14

15

16

9

17

B B

18

19

20

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

2011/04/18 2015/07/08

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PIR (PWR)

C38-G series Chief River Schematic

47 48Monday, January 16, 2012

1

0.1

5

4

3

2

1

Sch LayoutPhase Desc riptionNo. BOMDate

2011/09/13

SDV2

2011/09/14 2011/09/16 2011/09/16 2011/09/17 2011/09/17 2011/09/17 2011/09/17 2011/09/17 2011/09/26

D D

C C

B B

2011/09/26 2011/09/28 2011/09/28 2011/09/28 2011/09/28 V V 2011/09/28 2011/09/28 2011/09/28 2011/09/28 2011/09/28 2011/09/28 2011/09/30 2011/10/03 2011/10/04 2011/10/05 2011/10/05 2011/10/05 2011/10/05 2011/10/06 2011/10/06 2011/10/06 2011/10/06 2011/10/06 2011/10/06 2011/10/07 2011/10/11 2011/10/11 2011/10/11 2011/10/12 2011/10/12 2011/10/13 2011/10/13 2011/10/13 2011/10/13 V 2011/10/13 2011/10/14 2011/10/14 2011/10/17 2011/10/17 2011/10/17 2011/10/17 2011/10/17 2011/10/17 2011/10/17 2011/10/18 2011/10/18 2011/10/18 2011/10/19 2011/10/19 2011/10/19 2011/10/20 2011/10/20 2011/10/20 2011/10/21 2011/10/21 2011/10/21 2011/10/21

2011/10/21 2011/10/21 2011/10/24 2011/10/24 2011/10/24 2011/10/24 2011/10/24 2011/10/24 2011/10/24 2011/10/24 2011/10/24 2011/10/24 2011/10/24 2011/10/24 2011/10/24 2011/10/24 2011/10/24 V 2011/10/24 V 2011/10/24 2011/10/24 2011/10/24 2011/10/24 2011/10/25 2011/10/25

2011/10/26 2011/10/26 2011/10/26 2011/10/26 2011/10/27 2011/10/27

No.1 Page29, install R1102, R1104, R1105 for audio noise prevention No.2 No.3 No.4 No.5 No.6 No.7 No.8 No.9 No.10 No.11 No.12 No.13 No.14

No.16 No.17 No.18 No.19 Page31, Modify Board ID Table for AMD Build Plan Change No.20 No.21 No.22 No.23 No.24 No.25 No.26 No.27 No.28 No.29 No.30 No.31 No.32 No.33 No.34 No.35 No.36 No.37 No.38 No.39 No.40 No.41 No.42 No.43 No.44 No.45 No.46 No.47 No.48 No.49 No.50 No.51 No.52 No.53 No.54 No.55 No.56 No.57 No.58 No.59 Page35, Add intersheet of PLT_RST# on debug card No.60 No.61 No.62 No.63 No.64 No.65 No.66 No.67 No.68 No.69 No.70 No.71 No.72 No.73 No.74 No.75 No.76 No.77 No.78 No.79 No.80 No.81 No.82 No.83 No.84

No.86 No.87 No.88 No.89 No.90 No.91 No.92

No.94 No.95 No.96 No.97 No.98 Page35, Modify D2416 P/N from SC300001G00 to SCA00001G00 for ESD Request No.99

V V

V

V V V V V V V V V

V V V

V V V V V VV VV V V

V

V V

V

V VV V V V V V V

V V

V V V VV V V V V

V V V V V V V V V V

V V V V V V V V V

VV V V V V V V V V

V

V V V

V V

V

V V

V VV

V V

V V V

V V

V V2011/10/21 V V V

V V V V V V V V V V V V VV V V V V V V V

V V V V V V V V V V

V V V V

V V V

V

VV V V V V V V

page12~16, change FCH P/N from SA000043IC0 to SA000043IG0 Page35, Swap JCARD1 Pin3,4 to Pin9,10 PCIE TX & RX for CardReader no function issue Page33, Modify JTP1 Pin1 to TP_DATA2, JTP1 Pin6 to TP_CLK2 for Click Pad no function issue Page30, Modify JHDD1 Pin18 connect to GND for SATA Gen2 Page5~9, Modify U1 to JCPU1 Page10~11, SWAP JDIMM1 & JDIMM2 Page33, Modify JFP1 to JFPB1,Modify JWLAN1 to JMINI1,Modify JLAN1 to JRJ45 Page12, Modify CLRP1 to JCMOS1 Page31, POP U2201,C2200,R2229 for Security ROM Function not work issue Page14, Modify D1103,D1104 to DIS@ for DIS only Page33, Reserve R2489,R2490 with PCIE_CRX_C_DTX_N1,PCIE_CRX_C_DTX_P1 for PCIE WLAN RX AC Decouping Page29, R1111.2 Connect to U1101 Pin38 add net name CX_GPIO0 for vendor request

VV

Page35, Add D2416 to replace D2414 for ESD request Page5～9, Modify JCPU1 Footprint to LOTES_ACA-ZIF-109_722P-A39 for A39 DFX RuleNo.15 Page12～16, Modify U2 Footprint to 21807-A11-HUDSON_FCBGA_656P-A39 for A39 DFX Rule Page17～22, Modify U1401 Footprint to 2160809000A11SEY_FCBGA_962P-A39 for A39 DFX Rule Page23～24, Modify U1405～U1412 Footprint to K4W1G1646E-HC12_FBGA_96P-A39 for A39 DFX Rule

V

Page31, Modify R2209 for QALEA FVT1 Build Board IC Mapping

Page14 & 31, U2200 Pin107 add EC_PXCONTROL connect to D1103.1 , D1104.1 for PX control enable delay

Page28, update JCRT1 Footprint from SUYIN_070546FR015S200ZR_15P to C-H_13-12201558CP_15P-T for ME Conn modify

Page14, D1103 modify to UNPOP for VGA Sequence Tuning

Page14, Add C222～C237 connect to all USB2.0 port near connector for AMD request that about USB Signal Driving Page35, Add JDB3 Conn for SW Debug request

Page12, Add TP52～T58 on U2 GPIO input pin for debug Page13, Add TP59～T61, TP67～T74 on U2 GPIO input pin for debug Page14, Add TP62～T93 on U2 GPIO input pin for debug

Page26, Q2101 P/N change to SB00007H10 for Component common Page35, JFPB1 update P/N to SP01000Z300 for Conn List update Page35, JPWR1 update P/N to SP01000Z300 for Conn List update

VV

Page35, JRJ45 update Footprint to ACES_50506-01841-P01_18P-T for Conn List update Page32, JBT1 update P/N to SP02000TF00 for Conn List update

VV

Page35, JCARD1 update Footprint to ACES_50224-0140N-001_14P-T for Conn List update Page29, reserve D1101 for Audio Noise issue Page12, Del TP52～T58 on U2 GPIO input pin for debug Page13, Del TP59～T61, TP67～T74 on U2 GPIO input pin for debug Page14, Add TP62～T93 on U2 GPIO input pin for debug Page22, Replace R1476 P/N From D028100A00 to SD028100A80 for HF Part modify Page19,30,36, Replace Q1409,Q2309,Q2410 P/N From SBX01240010 to SB00000J700 for HF Part modify Page12, Replace X1 P/N From SJ100003300 to SJ10000EL00 for Sourcer request (No Footprint, Use SJ10000DJ00) Page12, Replace Y1 P/N From SJ132P7KW10 to SJ10000BM00 for Sourcer request Page18, Replace Y1400 P/N From SJ100006R00 to SJ10000DY00 for Sourcer request (No Footprint, Use SJ10000DJ00) Page31, Replace Y2200 P/N From SJ132P7KW10 to SJ10000BM00 for Sourcer request Page31, Modify U2200 Pin107 EC_PXCONTROL to U2200 Pin108 for ABO Common Design

V

Page31, Add R2235 pull up to +3VS for H_PROCHOT#_EC

Page19, Replace Q1401,Q1402,Q1404,Q1405 P/N from SB00000FG00 to SB00000FG10 for Sourcer request Page26, Add C2144,C2145 1000P Caps connect to DMIC_CLK & DMIC_1_2 for EMI Request(Noise issue) Page25, Add R2171 connect to LVDS_HPD_R for Vendor Request (Noise Filtering) Page7.9,27 Replace Q2,Q3,Q8,Q2106 P/N From SB000006A00 to SB000006A10 for HF Part modify Page14, Del D1103,D1104, Add Q44,R211 & use EC_Control to Control PXS_PWREN ON/OFF Timing for VGA Sequence tuning Page19, Modify C1463,D1400,R1442 BOM Structure from DIS@ to PX40@ & D1400 use 0_0603_5% for PX50 Page7, Modify R65,R69 BOM Structure to @ for Power Leakage issue Page12, Modify R80,R82 value from 0 ohm to 33 ohm for EMI Noise Issue Page7, 31, Modify input/output direction: H_PROCHOT#, Turbo_V Page27, Add Net +5VS_HDMI on D2103 Pin5 & Pin6 For ESD Request Page19, Modify R1454,Q1412,R1450,R1451,R1449,C1470,U1404,C1467,C1468,C1469,C1470 BOM Structure from PX40 to DIS@ for PX50 Function workable Page31, Add Net APU_IMON on U2200 Pin76 for Power Team Request

Page25, modify net name: LVDS_HPD_R to LVDS_HPD_C Page33, Del AOAC circuit for Customer request Page31, Del AOAC Powe Control Pin WLAN_POWER# for Customer request Page14, Modify USB Signal net name from USB20_[P..N][10..12]_C to USB30_[P..N][10..12]_C for USB30 net name error Page12, Modify R83,R84 value from 0 ohm to 33 ohm for EMI Noise Issue Page31, Modify R2212,R2213 BOM Structure to @ for ENE Suggestion Page31, Modify U2200 Pin 72 Net Name From AOU_ILIM to SPK_RT_Detect# for Speaker main stream & retail Page31, Add R2236 pul up to +3VS for SPK_RT_Detect# Page35, Modify JAUD1 Pin20 Net Name From AOU_ILIM to GND , Pin17 From AOU_CTL1 to GND ,Pin4 From NC to AGNDfor USB Charger Function

Page29, Modify JSPK1 P/N From DC030008W00 to SP02000N000 & Add JSPK1 Pin5 connect to SPK_RT_Detect#,JSPK1 Pin6 connect to GND for Speaker main stream & retail

Page31, Modify U2200 Pin120 Net Name From AOU_CTL1 to NC for USB Charger Functionl Page29, reserve D1102 for Audio Noise issue Page35, Modify D2415 BOM Structure to POP for ESD Request Page33, Modify D2402,D2403 BOM Structure to POP for ESD Request Page34, Modify D2402,D2403 BOM Structure to POP for ESD Request

Page28, Add Q2412 with CRT_DDC_DATA & CRT_DDC_CLK for CRT Power Leakage issue

Page26, Del R2116,R2117, Add R2172~R2176 & Reverse D2110 for PWM Power Leakage issue Page30, Del C2404,Reserve C2471,C2405 for Intel Circuit Common Page32, Modify R500 BOM Structure to @ for BOM Error Page31, Del R2223~R2229, Q2200 to update Security ROM Circuit for Intel Circuit Common Page35, Swap JRJ45 PCIE_CRX_DTX_P0 to PCIE_CRX_DTX_N0, PCIE_CTX_DRX_P0 to PCIE_CTX_DRX_N0 For LAN Board Common Page35, Del R2462 to update Power OK circuit for Intel Circuit Common Page36, Del R2300, R2310, C2312, R2317 update Power OK circuit for Intel Circuit Common Page31, Modify R2235 BOM Structure to @ for H_PROCHOT#_EC Page34, Modify D2404,D2406,D2408 P/N from SC300001D00 to SC300002800 for ESD Request Page34, Modify D2404~D2409,L2400~L2408 BOM Structure from @ to POP for EMC Request No.85 Page27, Modify L2105~L2108 BOM Structure from @ to POP for EMI Request Page34, Modify L2402,L2405,L2408 P/N from SC300000I00 to SM070000K00 for ESD Request (Footprint SM070000I00) Page34, Modify L2403, L2404, L2400, L2401, L2406, L2407 P/N from SC300000I00 to SM070001S00 for ESD Request Page27, Modify D2102,D2103,D2105 P/N from SC300001Y00 to SC300002C00 for ESD Request Page35, Modify D2413 P/N from SC600001600 to SCA00001L00 for ESD Request Page29, Modify JSPK1 P/N From SP02000N00 to DC030008W00 For LD Requirement

VV

Page29, Add R1140 connect to SPK_RT_Detect# to GND for Speaker Verify Page28, Del Q2412 with CRT_DDC_DATA & CRT_DDC_CLK for AMD Design Guide RequireNo.93

VVV2011/10/25

Page26, Del R2122,R2124 with EDID_DATA & EDID_CLK pull up for Duplicate Pull up error

VVV

Page26, Modify R2174 BOM Structure to @ for BOM Error Page25, Reserve R2116, R2117 to Connect from CSCL & CSCA to EC_SMB_DA2 & EC_SMB_CK2 for Power Leakage issue Page29, Modify D1101, D1102 BOM Structure From @ to POP for Audio Noise issue

Page29, Modify C1111 ,C1141 BOM Structure From POP to @ for Audio Noise issue

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/08/10 2011/03/04

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

EE modify list

LA-7121P

Monday, January 16, 2 012

0.4

48 50

1

0.4

5

4

3

2

1

Sch LayoutPhase Desc riptionNo. BOMDate

2011/11/14

FVT

2011/11/14 2011/11/14 2011/11/14 2011/11/14 2011/11/14 2011/11/14 2011/11/14 2011/11/14 2011/11/14 V V V

D D

C C

2011/11/15 2011/11/21 2011/11/21 2011/11/21 2011/11/21 2011/11/21 2011/11/21 2011/11/21 2011/11/21 2011/11/22 2011/11/22 2011/11/22 2011/11/22 2011/11/22 2011/11/22 2011/11/22 2011/11/23 2011/11/23 V V 2011/11/24 2011/11/24 2011/11/24 2011/11/25 2011/11/25 2011/11/25 2011/11/25

2011/11/28 2011/11/28

2011/11/29 2011/11/29 2011/11/29 2011/11/29 2011/11/29 2011/11/29 V 2011/11/30 2011/11/30 2011/11/30 2011/11/30 V 2011/12/02 2011/12/02 2011/12/02 2011/12/02 2011/12/05

2011/12/09

MEMO

2011/12/09

No.1 Page17~24, Modify U1401 P/N From SA000047H00 to SA000047H50 for GPU Version update No.2 No.3 No.4 No.5 No.6 No.7 No.8 No.9 No.10 No.11 No.12 No.13 No.14 No.15 No.16 No.17 No.18 No.19 No.20 No.21 No.22 No.23 No.24 No.25 No.26 No.27 No.28 No.29 No.30 No.31 No.32 No.33 No.34 No.35 No.36 No.37 No.38 No.39

No.41 No.42 No.43 No.44 No.45 No.46 No.47 No.48

No.50 No.51 No.52 No.53 No.54

No.55

power

V V V V V V

VV V V V V V V

V V V V V

V VV

V VV V V V V V V V V

V V

V V V VV V VV V VV V VV

V V

V

V V V2011/11/26

V VV V VV V

V V2011/11/28 V V V V V

V V V

V V V V V

V

Page36, Modify R2305 P/N From SD028200280 (20K_0402_5%) to SD028150380 (150K_0402_5%) for Power Consumption & Power Sequence tuning Page36, Modify R2304 P/N From SD028470280 (47K_0402_5%) to SD028470380 (470K_0402_5%) for Power Consumption & Power Sequence tuning Page36, Modify R2315 P/N From SD028750280 (75K_0402_5%) to SD028220380 (220K_0402_5%) for Power Consumption & Power Sequence tuning Page34, Modify R2442~R2459 BOM Structure From POP to @ for EMI Request Page27, Modify R2126~R2133 BOM Structure From POP to @ for EMI Request Page14, Replace C222~C237 to R216~R231 on all usb port signal for AMD Design checklist update (USB no function issue) Page19, Add R1461 to connect PXS_PWREN to RUNPWROK for PX50 Power Enable Page30, Modify JODD1 Location to JODD2 for ME BOM Common Page14,Remove R230~R231 on all usb port signal for AMD Design checklist update (USB no function issue) Page35, Remove D2415 for ESD Request Page30, Reserve R2411,C2421 for G Sensor Vendor Suggestion Page29, Modify JSPK1 Conn From 4Pin to 6Pin & Move R1140 to connect JSPK1 Pin5 For Speaker main stream & retail Page31, Add J2200,J2201 to improve EC Power Source +3VLP or +3VALW to +3VALW_EC Power Source Option and modify +3VALW Net Name to +3VALW_EC for Lenovo S4 Lid Function Page31, Update Borad ID table for FVT Phase Page31, Modify R2209 From 8.2K to 18K for FVT BRDID update Page30, C2417 BOM Change from 10U (SE000005T80) to 10K (SD013100280) for G Sensor Vendor Suggestion

Page36, Add R2321,R2322,C2317,C2318,C2319,Q2313,Q2314 for +3V_FCH Power Control Page31, U2200 Pin70 Add FCH_PWR_EN# for +3V_FCH Power Control

Page35, Add R2481 Pull up to +3VLP & Reserve R2482 Pull up to +3VALW for Lenovo S4 LID Function

VVV

Page18, Y1400 P/N From SJ10000DY00 to SJ10000CV00 for BOM Change Page12, X1 P/N From SJ10000EL00 to SJ10000CX00 for BOM Change Page25, Modify R2117 connect to TL_DATA & R2116 connect to TL_CLK, Two signals connect to R2177,R2178 pull up to +3VS for LVDS Translator EEPROM Reserve Page31, Modify U2200 Pin86 EAPD to TL_DATA & Add U2200 Pin85 TL_CLK for LVDS Translator EEPROM Reserve Function Page31, Add U2200 Pin26 EAPD_R for LVDS Translator EEPROM Reserve Function Page31, Add R2223 & R2224 to option EAPD GPIO Output singal from Pin26 (EAPD_R) or Pin86 (TL_DATA) for LVDS Translator EEPROM Reserve Function Page14, Del R216~R229 for USB2.0 Signals tuneing circuit remove

VVV

Page14, Reserve R230~R234 & C222~C226 with USB2.0 N signals port 0,6,10,11,12 for AMD Suggestion

V

Page36, Del R2321,R2322,C2317,C2318,C2319,Q2313,Q2314 for +3V_FCH Power Control

VVV

Page31, U2200 Pin70 Del FCH_PWR_EN# for +3V_FCH Power Control

VVV

Page31, U2200 Pin127 Add VSB_ON & Reserve R2226 for +VSB Power Control

VV

Page33, Add H18 for ME Drawing lose Page31, Modify R2217, R2218 Power Source from +3VS to +3VALW for +3VGS Power Leakage issue

VV

Page18, Install Q1400, R1427, R1428 & Remove R1433, R1435 for +3VGS Power Leakage issue Page31, Del R2226 for VSB_ON resistor double reserve

VVV

Page31, Add R2226,R2227 Pull up to +3VS & Reserve R2217,R2218 pull up to +3VALW for SMBUS Leakage issue Page7, Del R65,R69 & Reserve R45 & R45 with APU_SID & APU_SIC By Pass APU_SID_R & APU_SIC_R for SMBUS Power Leakage Issue Page31, Reserve C2219,C2210 to +3VALW For SMBUS2 AC Decoulping Page31, Del C2213,C2214 & Modify R2226,R2227 BOM Structure to @ & R2217,R2218 to POP For SMBUS Power Leakage issue Page7, Modify R45,R48 BOM Structure to POP & Q9 to @ For SMBUS Power Leakage issueNo.40 Page36, Modify R2309 P/N from SD028750180(7.5K) to SD028150380(150K) for Power Sequence tuneing Page36, Modify C2316 P/N from SE042104K80(0.1U) to SE080105K80(1U) for Power Sequence tuneing

Page19, Modify R1450 P/N from SD028150380(150K) to SD028130380(130K) for Power Sequence tuneing Page19, Modify C1470 P/N from SE042104K80(0.1U) to SE080105K80(1U) for Power Sequence tuneing

Page13, Modify U4 P/N from SA000041P00(MXIC) to SA00003K800(Winbond) for ROM Part Issue Page19, Modify C1470 P/N from SE080105K80(1U) to SE042104K80(0.1U) for Power Sequence tuneing Page19, Modify R1450 P/N from SD028150380(130K) to SD028200280(20K) for Power Sequence tuneing Page19, Modify R1449 P/N from SD028200280(20K) to SD028330380(330K) for Power Sequence tuneing

Page35, unmount R2481 and mount R2482 for LID SW function reservedNo.49

Page12, Modify C129 P/N from SE071150J80 (15P) to SE071220J80 (22P) For Crystal Clock Tuneing Page12, Modify C130 P/N from SE071150J80 (15P) to SE071270J80 (27P) For Crystal Clock Tuneing Page12, Modify C131,C134 P/N from SE071270J80 (27P) to SE071330J80 (33P) For Crystal Clock Tuneing Page18, Modify C1445,C1446 P/N from SE071120J80 (12P) to SE071200JN0 (20P) For Crystal Clock Tuneing Page26, Modify C2144,C2145 BOM Structure to @ for DMIC no function issue

Page35, unmount R2482 and mount R2481 for LID SW function implement when SMT

power schematics 20110208.dsn

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/08/10 2011/03/04

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

EE modify list

LA-7121P

Monday, January 16, 2 012

0.4

49 50

1

0.4

5

4

3

2

1

Sch LayoutPhase Desc riptionNo. BOMDate

SIT

2012/01/03 2012/01/04 2012/01/04 2012/01/04 V V 2012/01/04 2012/01/04 2012/01/04 2012/01/04 2012/01/04

D D

C C

B B

2012/01/04 2012/01/04

2012/01/04 2012/01/04 2012/01/04 2012/01/04 2012/01/04 2012/01/04 2012/01/04 2012/01/04

2012/01/05 V 2012/01/05 2012/01/05 2012/01/05 2012/01/05 2012/01/05 2012/01/05 2012/01/05 2012/01/05 2012/01/05

2012/01/05 2012/01/05 2012/01/05 2012/01/05 2012/01/05 2012/01/05 2012/01/05 2012/01/05 2012/01/05 2012/01/05 2012/01/05 2012/01/05 2012/01/05 2012/01/05 2012/01/05 2012/01/05 2012/01/05 2012/01/05 2012/01/05 2012/01/05

2012/01/09 2012/01/09 2012/01/09 2012/01/09 2012/01/09 2012/01/09 2012/01/09

2012/01/10 2012/01/10 2012/01/10 2012/01/10

2012/01/11 2012/01/11 2012/01/11 2012/01/11

MEMO V

2012/01/11 2012/01/11 2012/01/11

2012/01/11 2012/01/11

2012/01/12 2012/01/12 2012/01/12 2012/01/12

2012/01/16 V 2012/01/16 2012/01/16

No.1 No.2 No.3 No.4 No.5 No.6 No.7 No.8 No.9 No.10 No.11 No.12 No.13 No.14 No.15 No.16 No.17 No.18 No.19 No.20 Page33, Reserve R2483 & R2485 to connect EC_SMB_CK2 & EC_SMB_DA2 for Lenovo Multi-touch function No.21 Page31, Modify EC U2200 111Pin from +3VLP to +3VALW_EC for S4 LID Function (common QILEX)

No.23 No.24 No.25 No.26 No.27 No.28 No.29 No.30 No.31 No.32 No.33

No.35 No.36 No.37 No.38 No.39 No.40 No.41 No.42 No.43 No.44 No.45 No.46 No.47 No.48 No.49 No.50 No.51 No.52 No.53 No.54 No.55 No.56 Page15, Modify +VDDXL_3.3V power source from +3V_FCH to +3V for reduce power consumption No.57 No.58 No.59

No.61 No.62 Pgae31, Modify U2200 Pin26 from EAPD_R to WLAN_WAKE# for AOAC Function

No.64 Page31, Add U2200 Pin91 from NC to AOAC_WLAN for AOAC Function No.65 Page31, Modify U2200 Pin19 net name from ODD_DA# to WL_OFF_EC# for Circuit common with Intel No.66 No.67 No.68 No.69 Page31, Modify R2205 BOM Structure to @ for Common Circuit with Intel

No.71 Page31, Modify L2200.1 Power Source from +3VALW to +3VALW_EC for EC_AVCC Power Leakage Issue No.72 No.73

No.75 Page35, Remove R2469 for logo led brightness fine tune

No.77 Page36, Modify C2316 P/N from SE080105K80 to SE0000069L0 for FVT SMT Memo

No.79 No.80 No.81 No.82 Page36, Modify R2323.1 & R2322.1 from +VSB to +5VALW for VGS over spec issue

No.84 No.85 Page36, Modify R2325 to POP from FCH_PWR_EN to FCH_PWR_EN_R for +3V & +1.1V Power Control

No.87 Page31, Modify R2230 BOM Structure from POP to @ for double pull up error

No.89 No.90

V V2012/01/03

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V

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V V VV V VV V V V V

V V

V V V V V V

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V VV V VV V

V V

V

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V

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V VV V V

V V2012/01/05 V V V2012/01/05 V V V2012/01/05

V V V V V V V V V

VV

V

V VV V V V V V V

V V V

V VV V

VV

V V V V2012/01/06 VV V V2012/01/09 V

V

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V V V V2012/01/10 VV

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V V V V V V V2012/01/11

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V V V

V2012/01/11

V V V V V2012/01/16

V V

Page31, Add R2228 connect from MAINPWON_R to MAINPWON for Power Circuit update Page31, Modify R2236 BOM Structure from POP to @ for +3VS Power Leakage Issue Page7, delete Q9, short and remove 0 ohm: R45&R48 Page7,9,13, short and remove R64&R68, change Page13 net name ML_VGA_HPD, change page7 net name LVDS_HPD

Page15, Modify +VDDAN_11_USB_S power source from +1.1VALW to +1.1V_FCH for reduce power consumption Page15, Modify +VDDCR_11V_USB power source from +1.1VALW to +1.1V_FCH for reduce power consumption

V

Page15, Modify +VDDAN_11_SSUSB & +VDDCR_11_SSUSB power source from +1.1VALW to +1.1V_FCH for reduce power consumption Page15, Modify +VDDIO_33_S power source from +3V_FCH to +3VALW for reduce power consumption

VV

Page15, Modify +VDDXL_3.3V power source from +3V_FCH to +3VALW for reduce power consumption Page15, Modify +VDDPL_11_SYS_S power source from +1.1VALW to +1.1V_FCH for reduce power consumption

VV

Page15, Modify +VDDAN_33_HWM power source from +3V_FCH to +3VALW for reduce power consumption

V

Page36, Modify R2314,R2318,R2320,Q2311 BOM Structure from @ to POP for Reduce Power Consumption Page36, Add Q2313,Q2314,U2304,C2309,C2312,C2321,R2323,R2310,R2324 for +3VALW to +3V_FCH Circuit (Reduce Power Consumption) Page36, Add Q2316,Q2309,U2303,C2317,C2320,C2318,C2319,R2322,R2317 for +1.1VALW to +1.1V_FCH Circuit (Reduce Power Consumption)

VV

Page14, Remove R146 & R148 for component part reduce

Page7, Remove R207 for component part reduce Page32, Remove R471 & R472 for component part reduce Page29, Remove R1106,R1107,R1119,R1134,R1109 for component part reduce Page35, Remove R2465,R2466 for component part reduce

VVV

Page26, Del R2176 to connect to EC_INVPWM for common QILEXNo.22

VVV2012/01/04

Page14, Add R146 & R148 for component part reduce

Page36, Modify +3V_FCH netname to +3VS_FCH for component part reduce Page36, Modify +1.1V_FCH netname to +1.1VS_FCH for component part reduce Page15, Modify +VDDAN_11_USB_S power source from +1.1V_FCH to +1.1VS_FCH for reduce power consumption Page15, Modify +VDDCR_11V_USB power source from +1.1V_FCH to +1.1VS_FCH for reduce power consumption Page15, Modify +VDDAN_11_SSUSB & +VDDCR_11_SSUSB power source from +1.1V_FCH to +1.1VS_FCH for reduce power consumption Page15, Modify +VDDIO_33_S power source from +3VALW to +3VS_FCH for reduce power consumption

VV

Page15, Modify +VDDXL_3.3V power source from +3VALW to +3VS_FCH for reduce power consumption Page15, Modify +VDDPL_11_SYS_S power source from +1.1V_FCH to +1.1VS_FCH for reduce power consumption Page15, Modify +VDDAN_33_HWM power source from +3VALW to +3VS_FCH for reduce power consumption

VV

Page29, Remove R1108,R1135,R1110,C1127 for component part reduce Page31, Remove Pin25 EC_INVT_PWM for Circuit CommonNo.34 Page31, Modify EC U2200 111Pin from +3VALW_EC to +3VLP for S4 LID Function (common QILEX)

Page36, Modify +3VS_FCH netname to +3V_FCH for component part reduce

VVV

Page15, Modify +VDDAN_33_USB power source from +3VS_FCH to +3V_FCH for reduce power consumption

VVV

Page15, Modify +VDDPL_33_SSUSB_S power source from +3VS_FCH to +3V_FCH for reduce power consumption Page15, Modify +VDDPL_33_USB_S power source from +3VS_FCH to +3V_FCH for reduce power consumption Page15, Modify +VDDIO_33_S power source from +3V_FCH to +3VALW for reduce power consumption Page15, Modify +VDDAN_33_HWM power source from +3V_FCH to +3VALW for reduce power consumption

V

Page36, Add J2302 From +1.1VALW to +1.1V_FCH for reduce power consumption

VV V

Page36, Modify U2304 Power source from +3V_FCH to +3V for reduce power consumption

VV

Page36, Add J2303 from +3VALW to +3V for reduce power consumption Page36, Modify U2303 Power source from +1.1V_FCH to +1.1V for reduce power consumption Page36, Modify J2302 From +1.1V_FCH to +1.1V for reduce power consumption Page15, Modify +VDDAN_11_USB_S power source from +1.1V_FCH to +1.1V for reduce power consumption

VVV

Page15, Modify +VDDCR_11V_USB power source from +1.1V_FCH to +1.1V for reduce power consumption

VV V

Page15, Modify +VDDAN_11_SSUSB & +VDDCR_11_SSUSB power source from +1.1V_FCH to +1.1V for reduce power consumption

VV V

Page15, Modify +VDDPL_11_SYS_S power source from +1.1V_FCH to +1.1V for reduce power consumption Page15, Modify +VDDAN_33_USB power source from +3V_FCH to +3V for reduce power consumption Page15, Modify +VDDPL_33_SSUSB_S power source from +3V_FCH to +3V for reduce power consumption

VV

Page15, Modify +VDDPL_33_USB_S power source from +3V_FCH to +3V for reduce power consumption

V

Page15, Modify +VDDIO_33_S power source from +3VALW to +3V_FCH for reduce power consumption

VV V

Page15, Modify +VDDAN_33_HWM power source from +3VALW to +3V_FCH for reduce power consumption

Page33, Add R2493,R2492,R2491,R2494,Q2403,Q2400,C2494,C2493 for AOAC Power Circuit Page31, U2200 add netname FCH_PWR_EN# on Pin70 for +3V & +1.1V Power Control

VV

Page36, Add R2325 from FCH_PWR_EN# to FCH_PWR_EN#_R for +3V & +1.1V Power Control

VV

Page36, Add FCH_PWR_EN#_R on Q2313.2,Q2314.2,Q2316.2,Q2309.2 for +3V & +1.1V Power Control Enable OptionNo.60 Page33, Modify JMINI1 pin1 from FCH_PCIE_WAKE# to WLAN_WAKE# for AOAC Function

VV

Page31, Add U2200 Pin119 from NC to EAPD_R for Audio FunctionNo.63

VV

VV2012/01/10

Page30, Del R2435 for component reduce

VVV

Page33, Add R2496 & reserve R2495 for RF_OFF# source option Page33, Modify JMINI1 Pin20 net name from WL_OFF# to RF_OFF# for Circuit common with Intel

Page31, Modify R2232,R2230 from 10K to 100K & Modify R2202,R2230,R2232 pull up from +3VALW_EC to +3VALW for Common Circuit with IntelNo.70

Page31, BRDID Table update for SIT Build Page31, Modify R2209 From 18K to 33K for FVT BRDID update Page26, Modify R2166 P/N from SD028330080 (33ohm) to SD034499180 (4.99K) for logo led brightness fine tune No.74

Page18, Modify C1445,C1446 P/N from SE071200JN0 to SE071200J80 for FVT SMT MemoNo.76

Page26, Add C2144,C2145 P/N SE071220J80 (22P)for FVT SMT MemoNo.78

Page36, Add Q2317 to Replace U2303 for +1.1V Power Mos layout space not enough issue Page36, Add Q2318 to Replace U2304 for +3V Power Mos layout space not enough issue

VVV

Page29, Modify R1102,R1104,R1105 BOM Structure to @ for Vendor suggestion

VV2012/01/12

Page36, Modify Q2317 & Q2318 P/N: from SB00000LQ00 to SB923050030 for VGS over spec issueNo.83 Page31,35 Modify U2200 Pin70 Net name from FCH_PWR_EN# to FCH_PWR_EN for +3V & +1.1V power control solution change

VV

Page36, Delete R2314,R2318,R2320,Q2311 for Reduce Power ConsumptionNo.86

Page31, Modify R2208 BOM Structure from POP to @ for internal pull high solutionNo.88 Page36, Modify Q2313,Q2314,U2304,C2309,C2312,C2321,R2323,R2310,R2324 to @ for +3VALW to +3V_FCH Circuit (Reduce Power Consumption) Page36, Modify Q2316,Q2309,U2303,C2317,C2320,C2318,C2319,R2322,R2317 to @ for +1.1VALW to +1.1V_FCH Circuit (Reduce Power Consumption)

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/08/10 2011/03/04

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

EE modify list

LA-7121P

Monday, January 16, 2 012

0.4

50 50

1

0.4

COMPAL LA-8124P Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual