COMPAL LA-7491P Schematics

A
ZZZ1
ZZZ1
LA-7491P
LA-7491P
DA60000N810
DA60000N810
1 1
B
C
D
E
2 2
Compal Confidential
Brazos PCW20 LA7491 Schematics Document
AMD APU Ontario-FT1+ FCH Hudson-M1
2011-03-29
3 3
REV:1.0
4 4
A
B
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2010/05/06
2010/05/06
2010/05/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics,Ltd.
Compal Electronics,Ltd.
Title
Title
Title
Size
Size
Size
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics,Ltd.
SCHEMATIC MB A7491
SCHEMATIC MB A7491
SCHEMATIC MB A7491
Document Number Rev
Document Number Rev
Document Number Rev
4019D2
4019D2
4019D2
E
13
13
13
B
B
B
6Friday, May 06, 2011
6Friday, May 06, 2011
6Friday, May 06, 2011
of
of
of
A
Compal Confidential
B
C
D
E
Model Name : File Name :
1 1
Brazos
LA7491
LVDS Conn.
page 11
AMD FUSION APU Ontario FT1
BGA-413
page5~7
Single Channel
DDR3-800/1066(1.5V) DDR3-800/1066(1.35V)
PCI-Express
DDR3-SO-DIMM X2
BANK 0, 1, 2, 3
page 8,9
HDMI
page 9
MINI Card
WLAN&BT
page 20
2 2
3 3
CRT
page 10
port 1
S-ATA ODD Conn.
page 18
port 0
S-ATA HDD Conn.
page 18
S-ATA
RTC CKT.
page 13
Power/B
Power On/Off CKT.
page 24
page 23
UMI*8
Internal clock GEN
AMD HUDSON-M1
605-BALL
LPC BUS
EC
ENE KB926D3
page 23
page12~16
3.3V 48MHz
USB
HD Audio
3.3V 24.576MHz/48Mhz
TPM
page 22
Audio Codec ALC259-GR
page 21
SPK CONN
page 22
LAN(10/100)
RTL8105E-VC-GR
page 19
RJ45
page 19
Smart Card
page 18
USB conn x3CMOS Camera
page 24page 12
Card Reader
RTS5138
page 17
3 in 1 socket
page 17
DC/DC Interface CKT.
page 25
4 4
Power Circuit DC/DC
page 26,28,29 30,31,32,33
CHARGER
page 27
A
Debug port
LED
page 24
page 19
page 21
B
Touch Pad
page 23
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
USB I/O Conn.
C
Int.KBD
BIOS
2010/05/06
2010/05/06
2010/05/06
page 23
page 23
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics,Ltd.
Compal Electronics,Ltd.
Title
Title
Title
Size
Size
Size
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics,Ltd.
SCHEMATIC MB A7491
SCHEMATIC MB A7491
Document Number Rev
Document Number Rev
Document Number Rev
SCHEMATIC MB A7491
4019D2
4019D2
4019D2
E
23
23
23
6Friday, May 06, 2011
6Friday, May 06, 2011
6Friday, May 06, 2011
of
of
of
B
B
B
A
B
C
D
E
DDR3 Voltage Rails
1 1
State
power plane
+B
+3VL
+5VL
+RTCVCC
+5VALW
+1.5V
+3VALW
+1.1VALW
+5VS +3VS +1.5VS +CPU_CORE +NB_CORE +1.8VS +0.75VS +1.1VS +1.0VS
FCH SM Bus0 address
Device
SDDIM I SDDIM II
HEX
A0 A2
1010 0000 1010 0010
EC SM Bus1 address
Device
Smart Battery
HEX HEX
16H 1001 100X b
Address
0001 011X b
FCH SM Bus1 address
Device
WLAN
HEX
EC SM Bus2 address
APU internal themal sensor
Device
AddressAddress
Address
2 2
3 3
4 4
S0
S1
S3
S5 S4/AC
S5 S4/ Battery only
S5 S4/AC & Battery don't exist
@ Reserve
CONN@
8105E@
8111E@
REAL@
VIA@
ROM@
FROM@
O O O O O
X
O O O O
X XX
ME CONNECTOR
100M LAN function
GLAN function
ALC259-GR
V1802T
not support flash ROM
Support flash ROM
OO OO
O
X XX X
X
X
TDP1_AUXP TDP1_AUXN
LTDP0_AUXP LTDP1_AUXN
DAC_SCL DAC_SDA
SIC SID
SVC SVD
SMB_FCH_CK0 SMB_FCH_DA0
SMB_FCH_CK1 SMB_FCH_DA1
SMB_EC_CK1 SMB_EC_DA1
SMB_EC_CK2 SMB_EC_DA2
SOURCE
APU
APU
APU
APU
APU
FCH
FCH
EC
EC
POWER PLAN
+3VS
+3VS
+3VS
+3VS
+1.8VS
+3VS
+3VALW
+5VALW
+3VS
HDMI
V
LVDS CRT FCH
V +5VS
V +5VS
V +3VALW
CPU CORE
V
SDDIM I/II
V
BATTWLAN
APU
V
V
V
A
B
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2009/05/06
2009/05/06
2009/05/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7491
SCHEMATIC MB A7491
Document Number Rev
Document Number Rev
Document Number Rev
SCHEMATIC MB A7491
4019D2
4019D2
4019D2
E
33
33
33
B
B
B
6Friday, May 06, 2011
6Friday, May 06, 2011
6Friday, May 06, 2011
of
of
of
A
B
C
D
E
1 1
B+
UP618CQAG
2 2
RT8209BGQW
ISL6265AH RTZ
3 3
RT8209BGQW
POWER MAP
POK
VR_ON
SYSON
SUSP#
SY8033BDBC
SUSP#
SI4800BDY
EN_WOL#
AP2301GN
SUSP#
SI4800BDY
1.1VSON#
IRF8113PBF
SUSP#
STS11N3LLH5
SUSP#
SI4800BDY
SUSP
VDTT11V8
ENVDD
SI4800BDY
+3VL
+5VL +3VALW +5VALW
+1.8VS
+5VS
+3V_LAN
+3VS
+LCDVDD
+1.1VALW
+1.1VS
+1.0VS
+CPU_CORE
+CPU_CORE_NB
+1.5V
+1.5VS
+0.75VS
VIN B+
+3VL
+3VALW,+5VALW
+1.1VALW
EC->FCH
EC->FCH
FCH->EC
EC->PWR
ON/OFFBTN#
EC_RSMRST#
PBTN_OUT#
FCH_SLP_S5#
SYSON
NOTE1
T1
T2
+1.5V
FCH->EC
EC->PWR
FCH_SLP_S3#
SUSP#
+3VS,+5VS,+0.75VS
+1.8VS
EC->PWR
+1.1VS_ON
+1.1VS
EC->PWR
PWR->EC
EC->FCH
EC->FCH
FCH->APU
FCH->DEVICE
FCH->APU
NOTE1:
NOTE2: EC_FCH_PWROK rise time(10% to 90%)<50ms
VR_ON
+CPU_CORE +CPU_CORE_NB
VGATE
EC_FCH_PWROK
KB_RST#
APU_PWRGD
A_RST#
LDT_RST#
RSMRST# rise time(10% to 90%)<50ms fail time<1ms
fail time<1ms
POWER SEQUENCE
T3
T4
T5
T6
NOTE2
T7
T1>10ms, +3VALW to RSMRST#
T2>100ms, RSMRST# to PBTN_OUT#
T3>100ns, PBTN_OUT# to SLP_S5#
T4>10ms, SLP_S5# to SYSON
The same with SLP_S5#
T5>10ms, SYSON to SUSP#
T6>100ms, SUSP# to VR_ON
T7>50ms, VGATE to EC_FCH_PWROK
T8
T9
98ms>T7>150ms, EC_FCH_PWROK to APU_PWRGD
101ms>T7>113ms, EC_FCH_PWROK to A_RST#
4 4
A
B
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2010/05/06
2010/05/06
2010/05/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics,Ltd.
Compal Electronics,Ltd.
Title
Title
Title
Size
Size
Size
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics,Ltd.
SCHEMATIC MB A7491
SCHEMATIC MB A7491
Document Number Rev
Document Number Rev
Document Number Rev
4019D2
4019D2
4019D2
SCHEMATIC MB A7491
43
43
43
E
B
B
B
6Friday, May 06, 2011
6Friday, May 06, 2011
6Friday, May 06, 2011
of
of
of
5
+1.8VS
R74
R74 R1
R1 R2
R2 R3
R3 R4
R4 R6
R6 R7
R7
D D
R333
R333
+3VS
R64
R64 R14
R14 R16
R16 R17
R17 R18
R18 R19
R19 R21
R21 R22
R22
R26
C C
R26 R27
R27 R28
R28 R29
R29 R30
R30 R31
R31
1 2 1 2 1 2 1 2 1 2 1 2 1 2
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
1 2
1K_0402_5%
1K_0402_5%
12
1K_0402_5%
1K_0402_5% 1K_0402_5%
1K_0402_5% 1K_0402_5%
1K_0402_5% 300_0402_5%
300_0402_5% 300_0402_5%
300_0402_5% 510_0402_1%
510_0402_1% 1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5% 1K_0402_5%
1K_0402_5% 1K_0402_5%@
1K_0402_5%@ 1K_0402_5%@
1K_0402_5%@
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
1K_0402_5%
1K_0402_5%
12
1K_0402_5%
1K_0402_5%
12
510_0402_1%
510_0402_1% 1K_0402_5%@
1K_0402_5%@
12
1K_0402_5%
1K_0402_5%
12
1K_0402_5%@
1K_0402_5%@
12
TEST_35 APU_LDT_STP# APU_SVC APU_SVD LDT_RST# APU_PWRGD TEST_25_L TEST_36
APU_ALERT#_R APU_PROCHOT APU_SIC APU_SID
HDMI_DAT
HDMI_SCL
LVDS_DAT
LVDS_SCL
TEST_18 TEST_19
TEST_25_H TEST_35 TEST_15
APU_LDT_STP#
LDT_RST#<14>
APU_PWRGD<14> APU_PROCHOT_FCH#<14> APU_PROCHOT_EC#<23>
APU_ALERT#<13>
LVDS_CLK+<12> LVDS_CLK-<12>
VDDCR_NB_SENSE_H<35>
VDDCR_APU_SENSE_H<35>
VDDCR_NB_SENSE_L<35> VDDCR_APU_SENSE_L<35>
4
U1B
U1B
HDMI_TX2+<10>
HDMI_TX2-<10>
HDMI_TX1+<10>
HDMI_TX1-<10>
HDMI_TX0+<10>
HDMI_TX0-<10>
HDMI_CLK+<10> HDMI_CLK-<10>
LVDS_TX2+<12> LVDS_TX2-<12>
LVDS_TX1+<12> LVDS_TX1-<12>
LVDS_TX0+<12> LVDS_TX0-<12>
CLK_APU<14>
CLK_APU#<14>
CLK_APU_DP<14>
CLK_APU_DP#<14>
APU_SVC<35>
R23
R23 R24
R24 R35
R35 R45
R45
R63
R63
APU_SVD<35>
0_0402_5%
0_0402_5% 0_0402_5%
0_0402_5% 1 2 1 2
0_0402_5%
0_0402_5%
APU_TDI APU_TDO APU_TCLK APU_TMS APU_TRST# DBRDY DBREQ#
T28
T28
1 2 1 2
0_0402_5%@
0_0402_5%@ 0_0402_5%
0_0402_5%
1 2
R271
R271
1 2
R272
R272
1 2
PAD
PAD R273
R273
1 2
R274
R274
1 2
APU_SIC APU_SID
LDT_RST#_R APU_PWRGD_R
APU_PROCHOT
APU_THERMTRIP#_R
APU_ALERT#_R
0_0402_5%
0_0402_5% 0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5% 0_0402_5%
0_0402_5%
A8
TDP1_TXP0
B8
TDP1_TXN0
B9
TDP1_TXP1
A9
TDP1_TXN1
D10
TDP1_TXP2
C10
TDP1_TXN2
A10
TDP1_TXP3
B10
TDP1_TXN3
B5
LTDP0_TXP0
A5
LTDP0_TXN0
D6
LTDP0_TXP1
C6
LTDP0_TXN1
A6
LTDP0_TXP2
B6
LTDP0_TXN2
D8
LTDP0_TXP3
C8
LTDP0_TXN3
V2
CLKIN_H
V1
CLKIN_L
D2
DISP_CLKIN_H
D1
DISP_CLKIN_L
J1
SVC
J2
SVD
P3
SIC
P4
SID
T3
RESET_L
T4
PWROK
U1
PROCHOT_L
U2
THERMTRIP_L
T2
ALERT_L
N2
TDI
N1
TDO
P1
TCK
P2
TMS
M4
TRST_L
M3
DBRDY
M1
DBREQ_L
F4
VDDCR_NB_SENSE
G1
VDDCR_CPU_SENSE
F3
VDDIO_MEM_S_SENSE
F1
VSS_SENSE
B4
RSVD_1
W11
RSVD_2
V5
RSVD_3
ONTARIO-2M161000-1.6G_BGA413
ONTARIO-2M161000-1.6G_BGA413 @
@
DISPLAYPORT 1
DISPLAYPORT 1
DISPLAYPORT 0
DISPLAYPORT 0
CLK
CLK
SER
SER
JTAG CTRL
JTAG CTRL
3
DP MISC
DP MISC
AC
AC
VGA D
VGA D
TEST
TEST
DP_ZVSS DP_BLON
DP_DIGON
DP_VARY_BL
TDP1_AUXP TDP1_AUXN
TDP1_HPD
LTDP0_AUXP LTDP0_AUXN
LTDP0_HPD
DAC_RED
DAC_REDB
DAC_GREEN
DAC_GREENB
DAC_BLUE
DAC_BLUEB
DAC_HSYNC DAC_VSYNC
DAC_SCL DAC_SDA
DAC_ZVSS
TEST4 TEST5
TEST6 TEST14 TEST15 TEST16 TEST17 TEST18 TEST19
TEST25_H TEST25_L TEST28_H TEST28_L
TEST31
TEST33_H TEST33_L TEST34_H TEST34_L
TEST35 TEST36 TEST37
TEST38
DMAACTIVE_L
2
0.1U_0402_16V4Z
TEST_33_H
C1
C1
TEST_33_L
C2
150_0402_1%
1 2
ENBKL ENVDD INV_PWM
HDMI_SCL
HDMI_DAT
LVDS_SCL
LVDS_DAT
100K_0402_5%
100K_0402_5%
12
150_0402_1%
150_0402_1%
150_0402_1%
150_0402_1%
150_0402_1%
150_0402_1%
CRT_HSYNC
CRT_DDC_CLK
CRT_DDC_DATA
1 2
APU_LDT_STP#
150_0402_1%
<12> <12>
<12>
HDMI_HPD
CRT_VSYNC
499_0402_1%
499_0402_1%
PADT1PAD
T1
PADT2PAD
T2
PADT4PAD
T4
PADT5PAD
T5
PADT6PAD
T6
PADT7PAD
T7
PADT9PAD
T9
PADT8PAD
T8
PAD
PAD
T10
T10
PAD
PAD
T11
T11
PAD
PAD
T13
T13
<10>
<12>
<10>
<12>
<10>
<14>
<11> <11>
<11>
<11>
CRT_R CRT_G
CRT_B
<11> <11>
<11>
R8
R10
R10
R12
R12 R13
R13 R15
R15
TEST_18 TEST_19 TEST_25_H TEST_25_L TEST_28_H TEST_28_L TEST_31 TEST_33_H TEST_33_L TEST_34_H TEST_34_L TEST_35 TEST_36 TEST_37
R8
1 2 1 2 1 2
R20
R20
TEST_4 TEST_5
TEST_14 TEST_15 TEST_16 TEST_17
H3 G2
H2 H1
B2 C2
C1 A3
B3 D3 C12
D13 A12 B12 A13 B13
E1 E2
F2 D4
D12 R1
R2 R6 T5 E4 K4 L1 L2 M2 K1 K2 L5 M5 M21 J18 J19 U15 T15 H4 N5 R5
K3 T1
C2
EN_FAN1<23>
FAN_SPEED1<23>
0.1U_0402_16V4Z
1 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 2
+VCC_FAN1
C4
C4
10U_0805_6.3V6M
10U_0805_6.3V6M
+5VS
1
2
+3VS
12
R32
R32 10K_0402_5%
10K_0402_5%
1
C7
C7 1000P_0402_50V7K
1000P_0402_50V7K
2
R5
R5
1 2
R9
R9
1 2
1A
10U_0805_10V4Z
10U_0805_10V4Z
U2
U2 1 2 3 4
G996RD1U_TDFN8_3X3
G996RD1U_TDFN8_3X3
+VCC_FAN1
VEN VIN VO VSET
40mil
C3
C3
1 2
Thermal Pad
1
51_0402_1%
51_0402_1%
51_0402_1%
51_0402_1%
9 8
GND
7
GND
6
GND
5
GND
@ C6
@
1000P_0402_50V7K
1000P_0402_50V7K
ACES_85205-03001
ACES_85205-03001
C6
1 2
JFAN
JFAN
1 2 3
4 5
CONN@
CONN@
1 2 3
GND GND
U1
1.5G@U1
U1
1.6G@U1
+3VS
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
APU_SIC
B B
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
APU_SID
A A
5
4
Q1B
R366
R366
1 2
0_0402_5%
0_0402_5%
+3VS
Q1A
R367
R367
1 2
0_0402_5%
0_0402_5%
R25
R25 1K_0402_5%
1K_0402_5%
APU_THERMTRIP#_R
@
@ R302
R302
0_0402_5%
0_0402_5%
1 2
3
@Q1B
@
R364
R364
0_0402_5%
0_0402_5%
1 2
2
@
@ R363
R363
0_0402_5%
61
@Q1A
@
1 2
0_0402_5%
1 2
R365
R365
0_0402_5%
0_0402_5%
1 2
+3VS
12
R70
R70 10K_0402_5%
10K_0402_5%
B
B
2
E
E
3 1
C
C
Q212
Q212 MMBT3904_NL_SOT23-3
MMBT3904_NL_SOT23-3
R368
R368
0_0402_5%
0_0402_5%
1 2
@
@
SCL3_LV
EC_SMB_CK2
SDA3_LV
EC_SMB_DA2
<15>
<15>
<23>
<23>
FCH
EC
FCH
EC
APU_THERMTRIP#
<15>
1.6G@
1.6G
1.6G
R33
R33
1K_0402_5%
1K_0402_5%
1.5G@
1.5G
1.5G
+1.8VS+1.8VS
1 2
0_0402_5%
0_0402_5%
R38
R38
1 2
R39
R39 R40
R40 R41
R41
APU_TRST#_RAPU_TRST#
12
10K_0402_5%
10K_0402_5%
12
10K_0402_5%
10K_0402_5%
12
10K_0402_5%
10K_0402_5%
U1
1.2G@U1
1.2G@
1.2G
1.2G
U1
1.0G@U1
1.0G@
1.0G
1.0G
HDT CONNECTOR AMD APU DEBUG PORT
JP1
CONN@JP1
CONN@
1
1
2
3
3
4
5
5
6
7
7
8
9
9
10
11
11
12
13
13
14
15
15
16
17
17
18
19
19
20
SAMTE_ASP-136446-07-B
SAMTE_ASP-136446-07-B
APU_TCLK
2
APU_TMS
4
APU_TDI
6
APU_TDO
8
APU_PWRGD
10
LDT_RST#
12
DBRDY
14
DBREQ#
16
J108_PLLTST0
18
J108_PLLTST1
20
R34
R34 R36
R36 R37
R37
R42
R42 R43
R43 R44
R44
1 2 1 2 1 2
1K_0402_5%
1K_0402_5%
12
1K_0402_5%
1K_0402_5%
12
1K_0402_5%
1K_0402_5%
12
300_0402_5%
300_0402_5% 0_0402_5%
0_0402_5% 0_0402_5%
0_0402_5%
TEST_19 TEST_18
+1.8VS
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2009/05/06
2009/05/06
2009/05/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7491
SCHEMATIC MB A7491
SCHEMATIC MB A7491
Document Number Rev
Document Number Rev
Document Number Rev
4019D2
4019D2
4019D2
1
53
53
53
B
B
B
of
of
of
6Friday, May 06, 2011
6Friday, May 06, 2011
6Friday, May 06, 2011
5
DDR_D[0..63]<8,9> DDR_DM[0..7]<8,9> DDR_DQS#[0..7]<8,9> DDR_DQS[0..7]<8,9> DDR_MA[0..15]<8,9>
DDR_MA0 DDR_MA1 DDR_MA2
D D
DDR_BS0<8,9> DDR_BS1<8,9> DDR_BS2<8,9>
C C
DDR_A_CLK0<8>
DDR_A_CLK0#<8>
DDR_A_CLK1<8>
DDR_A_CLK1#<8>
DDR_B_CLK0<9>
DDR_B_CLK0#<9>
DDR_B_CLK1<9>
DDR_B_CLK1#<9>
DDR_RST#<8,9> DDR_EVENT#<8,9>
DDR_CKE0<8,9> DDR_CKE1<8,9>
DDR_A_ODT0<8> DDR_A_ODT1<8>
B B
DDR_B_ODT0<9> DDR_B_ODT1<9>
DDR_A_CS0#<8> DDR_A_CS1#<8> DDR_B_CS0#<9> DDR_B_CS1#<9>
DDR_RAS#<8,9> DDR_CAS#<8,9> DDR_WE#<8,9>
DDR_MA3 DDR_MA4 DDR_MA5 DDR_MA6 DDR_MA7 DDR_MA8 DDR_MA9 DDR_MA10 DDR_MA11 DDR_MA12 DDR_MA13 DDR_MA14 DDR_MA15
DDR_DM0 DDR_DM1 DDR_DM2 DDR_DM3 DDR_DM4 DDR_DM5 DDR_DM6 DDR_DM7
DDR_DQS0 DDR_DQS#0 DDR_DQS1 DDR_DQS#1 DDR_DQS2 DDR_DQS#2 DDR_DQS3 DDR_DQS#3 DDR_DQS4 DDR_DQS#4 DDR_DQS5 DDR_DQS#5 DDR_DQS6 DDR_DQS#6 DDR_DQS7 DDR_DQS#7
U1E
U1E
R17
M_ADD0
H19
M_ADD1
J17
M_ADD2
H18
M_ADD3
H17
M_ADD4
G17
M_ADD5
H15
M_ADD6
G18
M_ADD7
F19
M_ADD8
E19
M_ADD9
T19
M_ADD10
F17
M_ADD11
E18
M_ADD12
W17
M_ADD13
E16
M_ADD14
G15
M_ADD15
R18
M_BANK0
T18
M_BANK1
F16
M_BANK2
D15
M_DM0
B19
M_DM1
D21
M_DM2
H22
M_DM3
P23
M_DM4
V23
M_DM5
AB20
M_DM6
AA16
M_DM7
A16
M_DQS_H0
B16
M_DQS_L0
B20
M_DQS_H1
A20
M_DQS_L1
E23
M_DQS_H2
E22
M_DQS_L2
J22
M_DQS_H3
J23
M_DQS_L3
R22
M_DQS_H4
P22
M_DQS_L4
W22
M_DQS_H5
V22
M_DQS_L5
AC20
M_DQS_H6
AC21
M_DQS_L6
AB16
M_DQS_H7
AC16
M_DQS_L7
M17
M_CLK_H0
M16
M_CLK_L0
M19
M_CLK_H1
M18
M_CLK_L1
N18
M_CLK_H2
N19
M_CLK_L2
L18
M_CLK_H3
L17
M_CLK_L3
L23
M_RESET_L
N17
M_EVENT_L
F15
M_CKE0
E15
M_CKE1
W19
M0_ODT0
V15
M0_ODT1
U19
M1_ODT0
W15
M1_ODT1
T17
M0_CS_L0
W16
M0_CS_L1
U17
M1_CS_L0
V16
M1_CS_L1
U18
M_RAS_L
V19
M_CAS_L
V17
M_WE_L
ONTARIO-2M161000-1.6G_BGA413 @
ONTARIO-2M161000-1.6G_BGA413 @
DDR SYSTEM MEMORY
DDR SYSTEM MEMORY
M_ZVDDIO_MEM_S
M_DATA0 M_DATA1 M_DATA2 M_DATA3 M_DATA4 M_DATA5 M_DATA6 M_DATA7
M_DATA8
M_DATA9 M_DATA10 M_DATA11 M_DATA12 M_DATA13 M_DATA14 M_DATA15
M_DATA16 M_DATA17 M_DATA18 M_DATA19 M_DATA20 M_DATA21 M_DATA22 M_DATA23
M_DATA24 M_DATA25 M_DATA26 M_DATA27 M_DATA28 M_DATA29 M_DATA30 M_DATA31
M_DATA32 M_DATA33 M_DATA34 M_DATA35 M_DATA36 M_DATA37 M_DATA38 M_DATA39
M_DATA40 M_DATA41 M_DATA42 M_DATA43 M_DATA44 M_DATA45 M_DATA46 M_DATA47
M_DATA48 M_DATA49 M_DATA50 M_DATA51 M_DATA52 M_DATA53 M_DATA54 M_DATA55
M_DATA56 M_DATA57 M_DATA58 M_DATA59 M_DATA60 M_DATA61 M_DATA62 M_DATA63
M_VREF
4
DDR_D0
B14
DDR_D1
A15
DDR_D2
A17
DDR_D3
D18
DDR_D4
A14
DDR_D5
C14
DDR_D6
C16
DDR_D7
D16
DDR_D8
C18
DDR_D9
A19
DDR_D10
B21
DDR_D11
D20
DDR_D12
A18
DDR_D13
B18
DDR_D14
A21
DDR_D15
C20
DDR_D16
C23
DDR_D17
D23
DDR_D18
F23
DDR_D19
F22
DDR_D20
C22
DDR_D21
D22
DDR_D22
F20
DDR_D23
F21
DDR_D24
H21
DDR_D25
H23
DDR_D26
K22
DDR_D27
K21
DDR_D28
G23
DDR_D29
H20
DDR_D30
K20
DDR_D31
K23
DDR_D32
N23
DDR_D33
P21
DDR_D34
T20
DDR_D35
T23
DDR_D36
M20
DDR_D37
P20
DDR_D38
R23
DDR_D39
T22
DDR_D40
V20
DDR_D41
V21
DDR_D42
Y23
DDR_D43
Y22
DDR_D44
T21
DDR_D45
U23
DDR_D46
W23
DDR_D47
Y21
DDR_D48
Y20
DDR_D49
AB22
DDR_D50
AC19
DDR_D51
AA18
DDR_D52
AA23
DDR_D53
AA20
DDR_D54
AB19
DDR_D55
Y18
DDR_D56
AC17
DDR_D57
Y16
DDR_D58
AB14
DDR_D59
AC14
DDR_D60
AC18
DDR_D61
AB18
DDR_D62
AB15
DDR_D63
AC15
M23
R49 39.2_0402_1%R49 39.2_0402_1%
M22
1 2
+1.5V
3
U1A
U1A
AA6
P_GPP_RXP0
Y6
P_GPP_RXN0
PCIE_PRX_C_USB30TX_P4<25> PCIE_PRX_C_USB30TX_N4<25>
PCIE_PTX_C_IRX_P2<19> PCIE_PTX_C_IRX_N2<19>
+1.0VS
PCIE_PTX_C_IRX_P3<20> PCIE_PTX_C_IRX_N3<20>
R46 2K_0402_1%R46 2K_0402_1%
1 2
UMI_C_RXP0 UMI_C_RXN0
UMI_C_RXP1 UMI_C_RXN1
UMI_C_RXP2 UMI_C_RXN2
UMI_C_RXP3 UMI_C_RXN3
+1.5V
WLAN WLAN
+M_VREF
AB4 AC4
AA1 AA2
Y14
AA12
Y12
AA10
Y10
AB10 AC10
AC7 AB7
+M_VREF
1
C428
C428
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
P_GPP_RXP1 P_GPP_RXN1
P_GPP_RXP2 P_GPP_RXN2
Y4
P_GPP_RXP3
Y3
P_GPP_RXN3 P_ZVDD_10
P_UMI_RXP0 P_UMI_RXN0
P_UMI_RXP1 P_UMI_RXN1
P_UMI_RXP2 P_UMI_RXN2
P_UMI_RXP3 P_UMI_RXN3
ONTARIO-2M161000-1.6G_BGA413 @
ONTARIO-2M161000-1.6G_BGA413 @
1000P_0402_50V7K
1000P_0402_50V7K
1
C172
C172
2
+1.5V
12
12
R50
R50 1K_0402_1%
1K_0402_1%
P_GPP_TXP0 P_GPP_TXN0
P_GPP_TXP1 P_GPP_TXN1
P_GPP_TXP2 P_GPP_TXN2
P_GPP_TXP3
PCIE I/F
PCIE I/F
P_GPP_TXN3
P_UMI_TXP0 P_UMI_TXN0
P_UMI_TXP1 P_UMI_TXN1
P_UMI_TXP2 P_UMI_TXN2
UMI I/F
UMI I/F
P_UMI_TXP3 P_UMI_TXN3
R48
R48 1K_0402_1%
1K_0402_1%
P_ZVSS
2
UMI_C_TXP[0..3]<14> UMI_C_TXN[0..3]<14>
UMI_C_RXP[0..3]<14> UMI_C_RXN[0..3]<14>
AB6 AC6
PCIE_ITX_PRX_P1
AB3
PCIE_ITX_PRX_N1
AC3
PCIE_ITX_PRX_P2
Y1
PCIE_ITX_PRX_N2
Y2
PCIE_ITX_PRX_P3
V3
PCIE_ITX_PRX_N3
V4
R47 1.27K_0402_1%R47 1.27K_0402_1%
AA14
1 2
UMI_TXP0
AB12 AC12
AC11 AB11
AA8 Y8
AB8 AC8
C9 0.1U_0402_16V7KC9 0.1U_0402_16V7K
UMI_TXN0 UMI_TXP1
UMI_TXN1 UMI_TXP2
UMI_TXN2 UMI_TXP3
UMI_TXN3
1 2
C10 0.1U_0402_16V7KC10 0.1U_0402_16V7K
1 2
C11 0.1U_0402_16V7KC11 0.1U_0402_16V7K
1 2
C12 0.1U_0402_16V7KC12 0.1U_0402_16V7K
1 2
C13 0.1U_0402_16V7KC13 0.1U_0402_16V7K
1 2
C14 0.1U_0402_16V7KC14 0.1U_0402_16V7K
1 2
C15 0.1U_0402_16V7KC15 0.1U_0402_16V7K
1 2
C16 0.1U_0402_16V7KC16 0.1U_0402_16V7K
1 2
USB3.0@
USB3.0@ C441 0.1U_0402_16V7K
C441 0.1U_0402_16V7K
1 2
C442 0.1U_0402_16V7K
C442 0.1U_0402_16V7K
1 2
USB3.0@
USB3.0@ C338 0.1U_0402_16V7KC338 0.1U_0402_16V7K
1 2
C339 0.1U_0402_16V7KC339 0.1U_0402_16V7K
1 2
C340 0.1U_0402_16V7KC340 0.1U_0402_16V7K
1 2
C341 0.1U_0402_16V7KC341 0.1U_0402_16V7K
1 2
UMI_C_TXP0 UMI_C_TXN0
UMI_C_TXP1 UMI_C_TXN1
UMI_C_TXP2 UMI_C_TXN2
UMI_C_TXP3 UMI_C_TXN3
1
PCIE_PTX_C_USB30RX_P4 <25> PCIE_PTX_C_USB30RX_N4 <25>
PCIE_ITX_C_PRX_P2 <19> PCIE_ITX_C_PRX_N2 <19>
PCIE_ITX_C_PRX_P3 <20> PCIE_ITX_C_PRX_N3 <20>
USB3.0USB3.0 LANLAN
DDR_EVENT# DDR_RST#
A A
5
R51 1K_0402_1%R51 1K_0402_1% R69 1K_0402_1%
R69 1K_0402_1% @
@
12 12
4
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/05/06
2010/05/06
2010/05/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7491
SCHEMATIC MB A7491
SCHEMATIC MB A7491
4019D2
4019D2
4019D2
1
of
of
of
636Friday, May 06, 2011
636Friday, May 06, 2011
636Friday, May 06, 2011
B
B
B
5
4
3
2
+CPU_CORE
1
+CPU_CORE
1
C39
C39
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
C56
C56
2
1
C65
C65
2
C76
C76
Deciphered Date
Deciphered Date
Deciphered Date
+CPU_CORE
1
C929
C929 @
@
2
180P_0402_50V8J
180P_0402_50V8J
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
C40
C40
2
ESR:9ohm(MAX)
1
1
+
+
+
+
C57
C57
2
2
@
@
330U_D2_2.5VY_R9M
330U_D2_2.5VY_R9M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
C66
C66
2
+1.5V
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C77
C77
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
2
+CPU_CORE
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C29
C29
2
C41
C41
1U_0402_6.3V4Z
1U_0402_6.3V4Z
330U_D2_2.5VY_R9M
330U_D2_2.5VY_R9M
1
C67
C67
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
2
2
C930
C930 @
@
180P_0402_50V8J
180P_0402_50V8J
C30
C30
10U_0805_6.3V6M
10U_0805_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+1.5V
180P_0402_50V8J
180P_0402_50V8J
C78
C78
C42
C42
C68
C68
1
2
1
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C31
C31
2
1
2
10U_0805_6.3V6M
10U_0805_6.3V6M
C58
C58
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
C933
C933 @
@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
C79
C79
1
+
+
C25
C25
C24
C24
2
330U_D2_2.5VY_R9M
330U_D2_2.5VY_R9M
+
+
+
+
C26
C26
2
2
330U_D2_2.5VY_R9M
330U_D2_2.5VY_R9M
330U_D2_2.5VY_R9M
330U_D2_2.5VY_R9M
1
1
ESR:9ohm(MAX)
10U_0805_6.3V6M
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C46
C46
2
C932
C932 @
@
180P_0402_50V8J
180P_0402_50V8J
1
C61
C61
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C72
C72
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C83
C83
2
1
10U_0805_6.3V6M
C35
C35
C47
C47
10U_0805_6.3V6M
10U_0805_6.3V6M
C62
C62
C73
C73
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
736Friday, May 06, 2011
736Friday, May 06, 2011
736Friday, May 06, 2011
10U_0805_6.3V6M
10U_0805_6.3V6M
1
2
C43
C43
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+CPU_CORE_NB
1
2
1
C69
C69
2
1
2
1
2
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
1
C32
C32
2
10U_0805_6.3V6M
10U_0805_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C44
C44
2
+CPU_CORE_NB
180P_0402_50V8J
180P_0402_50V8J
C59
C59
10U_0805_6.3V6M
10U_0805_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C70
C70
2
C934
C934
@
@
180P_0402_50V8J
180P_0402_50V8J
1
C80
C80
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
Title
Title
Title
SCHEMATIC MB A7491
SCHEMATIC MB A7491
SCHEMATIC MB A7491
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
4019D2
4019D2
4019D2
1
C34
2
1
C45
C45
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C60
C60
2
1
C71
C71
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C82
C82
2
C34
10U_0805_6.3V6M
10U_0805_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C33
C33
1
2
1
C931
C931 @
@
2
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
C81
C81
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
1
2
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
1
2
C84
C84
of
of
of
1
2
B
B
B
+CPU_CORE
U1C
U1C
11000mA
E5
VDDCR_CPU_1
E6
VDDCR_CPU_2
F5
VDDCR_CPU_3
F7
D D
+CPU_CORE_NB
10000mA
C C
+1.5V
2000mA
B B
A A
VDDCR_CPU_4
G6
VDDCR_CPU_5
G8
VDDCR_CPU_6
H5
VDDCR_CPU_7
H7
VDDCR_CPU_8
J6
VDDCR_CPU_9
J8
VDDCR_CPU_10
L7
VDDCR_CPU_11
M6
VDDCR_CPU_12
M8
VDDCR_CPU_13
N7
VDDCR_CPU_14
R8
VDDCR_CPU_15
E8
VDDCR_NB_1
E11
VDDCR_NB_2
E13
VDDCR_NB_3
F9
VDDCR_NB_4
F12
VDDCR_NB_5
G11
VDDCR_NB_6
G13
VDDCR_NB_7
H9
VDDCR_NB_8
H12
VDDCR_NB_9
K11
VDDCR_NB_10
K13
VDDCR_NB_11
L10
VDDCR_NB_12
L12
VDDCR_NB_13
L14
VDDCR_NB_14
M11
VDDCR_NB_15
M12
VDDCR_NB_16
M13
VDDCR_NB_17
N10
VDDCR_NB_18
N12
VDDCR_NB_19
N14
VDDCR_NB_20
P11
VDDCR_NB_21
P13
VDDCR_NB_22
G16
VDDIO_MEM_S_1
G19
VDDIO_MEM_S_2
E17
VDDIO_MEM_S_3
J16
VDDIO_MEM_S_4
L16
VDDIO_MEM_S_5
L19
VDDIO_MEM_S_6
N16
VDDIO_MEM_S_7
R16
VDDIO_MEM_S_8
R19
VDDIO_MEM_S_9
W18
VDDIO_MEM_S_10
U16
VDDIO_MEM_S_11
ONTARIO-2M161000-1.6G_BGA413
ONTARIO-2M161000-1.6G_BGA413
@
@
U1D
U1D
A7
VSS_1
B7
VSS_2
B11
VSS_3
B17
VSS_4
B22
VSS_5
C4
VSS_6
D5
VSS_7
D7
VSS_8
D9
VSS_9
D11
VSS_10
D14
VSS_11
B15
VSS_12
D17
VSS_13
D19
VSS_14
E7
VSS_15
E9
VSS_16
E12
VSS_17
E20
VSS_18
F8
VSS_19
F11
VSS_20
F13
VSS_21
G4
VSS_22
G5
VSS_23
G7
VSS_24
G9
VSS_25
G12
VSS_26
G20
VSS_27
G22
VSS_28
H6
VSS_29
H11
VSS_30
H13
VSS_31
J4
VSS_32
J5
VSS_33
J7
VSS_34
J20
VSS_35
K10
VSS_36
K14
VSS_37
L4
VSS_38
L6
VSS_39
L8
VSS_40
L11
VSS_41
L13
VSS_42
L20
VSS_43
L22
VSS_44
M7
VSS_45
N4
VSS_46
N6
VSS_47
N8
VSS_48
N11
VSS_49
ONTARIO-2M161000-1.6G_BGA413
ONTARIO-2M161000-1.6G_BGA413
@
@
5
TSense/PLL/DP/PCIE/IO
TSense/PLL/DP/PCIE/IO
CPU CORE
CPU CORE
DAC
DAC
VDD_18_DAC
GPU AND NB CORE
GPU AND NB CORE
POWER
POWER
PCIE/IO/DDR3 Phy
PCIE/IO/DDR3 Phy
DDR3
DDR3
VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63
GND
GND
VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97
VSSBG_DAC
VDD_18_1 VDD_18_2 VDD_18_3 VDD_18_4 VDD_18_5 VDD_18_6 VDD_18_7
DIS PLL
DIS PLL
VDDPL_10
VDD_10_1 VDD_10_2 VDD_10_3 VDD_10_4
DP Phy/IO
DP Phy/IO
VDD_33
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2000mA
180P_0402_50V8J
180P_0402_50V8J
U8 W8 U6 U9 W6 T7 V7
150mA
W9
180P_0402_50V8J
180P_0402_50V8J
200mA
180P_0402_50V8J
180P_0402_50V8J
U11
C936
C936
@
@
5500mA
U13 W13 V12 T12
180P_0402_50V8J
180P_0402_50V8J
500mA
A4
C167
C167
N13 N20 N22 P10 P14 R4 R7 R20 T6 T9 T11 T13 U4 U5 U7 U12 U20 U22 V8 V9 V11 V13 W1 W2 W4 W5 W7 W12 W20 Y5 Y7 Y9 Y11 Y13 Y15 Y17 Y19 AA4 AA22 AB2 AB5 AB9 AB13 AB17 AB21 AC5 AC9 AC13 A11
1
1
C426
C426
@
@
2
2
C939
C939
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
C28
C28
C938
C938
@
@
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
1
C38
C38
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C52
C52
C937
C937
@
@
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3VS
1
1
C54 1U_0402_6.3V4ZC54 1U_0402_6.3V4Z
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
C20
C20
2
1
2
1
C37
C37
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
C53
C53
2
4
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
C21
C21
C19
C19
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+1.8VS_DAC
C27
C27
+1.0VS_VDDPL
C36
C36
C50
C50
220次_3A DCR:0.04
L2
L2
1 2
1
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
10U_0805_6.3V6M
10U_0805_6.3V6M
2
220次_3A DCR:0.04
L3
L3
1 2
1
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
10U_0805_6.3V6M
10U_0805_6.3V6M
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
1
C51
C51
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
220U_D2_4VM_R15
220U_D2_4VM_R15
330U_D2_2.5VY_R9M
330U_D2_2.5VY_R9M
1
C17
C17
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C48
C48
2
+1.0VS
1
+
+
C63
C63
2
+1.5V
+1.8VS_VDD
1
2
+1.0VS_VDD
C49
C49
C74
C74
120次_5A DCR:0.02
L1
L1
1 2
FBMA-L11-201209-121LMA50
FBMA-L11-201209-121LMA50
1
C18
C18
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
+1.8VS
@+C23
@
+1.8VS
+1.8VS
1
C23
+
2
330U_D2_2.5VY_R9M
330U_D2_2.5VY_R9M
1
C22
C22
+
+
2
330U_D2_2.5VY_R9M
330U_D2_2.5VY_R9M
ESR:17ohm(MAX)
+1.0VS
120次_5A DCR:0.02
L4
L4
1 2
FBMA-L11-201209-121LMA50
FBMA-L11-201209-121LMA50
1
10U_0805_6.3V6M
10U_0805_6.3V6M
2
+1.0VS
+CPU_CORE_NB
C55
C55
10U_0805_6.3V6M
10U_0805_6.3V6M
ESR:9ohm(MAX)
1
C64
C64
10U_0805_6.3V6M@
10U_0805_6.3V6M@
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+CPU_CORE_NB
ESR:9ohm(MAX)
1
+
+
2
1
C75
@C75
@ 10U_0805_6.3V6M
10U_0805_6.3V6M
2
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/05/06
2010/05/06
2010/05/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
5
+1.5V
12
R53
R53
1K_0402_1%
1K_0402_1%
12
D D
+V_DDR3_DIMM_REF
+V_DDR3_DIMM_REF
R54
R54 1K_0402_1%
1K_0402_1%
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Layout Note: Place near JDDR1
Layout Note: Place these 4 Caps near Command and Control signals of DIMMA
10U_0603_6.3V6M
1
C95
C95
2
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
1
2
10U_0603_6.3V6M
C96
C96
1
2
10U_0603_6.3V6M
10U_0603_6.3V6M
1
C94
C94
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
C108
C108
2
2
1
2
C109
C109
10U_0805_6.3V6M
10U_0805_6.3V6M
C105
C105
+1.5V
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
C92
C92
2
2
+0.75VS
1U_0402_6.3V6K
1U_0402_6.3V6K
1
C106
C106
2
C93
C93
10U_0603_6.3V6M
10U_0603_6.3V6M
1
C107
C107
2
1U_0402_6.3V6K
1U_0402_6.3V6K
C C
C91
C91
10U_0603_6.3V6M
10U_0603_6.3V6M
Layout Note: Place near JDDR1.203 & JDDR1.204
B B
1U_0402_6.3V6K
1U_0402_6.3V6K
A A
DDR_DQS#[0..7]<6,9> DDR_D[0..63]<6,9> DDR_DM[0..7]<6,9> DDR_DQS[0..7]<6,9> DDR_MA[0..15]<6,9>
Put it between DDR3 +1.5VS shape and GND shape
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
C110
C110
C330
C330 @
@
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C113
C113 @
@
2
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C97
C97
2
C293
@C293
@
0.01U_0402_16V7K
0.01U_0402_16V7K
1
C98
C98
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C99
C99
2
4
C328
@C328
@
0.01U_0402_16V7K
0.01U_0402_16V7K
1
C100
C100
2
+V_DDR3_DIMM_REF
+1.5V
1
C329
0.01U_0402_16V7K
0.01U_0402_16V7K
2
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
C101
C101
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
R52 0_0402_5%R52 0_0402_5%
1 2
1000P_0402_50V7K
1000P_0402_50V7K
@C329
@
change two 100U to one 220U 06/21
1
+
+
C87
C87 @
C102
C102
@ 220U_D2_4VM_R15
220U_D2_4VM_R15
2
3
1
C86
C86
C85
C85
2
+3VS
C103
C103
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
DDR_CKE0<6,9>
DDR_BS2<6,9>
DDR_A_CLK0<6> DDR_A_CLK0#<6>
DDR_BS0<6,9> DDR_WE#<6,9>
DDR_CAS#<6,9>
DDR_A_CS1#<6>
1
2
+1.5V +1.5V
+VREF_DQA
DDR_D0 DDR_D1
DDR_DM0 DDR_D2
DDR_D3 DDR_D8
DDR_D9 DDR_DQS#1
DDR_DQS1 DDR_D10
DDR_D11 DDR_D16
DDR_D17 DDR_DQS#2
DDR_DQS2 DDR_D18
DDR_D19 DDR_D24
DDR_D25 DDR_DM3 DDR_D26
DDR_D27
DDR_MA12 DDR_MA9
DDR_MA8 DDR_MA5
DDR_MA3 DDR_MA1
DDR_MA10
DDR_MA13
DDR_D32 DDR_D33
DDR_DQS#4 DDR_DQS4
DDR_D34 DDR_D35
DDR_D40 DDR_D41
DDR_DM5 DDR_D42
DDR_D43 DDR_D48
DDR_D49 DDR_DQS#6
DDR_DQS6 DDR_D50
DDR_D51 DDR_D56
DDR_D57 DDR_DM7 DDR_D58
DDR_D59
R56 10K_0402_5%R56 10K_0402_5%
1 2
1
C104
C104
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
12
R57
R57 10K_0402_5%
10K_0402_5%
JDDR1
JDDR1
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1
9
VSS4
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
25
VSS9
27
DQS#1 DQS129RESET# VSS1131VSS12
33
DQ10
35
DQ11 VSS1337VSS14
39
DQ16
41
DQ17 VSS1543VSS16
45
DQS#2
47
DQS2
49
VSS18
51
DQ18
53
DQ19
55
VSS20
57
DQ24
59
DQ25 VSS2261DQS#3
63
DM3 VSS2365VSS24
67
DQ26
69
DQ27 VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
83
A12/BC#
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
99
VDD9
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
4.0mm
205
G1
DAN06-K4406-0102
DAN06-K4406-0102
2
CONN@
CONN@
DQ4 DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6 DQ7
VSS8 DQ12 DQ13
VSS10
DM1
DQ14 DQ15
DQ20 DQ21
DM2
VSS17
DQ22 DQ23
VSS19
DQ28 DQ29
VSS21
DQS3 DQ30
DQ31
CKE1 VDD2
VDD4
VDD6
VDD8
VDD10
CK1
CK1#
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36 DQ37
VSS30
DM4
VSS31
DQ38 DQ39
VSS33
DQ44 DQ45
VSS35 DQS#5
DQS5
VSS38
DQ46 DQ47
VSS40
DQ52 DQ53
VSS42
DM6
VSS43
DQ54 DQ55
VSS45
DQ60 DQ61
VSS47 DQS#7
DQS7
VSS50
DQ62 DQ63
VSS52
EVENT#
SDA SCL
VTT2
1
2
DDR_D4
4
DDR_D5
6 8
DDR_DQS#0
10
DDR_DQS0
12 14
DDR_D6
16
DDR_D7
18 20
DDR_D12
22
DDR_D13
24 26
DDR_DM1
28 30 32
DDR_D14
34
DDR_D15
36 38
DDR_D20
40
DDR_D21
42 44
DDR_DM2
46 48
DDR_D22
50
DDR_D23
52 54
DDR_D28
56
DDR_D29
58 60
DDR_DQS#3
62
DDR_DQS3
64 66
DDR_D30
68
DDR_D31
70 72
74 76
DDR_MA15
78
A15 A14
A11
A7 A6
A4 A2
A0
BA1
S0#
G2
80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204
206
DDR_MA14 DDR_MA11
DDR_MA7 DDR_MA6
DDR_MA4 DDR_MA2
DDR_MA0
+DDR_VREF_CA_DIMMA
DDR_D36 DDR_D37
DDR_DM4 DDR_D38
DDR_D39 DDR_D44
DDR_D45 DDR_DQS#5
DDR_DQS5 DDR_D46
DDR_D47 DDR_D52
DDR_D53 DDR_DM6 DDR_D54
DDR_D55 DDR_D60
DDR_D61 DDR_DQS#7
DDR_DQS7 DDR_D62
DDR_D63
DDR_RST# <6,9>
DDR_CKE1 <6,9>
R55 0_0402_5%R55 0_0402_5%
+0.75VS
Need close to JDDR1
@
@
C264
C264
1 2
33P_0402_50V8J
33P_0402_50V8J
DDR_A_CLK1 <6> DDR_A_CLK1# <6>
DDR_BS1 <6,9> DDR_RAS# <6,9>
DDR_A_CS0# <6> DDR_A_ODT0 <6>
DDR_A_ODT1 <6>
1 2
1000P_0402_50V7K
1000P_0402_50V7K
DDR_EVENT# <6,9> SMB_FCH_DA0 <9,15> SMB_FCH_CK0 <9,15>
1
C89
C89
2
DDR3 SO-DIMM A
DDR_CKE1
+V_DDR3_DIMM_REF
1
C90
C90
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
Standard Type
5
4
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/05/06 2010/02/04
2010/05/06 2010/02/04
2010/05/06 2010/02/04
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7491
SCHEMATIC MB A7491
SCHEMATIC MB A7491
4019D2
4019D2
4019D2
1
of
of
of
836Friday, May 06, 2011
836Friday, May 06, 2011
836Friday, May 06, 2011
B
B
B
5
4
3
2
1
+1.5V +1.5V
3 5 7
9 11 13 15 17 19 21 23 25 27
33 35
39 41
45 47 49 51 53 55 57 59
63 67
69
73 75 77 79 81 83 85 87 89 91 93 95 97 99
101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203
205
C112
C112
DDR_CKE0<6,8>
DDR_BS2<6,8>
DDR_B_CLK0<6> DDR_B_CLK0#<6>
DDR_BS0<6,8> DDR_WE#<6,8>
DDR_CAS#<6,8>
DDR_B_CS1#<6>
1 2
1
2
VREF_DQB
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
R60 10K_0402_5%R60 10K_0402_5%
R61 10K_0402_5%@R61 10K_0402_5%@
1
C135
C135
R203 10K_0402_5%R203 10K_0402_5%
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_D0 DDR_D1
DDR_DM0 DDR_D2
DDR_D3 DDR_D8
DDR_D9 DDR_DQS#1
DDR_DQS1 DDR_D10
DDR_D11 DDR_D16
DDR_D17 DDR_DQS#2
DDR_DQS2
DDR_D19 DDR_D24
DDR_D25 DDR_DM3 DDR_D26
DDR_D27
DDR_MA12 DDR_MA9
DDR_MA8 DDR_MA5
DDR_MA3 DDR_MA1
DDR_MA10
DDR_MA13
DDR_D32 DDR_D33
DDR_DQS#4 DDR_DQS4
DDR_D34 DDR_D35
DDR_D40 DDR_D41
DDR_DM5 DDR_D42
DDR_D43 DDR_D48
DDR_D49 DDR_DQS#6
DDR_DQS6 DDR_D50
DDR_D51 DDR_D56
DDR_D57 DDR_DM7 DDR_D58
DDR_D59
1 2
1 2 1 2
R58 0_0402_5%R58 0_0402_5%
+V_DDR3_DIMM_REF
DDR_DQS#[0..7]<6,8> DDR_D[0..63]<6,8>
D D
Layout Note: Place near JP3
C C
C117
C117
10U_0603_6.3V6M
10U_0603_6.3V6M
B B
1U_0402_6.3V6K
1U_0402_6.3V6K
A A
+1.5V
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
C118
C118
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
Layout Note: Place near JP3.203 & JP3.204
+0.75VS
1U_0402_6.3V6K
1U_0402_6.3V6K
1
C129
C129
C130
C130
2
1
C120
C120
C119
C119
2
1
1
C131
C131
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
1
2
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1
C132
C132
2
C121
C121
1
2
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
C122
C122
2
2
C133
C133 10U_0805_6.3V6M
10U_0805_6.3V6M
DDR_DM[0..7]<6,8> DDR_DQS[0..7]<6,8> DDR_MA[0..15]<6,8>
Layout Note: Place these 4 Caps near Command and Control signals of DIMMA
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C123
C123
1
C124
C124
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C125
C125
2
1
C126
C126
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
10U_0603_6.3V6M
10U_0603_6.3V6M
C127
C127
Compal common design
ADM CRB
change two 100U to one 220U 06/21
1
1
C128
C128
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
SA0 SA1
01
10
1
+
+
C114
C114 220U_D2_4VM_R15
220U_D2_4VM_R15
2
1 2
C111
C111
1000P_0402_50V7K
1000P_0402_50V7K
Need close to JDDR2
C288
C288
@
@
DDR_CKE0
1 2
33P_0402_50V8J
33P_0402_50V8J
+3VS
C134
C134
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
1
2
@
@
R139 10K_0402_5%
R139 10K_0402_5%
CONN@
CONN@
JDDR2
JDDR2
VREF_DQ1VSS1 VSS2 DQ0 DQ1 VSS4 DM0 VSS5 DQ2 DQ3 VSS7 DQ8 DQ9 VSS9 DQS#1 DQS129RESET# VSS1131VSS12 DQ10 DQ11 VSS1337VSS14 DQ16 DQ17 VSS1543VSS16 DQS#2 DQS2 VSS18 DQ18 DQ19 VSS20 DQ24 DQ25 VSS2261DQS#3 DM3 VSS2365VSS24 DQ26 DQ27 VSS2571VSS26
CKE0 VDD1 NC1 BA2 VDD3 A12/BC# A9 VDD5 A8 A5 VDD7 A3 A1 VDD9 CK0 CK0# VDD11 A10/AP BA0 VDD13 WE# CAS# VDD15 A13 S1# VDD17 NCTEST VSS27 DQ32 DQ33 VSS29 DQS#4 DQS4 VSS32 DQ34 DQ35 VSS34 DQ40 DQ41 VSS36 DM5 VSS37 DQ42 DQ43 VSS39 DQ48 DQ49 VSS41 DQS#6 DQS6 VSS44 DQ50 DQ51 VSS46 DQ56 DQ57 VSS48 DM7 VSS49 DQ58 DQ59 VSS51 SA0 VDDSPD SA1 VTT1
G1
DAN06-K4806-0102
DAN06-K4806-0102
8.0mm
DQS#0
VDD10
VDD12
VDD14
VDD16
VDD18
VREF_CA
DQS#5
DQS#7
EVENT#
VSS3
DQS0
VSS6
VSS8 DQ12 DQ13
VSS10
DM1
DQ14 DQ15
DQ20 DQ21
DM2
VSS17
DQ22 DQ23
VSS19
DQ28 DQ29
VSS21
DQS3 DQ30
DQ31
CKE1
VDD2
VDD4
VDD6
VDD8
CK1#
RAS#
ODT0 ODT1
NC2
VSS28
DQ36 DQ37
VSS30
DM4
VSS31
DQ38 DQ39
VSS33
DQ44 DQ45
VSS35
DQS5
VSS38
DQ46 DQ47
VSS40
DQ52 DQ53
VSS42
DM6
VSS43
DQ54 DQ55
VSS45
DQ60 DQ61
VSS47
DQS7
VSS50
DQ62 DQ63
VSS52
SDA
VTT2
DQ4 DQ5
DQ6 DQ7
A15 A14
A11
CK1
BA1
S0#
SCL
2
DDR_D4
4
DDR_D5
6 8
DDR_DQS#0
10
DDR_DQS0
12 14
DDR_D6
16
DDR_D7
18 20
DDR_D12
22
DDR_D13
24 26
DDR_DM1
28 30 32
DDR_D14
34
DDR_D15
36 38
DDR_D20
40
DDR_D21
42 44
DDR_DM2
46 48
DDR_D22
50
DDR_D23DDR_D18
52 54
DDR_D28
56
DDR_D29
58 60
DDR_DQS#3
62
DDR_DQS3
64 66
DDR_D30
68
DDR_D31
70 72
74 76
DDR_MA15
78
DDR_MA14
80 82
DDR_MA11
84
DDR_MA7
86
A7
88
DDR_MA6
90
A6 A4
A2 A0
G2
92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204
206
DDR_MA4 DDR_MA2
DDR_MA0
DDR_VREF_CA_DIMMB
DDR_D36 DDR_D37
DDR_DM4 DDR_D38
DDR_D39 DDR_D44
DDR_D45 DDR_DQS#5
DDR_DQS5 DDR_D46
DDR_D47 DDR_D52
DDR_D53 DDR_DM6 DDR_D54
DDR_D55 DDR_D60
DDR_D61 DDR_DQS#7
DDR_DQS7 DDR_D62
DDR_D63
DDR_RST# <6,8>
DDR_CKE1 <6,8>
DDR_B_CLK1 <6> DDR_B_CLK1# <6>
DDR_BS1 <6,8> DDR_RAS# <6,8>
DDR_B_CS0# <6> DDR_B_ODT0 <6>
DDR_B_ODT1 <6>
R59 0_0402_5%R59 0_0402_5%
1000P_0402_50V7K
1000P_0402_50V7K
DDR_EVENT# <6,8>
+0.75VS
DDR3 SO-DIMM B
1 2
SMB_FCH_DA0 <8,15> SMB_FCH_CK0 <8,15>
C115
C115
1
2
+V_DDR3_DIMM_REF
1
C116
C116
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
REV Type
5
4
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/05/06
2010/05/06
2010/05/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7491
SCHEMATIC MB A7491
SCHEMATIC MB A7491
4019D2
4019D2
4019D2
1
of
936Friday, May 06, 2011
of
936Friday, May 06, 2011
of
936Friday, May 06, 2011
B
B
B
5
4
3
2
1
R62 0_0402_5%R62 0_0402_5%
D D
HDMI_CLK-<5> HDMI_CLK+<5>
HDMI_TX2+<5> HDMI_TX2-<5>
HDMI_TX1+<5> HDMI_TX1-<5>
HDMI_TX0+<5> HDMI_TX0-<5>
C C
B B
A A
HDMI_CLK­HDMI_CLK+
HDMI_TX2+ HDMI_TX2- HDMI_C_TX2-
HDMI_TX1+ HDMI_TX1- HDMI_C_TX1-
HDMI_TX0+ HDMI_TX0-
HDMI_C_CLK+
HDMI_C_CLK-
HDMI_C_TX0+
HDMI_C_TX0-
HDMI_C_TX1+
HDMI_C_TX1-
HDMI_C_TX2+
HDMI_C_TX2-
HDMI_C_CLK+ HDMI_C_CLK­HDMI_C_TX0+ HDMI_C_TX0­HDMI_C_TX1+ HDMI_C_TX1­HDMI_C_TX2+ HDMI_C_TX2-
HDMI_CLK+_CONN HDMI_CLK-_CONN HDMI_TX0+_CONN HDMI_TX0-_CONN HDMI_TX1+_CONN HDMI_TX1-_CONN HDMI_TX2+_CONN HDMI_TX2-_CONN
NEAR CONNECT
R80 499_0402_1%R80 499_0402_1% R81 499_0402_1%R81 499_0402_1% R82 499_0402_1%R82 499_0402_1% R83 499_0402_1%R83 499_0402_1% R85 499_0402_1%R85 499_0402_1% R87 499_0402_1%R87 499_0402_1% R89 499_0402_1%R89 499_0402_1% R92 499_0402_1%R92 499_0402_1%
C136 0.1U_0402_16V7KC136 0.1U_0402_16V7K C137 0.1U_0402_16V7KC137 0.1U_0402_16V7K
C138 0.1U_0402_16V7KC138 0.1U_0402_16V7K C139 0.1U_0402_16V7KC139 0.1U_0402_16V7K
C140 0.1U_0402_16V7KC140 0.1U_0402_16V7K C141 0.1U_0402_16V7KC141 0.1U_0402_16V7K
C142 0.1U_0402_16V7KC142 0.1U_0402_16V7K C143 0.1U_0402_16V7KC143 0.1U_0402_16V7K
L5
L5
4
4
1
1
WCM-2012-670T
WCM-2012-670T
L6
L6
4
4
1
1
WCM-2012-670T
WCM-2012-670T
L7
L7
4
4
1
1
WCM-2012-670T
WCM-2012-670T
L8
L8
4
4
1
1
WCM-2012-670T
WCM-2012-670T
R65 0_0402_5%@ R65 0_0402_5%@
1 2
R66 0_0402_5%@ R66 0_0402_5%@
1 2
R67 0_0402_5%@ R67 0_0402_5%@
1 2
R68 0_0402_5%@ R68 0_0402_5%@
1 2
R71 0_0402_5%@ R71 0_0402_5%@
1 2
R72 0_0402_5%@ R72 0_0402_5%@
1 2
R73 0_0402_5%@ R73 0_0402_5%@
1 2
R75 0_0402_5%@ R75 0_0402_5%@
1 2
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
3
2
3
2
3
2
3
2
3
2
3
2
3
2
3
2
HDMI_CLK+_CONN
HDMI_CLK-_CONN
HDMI_TX0+_CONN
HDMI_TX0-_CONN
HDMI_TX1+_CONN
HDMI_TX1-_CONN
HDMI_TX2+_CONN
HDMI_TX2-_CONN
HDMI_C_CLK­HDMI_C_CLK+
HDMI_C_TX2+
HDMI_C_TX1+
HDMI_C_TX0+ HDMI_C_TX0-
HDMI_CLK+_CONN HDMI_CLK-_CONN HDMI_TX0+_CONN HDMI_TX0-_CONN HDMI_TX1+_CONN HDMI_TX1-_CONN HDMI_TX2+_CONN HDMI_TX2-_CONN
13
D
D
2
G
G
S
S
Q10
Q10
2N7002W-T/R7_SOT323-3
2N7002W-T/R7_SOT323-3
0_0402_5%@
0_0402_5%@
R90
R90 R88
R88
0_0402_5%
0_0402_5%
HDMI_DAT<5>
HDMI_SCL<5>
C165
0.1U_0402_16V4Z
0.1U_0402_16V4Z
12
+3VS
12
+5VS
+3VS
1
@C165
@
2
1 2
5
4
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
+5VS
12
R98
R98
0_0402_5%
0_0402_5%
1
5
P
4
OE#
A2Y
G
U7
@U7
@
74AHCT1G125GW_SOT353-5
74AHCT1G125GW_SOT353-5
3
Q2B
Q2B
+3VS
2
3
12
R84
2.2K_0402_5%
2.2K_0402_5%
+5VS
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
HDMIDAT_R
61
Q2A
Q2A
@R84
@
12
R91
@R91
@
0_0402_5%
0_0402_5%
R93
@R93
@
0_0402_5%
0_0402_5%
HDMI_HPD <5>
100K_0402_5%
100K_0402_5%
R119
R119
D5
D5 PMEG2010ET SOT23
PMEG2010ET SOT23
3 2
+5VS_HDMI
R1559 470_0402_1%@R1559 470_0402_1%@
R1560 470_0402_1%@R1560 470_0402_1%@
R1561 470_0402_1%@R1561 470_0402_1%@
R1562 470_0402_1%@R1562 470_0402_1%@
12
12
12
1
1 2
1 2
1 2
1 2
HDMICLK_R
HDMI_DET
100K_0402_5%
100K_0402_5%
R1192
R1192
@
@
+VCC_HDMI
R78
R78
2.2K_0402_5%
2.2K_0402_5%
HDMIDAT_R HDMICLK_R
1
C166
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1.1A_6VDC_FUSE
1.1A_6VDC_FUSE
12
12
R79
R79
2.2K_0402_5%
2.2K_0402_5%
@C166
@
+5VS
D11 BAT54S-7-F_SOT23-3@D11 BAT54S-7-F_SOT23-3@
F1
F1
2
3
1
HDMI_DET
21
HDMI_CLK-_CONN HDMI_CLK+_CONN
HDMI_TX0-_CONN HDMI_TX0+_CONN
HDMI_TX1-_CONN HDMI_TX1+_CONN
HDMI_TX2-_CONN HDMI_TX2+_CONN
+5VS_HDMI
HDMI_DET
1
C144
C144
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
JHDMI
JHDMI
19
HP_DET
18
+5V
17
DDC/CEC_GND
16
SDA
15
SCL
14
Reserved
13
CEC
12
CK-
11
CK_shield
10
CK+
9
D0-
8
D0_shield
7
D0+
6
D1-
5
D1_shield
4
D1+
3
D2-
2
D2_shield
1
D2+
SUYIN_100042MR019S153ZL
SUYIN_100042MR019S153ZL CONN@
CONN@
GND GND GND GND
20 21 22 23
5
4
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/05/06
2010/05/06
2010/05/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2010/02/04
2010/02/04
2010/02/04
Compal Electronics,Ltd.
Compal Electronics,Ltd.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics,Ltd.
SCHEMATIC MB A7491
SCHEMATIC MB A7491
SCHEMATIC MB A7491
4019D2
4019D2
4019D2
1
of
10 36Friday, May 06, 2011
of
10 36Friday, May 06, 2011
of
10 36Friday, May 06, 2011
B
B
B
A
B
C
D
E
CRT Connector
D9
1
2
3
5P_0402_50V8C
5P_0402_50V8C
C148
C148
10P_0402_50V8J
10P_0402_50V8J
D9 @
@ DAN217_SC59
DAN217_SC59
1
2
3
CRT_R_2
CRT_G_2
CRT_B_2
1
2
1
C155
C155
2
+5VS
1
2
PMEG2010ET SOT23
PMEG2010ET SOT23
C156
C156 10P_0402_50V8J
10P_0402_50V8J
+CRT_VCC
1
2
1
100P_0402_50V8J
100P_0402_50V8J
68P_0402_50V8K
68P_0402_50V8K
+R_CRT_VCC
W=40mils
1
C154
C154
2
F2
F2
W=40mils
21
1.1A_6VDC_FUSE
1.1A_6VDC_FUSE
DAT_R
R254 33_0402_5%R254 33_0402_5%
CLK_R
R294 33_0402_5%R294 33_0402_5%
1
C157
C157 68P_0402_50V8K
68P_0402_50V8K
2
1 2 1 2
1
C145
C145
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
JCRT
JCRT
6
RGND
11
ID0
1
Red
7
GGND
12
SDA
2
Green
8
BGND
13
Hsync
3
Blue
9
+5V
14
Vsync
4
res
10
SGND
15
SCL
5
GND
16
GND
17
GND
SUYIN_070546FR015S293ZR
SUYIN_070546FR015S293ZR
CONN@
CONN@
DAT CLK
D10
D10
3 2
C152
C152
D7
1 1
D7 @
@ DAN217_SC59
DAN217_SC59
1
D8
D8 @
@ DAN217_SC59
DAN217_SC59
2
+3VS
L11
L11
CRT_R<5>
CRT_G<5>
CRT_B<5>
2 2
C153 0.1U_0402_16V4ZC153 0.1U_0402_16V4Z
CRT_HSYNC<5>
CRT_VSYNC<5>
150_0402_1%
150_0402_1%
R94
R94
1 2
C158 0.1U_0402_16V4ZC158 0.1U_0402_16V4Z
12
150_0402_1%
150_0402_1%
1 2
R95
R95
12
12
150_0402_1%
150_0402_1%
R96
R96
+CRT_VCC
1
5
U4
U4
P
OE#
A2Y
G
74AHCT1G125GW_SOT353-5
74AHCT1G125GW_SOT353-5
3
+CRT_VCC
5P_0402_50V8C
5P_0402_50V8C
C149
C149
4
1
2
CRT_HSYNC_0
5
P
A2Y
G
3
5P_0402_50V8C
5P_0402_50V8C
1
C150
C150
2
R97 10K_0402_5%R97 10K_0402_5%
R99 27_0402_5%R99 27_0402_5%
1
U5
U5
CRT_VSYNC_0
4
OE#
74AHCT1G125GW_SOT353-5
74AHCT1G125GW_SOT353-5
1 2
FBMA-L10-160808-600LMT_2P
FBMA-L10-160808-600LMT_2P L14
L14
1 2
FBMA-L10-160808-600LMT_2P
FBMA-L10-160808-600LMT_2P L12
L12
1 2
FBMA-L10-160808-600LMT_2P
FBMA-L10-160808-600LMT_2P
5P_0402_50V8C
5P_0402_50V8C
1
C151
C151
2
12
CRT_HSYNC_1
1 2
CRT_VSYNC_1
1 2
R100 27_0402_5%R100 27_0402_5%
C146
C146
3
5P_0402_50V8C
5P_0402_50V8C
C147
C147
1
5P_0402_50V8C
5P_0402_50V8C
2
1
2
3 3
+CRT_VCC
+3VS
R102
2
6 1
Q3A
Q3A
3
Q3B
Q3B
R102
1 2
5
0_0402_5%
0_0402_5%
4
12
12
R104
R103
R103
4.7K_0402_5%
4.7K_0402_5%
DAT
CLK
4 4
A
R104
4.7K_0402_5%
4.7K_0402_5%
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
1 2
R86 0_0402_5%
R86 0_0402_5%
@
@
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
1 2
R101 0_0402_5%
R101 0_0402_5%
@
@
B
12
R105
R105
4.7K_0402_5%
4.7K_0402_5%
12
R106
R106
4.7K_0402_5%
4.7K_0402_5%
CRT_DDC_DATA <5>
CRT_DDC_CLK <5>
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2010/05/06
2010/05/06
2010/05/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7491
SCHEMATIC MB A7491
SCHEMATIC MB A7491
4019D2
4019D2
4019D2
E
of
11 36Friday, May 06, 2011
of
11 36Friday, May 06, 2011
of
11 36Friday, May 06, 2011
B
B
B
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