Compal LA-7461P PHJ00, ThinkPad 1839 Schematic
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1 1
A
B
C
D
E
Compal Confidential
2 2
LA-7461 Schematics Document
Nvdia(T20) + LPDDRII
2011-04-22
REV: 0.3
3 3
4 4
Security Classification
Issued Date
THIS SHE ET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TR ADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTM ENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Compal Secret Data
Deciphered Date
D
2010/12/012011/4/1
Title
Size Docum ent Num ber R ev
Cust om
Date : Sheet of
Compal Electronics, Inc.
Cover Page
Monday, Apr il 25, 20 11
LA-7461P
E
1
0.3
35
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A
B
C
D
E
HDMI to Cradle
Cradle
U3H
1 1
10.1" LVDS panel
Mini HDMI
Page 19 Page 18
3G Card
Page 17
SI MUS B
SIM card
Page 17
2 2
LVDS Bridge
SN75LVDS83BZQLR
HDMI MUX
PI3HDMI412FT
US B2
ULPI to USB
SMSC USB3315
WLAN Socket
GPS Module
BCM4751IFBG
Page 11Page 11
Page 17
Page 16
Page 22
RGB (1.8V)
HDMI
ULPI (1.8V)
SDIO1( 1.8V)
DAP4(1.8V)
UART3 (1.8V)
UART2 (1.8V)
12MHz
SD Card Slot
Page 19
Light Sen sor
AL3000A
Page 15
Touch Screen
Page 11
3 3
SPI1(3.3V)
Level Shift
TXB010 4PWR
Page 11
Level Shift
PCA9306DCUR
Page 15
SDIO3( 3.3V)
GEN1_I2C(1.8V)
SPI1(1.8V)
GEN2_I2C(1.8V)
VG A
U3G
LC D
HD MI
U3I
U3J U3K
UL PI
SDI O1
UA RT
U3B
OSC ,PLL,
ke y boar d
U3NU3O
PCI e&S DIO
U3A
cor e & fu se
Nvidia Tegra T20
AP_SMB(3.3V)
ENE KBC
KB930
Page 09
U3C
NAN D Ct rl
U3D
DD R
U3E
U3F
MI PI
VI& DSI /CS I
U3L
AUDI O
U3M
USB + mini-B connector
U3P
U3Q
HS IC
Page 04,0 5,06, 07
HSMMC X8
DDR2 X3 2 (1.2V)
CSI A (1.2V)
CSI B (1.2V)
DAP1(1.8V)
GEN1_I2C(1.8V)
USB1
USB3
PWR_I2C(1.8V)
eMMC NAND 4.3
LPDDR2 1GB
5M CAMERA Module
2M CAMERA Module
Page 10
Page 08
Page 15
Page 15
Audio Codec
Wolfson WM8903
Page 12
Micro USB port
Page 21
USB SW
TS3 USB221RSER
Accelerometer
KXTF9-4100
Compass AKM8975
Thermal Sen sor
NCT1008
VIBRATOR
PROXIMIT Y SENSOR
IQS12 8-00000TSR
PMU
Page 14
Page 14
Page 30,3 1
Page 14
Page 16
Page 20
INT Speaker*1
Page 12
SPKR AMP
ALC105
Page 12
HeadPh one
Page 12
MIC * 1
Page 12
Standard USB port
Page 21Page 20
HDMI Conn.
MIC IN
HP OUT
Micro USB
Standard USB
Page 13
SPI
SPI ROM
Page 09
TI TPS5 1220
4 4
5V/3. 3V BUCK
Page 28
CHARGER
Page 25
BATT IN
1.8V
BUCK
1.2V
BUCK
Page 26
Page 29
Page 29
A
AP _SMB(3 .3V)
SMBUS
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
Compal Secret Data
Deciphered Date
Compal Electronics, Inc.
2010/12/012011/4/1
Title
Size Docu ment Numbe r Re v
Custo m
Date: Sheet of
Monday, April 25, 2011
E
Block Diagrams
LA-7461P
2
35
0.3
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D D
C C
5
Voltage Rails
Power P lane Des cription
VIN
B+
+1.2VS_SM0
+1.0VS_SM1
+1.1VS_LDO1
+1.2VS_LDO2
+1.8VS_LDO4 T20 syst em power r ail
+3.3VS_LDO3
+2.85V S_LDO5 Core voltage for EMMC
+2.85V S_LDO6
+3.3VS_LDO7
+1.8VS_LDO8
+2.85V S_LDO9
+3VALW
+3VS
+5VALW
+1.8VS
Power s upply (19V)
AC or batter y power rail for power circuit.
Core voltage for CPU
CPU vol tage for CPU
AVDD_P LL power rail
T20 R TC power rail
T20 U SB power rail
Core voltage for CAMERA
T20 H DMI power rail
T20 H DMI PLL power rail
T20 D DR RX power rail
3.3V al ways on power rail
3.3V swit ched p ower rail f or standby mode
5V alw ays on power rail
1.8V al ways on power rail
1.8V swit ched p ower rail f or standby mode+1.8VS_S3
RTC p ower+3.3VS_RTC
4
3
PWR_I2C address
Device
PMU
E-Compass CAM ERA 2M
Temperature sensor
Add ress
0110 100x b
0000 110x b
0100 110x b
GEN1_I2C
Device A ddress
Au dio Co dec
Light sensor
0011 010x b
0001 110x b
2
CAM_I2C address
Device
CAM ERA 5M
TS_I2C
1
Add ress
Add ressDevice
GEN2_I2C AP_SMB
Add ressDevice Device Add ress
LCD
3G CARD
LPDDR2
NAND_D5 NAND_D4
LL
HL
LH
HH
B B
SMT
R38 R39
R23
R39
R38
R24
R23
R24
LPDDR2
ELPIDA 1G
Hynix
Samsung 1G NA
NA NA
Part N umber
SA0000 48Q30
SA0000 4MJ101G
EC_SMB
BATT
Add ressDevice
0001 001x b
DDC_I2C
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TR ADE SE CRET I NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTM ENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Compal Secret Data
IME_I2C
HDMI_DDC_I2C
Deciphered Date
2
Device Add ress
G-sensor
Device Add ress
HDMI EDID
0001 1111 b
2010/12/012011/4/1
Title
Size Docu ment Num ber R ev
Cu sto m
Date: Sheet o f
Compal Electronics, Inc.
Notes List
Mon day, Apri l 25, 2 011
LA-7461P
1
3
35
0. 3
Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).
+VDD IO_LCD
+1.8VS
R2 0_0402_5%
1 2
D D
3/28 R e-nam e the HDMI_HPD_R to HDMI_HPD
C C
+3.3VS_LDO7
RB751V-40 SOD-323
+1.8VS_LDO8
2 1
D1
2.2U_0402 _6.3VMZ
+AVD D_HDMI
C10
1 2
R11 0_0402_5%
5
C5
0.1U_0201 _10V6K
1
VIB_EN_T20[16]
2
12/20 Add f or Vibrator function
LVDS_SHT DN#[11]
EN_VD D_PNL[11]
TP1
ACCEL_IN T[14]
TP2
COMP ASS_DRDY[14]
ALS_INT[15]
TEMP_ALERT#[14]
HDMI_ HPD[19]
DDC_ SCL_R[19 ]
DDC_ SDA_R[19]
1
1
C11
0.1U_0201 _10V6K
2
2
+AVDD _HDMI_PLL
1
2
4
1.8V 1.8V
R3
1 2
47_0402_1%
R12
1 2
1K_0402_1%
12P_0402_50V4Z
GPS_PW RON# [22]
LCD_ DE [11]
LCD _HSYN C [11]
LCD_ VSYNC [1 1]
LCD_ D00 [11]
LCD_ D01 [11]
LCD_ D02 [11]
LCD_ D03 [11]
LCD_ D04 [11]
LCD_ D05 [11]
LCD_ D06 [11]
LCD_ D07 [11]
LCD_ D08 [11]
LCD_ D09 [11]
LCD_ D10 [11]
LCD_ D11 [11]
LCD_ D12 [11]
LCD_ D13 [11]
LCD_ D14 [11]
LCD_ D15 [11]
LCD_ D16 [11]
LCD_ D17 [11]
LVDS_SHT DN#
SAR_EN #
EN_ VDD_PNL
GYRO _INT
ACCEL_IN T
EN_VD D_BL
COMP ASS_DRDY
ALS_INT
TEMP_ALERT#
HDMI_ HPD
DDC_ SCL_R
DDC_ SDA_R
3.3V
1
C12
39P 50V J NPO 0402
2
1.8V
C13
0.1U_0201 _10V6K
+VDD IO_VI
AD24
AA24
AB21
AC25
AA25
W25
AD23
AC24
AC23
W23
AH17
AA15
AA12
U22
V22
Y24
U24
V24
V23
Y22
Y23
Y15
U1D
VDDIO_LCD1
VDDIO_LCD2
LCD_M1
LCD_PWR 0
LCD_PWR 1
LCD_PWR 2
LCD_SCK
LCD_CS0#
LCD_CS1#
LCD_SDOUT
LCD_SDIN
LCD_DC0
LCD_DC1
HDMI_INT#
CRT_HSYNC
CRT_VSYNC
DDC_SCL
DDC_SDA
AVDD_VDAC
AVDD_HDMI_1
AVDD_HDMI_2
AVDD_HDMI_PLL
T20_23X23
LC D
CR T
HDMI
LCD_PCLK
LCD_WR #
LCD_DE
LCD_HSYNC
LCD_VSYNC
LCD_D00
LCD_D01
LCD_D02
LCD_D03
LCD_D04
LCD_D05
LCD_D06
LCD_D07
LCD_D08
LCD_D09
LCD_D10
LCD_D11
LCD_D12
LCD_D13
LCD_D14
LCD_D15
LCD_D16
LCD_D17
LCD_D18
LCD_D19
LCD_D20
LCD_D21
LCD_D22
LCD_D23
VDAC_R
VDAC_G
VDAC_B
VDAC_VREF
VDAC_RSET
HDMI_TXCN
HDMI_TXCP
HDMI_TXD0N
HDMI_TXD0P
HDMI_TXD1N
HDMI_TXD1P
HDMI_TXD2N
HDMI_TXD2P
HDMI_RSET
V28
AE24
U23
AD27
AD26
AA26
AC26
AC27
AC28
AD25
AD28
Y26
Y27
Y28
Y25
AA28
AA27
U25
U28
U27
U26
V27
V26
AB25
AA23
AB23
AA22
V25
AC22
AB17
AB18
AE19
AC17
AE18
AF17
AG17
AE16
AE17
AC18
AD18
AH18
AG18
AF18
LCD_PC LK_L
GPS_PW RON#
LCD _DE
LCD_ HSYNC
LCD_ VSYNC
LCD_ D00
LCD_ D01
LCD_ D02
LCD_ D03
LCD_ D04
LCD_ D05
LCD_ D06
LCD_ D07
LCD_ D08
LCD_ D09
LCD_ D10
LCD_ D11
LCD_ D12
LCD_ D13
LCD_ D14
LCD_ D15
LCD_ D16
LCD_ D17
HDMI_TXCN
HDMI_TXCP
HDMI_TXD0N
HDMI_TXD0P
HDMI_TXD1N
HDMI_TXD1P
HDMI_TXD2N
HDMI_TXD2P
HDMI_RSET
1
C3
2
L1
1 2
27NH +-5 % LQG15HS27 NJ02D 0402
PWR_O FF_AP[ 9]
+VDD IO_NAND
SIM_DET[9,17]
+2.85VS_LDO6
R7 0_0402_5%
2.2U_0402 _6.3VMZ
HDMI_TXCN [1 8]
HDMI_TXCP [18]
HDMI_TXD0N [1 8]
HDMI_TXD0P [18 ]
HDMI_TXD1N [1 8]
HDMI_TXD1P [18 ]
HDMI_TXD2N [1 8]
HDMI_TXD2P [18 ]
+VDD IO_VI
12
12
VI_MCLK
1
2
C6
R13
10K_0402_5%
C4
12P_0402_50V4Z
+VDD IO_VI
3
+VDDIO_MMC
LCD_ PCLKLCD_PCL K_R
R547K_0402_1%
12
57.6K_0402_1%
1 2
R397 100K_0402_5%
D18
1 2
RB751V-40 _SOD323-2
1
1
C7
0.1U_0201 _10V6K
2
2
VI_MCLK_R[15]
39P 50V J NPO 0402
1 2
R1 0_0402_5%
LCD_ PCLK [11]
12
R6
+VDD IO_NAND
HSMMC_CLK[10]
EN_V DDIO_SD[1 9]
HSMMC_CMD[10]
SDIO3_ CD#[19]
R10 0_0402_5%
1 2
1
C9
@
2
CAM1_PWD N[15]
CAM2_OE[15]
CAM2_RST#[15]
CAM1_RST#[15]
C1 0.1U_0 402_25V4Z
1 2
C2 2.2U_0 402_6.3VMZ
1 2
TP5
TP6
TP7
TP13
TP8
TP77
TP9
TP78
TP10
TP14
TP11
TP12
NAN D_ALE
HSMMC_CLK
PWR _OFF_AP_R
EN_V DDIO_SD
NAND _RE#
NAND_ WE#
NAND _CLE
HSMMC_CMD
SIM_DET_R
EXIT_LP0
SDIO 3_CD#
CAM_I2C _SCL
CAM_I2C _SDA
VI_MCLK
VI_PCLK
VI_ HSYNC
VI_VS YNC
VI_D02
VI_D03
VI_D04
VI_D05
VI_D06
VI_D07
VI_D08
VI_D09
EN_V DDIO_VID_O C#
CAM1_PW DN
CAM2_OE
CAM2_RST#
CAM1_RST#
2
U1E
Y7
VDDIO_NAND_1
Y8
VDDIO_NAND_2
Y9
VDDIO_NAND_3
AH3
GMI_ADV#
AF5
GMI_CS0#
AF12
GMI_CS1#
AD12
GMI_CS2#
AC6
GMI_CS3#
AC12
GMI_CS4#
AB12
GMI_CS5#
AD5
GMI_CS6#
AD9
GMI_CS7#
AG9
GMI_OE#
AF6
GMI_WR#
AF3
GMI_CLK
AC9
GMI_DPD
AC7
GMI_RST#
AF1
GMI_WAIT
AF2
GMI_WP#
AC10
GMI_IORDY
VI MIPI
L21
VDDIO_VI
H28
CAM_I2C_SCL
H27
CAM_I2C_SDA
L24
VI_MCLK
L28
VI_PCLK
L25
VI_HSYNC
K25
VI_VSYNC
H23
VI_D00
H25
VI_D01
J23
VI_D02
J28
VI_D03
J24
VI_D04
J27
VI_D05
J25
VI_D06
J26
VI_D07
K23
VI_D08
L26
VI_D09
L23
VI_D10
M22
VI_D11
L22
VI_GP0
M23
VI_GP3
J22
VI_GP4
L27
VI_GP5
M24
VI_GP6
T20_23X23
NAND
GEN2_I2C_SCL
GEN2_I2C_SDA
GMI_AD0
GMI_AD1
GMI_AD2
GMI_AD3
GMI_AD4
GMI_AD5
GMI_AD6
GMI_AD7
GMI_AD8
GMI_AD9
GMI_AD10
GMI_AD11
GMI_AD12
GMI_AD13
GMI_AD14
GMI_AD15
GMI_AD16
GMI_AD17
GMI_AD18
GMI_AD19
GMI_AD20
GMI_AD21
GMI_AD22
GMI_AD23
GMI_AD24
GMI_AD25
GMI_AD26
GMI_AD27
AVDD_DSI_CSI_1
AVDD_DSI_CSI_2
DSI_CSI_RUP
CSI_CLKAN
CSI_CLKAP
CSI_D1AN
CSI_D1AP
CSI_D2AN
CSI_D2AP
CSI_CLKBN
CSI_CLKBP
CSI_D1BN
CSI_D1BP
DSI_CLKAN
DSI_CLKAP
DSI_D1AN
DSI_D1AP
DSI_D2AN
DSI_D2AP
DSI_CSI_RDN
AD11
AD6
AG5
AE9
AF11
AG6
AH8
AG11
AF9
AF8
AE6
AE12
AH12
AH6
AH11
AG3
AH9
AH5
AG12
AD3
AE5
AG8
AD8
AE7
AC5
AE11
AE8
AC11
AE10
AC8
AA17
Y16
AF21
AH26
AG26
AD20
AE20
AH23
AG23
AB20
AC20
AH24
AG24
AD21
AC21
AF20
AG20
AH21
AG21
AH20
GEN2 _I2C_SCL
GEN 2_I2C_SDA
NAND _D4
NAND _D5
NAND _D6
NAND _D7
SDIO3_W P
GMI_AD12
GMI_AD13
GMI_AD14
GMI_AD15
UART4_TXD
UART4_RXD
UART4_CTS#
UART4_RTS#
HSMMC_DAT0
HSMMC_DAT1
HSMMC_DAT2
HSMMC_DAT3
HSMMC_DAT4
HSMMC_DAT5
HSMMC_DAT6
HSMMC_DAT7
12
R9 453_0 402_1%
R14
49.9_0402_1%
1 2
GEN2 _I2C_SCL [15]
GEN2 _I2C_SDA [15]
SDIO3_W P [19]
UART4_TXD [23]
UART4_RXD [2 3]
TP3
TP4
HSMMC_DAT0 [10]
HSMMC_DAT1 [10]
HSMMC_DAT2 [10]
HSMMC_DAT3 [10]
HSMMC_DAT4 [10]
HSMMC_DAT5 [10]
HSMMC_DAT6 [10]
HSMMC_DAT7 [10]
CSI_C LKA_N [15]
CSI_CL KA_P [15]
CSI_D 1A_N [15]
CSI_D1 A_P [15]
CSI_D 2A_N [15]
CSI_D2 A_P [15]
CSI_C LKB_N [15]
CSI_CL KB_P [15]
CSI_D 1B_N [15]
CSI_D1 B_P [15]
1
For Debug
+AVD D_DSI_CSI
R8 0_0402_5%
1
C8
0.1U_0402 _25V4Z
2
+1.2V
12
H:fo rce _rec over mo de
B B
ALS_INT
A A
R15
2.2K_0402_1%
12
R28
100K_0402_5%
Na me A ct ive
EC _WA KE#
lo w
EX IT_ LP0 Hi gh
5
R16
2.2K_0402_1%
1 2
1 2
CAM_I2C _SCL
CAM_I2C _SDA
T20_WAKE#[9]
+VDD IO_NAND+VDD IO_LCD
1 2
13
D
2
G
S
CAM_I2C_SC L [15]
CAM_I2C_ SDA [15]
R29
100K_0402_5%
EXIT_LP0
Q2
BSS138W -7-F_SOT323-3~D
P_INT#[9,20]
4
NAND _D4NAND _D5
L L
L H
H L
H H
100K_0402_5%
1 2
RB751V-40 _SOD323-2
R31
D16
SMT
R38, R39
R38, R24
R23, R24
+VDD IO_LCD
12
FOR CE_RECO VERY[9]
SAR_EN #
LPDD R2
ELPI DA 1G
Hyni x 1GR23, R39
NA
NA
13
D
2
G
S
Security Classification
Issued Date
THIS SHE ET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TR ADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTM ENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
L:no rma l mode
12
R17
Q1
BSS138W -7-F_SOT323-3
R27
47K_0402_1%
47K_0402_1%
1 2
12
R18
12
R32
100K_0402_5%
R19
100K_0402_5%
12
R33
R34
@
100K_0402_5%
Compal Secret Data
12
12
R20
@
100K_0402_5%
12
12
R35
10K_0402_5%
Deciphered Date
12
R21
@
100K_0402_5%
100K_0402_5%
12
R36
10K_0402_5%
10K_0402_5%
2
12
12
R22
@
12
R37
R24
R23
24@
23@
100K_0402_5%
100K_0402_5%
12
R39
R38
39@
38@
10K_0402_5%
10K_0402_5%
2010/12/012011/4/1
+VDDIO_ MMC
12
12
12
R25
R26
@
@
100K_0402_5%
100K_0402_5%
100K_0402_5%
NAND _RE#
NAND_ WE#
NAND _CLE
NAN D_ALE
GMI_AD12
GMI_AD13
GMI_AD14
GMI_AD15
NAND _D4
NAND _D5
NAND _D6
NAND _D7
12
10K_0402_5%
12
12
R41
R40
10K_0402_5%
10K_0402_5%
Title
Size Document Number R ev
Cust om
Date: Sheet of
Compal Electronics, Inc.
T20(1/4)LCD/CRT/HDMI/NAND
Monday, Apr il 25, 20 11
LA-7461P
eMMC boot
GMI_ AD12 1
GMI_ AD13
GMI_ AD14
GMI_ AD15
LPDD R2
RAM
NAND _D400
NAND _D5
NAND _D6
NAND _D7
1
0
0
0
0
0
4
0.3
35
Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).
D D
C C
B B
+1.1VS_LDO1
C2 8
8P_ 0402_50V 8J
1
2
12M HZ 9P F X3S0120 00B91H-X
5
1.8V
+1.8 VS_LD O4
L2 F BMA- 10-100505-2 21T_0402
1 2
220? [ @100MHz
R4 3 0_0 402_5%
1 2
R4 4 0_0 402_5%
1 2
R4 5 0_0 402_5%
1 2
R4 6 0_0 402_5%
1 2
+1.8 VS_LD O4
1 2
R5 4 2M_04 02_5%
3
OUT
NC
4
C2 2
0.1U _0402 _25V4Z
1
2
R5 2 0_0 402_5%
1 2
1
Y1
IN
1
NC
2
2
C2 9
8P_ 0402_50V 8J
1.1V
+AVDD_PLLX+AVD D_PLL_P_C
C2 3
0.1U _0402 _25V4Z
1
1
2
2
T20_XTA L_OUT
T20_XTA L_IN
+AVDD_PLLM+AVDD_P LLU
C2 4
0.1U _0402 _25V4Z
+AV DD_O SC
C2 5
0.1U _0402 _25V4Z
1
2
+1.8VS_SY S
4
U1 B
OSC, PLL, SYS
H12
C2 0
1
2
R4 9
12
0_04 02_5%
1
2
AVDD_OSC
4.7U _0603 _6.3V6K
H14
AVDD_PLLA_P_C
AA18
AVDD_PLLU
L7
AVDD_PLLX
H15
AVDD_PLLM
Y1
AVDD_PLLE
G18
VDDIO_SYS
C2 6
0.1U _0402 _25V4Z
T20_23X23
XTAL_IN
XTAL_OUT
AVDD_PLL_S_LF
PWR_I2C_SCL
PWR_I2C_SDA
SYS_RESET#
CLK_32K_IN
PWR_INT#
CORE_PWR_REQ
CPU_PWR_REQ
SYS_CLK_REQ
CLK_32K_OUT
KB_COL0
KB_COL1
KB_COL2
KB_COL3
KB_COL4
KB_COL5
KB_COL6
KB_COL7
KB_ROW00
KB_ROW01
KB_ROW02
KB_ROW03
KB_ROW04
KB_ROW05
KB_ROW06
KB_ROW07
KB_ROW08
KB_ROW09
KB_ROW10
KB_ROW11
KB_ROW12
KB_ROW13
KB_ROW14
KB_ROW15
JTAG_RTCK
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRST#
OWR
TEST_MODE_EN
T20_XTA L_IN
E3
T20_XTA L_OUT
E2
PLL _S_P LL_LF
G12
C2 1
0.1U _0402 _25V4Z
PWR _I2C_SCL
C1
PWR _I2C_SDA
C2
SYS _RES ET#_R
D17
CLK _32K_ IN
B14
D14
CO RE_ PWR_ REQ
G14
CP U_P WR_R EQ
C14
SYS _CLK _REQ
D7
CLK _32K_ OUT
D5
M ENU
A6
HOM E
D6
BAC K
A5
SE AR CH_C
B5
VO L_DO WN
C5
VOL _UP
B3
LO CK
A3
TS _SPI_OE
C3
3G_ SEL
C12
B12
A12
D11
A11
B11
DI SAB LE_C HRGR
C11
C9
WF _WAK E#
B9
A9
D8
A8
B8
C8
C6
R2 81 47K _0402_5%
1 2
B6
JTA G_RTCK
A17
JT AG_TCK
B17
JTA G_TDI
B15
JTA G_TDO
C15
JTAG_ TMS
C17
JTA G_TRST#
A15
SN N_O WR
G11
A14
+1.8V
1
2
R4 52 10K _0402_5%@
12
R4 7
1 2
R5 0 0_040 2_5%
1 2
R5 1 0_040 2_5%
TP15
1 2
4/22 A dd R4 52 for 3G SKU sel.
TP26
12
R5 7
10K _0402_5%
TP35
1.8V
2.2K _0402 _1%
DO CK_ ON
3
+1.2V
1 2
R4 2 0_060 3_5%
2.2K _0402 _1%
12
R4 8
PW R_I 2C_SC L [14 ,31]
PW R_I 2C_SD A [14 ,31]
PMU re set T20
SYS _RESE T# [1 0,22, 31]
CLK _32K_ IN [9 ,31]
PW R_IN T# [3 1]
CO RE_ PWR_R EQ [ 9,31]
CP U_P WR_R EQ [3 1]
TP29
TP30
TP31
TP32
TP33
TP34
CLK _32K_O UT [1 6,22]
ME NU [ 18]
HOM E [1 8]
BAC K [1 8]
SE ARC H_C [ 9]
VO L_DO WN [1 5]
VOL _UP [ 15]
LO CK [1 5]
WF _WAK E# [ 16]
KB_ ROW1 4 [1 5]
DO CK_ ON [9 ]
1 2
R5 3 0 _0402 _5%
DD R_A _D0[8 ]
DD R_A _D1[8 ]
DD R_A _D2[8 ]
DD R_A _D3[8 ]
DD R_A _D4[8 ]
DD R_A _D5[8 ]
DD R_A _D6[8 ]
DD R_A _D7[8 ]
DD R_A _D8[8 ]
DD R_A _D9[8 ]
DD R_A _D10[8]
DD R_A _D11[8]
DD R_A _D12[8]
DD R_A _D13[8]
DD R_A _D14[8]
DD R_A _D15[8]
DD R_A _D16[8]
DD R_A _D17[8]
DD R_A _D18[8]
DD R_A _D19[8]
DD R_A _D20[8]
DD R_A _D21[8]
DD R_A _D22[8]
DD R_A _D23[8]
DD R_A _D24[8]
DD R_A _D25[8]
DD R_A _D26[8]
DD R_A _D27[8]
DD R_A _D28[8]
DD R_A _D29[8]
DD R_A _D30[8]
DD R_A _D31[8]
+1.2 V_LP DDR2
2.85V
+VDD_D DR_RX+2.85V S_LDO9
C2 7
DD R_A _D0
DD R_A _D1
DD R_A _D2
DD R_A _D3
DD R_A _D4
DD R_A _D5
DD R_A _D6
DD R_A _D7
DD R_A _D8
DD R_A _D9
DD R_A _D10
DD R_A _D11
DD R_A _D12
DD R_A _D13
DD R_A _D14
DD R_A _D15
DD R_A _D16
DD R_A _D17
DD R_A _D18
DD R_A _D19
DD R_A _D20
DD R_A _D21
DD R_A _D22
DD R_A _D23
DD R_A _D24
DD R_A _D25
DD R_A _D26
DD R_A _D27
DD R_A _D28
DD R_A _D29
DD R_A _D30
DD R_A _D31
1
2
C1 4
4.7U _0603 _6.3V6K
2
1
2
H20
J12
J13
J14
J15
J16
J17
J18
J19
J20
J21
K20
L16
L17
L20
M17
M18
M20
N18
N20
P20
R20
T20
U20
V20
H17
F20
E18
D18
F18
F17
E21
D21
F21
E17
D15
F16
E14
F13
D16
D12
D13
F23
F25
H22
G25
F22
D24
H24
E23
F9
F12
E12
E9
F10
G8
F11
G9
1
C1 5
2
4.7U _0603 _6.3V6K
U1C
VDDIO_DDR_01
VDDIO_DDR_02
VDDIO_DDR_03
VDDIO_DDR_04
VDDIO_DDR_05
VDDIO_DDR_06
VDDIO_DDR_07
VDDIO_DDR_08
VDDIO_DDR_09
VDDIO_DDR_10
VDDIO_DDR_11
VDDIO_DDR_12
VDDIO_DDR_13
VDDIO_DDR_14
VDDIO_DDR_15
VDDIO_DDR_16
VDDIO_DDR_17
VDDIO_DDR_18
VDDIO_DDR_19
VDDIO_DDR_20
VDDIO_DDR_21
VDDIO_DDR_22
VDDIO_DDR_23
VDDIO_DDR_24
VDDIO_DDR_25
VDD_DDR_RX
DDR_DQ00
DDR_DQ01
DDR_DQ02
DDR_DQ03
DDR_DQ04
DDR_DQ05
DDR_DQ06
DDR_DQ07
DDR_DQ08
DDR_DQ09
DDR_DQ10
DDR_DQ11
DDR_DQ12
DDR_DQ13
DDR_DQ14
DDR_DQ15
DDR_DQ16
DDR_DQ17
DDR_DQ18
DDR_DQ19
DDR_DQ20
DDR_DQ21
DDR_DQ22
DDR_DQ23
DDR_DQ24
DDR_DQ25
DDR_DQ26
DDR_DQ27
DDR_DQ28
DDR_DQ29
DDR_DQ30
DDR_DQ31
T20_23X23
+1.2 V_LP DDR2
1
C1 6
2
4.7U _0603 _6.3V6K
DDR2
1
C1 7
2
4.7U _0603 _6.3V6K
DDR_DM0
DDR_DM1
DDR_DM2
DDR_DM3
DDR_DQS0N
DDR_DQS0P
DDR_DQS1N
DDR_DQS1P
DDR_DQS2N
DDR_DQS2P
DDR_DQS3N
DDR_DQS3P
DDR_A00
DDR_A01
DDR_A02
DDR_A03
DDR_A04
DDR_A05
DDR_A06
DDR_A07
DDR_A08
DDR_A09
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_A14
DDR_RAS#
DDR_CAS#
DDR_WE#
DDR_BA0
DDR_BA1
DDR_BA2
DDR_CS0#
DDR_CS1#
DDR_ODT0
DDR_CKE0
DDR_CKE1
DDR_CLK#
DDR_CLK
THERMD_N
THERMD_P
DDR_COMP_PU
DDR_COMP_PD
DDR_QUSE0
DDR_QUSE1
DDR_QUSE2
DDR_QUSE3
1
1
C1 8
4.7U _0603 _6.3V6K
1
C1 9
2
2
4.7U _0603 _6.3V6K
4.7U _0603 _6.3V6K
DD R_A_ DM0
F19
DD R_A_ DM1
E15
DD R_A_ DM2
G23
DD R_A_ DM3
D9
D19
E20
F14
F15
E24
F24
E11
D10
DDR_ A_M A0
A20
DDR_ A_M A1
C24
DDR_ A_M A2
D20
DDR_ A_M A3
B20
DDR_ A_M A4
F26
DDR_ A_M A5
C26
DDR_ A_M A6
C27
DDR_ A_M A7
F28
DDR_ A_M A8
A26
DDR_ A_M A9
A23
DDR_ A_MA 10
D23
DDR_ A_MA 11
C20
DDR_ A_MA 12DDR _A_M A12
C18
DDR_ A_MA 13
E28
DDR_ A_MA 14
C28
DD R_A_ RAS#
B23
DD R_A_ CAS#
H26
DD R_A _WE#
F27
DDR_ A_BS #0
B26
DDR_ A_BS #1
A24
DDR_ A_BS #2
B24
E25
C23
M_OD T
B21
A21
C21
E27
E26
E6
F7
R5 5 49.9 _0402 _1%
E8
R5 6 49.9 _0402 _1%
F8
DD R_Q USE0
G15
DD R_Q USE1
G17
DD R_Q USE2
A18
DD R_Q USE3
B18
1 2
1 2
DD R_A_ DM0 [ 8]
DD R_A_ DM1 [ 8]
DD R_A_ DM2 [ 8]
DD R_A_ DM3 [ 8]
DD R_A_ DQS#0 [8]
DD R_A_ DQS0 [8]
DD R_A_ DQS#1 [8]
DD R_A_ DQS1 [8]
DD R_A_ DQS#2 [8]
DD R_A_ DQS2 [8]
DD R_A_ DQS#3 [8]
DD R_A_ DQS3 [8]
DDR_ A_MA 0 [8 ]
DDR_ A_MA 1 [8 ]
DDR_ A_MA 2 [8 ]
DDR_ A_MA 3 [8 ]
DDR_ A_MA 4 [8 ]
DDR_ A_MA 5 [8 ]
DDR_ A_MA 6 [8 ]
DDR_ A_MA 7 [8 ]
DDR_ A_MA 8 [8 ]
DDR_ A_MA 9 [8 ]
TP16
TP17
TP18
TP19
TP20
TP21
TP22
TP23
TP24
TP25
TP27
M_C S#0 [ 8]
M_C S#1 [ 8]
TP28
M_CK E0 [ 8]
M_CK E1 [ 8]
M_ CLK_D DR#0 [ 8]
M_ CLK_D DR0 [ 8]
THE RMD_ N [14 ]
THE RMD_P [14 ]
1 2
R5 8 0_02 01_5%
1 2
R5 9 0_04 02_5%
+1.2 V
+1.8VS_SY S
A A
R6 0
1 2
1K_ 0402_1%
5
TS_ SPI_OE _RTS _SPI_OE TS_ SPI_OE _3V3
U2
1
VCCA
VCCB
3
A
5
GND
DIR
SN7 4AVC 1T45D CKR_ SC70-6
SA0 00029A00
+3VS
6
4
B
2
1 2
R6 1 33_ 0402_5%
4
TS_ SPI_OE _3V3_R [ 11]
Security Classification
Issued Date
THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TR ADE SE CRET I NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTM ENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Deciphered Date
2
2010/12/012011/4/1
Title
Size Docu ment Num ber R ev
Cu sto m
Date: Sheet o f
Compal Electronics, Inc.
T20(2/4)OSC/PLL/SYS/DDR
Mon day, Apri l 25, 2 011
LA-7461P
1
5
0. 3
35
Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).
A
B
C
D
E
C3 0
2.2U _0603 _6.3V6K
C3 6
39P 50V J NP O 0402
+VDDIO_SDIO
U1H
P8
AVDD_PEX_PLL
R8
AVDD_PEX_1
R9
AVDD_PEX_2
T9
AVDD_PEX_3
U8
VDD_PEX_1
U9
VDD_PEX_2
V9
VDD_PEX_3
V8
VDDIO_PEX_CLK
T20_23X 23
+AVDD_USB
1
12
2
+AVDD_USB_PLL
1
1
2
2
1
C3 8
0.1U _0402 _25V4Z
2
C3 1
39P 50V J NP O 0402
C3 7
0.1U _0402 _25V4Z
PEX
A
+AVDD_USB
+AVDD_USB_PLL
+VDDIO_SDIO
12
R7 5
1K_ 0402_1%
12
PEX_L0_TXN
PEX_L0_TXP
PEX_L0_RXN
PEX_L0_RXP
PEX_L1_TXN
PEX_L1_TXP
PEX_L1_RXN
PEX_L1_RXP
PEX_L2_TXN
PEX_L2_TXP
PEX_L2_RXN
PEX_L2_RXP
PEX_L3_TXN
PEX_L3_TXP
PEX_L3_RXN
PEX_L3_RXP
PEX_CLK_OUT1_N
PEX_CLK_OUT1_P
PEX_CLK_OUT2_N
PEX_CLK_OUT2_P
PEX_TSTCLKN
PEX_TSTCLKP
PEX_REFCLKN
PEX_REFCLKP
PEX_TERMP
U1F
AA14
AVDD_USB_1
Y14
AVDD_USB_2
AB11
AVDD_USB_PLL
VDDIO_SDIOP1SDIO3_DATA0
SDIO
AB8
VDDIO_HSIC
AB9
AVDD_IC_USB
R7 7
1K_ 0402_1%
AA3
DNC_0001
AB4
DNC_0002
AB6
DNC_0003
AC13
DNC_0004
AC3
DNC_0005
AE21
DNC_0006
AE22
DNC_0007
AE23
DNC_0008
AF23
DNC_0009
AF24
DNC_0010
AF26
DNC_0011
AF27
DNC_0012
T20_23X23
AD1
AD2
AA5
AA4
AC2
AC1
AA7
AA6
AA1
AA2
V4
V3
Y3
Y2
V6
V5
AC4
AD4
Y4
Y5
V1
V2
R8 5 0_04 02_5%
U1
R8 6 0_04 02_5%
U2
R8 7 2.49 K_040 2_1%
W6
USB
HSIC
1 2
1 2
1 2
NC
USB1_VBUS
USB1_DN
USB1_DP
USB1_ID
USB3_VBUS
USB3_DN
USB3_DP
USB3_ID
USB_REXT
SDIO3_DATA1
SDIO3_DATA2
SDIO3_DATA3
SDIO3_DATA4
SDIO3_DATA5
SDIO3_DATA6
SDIO3_DATA7
SDIO3_CLK
SDIO3_CMD
GPIO_PV4
GPIO_PV5
GPIO_PV6
HSIC_DATA
HSIC_STROBE
HSIC_REXT
IC_DN
IC_DP
IC_REXT
DNC_00013
DNC_00014
DNC_00015
DNC_00016
DNC_00017
DNC_00018
DNC_00019
DNC_00020
DNC_00021
DNC_00022
DNC_00023
AD17
AC14
AD14
AE14
AH14
AH15
AG15
AF15
AC16
R3
U3
U4
R4
T4
T6
R5
U7
R2
R1
P7
R7
R6
AC15
AD15
AE15
AF14
AG14
AE13
AF28
D22
G20
G21
M21
M7
R21
U5
V7
W4
Y6
+US B1_VB US
US B1_ DN
USB 1_DP
USB1_I D
+US B3_VB US
USB3_I D
USB _REXT
S DIO3_ CLK_R
to Mic ro USB alway s clie nt mode
R6 6 10K _0402_5%
1 2
R6 7 0_04 02_5%@
1 2
R7 0 10K _0402_5%@
1 2
R7 2 1K_ 0201_1%
1 2
TP80
R7 3 0_04 02_5%
1 2
Na me Ac tiv e
EC_ RES MUE Hi gh
AP_ ONK EY# Lo w
Na me Ac tiv e
EC_ LOW _BA T# Lo w
LOW _BA T# Lo w
B
+US B1_VB US
US B1_ DN [1 3]
USB 1_DP [ 13]
+AVDD_USB
US B1_I D [13 ,21]
+5V ALW
US B3_ DN [2 0]
USB 3_DP [ 20]
L:H OST
H:C lie nt
SDI O3_DA T0 [1 9]
SDI O3_DA T1 [1 9]
SDI O3_DA T2 [1 9]
SDI O3_DA T3 [1 9]
W_D ISAB LE# [ 17]
LC D_BL _EN [1 1]
SD IO3_C LK [ 19]
SD IO3_C MD [ 19]
CAM _PWR _EN [ 15]
3VS _VIB _EN [1 6]
TSC _INT [ 11]
UL PI_C LK
12/28 Add by EMC r equest
EC_ RESU ME[ 9,31]
EC_ LOW_B AT#[9 ]
2
G
RB7 51V- 40 SOD- 323
L:H OST
H:C lie nt
Mic ro SD
R3 93
0_04 02_5%
12
C3 12
10P _0402_50 V8J
1
2
+VDDIO_BB
R8 1
100K _0402_5 %
1 2
13
D
Q3
BSS 138W-7 -F_SOT323 -3
S
+VDDIO_A UDIO
D2
1 2
21
AP_ ONKE Y#
R8 3
100K _0201_5 %
LOW _BAT#
+1.8 VS
R6 3
1 2
0_04 02_5%
4.7U _0603 _6.3V6K
+VDDIO_BB
1
1
C3 2
0.1U _0402 _25V4Z
2
2
+1.8V S
C3 3
+VDDIO_BB +VDDIO_UART
R6 4
1 2
0_04 02_5%
+VDDIO_UART
1
0.1U _0402 _25V4Z
2
C3 4
1.8V
+1.8 VS
Close CPU
U1 G
BB UART
M8
VDDIO_BB
ULP I_DAT0[1 7]
ULP I_DAT1[1 7]
ULP I_DAT2[1 7]
ULP I_DAT3[1 7]
ULP I_DAT4[1 7]
ULP I_DAT5[1 7]
ULP I_DAT6[1 7]
ULP I_DAT7[1 7]
UL PI_CL K[17]
UL PI_ DIR[1 7]
ULP I_NXT[1 7]
ULP I_STP[ 17]
2/9 Ch ange R76 p ackage from 0201 to 0402.
SDI O1_CL K[1 6]
SD IO1_C MD[16 ]
Issued Date
SDI O1_DA T0[1 6]
SDI O1_DA T1[1 6]
SDI O1_DA T2[1 6]
SDI O1_DA T3[1 6]
ULP I_RES ET#[1 7]
WF _RST #[16 ]
TS_ SPI1_SC K[1 1]
TS_ SPI1_C S0#[ 11]
TS_S PI1_MOS I[ 11]
TS_S PI1_MISO[1 1]
CA M1_P WDN_P U[1 5]
CD C_I RQ#[1 2]
HEA D_DE T#[1 2,13]
MIC _DET#[13 ]
LCD_ BL_P WM_1P 8
R8 4
100K _0402_5 %
1 2
TP36
WIFI
WIFI
TS
Security Classification
THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TR ADE SE CRET I NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTM ENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
UL PI_C LK
R7 6
S DIO1_ CLK_R LCD_ BL_P WM_1P 8
1 2
S DIO1_ CMD
0_04 02_5%
SDI O1_D AT0
SDI O1_D AT1
SDI O1_D AT2
SDI O1_D AT3
DEV _MODE
AP_ ONKE Y#
AP_ ACOK#
+VDDIO_A UDIO
WF _RST #
LOW _BAT#
TS_ SPI1_S CK
TS_ SPI1_ CS0#
TS _SPI1_MOS I
TS _SPI1_MIS O
CA M1_P WDN_ PU
CD C_I RQ#
HEA D_DE T#
MIC _DET#
+VDDIO_UART +LCDVDD
Compal Secret Data
P4
ULPI_DATA0
P6
ULPI_DATA1
N4
ULPI_DATA2
L3
ULPI_DATA3
L4
ULPI_DATA4
L6
ULPI_DATA5
P5
ULPI_DATA6
N6
ULPI_DATA7
M2
ULPI_CLK
M3
ULPI_DIR
M1
ULPI_NXT
P3
ULPI_STP
L2
DAP3_DIN
L1
DAP3_DOUT
J3
DAP3_FS
M4
DAP3_SCLK
M6
SDIO1_CLK
J5
SDIO1_CMD
K6
SDIO1_DATA0
K4
SDIO1_DATA1
M5
SDIO1_DATA2
L5
SDIO1_DATA3
P2
GPIO_PV0
J7
GPIO_PV1
U6
GPIO_PV2
J6
GPIO_PV3
P21
VDDIO_AUDIO
R25
SPDIF_IN
N23
SPDIF_OUT
M28
SPI1_SCK
M27
SPI1_CS0#
M26
SPI1_MOSI
P26
SPI1_MISO
P24
SPI2_SCK
P23
SPI2_CS0#
P22
SPI2_CS1#
P28
SPI2_CS2#
N25
SPI2_MOSI
M25
SPI2_MISO
T20_23X 23
U3
1
VCCA
VCCB
A3B
5
GND
DIR
SN7 4AVC 1T45D CKR_ SC70-6
SA0 00029A00
Deciphered Date
D
AUDIO
6
4
2
1 2
2010/12/012011/4/1
R6 5
0_04 02_5%
VDDIO_UART
GEN1_I2C_SCL
GEN1_I2C_SDA
UART2_TXD
UART2_RXD
UART2_RTS#
UART2_CTS#
UART3_TXD
UART3_RXD
UART3_RTS#
UART3_CTS#
GPIO_PU0
GPIO_PU1
GPIO_PU2
GPIO_PU3
GPIO_PU4
GPIO_PU5
GPIO_PU6
DAP4_DIN
DAP4_DUT
DAP4_FS
DAP4_SCLK
DAP_MCLK1
DAP_MCLK2
DAP1_SCLK
DAP1_FS
DAP1_DUT
DAP1_DIN
DAP2_SCLK
DAP2_FS
DAP2_DUT
DAP2_DIN
LCD_ BL_P WM [ 11]
+VDDIO_AUDI O
C3 5
0.1U _0402 _25V4Z
1
2
H11
GE N1_I 2C_SC L
H6
GEN 1_I2C _SDA
H5
H7
F4
G6
F5
UAR T3_TXD
F3
UAR T3_RX D
F2
UAR T3_RT S#
F1
UAR T3_CT S#
E4
J1
G4
E1
F6
E5
H4
J2
H1
J4
H3
DAP 4_SC LK
H2
DAP _MCLK 1
P27
R24
DAP 1_SC LK
P25
DAP 1_FS
R27
DAP 1_DO UT
R28
DA P1_ DIN
R26
R23
R22
T23
T25
04/15 Chang e Netname from ACIN
to ACI N_T20 by power request.
+VDDIO_UART
GE N1_I 2C_SC L
GEN 1_I2C _SDA
R6 8 2.2K _0402 _1%
1 2
R6 9 2.2K _0402 _1%
1 2
GEN 1_I2C _SCL [ 12, 15]
GEN 1_I2C _SDA [12,1 5]
GPS _RXD [ 22]
GPS_TXD [22 ]
GPS _CTS_L [ 22]
GPS _RTS_L [ 22]
UART 3_TXD [ 16]
UAR T3_RXD [16]
UAR T3_RTS# [16 ]
UAR T3_CTS# [16 ]
BT_RST # [1 6]
BT_ WAKEUP [16 ]
BT
BT_ IRQ# [ 16]
DA P4_ DIN [ 16]
DAP 4_DO UT [1 6]
+VDDIO_BB
1 2
13
D
2
G
S
LA-7461P
E
DAP 4_FS [16]
DAP 4_SC LK_R [ 16]
DAP _MCL K1_R [ 12]
DAP _MCLK2 [17]
DAP 1_SC LK_R [ 12]
DAP 1_FS [12]
DAP 1_DO UT [1 2]
DA P1_ DIN [ 12]
TSP_ EN [1 1]
R8 2
100K _0402_5 %
AP_ ACOK#
Q4
BSS 138W- 7-F_SOT3 23-3
6
35
1 2
R7 8 0 _0402_5 %
1 2
R7 9 0 _0201_5 %
1 2
R8 0 0 _0201_5 %
TP38
TP40
TP43
ACI N_T20[27]
Title
Size Document Nu mber R ev
Cu sto m
Date: Sheet o f
Compal Electronics, Inc.
T20(3/4)USB/SDIO/UART/AUDIO
Mon day, Apri l 25, 2 011
0. 3
+3.3VS_LDO3
R6 2
1 2
0_04 02_5%
1 1
+3.3VS_LDO3
R7 1
1 2
0_04 02_5%
+3VS
R7 4
1 2
0_04 02_5%
2 2
3 3
4 4
Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).
1 1
2 2
3 3
4 4
A
U1A
GND_001
GND_002
GND_003
GND_004
GND_005
GND_006
GND_007
GND_008
GND_009
GND_010
GND_011
GND_012
GND_013
GND_014
GND_015
GND_016
GND_017
GND_018
GND_019
GND_020
GND_021
GND_022
GND_023
GND_024
GND_025
GND_026
GND_027
GND_028
GND_029
GND_030
GND_031
GND_032
GND_033
GND_034
GND_035
GND_036
GND_037
GND_038
GND_039
GND_040
GND_041
GND_042
GND_043
GND_044
GND_045
GND_046
GND_047
GND_048
GND_049
GND_050
GND_051
GND_052
GND_053
GND_054
GND_055
GND_056
GND_057
GND_058
GND_059
GND_060
GND_061
GND_062
GND_063
GND_064
GND_065
GND_066
GND_067
GND_068
GND_069
GND_070
GND_071
GND_072
GND_073
GND_074
GND_075
GND_076
GND_077
GND_078
GND_079
GND_080
GND_081
GND_082
GND_083
GND_084
GND_085
GND_086
GND_087
GND_088
GND_089
GND_090
GND_091
GND_092
GND_093
GND_094
GND_095
GND_096
GND_097
GND_098
GND_099
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_127
GND_128
GND_129
GND_130
GND_131
GND_132
GND_133
GND_134
GND_135
GND_136
T20_23X23
CORE
VDD_RTC_00 1
VDD_RTC_00 2
VDD_CPU_01
VDD_CPU_02
VDD_CPU_03
VDD_CPU_04
VDD_CPU_05
VDD_CPU_06
VDD_CPU_07
VDD_CPU_08
VDD_CPU_09
VDD_CPU_10
VDD_CPU_11
VDD_CPU_12
VDD_CPU_13
VDD_CPU_14
VDD_CPU_15
VDD_CPU_16
VDD_CPU_17
VDD_CORE_01
VDD_CORE_02
VDD_CORE_03
VDD_CORE_04
VDD_CORE_05
VDD_CORE_06
VDD_CORE_07
VDD_CORE_08
VDD_CORE_09
VDD_CORE_10
VDD_CORE_11
VDD_CORE_12
VDD_CORE_13
VDD_CORE_14
VDD_CORE_15
VDD_CORE_16
VDD_CORE_17
VDD_CORE_18
VDD_CORE_19
VDD_CORE_20
VDD_CORE_21
VDD_CORE_22
VPP_FUSE
VPP_KFUSE
VDD_CORE_SEN SE
GND_CORE_SE NSE
VDD_CPU_SENS E
GND_CPU_SEN SE
VDD_TP
GND_TP
VGND_TP
A1
A2
A27
A28
AA10
AA13
AA16
AA19
AA21
AA8
AA9
AB2
AB24
AB27
AB5
AC19
AD10
AD13
AD16
AD19
AD22
AD7
AE2
AE25
AE27
AE4
AG1
AG10
AG13
AG16
AG19
AG2
AG22
AG25
AG27
AG28
AG4
AG7
AH1
AH2
AH27
AH28
B1
B10
B13
B16
B19
B2
B22
B25
B27
B28
B4
B7
D2
D25
D27
D4
E10
E13
E16
E19
E22
E7
G2
G24
G27
G5
H10
H13
H16
H18
H19
H21
H8
K2
K21
K24
K27
K5
K8
L11
L12
L13
L14
L15
L18
L8
M12
N13
N14
N16
N17
N2
N21
N24
N27
N5
N8
P17
P18
R11
R14
R15
R17
R18
T11
T12
T14
T17
T18
T2
T21
T24
T27
T5
T8
U11
U12
U15
U18
U21
V11
V14
V15
V16
V21
W2
W21
W24
W27
W5
W8
Y11
Y12
Y13
A
V12
V13
H9
J10
J11
J8
J9
K9
L9
M11
M9
N11
N12
P11
P12
P13
P14
R12
R13
AA20
M13
M14
M15
M16
N15
P15
P16
R16
T13
T15
T16
U13
U14
U16
U17
V17
V18
W20
Y19
Y20
Y21
AB15
AB14
Y18
Y17
N9
P9
W9
Y10
AA11
B
1.0~1.2V
+VDD_RT C
R88 0_0402_5%
1
C40
0.1U_0402 _25V4Z
2
VDD_ KFUSE
VDD _CORE_SENSE
GND _CORE_SENSE
VDD_ CPU_SENSE
GND_ CPU_SENSE
VDD_TP
GND_TP
VGND_TP
B
C41
1
C45
2
R92
1 2
10K_0402_5%
+1.2VS_LDO2
12
1
2
4.7U_0603 _6.3V6K
C46
4.7U_0603 _6.3V6K
1
C42
2
1
2
+VDD_ FUSE
1
C50
0.1U_0402 _25V4Z
2
TP46
TP47
TP48
TP49
TP50
TP51
TP52
C43
4.7U_0603 _6.3V6K
1
2
4.7U_0603 _6.3V6K
3.3V
R91 0_0402_5%
0.9~1.0V
+VDD_ CPU
1
2
4.7U_0603 _6.3V6K
1.0~1.2V
1
C47
0.1U_0402 _25V4Z
2
+3.3VS_LDO7
12
1 2
R89 0 _0805_5%
1
C44
0.1U_0402 _25V4Z
2
+VDD_ CORE
1
2
C48
0.1U_0402 _25V4Z
C
1 2
R90 0 _0805_5%
C49
0.1U_0402 _25V4Z
CLIP1
CLIP
1
CLIP11
CLIP
1
H1
HOLEA
1
C
D
+1.0VS_SM1
+1.2VS_SM0
CLIP2
CLIP3
CLIP
CLIP12
CLIP
CLIP4
CLIP
CLIP
1
1
CLIP13
CLIP14
CLIP
CLIP
1
1
H3
H2
HOLEA
HOLEA
1
1
Security Classification
Issued Date
THIS SHE ET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TR ADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTM ENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
CLIP6
CLIP5
CLIP
CLIP
1
1
CLIP16
CLIP15
CLIP
CLIP
1
1
H4
H6
HOLEA
HOLEA
1
CLIP8
CLIP7
CLIP
CLIP
1
1
CLIP18
CLIP17
CLIP
CLIP
1
1
H8
HOLEA
1
1
CLIP10
CLIP9
CLIP
CLIP
1
1
CLIP19
CLIP
1
1
H11
H10
HOLEA
HOLEA
1
1
Compal Secret Data
Deciphered Date
1
H13
H14
HOLEA
HOLEA
1
1
2010/12/012011/4/1
D
E
FD1
FD2
1
1
FD5
FD6
1
1
ZZZ 1
PCB-MB
Title
Size Document Number R ev
Cust om
Date: Sheet o f
Compal Electronics, Inc.
T20(4/4)PWR_GND_NC
Monday, Apr il 25, 20 11
LA-7461P
E
FD4
FD3
1
1
FFC 1
PCB-MB
7
35
0.3
Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).
5
4
3
2
1
U4
DDR_ A_MA 9[ 5]
DDR_ A_MA 8[ 5]
DDR_ A_MA 7[ 5]
DDR_ A_MA 6[ 5]
DDR_ A_MA 5[ 5]
DDR_ A_MA 4[ 5]
DDR_ A_MA 3[ 5]
DDR_ A_MA 2[ 5]
D D
C C
B B
A A
DDR_ A_MA 1[ 5]
DDR_ A_MA 0[ 5]
M_C S#0[ 5]
M_C S#1[ 5]
M_ CLK_ DDR0[ 5]
M_ CLK_D DR#0[ 5]
M_C KE0[ 5]
M_C KE1[ 5]
DD R_A_ DQS3[ 5]
DD R_A_ DQS# 3[5 ]
DD R_A_ DQS2[ 5]
DD R_A_ DQS# 2[5 ]
DD R_A_ DQS1[ 5]
DD R_A_ DQS# 1[5 ]
DD R_A_ DQS0[ 5]
DD R_A_ DQS# 0[5 ]
DD R_A_ DM3[ 5]
DD R_A_ DM2[ 5]
DD R_A_ DM1[ 5]
DD R_A_ DM0[ 5]
DD R_A _D25[ 5]
DD R_A _D31[ 5]
DD R_A _D29[ 5]
DD R_A _D30[ 5]
DD R_A _D26[ 5]
DD R_A _D24[ 5]
DD R_A _D27[ 5]
DD R_A _D28[ 5]
DD R_A _D20[ 5]
DD R_A _D22[ 5]
DD R_A _D16[ 5]
DD R_A _D19[ 5]
DD R_A _D18[ 5]
DD R_A _D17[ 5]
DD R_A _D21[ 5]
DD R_A _D23[ 5]
DD R_A _D10[ 5]
DD R_A _D14[ 5]
DD R_A _D15[ 5]
DD R_A _D8[5 ]
DD R_A _D13[ 5]
DD R_A _D11[ 5]
DD R_A _D12[ 5]
DD R_A _D9[5 ]
DD R_A _D7[5 ]
DD R_A _D6[5 ]
DD R_A _D5[5 ]
DD R_A _D4[5 ]
DD R_A _D3[5 ]
DD R_A _D2[5 ]
DD R_A _D1[5 ]
DD R_A _D0[5 ]
DDR_ A_M A8
DDR_ A_M A7
DDR_ A_M A6
DDR_ A_M A5
DDR_ A_M A4
DDR_ A_M A3
DDR_ A_M A2
DDR_ A_M A1
DDR_ A_M A0
M_C S#0
M_C S#1
M _CLK_ DDR0
M _CLK_ DDR#0
M_C KE0
M_C KE1
DD R_A _DQS 3
DD R_A_ DQS# 3
DD R_A _DQS 2
DD R_A_ DQS# 2
DD R_A _DQS 1
DD R_A_ DQS# 1
DD R_A _DQS 0
DD R_A_ DQS# 0
DD R_A_ DM3
DD R_A_ DM2
DD R_A_ DM1
DD R_A_ DM0
DD R_A _D25
DD R_A _D31
DD R_A _D29
DD R_A _D30
DD R_A _D26
DD R_A _D24
DD R_A _D27
DD R_A _D28
DD R_A _D20
DD R_A _D22
DD R_A _D16
DD R_A _D19
DD R_A _D18
DD R_A _D17
DD R_A _D21
DD R_A _D23
DD R_A _D10
DD R_A _D14
DD R_A _D15
DD R_A _D8
DD R_A _D13
DD R_A _D11
DD R_A _D12
DD R_A _D9
DD R_A _D7
DD R_A _D6
DD R_A _D5
DD R_A _D4
DD R_A _D3
DD R_A _D2
DD R_A _D1
DD R_A _D0
T1
CA9
T2
CA8
U1
CA7
V2
CA6
W1
CA5
AB9
CA4
AB8
CA3
AC7
CA2
AB6
CA1
AC6
CA0
AB3
CS0#
AB4
CS1#
Y2
CK
Y1
CK#
AC3
CKE0
AC4
CKE1
B18
DQS3
A19
DQS3#
AB18
DQS2
AC19
DQS2#
J22
DQS1
K23
DQS1#
R23
DQS0
P22
DQS0#
B20
DM3
AB20
DM2
L23
DM1
N23
DM0
B12
DQ31
A13
DQ30
A14
DQ29
B14
DQ28
B15
DQ27
A16
DQ26
A17
DQ25
B17
DQ24
AC17
DQ23
AB17
DQ22
AC16
DQ21
AB15
DQ20
AC14
DQ19
AB14
DQ18
AC13
DQ17
AB12
DQ16
C22
DQ15
D23
DQ14
E23
DQ13
E22
DQ12
F22
DQ11
G23
DQ10
H23
DQ9
H22
DQ8
T23
DQ7
T22
DQ6
U22
DQ5
V23
DQ4
W23
DQ3
W22
DQ2
Y22
DQ1
AA23
DQ0
A1
DNU0
A2
DNU1
A22
DNU2
A23
DNU3
B1
DNU4
B2
DNU5
B22
DNU6
B23
DNU7
AB1
DNU8
AB2
DNU9
AB22
DNU10
AB23
DNU11
AC1
DNU12
AC2
DNU13
AC22
DNU14
AC23
DNU15
MT4 6H64M3 2L2JG-5IT -A_FBGA1 68
VDD1_0
VDD1_1
VDD1_2
VDD1_3
VDD1_4
VDD1_5
VDD1_6
VDD2_0
VDD2_1
VDD2_2
VDD2_3
VDD2_4
VDD2_5
VDD2_6
VDD2_7
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDCA_0
VDDCA_1
VDDCA_2
VREFDQ
VREFCA
NC10
NC11
NC13
NC14
NC15
NC16
NC17
NC18
NC20
NC21
NC22
NC23
NC24
NC26
NC27
NC28
NC29
NC30
NC31
NC32
NC33
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSSCA0
VSSCA1
VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
VSSQ11
ZQ0
ZQ1
NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
B3
A11
A20
N22
AC20
AB5
N2
B11
B21
L22
AB21
AB10
AA2
R2
C2
B13
B16
B19
D22
G22
K22
R22
V22
AA22
AB19
AB16
AB13
AC8
W2
U2
M22
P2
P1
AC11
A3
A4
A5
A6
A7
A8
A9
A10
B4
B6
B7
B9
D1
D2
E1
E2
F1
G1
G2
H1
H2
J1
K1
K2
L1
L2
M1
N1
AC9
AC10
B10
A21
M23
AC21
AB11
AC5
AA1
R1
M2
C1
B5
B8
J2
F2
AB7
V1
A12
A15
A18
C23
F23
J23
P23
U23
Y23
AC18
AC15
AC12
+1.8 V_LP RRD2DDR_ A_M A9
+1.2 V_LP RRD2
R9 7
240_ 0402_1%
1 2
R4 31
1 2
0_08 05_5%
R4 32
1 2
0_08 05_5%
R9 8
240_ 0402_1%
1 2
C5 3
0.01 U_040 2_25V7
C6 1
0.01 U_040 2_25V7
C7 3
0.01 U_040 2_25V7
C7 7
0.01 U_040 2_25V7
+1.8V
+1.2V
+1.2V
04/22 Chang e R93,R94,R95,R96 to 12K_1%.
+VR AM_VRE FA
R9 4
12K _0402_1%
+1.8 V_LP RRD2 +1.2 V_LP RRD2
1
2
C5 4
0.1U _0402 _25V4Z
2
1
1U_0 402_6 .3V4Z
+1.8 V_LP RRD2
1
2
C6 2
0.1U _0402 _25V4Z
2
1
1U_0 402_6 .3V4Z
+1.8 V_LP RRD2
2
1
C7 4
0.1U _0402 _25V4Z
1
2
1U_0 402_6 .3V4Z
+1.8 V_LP RRD2
1
2
C7 8
0.1U _0402 _25V4Z
2
1
1U_0 402_6 .3V4Z
R9 3
12K _0402_1%
1 2
2
C5 1
0.1U _0402 _25V4Z
1
1 2
12K _0402_1%
1
2
C5 5
C5 6
0.1U _0402 _25V4Z
2
1
1
2
C6 3
C6 4
0.1U _0402 _25V4Z
2
1
2
1
C7 5
C7 6
0.1U _0402 _25V4Z
1
2
2
1
C7 9
C8 0
0.1U _0402 _25V4Z
1
2
+VR AM_VRE FA
R9 6
1 2
+1.2 V
R9 5
12K _0402_1%
1 2
2
C5 2
0.1U _0402 _25V4Z
1
0.01 U_040 2_25V7
0.01 U_040 2_25V7
C6 9
0.01 U_040 2_25V7
C8 1
0.01 U_040 2_25V7
C5 7
+1.2 V_LP RRD2
1
C6 5
2
+1.2 V_LP RRD2
1
2
+1.2 V_LP RRD2
1
2
1
2
2
1
2
1
2
C5 8
0.1U _0402 _25V4Z
1
1U_0 402_6 .3V4Z
2
1
C6 6
0.1U _0402 _25V4Z
1
2
1U_0 402_6 .3V4Z
1
C7 1
C7 0
0.1U _0402 _25V4Z
2
1U_0 402_6 .3V4Z
1
C8 3
C8 2
0.1U _0402 _25V4Z
2
1U_0 402_6 .3V4Z
1
C5 9
2
C6 7
2
C6 0
0.1U _0402 _25V4Z
1
2
C6 8
0.1U _0402 _25V4Z
1
2
C7 2
0.1U _0402 _25V4Z
1
2
C8 4
0.1U _0402 _25V4Z
1
Security Classification
Issued Date
THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TR ADE SE CRET I NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTM ENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Deciphered Date
2
2010/12/012011/4/1
Title
Size Document Nu mber R ev
Cu sto m
Date: Sheet o f
Compal Electronics, Inc.
DDRII-DEVICE DOWN(1/2)
Mon day, Apri l 25, 2 011
LA-7461P
1
8
0. 3
35
Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).
5
4
3
2
1
+E C_AV CC+3V ALW
L3 FB M-11- 160808-601- T_0603
1 2
D D
+3V ALW
1 2
R1 04 0 _0805 _5%
C C
+3V ALW
R1 08 47K _0402_1%
1 2
R2 37 47K _0402_1%
1 2
R1 09 47K _0402_1%
1 2
R1 10 47K _0402_1%
1 2
R1 12 2.2K _0402 _1%
1 2
R1 13 2.2K _0402 _1%
1 2
B B
SPI_CLK_R
R1 14
0_04 02_5%
12
@
close to U7
C9 8
68P _0402_50 V8J
1
@
2
A A
BIOS
FSE L#SP ICS#
+3V ALW
C8 5
0.1U _0402 _25V4Z
1
2
EC AG ND
R1 01
12
0_04 02_5%
C9 2
1
2
C8 6
C8 7
C8 8
4.7U _0603 _6.3V6K
10P _0402_25V 8K
1
2
C9 3
0.1U _0402 _25V4Z
1
2
5
68P _0402_50 V8J
1
1
2
2
+3VALW_EC
C9 5
C9 4
0.1U _0402 _25V4Z
0.1U _0402 _25V4Z
1
1
2
2
EC_ RST#
KS O0
KS O1
KS O2
EC_ SMB_ CK1
EC_ SMB_ DA1
32.7 68KH Z_12. 5P_1T JE125DP1A 000M
U7
1
CE#
3
WP#
7
HOLD#
4
VSS
MX25L1 005AMC-12G _SOP8
SA0 0003FL10
+3V ALW_E C
4.7U _0603 _6.3V6K
1
2
C9 9
33P _0402_50V 8K
EC_ SMB_CK 1[2 6,27]
EC_ SMB_DA 1[2 6,27]
POUT[2 0]
SYS TEM_RES ET#[3 1]
EC_ LOW_BA T#[ 6]
ON /OF F#[24 ]
PWR _SUS P_LE D[2 4]
TEMP_ THERM#[1 4]
X1
1 2
C1 00
1
2
+3V ALW
8
VDD
SPI_CLK_R SPI_CLK
6
SCK
FW R#S PI_S I
5
SI
FR D#SP I_SO
2
SO
R4 36 100K _0402_5 %
1 2
EC_ RST#
C9 1
0.1U _0402 _25V4Z
1
2
KSI 4
KSI 5
KSI 6
KSI 7
KS O0
KS O1
KS O2
KS O3
EC_ SMB_ CK1
EC_ SMB_ DA1
PO UT
SY STEM_RE SET#
EC_ LOW_B AT#
INV T_PWM
TP53
EC_TX_ P80_DATA
EC_ RX_P 80_CLK
TP54
ON /O FF#
PWR _SUS P_LE D
XCLK I
XCLKO
XCLK I
XCLKO
33P _0402_50V 8K
3/28 Change C99 and C100
to 33pF to reduce X1
output CLK deviation
R1 19
1 2
0_04 02_5%
4
+3V ALW_E C
+3VALW_EC
U5
1
GATEA20/GPIO00
2
KBRST#/GPIO01
3
SERIRQ#
4
LPC_FRAME#/LFRAME#
5
LPC_AD3/LAD3
7
LPC_AD2/LAD2
8
LPC_AD1/LAD1
10
LPC_AD0/LAD0
12
CLK_PCI_EC/PCICLK
13
PCIRST#/GPIO05
37
EC_RST#/ECRST#
20
EC_SCI#/GPIO0E
38
CLKRUN#/GPIO1D
55
KSI0/GPIO30
56
KSI1/GPIO31
57
KSI2/GPIO32
58
KSI3/GPIO33
59
KSI4/GPIO34
60
KSI5/GPIO35
61
KSI6/GPIO36
62
KSI7/GPIO37
39
KSO0/GPIO20
40
KSO1/GPIO21
41
KSO2/GPIO22
42
KSO3/GPIO23
43
KSO4/GPIO24
44
KSO5/GPIO25
45
KSO6/GPIO26
46
KSO7/GPIO27
47
KSO8/GPIO28
48
KSO9/GPIO29
49
KSO10/GPIO2A
50
KSO11/GPIO2B
51
KSO12/GPIO2C
52
KSO13/GPIO2D
53
KSO14/GPIO2E
54
KSO15/GPIO2F
81
KSO16/GPIO48
82
KSO17/GPIO49
77
EC_SMB_CK1/SCL0/GPIO44
78
EC_SMB_DA1/SDA0/GPIO45
79
EC_SMB_CK2/SCL1/GPIO46
80
EC_SMB_DA2/SDA1/GPIO47
6
PM_SLP_S3#/GPIO04
14
PM_SLP_S5#/GPIO07
15
EC_SMI#/GPIO08
16
GPIO0A
17
GPIO0B
18
GPIO0C
19
SUS_PWR_DN_ACK/GPIO0D
25
INVT_PWM/PWM2/GPIO11
28
FAN_SPEED1/FANFB0/GPIO14
29
FANFB1/GPIO15
30
EC_TX/GPIO16
31
EC_RX/GPIO17
32
ON_OFF/GPIO18
34
SUSP_LED#/GPIO19
36
NUM_LED#/GPIO1A
122
XCLK1
123
XCLK0
KB9 30QF- A1_LQFP12 8_14X14
12
R1 20
100K _0402_5 %
LPC & MISC
Int. K/B
Matrix
KS O2
KS O3
KSI 5
KSI 4
KSI 6
KSI 7
EC_TX_ P80_DATA
+E C_AV CC
9
22
33
67
96
111
125
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
PWM0/GPIO0F
BEEP#/PWM1/GPIO10
PWM Output
DA Output
PS2 Inte rface
SPI D evice I/F
SPI Flas h ROM
SM Bus
GPIO
GND
GND
11
24
35
10
MOL EX 5 14410 893 8 P H1 .1 FP C S H- CONN
CO NN@
ACOFF/FANPWM1/GPIO13
BATT_TEMP/AD0/GPI38
BATT_OVP/AD1/GPI39
AD Input
DAC_BRIG/DA0/GPO3C
EN_DFAN1/DA1/GPO3D
EC_MUTE#/PSCLK1/GPIO4A
USB_EN#/PSDAT1/GPIO4B
CAP_INT#/PSCLK2/GPIO4C
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F
WOL_EN/SDICLK/GPXIOA01
ME_EN/SDIMOSI/GPXIOA02
LID_SW#/GPXIOD00
GPIO
BATT_CHG_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
PWR_LED#/GPIO55
VR_ON/XCLK32K/GPIO57
EC_RSMRST#/GPXIOA03
EC_LID_OUT#/GPXIOA04
EC_SWI#/GPXIOA06
ICH_PWROK/GPXIOA07
BKOFF#/GPXIOA08
GPO
RF_OFF#/GPXIOA09
PM_SLP_S4#/GPXIOD01
GPI
EC_THERM#/GPXIOD04
PBTN_OUT#/GPXIOD06
EC_PME#/GPXIOD07
GND
AGND
GND
GND
69
94
113
EC AG ND
JP 1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
G1
G2
FANPWM0/GPIO12
ADP_I/AD2/GPI3A
AD3/GPI3B
AD4/GPI42
AD5/GPI43
IREF/DA2/GPO3E
DA3/GPO3F
PSDAT2/GPIO4D
SDICS#/GPXIOA00
SPIDI/MISO
SPIDO/MOSI
SPICLK/GPIO58
H_PECI/GPIO41
FSTCHG/GPIO50
SYSON/GPIO56
AC_IN/GPIO59
EC_ON/GPXIOA05
GPXIOA10
GPXIOA11
ENBKL/GPXIOD02
EAPD/GPXIOD03
SUSP#/GPXIOD05
SPICS#
GPIO40
V18R
+3V ALW
12
R9 9
100K _0402_5 %
S TANDB Y#
21
23
SM0 _PG#
26
AC OFF
27
BATT_TEMP 1
63
64
A DP_I
65
66
75
+US B_CLI ENT _OC
76
68
70
71
72
EC_ SMB_ SCL
R3 77 0_04 02_5%
83
EC_ SMB_S DA
84
85
86
87
88
97
DO CK_O K
98
99
3VS _EN
109
FR D#SP I_SO
119
FW R#S PI_S I
120
SPI_CLK
126
FSE L#SP ICS#
128
73
74
89
90
91
92
HDM I_SE L
93
95
P_I NT#
121
127
EC_ RESU ME_R
100
3G_ EN#
101
EC _ON
102
103
104
105
106
107
DO CK_ ON
108
R3 94 0_0 402_5%
110
112
R4 34 0_0 402_5%
114
SIM _DET
115
116
EC _A CIN
117
118
124
C9 6
0.1U _0402 _25V4Z
Security Classification
Issued Date
THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TR ADE SE CRET I NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTM ENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
1 2
R3 78 0_04 02_5%
1 2
R1 11 0 _0402_5 %
1 2
1 2
1 2
C9 7
4.7U _0603 _6.3V6K
1
1
2
2
04/15 Add EC _ACIN by PWR and E C request.
SE AR CH
ST ANDB Y# [ 24]
AC OFF [ 27, 32]
BATT_TEMP 1 [2 6]
AD P_I [ 27]
+US B_CLI ENT_ OC [2 5]
AP_ SMB_SCL [11,1 5,17]
AP_S MB_SDA [11, 15,17 ]
T20_ WAKE# [4]
DO CK_O K [13 ]
USB _SEL [ 20]
US B_AC _IN [ 32]
US B_CH G_EN [32]
HDM I_SEL [18 ]
P_I NT# [ 4,20]
A CIN [ 27]
EC_ RESU ME [6 ,31]
3G_ EN# [ 17]
EC _ON [ 24,2 6]
FORCE _RECOVERY [4]
PW R_OF F_AP [4]
DO CK_ ON [5 ]
EN_ VDD_1 V8 [ 23,24 ,29]
SIM _DET [ 4,17]
EC _AC IN [ 27]
CLK _32K_ IN[5 ,31]
Compal Secret Data
+1.8 VS_L DO4
Deciphered Date
2
13
D
Q5BSS 138W- 7-F_SOT3 23-3
2
G
S
SE AR CH_C[5 ] SE ARC H [18 ]
R1 15 0_04 02_5%
@
1 2
@
1 2
R1 17 0_04 02_5%
R2 38 0_0 402_5%
1 2
R1 02 0_0 402_5%@
1 2
12
R1 03
100K _0402_5 %
3VS _EN
EC_ RESU ME
AC OFF
DO CK_ ON
+LDO 4_1.8 V
SN7 4AVC 1T45D CKR_ SC70-6
2010/12/012011/4/1
BATT_TEMP A t rac e w idt h 1 0 mil
BATT_TEMP 1
A CIN
SM0_P G [1 7,31]
CO RE_ PWR_R EQ [ 5,31]
R1 05 100K _0402_5 %
1 2
R1 06 10K _0402_5%
1 2
R1 07 10K _0402_5%
1 2
R2 82 57.6 K_040 2_1%
1 2
+3VS + 3VALW+1.8V S
12
R4 16
1K_ 0402_5%
G
2
13
D
S
Q23 SSM3 K7002 FU_SC70-3
U6
@
1
5
SA0 00029A00
6
VCCA
VCCB
4
A3B
2
GND
DIR
Title
Size Document Nu mber R ev
Date: Sheet o f
ENE/BIOS/LIGHT SENSOR
Cu sto m
Mon day, Apri l 25, 2 011
C9 0
C8 9
100P _0402_ 50V8J
100P _0402_ 50V8J
1
1
2
2
+3VS
12
R4 17
1K_ 0402_5%
From S EARCH buttonTo T20
SE AR CHSE AR CH_C
R1 16 0 _0402_5 %
@
1 2
E C_CLKCL K_32 K_IN_ R XCLKO
@
1 2
R1 18 0 _0402_5 %
+3V ALW
Compal Electronics, Inc.
LA-7461P
1
9
0. 3
35
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5
4
3
2
1
+VDDIO_MMC
+VDDIO_MMC
T10
U9
VCC
VCCQK6VCCQW4VCCQY4VCCQ
AA3
AA5
VCCQ
C1 01
2.2U _0402 _6.3VM Z
W5
CMD
1
2
HSM MC_C MD_R
1
1
0.1U _0402 _25V4Z
C1 03
C1 02
2
2
0.1U _0402 _25V4Z
R1 23 33_0 402_5%
1 2
2.2U _0402 _6.3VMZ
12/23 Place close U1
W6
CLK
HSM MC_D AT0_R
H3
DAT0
HSM MC_D AT1_R
H4
DAT1
HSM MC_D AT2_R
H5
DAT2
HSM MC_D AT3_R
J2
DAT3
HSM MC_D AT4_R
J3
DAT4
HSM MC_D AT5_R
J4
DAT5
HSM MC_D AT6_R
J5
DAT6
HSM MC_D AT7_R
J6
DAT7
V DDI
K2
VDDi
U1
NC
U2
NC
U3
NC
MM C_RST#
U5
NC
U6
NC
U7
NC
U10
NC
U12
NC
U13
NC
U14
NC
V1
NC
V2
NC
V3
NC
V12
NC
V13
NC
V14
NC
W1
NC
W2
NC
W3
NC
W7
NC
W8
NC
W9
NC
W10
NC
W11
NC
W12
NC
W13
NC
W14
NC
Y1
NC
Y3
NC
Y6
NC
Y7
NC
Y8
NC
Y9
NC
Y10
NC
Y11
NC
Y12
NC
Y13
NC
Y14
NC
AA1
NC
AA2
NC
AA7
NC
AA8
NC
AA9
NC
AA10
NC
AA11
NC
AA12
NC
AA13
NC
AA14
NC
AE1
NC
AE14
NC
AG2
NC
AG13
NC
AH4
NC
AH6
NC
AH9
NC
AH11
VSSQ
VSSQ
VSSQY5VSSQY2VSSQ
AA6
AA4
VSSU8VSS
K4
NC
VSSP5VSS
M7
R10
R1 24 0_04 02_5%
R1 25 33_0 402_5%
R1 26 33_0 402_5%
R1 27 33_0 402_5%
R1 28 33_0 402_5%
R1 29 33_0 402_5%
R1 30 33_0 402_5%
R1 31 33_0 402_5%
R1 32 33_0 402_5%
C1 06 0 .1U_0 402_10V 7K
R1 33 0_04 02_5%@
HSMMC_CMD_R
HSMMC_DAT0_R
HSMMC_DAT1_R
HSMMC_DAT2_R
HSMMC_DAT3_R
HSMMC_DAT4_R
HSMMC_DAT5_R
HSMMC_DAT6_R
HSMMC_DAT7_R
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1.8V
+VDDIO_MMC
12
R1 34
10K _0402_5%
HSM MC_C LK_R
R1 35
R1 21 0_080 5_5%
U8
A4
NC
A6
NC
A9
NC
A11
NC
B2
NC
B13
NC
D1
NC
D14
NC
H1
NC
H2
NC
H6
NC
H7
NC
H8
NC
H9
NC
H10
NC
H11
NC
H12
NC
H13
NC
H14
NC
J1
NC
J7
NC
J8
NC
J9
NC
J10
NC
J11
NC
J12
NC
J13
NC
J14
NC
K1
NC
K3
NC
K5
NC
K7
NC
K8
NC
K9
NC
K10
NC
K11
NC
K12
NC
K13
NC
K14
NC
L1
NC
L2
NC
L3
NC
L4
NC
L12
NC
L13
NC
L14
NC
M1
NC
M2
NC
M3
NC
M5
NC
M8
NC
M9
NC
M10
NC
M12
NC
M13
NC
M14
NC
N1
NC
N2
NC
N3
NC
N10
NC
N12
NC
N13
NC
N14
NC
P1
NC
P2
NC
P3
NC
P10
NC
P12
NC
P13
NC
P14
NC
R1
NC
R2
NC
R3
NC
R5
NC
R12
NC
R13
NC
R14
NC
T1
NC
T2
NC
T3
NC
T5
NC
T12
NC
T13
NC
T14
NC
+VCORE_MMC
12
VCCM6VCCN5VCC
SDI N4C2- 16G_ TFBGA16 9
+2.8 5VS_ LDO5
D D
C C
B B
A A
+VCORE_MMC
C1 04
12
1
2
HSMMC_CMD
HSM MC_CL KHSM MC_C LK_R
HSM MC_DA T0
HSM MC_DA T1
HSM MC_DA T2
HSM MC_DA T3
HSM MC_DA T4
HSM MC_DA T5
HSM MC_DA T6
HSM MC_DA T7
R3 61
0_04 02_5%@
1
C1 05
0.1U _0402 _25V4Z
2
Clo se U8
+1.8V S
+1.8V
HSM MC_CM D [4 ]
HSM MC_CL K [4 ]
HSM MC_DAT 0 [4 ]
HSM MC_DAT 1 [4 ]
HSM MC_DAT 2 [4 ]
HSM MC_DAT 3 [4 ]
HSM MC_DAT 4 [4 ]
HSM MC_DAT 5 [4 ]
HSM MC_DAT 6 [4 ]
HSM MC_DAT 7 [4 ]
SYS _RES ET# [5 ,22, 31]
1 2
R1 22 0_080 5_5%
R3 80 0_06 03_5%@
1 2
+VD DIO_M MC
12/24 Add by EMC r equest
1
C1 07
@
12P _0402_5 0V4Z
2
12
12
R1 36
R1 37
100K _0402_5 %
100K _0402_5 %
12
12
R1 38
R1 39
100K _0402_5 %
100K _0402_5 %
12
12
R1 41
R1 40
100K _0402_5 %
100K _0402_5 %
12
12
R1 42
100K _0402_5 %
100K _0402_5 %
03/01 Add U3 7 for eMMC 1 4X18 f ootpri nt by facto ry request.
+VDDIO_MMC+VCORE_MMC
U3 7
A4
NC
A6
NC
A9
NC
A11
NC
B2
NC
B13
NC
D1
NC
D14
NC
H1
NC
H2
NC
H6
NC
H7
NC
H8
NC
H9
NC
H10
NC
H11
NC
H12
NC
H13
NC
H14
NC
J1
NC
J7
NC
J8
NC
J9
NC
J10
NC
J11
NC
J12
NC
J13
NC
J14
NC
K1
NC
K3
NC
K5
NC
K7
NC
K8
NC
K9
NC
K10
NC
K11
NC
K12
NC
K13
NC
K14
NC
L1
NC
L2
NC
L3
NC
L4
NC
L12
NC
L13
NC
L14
NC
M1
NC
M2
NC
M3
NC
M5
NC
M8
NC
M9
NC
M10
NC
M12
NC
M13
NC
M14
NC
N1
NC
N2
NC
N3
NC
N10
NC
N12
NC
N13
NC
N14
NC
P1
NC
P2
NC
P3
NC
P10
NC
P12
NC
P13
NC
P14
NC
R1
NC
R2
NC
R3
NC
R5
NC
R12
NC
R13
NC
R14
NC
T1
NC
T2
NC
T3
NC
T5
NC
T12
NC
T13
NC
T14
NC
KLM AG4EE HM-B101_F BGA169
@
M6
N5
T10
U9
VDDF
VDDF
VDDF
VDDF
K6
W4
Y4
AA3
AA5
VDD
VDD
VDD
VDD
VDD
HSM MC_C MD_R
W5
CMD
HSM MC_C LK_R
W6
CLK
HSM MC_D AT0_R
H3
DAT0
HSM MC_D AT1_R
H4
DAT1
HSM MC_D AT2_R
H5
DAT2
HSM MC_D AT3_R
J2
DAT3
HSM MC_D AT4_R
J3
DAT4
HSM MC_D AT5_R
J4
DAT5
HSM MC_D AT6_R
J5
DAT6
HSM MC_D AT7_R
J6
DAT7
V DDI
K2
VDDi
U1
NC
U2
NC
U3
NC
MM C_RST#
U5
NC
U6
NC
U7
NC
U10
NC
U12
NC
U13
NC
U14
NC
V1
NC
V2
NC
V3
NC
V12
NC
V13
NC
V14
NC
W1
NC
W2
NC
W3
NC
W7
NC
W8
NC
W9
NC
W10
NC
W11
NC
W12
NC
W13
NC
W14
NC
Y1
NC
Y3
NC
Y6
NC
Y7
NC
Y8
NC
Y9
NC
Y10
NC
Y11
NC
Y12
NC
Y13
NC
Y14
NC
AA1
NC
AA2
NC
AA7
NC
AA8
NC
AA9
NC
AA10
NC
AA11
NC
AA12
NC
AA13
NC
AA14
NC
AE1
NC
AE14
NC
AG2
NC
AG13
NC
AH4
NC
AH6
NC
AH9
NC
AH11
VSSQ
VSS
VSSQ
VSSQ
VSSQ
VSSQ
K4
Y2
Y5
U8
AA4
AA6
R10
NC
VSS
VSSP5VSS
M7
Security Classification
Issued Date
THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TR ADE SE CRET I NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTM ENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Deciphered Date
2
2010/12/012011/4/1
Title
Size Document Nu mber R ev
Cu sto m
Date: Sheet o f
Compal Electronics, Inc.
eMMC
Mon day, Apri l 25, 2 011
LA-7461P
1
10
0. 3
35
Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com).
5
4
3
2
1
LVDS Bridge
1.8V level
LC D_D 12[4]
LC D_D 13[4]
LC D_D 14[4]
LVD S_SH TDN#
LC D_PC LK[4 ]
LVD S_SH TDN#[ 4]
12
LC D_D 15[4]
LC D_D 16[4]
LC D_D 17[4]
LC D_D 06[4]
LC D_D 07[4]
LC D_D 08[4]
LC D_D 09[4]
LC D_D 10[4]
LC D_D 11[4]
LC D_D 00[4]
LC D_D 01[4]
LC D_D 02[4]
LC D_D 03[4]
LC D_D 04[4]
LC D_D 05[4]
LC D_H SY NC[ 4]
LC D_V SY NC[ 4]
R1 51
LC D_D E[4]
10K _0402_5%
+VD D_BIO
D D
C C
LC D_D 12
LC D_D 13
LC D_D 14
LC D_D 15
LC D_D 16
LC D_D 17
LC D_D 06
LC D_D 07
LC D_D 08
LC D_D 09
LC D_D 10
LC D_D 11
LC D_D 00
LC D_D 01
LC D_D 02
LC D_D 03
LC D_D 04
LC D_D 05
L CD_ HSY NC
LC D_V SY NC
LC D_D E
LC D_PC LK
LVD S_SH TDN#
1 2
R1 48 10K _0402_5%
1 : Ri sing edge
0 : Fa lling edge
+VD D_BIO LC D_BL _ENLCD_ BL_P WM_R
C1 16
0.01 U_040 2_25V7
1
1
2
2
2/15 C hange U9 f rom T SSOP to BGA type by sourcer suggest
+VDD_LVDS
C1 17
0.01 U_040 2_25V7
1
2
U9
J2
D0
K1
D1
K2
D2
J3
D3
K3
D4
K4
D5
J4
D6
K5
D7
K6
D8
J6
D9
H4
D10
H6
D11
G5
D12
G6
D13
F6
D14
E5
D15
E6
D16
D6
D17
D5
D18
C6
D19
B6
D20
B5
D21
A6
D22
A5
D23
A4
D24
B4
D25
A3
D26
J1
D27
A2
CLKIN
B3
SHTDN#
D4
CLKSEL
E3
NC1
E4
NC2
F3
NC3
F4
NC4
SN7 5LVDS 83BZ QLR_ BGA56P -NH
C1 18
C1 19
0.01 U_040 2_25V7
C1 20
4.7U _0603 _6.3V6K
1U_0 402_6 .3V4Z
1
1
2
2
CLKP
CLKM
Y0M
Y1M
Y2M
Y3M
VCC
PLLVCC
LVDSVCC
IOVCC1
IOVCC2
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
D2
D1
H2
Y0P
H1
G2
Y1P
G1
E2
Y2P
E1
C2
Y3P
C1
H5
B2
F1
G4
C4
C3
C5
D3
F5
G3
H3
J5
A1
B1
F2
Clo se U9
LC D_PC LK
@
12
R3 62
0_04 02_5%
1
C3 07
10P _0402_50 V8J@
2
LVD S_AC LK
LVD S_AC LK#
LVDS_A0
LVDS_A0#
LVDS_A1
LVDS_A1#
LVDS_A2
LVDS_A2#
+VD D_LVD S
+3VS
12
+VD D_BIO
R1 44
0_08 05_5%
+1.8VS
R1 43
12
0_08 05_5%
BSS 138W-7 -F_SOT323 -3
EN _VDD _PNL[4]
Q20
EN _VD D_PNL
12
13
D
S
10K _0402_5%
LVDS
+3VS +L CDV DD
R1 46
LCD POWER CIRCUIT
1
13
2
G
2
3
4
D
Q6
BSS 138W-7 -F_SOT323 -3
S
R1 45
1 2
100K _0402_5 %
1 2
U1 0
GND
IN
IN
EN#
APL 3510DXI -TRG MSO P 8P
8
OUT
7
OUT
6
OUT
5
OC#
+L CDV DD_L
L4
1 2
FBM A-L11-2 01209-221LM A30T_0805
LED POWER CIRCUIT
R3 57
4.7K _0402_5 %
2
G
2
G
R3 56
1 2
120K _0402_5%
13
D
Q21
BSS 138W- 7-F_SOT3 23-3
S
B++L EDVD D
R3 52
12
100K _0402_5 %
C3 04
1U_0 402_6 .3V6K
1
2
Q19
FDC 604P_ NL_SS OT6
D
S
6
4 5
2
1
G
3
1 2
R4 33 0_08 05_5%
C3 13
0.04 7U_04 02_16V 4Z
1
@
2
+L EDVD D
ED ID
AP_ SMB_SCL[9 ,15, 17]
AP_ SMB_SDA[9,1 5,17 ]
LCD_ BL_P WM[6]
LC D_BL _EN[6]
3/28 C hange C298 package
from 0 603 to 0805 for
materi al shortage
C1 11
R1 49
39P 50V J NP O 0402
10K _0402_5%
12
1
@
2
+L CDV DD
+3VS
R3 75 0_04 02_5%
1 2
R3 76 0_04 02_5%
1 2
R1 47 0_04 02_5%
1 2
+L EDV DD
C1 09
C1 08
330P _0402_5 0V7K
0.1U _0402 _25V4Z
1
12
@
2
R1 50
10K _0402_5%
12
+L EDVD D
1
2
+L EDVD D
C2 98
10U_ 0805_ 10V4K
12/24 Add by EMC r equest
LVDS CONN
JLV DS1
1
1
2
2
3
LCD_ SMB _SCL
LCD_ SMB _SDA
LVDS_A0#
LVDS_A0
LVDS_A1#
LVDS_A1
LVDS_A2#
LVDS_A2
LVDS_ACLK#
LVDS_ACLK
LCD_ BL_P WM_R
LCD_BL_EN
+L CDV DD
C1 10
C1 12
100P _0402_ 50V8J
0.1U _0402 _10V7K
1
1
2
2
LVDS_ACLK
LVDS_ACLK#
LVDS_A2
LVDS_A2#
LVDS_A1
LVDS_A1#
LVDS_A0
LVDS_A0#
03/08 Chang e C14 7,C148,C150,C152,C195,C196,C302,C303
from 1 0p to 18p by RF request.
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
26
27
28
29
30
STA RC_10 7K30-0000 01-G2
25
26
27
28
29
30
CO NN@
GND1
GND2
GND3
GND4
GND5
GND6
31
32
33
34
35
36
280mA
C1 14
1
2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
C1 15
4.7U _0805 _10V4Z
39P 50V J NP O 0402
1
2
C1 13
0.1U _0402 _10V7K
1
2
C3 02 18P_0 402_50V 8J
C3 03 18P_0 402_50V 8J
C1 47 18P_0 402_50V 8J
C1 48 18P_0 402_50V 8J
C1 50 18P_0 402_50V 8J
C1 52 18P_0 402_50V 8J
C1 95 18P_0 402_50V 8J
C1 96 18P_0 402_50V 8J
B B
TOUCH SCREEN
+3VS +TS_ LDO
SI2 301CDS -T1-GE3_ SOT23-3
1 2
C3 18 1 U_040 2_6.3V6 K
1 2
R4 28 100K _0402_5 %
TSP _EN[ 6]
A A
TS P_EN
S
2
G
5
Q2 4
D
13
G
2
13
D
Q25
BSS 138W-7 -F_SOT323 -3
S
R4 35
1 2
0_08 05_5%
+TS_ LDO +TS_ LDO
+1.8VS
+1.8V Level +3.3V Level
C1 23 0 .1U_0 402_10 V6K
C1 24 1 0U_08 05_10V4K
1
1
2
2
TS_ SPI1_SC K[ 6]
TS_S PI1_MOS I[ 6]
TS_S PI1_MISO[6]
TS_ SPI1_C S0#[6 ]
R4 29 22_0 402_5%
4
1 2
Level shift
U3 4
1
VCCA
VCCB
2
A1
A2
A3
A4
NC
GND
B1
B2
B3
B4
NC
OE
3
4
5
6
7
TXB0 104PWR_TS SOP14
14
R2 35 22_0 402_5%
1 2
13
R1 89 22_0 402_5%
1 2
12
11
R2 04 22_0 402_5%
1 2
10
9
8
12
R4 30
100K _0402_5%
3
TSC _INT[6]
TS_ SPI1 _SCK_C
TS_ SPI1_M OSI_C
TS_ SPI1_M ISO_C
TS_ SPI1 _CS0#_C
TS_ SPI_OE _3V3_R [5]
Security Classification
Issued Date
THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TR ADE SE CRET I NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTM ENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3/2 2 S wap JT S1 pin2
and pi n3 to fol low
mod ule pi n d efi ne.
Compal Secret Data
Deciphered Date
TS_ SPI1_M ISO_C
TS_ SPI1_M OSI_C
TS_ SPI1 _SCK_C
+TS _LDO
TS_ SPI1 _CS0#_C
2
R2 65
0_04 02_5%
2010/12/012011/4/1
JTS1
CG N D
1
2
3
4
5
6
7
8
9
10
12
ACE S_51 522-01001- 001
CO NN@
1
2
3
4
5
6
7
8
11
9
GND
12
10
GND
Title
Size Document Nu mber R ev
Cu sto m
Date: Sheet o f
Compal Electronics, Inc.
LCD PANEL/TS
Mon day, Apri l 25, 2 011
LA-7461P
1
11
0. 3
35
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