Compal LA-7451P PLW00, XPS 14z Schematic

A

B

C

D

E

MODEL NAME :

PCB NO :

BOM P/N :

1 1

LA-7451P

TBD TBD

PLW00

Dell/Compal Confidential

Schematic Document

2 2

Breitling (Huron River)

Sandy Bridge(BGA) + Cougar Point(standard)

DISCRETE VGA N12P-GV-S-A1 (optimus)

3 3

4 4

A

B

2011-07-12

Rev: 1.0

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2010/12/20 2011/12/20

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Cover Page

LA-7451P

E

of

1 49Thursday, July 28, 2011

of

1 49Thursday, July 28, 2011

of

1 49Thursday, July 28, 2011

1.0

A

B

C

D

E

Compal Confidential

Project Code : PLW00

FFS

ile Name : LA-7451P

F

1 1

Intel

P.28

Fan Control

P.30

CPU XDP Conn.

P.6

Sandy Bridge

Memory Bus (DDRIII)

Dual Channel

1.5V DDRIII 1066/1333 MHz

mini DP Conn.

DisplayPort

GPU N12P-GV-S

P.30~41

PEG x16 (DIS)

Processor

17W /35W CULV/SV

BGA 1023

P.5~10

DI x8

(UMA)

100MHz

2.7GT/s

LVDS

2 2

Conn.

P.21

HDMI Conn.

HDMI

P.39

LVDS

DMI x4F

100MHz 5GB/s

SATA3.0

SATA1.0

204pin DDRIII SO-DIMM x2

BANK 0, 1, 2, 3

Port 0

SATA HDD Conn.

Port 2

SATA ODD Conn.

P.11,12

P.28

Intel

PCI-E x1

Port 6

USB 3.0/2.0 Host Ctrl.

P.27

USB 3.0/2.0

3 3

Combo Conns x2

P.27

Card Reader

RTS5209

7 in 1 Socket

Port 4

Mini Card-1 WLAN (Half)

P.23

Port 3 Port 1

USB[x] port4

LAN(GbE)

AR8151-BL1A

P.22

RJ45

P.22

Cougar Point

PCH

BGA 989 Balls

P13~20

USB2.0

HD Audio

Port 3

Port 4

Port 2

Digital Camera

Mini Card-1 (WLAN)

( Half )

P.21

P.32

W/ BT 2.1 /3.0 combo

USB 2.0

P.26

SPI

RTC CKT.

Power On/Off CKT.

DC/DC Interface CKT.

4 4

Power Circuit DC/DC

A

P.13

P.29

P.33

P.49~59

SPI ROM

P.13 P.31

Touch Pad Int.KBD

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

LPC Bus

Port 5

ENE KB930

BIOS ROM

P.35

2010/12/20 2011/12/20

P.29 P.31

Compal Secret Data

Deciphered Date

Mini Card-2 (WWAN)

( Full )

Audio Codec ALC259-GR

D

SIM Card

P.24

Audio Jack x2

( HeadPhone X1, MIC )

Digital MIC

P.32

Int. Speaker

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Block Diagram

LA-7451P

E

of

2 49Thursday, July 28, 2011

of

2 49Thursday, July 28, 2011

of

2 49Thursday, July 28, 2011

1.0

A

Compal Confidential

Project Code : PLW00 File Name : LA-7451P

B

C

D

E

1 1

LA-7451P M/B

Camera

30 pin

Wire

LCD Panel

INVERTER

7 pin

FFC

2 2

WLAN

12 pin

HDD

FFC

4 pin

Touch Pad

FFC

4 pin

Wire

3 pin

LS-7451P

FFC

4pin

LS-7453P

POWER BUTTON/BALS/B

Led x 1

3 3

LID

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2010/12/20 2011/12/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Block Diagram

E

1.0

of

3 49Thursday, July 28, 2011

of

3 49Thursday, July 28, 2011

of

3 49Thursday, July 28, 2011

Board ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0 1 2 3 4 5 6 7 NC

SMBUS Control Table

EC_SMB_CK1 EC_SMB_DA1

EC_SMB_CK2 EC_SMB_DA2

PCH_SML0CLK PCH PCH_SML0DATA

PCH_SML1CLK PCH_SML1DATA

MEM_SMBCLK MEM_SMBDATA

100K +/- 5%Ra

Rb V min

0 0 V

8.2K +/- 5% 18K +/- 5% 3

3K +/- 5%

56K +/- 5%

100K +/- 5% 200K +/- 5%

SOURCE

KB930

PCH

AD_BID

0.168 V

0.375 V 0.503 V

0.634 V

0.958 V

1.372 V

1.851 V 2.200 V

2.433 V

BATT SODIMM

V

V typ

AD_BID

0.250 V

0.819 V

1.185 V

1.650 V

3.300 V

SODIMM

V

max

0 V 0.155 V

FFS

AD_BID

0.362 V

0.621 V

0.945 V

1.359 V

1.838 V

2.420 V

3.300 V

VGA Thermal Sensor

V

EC AD3

0x00-0x0C 0x0D-0x1C 0

x1D-0x30 0x31-0x49 0x4A-0x69 0x6A-0x8E 0x8F-0xBB 0xBC-0xFF

XDP

V

Charger

V

A

BOARD ID Table

Board ID

0 1 2 3 4 5 6 7

Link

PCB Revision

0.1

0.2

0.3

0.4

0.5

PCH

USB PORT#

0

1

2

3

4

5

6

7

8

9

10

11

DESTINATION

None

JUSB1 (2.0 Ext UP Side)

one

N

CAMERA

JMINI1 (WLAN)

JMINI2 (WWAN)

None

12

CLKOUT

1 1

PCI0

PCI1

PCI2

PCI3

PCI4

CLK

DESTINATION

PCH_LOOPBACK

EC LPC

None

CLKOUT_PCIE0

CLKOUT_PCIE1

CLKOUT_PCIE2

CLKOUT_PCIE3

CLKOUT_PCIE4

CLKOUT_PCIE5

CLKOUT_PCIE6

CLKOUT_PCIE7 None

CLKOUT_PEG_B

DESTINATIONDIFFERENTIAL

10/100/1G LAN

MINI CARD-2 WWAN

MINI CARD-1 WLAN

CARD READER

None

USB 3.0

None

FLEX CLOCKS DESTINATION

CLKOUTFLEX0None

CLKOUTFLEX1

CLKOUTFLEX2

CLKOUTFLEX3

None

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

SATA

SATA0

SATA1

SATA2

SATA3

SATA4

SATA5

DESTINATION

HDD

ODD

None

Symbol Note :

: means Digital Ground

: means Analog Ground

Compal Secret Data

2010/12/20 2011/12/20

Compal Secret Data

Deciphered Date

13

PCI EXPRESS

Lane 1

Lane 2

Lane 3

Lane 4

Lane 5

Lane 6

Lane 7

Lane 8 None

None

DESTINATION

10/100/1G LAN

None

MINI CARD-1 WLAN

CARD READER

None

USB 3.0

None

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Notes List

LA-7451P

of

4 49Thursday, July 28, 2011

of

4 49Thursday, July 28, 2011

of

4 49Thursday, July 28, 2011

1.0

5

UCPU1A

D D

C C

B B

DMI_CRX_PTX_N0<15> DMI_CRX_PTX_N1<15> DMI_CRX_PTX_N2<15> DMI_CRX_PTX_N3<15>

DMI_CRX_PTX_P0<15> DMI_CRX_PTX_P1<15> DMI_CRX_PTX_P2<15> DMI_CRX_PTX_P3<15>

DMI_CTX_PRX_N0<15> DMI_CTX_PRX_N1<15> DMI_CTX_PRX_N2<15> DMI_CTX_PRX_N3<15>

DMI_CTX_PRX_P0<15> DMI_CTX_PRX_P1<15> DMI_CTX_PRX_P2<15> DMI_CTX_PRX_P3<15>

FDI_CTX_PRX_N0<15> FDI_CTX_PRX_N1<15> FDI_CTX_PRX_N2<15> FDI_CTX_PRX_N3<15> FDI_CTX_PRX_N4<15> FDI_CTX_PRX_N5<15> FDI_CTX_PRX_N6<15> FDI_CTX_PRX_N7<15>

FDI_CTX_PRX_P0<15> FDI_CTX_PRX_P1<15> FDI_CTX_PRX_P2<15> FDI_CTX_PRX_P3<15> FDI_CTX_PRX_P4<15> FDI_CTX_PRX_P5<15> FDI_CTX_PRX_P6<15> FDI_CTX_PRX_P7<15>

FDI_FSYNC0<15> FDI_FSYNC1<15>

FDI_INT<15>

FDI_LSYNC0<15> FDI_LSYNC1<15>

+VCCP

1 2

RC36 24.9_0402_1%RC36 24.9_0402_1%

RC129

10K_0402_5%

12

FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7

FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7

FDI_FSYNC0 FDI_FSYNC1

FDI_INT

FDI_LSYNC0 FDI_LSYNC1

+EDP_COM

M2

DMI_RX#[0]

P6

DMI_RX#[1]

P1

DMI_RX#[2]

P10

DMI_RX#[3]

N3

DMI_RX[0]

P7

DMI_RX[1]

P3

DMI_RX[2]

P11

DMI_RX[3]

K1

DMI_TX#[0]

M8

DMI_TX#[1]

N4

DMI_TX#[2]

R2

DMI_TX#[3]

K3

DMI_TX[0]

M7

DMI_TX[1]

P4

DMI_TX[2]

T3

DMI_TX[3]

U7

FDI0_TX#[0]

W11

FDI0_TX#[1]

W1

FDI0_TX#[2]

AA6

FDI0_TX#[3]

W6

FDI1_TX#[0]

V4

FDI1_TX#[1]

Y2

FDI1_TX#[2]

AC9

FDI1_TX#[3]

U6

FDI0_TX[0]

W10

FDI0_TX[1]

W3

FDI0_TX[2]

AA7

FDI0_TX[3]

W7

FDI1_TX[0]

T4

FDI1_TX[1]

AA3

FDI1_TX[2]

AC8

FDI1_TX[3]

AA11

FDI0_FSYNC

AC12

FDI1_FSYNC

U11

FDI_INT

AA10

FDI0_LSYNC

AG8

FDI1_LSYNC

AF3

eDP_COMPIO

AD2

eDP_ICOMPO

AG11

eDP_HPD

AG4

eDP_AUX#

AF4

eDP_AUX

AC3

eDP_TX#[0]

AC4

eDP_TX#[1]

AE11

eDP_TX#[2]

AE7

eDP_TX#[3]

AC1

eDP_TX[0]

AA4

eDP_TX[1]

AE10

eDP_TX[2]

AE6

eDP_TX[3]

SANDY-BRIDGE_BGA1023~D

i5@

DMI Intel(R) FDI DP

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]

PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_RX[10]

PEG_RX[11]

PEG_RX[12]

PEG_RX[13]

PEG_RX[14]

PEG_RX[15]

PEG_TX#[0]

PEG_TX#[1]

PEG_TX#[2]

PEG_TX#[3]

PEG_TX#[4]

PEG_TX#[5]

PEG_TX#[6]

PEG_TX#[7]

PEG_TX#[8]

PEG_TX#[9] PEG_TX#[10] PEG_TX#[11] PEG_TX#[12]

PCI EXPRESS -- GRAPHICS

PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PEG_TX[10]

PEG_TX[11]

PEG_TX[12]

PEG_TX[13]

PEG_TX[14]

PEG_TX[15]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8] PEG_RX[9]

PEG_TX[0] PEG_TX[1] PEG_TX[2] PEG_TX[3] PEG_TX[4] PEG_TX[5] PEG_TX[6] PEG_TX[7] PEG_TX[8] PEG_TX[9]

4

+VCCP

12

RC2

24.9_0402_1%

G3 G1 G4

PEG_GTX_C_HRX_N15

H22

PEG_GTX_C_HRX_N14

J21

PEG_GTX_C_HRX_N13

B22

PEG_GTX_C_HRX_N12

D21

PEG_GTX_C_HRX_N11

A19

PEG_GTX_C_HRX_N10

D17

PEG_GTX_C_HRX_N9

B14

PEG_GTX_C_HRX_N8

D13

PEG_GTX_C_HRX_N7

A11

PEG_GTX_C_HRX_N6

B10

PEG_GTX_C_HRX_N5

G8

PEG_GTX_C_HRX_N4

A8

PEG_GTX_C_HRX_N3

B6

PEG_GTX_C_HRX_N2

H8

PEG_GTX_C_HRX_N1

E5

PEG_GTX_C_HRX_N0

K7

PEG_GTX_C_HRX_P15

K22

PEG_GTX_C_HRX_P14

K19

PEG_GTX_C_HRX_P13

C21

PEG_GTX_C_HRX_P12

D19

PEG_GTX_C_HRX_P11

C19

PEG_GTX_C_HRX_P10

D16

PEG_GTX_C_HRX_P9

C13

PEG_GTX_C_HRX_P8

D12

PEG_GTX_C_HRX_P7

C11

PEG_GTX_C_HRX_P6

C9

PEG_GTX_C_HRX_P5

F8

PEG_GTX_C_HRX_P4

C8

PEG_GTX_C_HRX_P3

C5

PEG_GTX_C_HRX_P2

H6

PEG_GTX_C_HRX_P1

F6

PEG_GTX_C_HRX_P0

K6

PEG_HTX_GRX_N15

G22

PEG_HTX_GRX_N14

C23

PEG_HTX_GRX_N13

D23

PEG_HTX_GRX_N12

F21

PEG_HTX_GRX_N11

H19

PEG_HTX_GRX_N10

C17

PEG_HTX_GRX_N9

K15

PEG_HTX_GRX_N8

F17

PEG_HTX_GRX_N7

F14

PEG_HTX_GRX_N6

A15

PEG_HTX_GRX_N5

J14

PEG_HTX_GRX_N4

H13

PEG_HTX_GRX_N3

M10

PEG_HTX_GRX_N2

F10

PEG_HTX_GRX_N1

D9

PEG_HTX_GRX_N0

J4

PEG_HTX_GRX_P15

F22

PEG_HTX_GRX_P14

A23

PEG_HTX_GRX_P13

D24

PEG_HTX_GRX_P12

E21

PEG_HTX_GRX_P11

G19

PEG_HTX_GRX_P10

B18

PEG_HTX_GRX_P9

K17

PEG_HTX_GRX_P8

G17

PEG_HTX_GRX_P7

E14

PEG_HTX_GRX_P6

C15

PEG_HTX_GRX_P5

K13

PEG_HTX_GRX_P4

G13

PEG_HTX_GRX_P3

K10

PEG_HTX_GRX_P2

G10

PEG_HTX_GRX_P1

D8

PEG_HTX_GRX_P0

K4

Typ- suggest 220nF. The change in AC capacitor value from 100nF to 220nF is to enable compatibility with future platforms having PCIE Gen3 (8GT/s)

PEG_COMP

CC185 0.1U_0402_10V7K~DCC185 0.1U_0402_10V7K~D

1 2

CC186 0.1U_0402_10V7K~DCC186 0.1U_0402_10V7K~D

1 2

CC187 0.1U_0402_10V7K~DCC187 0.1U_0402_10V7K~D

1 2

CC188 0.1U_0402_10V7K~DCC188 0.1U_0402_10V7K~D

1 2

CC189 0.1U_0402_10V7K~DCC189 0.1U_0402_10V7K~D

1 2

CC190 0.1U_0402_10V7K~DCC190 0.1U_0402_10V7K~D

1 2

CC191 0.1U_0402_10V7K~DCC191 0.1U_0402_10V7K~D

1 2

CC192 0.1U_0402_10V7K~DCC192 0.1U_0402_10V7K~D

1 2

CC193 0.1U_0402_10V7K~DCC193 0.1U_0402_10V7K~D

1 2

CC194 0.1U_0402_10V7K~DCC194 0.1U_0402_10V7K~D

1 2

CC195 0.1U_0402_10V7K~DCC195 0.1U_0402_10V7K~D

1 2

CC196 0.1U_0402_10V7K~DCC196 0.1U_0402_10V7K~D

1 2

CC197 0.1U_0402_10V7K~DCC197 0.1U_0402_10V7K~D

1 2

CC198 0.1U_0402_10V7K~DCC198 0.1U_0402_10V7K~D

1 2

CC199 0.1U_0402_10V7K~DCC199 0.1U_0402_10V7K~D

1 2

CC200 0.1U_0402_10V7K~DCC200 0.1U_0402_10V7K~D

1 2

CC201 0.1U_0402_10V7K~DCC201 0.1U_0402_10V7K~D

1 2

CC202 0.1U_0402_10V7K~DCC202 0.1U_0402_10V7K~D

1 2

CC203 0.1U_0402_10V7K~DCC203 0.1U_0402_10V7K~D

1 2

CC204 0.1U_0402_10V7K~DCC204 0.1U_0402_10V7K~D

1 2

CC205 0.1U_0402_10V7K~DCC205 0.1U_0402_10V7K~D

1 2

CC206 0.1U_0402_10V7K~DCC206 0.1U_0402_10V7K~D

1 2

CC207 0.1U_0402_10V7K~DCC207 0.1U_0402_10V7K~D

1 2

CC208 0.1U_0402_10V7K~DCC208 0.1U_0402_10V7K~D

1 2

CC209 0.1U_0402_10V7K~DCC209 0.1U_0402_10V7K~D

1 2

CC210 0.1U_0402_10V7K~DCC210 0.1U_0402_10V7K~D

1 2

CC211 0.1U_0402_10V7K~DCC211 0.1U_0402_10V7K~D

1 2

CC212 0.1U_0402_10V7K~DCC212 0.1U_0402_10V7K~D

1 2

CC213 0.1U_0402_10V7K~DCC213 0.1U_0402_10V7K~D

1 2

CC214 0.1U_0402_10V7K~DCC214 0.1U_0402_10V7K~D

1 2

CC215 0.1U_0402_10V7K~DCC215 0.1U_0402_10V7K~D

1 2

CC216 0.1U_0402_10V7K~DCC216 0.1U_0402_10V7K~D

1 2

PEG_ICOMPI and RCOMPO signals should be short ed and routed with - max leng th = 500 mils - typical impeda nce = 43 mohms PEG_ICOMPO sign als should be r outed with - ma x length = 500 mils

- typical imped ance = 14.5 moh ms

3

PEG_GTX_C_HRX_N15 <34> PEG_GTX_C_HRX_N14 <34> PEG_GTX_C_HRX_N13 <34> PEG_GTX_C_HRX_N12 <34> PEG_GTX_C_HRX_N11 <34> PEG_GTX_C_HRX_N10 <34> PEG_GTX_C_HRX_N9 <34> PEG_GTX_C_HRX_N8 <34> PEG_GTX_C_HRX_N7 <34> PEG_GTX_C_HRX_N6 <34> PEG_GTX_C_HRX_N5 <34> PEG_GTX_C_HRX_N4 <34> PEG_GTX_C_HRX_N3 <34> PEG_GTX_C_HRX_N2 <34> PEG_GTX_C_HRX_N1 <34> PEG_GTX_C_HRX_N0 <34>

PEG_GTX_C_HRX_P15 <34> PEG_GTX_C_HRX_P14 <34> PEG_GTX_C_HRX_P13 <34> PEG_GTX_C_HRX_P12 <34> PEG_GTX_C_HRX_P11 <34> PEG_GTX_C_HRX_P10 <34> PEG_GTX_C_HRX_P9 <34> PEG_GTX_C_HRX_P8 <34> PEG_GTX_C_HRX_P7 <34> PEG_GTX_C_HRX_P6 <34> PEG_GTX_C_HRX_P5 <34> PEG_GTX_C_HRX_P4 <34> PEG_GTX_C_HRX_P3 <34> PEG_GTX_C_HRX_P2 <34> PEG_GTX_C_HRX_P1 <34> PEG_GTX_C_HRX_P0 <34>

PEG_HTX_C_GRX_N15 <34> PEG_HTX_C_GRX_N14 <34> PEG_HTX_C_GRX_N13 <34> PEG_HTX_C_GRX_N12 <34> PEG_HTX_C_GRX_N11 <34> PEG_HTX_C_GRX_N10 <34> PEG_HTX_C_GRX_N9 <34> PEG_HTX_C_GRX_N8 <34> PEG_HTX_C_GRX_N7 <34> PEG_HTX_C_GRX_N6 <34> PEG_HTX_C_GRX_N5 <34> PEG_HTX_C_GRX_N4 <34> PEG_HTX_C_GRX_N3 <34> PEG_HTX_C_GRX_N2 <34> PEG_HTX_C_GRX_N1 <34> PEG_HTX_C_GRX_N0 <34>

PEG_HTX_C_GRX_P15 <34> PEG_HTX_C_GRX_P14 <34> PEG_HTX_C_GRX_P13 <34> PEG_HTX_C_GRX_P12 <34> PEG_HTX_C_GRX_P11 <34> PEG_HTX_C_GRX_P10 <34> PEG_HTX_C_GRX_P9 <34> PEG_HTX_C_GRX_P8 <34> PEG_HTX_C_GRX_P7 <34> PEG_HTX_C_GRX_P6 <34> PEG_HTX_C_GRX_P5 <34> PEG_HTX_C_GRX_P4 <34> PEG_HTX_C_GRX_P3 <34> PEG_HTX_C_GRX_P2 <34> PEG_HTX_C_GRX_P1 <34> PEG_HTX_C_GRX_P0 <34>

2

UCPU1I

BG17

VSS[181]

BG21

VSS[182]

BG24

VSS[183]

BG28

VSS[184]

BG37

VSS[185]

BG41

VSS[186]

BG45

VSS[187]

BG49

VSS[188]

BG53

VSS[189]

BG9

VSS[190]

C29

VSS[191]

C35

VSS[192]

C40

VSS[193]

D10

VSS[194]

D14

VSS[195]

D18

VSS[196]

D22

VSS[197]

D26

VSS[198]

D29

VSS[199]

D35

VSS[200]

D4

VSS[201]

D40

VSS[202]

D43

VSS[203]

D46

VSS[204]

D50

VSS[205]

D54

VSS[206]

D58

VSS[207]

D6

VSS[208]

E25

VSS[209]

E29

VSS[210]

E3

VSS[211]

E35

VSS[212]

E40

VSS[213]

F13

VSS[214]

F15

VSS[215]

F19

VSS[216]

F29

VSS[217]

F35

VSS[218]

F40

VSS[219]

F55

VSS[220]

G48

VSS[221]

G51

VSS[222]

G6

VSS[223]

G61

VSS[224]

H10

VSS[225]

H14

VSS[226]

H17

VSS[227]

H21

VSS[228]

H4

VSS[229]

H53

VSS[230]

H58

VSS[231]

J1

VSS[232]

J49

VSS[233]

J55

VSS[234]

K11

VSS[235]

K21

VSS[236]

K51

VSS[237]

K8

VSS[238]

L16

VSS[239]

L20

VSS[240]

L22

VSS[241]

L26

VSS[242]

L30

VSS[243]

L34

VSS[244]

L38

VSS[245]

L43

VSS[246]

L48

VSS[247]

L61

VSS[248]

M11

VSS[249]

M15

VSS[250]

SANDY-BRIDGE_BGA1023~D

i5@

VSS

NCTF

VSS[251] VSS[252] VSS[253] VSS[254] VSS[255] VSS[256] VSS[257] VSS[258] VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301]

VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8

VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14

1

M4 M58 M6 N1 N17 N21 N25 N28 N33 N36 N40 N43 N47 N48 N51 N52 N56 N61 P14 P16 P18 P21 P58 P59 P9 R17 R20 R4 R46 T1 T47 T50 T51 T52 T53 T55 T56 U13 U8 V20 V61 W13 W15 W18 W21 W46 W8 Y4 Y47 Y58 Y59

A5 A57 BC61 BD3 BD59 BE4 BE58 BG5 BG57 C3 C58 D59 E1 E61

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

2010/12/20 2011/12/20

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Compal Electronics, Inc.

PROCESSOR(1/6) DMI,FDI,PEG

LA-7451P

5 49Thursday, July 28, 2011

of

1

1.0

5

XDP_PREQ# XDP_PRDY#

@

XDP_BPM#0

RC35 0_0402_5%

XDP_BPM#1

D D

CFG0<8>

PCH_JTAG_TDO<13>

PCH_JTAG_TDI<13>

PCH_JTAG_TMS<13>

PCH_JTAG_TCK<13>

RC43

62_0402_5%

H_CPUPWRGD

+VCCP

PBTN_OUT#<15,26>

VGATE<15,26,48>

CLK_CPU_ITP<14>

CLK_CPU_ITP#<14>

The resistor for HOOK2 shoul d be placed such tha t the stub is very sm all on CFG0 net

C C

PROC_DETECT (Processor Detect): pulled to ground on the processor package. There is no connection to the processor silicon for this signal. System board designers may use this signal to determine if the processor is present

B B

H_PROCHOT#<26>

A A

1 2

1 2 1 2 1 2 1 2

0_0402_5% @

RC114 0_0402_5%@RC114 0_0402_5%@

XDP_BPM#2

RC117 0_0402_5%@RC117 0_0402_5%@

XDP_BPM#3

RC115 0_0402_5%@RC115 0_0402_5%@

1K_0402_5%~D

RC22

RC22 RC230_0402_5%~D @ RC230_0402_5%~D @ RC71K_0402_5%~D RC71K_0402_5%~D RC260_0402_5%~D @ RC260_0402_5%~D @

1K_0402_5%

RC25

12

1 2

RC121 10K_0402_5%

H_PECI<17,26>

H_THERMTRIP#<17>

H_PM_SYNC<15>

H_CPUPWRGD<17>

@

12 12

H_CPUPWRGD_XDP CFD_PWRBTN#_X DP CFG0_R SYS_PWROK_XDP CLK_CPU_ITP CLK_CPU_ITP#

XDP_RST#_RPLT_RST#

XDP_DBRESET#

XDP_TDO

RC280_0402_5% @ RC280_0402_5% @

12

XDP_TRST# XDP_TDI

RC310_0402_5% @ RC310_0402_5% @

12

XDP_TMS

RC290_0402_5% @ RC290_0402_5% @

12

XDP_TCK1

RC30

XDP_TCK

H_SNB_IVB#<17>

12

@

T1PAD~D @T1PAD~D @

RC41

1 2

56_0402_5%

RC49

1 2

0_0402_5%

RC53

1 2

0_0402_5%

RC57

1 2

130_0402_1%

+VCCP

H_CATERR#

H_PROCHOT#_R

H_THERMTRIP#

@RC49

@

H_PM_SYNC_R

@RC53

@

H_CPUPWRGD_R

VDDPWRGOOD_RVDDPWRGOOD

BUF_CPU_RST#

4

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

ACES_87152-26051

@ JXDP

@

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

F49

C57

C49

A48

C45

D45

C48

B46

BE45

D44

JXDP

G1 G2

27 28

UCPU1B

PROC_SELECT#

PROC_DETECT#

CATERR#

PECI

PROCHOT#

THERMTRIP#

PM_SYNC

UNCOREPWRGOOD

SM_DRAMPWR OK

RESET#

3

+VCCP

0.1U_0402_16V4Z~D

1

2

Place near JXDP1

@

MISC THERMAL PWR MANAGEMENT

CLOCKS

DDR3

JTAG & BPM

CC67

@

DPLL_REF_CLK

DPLL_REF_CLK#

SM_DRAMRST#

MISC

CC66

2

BCLK

BCLK#

BCLK_ITP

BCLK_ITP#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

PRDY#

PREQ#

TCK TMS

TRST#

TDO

DBR#

BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

TDI

SYS_PWROK<15>

PCH_PWROK<15,26>

PM_DRAM_PWR GD<15>

+3V_PCH

J3 H2

AG3 AG1

N59 N58

AT30

BF44 BE43 BG43

CLK_CPU_DMI_R

CLK_CPU_DMI#_R

CLK_CPU_DPLL_R CLK_CPU_DPLL#_R

H_DRAMRST#

SM_RCOMP0 SM_RCOMP1 SM_RCOMP2

RC37 0_0402_5%

RC37 0_0402_5% RC38 0_0402_5%

RC38 0_0402_5%

RC39 1K_0402_5%RC39 1K_0402_5% RC40 1K_0402_5%RC40 1K_0402_5%

DDR3 Compensation Signals

XDP_PRDY#

N53

XDP_PREQ#

N55

XDP_TCK

L56

XDP_TMS

L55

XDP_TRST#

J58

XDP_TDI_R

M60

XDP_TDO_R

L59

XDP_DBRESET#_R

K58

XDP_BPM#0_R

G58

XDP_BPM#1_R

E55

XDP_BPM#2_R

E59

XDP_BPM#3_R

G55

XDP_BPM#4_R

G59

XDP_BPM#5_R

H60

XDP_BPM#6_R

J59

XDP_BPM#7_R

J61

RC50 0_0402_5%

1 2

RC51 0_0402_5%

1 2

@

@ @

@

RC56

1 2

RC59 0_0402_5%

1 2

RC61 0_0402_5%

1 2

RC62 0_0402_5%

1 2

@

RC63 0_0402_5%

1 2

@

RC64 0_0402_5%

1 2

@

RC65 0_0402_5%

1 2

@

RC66 0_0402_5%

1 2

@

RC67 0_0402_5%

1 2

@

@ @

@

RC127

RC128

RC4

1 2

1 2 1 2

@

@ @

@ 1 2 1 2

H_DRAMRST# <7>

1 2 1 2 1 2

@RC56

@

0_0402_5%

@

0_0402_5%~D

12

@RC128

@

12

0_0402_5%~D

1 2

RC11 0_0402_5%

200_0402_1%

RUN_ON_CPU1.5VS3#<10,28>

PLT_RST#<16,22,26,27,30,33>

RC55140_0402_1% RC55140_0402_1% RC5825.5_0402_1% RC5825.5_0402_1% RC60200_0402_1% RC60200_0402_1%

XDP_TDI XDP_TDO

XDP_DBRESET#

XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3 CFG12 CFG13 CFG14 CFG15

2

+3VS

12

10K_0402_5%

D_PWG

@

CLK_CPU_DMI <14> CLK_CPU_DMI# <14>

+VCCP

XDP_DBRESET# <15>

CFG12 <8> CFG13 <8> CFG14 <8> CFG15 <8>

RC6

@

UC1

1

B

VCC

2

A GND3Y

MC74VHC1G09DFT2G_SC70-5

RUN_ON_CPU1.5VS3#

1 2

+3VALW

0.1U_0402_16V4Z~D

CC65

1

2

5

4

RC19

RC19 39_0402_1%

39_0402_1%

1 2

13

D

2

G

S

+3VS

1

2

UC2

5

NC

VCC A GND3Y

SN74LVC1G07DCKR_SC70-5~D

BUFO_CPU_RST# BUF_CPU_RST#

4

PU/PD for JTAG signals

XDP_TMS

XDP_TDI_R

XDP_PREQ#

XDP_TDO

XDP_TCK

XDP_TRST#

XDP_DBRESET#

H_CPUPWRGD_R

XDP_DBRESET#

+1.5V_CPU_VDDQ

12

RC8

RC8 200_0402_1%

200_0402_1%

VDDPWRGOOD

RC8 CRB 1.1K

@

CHECK LIST 0.7 --> 4.75K INTEL recommand 1.1K PDG 0.71 rev -- >200

@

QC1

QC1 2N7002_SOT23

2N7002_SOT23

0.1U_0402_16V4Z~D

+VCCP

CC68

12

RC32

RC32 75_0402_5%

75_0402_5%

RC33

1 2

43_0402_1%

CC70

1 2

1

12

1 2

0.047U_0402_16V4Z~D

@

RC34

RC34 0_0402_5%

0_0402_5%

RC4551_0402_5% RC4551_0402_5%

RC4651_0402_5% RC4651_0402_5%

RC4751_0402_5% @ RC4751_0402_5% @

RC4851_0402_5% RC4851_0402_5%

RC5251_0402_5% RC5251_0402_5%

RC5451_0402_5% RC5451_0402_5%

+3VS

RC421K_0402_5% RC421K_0402_5%

RC4410K_0402_5% RC4410K_0402_5%

+VCCP

SANDY-BRIDGE_BGA1023~D

i5@

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/12/20 2011/12/20

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

PROCESSOR(2/6) PM,XDP,CLK

LA-7451P

1

of

6 49Thursday, July 28, 2011

of

6 49Thursday, July 28, 2011

of

6 49Thursday, July 28, 2011

1.0

5

UCPU1C

DDR_A_D[0..63]<11>

D D

C C

DDR_A_BS0<11> DDR_A_BS1<11> DDR_A_BS2<11>

B B

A A

DDR_A_CAS#<11> DDR_A_RAS#<11> DDR_A_WE#<11>

H_DRAMRST#<6>

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

H_DRAMRST#

4.99K_0402_1%~D

5

UCPU1C

AG6

AJ6

AP11

AL6

AJ10

AJ8 AL8 AL7

AR11

AP6 AU6 AV9 AR6

AP8 AT13 AU13

BC7

BB7 BA13 BB11

BA7

BA9

BB9 AY13 AV14 AR14 AY17 AR19 BA14 AU14 BB14 BB17 BA45 AR43

AW48

BC48 BC45 AR45 AT48 AY48 BA49 AV49 BB51 AY53 BB49 AU49 BA53 BB55 BA55 AV56 AP50 AP53 AV54 AT54 AP56 AP52 AN57 AN53 AG56 AG53 AN55 AN52 AG55 AK56

BD37 BF36 BA28

BE39 BD39 AT41

SANDY-BRIDGE_BGA1023~D

i5@

12

RC77

SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

SA_BS[0] SA_BS[1] SA_BS[2]

SA_CAS# SA_RAS# SA_WE#

BSS138_SOT23

DDR SYSTEM MEMORY A

@

1 2

RC74 0_0402_5%~D

QC2

D

S

D

S

DDR3_DRAMRST#_R

13

G

2

DRAMRST_CNTRL

1

CC69

0.047U_0402_16V4Z~D

2

SA_CLK#[0]

SA_CLK#[1]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

4

M_CLK_DDR0

AU36

SA_CLK[0]

SA_CKE[0]

SA_CLK[1]

SA_CKE[1]

SA_CS#[0] SA_CS#[1]

SA_ODT[0] SA_ODT[1]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

+1.5V

M_CLK_DDR#0

AV36

DDR_CKE0_DIMMA

AY26

M_CLK_DDR1

AT40

M_CLK_DDR#1

AU40

DDR_CKE1_DIMMA

BB26

DDR_CS0_DIMMA#

BB40

DDR_CS1_DIMMA#

BC41

M_ODT0

AY40

M_ODT1

BA41

DDR_A_DQS#0

AL11

DDR_A_DQS#1

AR8

DDR_A_DQS#2

AV11

DDR_A_DQS#3

AT17

DDR_A_DQS#4

AV45

DDR_A_DQS#5

AY51

DDR_A_DQS#6

AT55

DDR_A_DQS#7

AK55

DDR_A_DQS0

AJ11

DDR_A_DQS1

AR10

DDR_A_DQS2

AY11

DDR_A_DQS3

AU17

DDR_A_DQS4

AW45

DDR_A_DQS5

AV51

DDR_A_DQS6

AT56

DDR_A_DQS7

AK54

DDR_A_MA0

BG35

DDR_A_MA1

BB34

DDR_A_MA2

BE35

DDR_A_MA3

BD35

DDR_A_MA4

AT34

DDR_A_MA5

AU34

DDR_A_MA6

BB32

DDR_A_MA7

AT32

DDR_A_MA8

AY32

DDR_A_MA9

AV32

DDR_A_MA10

BE37

DDR_A_MA11

BA30

DDR_A_MA12

BC30

DDR_A_MA13

AW41

DDR_A_MA14

AY28

DDR_A_MA15

AU26

12

RC75

RC75 1K_0402_5%~D

1K_0402_5%~D

1 2

RC76 1K_0402_5%RC76 1K_0402_5%

DG 1.0 Figure 61 RC76=1K

4

1 2

RC72 0_0402_5%~D

@

1 2

RC73 0_0402_5%~D

M_CLK_DDR0 <11> M_CLK_DDR#0 <11> DDR_CKE0_DIMMA <11>

M_CLK_DDR1 <11> M_CLK_DDR#1 <11> DDR_CKE1_DIMMA <11>

DDR_CS0_DIMMA# <11> DDR_CS1_DIMMA# <11>

M_ODT0 <11> M_ODT1 <11>

DDR_A_DQS#[0..7] <11>

DDR_A_DQS[0..7] <11>

DDR_A_MA[0..15] <11>

DDR3_DRAMRST# <11,12>

DRAMRST_CNTRL_PCH <14>

DRAMRST_CNTRL_EC <26>

3

DDR_B_D[0..63]<12>

DDR_B_BS0<12> DDR_B_BS1<12> DDR_B_BS2<12>

DDR_B_CAS#<12> DDR_B_RAS#<12> DDR_B_WE#<12>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/12/20 2011/12/20

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

Compal Secret Data

Deciphered Date

2

UCPU1D

AL4

SB_DQ[0]

AL1

SB_DQ[1]

AN3

SB_DQ[2]

AR4

SB_DQ[3]

AK4

SB_DQ[4]

AK3

SB_DQ[5]

AN4

SB_DQ[6]

AR1

SB_DQ[7]

AU4

SB_DQ[8]

AT2

SB_DQ[9]

AV4

SB_DQ[10]

BA4

SB_DQ[11]

AU3

SB_DQ[12]

AR3

SB_DQ[13]

AY2

SB_DQ[14]

BA3

SB_DQ[15]

BE9

SB_DQ[16]

BD9

SB_DQ[17]

BD13

SB_DQ[18]

BF12

SB_DQ[19]

BF8

SB_DQ[20]

BD10

SB_DQ[21]

BD14

SB_DQ[22]

BE13

SB_DQ[23]

BF16

SB_DQ[24]

BE17

SB_DQ[25]

BE18

SB_DQ[26]

BE21

SB_DQ[27]

BE14

SB_DQ[28]

BG14

SB_DQ[29]

BG18

SB_DQ[30]

BF19

SB_DQ[31]

BD50

SB_DQ[32]

BF48

SB_DQ[33]

BD53

SB_DQ[34]

BF52

SB_DQ[35]

BD49

SB_DQ[36]

BE49

SB_DQ[37]

BD54

SB_DQ[38]

BE53

SB_DQ[39]

BF56

SB_DQ[40]

BE57

SB_DQ[41]

BC59

SB_DQ[42]

AY60

SB_DQ[43]

BE54

SB_DQ[44]

BG54

SB_DQ[45]

BA58

SB_DQ[46]

AW59

SB_DQ[47]

AW58

SB_DQ[48]

AU58

SB_DQ[49]

AN61

SB_DQ[50]

AN59

SB_DQ[51]

AU59

SB_DQ[52]

AU61

SB_DQ[53]

AN58

SB_DQ[54]

AR58

SB_DQ[55]

AK58

SB_DQ[56]

AL58

SB_DQ[57]

AG58

SB_DQ[58]

AG59

SB_DQ[59]

AM60

SB_DQ[60]

AL59

SB_DQ[61]

AF61

SB_DQ[62]

AH60

SB_DQ[63]

BG39

SB_BS[0]

BD42

SB_BS[1]

AT22

SB_BS[2]

AV43

SB_CAS#

BF40

SB_RAS#

BD45

SB_WE#

SANDY-BRIDGE_BGA1023~D

i5@

2

1

M_CLK_DDR2

BA34

SB_CLK[0]

SB_CLK#[0]

SB_CKE[0]

SB_CLK[1]

SB_CLK#[1]

SB_CKE[1]

SB_CS#[0] SB_CS#[1]

SB_ODT[0] SB_ODT[1]

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

DDR SYSTEM MEMORY B

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

Title

Size Document Number Rev

Date: Sheet

M_CLK_DDR#2

AY34

DDR_CKE2_DIMMB

AR22

M_CLK_DDR3

BA36

M_CLK_DDR#3

BB36

DDR_CKE3_DIMMB

BF27

DDR_CS2_DIMMB#

BE41

DDR_CS3_DIMMB#

BE47

M_ODT2

AT43

M_ODT3

BG47

DDR_B_DQS#0

AL3

DDR_B_DQS#1

AV3

DDR_B_DQS#2

BG11

DDR_B_DQS#3

BD17

DDR_B_DQS#4

BG51

DDR_B_DQS#5

BA59

DDR_B_DQS#6

AT60

DDR_B_DQS#7

AK59

DDR_B_DQS0

AM2

DDR_B_DQS1

AV1

DDR_B_DQS2

BE11

DDR_B_DQS3

BD18

DDR_B_DQS4

BE51

DDR_B_DQS5

BA61

DDR_B_DQS6

AR59

DDR_B_DQS7

AK61

DDR_B_MA0

BF32

DDR_B_MA1

BE33

DDR_B_MA2

BD33

DDR_B_MA3

AU30

DDR_B_MA4

BD30

DDR_B_MA5

AV30

DDR_B_MA6

BG30

DDR_B_MA7

BD29

DDR_B_MA8

BE30

DDR_B_MA9

BE28

DDR_B_MA10

BD43

DDR_B_MA11

AT28

DDR_B_MA12

AV28

DDR_B_MA13

BD46

DDR_B_MA14

AT26

DDR_B_MA15

AU22

Compal Electronics, Inc.

PROCESSOR(3/6) DDRIII

LA-7451P

1

M_CLK_DDR2 <12> M_CLK_DDR#2 <12> DDR_CKE2_DIMMB <12>

M_CLK_DDR3 <12> M_CLK_DDR#3 <12> DDR_CKE3_DIMMB <12>

DDR_CS2_DIMMB# <12> DDR_CS3_DIMMB# <12>

M_ODT2 <12> M_ODT3 <12>

DDR_B_DQS#[0..7] <12>

DDR_B_DQS[0..7] <12>

DDR_B_MA[0..15] <12>

of

7 49Thursday, July 28, 2011

1.0

5

4

3

2

1

CFG Straps for Processor

CFG2

12

RC78

CFG6

CFG5

RC87

@RC87

@

RC78 1K_0402_1%~D

1K_0402_1%~D

12

RC81

RC81 1K_0402_1%~D@

1K_0402_1%~D@

12

@RC86

@

RC86 1K_0402_1%~D

1K_0402_1%~D

UCPU1E

D D

+VCC_CORE

RC80

@RC80

@

50_0402_1%

+VCC_GFXCORE_AXG

C C

RC84

1K_0402_1%

INTEL 12/28 rec ommand to add 1k pull down

B B

RC79

12

@RC79

@

50_0402_1%

12

RC85

RC85 1K_0402_1%

1K_0402_1%

CFG0<6>

CFG12<6> CFG13<6> CFG14<6> CFG15<6>

1 2

RC91 50_0402_1%@RC91 50_0402_1%@

@

1 2

RC90 50_0402_1%

+V_DDR_REFA_R +V_DDR_REFB_R

CFG0

CFG2

CFG4 CFG5 CFG6 CFG7

CFG12 CFG13 CFG14 CFG15

VCC_VAL_SENSE VSS_VAL_SENSE

VCC_AXG_VAL_SENSE

VSS_AXG_VAL_SENSE

T19PAD~D @T19PAD~D @

T25PAD~D @T25PAD~D @ T26PAD~D @T26PAD~D @

T28PAD~D @T28PAD~D @RC84

T33PAD~D @T33PAD~D @

T35PAD~D @T35PAD~D @

T42PAD~D @T42PAD~D @ T36 PAD~D@T36 PAD~D@ T43PAD~D @T43PAD~D @

T46PAD~D @T46PAD~D @

UCPU1E

B50

CFG[0]

C51

CFG[1]

B54

CFG[2]

D53

CFG[3]

A51

CFG[4]

C53

CFG[5]

C55

CFG[6]

H49

CFG[7]

A55

CFG[8]

H51

CFG[9]

K49

CFG[10]

K53

CFG[11]

F53

CFG[12]

G53

CFG[13]

L51

CFG[14]

F51

CFG[15]

D52

CFG[16]

L53

CFG[17]

H43

VCC_VAL_SENSE

K43

VSS_VAL_SENSE

H45

VAXG_VAL_SENSE

K45

VSSAXG_VAL_SENSE

F48

VCC_DIE_SENSE

H48

RSVD6

K48

RSVD7

BA19

RSVD8

AV19

RSVD9

AT21

RSVD10

BB21

RSVD11

BB19

RSVD12

AY21

RSVD13

BA22

RSVD14

AY22

RSVD15

AU19

RSVD16

AU21

RSVD17

BD21

RSVD18

BD22

RSVD19

BD25

RSVD20

BD26

RSVD21

BG22

RSVD22

BE22

RSVD23

BG26

RSVD24

BE26

RSVD25

BF23

RSVD26

BE24

RSVD27

SANDY-BRIDGE_BGA1023~D

i5@

RESERVED

DC_TEST_A4 DC_TEST_C4 DC_TEST_D3

DC_TEST_D1 DC_TEST_A58 DC_TEST_A59 DC_TEST_C59 DC_TEST_A61 DC_TEST_C61 DC_TEST_D61

DC_TEST_BD61 DC_TEST_BE61 DC_TEST_BE59 DC_TEST_BG61 DC_TEST_BG59 DC_TEST_BG58

DC_TEST_BG4 DC_TEST_BG3

DC_TEST_BE3

DC_TEST_BG1

DC_TEST_BE1 DC_TEST_BD1

RSVD28 RSVD29

RSVD30 RSVD31 RSVD32 RSVD33

RSVD34 RSVD35 RSVD36 RSVD37 RSVD38

RSVD39 RSVD40

RSVD41 RSVD42 RSVD43 RSVD44

RSVD45

BE7 BG7

N42 L42 L45 L47

M13 M14 U14 W14 P13

AT49 K24

AH2 AG13 AM14 AM15

N50

A4 C4 D3 D1 A58 A59 C59 A61 C61 D61 BD61 BE61 BE59 BG61 BG59 BG58 BG4 BG3 BE3 BG1 BE1 BD1

PEG Static Lane Reversal - CFG2 is for the 16x

1:(Default) Nor mal Operation; Lane #

*

CFG2

definition matc hes socket pin map definition

0:Lane Reversed

CFG4

Display Port Presence Strap

1 : Disabled; N o Physical Disp lay Port

*

CFG4

T21 PAD~D@T21 PAD~D@

T22 PAD~D@T22 PAD~D@ T23 PAD~D@T23 PAD~D@

T24 PAD~D@T24 PAD~D@ T29 PAD~D@T29 PAD~D@

T31 PAD~D@T31 PAD~D@

T48 PAD~D@T48 PAD~D@

attached to Emb edded Display P ort

0 : Enabled; An external Displ ay Port device is connected to th e Embedded Disp lay Port

1K_0402_1%~D

PCIE Port Bifurcation Straps

11: (Default) x 16 - Device 1 f unctions 1 and 2 disabled

*

CFG[6:5]

10: x8, x8 - De vice 1 function 1 enabled ; fu nction 2 disabled 01: Reserved - (Device 1 funct ion 1 disabled ; function 2 enabled) 00: x8,x4,x4 - Device 1 functi ons 1 and 2 ena bled

CFG7

12

RC89

@RC89

@

1K_0402_1%~D

PEG DEFER TRAINING

1: (Default) PE G Train immedia tely

*

CFG7

following xxRES ETB de assertio n

0: PEG Wait for BIOS for train ing

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/12/20 2011/12/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(4/6) RSVD,CFG

LA-7451P

8 49Thursday, July 28, 2011

1

1.0

of

5

4

3

2

1

UCPU1F

53A

2.2U_0402_6.3V6M

C792

12

2.2U_0402_6.3V6M

C808

12

UCPU1F

A26

VCC[1]

A29

VCC[2]

A31

VCC[3]

A34

VCC[4]

A35

VCC[5]

A38

VCC[6]

A39

VCC[7]

A42

VCC[8]

C26

VCC[9]

C27

VCC[10]

C32

VCC[11]

C34

VCC[12]

C37

VCC[13]

C39

VCC[14]

C42

VCC[15]

D27

VCC[16]

D32

VCC[17]

D34

VCC[18]

D37

VCC[19]

D39

VCC[20]

D42

VCC[21]

E26

VCC[22]

E28

VCC[23]

E32

VCC[24]

E34

VCC[25]

E37

VCC[26]

E38

VCC[27]

F25

VCC[28]

F26

VCC[29]

F28

VCC[30]

F32

VCC[31]

F34

VCC[32]

F37

VCC[33]

F38

VCC[34]

F42

VCC[35]

G42

VCC[36]

H25

VCC[37]

H26

VCC[38]

H28

VCC[39]

H29

VCC[40]

H32

VCC[41]

H34

VCC[42]

H35

VCC[43]

H37

VCC[44]

H38

VCC[45]

H40

VCC[46]

J25

VCC[47]

J26

VCC[48]

J28

VCC[49]

J29

VCC[50]

J32

VCC[51]

J34

VCC[52]

J35

VCC[53]

J37

VCC[54]

J38

VCC[55]

J40

VCC[56]

J42

VCC[57]

K26

VCC[58]

K27

VCC[59]

K29

VCC[60]

K32

VCC[61]

K34

VCC[62]

K35

VCC[63]

K37

VCC[64]

K39

VCC[66]

K42

VCC[67]

L25

VCC[68]

L28

VCC[69]

L33

VCC[70]

L36

VCC[71]

L40

VCC[72]

N26

VCC[73]

N30

VCC[74]

N34

VCC[75]

N38

VCC[76]

2.2U_0402_6.3V6M

C793

2.2U_0402_6.3V6M

SANDY-BRIDGE_BGA1023~D

i5@

18A

AF46

VCCIO[1]

AG48

VCCIO[3]

AG50

VCCIO[4]

AG51

VCCIO[5]

AJ17

VCCIO[6]

AJ21

VCCIO[7]

AJ25

VCCIO[8]

AJ43

VCCIO[9]

AJ47

VCCIO[10]

AK50

VCCIO[11]

AK51

VCCIO[12]

AL14

VCCIO[13]

AL15

VCCIO[14]

AL16

VCCIO[15]

AL20

VCCIO[16]

AL22

VCCIO[17]

AL26

VCCIO[18]

AL45

VCCIO[19]

AL48

VCCIO[20]

AM16

VCCIO[21]

AM17

VCCIO[22]

AM21

VCCIO[23]

AM43

VCCIO[24]

AM47

VCCIO[25]

AN20

VCCIO[26]

AN42

VCCIO[27]

AN45

VCCIO[28]

AN48

CORE SUPPLY

POWER

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

VCCIO[29]

VCCIO[30] VCCIO[31] VCCIO[32] VCCIO[33]

PEG AND DDRSENSE LINES SVID QUIET RAILS

VCCIO[34] VCCIO[35] VCCIO[36] VCCIO[37] VCCIO[38] VCCIO[39] VCCIO[40] VCCIO[41] VCCIO[42] VCCIO[43] VCCIO[44] VCCIO[45] VCCIO[46] VCCIO[47] VCCIO[48] VCCIO[49]

VCCIO50 VCCIO51

VCCIO_SEL

VCCPQE[1] VCCPQE[2]

VIDALERT#

VIDSCLK

VIDSOUT

VCC_SENSE

VSS_SENSE

VCCIO_SENSE

VSS_SENSE_VCCIO

3

AA14 AA15 AB17 AB20 AC13 AD16 AD18 AD21 AE14 AE15 AF16 AF18 AF20 AG15 AG16 AG17 AG20 AG21 AJ14 AJ15

W16 W17

VCCP_PWRCTRL_R

BC22

AM25 AN22

A44 B43 C44

F43 G43

AN16 AN17

2010/12/20 2011/12/20

+1.05VS_VCCPQ

C722 1U_0402_6.3V6KC722 1U_0402_6.3V6K

H_CPU_SVIDALRT# H_CPU_SVIDCLK H_CPU_SVIDDAT

VCCSENSE_R VSSSENSE_R

VCCIO_SENSE_R VSSIO_SENSE

choose low or high

1 2

10U_0603_6.3V6M

1

2

1

2

1

2

1

2

C54

C53

2

1U_0402_6.3V6K

1

C68

C69

2

1U_0402_6.3V6K

1

C508

C503

2

1U_0402_6.3V6K

1

C529

C649

2

Cap quantity follow 43890_HR_CHKLST_Rev07

+VCCP

R862

1 2

0_0805_5%

@

10K_0402_5%

1 2

+VCCP

R891

1 2

0_0805_5%

R108 0_0402_5%

1 2

R109 0_0402_5%

1 2

@

@ @

@

R112 0_0402_5%

1 2

12

@

R870

R870 10_0402_1%

10_0402_1%

Compal Secret Data

Deciphered Date

R101

10U_0603_6.3V6M

1

C55

2

1U_0402_6.3V6K

1

C70

2

1U_0402_6.3V6K

1

C527

2

1U_0402_6.3V6K

1

C721

2

+VCCP

10U_0603_6.3V6M

1

C56

C57

2

1U_0402_6.3V6K

1

2

1

2

1

2

12

R102

R102 130_0402_5%

130_0402_5%

C72

C71

2

1U_0402_6.3V6K

1

C505

C507

2

1U_0402_6.3V6K

1

C646

C648

2

12

R814

R814 75_0402_5%

75_0402_5%

Voltage selection for VCCIO: For Huron River platforms, this pin must be pulled high on the motherboard.

VCCP_PWRCTRL

1 2

R104 43_0402_1%R104 43_0402_1%

1 2

R105 0_0402_5%

1 2

R106 0_0402_5%

@

@ @

@

VCCIO_SENSE <46>

VSSIO_SENSE <46>

2

+VCCP

1

2

1

2

1

2

1

2

12

10U_0603_6.3V6M

C58

1U_0402_6.3V6K

C73

1U_0402_6.3V6K

C509

1U_0402_6.3V6K

C655

R103

R103 75_0402_5%

75_0402_5%

10U_0603_6.3V6M

1

2

1

2

1

2

1

2

C60

C59

2

1U_0402_6.3V6K

1

C74

C75

2

1U_0402_6.3V6K

1

C136

C506

2

1U_0402_6.3V6K

1

C528

C647

2

330U_D2_2V_Y

1

C83

+

2

VR_SVID_ALRT# <48> VR_SVID_CLK <48> VR_SVID_DAT <48>

1 2

R107 100_0402_1%R107 100_0402_1%

12

R111

Place the PU

100_0402_1%

resistors close to VR

Title

PROCESSOR(5/7) PWR,BYPASS

Size Document Number Rev

Custom

Date: Sheet of

SV type CPU

D D

+VCC_CORE

C87

22U_0805_6.3V6M

C87

22U_0805_6.3V6M

C88

22U_0805_6.3V6M

C88

C86

22U_0805_6.3V6M

C86

22U_0805_6.3V6M

1

2

C C

C91

22U_0805_6.3V6M

C91

22U_0805_6.3V6M

1

2

C96

22U_0805_6.3V6M

C96

22U_0805_6.3V6M

1

2

22U_0805_6.3V6M

1

C101

1

2

B B

+VCC_CORE

2.2U_0402_6.3V6M

C780

C779

12

+VCC_CORE

2.2U_0402_6.3V6M

C794

C795

12

A A

+VCC_CORE

2.2U_0402_6.3V6M

C809

12

2.2U_0402_6.3V6M

C810

C811

12

5

High-Frequency Decoupling

2.2U_0402_6.3V6M

C782

C781

12

2.2U_0402_6.3V6M

C797

C796

12

2.2U_0402_6.3V6M

C812

C813

12

22U_0805_6.3V6M

1

2

C92

22U_0805_6.3V6M

C92

22U_0805_6.3V6M

1

2

C97

22U_0805_6.3V6M

C97

22U_0805_6.3V6M

1

2

22U_0805_6.3V6M

1

C102

2

2.2U_0402_6.3V6M

C783

12

2.2U_0402_6.3V6M

C798

C799

12

0.1U_0402_16V4Z~D

1

CC71

2

22U_0805_6.3V6M

1

2

22U_0805_6.3V6M

C93

22U_0805_6.3V6M

C93

22U_0805_6.3V6M

1

2

C98

22U_0805_6.3V6M

C98

22U_0805_6.3V6M

1

2

22U_0805_6.3V6M

1

C103

2

2.2U_0402_6.3V6M

C784

C785

12

2.2U_0402_6.3V6M

C800

C801

12

0.1U_0402_16V4Z~D

1

CC73

CC72

2

C90

22U_0805_6.3V6M

C90

22U_0805_6.3V6M

C672

22U_0805_6.3V6M

C672

C89

1

2

C94

1

2

C99

1

2

C104

330U_D2_2V_Y

1

C105

+

2

2.2U_0402_6.3V6M

C787

C786

12

2.2U_0402_6.3V6M

C802

12

0.1U_0402_16V4Z~D

1

CC74

22U_0805_6.3V6M

1

2

C95

22U_0805_6.3V6M

C95

22U_0805_6.3V6M

1

2

C100

22U_0805_6.3V6M

C100

22U_0805_6.3V6M

1

2

330U_D2_2V_Y

1

C106

+

2

2.2U_0402_6.3V6M

C788

C789

12

2.2U_0402_6.3V6M

C803

C804

12

CC75

C670

22U_0805_6.3V6M

C670

22U_0805_6.3V6M

1

2

C762

C761

22U_0805_6.3V6M

C761

22U_0805_6.3V6M

1

2

C764

C763

22U_0805_6.3V6M

C763

22U_0805_6.3V6M

1

2

330U_D2_2V_Y

1

+

2

2.2U_0402_6.3V6M

12

330U_D2_2V_Y

1

C107

C108

+

2

2.2U_0402_6.3V6M

C790

C791

12

C805

12

2.2U_0402_6.3V6M

C807

C806

12

2

4

+1.05V

+VCCP

10U_0603_6.3V6M

1

2

1

C62

C61

2

1U_0402_6.3V6K

C76

2

1U_0402_6.3V6K

1

C504

2

330U_D2_2V_Y

C84

+VCC_CORE

Place the PU resistors close to CPU

VCCSENSE <48> VSSSENSE <48>

Compal Electronics, Inc.

1

1.0

9 49Thursday, July 28, 2011

1.0

5

22U_0805_6.3V6M

C118

C113

1

2

22U_0805_6.3V6M

C116

C115

1

2

0.1U_0402_16V4Z~D

1

CC77

CC78

2

1U_0402_6.3V6K

C842

C843

1

2

R934 0_0402_5%

1 2

R935 0_0402_5%

1 2

10U_0603_6.3V6M

@

1

C143

C144

1

+

2

1U_0402_6.3V6K

C846

1

2

+1.5V+1.5V_CPU_VDDQ

Can connect to GND if motherboard only‧‧‧‧

supports external graphics and if GFX VR is not

tuffed in a common motherboard design,

s

VAXG can be left floating in a common‧‧‧‧ motherboard design (Gfx VR keeps VAXG from floating) if the VR is stuffed

26A

AA46

+1.8VS_VCCPLL

C141

1U_0402_6.3V6K

C141

1U_0402_6.3V6K

1

2

10U_0603_6.3V6M

1

C765

2

1U_0402_6.3V6K

C850

1

2

AB47 AB50 AB51 AB52 AB53 AB55 AB56 AB58 AB59 AC61 AD47 AD48 AD50 AD51 AD52 AD53 AD55 AD56 AD58 AD59 AE46

N45 P47 P48 P50 P51 P52 P53 P55 P56 P61

U46 V47 V48 V50 V51 V52 V53 V55 V56 V58 V59 W50 W51 W52 W53 W55 W56 W61 Y48 Y61

G45

BB3 BC1 BC4

6A

N16 N20

1

N22 P17 P20

2

R16 R18 R21 U15 V16 V17 V18 V21 W20

1U_0402_6.3V6K

22U_0805_6.3V6M

C125

C121

1

2

22U_0805_6.3V6M

C123

C117

1

2

0.1U_0402_16V4Z~D

1

CC79

CC80

2

1U_0402_6.3V6K

C844

C845

1

2

@

@ @

@

C140

1U_0402_6.3V6K

C140

1U_0402_6.3V6K

C139

10U_0603_6.3V6M

C139

10U_0603_6.3V6M

1

2

+VCCSA

10U_0603_6.3V6M

1

C146

C145

2

1U_0402_6.3V6K

C847

C849

C848

1

2

UCPU1G

VAXG[1] VAXG[2] VAXG[3] VAXG[4] VAXG[5] VAXG[6] VAXG[7] VAXG[8] VAXG[9] VAXG[10] VAXG[11] VAXG[12] VAXG[13] VAXG[14] VAXG[15] VAXG[16] VAXG[17] VAXG[18] VAXG[19] VAXG[20] VAXG[21] VAXG[22] VAXG[23] VAXG[24] VAXG[25] VAXG[26] VAXG[27] VAXG[28] VAXG[29] VAXG[30] VAXG[31] VAXG[32]

T48

VAXG[33]

T58

VAXG[34]

T59

VAXG[35]

T61

VAXG[36] VAXG[37] VAXG[38] VAXG[39] VAXG[40] VAXG[41] VAXG[42] VAXG[43] VAXG[44] VAXG[45] VAXG[46] VAXG[47] VAXG[48] VAXG[49] VAXG[50] VAXG[51] VAXG[52] VAXG[53] VAXG[54] VAXG[55] VAXG[56]

F45

VAXG_SENSE VSSAXG_SENSE

VCCPLL[1] VCCPLL[2] VCCPLL[3]

L17

VCCSA[1]

L21

VCCSA[2] VCCSA[3] VCCSA[4] VCCSA[5] VCCSA[6] VCCSA[7] VCCSA[8] VCCSA[9] VCCSA[10] VCCSA[11] VCCSA[12] VCCSA[13] VCCSA[14] VCCSA[15] VCCSA[16]

SANDY-BRIDGE_BGA1023~D

i5@

D D

+VCC_GFXCORE_AXG

C C

330U_D2_2V_Y

1

C131

+

2

C109 0.1U_0402_10V7KC109 0.1U_0402_10V7K

12

C110 0.1U_0402_10V7KC110 0.1U_0402_10V7K

12

22U_0805_6.3V6M

C111

C112

1

2

22U_0805_6.3V6M

C114

C122

1

2

330U_D2_2V_Y

0.1U_0402_16V4Z~D

1

2

0.1U_0402_16V4Z~D

C132

1

+

2

1

2

1

2

CC76

Vaxg

1U_0402_6.3V6K

C836

C835

1

2

B B

A A

1U_0402_6.3V6K

C838

C837

C839

C840

C841

1

2

+1.8VS

330U_D2_2V_Y

5

C841

1

2

R122

0_0805_5%

1 2

@

+VCCSA

C142

1

2

VCC_AXG_SENSE<48> VSS_AXG_SENSE<48>

GRAPHICS

SENSE

LINES

SENSE

LINES

1.8V RAIL

SA RAIL

4

SM_VREF

VDDQ[1] VDDQ[2] VDDQ[3] VDDQ[4] VDDQ[5] VDDQ[6] VDDQ[7] VDDQ[8]

VDDQ[9] VDDQ[10] VDDQ[11] VDDQ[12] VDDQ[13] VDDQ[14] VDDQ[15] VDDQ[16] VDDQ[17] VDDQ[18] VDDQ[19] VDDQ[20] VDDQ[21] VDDQ[22]

DDR3 - 1.5V RAILS

POWER

VDDQ[23] VDDQ[24] VDDQ[25] VDDQ[26]

VCCDQ[1] VCCDQ[2]

QUIET RAILS

VDDQ_SENSE

VSS_SENSE_VDDQ

SENSE LINES

VCCSA_SENSE

VCCSA_VID[0] VCCSA_VID[1]

4

AY43

AJ28 AJ33 AJ36 AJ40 AL30 AL34 AL38 AL42 AM33 AM36 AM40 AN30 AN34 AN38 AR26 AR28 AR30 AR32 AR34 AR36 AR40 AV41 AW26 BA40 BB28 BG33

AM28 AN26

BC43 BA43

U10

D48 D49

+V_SM_VREF_CNT

Dell open

VCCSA_SENSE

VCCSA_VID0 VCCSA_VID1

C824

1

2

1 2

1U_0402_6.3V6K

C825

1

2

CPU1.5V_S3_GATE<26>

1U_0402_6.3V6K

C723

1 2

R124 0_0402_5%@R124 0_0402_5%@

1U_0402_6.3V6K

C827

C826

1

2

SUSP#<26,28,46>

+1.5V_CPU_VDDQ

VCCSA_SENSE <47>

VCCSA_SEL <47>

1U_0402_6.3V6K

C828

1

2

12

C829

1

2

R863

R863 10K_0402_5%

10K_0402_5%

1U_0402_6.3V6K

1

2

RC104

@RC104

@

1 2

0_0402_5%~D

RC107

1 2

0_0402_5%~D

@

C830

3

+V_SM_VREF should have 20 mil trace width

0.1U_0402_16V4Z

1U_0402_6.3V6K

C831

1

2

RUN_ON_CPU1.5VS3

1

C126

2

1U_0402_6.3V6K

C833

C832

C834

1

2

12

RC102

RC102 100K_0402_5%~D

100K_0402_5%~D

RUN_ON_CPU1.5VS3#

61

QC6A

QC6A 2N7002DW-7-F_SOT363-6~D

2N7002DW-7-F_SOT363-6~D

2

VID[0] VID[1] 2011 2012 0 0 0.90 V Yes Yes 0 1 0.80 V Yes Yes 1 0 0.725 V No Yes 1 1 0.675 V No Yes

3

2

AP2302GN-HF_SOT23-3~D

Q6

1

3

R123

@R123

@

0_0402_5%

12

5A

10U_0603_6.3V6M

1

C135

2

10U_0603_6.3V6M

1

C147

2

10U_0603_6.3V6M

1

C133

C124

C127

2

+1.5V_CPU_VDDQ

12

R113

R113 100_0402_1%

100_0402_1%

12

R115

R115 100_0402_1%

100_0402_1%

+1.5V_CPU_VDDQ

10U_0603_6.3V6M

1

+

C130

C130 C134

C134

C129

330U_D2_2V_Y

2

+1.5V_CPU_VDDQ Source

+1.5V +1.5V_CPU_VDDQ

12

RC101

RC101 100K_0402_5%~D

100K_0402_5%~D

RUN_ON_CPU1.5VS3

3

QC6B

2N7002DW-7-F_SOT363-6~D

4

RUN_ON_CPU1.5VS3# <6,28>

Security Classification

Issued Date

THIS SHEET OF ENGINEERIN G DRAWING IS THE PROPRI ETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CON TAINS CONFIDENTIAL

THIS SHEET OF ENGINEERIN G DRAWING IS THE PROPRI ETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CON TAINS CONFIDENTIAL AND TRADE SECRET INFORMA TION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMA TION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMA TION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

QC3

AO4728L_SO8~D

8 7 6 5

1 2

12

3

1

4

2

CC138

RC103

20K_0402_5%~D

10U_0805_10V4Z~D

2

20K_0402_5%~D

Compal Secret Data

Deciphered Date

0.1U_0603_50V_X7R

12

1

CC139

2

RC105

330K_0402_1%

2010/12/20 2011/12/20

C128

5

1

2

B+_BIAS+3VALW

+V_SM_VREF

10U_0603_6.3V6M

UCPU1H

A13

VSS[1]

A17

VSS[2]

A21

VSS[3]

A25

VSS[4]

A28

VSS[5]

A33

VSS[6]

A37

VSS[7]

A40

VSS[8]

A45

VSS[9]

A49

VSS[10]

A53

VSS[11]

A9

VSS[12]

AA1

VSS[13]

AA13

VSS[14]

AA50

VSS[15]

AA51

VSS[16]

AA52

VSS[17]

AA53

VSS[18]

AA55

VSS[19]

AA56

VSS[20]

AA8

VSS[21]

AB16

VSS[22]

AB18

VSS[23]

AB21

VSS[24]

AB48

VSS[25]

AB61

VSS[26]

AC10

VSS[27]

AC14

VSS[28]

AC46

VSS[29]

AC6

VSS[30]

AD17

VSS[31]

AD20

VSS[32]

AD4

VSS[33]

AD61

VSS[34]

AE13

VSS[35]

AE8

VSS[36]

AF1

VSS[37]

AF17

VSS[38]

AF21

VSS[39]

AF47

VSS[40]

AF48

VSS[41]

AF50

VSS[42]

AF51

VSS[43]

AF52

VSS[44]

AF53

VSS[45]

AF55

VSS[46]

AF56

VSS[47]

AF58

VSS[48]

AF59

VSS[49]

AG10

VSS[50]

AG14

VSS[51]

AG18

VSS[52]

AG47

VSS[53]

AG52

VSS[54]

AG61

VSS[55]

AG7

VSS[56]

AH4

VSS[57]

AH58

VSS[58]

AJ13

VSS[59]

AJ16

VSS[60]

AJ20

VSS[61]

AJ22

VSS[62]

AJ26

VSS[63]

AJ30

VSS[64]

AJ34

VSS[65]

AJ38

VSS[66]

AJ42

VSS[67]

AJ45

VSS[68]

AJ48

VSS[69]

AJ7

VSS[70]

AK1

VSS[71]

AK52

VSS[72]

AL10

VSS[73]

AL13

VSS[74]

AL17

VSS[75]

AL21

VSS[76]

AL25

VSS[77]

AL28

VSS[78]

AL33

VSS[79]

AL36

VSS[80]

AL40

VSS[81]

AL43

VSS[82]

AL47

VSS[83]

AL61

VSS[84]

AM13

VSS[85]

AM20

VSS[86]

AM22

VSS[87]

AM26

VSS[88]

AM30

VSS[89]

AM34

VSS[90]

SANDY-BRIDGE_BGA1023~D

1

AM38

VSS[91]

AM4

VSS[92]

AM42

VSS[93]

AM45

VSS[94]

AM48

VSS[95]

AM58

VSS[96]

AN1

VSS[97]

AN21

VSS[98]

AN25

VSS[99]

AN28

VSS[100]

AN33

VSS[101]

AN36

VSS[102]

AN40

VSS[103]

AN43

VSS[104]

AN47

VSS[105]

AN50

VSS[106]

AN54

VSS[107]

AP10

VSS[108]

AP51

VSS[109]

AP55

VSS[110]

AP7

VSS[111]

AR13

VSS[112]

AR17

VSS[113]

AR21

VSS[114]

AR41

VSS[115]

AR48

VSS[116]

AR61

VSS[117]

AR7

VSS[118]

AT14

VSS[119]

AT19

VSS[120]

AT36

VSS[121]

AT4

VSS[122]

AT45

VSS[123]

VSS

Title

Size Document Number Rev

Custom

Date: Sheet of

AT52

VSS[124]

AT58

VSS[125]

AU1

VSS[126]

AU11

VSS[127]

AU28

VSS[128]

AU32

VSS[129]

AU51

VSS[130]

AU7

VSS[131]

AV17

VSS[132]

AV21

VSS[133]

AV22

VSS[134]

AV34

VSS[135]

AV40

VSS[136]

AV48

VSS[137]

AV55

VSS[138]

AW13

VSS[139]

AW43

VSS[140]

AW61

VSS[141]

AW7

VSS[142]

AY14

VSS[143]

AY19

VSS[144]

AY30

VSS[145]

AY36

VSS[146]

AY4

VSS[147]

AY41

VSS[148]

AY45

VSS[149]

AY49

VSS[150]

AY55

VSS[151]

AY58

VSS[152]

AY9

VSS[153]

BA1

VSS[154]

BA11

VSS[155]

BA17

VSS[156]

BA21

VSS[157]

BA26

VSS[158]

BA32

VSS[159]

BA48

VSS[160]

BA51

VSS[161]

BB53

VSS[162]

BC13

VSS[163]

BC5

VSS[164]

BC57

VSS[165]

BD12

VSS[166]

BD16

VSS[167]

BD19

VSS[168]

BD23

VSS[169]

BD27

VSS[170]

BD32

VSS[171]

BD36

VSS[172]

BD40

VSS[173]

BD44

VSS[174]

BD48

VSS[175]

BD52

VSS[176]

BD56

VSS[177]

BD8

VSS[178]

BE5

VSS[179]

BG13

VSS[180]

Compal Electronics, Inc.

PROCESSOR(6/7) PWR

1

1.0

10 49Thursday, July 28, 2011

5

+1.5V

CD6

1

2

10U_0603_6.3V6M~D

CD11

1

2

1U_0402_6.3V6K~D

1

CD20

2

12

RD1

RD1 1K_0402_1%~D

1K_0402_1%~D

+V_DDR_REFA

12

RD3

RD3 1K_0402_1%~D

1K_0402_1%~D

All VREF traces should have 10 mil trace width

10U_0603_6.3V6M~D

@

CD12

CD13

1

2

DDR_A_DQS#[0..7]<7>

DDR_A_DQS[0..7]<7>

DDR_A_D[0..63]<7>

DDR_A_MA[0..15]<7>

D D

Layout Note: Place near JDIMM1

+1.5V

1U_0402_6.3V6K~D

CD3

1

2

+1.5V

10U_0603_6.3V6M~D

C C

B B

CD7

CD8

1

2

Layout Note: Place near JDIMM1.203,204

+0.75VS

1U_0402_6.3V6K~D

1

CD17

2

1U_0402_6.3V6K~D

CD4

CD5

1

2

10U_0603_6.3V6M~D

CD9

CD10

1

2

1U_0402_6.3V6K~D

1

CD19

CD18

2

4

+V_DDR_REFA

3

RD2 0_0402_5%~D

1 2

0.1U_0402_16V7K~D

2.2U_0603_6.3V6K~D

@

1

CD1

2

DDR_CKE0_DIMMA<7> DDR_CKE1_DIMMA <7>

DDR_A_BS2<7>

M_CLK_DDR0<7> M_CLK_DDR#0<7>

DDR_A_BS0<7>

DDR_A_WE#<7> DDR_A_CAS#<7>

DDR_CS1_DIMMA#<7>

2.2U_0603_6.3V6K~D

0.1U_0402_16V7K~D

+3VS

CD21

1

2

+DIMM0_VREF

DDR_A_D0 DDR_A_D1

CD2

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_D26 DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS2

DDR_A_MA12 DDR_A_MA9

DDR_A_MA8 DDR_A_MA5

DDR_A_MA3 DDR_A_MA1

M_CLK_DDR0 M_CLK_DDR#0

DDR_A_MA10 DDR_A_BS0

DDR_A_WE# DDR_A_CAS#

DDR_A_MA13

DDR_CS1_DIMMA#

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_D42 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_D58 DDR_A_D59

1 2

RD6 10K_0402_5%~DR D6 10K_0402_5%~D

1 2

RD7 10K_0402_5%~DR D7 10K_0402_5%~D CD22

CD22

+0.75VS

+1.5V

JDIMM1

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1 VSS49DQS#0

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2 DQS247VSS17 VSS1849DQ22

51

DQ18 DQ1953VSS19 VSS2055DQ28

57

DQ24 DQ2559VSS21 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3 A12/BC#83A11

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1 VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

BELLW_80011-1021

D

DR3

VSS3

DQS0

VSS6

VSS8 DQ12 DQ13

VSS10

DQ14 DQ15

DQ20 DQ21

DQ23

DQ29

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

VTT2

+1.5V

2

DDR_A_D4

4

DQ4 DQ5

DQ6 DQ7

DM1

DM2

A15 A14

A7

A6 A4

A2 A0

CK1

BA1

S0#

NC2

DM4

DM6

SDA

SCL

G2

6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

DDR_A_D5

DDR_A_DQS#0 DDR_A_DQS0

DDR_A_D6 DDR_A_D7

DDR_A_D12 DDR_A_D13

DDR3_DRAMRST#

DDR_A_D14 DDR_A_D15

DDR_A_D20 DDR_A_D21

DDR_A_D22 DDR_A_D23

DDR_A_D28 DDR_A_D29

DDR_A_DQS#3 DDR_A_DQS3

DDR_A_D30 DDR_A_D31

DDR_CKE1_DIMMA

DDR_A_MA15 DDR_A_MA14

DDR_A_MA11 DDR_A_MA7

DDR_A_MA6 DDR_A_MA4

DDR_A_MA2 DDR_A_MA0

M_CLK_DDR1 M_CLK_DDR#1

DDR_A_BS1 DDR_A_RAS#

DDR_CS0_DIMMA# M_ODT0

M_ODT1

DDR_A_D36 DDR_A_D37

DDR_A_D38 DDR_A_D39

DDR_A_D44 DDR_A_D45

DDR_A_DQS#5 DDR_A_DQS5

DDR_A_D46 DDR_A_D47

DDR_A_D52 DDR_A_D53

DDR_A_D54 DDR_A_D55

DDR_A_D60 DDR_A_D61

DDR_A_DQS#7 DDR_A_DQS7

DDR_A_D62 DDR_A_D63

PCH_SMBDATA PCH_SMBCLK

+0.75VS

M_CLK_DDR1 <7> M_CLK_DDR#1 <7>

DDR_A_BS1 <7> DDR_A_RAS# <7>

DDR_CS0_DIMMA# <7> M_ODT0 <7>

M_ODT1 <7>

PCH_SMBDATA <12,14,23> PCH_SMBCLK <12,14, 23>

+VREF_CA

2.2U_0603_6.3V6K~D

2

DDR3_DRAMRST# <7, 12>

+1.5V

12

RD4

RD4 1K_0402_1%~D

1K_0402_1%~D

0.1U_0402_16V7K~D

1

CD15

2

12

RD5

1

2

RD5 1K_0402_1%~D

1K_0402_1%~D

CD16

1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2010/12/20 2011/12/20

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

DDRIII DIMMA

LA-7451P

1

11 49Thursday, July 28, 2011

of

1.0

5

+1.5V

12

RD15

RD15 1K_0402_1%~D

1K_0402_1%~D

+V_DDR_REFB

DDR_B_DQS#[0..7]<7>

DDR_B_DQS[0..7]<7>

D D

C C

B B

DDR_B_D[0..63]<7>

DDR_B_MA[0..15]<7>

+1.5V

1U_0402_6.3V6K~D

+1.5V

10U_0603_6.3V6M~D

CD32

1

2

Layout Note: Place near JDIMMB.203,204

+0.75VS

CD29

CD28

1

2

10U_0603_6.3V6M~D

CD33

CD34

1

2

1U_0402_6.3V6K~D

1

CD42

CD43

2

Layout Note: Place near JDIMMB

1U_0402_6.3V6K~D

CD31

CD30

1

2

10U_0603_6.3V6M~D

CD36

CD35

1

2

1

2

1U_0402_6.3V6K~D

1

CD44

2

10U_0603_6.3V6M~D

@

1

CD38

CD37

1

2

CD45

12

RD16

RD16 1K_0402_1%~D

1K_0402_1%~D

330U_SX_2VY~D

CD39

+

4

+V_DDR_REFB

Note: Check voltage tolerance of VREF_DQ at the DIMM socket

All VREF traces should have 10 mil trace width

+3VS

RD14 0_0402_5%~D

1 2

2.2U_0603_6.3V6K~D

@

1

CD27

2

DDR_CKE2_DIMMB<7>

DDR_B_BS2<7>

M_CLK_DDR2<7> M_CLK_DDR#2<7>

DDR_B_BS0<7>

DDR_B_WE#<7> DDR_B_CAS#<7>

DDR_CS3_DIMMB#<7>

+3VS

12

RD19

10K_0402_5%~D

3

+1.5V

0.1U_0402_16V7K~D

10K_0402_5%~D

+DIMM1_VREF

DDR_B_D0 DDR_B_D1

1

CD26

DDR_B_D2

2

DDR_B_D3

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_D26 DDR_B_D27

DDR_CKE2_DIMMB

DDR_B_BS2

DDR_B_MA12 DDR_B_MA9

DDR_B_MA8 DDR_B_MA5

DDR_B_MA3 DDR_B_MA1

M_CLK_DDR2 M_CLK_DDR#2

DDR_B_MA10 DDR_B_BS0

DDR_B_WE# DDR_B_CAS#

DDR_B_MA13 DDR_CS3_DIMMB#

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_D42 DDR_B_D43

DDR_B_D48 DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51

DDR_B_D56 DDR_B_D57

DDR_B_D58 DDR_B_D59

2.2U_0603_6.3V6K~D

0.1U_0402_16V7K~D

12

RD20

+0.75VS

CD46

1

2

JDIMM2

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1 VSS49DQS#0

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9 VSS925VSS10

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2 DQS247VSS17 VSS1849DQ22

51

DQ18 DQ1953VSS19 VSS2055DQ28

57

DQ24 DQ2559VSS21 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3 A12/BC#83A11

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1 VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

DDR3

G1

CD47

VSS3

DQS0

VSS6

VSS8 DQ12 DQ13

DQ14 DQ15

DQ20 DQ21

DQ23

DQ29

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35 DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47 DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

VTT2

DQ4 DQ5

DQ6 DQ7

DM1

DM2

A15 A14

A7

A6 A4

A2 A0

CK1

BA1

S0#

NC2

DM4

DM6

SDA SCL

G2

TYCO_2-2013843-1

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 206

+1.5V

DDR_B_D4 DDR_B_D5

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D6 DDR_B_D7

DDR_B_D12 DDR_B_D13

DDR3_DRAMRST#

DDR_B_D14 DDR_B_D15

DDR_B_D20 DDR_B_D21

DDR_B_D22 DDR_B_D23

DDR_B_D28 DDR_B_D29

DDR_B_DQS#3 DDR_B_DQS3

DDR_B_D30 DDR_B_D31

DDR_CKE3_DIMMB

DDR_B_MA15 DDR_B_MA14

DDR_B_MA11 DDR_B_MA7

DDR_B_MA6 DDR_B_MA4

DDR_B_MA2 DDR_B_MA0

M_CLK_DDR3 M_CLK_DDR#3

DDR_B_BS1 DDR_B_RAS#

DDR_CS2_DIMMB# M_ODT2

M_ODT3

DDR_B_D36 DDR_B_D37

DDR_B_D38 DDR_B_D39

DDR_B_D44 DDR_B_D45

DDR_B_DQS#5 DDR_B_DQS5

DDR_B_D46 DDR_B_D47

DDR_B_D52 DDR_B_D53

DDR_B_D54 DDR_B_D55

DDR_B_D60 DDR_B_D61

DDR_B_DQS#7 DDR_B_DQS7

DDR_B_D62 DDR_B_D63

PCH_SMBDATA PCH_SMBCLK

+0.75VS

2

DDR3_DRAMRST# <7, 11>

DDR_CKE3_DIMMB <7>

M_CLK_DDR3 <7> M_CLK_DDR#3 <7>

DDR_B_BS1 <7> DDR_B_RAS# <7>

DDR_CS2_DIMMB# <7> M_ODT2 <7>

M_ODT3 <7>

+VREF_CB

2.2U_0603_6.3V6K~D

0.1U_0402_16V7K~D

1

CD40

2

PCH_SMBDATA <11,14,23> PCH_SMBCLK <11,14,23>

RD17

RD17 1K_0402_1%~D

1K_0402_1%~D

1

CD41

2

+1.5V

12

RD18

RD18 1K_0402_1%~D

1K_0402_1%~D

1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2010/12/20 2011/12/20

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

DDRIII DIMMB

LA-7451P

1

12 49Thursday, July 28, 2011

of

1.0

5

PCH_RTCX1

32.768KHZ_12.5PF_Q13MC14610002

1

CH3

CH3 18P_0402_50V8J~D

18P_0402_50V8J~D

2

1 2

RH27 33_0402_5%

1 2

RH28 33_0402_5%

1 2

RH33 33_0402_5%

1 2

RH275 1M_0402_5%~DRH275 1M_0402_5%~D

HDA_SDO<26>

12

RH39

@RH39

@

200_0402_5%

12

RH45

RH45 100_0402_1%~D

100_0402_1%~D

1 2

RH53 51_0402_5%

PCH_SPI_WP#

PCH_SPI_HOLD#

@

RH256

12

1 2

33_0402_5%

CH98

12

@

10P_0402_50V8J~D

PCH_RTCX2

+RTCVCC

HDA_BIT_CLK

HDA_RST#

HDA_SYNC_R

1 2

RH24 0_0402_5%~DRH24 0_0402_5%~D

1 2

RH30 33_0402_5%

12

RH40

@RH40

@

200_0402_5%

12

RH46

100_0402_1%~D

+3V_PCH

12

@

RH267

RH267 10K_0402_5%~D

10K_0402_5%~D

DP_PCH_HPD

RH268

RH268 100K_0402_5%~D

100K_0402_5%~D

@

1 2

@

PCH_SPI_CLK_R

PCH_SPI_CLK

+RTCVCC

RH11

CH4

1U_0603_10V4Z

1 2

RH25 20K_0402_5%~DRH25 20K_0402_5%~D

1 2

RH23 20K_0402_5%~DRH23 20K_0402_5%~D

CH5

1U_0603_10V4Z

+5VS

S

QH1BSS138_SOT23

@

1 2

RH36 0_0402_5%~D

HDA_SDOUT

1M_0402_5%~D

CMOS

CLRP1

CLRP2

ME CMOS

HDA_SPKR<31>

HDA_SDIN0<31>

DP_PCH_HPD<32>

PCH_JTAG_TCK<6>

PCH_JTAG_TMS<6>

PCH_JTAG_TDI<6>

PCH_JTAG_TDO<6>

close to UH1

@

1 2

RH58 0_0402_5%~D

1 2

RH60 33_0402_5%RH60 33_0402_5%

SM_INTRUDER#

PCH_RTCX1

PCH_RTCX2

PCH_RTCRST#

PCH_SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

HDA_BIT_CLK

HDA_SYNC

HDA_SPKR

HDA_RST#

HDA_SDIN0

HDA_SDOUT

DP_PCH_HPD

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

@

RH255 0_0402_5%~D

PCH_SPI_CLK

12

PCH_SPI_CS#

PCH_SPI_SI

PCH_SPI_SO

+3V_PCH

RH57

@ RH57

@

3.3K_0402_5%

1 2

PCH_SPI_CS#_RPCH_SPI_CS#

PCH_SPI_WP#

1 2

1

12

SHORT PADS

2

1

12

SHORT PADS

2

CLP1 & CLP2 place near DIMM

G

2

HDA_SYNC

13

D

PCH_SPI_CLK_R

PCH_SPI_SO PCH_SPI_SO_R

1 2

RH2 10M_0402_5%RH2 10M_0402_5%

18P_0402_50V8J~D

1

CH2

OSC4OSC

2

YH1

D D

C C

B B

A A

YH1

NC3NC

2

far away hot spot

HDA_BITCLK_AUDIO<31>

HDA_RST_AUDIO#<31>

HDA_SYNC_AUDIO<31>

HDA_SDOUT_AUDIO<31>

+3V_PCH +3V_PCH+3V_PCH

12

RH38

@RH38

@

200_0402_5%

PCH_JTAG_TDO PCH_JTAG_TDIPCH_JTAG_TMS

12

RH44

100_0402_1%~D

PCH_JTAG_TCK

+3V_PCH

1 2

RH54 3.3K_0402_5%RH54 3.3K_0402_5%

1 2

RH56 3.3K_0402_5%RH56 3.3K_0402_5%

CH94

22P_0402_50V8J~D

Reserve for EMI please close t o U48

Reserve for RF please close to UH1

5

4

@

HDA_SDOUT

12

CH103 10P_0402_50V8J~D

@

HDA_BIT_CLK

12

CH97 10P_0402_50V8J~D

Reserve for RF please close to UH1

UH1A

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

HDA_DOCK_EN# / GPIO33

N32

HDA_DOCK_RST # / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

CougarPoint_Rev_1p0

SA00003P42L

RTCIHDA

JTAG

SPI

LPC

FWH4 / LFRAME#

LDRQ1# / GPIO23

SATA

SATA3RCOMPO

SATA0GP / GPIO21

SATA1GP / GPIO19

SPI ROM FOR ME ( 4MByte )

U48

1

/CS

2

DO

3

/WP

GND4DIO

W25Q32BVSSIG_SO8~D

SPI BIOS Pinout

(1)CS# (5)DIO (2)DO (6)CLK (3)WP# (7)HOLD # (4)GND (8)VCC

W25X32

4

VCC

/HOLD

8

PCH_SPI_HOLD#

7

PCH_SPI_CLK_R

6

CLK

5

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3

LDRQ0#

SERIRQ

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATA1RXN

SATA 6G

SATA1RXP SATA1TXN SATA1TXP

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA4RXN SATA4RXP SATA4TXN SATA4TXP

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3COMPI

SATA3RBIAS

SATALED#

C38 A38 B37 C37

D36

E36 K36

V5

AM3 AM1 AP7 AP5

AM10 AM8 AP11 AP10

AD7 AD5 AH5 AH4

AB8 AB10 AF3 AF1

Y7 Y5 AD3 AD1

Y3 Y1 AB3 AB1

Y11

Y10

AB12

AB13

AH1

P3

V14

P1

1 2

RH63 33_0402_5%RH63 33_0402_5%

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

LPC_FRAME#

SERIRQ

SATA_PTX_DRX_N1 SATA_PTX_DRX_P1

SATA_PTX_DRX_N2 SATA_PTX_DRX_P2

SATA_COMP

SATA3_COMP

RBIAS_SATA3

PCH_SATALED#

PCH_GPIO21

BBS_BIT0_R

PCH_SPI_SIPCH_SPI_SI_R

3

LPC_AD0 <26> LPC_AD1 <26> LPC_AD2 <26> LPC_AD3 <26>

LPC_FRAME# <26>

SERIRQ <26>

CH91 0.01U_0402_16V7K~DCH91 0.01U_0402_16V7K~D

1 2

CH90 0.01U_0402_16V7K~DCH90 0.01U_0402_16V7K~D

1 2

CH92 0.01U_0402_16V7K~DCH92 0.01U_0402_16V7K~D

1 2

CH93 0.01U_0402_16V7K~DCH93 0.01U_0402_16V7K~D

1 2

10K_0402_5%~D

12

CH6

0.1U_0402_16V7K~D

3

+1.05VS_VCC_SATA

+1.05VS_SATA3

Security Classification

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INF ORMATION IT CONT AINS

DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INF ORMATION IT CONT AINS

DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INF ORMATION IT CONT AINS MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, IN C.

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, IN C.

1 2

RH41 37.4_0402_1%RH41 37.4_0402_1%

1 2

RH43 49.9_0402_1%RH43 49.9_0402_1%

1 2

RH48 750_0402_1%~D

RH276

+3V_PCH

1

2

+3VS

Issued Date

2

SATA_PRX_DTX_N1 <23> SATA_PRX_DTX_P1 <23> SATA_PTX_DRX_N1_C <23> SATA_PTX_DRX_P1_C <23>

SATA_PRX_DTX_N2 <23> SATA_PRX_DTX_P2 <23> SATA_PTX_DRX_N2_RP <23> SATA_PTX_DRX_P2_RP <23>

HDD1

ODD

PCH_INTVRMEN

INTVRMEN

H：Integrated VRM enable

*

L

：

HDA_SDO

ME debug mode , this signal has a weak internal PD

L=>security measures defined in the Flash Descriptor will be in effect (default)

H=>Flash Descriptor Security will be overridden

RTC Battery

+RTCVCC

W=20mils

1

CH95

CH95 1U_0603_10V4Z

1U_0603_10V4Z

2

Compal Secret Data

2010/12/20 2011/12/20

Compal Secret Data

Deciphered Date

2

RH31 330K_0402_5%RH31 330K_0402_5%

RH34 330K_0402_5%@RH34 330K_0402_5%@

12

Integrated VRM disable

1

SERIRQ

+RTCVCC

HDA_SYNC

This signal has a weak interna l pull-down

n Die PLL VR is supplied by

O

1.5V when smapl ed high

1.8V when sampl ed low Needs to be pul led High for Hu ron River platf rom

HDA_SYNC

RH52 1K_0402_5%~D RH52 1K_0402_5%~D

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

PCH (1/8) SATA,HDA,SPI, LPC

LA-7451P

RH29 10K_0402_5%~DRH29 10K_0402_5%~D

PCH_GPIO21

RH32 10K_0402_5%~DRH32 10K_0402_5%~D

PCH_SATALED#PCH_INTVRMEN

RH35 10K_0402_5%~DRH35 10K_0402_5%~D

HDA_SPKR

RH37 1K_0402_5%~D@RH37 1K_0402_5%~D@

*

HDA_SDOUT

RH42 1K_0402_5%~D@RH42 1K_0402_5%~D@

Low = Disabled

*

High = Enabled

12

1

LOW=Default HIGH=No Reboot

+3V_PCH

+3VS

12

+3VS

12

+3V_PCH

12

1.0

13 49Thursday, July 28, 2011

1.0

of

5

PCIE_PRX_GLANTX_N3<22>

10/100/1G LAN --->

D D

MiniWLAN (Mini Card 1)--->

CARD_READER --->

USB 3.0 --->

PCIE_PRX_GLANTX_P3<22> PCIE_PTX_GLANRX_N3<22> PCIE_PTX_GLANRX_P3<22>

PCIE_PRX_WLANTX_N1<27> PCIE_PRX_WLANTX_P1<27> PCIE_PTX_WLANRX_N1<27> PCIE_PTX_WLANRX_P1<27>

PCIE_PRX_CARDTX_N4<33> PCIE_PRX_CARDTX_P4<33> PCIE_PTX_CARDRX_N4<33> PCIE_PTX_CARDRX_P4<33>

PCIE_PRX_USB3TX_N6<30> PCIE_PRX_USB3TX_P6<30> PCIE_PTX_USB3RX_N6<30> PCIE_PTX_USB3RX_P6<30>

CH9 0.1U_0402_10V7K~DCH9 0.1U_0402_10V7K~D

1 2

CH14 0.1U_0402_10V7K~DCH14 0.1U_0402_10V7K~D

1 2

CH11 0.1U_0402_10V7K~DCH11 0.1U_0402_10V7K~D

1 2

CH16 0.1U_0402_10V7K~DCH16 0.1U_0402_10V7K~D

1 2

CH12 0.1U_0402_10V7K~DCH12 0.1U_0402_10V7K~D

1 2

CH13 0.1U_0402_10V7K~DCH13 0.1U_0402_10V7K~D

1 2

CH19 0.1U_0402_10V7K~DCH19 0.1U_0402_10V7K~D

1 2

CH20 0.1U_0402_10V7K~DCH20 0.1U_0402_10V7K~D

1 2

Reserve for EMI please close t o UH1

C C

Reserve for EMI please close t o UH1

10/100/1G LAN --->

MiniWLAN (Mini Card 1)--->

Card Reader --->

B B

USB 3.0 --->

XTAL25_IN

12

RH1171M_0402_5%~D RH1171M_0402_5%~D

YH2

25MHZ_18PF_1Y725000CE1A~D

1 2

22P_0402_50V8J~D

1

CH23

2

A A

CH24

XTAL25_OUT

CLK_CPU_ITP#<6> CLK_CPU_ITP<6>

22P_0402_50V8J~D

1

2

+3V_PCH

CLK_PCIE_LAN#<22> CLK_PCIE_LAN<22>

LANCLK_REQ#<22>

+3VS

CLK_PCIE_MINI1#<27> CLK_PCIE_MINI1<27>

MINI1CLK_REQ#<27>

CLK_PCIE_CD#<33> CLK_PCIE_CD<33>

CDCLK_REQ#<33>

+3V_PCH

CLK_PCIE_USB30#<30> CLK_PCIE_USB30<30>

+3V_PCH

USB30_CLKREQ#<30>

+3V_PCH

CLK_CPU_ITP# CLK_CPU_ITP

RH91 10K_0402_5%~DRH91 10K_0402_5%~D

RH93 0_0402_5%~D

RH93 0_0402_5%~D RH94 0_0402_5%~D

RH94 0_0402_5%~D

RH95 10K_0402_5%~D

+3VS

RH100 10K_0402_5%~DRH100 10K_0402_5%~D

RH101 0_0402_5%~D

RH101 0_0402_5%~D RH102 0_0402_5%~D@RH102 0_0402_5%~D@ RH103 10K_0402_5%~DRH103 10K_0402_5%~D

+3V_PCH

RH104 0_0402_5%~D

RH104 0_0402_5%~D RH106 0_0402_5%~D@RH106 0_0402_5%~D@ RH107 10K_0402_5%~DRH107 10K_0402_5%~D

+3V_PCH

RH110 10K_0402_5%~DRH110 10K_0402_5%~D

RH112 10K_0402_5%~DRH112 10K_0402_5%~D

RH114 0_0402_5%~D

RH114 0_0402_5%~D RH115 0_0402_5%~D@RH115 0_0402_5%~D@ RH116 10K_0402_5%~DRH116 10K_0402_5%~D

RH118 10K_0402_5%~DRH118 10K_0402_5%~D

RH119 0_0402_5%~D

RH119 0_0402_5%~D RH120 0_0402_5%~D

RH120 0_0402_5%~D

1 2

1 2 1 2

@

@ @

@

12

@

1 2

@

1 2

@

@ @

@

12

12 12 12

12 12

4

PCIE_PRX_GLANTX_N3 PCIE_PRX_GLANTX_P3 PCIE_PTX_GLANRX_N3_C PCIE_PTX_GLANRX_P3_C

PCIE_PRX_WLANTX_N1 PCIE_PRX_WLANTX_P1 PCIE_PTX_WLANRX_N1_C PCIE_PTX_WLANRX_P1_C

PCIE_PRX_CARDTX_N4 PCIE_PRX_CARDTX_P4 PCIE_PTX_CARDRX_N4_C PCIE_PTX_CARDRX_P4_C

PCIE_PRX_USB3TX_N6 PCIE_PRX_USB3TX_P6 PCIE_PTX_USB3RX_N6_C PCIE_PTX_USB3RX_P6_C

T81PAD~D @T81PAD~D @ T82PAD~D @T82PAD~D @

@

PCIECLKREQ0#

PCIE_LAN# PCIE_LAN

LANCLK_REQ#

PCIE_MINI1# PCIE_MINI1

MINI1CLK_REQ#

PCIE_CD# PCIE_CD

CDCLK_REQ#

PEG_B_CLKREQ#

PCIE_USB30# PCIE_USB30

USB30_CLKREQ#

GPIO46

CLK_BCLK_ITP# CLK_BCLK_ITPCLK_BCLK_ITP

UH1B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_ITPXDP_N

AK13

CLKOUT_ITPXDP_P

CougarPoint_Rev_1p0

SMBUSController

SML1ALERT# / PCHHOT# / GPIO74

PCI-E*

CLOCKS

3

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SML1CLK / GPIO58

SML1DATA / GPIO75

Link

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N

CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKOUT_DP_N CLKOUT_DP_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_GND1_N

CLKIN_GND1_P

CLKIN_DOT_96N CLKIN_DOT_96P

CLKIN_SATA_N CLKIN_SATA_P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

FLEX CLOCKS

SMBCLK

SMBDATA

SML0CLK

SML0DATA

CL_CLK1

CL_DATA1

CL_RST1#

XTAL25_IN

PCH_LID_SW_IN#

E12

SMBCLK

H14

SMBDATA

C9

DRAMRST_CNTRL_PCH

A12

SML0CLK

C8

SML0DATA

G12

C13

SML1CLK

E14

SML1DATA

M16

M7

T11

No support iAMT

P10

PEG_A_CLKRQ#

M10

CLK_PEG_VGA#

AB37

CLK_PEG_VGA

AB38

CLK_CPU_DMI#

AV22

CLK_CPU_DMI

AU22

AM12 AM13

CLKIN_DMI#

BF18

CLKIN_DMI

BE18

CLKIN_DMI2#

BJ30

CLKIN_DMI2

BG30

CLKIN_DOT96#

G24

CLKIN_DOT96

E24

CLKIN_SATA#

AK7

CLKIN_SATA

AK5

CLK_PCH_14M

K45

CLK_PCI_LPBACK

H45

XTAL25_IN

V47

XTAL25_OUT

V49

XCLK_RCOMP

Y47

KB_DET#

K43

DMC_PCH_DET#

F47

BT_DET#

H47

CAM_DET#

K49

CAM_DET#

DMC_PCH_DET#

BT_DET#

KB_DET#

MEMORY

Total device

1 2

RH113 90.9_0402_1%RH113 90.9_0402_1%

1 2

RH166 10K_0402_5%~DRH166 10K_0402_5%~D

1 2

RH109 10K_0402_5%~DRH109 10K_0402_5%~D

1 2

RH108 10K_0402_5%~DRH108 10K_0402_5%~D

12

R1791 100K_0402_5%~DR1791 100K_0402_5%~D

2

EC_LID_OUT#

1 2

RH680_0402_5%~D@RH680_0402_5%~D

@

1 2

RH710_0402_5%~D@RH710_0402_5%~D

DRAMRST_CNTRL_PCH <7>

20090512 a

dd double mosfet prevent

ATI M92 electric leakage

+3V_PCH

RH141

RH141 10K_0402_5%~D

10K_0402_5%~D

1 2

CLK_PEG_VGA# <34> CLK_PEG_VGA <34>

CLK_CPU_DMI# <6> CLK_CPU_DMI <6>

CLK_PCI_LPBACK <16>

KB_DET# <24>

DMC_PCH_DET#

BT_DET#

CAM_DET# <21>

PEG_A_CLKRQ# <34>

+1.05VS_VCCDIFFCLKN

+3VS

EC_LID_OUT# <26>

LID_SW_IN# <21,26>

SMBCLK

SMBDATA

6 1

DMN66D0LDW-7_SOT363-6~D

SML1CLK

DMN66D0LDW-7_SOT363-6~D

SML1DATA

CLK_PEG_VGA# CLK_PEG_VGA

+3VS

2.2K_0402_5%~D

2

QH3A

DMN66D0LDW-7_SOT363-6~D

6 1

DMN66D0LDW-7_SOT363-6~D

QH4A

+3VS

5

3

QH3B

2

5

3

QH4B

1

SMBCLK

SMBDATA

SML0CLK

SML0DATA

SML1CLK

SML1DATA

LID_SW_IN#

DRAMRST_CNTRL_PCH

CLKIN_DMI2# CLKIN_DMI2 CLKIN_DMI# CLKIN_DMI CLKIN_DOT96# CLKIN_DOT96 CLKIN_SATA# CLKIN_SATA CLK_PCH_14M

If use extenal CLK gen, please place close to CLK gen else, please pl ace close to P CH

RH85 10K_0402_5%~DRH85 10K_0402_5%~D

1 2

RH87 10K_0402_5%~DRH87 10K_0402_5%~D

1 2

+3VS

RH98

1 2

4

1 2

RH67 2.2K_0402_5%~DRH67 2.2K_0402_5%~D

1 2

RH69 2.2K_0402_5%~DRH69 2.2K_0402_5%~D

1 2

RH70 2.2K_0402_5%~D

1 2

RH72 2.2K_0402_5%~D

1 2

RH73 2.2K_0402_5%~DRH73 2.2K_0402_5%~D

1 2

RH74 2.2K_0402_5%~DRH74 2.2K_0402_5%~D

1 2

R1790 10K_0402_5%~D

@

1 2

RH75 1K_0402_5%~D

RH76 10K_0402_5%~DRH76 10K_0402_5%~D

1 2

RH78 10K_0402_5%~DRH78 10K_0402_5%~D

1 2

RH77 10K_0402_5%~DRH77 10K_0402_5%~D

1 2

RH79 10K_0402_5%~DRH79 10K_0402_5%~D

1 2

RH80 10K_0402_5%~DRH80 10K_0402_5%~D

1 2

RH81 10K_0402_5%~DRH81 10K_0402_5%~D

1 2

RH82 10K_0402_5%~DRH82 10K_0402_5%~D

1 2

RH83 10K_0402_5%~DRH83 10K_0402_5%~D

1 2

RH84 10K_0402_5%~DRH84 10K_0402_5%~D

1 2

RH99

2.2K_0402_5%~D

1 2

PCH_SMBCLK <11,12,23>

PCH_SMBDATA <11,12,23>

PCH_SMLCLK <26,35>

PCH_SMLDATA <26,35>

+3V_PCH

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/12/20 2011/12/20

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (2/8) PCIE, SMBUS, CLK

LA-7451P

1

14 49Thursday, July 28, 2011

1.0

5

Compal Electronics, Inc.

UH1C

DMI_CTX_PRX_N0<5> DMI_CTX_PRX_N1<5> DMI_CTX_PRX_N2<5> DMI_CTX_PRX_N3<5>

DMI_CTX_PRX_P0<5> DMI_CTX_PRX_P1<5> DMI_CTX_PRX_P2<5> DMI_CTX_PRX_P3<5>

DMI_CRX_PTX_N0<5>

D D

XDP_DBRESET#<6>

C C

PM_DRAM_PWRGD<6>

SUSWARN# SUSACK#_R

B B

GPIO72

RI#

WAKE#

AC_PRESENT

SUSWARN#

PCH_RSMRST#

SYS_PWROK

PM_PWROK_R

A A

DMI_CRX_PTX_N1<5> DMI_CRX_PTX_N2<5> DMI_CRX_PTX_N3<5>

DMI_CRX_PTX_P0<5> DMI_CRX_PTX_P1<5> DMI_CRX_PTX_P2<5> DMI_CRX_PTX_P3<5>

+VCCP

RH124 49.9_0402_1%RH124 49.9_0402_1%

RH125 750_0402_1%~DRH125 750_0402_1%~D

4mil width and place within 500mil of the PCH

SUSACK#<26>

PCH_PWROK

PCH_APWROK<26>

PCH_RSMRST#<26>

SUSWARN# SUSWARN#_R

PBTN_OUT#<6,26>

AC_PRESENT< 26>

1 2

RH139 0_0402_5%~D

@

near UH1

RH143 10K_0402_5%~ DRH143 10K_0402_5%~ D

1 2

RH145 10K_0402_5%~ DRH145 10K_0402_5%~ D

1 2

RH146 10K_0402_5%~ D@RH146 10K_0402_5%~D@

1 2

RH150 10K_0402_5%~ D@RH150 10K_0402_5%~D@

1 2

RH154 10K_0402_5%~ DRH154 10K_0402_5%~ D

1 2

RH159 10K_0402_5%~ DRH159 10K_0402_5%~ D

1 2

RH272 10K_0402_5%~ DRH272 10K_0402_5%~ D

1 2

RH129 100K_0402_5 %~DRH129 10 0K_0402_5%~D

1 2

5

DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3

DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3

DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3

DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3

1 2

RH127 0_0402_5%~D@ RH127 0_0402_5%~D@

RH273 0_0402_5%~D

RH130 0_0402_5%~D

RH131 0_0402_5%~D

RH133 0_0402_5%~D

RH134 0_0402_5%~D

RH135 0_0402_5%~D

RH137 0_0402_5%~D

PCH_RSMRST#_R

DMI_IRCOMP

RBIAS_CPY

1 2

XDP_DBRESET#

@

1 2

@

1 2

@

PM_DRAM_PWRGD

@

PCH_RSMRST#_R

1 2

@

1 2

@

1 2

@

1 2

GPIO72

+3V_PCH

100P_0402_50V8J~D

SUSACK#_R

SYS_PWROK

PM_PWROK_R

PBTN_OUT#_R

AC_PRESENT_R

RI#

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN#/SUSPWRDNACK/GPIO30

E20

PWRBTN#

H20

ACPRESENT / GPIO31

E10

BATLOW# / GPIO72

A10

RI#

CougarPoint_Rev_1p0

1

@

C294

2

DSWODVREN

RH147 330K_0402_5%RH147 330K_0402_5%

RH151 330K_0402_5%@RH151 330K_0402_5%@

DSWODVREN - On Die DSW VR Enable

H：Enable

*

L：Disable

PCH_PWROK<6,26>

VGATE<6,2 6,48>

4

FDI_CTX_PRX_N0

BJ14

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5

DMI

System Power Management

PCH_PWROK

FDI_RXP6

FDI

FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

SLP_LAN# / GPIO29

Check EC for S3 S4 LED

+RTCVCC

12

1

CH96

0.1U_0402_16V7K~D

2

1

IN1

2

IN2

4

+3VS

FDI_CTX_PRX_N1

AY14

FDI_CTX_PRX_N2

BE14

FDI_CTX_PRX_N3

BH13

FDI_CTX_PRX_N4

BC12

FDI_CTX_PRX_N5

BJ12

FDI_CTX_PRX_N6

BG10

FDI_CTX_PRX_N7

BG9

FDI_CTX_PRX_P0

BG14

FDI_CTX_PRX_P1

BB14

FDI_CTX_PRX_P2

BF14

FDI_CTX_PRX_P3

BG13

FDI_CTX_PRX_P4

BE12

FDI_CTX_PRX_P5

BG12

FDI_CTX_PRX_P6

BJ10

FDI_CTX_PRX_P7

BH9

FDI_INT

AW16

FDI_FSYNC0

AV12

FDI_FSYNC1

BC10

FDI_LSYNC0

AV14

FDI_LSYNC1

BB10

DSWODVREN

A18

PCH_DPWROK

E22

WAKE#

B9

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

5

VCC

GND

3

1 2

PM_CLKRUN#

SUS_STAT#

SUSCLK

RH132 0_0402_5%~D

PM_SLP_S5#

PM_SLP_S4#

PM_SLP_S3#

PM_SLP_SUS#

H_PM_SYNC

UH7

SYS_PWROK

4

OUT

MC74VHC1G08DFT2G_SC70-5

FDI_CTX_PRX_N0 <5> FDI_CTX_PRX_N1 <5> FDI_CTX_PRX_N2 <5> FDI_CTX_PRX_N3 <5> FDI_CTX_PRX_N4 <5> FDI_CTX_PRX_N5 <5> FDI_CTX_PRX_N6 <5> FDI_CTX_PRX_N7 <5>

FDI_CTX_PRX_P0 < 5> FDI_CTX_PRX_P1 < 5> FDI_CTX_PRX_P2 < 5> FDI_CTX_PRX_P3 < 5> FDI_CTX_PRX_P4 < 5> FDI_CTX_PRX_P5 < 5> FDI_CTX_PRX_P6 < 5> FDI_CTX_PRX_P7 < 5>

FDI_INT <5>

FDI_FSYNC0 <5>

FDI_FSYNC1 <5>

FDI_LSYNC0 <5>

FDI_LSYNC1 <5>

@

RH126 0_0402_5%~D

1 2

@

RH128 0_0402_5%~D

@

12

If not using integrated LAN,signal may be left as NC.

T76 PAD~DT76 PAD~ D

T77 PAD~DT77 PAD~ D

H_PM_SYNC <6>

PCH_RSMRST#_R

PCH_DPWROK <26>

PCIE_WAKE# <22,26,27>

SUSCLK_R <26>

PM_SLP_S5# <26>

PM_SLP_S4# <26>

PM_SLP_S3# <26>

SUSCLK

Reserve for RF please close to UH1

SYS_PWROK <6>

3

ENBKL<26>

VGA_LVDDEN<21,26>

VGA_PWM<21>

LVDS_DDC_CLK<21>

LVDS_DDC_DATA<21>

LVDS_ACLK-<21> LVDS_ACLK+<21>

LVDS_A0-<21> LVDS_A1-<21> LVDS_A2-<21>

LVDS_A0+<21> LVDS_A1+<21> LVDS_A2+<21>

Can be left NC when IAMT is not support on the platfrom

CH102

12

@

10P_0402_50V8J~D

+3VS

1 2

RH155 2.2K_0402_5%~DRH155 2.2K_0402_5%~D

1 2

RH157 2.2K_0402_5%~DRH157 2.2K_0402_5%~D

1 2

RH248 8.2K_0402_5%~D@RH248 8.2K_04 02_5%~D@

+3VS

RV169 2.2K_04 02_5%~DRV169 2.2K_04 02_5%~D

1 2

RV170 2.2K_04 02_5%~DRV170 2.2K_04 02_5%~D

1 2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/12/20 2011/12/20

ENBKL

LVDS_DDC_CLK LVDS_DDC_DATA

T203PAD~D T203PAD~D

LVDS_ACLKLVDS_ACLK+

LVDS_A0LVDS_A1LVDS_A2-

LVDS_A0+ LVDS_A1+ LVDS_A2+

RH140

1K_0402_0.5%~D

CTRL_CLK

CTRL_DATA

PM_CLKRUN#

CTRL_CLK CTRL_DATA

LVDS_IBG

CRT_IREF

12

LVDS_DDC_CLK LVDS_DDC_DATA

Compal Secret Data

Deciphered Date

UH1D

J47

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

AF37

LVD_IBG

AF36

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CLK

M40

CRT_DDC_DATA

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

CougarPoint_Rev_1p0

2

LVDS

CRT

2

+3VS

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_STALLN

SDVO_STALLP

SDVO_CTRLCLK

SDVO_CTRLDATA

HDMI

DDPC_CTRLCLK

DDPC_CTRLDATA

mDP

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

DMC

AP43 AP45

AM42 AM40

AP39

SDVO_INTN

AP40

SDVO_INTP

SDVO_SCLK

P38

SDVO_SDATA

M39

AT49

DDPB_AUXN

AT47

DDPB_AUXP

DDPB_HPD

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_AUXN DDPC_AUXP

DDPC_HPD

DDPC_0N

DDPC_0P

DDPC_1N

DDPC_1P

DDPC_2N

DDPC_2P

DDPC_3N

DDPC_3P

DDPD_AUXN DDPD_AUXP

DDPD_HPD

DDPD_0N

DDPD_0P

DDPD_1N

DDPD_1P

DDPD_2N

DDPD_2P

DDPD_3N

DDPD_3P

RH167 10K_0402_5%~DRH167 10K_0402_5%~ D

RH144 2.37K_0402_1%~DRH14 4 2.37K_0402_1%~D

RH168 100K_0402_5%~DRH168 100K_0402_5%~D

RH183 100K_0402_5%~DRH183 100K_0402_5%~D

RH158 100K_0402_5%~DRH158 100K_0402_5%~D

RH123 100K_0402_5%~DRH123 100K_0402_5%~ D

PCH_DPB_HPD

AT40

PCH_DPB_N0

AV42

PCH_DPB_P0

AV40

PCH_DPB_N1

AV45

PCH_DPB_P1

AV46

PCH_DPB_N2

AU48

PCH_DPB_P2

AU47

PCH_DPB_N3

AV47

PCH_DPB_P3

AV49

P46 P42

AP47 AP49 AT38

AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49

M43 M36

AT45 AT43 BH41

BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42

1 2

Title

Size Document Number Rev

Date: Sheet

PCH_DPC_HPD

PCH_DPD_HPD

PM_CLKRUN#

LVDS_IBG

PCH_DPC_HPD

PCH_DPD_HPD

VGA_LVDDEN

ENBKL

Compal Electronics, Inc.

PCH (3/8) DMI,FDI,PM,GFX,DP

LA-7451P

R983

1 2

2.2K_0402_5%

1

R984

1 2

2.2K_0402_5%

PCH_DPB_HPD <17,29>

PCH_DPB_N0 <29> PCH_DPB_P0 <29> PCH_DPB_N1 <29> PCH_DPB_P1 <29> PCH_DPB_N2 <29> PCH_DPB_P2 <29> PCH_DPB_N3 <29> PCH_DPB_P3 <29>

1

SDVO_SCLK <29> SDVO_SDATA < 29>

HDMI D2

HDMI D1

HDMI D0

HDMI CLK

15 49Thursday, July 28, 2011

of

1.0

5

D D

C C

B B

A A

+3V_PCH

12

1 2

@

RH269

RH269 10K_0402_5%~D

10K_0402_5%~D

CARD_HPLUG

RH264

RH264 100K_0402_5%~D

100K_0402_5%~D

@

CLK_PCI_LPBACK<14>

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

DGPU_HOLD_RST# DGPU_SELECT#

12

T165P AD~D @T165PAD~D @ T166P AD~D @T166PAD~D @ T204P AD~D @T204PAD~D @

+3VS

CLK_PCI1

DGPU_PWR_EN

WWAN_RADIO_OFF#

BT_RADIO_DIS# WL_OFF#

FFS_INT1 ODD_DA# DP_CBL_DET CARD_HPLUG

PCH_PLTRST#

CLK_PCI0 CLK_PCI1 CLK_PCI2 CLK_PCI3 CLK_PCI4

DGPU_PWR_EN<28,34,37,50>

WWAN_RADIO_OFF#<27>

BT_RADIO_DIS#<27>

WL_OFF#<27>

FFS_INT1<23>

ODD_DA#<23>

CARD_HPLUG<33>

T123P AD~D @T123PAD~D @

CLK_PCI_LPBACK

CLK_PCI_LPC<26>

CLK_PCI_LPC

WL_OFF# PCI_PIRQB# PCI_PIRQD# PCI_PIRQC#

DGPU_SELECT# DGPU_PWR_EN FFS_INT1

BT_RADIO_DIS#

PCI_PIRQA#

DP_CBL_DET

ODD_DA#

DGPU_HOLD_RST#

RH164 22_0402_5%RH164 22_0402_5% RH165 22_0402_5%

RH165 22_0402_5%

1 2

RPH3

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

RPH4

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

RPH5

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

RH173 10K_0402_5%~D

1 2

@

CH99

12

@

10P_0402_50V8J~D

Reserve for RF please close to UH1

5

BG26

BJ26

BH25

BJ16

BG16

AH38 AH37 AK43 AK45

C18 N30

H3

AH12

AM4 AM5

Y13 K24

L24 AB46 AB45

B21

M20

AY16

BG46

BE28 BC30 BE32

BJ32 BC28 BE30 BF32

BG32

AV26 BB26 AU28 AY30 AU26 AY26 AV28

AW30

K40 K38 H38

G38

C46 C44 E40

D47 E42 F46

G42 G40

C42 D44

K10

C6

H49 H43 J48 K42 H40

CougarPoint_Rev_1p0

10K_0402_5%~D

PLT_RST#<6,22,26,27,30,33>

4

UH1E

TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9 TP10 TP11 TP12 TP13 TP14 TP15 TP16 TP17 TP18 TP19 TP20

TP21 TP22 TP23 TP24

TP25 TP26 TP27 TP28 TP29 TP30 TP31 TP32 TP33 TP34 TP35 TP36 TP37 TP38 TP39 TP40

PIRQA# PIRQB# PIRQC# PIRQD#

REQ1# / GPIO50 REQ2# / GPIO52 REQ3# / GPIO54

GNT1# / GPIO51 GNT2# / GPIO53 GNT3# / GPIO55

PIRQE# / GPIO2 PIRQF# / GPIO3 PIRQG# / GPIO4 PIRQH# / GPIO5

PME#

PLTRST#

CLKOUT_PCI0 CLKOUT_PCI1 CLKOUT_PCI2 CLKOUT_PCI3 CLKOUT_PCI4

@

RH169

4

+3VS

1 2

RSVD

PCI

USB

12

RH171

RH171 100K_0402_5%~D

100K_0402_5%~D

RSVD1 RSVD2 RSVD3 RSVD4

RSVD5 RSVD6

RSVD7 RSVD8

RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22

RSVD23 RSVD24

RSVD25

RSVD26 RSVD27

RSVD28 RSVD29

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P

USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14

+3VS

5

UH5

P

IN1

4

O

IN2

G

SN74AHC1G08DCKR_SC70-5

3

CH101

ODD_DA#

12

0.1U_0402_16V7K~D

3

AY7 AV7 AU3 BG4

AT10 BC8

AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6

NV_ALE

AV5 AV10

AT8

AY5 BA2

AT12 BF3

C24 A24

USB20_N1

C25

USB20_P1

B25 C26 A26

USB20_N3

K28

USB20_P3

H28

USB20_N4

E28

USB20_P4

D28

USB20_N5

C28

USB20_P5

A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32

USBRBIAS

C33

B33

USB_OC2#

A14

USB_OC1#

K20

1.5VDDR_VID0

B17

1.5VDDR_VID1

C16

USB_OC0#

L16

USB_OC5#

A16

USB_OC6#

D14

USB3_SMI#

C14

PCH_PLTRST#

1

2

USB20_N1 <23> USB20_P1 <23>

USB20_N3 <21> USB20_P3 <21> USB20_N4 <27> USB20_P4 <27> USB20_N5 <27> USB20_P5 <27>

Within 500 mils

1 2

RH163 22.6_0402_1%RH163 22.6_0402_1%

3

USB PORT1

Camera

Mini Card(WLAN)

Mini Card(WWAN)

USB_OC2# <23>

(For USB Port 9)

USB3_SMI# <30>

+3VS

5

UH6

2

P

4

12

B

Y

1

A

G

SN74AHC1G08DCKR_SC70-5

3

Compal Secret Data

RH170

PLTRST_VGA#<34>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

100_0402_5%~D

RH172

100K_0402_5%~D

2010/12/20 2011/12/20

DGPU_HOLD_RST#

10K_0402_5%~D

Deciphered Date

2

Intel Anti-Theft Techonlogy

High=Endabled

NV_ALE

Low=Disable(floating)

NV_ALE

RH160 1K_0402_5%~D@ RH160 1K_0402_5%~D@

1 2

USB_OC0# USB_OC2# USB3_SMI# USB_OC5#

USB_OC1#

1.5VDDR_VID0

1.5VDDR_VID1 USB_OC6#

1 2

RH265 0_0402_5%~D@ RH265 0_0402_5%~D@

1 2

RH266 0_0402_5%~D

@

RH179

1 2

2

*

RPH1

4 5 3 6 2 7 1 8

10K_1206_8P4R_5%~D

RPH2

4 5 3 6 2 7 1 8

10K_1206_8P4R_5%~D

DGPU_PWROK

PCH_PLTRST#

1

+1.8VS

+3V_PCH

DGPU_PWROK <17,50>

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (4/8) PCI, USB, NVRAM

LA-7451P

1

16 49Thursday, July 28, 2011

1.0

5

D D

GPIO28

On-Die PLL Voltage Regulator This signal has a weak internal pull up

H：On-Die voltage regulator enabl e

*

L：On-Die PLL Voltage Regulator d isable

RH177 1K_0402_5%~D@RH177 1K_0402_5%~D@

PCH_GPIO37

C C

FDI TERMINATION VOLTAGE OVERRIDE

LOW - Tx, Rx terminated

*

to same voltage (DC Coupling Mode)

+3VS

RH181 1K_0402_5%~D@RH181 1K_0402_5%~D@

RH182

1 2

12

PCH_GPIO28

10K_0402_5%~D

PCH_GPIO37

GPIO27

PCH_GPIO27 (Have internal Pull-High) High: VCCVRM VR Enable

*

Low: VCCVRM VR Disable

RH186 10K_0402_5%~D@RH186 10K_0402_5%~D@

B B

High: CRT Plugged

A A

1 2

CRT_DET

PCH_GPIO27

+3VS

RH198

RH198 10K_0402_5%~D

10K_0402_5%~D

1 2

PCH_GPIO28 needs to be connected to XDP_FN8 PCH_GPIO35 needs to be connected to XDP_FN9 PCH_GPIO15 needs to be connected to XDP_FN16

Please refer to Huron River Debug Board DG 0.5

DGPU_EDIDSEL#

PCH_DPB_HPD<15,29>

DGPU_PWROK<16,50>

ODD_DETECT#<23>

FFS_INT2<23>

HDD_DETECT#<23>

EC_SCI#<26>

EC_SMI#<26>

4

BT_ON#

CRT_DET

DGPU_EDIDSEL#

GPIO6

EC_SCI#

EC_SMI#

PCH_DPB_HPD

GPIO16

DGPU_PWROK

PCH_GPIO22

PCH_GPIO27

PCH_GPIO28

BT_ON#

GPIO35

ODD_DETECT#

PCH_GPIO37

PCH_GPIO38

PCH_GPIO39

FFS_INT2

GPIO49

HDD_DETECT#

UH1F

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24 / MEM_LED

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

CougarPoint_Rev_1p0

GPIO

NCTF

3

TACH4 / GPIO68

TACH5 / GPIO69

TACH6 / GPIO70

TACH7 / GPIO71

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

INIT3_3V#

DF_TVS

CPU/MISC

TS_VSS1

TS_VSS2

TS_VSS3

TS_VSS4

NC_1

VSS_NCTF_15

VSS_NCTF_16

VSS_NCTF_17

VSS_NCTF_18

VSS_NCTF_19

VSS_NCTF_20

VSS_NCTF_21

VSS_NCTF_22

VSS_NCTF_23

VSS_NCTF_24

VSS_NCTF_25

VSS_NCTF_26

VSS_NCTF_27

VSS_NCTF_28

VSS_NCTF_29

VSS_NCTF_30

VSS_NCTF_31

VSS_NCTF_32

C40

B41

C41

A40

P4

AU16

P5

AY11

AY10

T14

AY1

AH8

AK11

AH10

AK10

P37

BG2

BG48

BH3

BH47

BJ4

BJ44

BJ45

BJ46

BJ5

BJ6

C2

C48

D1

D49

E1

E49

F1

F49

ODD_EN#

GPIO69

PCH_PECI_R

KB_RST#

H_THERMTRIP#_C

INIT3_3V#

NV_CLE

ODD_EN# <23>

T126 PAD~D@T126 PAD~D@

@

1 2

RH1750_0402_5%~D@RH1750_0402_5%~D

H_CPUPWRGD <6>

H_THERMTRIP#

1 2

RH176390_0402_5% RH176390_0402_5%

2

+3VS

RH174

RH174 10K_0402_5%~D

10K_0402_5%~D

1 2

H_PECI <6,26>

12

@

RH178

RH178 10K_0402_5%~D

10K_0402_5%~D

H_THERMTRIP# <6>

1

2

100P_0402_50V8J~D

INIT3_3V

This signal has weak internal PU, can't pull low

GATEA20 <26>

@

C290

KB_RST# <26>

DGPU_EDIDSEL#

ODD_EN#

HDD_DETECT#

EC_SMI#

ODD_DETECT#

GPIO16

BT_ON#

KB_RST#

PCH_GPIO22

GPIO35

GPIO49

PCH_GPIO38

PCH_GPIO39

GPIO6

DMI Termination Voltage

Set to Vcc when HIGH

NV_CLE

Set to Vss when LOW

Weak internal PU,Do not pull low

NV_CLE

CLOSE TO THE BRANCHING POINT

RH161 and RH162 Follow CRB FAB2 setting

RH180 10K_0402_5%~DRH180 10K_0402_5%~D

1 2

10K_0402_5%~D

1 2

RH187

10K_0402_5%~D

1 2

RH188

10K_0402_5%~D

1 2

RH190

200K_0402_5%

1 2

RH193

10K_0402_5%~D

1 2

RH274

8.2K_0402_5%~D

1 2

RH195

10K_0402_5%~D

1 2

RH196

10K_0402_5%~D

1 2

RH197

10K_0402_5%~D

1 2

RH257

10K_0402_5%~D

1 2

RH258

10K_0402_5%~D

1 2

RH262

10K_0402_5%~D

1 2

RH263

10K_0402_5%~D

1 2

RH271

+3VS

+3V_PCH

+3VS

1

+1.8VS

12

RH161

2.2K_0402_5%~D

12

RH1621K_0402_5%~D RH1621K_0402_5%~D

H_SNB_IVB# <6>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/12/20 2011/12/20

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (5/8) GPIO, CPU, MISC

LA-7451P

1

17 49Thursday, July 28, 2011

1.0

5

4

3

2

1

+VCCP

1

CH28

CH27

2

D D

+VCCP

+VCCAPLLEXP_R

2

10U_0805_4VAM~D

1U_0402_6.3V6K~D

placed internal

@

RH200 0_0603_5%~D

@

12

LH3

1 2

1UH_LB2012T1R0M_20%~D

@

Place CH40 Near BJ22 pin

+VCCP

C C

+3VS

12

RH206

RH206 0_0805_5%~D

0_0805_5%~D

@

+3VS_VCCA3GBG

1

CH44

+VCCP

B B

CH44

0.1U_0402_10V7K~D

2

@

RH208 0_0603_5%~D

1

2

Place CH53 Near BG6 pin

12

1

CH37

10U_0805_4VAM~D

1

2

@

CH39

CH38

2

1U_0402_6.3V6K~D

placed internal

+VCCP

CH46

1U_0402_6.3V6K~D

CH25

2

1U_0402_6.3V6K~D

1

2

1

CH40

2

1U_0402_6.3V6K~D

RH209

1 2

0_0805_5%~D

+VCCP_VCCDMI

@

1

CH26

2

1U_0402_6.3V6K~D

+1.05VS_VCCDPLLEXP

+VCCAPLLEXP

CH35

@

10U_0805_4VAM~D

CH41

1U_0402_6.3V6K~D

+VCCAFDI_VRM

+1.05VS_VCCAPLL_FDI

+1.05VS_VCCDPLL_FDI

UH1G

1300mA

AA23

VCCCORE[1]

AC23

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

VCCAPLLEXP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM[2]

BG6

VccAFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

CougarPoint_Rev_1p0

2925mA

POWER

VCC CORE

VCCIO

FDI

1mA

CRTLVDS

1mA

VCCTX_LVDS[1]

VCCTX_LVDS[2]

60mA

VCCTX_LVDS[3]

VCCTX_LVDS[4]

DMI

20mA

VCCDFTERM[1]

190mA

VCCDFTERM[2]

VCCDFTERM[3]

VCCDFTERM[4]

DFT / SPI HVCMOS

20mA

VCCADAC

VSSADAC

VCCALVDS

VSSALVDS

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCCLKDMI

VCCSPI

+VCCADAC

U48

U47

+VCCA_LVDS

AK36

AK37

AM37

AM38

AP36

AP37

+3VS_VCC3_3_6

V33

V34

+VCCAFDI_VRM

AT16

+VCCP_VCCDMI

AT20

+1.05VS_VCC_DMI_CCI

AB36

placed internal

AG16

AG17

AJ16

AJ17

+3V_VCCPSPI

V1

placed internal

1

CH29

2

+VCCTX_LVDS

CH32

0.01U_0402_16V7K~D

1

CH36

0.1U_0402_10V7K~D

2

1

CH45

2

1

CH47

CH47 1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

1

CH30

2

0.1U_0402_10V7K~D

0.01U_0402_16V7K~D

Near AP43

1

2

placed internal

+VCCP_VCCDMI

1 2

0_0805_5%~D

1

CH43

CH43 1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

+VCCPNAND

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D RH210

RH210

1 2

0_0805_5%~D

@

BLM18PG181SN1_0603~D

1

CH31

CH31 10U_0805_4VAM~D

10U_0805_4VAM~D

2

CH34

1

22U_0805_6.3V6M~D

CH33

0.01U_0402_16V7K~D

RH205

@

22U_0805_6.3V6M~D

2

+3VS

+3V_PCH

LH1

1

2

+VCCP

placed internal

+3VS

12

LH2

0.1UH_MLF1608DR10KT_10%_1608

0.1uH inductor, 200mA

1

CH42

2

1U_0402_6.3V6K~D

+1.8VS

+3VS

+1.8VS

LH2

12

+VCCP

PCH Power Rail Table

Voltage Rail

V_PROC_IO

V5REF

V5REF_Sus

Vcc3_3

VccADAC

VccADPLLA

VccADPLLB

VccCore

VccDMI

Voltage

1.05

3.3

1.05

S0 Iccmax Current (A)

0.001

5

0.001

0.266

0.001

0.08

1.3

0.042

1.05VccIO 2.925

1.05VccASW 1.01

3.3VccSPI 0.02

3.3VccDSW 0.003

1.8 0.19VccpNAND

3.3VccRTC 6 uA

3.3VccSus3_3

3.3 / 1.5VccSusHDA

0.119

0.01

VccVRM 1.8 / 1.5 0. 16

1.05VccCLKDMI

0.02

VccSSC 1.05 0.095

V

ccDIFFCLKN 1.05 0.055

VccALVDS 3.3

0.001

1.8VccTX_LVDS 0.06

+1.5VS +VCCAFDI_VRM

VCCVRM = 1 60mA detal waiting f or newest spec

RH211

+VCCAFDI_VRM

12

0_0603_5%~D

@

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/12/20 2011/12/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PCH (6/8) PWR

LA-7451P

1

1.0

of

18 49Thursday, July 28, 2011

of

18 49Thursday, July 28, 2011

of

18 49Thursday, July 28, 2011

5

4

3

2

1

+VCCP

+3V_PCH

1 2

RH214 0_0603_5%~D

@

D D

+VCCP

C C

+3VS

RH216

@ RH216

@

+VCCAPLL_CPY +3VS_VCC_CLKF33

1 2

0_0805_5%~D

LH4

@LH4

@

10UH_LBR2012T100M_20%~D

1 2

10U_0805_10V4Z~D

@

1

+VCCP

CH49

2

+VCCP

1

CH48

0.1U_0402_10V7K~D

2

0.1U_0402_10V7K~D

5/18 delete RH229

LH5

10UH_LBR2012T100M_20%~D

+3VS_VCC_CLKF33_R

+VCCP

B B

A A

+VCCP

@

12

RH234 0_0603_5%~D

+VCCP

placed internal

+VCCP

+VCCA_DPLL_L

5

10UH_LBR2012T100M_20%~D

1 2

+1.05VM_VCCSUS

1

CH72

1U_0402_6.3V6K~D

2

placed internal

LH7

10UH_LBR2012T100M_20%~D

1 2

LH8

10UH_LBR2012T100M_20%~D

placed internal

+3VS_VCC_CLKF33

1

CH66

2

10U_0805_10V4Z~D

placed internal

+VCCDIFFCLK

+1.05VS_VCCDIFFCLKN

1

CH74

CH74 1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

1

CH77

CH77 1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

+V_CPU_IO

1

CH79

4.7U_0603_6.3V6K~D

2

1

+

CH86

2

1

CH67

2

1U_0402_6.3V6K~D

+1.05VS_VCCDIFFCLKN

+1.05VS_SSCVCC

1

CH78

0.1U_0402_10V7K~D

2

1

2

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

1

CH87

2

1U_0402_6.3V6K~D

220U_B2_2.5VM_R35M~D

@

RH213 0_0603_5%~D

CH51

@CH51

@

1

CH57

2

22U_0805_6.3V6M~D

1

CH60

2

1U_0402_6.3V6K~D

placed internal

1

CH71

0.1U_0402_10V7K~D

2

1

CH81

CH80

2

0.1U_0402_10V7K~D

1

+

CH88

CH89

2

220U_B2_2.5VM_R35M~D

12

1

2

1

CH58

2

22U_0805_6.3V6M~D

1

CH61

2

1U_0402_6.3V6K~D

+VCCRTCEXT

1

@

CH76

CH76 1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

+RTCVCC

1U_0402_6.3V6K~D

4

+VCCACLK

+VCCPDSW

+PCH_VCCDSW

+VCCAPLL_CPY_PCH

+VCCDPLL_CPY

+VCCSUS1

1

@

CH54

CH54 1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

+1.05VM_VCCASW

1

CH62

2

1U_0402_6.3V6K~D

+VCCAFDI_VRM

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

+VCCSST

+1.05VM_VCCSUS

1

CH82

2

0.1U_0402_10V7K~D

placed internal

UH1J

AD49

VCCACLK

T16

VCCDSW3_3

V12

DCPSUSBYP

T38

VCC3_3[5]

BH23

VCCAPLLDMI2

AL29

VCCIO[14]

AL24

DCPSUS[3]

AA19

VCCASW[1]

AA21

VCCASW[2]

AA24

VCCASW[3]

AA26

VCCASW[4]

AA27

VCCASW[5]

AA29

VCCASW[6]

AA31

VCCASW[7]

AC26

VCCASW[8]

AC27

VCCASW[9]

AC29

VCCASW[10]

AC31

VCCASW[11]

AD29

VCCASW[12]

AD31

VCCASW[13]

W21

VCCASW[14]

W23

VCCASW[15]

W24

VCCASW[16]

W26

VCCASW[17]

W29

VCCASW[18]

W31

VCCASW[19]

W33

VCCASW[20]

N16

DCPRTC

Y49

VCCVRM[4]

BD47

VCCADPLLA

BF47

VCCADPLLB

AF17

VCCIO[7]

AF33

VCCDIFFCLKN[1]

AF34

VCCDIFFCLKN[2]

AG34

VCCDIFFCLKN[3]

AG33

VCCSSC

V16

DCPSST

T17

DCPSUS[1]

V19

DCPSUS[2]

BJ8

V_PROC_IO

A22

VCCRTC

1

CH83

2

0.1U_0402_10V7K~D

CH84

1U_0402_6.3V6K~D

CougarPoint_Rev_1p0

POWER

N26

VCCIO[29]

P26

119mA

PCI/GPIO/LPCMISC

SATA USB

HDA

VCCSUS3_3[7]

VCCSUS3_3[8]

VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

1mA

VCCSUS3_3[1]

VCCSUS3_3[2]

VCCSUS3_3[3]

VCCSUS3_3[4]

VCCSUS3_3[5]

VCCAPLLSATA

10mA

VCCSUSHDA

3

VCCIO[30]

VCCIO[31]

VCCIO[32]

VCCIO[33]

VCCIO[34]

V5REF_SUS

DCPSUS[4]

V5REF

1mA

VCC3_3[1]

VCC3_3[8]

VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12]

VCCIO[13]

VCCIO[6]

VCCVRM[1]

VCCIO[2]

VCCIO[3]

VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

P28

T27

T29

T23

T24

V23

V24

P24

T26

M26

AN23

AN24

P34

N20

N22

P20

P22

AA16

W16

T34

AJ2

AF13

AH13

AH14

AF14

AK1

AF11

AC16

AC17

AD17

T21

V21

T19

P32

2010/12/20 2011/12/20

3mA

1010mA

Clock and Miscellaneous

80mA

55mA

95mA

1mA

CPURTC

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+1.05VS_VCCUSBCORE

1

CH50

CH50 1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

+3V_VCCPUSB

1

CH52

2

+1.05VS_VCCAUPLL

+PCH_V5REF_SUS

+VCCA_USBSUS

+3V_VCCPSUS_1

+PCH_V5REF_RUN

+3V_VCCPSUS

1

CH63

CH63 1U_0402_6.3V

1U_0402_6.3V

2

+3VS_VCCPPCI

+VCC3_3_2

+1.05VS_VCC_SATA

+VCCME_22

+VCCME_23

+VCCME_21

+VCCSUSHDA

1

CH850.1U_04 02_10V7K~D CH850.1U_0402_10V7K~D

2

Compal Secret Data

+VCCAFDI_VRM

placed internal

+3V_VCCAUBG

1

2

0.1U_0402_10V7K~D

+3VS_VCCPCORE

1

CH69

0.1U_0402_10V7K~D

2

+1.05VS_SATA3

+VCCSATAPLL

+1.05VS_VCC_SATA

placed internal

@

RH246

150_0402_1%~D

Deciphered Date

CH53

0.1U_0402_10V7K~D

1

CH59

2

0.1U_0402_10V7K~D

1

CH65

0.1U_0402_10V7K~D

2

+3VS

+1.05VS_SATA3

1

CH75

2

1U_0402_6.3V6K~D

RH244 0_0603_5%~D

RH245 180_0402_1%@RH245 180_0402_1%@

12

1

CH68

0.1U_0402_10V7K~D

2

1

2

placed internal

1 2

@

2

+VCCP

+3V_PCH

+VCCP

+3V_PCH

CH70

CH70 1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

+VCCP

12

VCC3_3 = 2 66mA detal waiting f or newest spec

VCCDMI = 4 2mA detal waiting fo r newest s pec

+3V_PCH

+VCCA_USBSUS

+3V_PCH

+3VS

+VCCP

LH6

@LH6

@

10UH_LBR2012T100M_20%~D

1 2

1

CH73

@CH73

@

10U_0805_10V4Z~D

2

+3V_PCH

100_0402_5%~D

1

CH55

2

@CH55

@

1U_0402_6.3V6K~D

100_0402_5%~D

+VCCSATAPLL_R

Place CH80 Near AK1 pin

If it support 3.3V audio signals POP:RH228 Depop RH233/RH234

If it support 1.5V audio signals POP:RH233/RH234 Depop R228

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

PCH (7/8) PWR

LA-7451P

RH222

RH227

+3V_PCH+5V_P CH

12

+3VS+5VS

12

1

21

DH2

DH2 RB751S40T1_SOD523-2~D

RB751S40T1_SOD523-2~D

+PCH_V5REF_SUS

1

CH56

0.1U_0603_25V7K

2

21

DH3

DH3 RB751S40T1_SOD523-2~D

RB751S40T1_SOD523-2~D

+PCH_V5REF_RUN

1

CH64

CH64 1U_0603_10V6K~D

1U_0603_10V6K~D

2

+VCCP

19 49Thursday, July 28, 2011

1.0

of

5

UH1H

AA17

AA33 AA34 AB11 AB14 AB39

AB43

AC19

AC2 AC21 AC24 AC33 AC34 AC48 AD10 AD11 AD12 AD13 AD19 AD24 AD26 AD27 AD33 AD34 AD36 AD37 AD38 AD39

AD4 AD40 AD42 AD43 AD45 AD46

AD8

AF10 AF12 AD14 AD16 AF16 AF19 AF24 AF26 AF27 AF29 AF31 AF38

AF42 AF46

AG19

AG2 AG31 AG48 AH11

AH3 AH36 AH39 AH40 AH42 AH46

AH7

AJ19 AJ21 AJ24 AJ33 AJ34

AK12

H5

AA2 AA3

AB4

AB5 AB7

AE2 AE3

AF4

AF5 AF7 AF8

AK3

UH1H

VSS[0]

VSS[1] VSS[2] VSS[3] VSS[4] VSS[5] VSS[6] VSS[7] VSS[8] VSS[9] VSS[10] VSS[11] VSS[12] VSS[13] VSS[14] VSS[15] VSS[16] VSS[17] VSS[18] VSS[19] VSS[20] VSS[21] VSS[22] VSS[23] VSS[24] VSS[25] VSS[26] VSS[27] VSS[28] VSS[29] VSS[30] VSS[31] VSS[32] VSS[33] VSS[34] VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40] VSS[41] VSS[42] VSS[43] VSS[44] VSS[45] VSS[46] VSS[47] VSS[48] VSS[49] VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61] VSS[62] VSS[63] VSS[64] VSS[65] VSS[66] VSS[67] VSS[68] VSS[69] VSS[70] VSS[71] VSS[72] VSS[73] VSS[74] VSS[75] VSS[76] VSS[77] VSS[78] VSS[79]

CougarPoint_Rev_1p0

D D

C C

B B

A A

4

AK38

VSS[80]

AK4

VSS[81]

AK42

VSS[82]

AK46

VSS[83]

AK8

VSS[84]

AL16

VSS[85]

AL17

VSS[86]

AL19

VSS[87]

AL2

VSS[88]

AL21

VSS[89]

AL23

VSS[90]

AL26

VSS[91]

AL27

VSS[92]

AL31

VSS[93]

AL33

VSS[94]

AL34

VSS[95]

AL48

VSS[96]

AM11

VSS[97]

AM14

VSS[98]

AM36

VSS[99]

AM39

VSS[100]

AM43

VSS[101]

AM45

VSS[102]

AM46

VSS[103]

AM7

VSS[104]

AN2

VSS[105]

AN29

VSS[106]

AN3

VSS[107]

AN31

VSS[108]

AP12

VSS[109]

AP19

VSS[110]

AP28

VSS[111]

AP30

VSS[112]

AP32

VSS[113]

AP38

VSS[114]

AP4

VSS[115]

AP42

VSS[116]

AP46

VSS[117]

AP8

VSS[118]

AR2

VSS[119]

AR48

VSS[120]

AT11

VSS[121]

AT13

VSS[122]

AT18

VSS[123]

AT22

VSS[124]

AT26

VSS[125]

AT28

VSS[126]

AT30

VSS[127]

AT32

VSS[128]

AT34

VSS[129]

AT39

VSS[130]

AT42

VSS[131]

AT46

VSS[132]

AT7

VSS[133]

AU24

VSS[134]

AU30

VSS[135]

AV16

VSS[136]

AV20

VSS[137]

AV24

VSS[138]

AV30

VSS[139]

AV38

VSS[140]

AV4

VSS[141]

AV43

VSS[142]

AV8

VSS[143]

AW14

VSS[144]

AW18

VSS[145]

AW2

VSS[146]

AW22

VSS[147]

AW26

VSS[148]

AW28

VSS[149]

AW32

VSS[150]

AW34

VSS[151]

AW36

VSS[152]

AW40

VSS[153]

AW48

VSS[154]

AV11

VSS[155]

AY12

VSS[156]

AY22

VSS[157]

AY28

VSS[158]

3

UH1I

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

VSS[164]

B19

VSS[165]

B23

VSS[166]

B27

VSS[167]

B31

VSS[168]

B35

VSS[169]

B39

VSS[170]

B7

VSS[171]

F45

VSS[172]

BB12

VSS[173]

BB16

VSS[174]

BB20

VSS[175]

BB22

VSS[176]

BB24

VSS[177]

BB28

VSS[178]

BB30

VSS[179]

BB38

VSS[180]

BB4

VSS[181]

BB46

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC26

VSS[187]

BC32

VSS[188]

BC34

VSS[189]

BC36

VSS[190]

BC40

VSS[191]

BC42

VSS[192]

BC48

VSS[193]

BD46

VSS[194]

BD5

VSS[195]

BE22

VSS[196]

BE26

VSS[197]

BE40

VSS[198]

BF10

VSS[199]

BF12

VSS[200]

BF16

VSS[201]

BF20

VSS[202]

BF22

VSS[203]

BF24

VSS[204]

BF26

VSS[205]

BF28

VSS[206]

BD3

VSS[207]

BF30

VSS[208]

BF38

VSS[209]

BF40

VSS[210]

BF8

VSS[211]

BG17

VSS[212]

BG21

VSS[213]

BG33

VSS[214]

BG44

VSS[215]

BG8

VSS[216]

BH11

VSS[217]

BH15

VSS[218]

BH17

VSS[219]

BH19

VSS[220]

H10

VSS[221]

BH27

VSS[222]

BH31

VSS[223]

BH33

VSS[224]

BH35

VSS[225]

BH39

VSS[226]

BH43

VSS[227]

BH7

VSS[228]

D3

VSS[229]

D12

VSS[230]

D16

VSS[231]

D18

VSS[232]

D22

VSS[233]

D24

VSS[234]

D26

VSS[235]

D30

VSS[236]

D32

VSS[237]

D34

VSS[238]

D38

VSS[239]

D42

VSS[240]

D8

VSS[241]

E18

VSS[242]

E26

VSS[243]

G18

VSS[244]

G20

VSS[245]

G26

VSS[246]

G28

VSS[247]

G36

VSS[248]

G48

VSS[249]

H12

VSS[250]

H18

VSS[251]

H22

VSS[252]

H24

VSS[253]

H26

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

F3

VSS[258]

CougarPoint_Rev_1p0

VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[328] VSS[329] VSS[330] VSS[331] VSS[333] VSS[334] VSS[335] VSS[337] VSS[338] VSS[340] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352]

2

H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/12/20 2011/12/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PCH (8/8) VSS

LA-7451P

1

1.0

of

20 49Thursday, July 28, 2011

of

20 49Thursday, July 28, 2011

of

20 49Thursday, July 28, 2011

5

4

3

2

1

LOGO Board CONN

+3VALW +3VS

1

C1732

0.1U_0402_16V7K~D

D D

C C

B B

A A

BKOFF#<26>

EC_INV_PWM<26>

LID_SW_IN#<14,26>

VGA_PWM<15>

0.1U_0402_16V7K~D

2

20mil

LID_SW_IN#

VGA_LVDDEN<15,26>

+3VS

VGA_LVDDEN

D69

BKOFF# DISPOFF#

2 1

CH751H-40PT_SOD323-2~D

1

IN1

2

IN2

SN74AHC1G08DCKR_SC70-5

+LCDVDD

1

CV367

2

5

JLID1

1

2

3

4

5

GND

6

GND

ACES_88514-0401

CONN@

SSM3K7002FU_SC70-3~D

+3VS +3VS

5

U54

P

4

O

G

3

0.1U_0402_16V7K~D

CV368

1

2

PWR BTN Board CONN

ON/OFFBTN#<24>

PWR_LED#<26>

+LCDVDD +5VALW

D

Q288

S

10K_0402_5%~D

12

R394

@ R394

@

10K_0402_5%~D

INV_PWM

10U_0805_10V4Z~D

CV369

1

2

R1847

R1847 100_0402_5%~D

100_0402_5%~D

1 2 13

G

R380

R395

10K_0402_5%~D

ON/OFFBTN#

PWR_LED# TP_CLK

R377

R377 47K_0402_5%

47K_0402_5%

1 2

R378

R378 56K_0402_5%

2

G

56K_0402_5%

13

D

Q290

S

BSS138_SOT23~D

2

12

+5VALW

12

1 2 3 4

5 6

0.47u_0402_6_3V_X5R

1

2

JBTN1

1 2 3 4

GND GND

ACES_88514-0401

CONN@

W=60mils

+3VS

G

2

1 3

C549

1

2

EN_INVPWR<26>

+LCDVDD

C1748

0.1U_0402_16V7K~D

EN_CAM<26>

4

S

AO3419L_SOT23-3

AO3419L_SOT23-3 Q289

Q289

4.11

D

+LCDVDD

C1869

4.7U_0805_10V4Z~D

2

1

2

KB_LED_PWM<26>

B+ +I NV_PWR_SRC

W=60mils

+LCDVDD

1

C551

0.1U_0402_16V7K~D

2

R2005

@R2005

@

0_0402_5%~D

+LCDVDD_R

12

R2006

R2006 0_0402_5%~D

0_0402_5%~D

12

@

SI2301CDS-T1-GE3_SOT23-3

S

G

12

R1653

R1653 100K_0402_5%~D

100K_0402_5%~D

13

D

Q42

Q42 SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

S

G

2

EN_CAM# control circuit

1

2

R1835 0_0805_5%~D@ R1835 0_0805_5%~D@

1000P_0402_50V7K~D

Q47

1 2

60mil

C1126

2

G

D

13

KB_LED_PWM

B+

R1242

100K_0402_5%~D

R1242

100K_0402_5%~D

12

PWR_SRC_ON

12

R1243

R1243 100K_0402_5%~D

100K_0402_5%~D

13

D

Q71

Q71 SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

S

+3VS_CAM+3VS

close to JTPMB 7/26

2

3

KB_LED_PWM#

13

D

Q72

2

G

SSM3K7002FU_SC70-3~D

S

60mil

R1948

0_0402_5%~D

@

KB_LED_DET

5P_0402_50V8C

5P_0402_50V8C @

12

R1655

R1656

R1656 200K_0402_5%

200K_0402_5%

@

1 2

0.1U_0402_16V7K~D

EN_KBLED<26>

C1133

@

1 2

C1132

1 2

1

CU63

CU63 680P_0402_50V7K~D

680P_0402_50V7K~D

2

2010/12/20 2011/12/20

KB_LED_DET<26>

Q70

Q70 SI3457BDV-T1-E3_TSOP6~D

SI3457BDV-T1-E3_TSOP6~D

+INV_PWR_SRC_R

D

6

S

4 5

2 1

G

1

3

C1127

0.1U_0603_50V_X7R

2

INV_PWM INV_PWM_R

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

1 2

100K_0402_5%~D

2

C1749

1

USB20_P3<16> USB20_N3<16>

Compal Secret Data

1

KB_LED_PWM#

+KB_LED

2

G

+INV_PWR_SRC

LVDS_A0-<15> LVDS_A0+<15>

LVDS_A1-<15> LVDS_A1+<15>

LVDS_A2-<15> LVDS_A2+<15>

LVDS_ACLK-<15> LVDS_ACLK+<15>

Deciphered Date

Touchpad CONN

TP_CLK TP_DATA

D70

D70 PESD5V0U2BT_SOT23-3~D

PESD5V0U2BT_SOT23-3~D

JKBBL1

1

2

3

4

5

7

5

G1

6

8

6

G2

ACES_51524-0060N-001

CONN@

Q48

DMIC_CLK<31>

S

G

LVDS_A0LVDS_A0+

LVDS_A1LVDS_A1+

LVDS_A2LVDS_A2+

LVDS_ACLKLVDS_ACLK+

2

Q48

D

13

0.1U_0402_16V7K~D

LVDS Conn.

SI2301CDS-T1-GE3_SOT23-3

12

R1654

R1654 100K_0402_5%~D

100K_0402_5%~D

13

D

Q44

Q44 SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

S

KB_LED control circuit

USB20_P3 USB20_N3

close to JLVDS

2

C605

0.1U_0402_16V7K~D

TP_DATA<26>

15

19

ACES_87242-3001-09

DMIC_CLK DMIC_CLK_R

TP_DATA

TP_CLK<26>

LIGHT_SENSOR<26>

+KB_LED+5VS

1

C552

2

JLVDS1

2

112

4

334

6

556

8

778

10

9910

12

111112

14

131314

16

15

16

18

171718

20

19

20

22

212122

24

232324

26

252526

28

272728

30

292930

32

GND31GND

CONN@

L49

L49 FBMA-L10-160808-301LMT 0603

FBMA-L10-160808-301LMT 0603

1 2

Title

Size Document Number Rev

Date: Sheet

JTPMB1

1

2

3

4

5

GND

6

GND

ACES_88514-0401

CONN@

+3VS

LIGHT_SENSOR

+INV_PWR_SRC +INV_PWR_SRC INV_PWM_R DISPOFF#

ACES_87213-0700G

EDID_CLK_LCD EDID_DATA_LCD

LCD_TEST INV_PWM_R DISPOFF# CAM_DET# DMIC_CLK_R

DMIC0

+3VS_CAM +3VS

DMIC0

1

CU64

@CU64

@

470P_0402_50V7K~D

2

Compal Electronics, Inc.

VGA / LVDS /camera conn.

LA-7451P

JALS1

1

2

3

4

GND

5

GND

ACES_87213-0300G

@CONN

JCONV1

1

2

3

4

5

6

8

6

G8

7

9

7

G9

CONN@

R379 0_0402_5%~D

12

R1836 0_0402_5%~D

@

CAM_DET# <14>

DMIC0 <31>

+LCDVDD

+INV_PWR_SRC

DMIC_CLK_R

1

LVDS_DDC_CLK <15>

12

W=60mils

2

3

1

LVDS_DDC_DATA <15>

LCD_TEST <26>

D78

D78 PESD5V0U2BT_SOT23-3~D

PESD5V0U2BT_SOT23-3~D

21 49Thursday, July 28, 2011

of

1.0

5

PCIE_PRX_GLANTX_P3_C

PCIE_PRX_GLANTX_P3<14>

PCIE_PRX_GLANTX_N3<14>

PCIE_PTX_GLANRX_P3<14>

PCIE_PTX_GLANRX_N3<14>

CLK_PCIE_LAN<14>

CLK_PCIE_LAN#<14>

LANCLK_REQ#<14>

D D

25MHz_12P_X5H025000FC1H-H

PLT_RST#<6,16,26,27,30,33>

PCIE_WAKE#<15,26,27>

YL1

1 2

1

CL18

CL18 15P_0402_50V8J~D

15P_0402_50V8J~D

2

RL15

@

0_0402_5%~D

1 2

LAN_X2

1

CL19

CL19 15P_0402_50V8J~D

15P_0402_50V8J~D

2

12

CL2 0.1U_0402_16V7K~DCL2 0.1U_0402_16V7K~D

12

CL1 0.1U_0402_16V7K~DCL1 0.1U_0402_16V7K~D

@

12

RL12 0_0402_5%~D

1 @

@

C289

2

100P_0402_50V8J~D

1 2

PCIE_PRX_GLANTX_N3_C

PCIE_PTX_GLANRX_N3

CLK_PCIE_LAN

CLK_PCIE_LAN#

CLKREQ_LAN#_R

PLT_RST#

PCIE_WAKE#

LAN_ACTIVITY

RL16

5.1K_0402_1%~D

Version A will be fail on 802.3a need to update to Version B

LAN_X1 LAN_X2_R

30

29

35

36

33

32

4

2

3

25 26

28 27 41

7 8

38 39 23

UL1

TX_P

TX_N

RX_P

RX_N

REFCLK_P

REFCLK_N

CLKREQ#

PERST#

WAKE#

SMCLK SMDATA

TEST_RST TESTMODE GND

XTLO XTLI

LED_0 LED_1 LED_2

AR8151-BL1A

4

Atheros

Atheros AR8151 AL1A

AR8151 AL1A

TRXP0 TRXN0 TRXP1 TRXN1 TRXP2 TRXN2 TRXP3 TRXN3

AVDDL AVDDL AVDDL AVDDL

AVDDL_REG

AVDDH AVDDH

AVDDH_REG

DVDDL

DVDDL_REG

VDD33

VDDCT

RBIAS

3

LAN_MDIP0 LAN_MDIN0 LAN_MDIP1 LAN_MDIN1 LAN_MDIP2PCIE_PTX_GLANRX_P3 LAN_MDIN2 LAN_MDIP3 LAN_MDIN3

+AVDDH

+DVDDL

W=40mils

+LX

+RBIAS

1 2

RL14

2.37K_0402_1%~D

RL2 49. 9_0402_1%RL2 49.9_0402_1% RL1 49. 9_0402_1%RL1 49.9_0402_1% RL3 49. 9_0402_1%RL3 49.9_0402_1% RL4 49. 9_0402_1%RL4 49.9_0402_1% RL5 49. 9_0402_1%RL5 49.9_0402_1% RL7 49. 9_0402_1%RL7 49.9_0402_1% RL8 49. 9_0402_1%RL8 49.9_0402_1% RL9 49. 9_0402_1%RL9 49.9_0402_1%

+LAN_IO

+VDDCT

12 12 12 12 12 12 12 12

11 12 14 15 17 18 20 21

13 19 31 34 6

16 22 9

24 37

1

40

LX

5

10

+LAN0

CL3 1000P_0402_50V7K~DCL3 1000P_0402_50V7K~D

1 2

CL4 0.1U_0402_16V7K~DCL4 0.1U_0402_16V7K~D

1 2

+LAN1

CL5 1000P_0402_50V7K~DCL5 1000P_0402_50V7K~D

1 2

CL6 0.1U_0402_16V7K~DCL6 0.1U_0402_16V7K~D

1 2

+LAN2

CL7 1000P_0402_50V7K~DCL7 1000P_0402_50V7K~D

1 2

CL8 0.1U_0402_16V7K~DCL8 0.1U_0402_16V7K~D

1 2

+LAN3

CL9 1000P_0402_50V7K~DCL9 1000P_0402_50V7K~D

1 2

CL10 0.1U_0402_16V7K~DCL10 0.1U_0402_16V7K~D

1 2

close to Lan chip 1000p reserved for EMI

2.2UH +-20% 1225AS-H-2R2M-P2 1.3A

LL1

+LX

W=40mils

LL1

+VDDCT

1 2

CL11

close to Lan pin40

1

CL12

2

1000P_0402_50V7K~D

W=40mils

CL13

10U_0603_6.3V6M~D

1

CL14

2

0.1U_0402_16V7K~D

close to Lan pin5

PLT_RST#

PCIE_WAKE#+AVDDL

2

1 2

CLKREQ_LAN#_R

+LAN_IO

12

RL6

@

0_0402_5%~D

4.7K_0402_5%~D@

RL10

4.7K_0402_5%~D@

RL11

1 2

RL13

0_0402_5%~D

4.7K_0402_5%~D

+LAN_IO

1

W=20mils

+DVDDL

1

CL15

0.1U_0402_16V7K~D

CL16

2

1U_0603_10V6K~D

1

CL17

2

0.1U_0402_16V7K~D

close to Lan pin24close to Lan pin37

W=40mils

C C

1U_0402_6.3V6K~D

B+_BIAS

+3VALW

RL28

10K_0402_5%~D

EN_WOL#<26>

MURATA_BLM18AG601SN1D_0603

B B

close to LL2

1 2

13

D

2

G

S

LL2

12

1

CL40

2

+3VALW

1

CL20

2

RL18

RL18 470K_0402_5%~D

470K_0402_5%~D

EN_WOL

QL2

QL2 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

+VDDCT_L+VDDCT

LAN_MDIP3 LAN_MDIN3

LAN_MDIP2 LAN_MDIN2

LAN_MDIP1 LAN_MDIN1

LAN_MDIP0 LAN_MDIN0

TIMAG: S X'FORM_ IH-160 LAN , SP050006F00

BOTHHAND: S X'FORM_ GST5009-D LF LAN,SP050006B00

1

CL42

2

1U_0603_10V6K~D

10 11 12

0.1U_0402_16V7K~D

QL1

D

6

2 1

FDC655BN 1N SSOT-6

G

3

RL19

1 2

TS1

1

TCT1

MCT1

2

TD1+

3

TD1-

4

TCT2

MCT2

5

TD2+

6

TD2-

7

TCT3

MCT3

8

TD3+

9

TD3-

TCT4

MCT4 TD4+ TD4-

350UH_GST5009-CLF

1

CL44

2

0.1U_0402_16V7K~D

MX1+

MX1-

MX2+

MX2-

MX3+

MX3-

MX4+

MX4-

S

45

1.5M_0402_5%~D

+LAN_IO_R

24 23 22

21 20 19

18 17 16

15 14 13

RJ45_CT3 RJ45_MDI3+ RJ45_MDI3-

RJ45_CT2 RJ45_MDI2+ RJ45_MDI2-

RJ45_CT1 RJ45_MDI1+ RJ45_MDI1-

RJ45_CT0 RJ45_MDI0+ RJ45_MDI0-

1

CL46

2

0.1U_0402_16V7K~D

1

2

close to TS1

A A

CL36

0.1U_0402_25V6

1

CL48

2

W=40mils

CL31

1 2

75_0402_1%~D

1 2

75_0402_1%~D

1 2

75_0402_1%~D

1 2

75_0402_1%~D

0.1U_0402_16V7K~D

+LAN_IO

RL21

RL22

RL23

RL24

1

CL32

2

1000P_0402_50V7K~D

close to Pin 1

1A

1

CL33

2

0.1U_0402_16V7K~D

2

CL39

CL39 1000P_1808_3KV7K~D

1000P_1808_3KV7K~D

1

W=20mils

1

CL34

2

1U_0603_10V6K~D

1

CL35

2

10U_0603_6.3V6M~D

+AVDDH +AVDDL

1

CL21

2

close to Lan pin16close to Lan pin9

CL22

1U_0603_10V6K~D

2

0.1U_0402_16V7K~D

1

CL23

CL22

1

CL24

2

0.1U_0402_16V7K~D

close to Lan pin6 close to Lan pin31

1

CL25

CL26

2

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D 1U_0603_10V6K~D

1U_0603_10V6K~D

close to Lan pin22

RJ45_MDI3-

RJ45_MDI3+

RJ45_MDI1-

RJ45_MDI2-

RJ45_MDI2+

RJ45_MDI1+

RJ45_MDI0-

RJ45_MDI0+

W=20mils

1

CL27

2

0.1U_0402_16V7K~D

close to Lan pin34

JLAN1

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

PS_HPKR0125-08A1A0R

CONN@

1

CL28

2

close to Lan pin19

1

CL30

CL29

2

0.1U_0402_16V7K~D

close to Lan pin13

SHLD1

SHLD2

1

2

0.1U_0402_16V7K~D

10

9

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2010/12/20 2011/12/20

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

GLAN AR8151 AL1A/ RJ45

LA-7451P

1

22 49Thursday, July 28, 2011

of

1.0

A

1 1

B

C

D

E

F

SATA_PTX_DRX_P1_C<13>

SATA_PTX_DRX_N1_C<13>

SATA_PRX_DTX_N1<13> SATA_PRX_DTX_P1<13>

HDD_DETECT#<17>

G

SATA_PTX_DRX_P1_C SATA_PTX_DRX_N1_C

SATA_PRX_DTX_N1 SATA_PRX_DTX_P1

HDD_DETECT#

+5VS +3VS

FFS_INT2_CONN

H

JHDD1

1

2

3

4

5

6

7

8

9

10

11

12

13

GND1

14

GND2

FCI_100897 09-012010 LF~D

CONN@

Free Fall Sensor

FFS_INT1 connect to PCH GPIO & EC discuss with BIOS to use which pin

2 2

PCH_SMBDATA<11,12,14>

PCH_SMBCLK<11,12,1 4>

+3VS

G

2

FFS_INT2 FFS_INT2_CO NN

S

Q23

SSM3K7002FU_S C70-3~D

3 3

C189

FFS_INT1<16> FFS_INT2<17>

13

D

SDM10U45-7_SOD5 23-2~D

+3VS

0.1U_0402_16V7K~D

10U_0805_10V4Z~D

C190

1

2

U19

DE351DLTR

1

VDD_IO

GND

VDD

GND GND

INT 1 INT 29GND

SDO SDA / SDI / SDO SCL / SPC

RSVD

CS

RSVD

DE351DLTR_LGA14 _3X5

2 4 5 10

+3VS

3 11

1U_0402_6.3 V6K~D

B+_BIAS

2

ODD_EN#<1 7>

G

6

FFS_INT1

8

FFS_INT2

12 13 14

7

+5VS

12

R159

@R159

@

100K_0402 _5%~D

21

D24

CS41

RS26

RS26 470K_0402 _5%~D

470K_0402 _5%~D

1 2

13

D

QS2

QS2 SSM3K7002FU_S C70-3

SSM3K7002FU_S C70-3

S

+5VS

1

2

ODD_EN

USB20_N1<16> USB20_P1<16 >

USB20_N1 USB20_P1

6

2 1

+5VALW

CI5

QS1

D

FDC655BN 1N SSOT-6

G

3

RS27

1 2

1

2

S

45

1.5M_0402_5%~D

SATA_PRX_DTX_N2<13>

SATA_PRX_DTX_P2<13>

USB20_N1 USB20_P1

1 2

RI7 0_0402_ 5%

112

4

WCM2012F2 S-900T04_08 05

1 2

RI6 0_0402_ 5%

0.1U_0402_16V7K

1

CS46

2

@

LI8

@

USB_PWR_EN#<26,30>

0.1U_0402_25V6

SATA_PRX_DTX_N2 SATA_PRX_DTX_P2

ODD_DETECT#<17>

ODD_DA#<16>

2

3

80 mils

+5VS_ODD

USB CONN

+USB_VCCA

150U_B2_6.3VM_R35M

1

+

CI2

2

USB20_N1_R USB20_P1_R

2

3

DL1

DL1 PESD5V0U2BT_SOT23-3~D

PESD5V0U2BT_SOT23-3~D

1

(For ESD request)

2.0A

UI13

1

GND

2

IN

3

EN1#

4

EN2#

TPS2062ADR_SO8~D

SA00002AS0L

CIS LINK OK

RS34

1 2

+5VS +5 VS_ODD

0_1206_5% ~D

@

SATA_PTX_DRX_P2_RP<13>

SATA_PTX_DRX_N2_RP<13>

CS44 0.01U_0402_ 16V7K~DCS44 0.01U_0402 _16V7K~D

1 2

CS45 0.01U_0402_ 16V7K~DCS45 0.01U_0402 _16V7K~D

1 2

RS28

@RS28

@

0_0402_5% ~D

1 2

@

0_0402_5% ~D

1 2

RS29

W=80mils

0.1U_0402_16V4Z

1

CI3

2

OC1# OUT1 OUT2 OC2#

SATA_PTX_DRX_P2_RP SATA_PTX_DRX_N2_RP

SATA_PRX_DTX_N2_C SATA_PRX_DTX_P2_C

ODD_DETECT#_R

ODD_DA#_R

80 mils

+USB_VCCA

8 7 6 5

+5VS_ODD

JUSB1

1

2

3

4

5

GND

6

GND

7

GND

8

GND

OCTEK_USB-04APEB

CONN@

USB_OC2#

+5VS_ODD

USB_OC2# <1 6>

+5VS_ODD

1000P_040 2_50V7K~D

1 2 3 4 5 6 7

8

9 10 11 12 13

ALLTO_C18512-1 1305-L

CONN@

Placea caps. near ODD CONN.

0.1U_0402_1 6V7K~D

1

CS37

CS38

2

1U_0402_6.3 V6K~D

JODD1

GND A+ A-

SATA ODD Conn.

GND BB+ GND

DP V5 V5 MD

14

GND

15

GND

1

2

CS39

10U_0805_10 V4Z~D

1

CS40

2

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPART MENT EXCE PT AS AUT HORIZE D BY COMPA L ELECT RONICS , INC. NEITHE R THIS SHE ET NOR T HE INFORMA TION IT C ONTAINS

DEPART MENT EXCE PT AS AUT HORIZE D BY COMPA L ELECT RONICS , INC. NEITHE R THIS SHE ET NOR T HE INFORMA TION IT C ONTAINS

DEPART MENT EXCE PT AS AUT HORIZE D BY COMPA L ELECT RONICS , INC. NEITHE R THIS SHE ET NOR T HE INFORMA TION IT C ONTAINS MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

A

B

C

D

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

E

Compal Secret Data

2010/12/20 2011/12/20

Deciphered Date

F

Compal Electronics, Inc.

Title

FFS /HDD /ODD /USB Connector

Size Document Number Rev

LA-7451P

Date: Sheet

G

of

23 51Thursday, July 28, 2 011

H

1.0

A

B

C

D

E

ON/OFF switch

1 1

2 2

3 3

4 4

TOP Side

Bottom Side

Test Only

FD1

FIDUCIAL_C40 M80

H63

H_3P5

H41

H_2P3N

H36

H_3P3

H39

H_2P8

H38

H_3P3

1

@

H_3P3

H_2P8

H_3P3

FIDUCIAL_C40 M80

H64

H_3P5

1

H42

H_2P3N

@

1

H37

@

1

H40

H_2P8

@

1

H32

H_3P3

@

1

A

@

H58

H33

FD2

@

1

@

1

Power Button

ON/OFFBT N#

1

C326

0.1U_040 2_25V6

2

ON/OFFBT N# <21>

EC_ON<26,4 4>

@

1

FIDUCIAL_C40 M80

H43

H_2P3

@

1

H44

H_2P0X2 P5N

H59

H60

H_2P8

@

1

FD3

@

1

H61

H_2P8

3

EC_ON

10K_040 2_5%~D

@

1

@

1

2

D28

D28 PESD24V S2UT_SOT23-3~ D

PESD24V S2UT_SOT23-3~ D

1

R264

1 2

FD4

@

1

FIDUCIAL_C40 M80

D27

ZZZ

PCB-MB

2

3

2

G

B

1

DAN202U T106_SC70-3

+3VALW

R263

100K_04 02_5%~D

1 2

13

D

SSM3K70 02F_SC59-3

S

Q24

C1918 100P _0402_50V8J~ D

1 2

C306 100P_0 402_50V8J~D

1 2

C304 100P_0 402_50V8J~D

1 2

C312 100P_0 402_50V8J~D

1 2

C308 100P_0 402_50V8J~D

1 2

C328 100P_0 402_50V8J~D

1 2

C327 100P_0 402_50V8J~D

1 2

C314 100P_0 402_50V8J~D

1 2

C316 100P_0 402_50V8J~D

1 2

C318 100P_0 402_50V8J~D

1 2

C320 100P_0 402_50V8J~D

1 2

C322 100P_0 402_50V8J~D

1 2

C324 100P_0 402_50V8J~D

1 2

+5VS

SI2301CDS -T1-GE3_SOT23-3

12

R1657

R1657 100K_04 02_5%~D

100K_04 02_5%~D

13

D

2

G

Q45

Q45 SSM3K70 02F_SC59-3

SSM3K70 02F_SC59-3

S

ON/OFF# < 26>

51ON# <42 >

KSI[0..7]

KSO[0..16]

KSI[0..7] <26>

KSO[0..16] <26>

0.1U_040 2_16V7K~D

CAPS_LE D#<2 6>

C1750

KSO15

KSO14

KSO13

KSO12

KSI0

KSO11

KSO10

KSI1

KSI2

KSO9

KSI3

KSO8

2

1

KB_LED control circuit

Security Class ification

2010/12/ 20 2011/12/ 20

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/12/ 20 2011/12/ 20

C

Compal Secret Data

Deciphered Date

KB_DET#KSO16

KSO7

KSO6

KSO5

KSO4

KSO3

KSI4

KSO2

KSO1

KSO0

KSI5

KSI6

KSI7

INT_KBD Conn.

Q49

D

13

KB_DET#<14 >

D

1

2

KB detect pin

G

2

C434 100P_0 402_50V8J~D

1 2

C310 100P_0 402_50V8J~D

1 2

C305 100P_0 402_50V8J~D

1 2

C307 100P_0 402_50V8J~D

1 2

C309 100P_0 402_50V8J~D

1 2

C311 100P_0 402_50V8J~D

1 2

C313 100P_0 402_50V8J~D

1 2

C315 100P_0 402_50V8J~D

1 2

C317 100P_0 402_50V8J~D

1 2

C319 100P_0 402_50V8J~D

1 2

C321 100P_0 402_50V8J~D

1 2

C323 100P_0 402_50V8J~D

1 2

C325 100P_0 402_50V8J~D

1 2

CAPS_LE D

C553

0.1U_040 2_16V7K~D

KB_DET#

Title

Size Do cument Number Rev

Date: Sheet

JKB1

1

2

3

4

5

6

KSO10 KSO11 KSO9 KSO14 KSO13 KSO15 KSO16 KSO12 KSO0 KSO2 KSO1 KSO3 KSO8 KSO6 KSO7 KSO4 KSO5 KSI0 KSI3 KSI1 KSI5 KSI2 KSI4 KSI6 KSI7

Compal Electronics, Inc.

PWRBTN/SCREWH/KB

LA-7451P

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

GND1

34

GND2

JOINT_F10 19WRS32PN LNG1T00L

CONN@

E

1.0

of

24 51Thursday, July 28, 2011

of

24 51Thursday, July 28, 2011

of

24 51Thursday, July 28, 2011

5

4

3

2

1

+FAN_POWER

40mil

D D

2.2U_0603_6.3V6K~D

EN_DFAN1<26>

C C

1

2

C1923

1

2

1000P_0402_50V7K

EN_DFAN1

FAN Control circuit

C1083

+5VS

C1924

1 2

2.2U_0603_6.3V6K~D

U30

1

VEN

2

VIN

3

VO

4

VSET

APE8873M SO 8P

GND GND GND GND

SYSTEM_FAN_FB<26>

8 7 6 5

+3VS

12

R939

R939 10K_0402_5%

10K_0402_5%

1

C1091

0.01U_0402_16V7K

2

+FAN_POWER

40mil

JFAN1

1

2

3

4

GND

5

GND

ACES_85204-0300N

CONN@

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/12/20 2011/12/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

FAN Controller

LA-7451P

1

1.0

of

25 51Thursday, July 28, 2011

of

25 51Thursday, July 28, 2011

of

25 51Thursday, July 28, 2011

5

4

3

2

1

+3VALW

@

1 2

R216

+3VS

D D

PLT_RST#<6,16,22,27,30,33>

+3VALW

C C

+3VS

B B

1 2

R244 2.2K_0402_5%~D R244 2.2K_0402_5%~D

1 2

R247 2.2K_0402_5%~D R247 2.2K_0402_5%~D

VR_HOT#<48,49>

H_PROCHOT#<6>

A A

1 2

R217 10K_0402_5%~DR217 10K_0402_5%~D

1 2

R218 10K_0402_5%~D

KB_RST#<17>

C284

22P_0402_50V8J~D@

12

CLK_PCI_LPC<16>

R221 47K_0402_5%

+3VALW

C285 0.1U_0402_16V7K~D

EC_SMB_CK1

1 2

R229 2.2K_0402_5%~D R229 2.2K_0402_5%~D

R230 2.2K_0402_5%~D R230 2.2K_0402_5%~D

R239 1K_0402_1%~D

R1952 10K_0402_5%~DR1952 10K_0402_5%~D

R2019 10K_0402_5%~DR2019 10K_0402_5%~D

EC_SMB_DA1

1 2

EC_SMI#

@

1 2

LID_SW_IN#

1 2

PCIE_WAKE#_R

1 2

PCIE_WAKE#<15,22,27>

USB_PCIE_WAKE#<30>

EC_SMB_CK2

EC_SMB_DA2

R265

R265 0_0402_5%~D

0_0402_5%~D

@

1 2

H_PROCHOT# H_PROCHOT#_EC

SN74LVC1G06DCKR_SC70-5

1

2

C1944

C1944 47P_0402_50V

47P_0402_50V

5

Y4A

R216 0_0805_5%~D

0_0805_5%~D

BKOFF#

EC_SCI#

KB_RST#

@

R226 33_0402_5%

12

PCH_SMLCLK<14,35> PCH_SMLDATA<14,35>

PM_SLP_S3#<15> PM_SLP_S5#<15>

R1944

12

0_0402_5%~D

@

SUSCLK_R<15>

+3VS

1

C1943

0.1U_0402_16V7K~D

2

5

U635

P

2

G3NC

1

0.1U_0402_16V7K~D

12

R2020

0_0402_5%~D

@

R1999

R1999 100K_0402_5%~D

100K_0402_5%~D

1 2

C297

1 2

R258 0_0402_5%~D

1 2

@

R259 0_0402_5%~D

1 2

@

R260 0_0402_5%~D

@

0.1U_0402_16V7K~D

1

C276

C277

2

0.1U_0402_16V7K~D

GATEA20<17>

1

@

SERIRQ<13>

C291

LPC_FRAME#<13>

PCH_DPWROK<15>

EC_SMB_CK1<49> EC_SMB_DA1<49>

R245 0_0402_5%~D@R245 0_0402_5%~D@

1 2

R246 0_0402_5%~D@R246 0_0402_5%~D@

1 2

R249 0_0402_5%~D@R249 0_0402_5%~D@

1 2

R250 0_0402_5%~D@R250 0_0402_5%~D@

1 2

EC_INV_PWM<21>

SYSTEM_FAN_FB<25>

EC_TX<27> EC_RX<27>

EC_EAPD#<31>

PWR_LED#<21> USB_30_EN#<30>

1 2

@

20mils

PLT_RST#PLT_RST#

EC_SCI#< 17> EN_CAM< 21>

EC_SMI#<17>

PS_ID<42>

SPI_FSEL#F SEL#

SPI_CLK_RSPI_CLK

LPC_AD3<13> LPC_AD2<13> LPC_AD1<13> LPC_AD0<13>

T83PAD~D @T83PAD~D @

2

100P_0402_50V8J~D

DRAMRST_CNTRL_EC<7> VGA_LVDDEN<15,21>

12

R253 0_0402_5%~D

+3VALW

1

2

0.1U_0402_16V7K~D

1

C278

2

0.1U_0402_16V7K~D

GATEA20

CLK_PCI_LPC

EC_RST# EC_SCI# EN_CAM

PCH_DPWROK

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

PM_SLP_S3#_R PM_SLP_S5#_R EC_SMI# PS_ID

DRAMRST_CNTRL_EC

VGA_LVDDEN

SYSTEM_FAN_FB PCIE_WAKE#_R EC_TX EC_RX EC_EAPD# PWR_LED# USB_30_EN#

EC_CRY2

R1979

R1979 100K_0402_5%~D

100K_0402_5%~D

1 2

SPI ROM

U36

8

VCC

3

W

7

HOLD

1

S

6

C

5

D

MX25L1005AMC-12G SOP 8P

1

C279

2

1000P_0402_50V7K~D

SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16

EC_CRY1

256KB

4

VSS

2

Q

4

2

C281

C280

1000P_0402_50V7K~D

1

U34

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

10

LAD0

12

PCICLK

13

PCIRST#/GPIO05

37

ECRST#

20

SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

SCL1/GPIO44

78

SDA1/GPIO45

79

SCL2/GPIO46

80

SDA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

LID_SW#/GPIO0A

17

SUSP#/GPIO0B

18

PBTN_OUT#/GPIO0C

19

EC_PME#/GPIO0D

25

EC_THERM#/GPIO11

28

FAN_SPEED1/FANFB1/GPIO14

29

FANFB2/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

PWR_LED#/GPIO19

36

NUMLED#/GPIO1A

122

XCLK1

123

XCLK0

1

C1947

C1947 20P_0402_50V8J~D

20P_0402_50V8J~D

2

SP07000F500 S SOCKET WIESON G6179-100000 8P SPIFLASH WIESO_G6179-100000_8P

SPI_CLK_R

Reserve for EMI please close to U36

1 2

R261 0_0402_5%~D

@

+3VALW_EC

LPC & MISC

Int. K/B

Int. K/B Matrix

Matrix

EC test PSID

L43

L43 FBMA-L11-160808-800LMT_0603

FBMA-L11-160808-800LMT_0603

1 2

9

22

33

96

111

125

VCC

PWM Output

AD Input

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPIO

SM Bus

GPO

GPIO

GPI

GND

11

24

35

94

113

@

R257

12

22P_0402_50V8J~D

33_0402_5%

FRD#SPI_SOSPI_FWR#FWR#

+EC_VCCA

1

2

ECAGND

67

AVCC

INVT_PWM/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ACOFF/FANPWM2/GPIO13

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

AD3/GPIO3B AD4/GPIO42

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C EN_DFAN1/DA1/GPIO3D

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C

PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICLK/GPIO58

SPICS#

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXO03

EC_LID_OUT#/GPXO04

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

GPXO10 GPXO11

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

AGND

KB930QF A1 LQFP 128P

69

20mil

L44

ECAGND

FBMA-L11-160808-800LMT_0603

@

C296

1 2

C282

0.1U_0402_16V7K~D

21 23 26 27

63 64 65 66 75 76

68 70 71 72

83 84 85 86 87 88

97 98 99 109

119 120 126 128

73 74 89 90 91 92 93 95 121 127

100 101 102 103 104 105 106 107 108

110 112 114 115 116 117 118

124

V18R

12

3

KSI[0..7]

KSO[0..16]

KB_LED_PWM BEEP#

ACOFF

EC_BATT_PRS

LIGHT_SENSOR ADP_I AD_BID0 KB_LED_DET

SUSACK#

EN_KBLED EN_DFAN1 IREF CHGVADJ

USB_PWR_EN# AC_PRESENT PCH_PWROK TP_CLK TP_DATA

EN_INVPWR EN_WOL# HDA_SDO

R234 33_0402_5%

R_SPI_CLK

R237 33_0402_5%

ENBKL PECI_KB930 FSTCHG BATT_CHG_LED# CAPS_LED# LCD_TEST BATT_LOW_LED# SYSON VR_ON PM_SLP_S4#

PCH_RSMRST# EC_LID_OUT#

H_PROCHOT#_EC

BKOFF# CPU1.5V_S3_GATE PCH_APWROK SA_PGOOD

ACIN EC_ON ON/OFF# LID_SW_IN# SUSP# PBTN_OUT# PECI_KB9012

+V18R

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

KSI[0..7] <24>

KSO[0..16] <24>

KB_LED_PWM <21>

BEEP# <31>

VGATE <6,15,48>

ACOFF <43>

ADP_I <43,49>

KB_LED_DET <21> SUSACK# <15>

EN_KBLED <21> EN_DFAN1 <25>

IREF <43>

CHGVADJ <43>

USB_PWR_EN# <23,30> AC_PRESENT <15> PCH_PWROK <6,15> TP_CLK <21> TP_DATA <21>

EN_INVPWR <21>

EN_WOL# <22> HDA_SDO <13>

1 2

R236 33_0402_5%

1 2

1

C293

4.7U_0805_10V4Z~D

2

Issued Date

ENBKL <15>

FSTCHG <43> BATT_CHG_LED# <27> CAPS_LED# <24> LCD_TEST <21>

BATT_LOW_LED# <27> SYSON <28,45> VR_ON <48>

PM_SLP_S4# <15>

EC_LID_OUT# < 14>

BKOFF# <21> CPU1.5V_S3_GATE <10>

PCH_APWROK <15>

SA_PGOOD <47>

EC_ON <24,44> ON/OFF# <24> LID_SW_IN# <14,21>

SUSP# <10,28,46> PBTN_OUT# <6,15>

ECAGND

12

C286 100P_0402_50V8J~D

EC_BATT_PRS <49>

LIGHT_SENSOR <21>

EC_MUTE#

FRD# FWR# SPI_CLK FSEL#

1 2

R240 43_0402_1%

1

@

C292

2

100P_0402_50V8J~D

12

C550 100P_0402_50V8J~D

1 2

R1943 43_0402_1%

2010/12/20 2011/12/20

EC_MUTE# <31>

Please place R240 close

o EC with in 750mil

t

PCH_RSMRST# <15>

ACIN <34,43>

@

H_PECI

Compal Secret Data

Deciphered Date

H_PECI <6,17>

2

Board ID

+3VALW

R219

R219 100K_0402_5%~D

100K_0402_5%~D

Ra

1 2

AD_BID0

12

R225

200K_0402_5%~D

Rb

@

0.1U_0402_16V7K~D

Analog Board ID definition,

lease see page 4.

P

TP_CLK

TP_DATA

LIGHT_SENSOR

12

R2

120K_0402_1%

EC_MUTE#

1 2

R233 10K_0402_5%~D

@

CH100

R_SPI_CLK

CH100

@

10P_0402_50V8J~D

12

Reserve for RF please close to U34

Title

EC ENE-KB930/ ENE3810

Size Document Number Rev

LA-7451P

Date: Sheet

1

C283

2

+3VS

12

R2234.7K_0402_5%~D R2234.7K_0402_5%~D

12

R2244.7K_0402_5%~D R2244.7K_0402_5%~D

1

C295

1U_0402_6V7K~D

2

Compal Electronics, Inc.

26 51Thursday, July 28, 2011

1

26 51Thursday, July 28, 2011

1.0

of

A

JMIN1

@

PCIE_WAKE#<15,22,26>

COEX1 BT_ACTIVE

MINI1CLK_REQ#<14>

CLK_PCIE_MINI1#<14> CLK_PCIE_MINI1<14>

BT_RADIO_DIS#<16>

PCIE_PRX_WLANTX_N1<14> PCIE_PRX_WLANTX_P1<14>

1 1

EC_TX<26> EC_RX<26>

2 2

PCIE_WAKE#

BT_RADIO_DIS# MINI1CLK_REQ#

CLK_PCIE_MINI1# CLK_PCIE_MINI1

PCIE_PRX_WLANTX_N1 PCIE_PRX_WLANTX_P1

PCIE_PTX_WLANRX_N1<14> PCIE_PTX_WLANRX_P1<14>

+3VS

EC_TX

R14 0_0402_5%~D

1 2

EC_RX

R15 0_0402_5%~D

1 2

BT_RADIO_DIS#

1 2 1 2

@

@ @

@

R18 100K_0402_5%R18 100K_0402_5%

1K_0402_5%

@

R1 0_0402_5%~D

1 2

@

R6 0_0402_5%~D

1 2

R19 0_0402_5%~D@R19 0_0402_5%~D@

BT_RADIO_DIS#_RBT_RADIO_DIS#

1 2

C7 0.1U_0402_10V7K~DC7 0.1U_0402_10V7K~D

PCIE_PRX_WLANTX_C_N1 PCIE_PRX_WLANTX_C_P1

C9 0.1U_0402_10V7K~DC9 0.1U_0402_10V7K~D

PCIE_PTX_WLANRX_N1 PCIE_PTX_WLANRX_P1

EC_TX_R EC_RX_R

12

R20

1 2

JMIN1

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

GND1

ACES_88910-5204

CONN@

GND2

B

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

R9 0_0603_5%@R9 0_0603_5%@

WL_OFF# PLT_RST#

1 2

+3VS

+1.5VS

USB20_N4 USB20_P4

+3VS

USB20_N4 <16> USB20_P4 <16>

C

WL_OFF# <16> PLT_RST# <6,16,22,26,30,33>

D

+1.5VS

C14

0.01U_0402_16V7K~D

C14

0.01U_0402_16V7K~D

C2

0.1U_0402_16V4ZC20.1U_0402_16V4Z

C3

0.1U_0402_16V4ZC30.1U_0402_16V4Z

C1

4.7U_0805_10V4ZC14.7U_0805_10V4Z

1

2

1

2

1

2

+3VS

C5

0.1U_0402_16V4ZC50.1U_0402_16V4Z

C6

0.1U_0402_16V4ZC60.1U_0402_16V4Z

C4

4.7U_0805_10V4ZC44.7U_0805_10V4Z

1

2

C12

47P_0402_50V

1

@C12

@

2

C15

0.01U_0402_16V7K~D

C15

0.01U_0402_16V7K~D

C13

47P_0402_50V

1

@C13

@

2

E

TO WWAN BOARD

JWWAN1

1

10 11 12

13 14

BATT_CHG_LED#<26>

2

3

4

5

6

7

8

9

9 10 11 12

GND1 GND2

FCI_10089709-012010LF~D

CONN@

BATT CHARGE

+5VALW

12

RO1 100K_0402_5%RO1 100K_0402_5%

12

RO2 100K_0402_5%RO2 100K_0402_5%

61

D

QO1A

2

G

S

DO1

WHITE

RO3

1 2

820_0402_5%

34

D

QO1B

5

G

DMN66D0LDW-7_SOT363-6

S

DMN66D0LDW-7_SOT363-6

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

C

BATT_CHG_LED#_D

BATT_LOW_LED#_D

HT-297UY5/BP5_YELLOW-WHITE

2010/12/20 2011/12/20

WHITE

21

43

YELLOW

Compal Secret Data

Deciphered Date

D

+5VALW

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

LED/ WLAN / WWAN CONN

LA-7451P

E

27 51Thursday, July 28, 2011

of

1.0

+3VS

+1.5VS

WWAN_RADIO_OFF#<16>

PLT_RST#<6,16,22,26,30,33>

USB20_P5<16>

USB20_N5<16>

3 3

USB20_P5 USB20_N5

WWAN_RADIO_OFF#

PLT_RST#

BATT LOW

+5VALW

BATT_LOW_LED#_D

RO5

100K_0402_5%

QO2B

5

G

DMN66D0LDW-7_SOT363-6

S

12

RO6

RO6 300_0402_5%

300_0402_5%

34

D

DMN66D0LDW-7_SOT363-6

S

B

12

100K_0402_5%

4 4

BATT_LOW_LED#< 26>

A

12

RO4

61

D

QO2A

2

G

A

+5VALW to +5VS

+5VALW

Q26

Q26 SI4800BDY-T1-E3_SO8

SI4800BDY-T1-E3_SO8

8

1

C335

C335 10U_0805_10V4Z~D

10U_0805_10V4Z~D

2

1 1

B+_BIAS

DMN66D0LDW-7_SOT363-6~D

1 2

R270

R270 102K_0402_1%

102K_0402_1%

SUSP

1

2

C336

C336 10U_0805_10V4Z~D

10U_0805_10V4Z~D

3

Q285B

5

4

7

5

4

1

2

+5VS

1 2 36

C337

0.1U_0603_50V_X7R

C340

1U_0603_10V4Z

10U_0805_10V4Z~D

1

C338

2

Q285A

R267

R267 470_0603_5%

470_0603_5%

1 2

+5VS_D

61

DMN66D0LDW-7_SOT363-6~D

B

SUSP

2

C

D

+5VALW

R1934

R1934 100K_0402_5%~D

100K_0402_5%~D

1 2

DGPU_PWR_EN#<37>

SUSP#<10,26,46>

DGPU_PWR_EN<16,34,37,50>

DGPU_PWR_EN#

R1938

R1938 100K_0402_5%~D

100K_0402_5%~D

21

D22CH751H-40PT_SOD323-2 D22C H751H-40PT_SOD323-2

12

@

13

D

2

G

Q294

S

SSM3K7002F_SC59-3

E

+3VALW to +3V_PCH

+3VALW to +3VS

+3VALW

Q27

Q27 SI4800BDY-T1-E3_SO8

SI4800BDY-T1-E3_SO8

8 7

5

C346

C346 10U_0805_10V4Z~D

10U_0805_10V4Z~D

13

D

2

G

S

+1.5V To +1.5VS

+1.5V +1.5VS

Q30

Q30 SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

U20

SI4634DY-T1-E3_SO8~D

8 7 6 5

0.1U_0603_50V_X7R

1

2

4

1

2

C358

2

G

B+_BIAS

R279

R279 102K_0402_1%

102K_0402_1%

SUSP

1

2

1 2

12

R283

R283 330K_0402_5%

330K_0402_5%

13

D

Q40

SSM3K7002FU_SC70-3

S

1

C345

C345 10U_0805_10V4Z~D

10U_0805_10V4Z~D

2

B+_BIAS

2 2

SUSP

3 3

+3VS

1 2 36

1

C347

C347 10U_0805_10V4Z~D

10U_0805_10V4Z~D

2

0.1U_0603_50V_X7R

C354

1

10U_0805_10V4Z~D

2 3

C356

1

4

12

R285

2

2M_0402_5%~D

1

C348

C348 1U_0603_10V4Z

1U_0603_10V4Z

2

0.1U_0402_16V7K~D

C357

1

2

+3VALW

PJP21

2

112

JUMP_43X79@

+5VALW to +5V_PCH

+5VALW +5V_PCH

PJP20

2

112

JUMP_43X79@

+3V_PCH

DGPU_PWR_EN# DGPU_PWR_EN#

1

C8

2

0.1U_0402_10V7K~DC80.1U_0402_10V7K~D

+1.5V_MEM_GFX +1.05V_RUN_VTT _GFX

12

R1939

470_0402_5%

Q296A

2

61

2N7002DW-7-F_SOT363-6

470_0402_5%

Q296B

5

R1940

12

3

4

2N7002DW-7-F_SOT363-6

SUSP<45>

SUSP#<10,26, 46>

R291

R291 100K_0402_5%~D

100K_0402_5%~D

+5VALW

12

R288

R288 100K_0402_5%~D

SUSP

12

100K_0402_5%~D

13

D

Q33

2

SSM3K7002F_SC59-3

G

0.1U_0603_50V_X7R

S

1

@

C360

2

+0.75VS+1.5V_CPU_VDDQ

12

R292

R292 220_0402_5%~D

220_0402_5%~D

+1.5V_CPU_VDDQ_CHG

+3V

SSM3K7002FU_SC70-3~D

13

D

Q37

2

G

S

D

SYSON#

R294

470_0402_5%

2

G

12

+3V_USB

13

D

Q36

SSM3K7002FU_SC70-3

S

RUN_ON_CPU1.5VS3#<6,10>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

C

2010/12/20 2011/12/20

Compal Secret Data

Deciphered Date

+1.5VS

12

R296

470_0402_5%

4 4

+1.5VS_D

61

Q4A

SUSP SUSP

2

2N7002DW-7-F_SOT363-6

470_0402_5%

SUSP

12

R297

+VCCP_D

3

Q4B

5

4

2N7002DW-7-F_SOT363-6

A

+3VS+VCCP

12

R299

470_0402_5%

+3VS_D

3

Q5B

5

4

2N7002DW-7-F_SOT363-6

B

SYSON#

+1.5V

R289

470_0402_5%

2

G

12

+1.5V_D

13

D

Q34

SSM3K7002FU_SC70-3

S

12

R293

R293 22_0603_5%~D

22_0603_5%~D

+DDR_CHG

SSM3K7002FU_SC70-3~D

13

D

Q38

2

G

S

SYSON<26,45>

R300

R300 100K_0402_5%~D

100K_0402_5%~D

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

DC/DC Interface

LA-7451P

SYSON#

12

+5VALW

12

R295

R295 100K_0402_5%~D

100K_0402_5%~D

13

D

Q35

2

0.1U_0603_50V_X7R

0.1U_0603_50V_X7R SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

G

S

1

@

C361

2

1.0

28 51Thursday, July 28, 2011

E

28 51Thursday, July 28, 2011

1.0

of

2

+HDMI_5V_OUT

1

W=40mils

FV2

DV6

+3VS

Pull high at VGA side

B B

SDVO_SCLK<15>

SDVO_SDATA<15>

HDMI_SDATA_R HDMI_SDATA

Q43 2N7002E-T1-GE3_S OT23-3

G

2

13

D

S

D

S

G

2

Q39 2N7002E-T1-GE3_S OT23-3

13

D

S

D

S

R982

R981

1 2

2.2K_0402_5%

HDMI_SCLKHDMI_SCLK_R

+5VS

BAT1000-7-F_SOT23-3~D

Place closed to JHDMI1

+HDMI_5V_OUT

DV6

2 1 3

NC

+HDMI_5V_OUT

4/7 modify

2N7002E-T1-GE3_SOT23-3

2

G

L51

L51 MBK1608221YZF_2P

1

2

PCH_DPB_N0<15> PCH_DPB_P0<15>

PCH_DPB_N1<15> PCH_DPB_P1<15>

PCH_DPB_N2<15> PCH_DPB_P2<15>

PCH_DPB_N3<15> PCH_DPB_P3<15>

MBK1608221YZF_2P

1 2

C1058

220P_0402_50V7K

HDMI_HPD

A A

R381

1 2

10K_0402_5%~D

C629 0.1U_0402_16V7KC629 0.1U_0402_16V7K C630 0.1U_0402_16V7KC630 0.1U_0402_16V7K

C631 0.1U_0402_16V7KC631 0.1U_0402_16V7K C632 0.1U_0402_16V7KC632 0.1U_0402_16V7K

C633 0.1U_0402_16V7KC633 0.1U_0402_16V7K C634 0.1U_0402_16V7KC634 0.1U_0402_16V7K

C635 0.1U_0402_16V7KC635 0.1U_0402_16V7K C636 0.1U_0402_16V7KC636 0.1U_0402_16V7K

12 12

1 3

D

12

R636

R636 100K_0402_5%

100K_0402_5%

Q29

G

S

HDMI_TX2HDMI_TX2+

HDMI_TX1HDMI_TX1+

HDMI_TX0HDMI_TX0+

HDMI_CLKHDMI_CLK+

20K_0402_5%~D

PCH_DPB_HPD <15,17>

HDMI_TX2HDMI_TX2+

HDMI_TX1HDMI_TX1+

HDMI_TX0HDMI_TX0+

HDMI_CLKHDMI_CLK+

+3VS

R624 499_0 402_1%R624 499_0402_1%

1 2

R625 499_0 402_1%R625 499_0402_1%

1 2

R626 499_0 402_1%R626 499_0402_1%

1 2

R627 499_0 402_1%R627 499_0402_1%

1 2

R628 499_0 402_1%R628 499_0402_1%

1 2

R629 499_0 402_1%R629 499_0402_1%

1 2

R630 499_0 402_1%R630 499_0402_1%

1 2

R631 499_0 402_1%R631 499_0402_1%

1 2

0_0402_5%~D

1 2

RV254

@

100K_0402_5%~D

12

RV255

2N7002E-T1-GE3_SOT23-3

@

HDMI_GND

Q28

Place close JHDMI1

R598 0_0402_5%

1 2

LV1

1

@

1

4

HDMI_CLK+ HDMI_R_CK+

13

D

2

G

S

HDMI_TX0+ HDMI_R_D0+

HDMI_TX1+ HDMI_R_D1+

HDMI_TX2+ HDMI_R_D2+

4

R599 0_0402_5%

1 2

MURATA DLW21SN 900HQ2L

@

R601 0_0402_5%

1 2

LV2

1

@

1

4

R604 0_0402_5%

1 2

MURATA DLW21SN 900HQ2L

@

R606 0_0402_5%

1 2

LV3

1

@

1

4

MURATA DLW21SN 900HQ2L

R614 0_0402_5%

1 2

@

R617 0_0402_5%

1 2

LV4

@

1

@

1

4

MURATA DLW21SN 900HQ2L

R621 0_0402_5%

1 2

@

2

3

2

3

2

3

2

3

HDMI_R_CK-HDMI_CLK-

HDMI_R_D0-HDMI_TX 0-

HDMI_R_D1-HDMI_TX 1-

HDMI_R_D2-HDMI_TX 2-

12

R382

FV2

HDMI_HPD

HDMI_SDATA HDMI_SCLK

HDMI_R_CK-

HDMI_R_CK+ HDMI_R_D0-

HDMI_R_D0+ HDMI_R_D1-

HDMI_R_D1+ HDMI_R_D2-

HDMI_R_D2+

12

1.5A_6V_1206L150PR~D

19 18 17 16 15 14 13 12 11 10

9 8 7 6 5 4 3 2 1

+HDMI_5V_OUT

CV29

1

CV30

2

0.1U_0402_10V7K~D

10U_0603_6.3V6M~D

JHDMI1

HP_DET +5V DDC/CEC_GND SDA SCL Reserved CEC CKCK_shield CK+ D0D0_shield D0+ D1D1_shield D1+ D2D2_shield D2+

SUYIN_100042GR019M23DZL

GND GND GND GND

20 21 22 23

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/12/20 2011/12/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

1

Date: Sheet of

Compal Electronics, Inc.

HDMI

LA-7451P

1.0

29 51Thursday, July 28, 2011

1.0

5

+1.5V_3.0+3VALW

10U_0603_6.3V6M~D

1U_0603_10V6K~D

CI1

CI46

1

2

Vout = 0.8(1+10K/27K)

D D

= 1.0962 V

+3VA

RI29

10K_0402_5%

RI29

10K_0402_5%

1 2

RI9

10K_0402_5%@RI9

10K_0402_5%

@

1 2

C C

B B

A A

+3VALW

+1.5V_3.0

+3VALW

USB_30_EN#

USBPG

12

RI1 5.1K_0402_1%RI1 5.1K_0402_1%

APL5930KAI-TRG_SO8

VDD11 to 1.1V PULL-LOW

AUX_DET

SCL

RI10

SDA

RI11

10K_0402_5%

RI11

10K_0402_5%

1 2

PLT_RST#<6,16,22,26,27,33>

UI2

6

VCNTL

5

VIN

9

VIN

8

EN

7

POK

1A

3

VOUT

4

VOUT

2

FB

GND

1

RI16

1 2

0_0402_5%~D

@

+3VA

RI17

@RI17

@

4.7K_0402_5%

1 2

RI24

4.7K_0402_5%

1 2

10UH_LB2012T100MR_20%_0805

10K_0402_1%~D

12

27K_0402_1%

FREQSEL

+1.1V

RI2

1 2

RI3

USB30_CLKREQ#<14>

USB3_SMI#<16>

USB_PCIE_WAKE#<26>

1

@

CI27

2

100P_0402_50V8J~D

CLKREQ_USB3

PCIE_WAKE#_USB3

1

2

FREQSEL

H = non 48MHz

L = 48MHz (default)

*

+3VDDA+3VA

LI5

1

CI31

2

22U_0805_6.3V6M

10U_0603_6.3V6M~D

CI24

SSM3K7002FU_SC70-3~D

1000P_0402_50V7K

0.1U_0402_16V4Z

CI32

USB_30_EN#<26>

+1.5V

+3VALW

+3V

G

2

S

6/3

USBPG

1 2

RI15 0_0402_5%~D

@

CI49

1 2

CI50

1 2

2

CI33

1

0.01U_0402_16V7K

4

+3VALW to +3V Transfer+1.5V to +1.1V Transfer

+3V_3.0

1 2

RI4 0_0603_5%~D

@

1 2

RI5 0_0603_5%~D

@

+3V

RI30

10K_0402_1%~D

1 2

CLKREQ_USB3

13

D

QI1

@

RI14 0_0402_5%~D

1 2

RI18 0_0402_5%~D

1 2

12

@

RI13 9. 09K_0402_1%RI13 9.09K_0402_1%

PCIE_WAKE#_USB3

2

CI34

1

1 2

CI35

0.01U_0402_16V7K

CI51

@

1000P_0402_50V7K

0.1U_0402_16V4Z

2

1

UI1

3

VIN

4

VIN/CE

2

GND

RT9701-PB_SOT23-5

+1.5V_3.0

+3V_3.0

USB3_SMI#_R

R1EXTRTN

0.1U_0402_16V4Z

2

1

VOUT VOUT

FREQSEL

CLKREQ_USB3

AUX_DET

+1.1V

2

CI37

1

1 5

+1.1V

SDA SCL

R1EXT

2

CI38

1

0.01U_0402_16V7K

+3V

0.2A

RI8

0_0805_5%

1 2

@

A4

A6

A9

UI3

VDD11A1VDD11

VDD11

SDA SCL

SMI# GRST# FREQSEL

R1EXT R1EXTRTN

JTAG_TCK JTAG_TMS JTAG_TDO JTAG_RST# JTAG_TD1

WAKE# CLKREQ#

PERST# AUX_DET

NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC

2

CI39

1

VDD11

A2 B2

B3 A15 B14

A24 B23

A32 B30 B31 B32 A35

B35 B36

A40 A52

B45 B43 B29 B28 B27 B26 B25 B13

B8

B7

B6

B5

B4 A48 A46 A43 A30 A29 A27 A26 A14

A8

A7

A5

TUSB7320RKM_PWQFN100_9X9

0.1U_0402_16V4Z

3

+3VA

CI48 .1U_0402_16V7KCI48 .1U_0402_16V7K

CI6 .1U_0402_16V7KCI6 .1U_0402_16V7K

CI47 .1U_0402_16V7KCI47 .1U_0402_16V7K

CI4 .1U_0402_16V7KCI4 .1U_0402_16V7K

1

2

7K for customer request, can use other kind of capacitor, like Y5V.

+1.1VR

A12

A16

A28

A31

A33

A38

A50

B17

B19

VDD11

VDD11B1VDD11

VDD11

TUSB7320

VDDA_3P3

A19

A21

A25

YI1

4

USB3_XT2

1

48MHZ_20PF_FSX5M48.000000M20FAQ

1

CI44

18P_0402_50V8J

2

CI7 .1U_0402_16V7KCI7 .1U_0402_16V7K

1

2

+3VA

B24

B37

B40

B42

B44

VDD11

VDDA_3P3

A44

B11

B22

B20

+3VDDA

1 2

RI26 1M_0402_5%RI26 1M_0402_5%

VSS_OSC

CI8 .1U_0402_16V7KCI8 .1U_0402_16V7K

1

2

A34

VDD33A3VDD33

VSS

B21

3

2

A39

A47

A51

VDD33

USB_SSRXN_DN1 USB_SSRXP_DN1

USB_SSTXN_DN1

USB_SSTXP_DN1

USB_SSRXN_DN2 USB_SSRXP_DN2

USB_SSTXN_DN2

USB_SSTXP_DN2

VSS_OSC

USB3_XT1

3

2

18P_0402_50V8J

USB_DM_DN1

USB_DP_DN1

PWRON1#

OVERCUR1#

USB_DM_DN2

USB_DP_DN2

PWRON2#

OVERCUR2#

PCIE_TXN PCIE_TXP

PCIE_RXN PCIE_RXP

PCIE_REFCLKN

PCIE_REFCLKP

GPIO0 GPIO1 GPIO2 GPIO3

immobile pin immobile pin immobile pin immobile pin Thermal Pad

1

2

XI

XO

CI45

+3V

BLM18AG601SN1D_2P

U2DN1_L

B18

U2DP1_L

A20

U3RXDN1_L

B16

U3RXDP1_L

A18

U3TX_C_DN1

B15

U3TX_C_DP1

A17

B33

OCI1B

A36

A13 B12

A10 B9

B10 A11

B34 A37

A41 B38

PCIE_PTX_USB3RX_N6

A42

PCIE_PTX_USB3RX_P6

B39

CLK_PCIE_USB30#

B41

CLK_PCIE_USB30

A45

A49 B46 B47 B48

USB3_XT1

A23

USB3_XT2

A22

101 102 103 104 105

1

2

LI1

1 2

CI36

CI36 CI42

CI42

PCIE_PRX_USB3TX_C_P6

+USB3_VCCB

150U_B2_6.3VM_R35M

1

CI41

1

+

2

0.01U_0402_16V7K~D

CI11

1

2

+3VA

1 2 1 2

10U_0603_6.3V6M~D

CI40

0.01U_0402_16V7K~D

CI13

CI14

CI12

1

2

.1U_0402_16V7K~D

CI14

1

2

10U_0603_6.3V6M~D

CI25

U3TXDN1_L U3TXDP1_L

.1U_0402_16V7K~D

PCIE_PTX_USB3RX_N6 <14>

PCIE_PTX_USB3RX_P6 <14>

CLK_PCIE_USB30# <14>

CLK_PCIE_USB30 <14>

CI30

.1U_0402_16V7K~D

1 2

USB_PWR_EN#<23,26>

0.01U_0402_16V7K~D

.1U_0402_16V7K~D

CI15

CI9

1

2

For EMI request

U3RXDN1_L

U2DN1_L

U2DP1_L

CI28 .1U_0402_16V7K~DCI28 .1U_0402_16V7K~D

1 2

CI29 .1U_0402_16V7K~DCI29 .1U_0402_16V7K~D

1 2

W=80mils

+5VALW

+USB3_VCCB

U3TXDP1

U3TXDN1 U2DP1

U3RXDP1

U3RXDN1

+1.1VR+3V

0.01U_0402_16V7K~D

CI16

1

2

RI20 0_0402_5%~D @RI20 0_0402_5%~D @

1 2

DLW21SN670HQ2L_4P

RI21 0_0402_5%~D @RI21 0_0402_5%~D @

RI22 0_0402_5%~D @RI22 0_0402_5%~D @

LI3

3 4

DLW21SN670HQ2L_4P

RI23 0_0402_5%~D @RI23 0_0402_5%~D @

RI31 0_0402_5%~D @RI31 0_0402_5%~D @

LI4

3

2

WCM-2012-670T_4P

RI32 0_0402_5%~D @RI32 0_0402_5%~D @

U3RXDN1 U3RXDP1 U3TXDN1

2.0A

UI4

1

GND

OC1#

2

IN

OUT1

3

OUT2

EN1#

4

OC2#

EN2#

TPS2062ADR_SO8~D

JUSB2

9

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND D-2GND

6

SSRX+

4

GND

5

SSRX-

TAITW_PUBAU1-09FNLSCNN4H0

CONN@

10 11

GND

12

GND

13

GND

.1U_0402_16V7K~D

CI17

CI18

1

2

1 2

LI2

1 2

For ESD request

DI2

1

R-

2

R+

3

T-

4

T+

LXES4XBAA6-027_MSOP8

PCIE_PRX_USB3TX_N6PCIE_PRX_USB3TX_C_N6 PCIE_PRX_USB3TX_P6

W=80mils

+USB3_VCCB

8 7 6 5

USBGND2U2DN1

1

.1U_0402_16V7K~D

0.01U_0402_16V7K~D

.1U_0402_16V7K~D

CI20

CI21

1

2

U3TXDP1U3TXDP1_L

U3TXDN1U3TXDN1_L

U3RXDP1U3RXDP1_L

U3RXDN1

U2DN1

U2DP1

+USB3_VCCB

8

VCC

7

GND

U2DP1

6

D-

U2DN1U3TXDP1

5

D+

RI25

OCI1B

For ESD request

1 2

@

1 2

@

CI21

1

2

PCIE_PRX_USB3TX_N6 <14>

PCIE_PRX_USB3TX_P6 <14>

CI19

1

2

34

12

4

1

10K_0402_5%~D

1 2

RI27 0_0603_5%~D

RI28 0_0603_5%~D

CI43 .1U_0402_16V7K~DCI43 .1U_0402_16V7K~D

0.01U_0402_16V7K~D

CI23

CI10

CI22

CI10

1

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2010/12/15 2011/12/15

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

USB conn.

Size Document Number Rev

LA-7451P

Date: Sheet

1

30 51Thursday, July 28, 2011

of

1.0

5

4

3

2

1

CC7 near Pin9

+3VS

CC8 near Pin1

D D

+MIC1_VREFO_R +MIC1_VREFO_L

12

RC130

RC131

2.2K_0402_5%

DMIC_CLK<21>

C C

MIC_JD

RC131

2.2K_0402_5%

MIC1

1 2

MIC2

1 2

100P_0402_50V8J

RC140 39.2K_0402_1%RC140 39.2K_0402_1%

1 2

RC141 20K_0402_1%RC141 20K_0402_1%

RC132 1K_0402_1%RC132 1K_0402_1%

MIC1_R

MIC2_R C_MIC2

1K_0402_1%

1K_0402_1% RC133

RC133

RC136

0_0402_5%

1

CC231

@CC231

@

2

HDA_RST_AUDIO#<13>

SENSEAHP_JD

10mil

+MIC1_VREFO_L

ALC259-VB5-GR:SA00003QR10

20mil

1

CC222

CC223

2

.1U_0402_16V7K

10U_0805_10V6K

4.7U_0603_6.3V6K

CC228

1 2

CC229

4.7U_0603_6.3V6K

DMIC0<21>

DMIC_CLK_L

HDA_RST_AUDIO#

CC104

1

0.01U_0402_16V7K~D

2

2.2U_0603_10V6K

1

2

CC233

10mil

1

CC224

2

.1U_0402_16V7K

23 24

14

C_MIC1

1 2

15

21 22

16 17

2

3

PD# HDA_SDIN0_R

4

11

MONO_IN

12

SENSEA

13

18

36

35

31

43 42 49

7

DGND

80mil

+5VS_PVDD

9

1

DVDD

PVDD139PVDD2

DVDD_IO

LINE1_L LINE1_R

LINE2_L LINE2_R

MIC1_L MIC1_R

MIC2_L MIC2_R

GPIO0/DMIC_DATA

GPIO1/DMIC_CLK

PD#

RESET#

PCBEEP

SENSE A

SENSE B

CBP

CBN

MIC1_VREFO_L

PVSS2 PVSS1 DVSS2 DVSS1

ALC259-GR_QFN48_7X7

+VDDA

46

SPK_OUT_L+

SPK_OUT_L-

SPK_OUT_R+

SPK_OUT_R-

HP_OUT_L HP_OUT_R

SYNC

BCLK

SDATA_OUT

SDATA_IN

EAPD

SPDIFO

MONO_OUT

MIC2_VREFO

MIC1_VREFO_R

LDO_CAP

VREF

JDREF

CPVEE

AVSS1 AVSS2

CC9 near Pin25 CC10 near Pin38

1

CC225

38

2

UC3

.1U_0402_16V7K

AVDD125AVDD2

SPKOUT_L+

40

SPKOUT_L-

41

SPKOUT_R+

45

SPKOUT_R-

44

32 33

HDA_SYNC_AUDIO

10

HDA_BITCLK_RDMIC0

6

HDA_SDOUT_AUDIO

5

8

47

48

20

29

10mil

30 28

+AC97_VREF

27

+AC_JDREF

19

+CPVEE

34

26 37

AGND

40mil

1

CC226

2

.1U_0402_16V7K

HP_OUTL HP_OUTR

1 2

RC135 0_0402_5%

+MIC1_VREFO_R

1 2

RC142 20K_0402_1%RC 142 20K_0402_1%

1 2

CC234

2.2U_0603_10V6K

1

CC227

CC227 10U_0805_10V6K

10U_0805_10V6K

2

30mil

HDA_SYNC_AUDIO <13>

@

RC138

1 2

33_0402_5%

EC_EAPD# <26>

10mil

2.2U_0603_10V6K

LC2

12

FBMA-L11-160808-800LMT_0603

+5VS

10mil

HDA_BITCLK_AUDIO < 13>

HDA_SDOUT_AUDIO < 13>

HDA_SDIN0 <13>

+LDO_CAP

1

2

CC235

1

Change CC19 to 2.2uF for pop noise or class D noise

@

1

CC236

2

CC237

.1U_0402_16V7K

10U_0805_10V6K

1 2

RC143 0_0603_5%

1 2

@

RC145 0_0603_5%

1 2

@

RC146 0_0402_5%

1 2

@

RC147 0_0402_5%

CC106 0.1U_0402_10V7KCC106 0.1U_0402_10V7K

@

CC105 0.1U_0402_10V7KCC105 0.1U_0402_10V7K

+5VS

1

2

Beep sound

EC Beep

BEEP#<26>

PCI Beep

HDA_SPKR<13>

12

CC217

.1U_0402_16V7K

BLM21PG600SN1D_0805~D

1

CC218

2

10U_0805_10V6K

HDA_BITCLK_R

LC1

RC134

1 2

47K_0402_5%

RC137

1 2

47K_0402_5%

RC139

4.7K_0402_5%

12

RC144

1

2

12

1

CC220

2

10U_0805_10V6K

12

22_0402_5%

CC239

CC239 10P_0402_50V8J

10P_0402_50V8J

GND AGND

B B

For Power on/off de-pop circuit and system booting warning signal:

Please system BIOS Engineer Note:

1.If you want the system make warning signal after power on

Please let EC_MUTE# high first

2.When you want to exit your BIOS programming code

Please let EC_MUTE# Low.

(The programming is difference from before)

EC_MUTE#<26>

HDA_RST_AUDIO#<13>

A A

RC148

@

1 2

1

2

RC150

0_0402_5%

+3VS

CC240

@

@ @

@

1 2

5

UC4

@UC4

@

P

INA

.1U_0402_16V7K

4

O

INB

G

74AHC1G32GW_SOT353-5~D

3

1 2

0_0402_5%

+5VS

1 2

RC149

@RC149

@

1K_0402_5%

PD#

PESD5V0U2BT_SOT23-3~D

Speaker Connector

SPKOUT_R+ SPKOUT_RSPKOUT_L+ SPKOUT_L-

2

3

D77

1

1 2 3 4

2

3

D75

D75 PESD5V0U2BT_SOT23-3~D

PESD5V0U2BT_SOT23-3~D

1

JSPEK1

1 2

5

3

GND

6

4

GND

ACES_87213-0400G

@CONN

SP02000GC00 LINK OK

1 2

L45 BLM15AG121SN1D_L0402_2PL45 BLM 15AG121SN1D_L0402_2P

1 2

L46 BLM15AG121SN1D_L0402_2PL46 BLM 15AG121SN1D_L0402_2P

R2021

R2021 75_0402_5%

75_0402_5%

HP_OUTR

1 2

HP_OUTL HP_L

1 2

75_0402_5%

75_0402_5% R2022

R2022

1 2

L47 BLM15AG121SN1D_L0402_2PL47 BLM 15AG121SN1D_L0402_2P

1 2

L48 BLM15AG121SN1D_L0402_2PL48 BLM 15AG121SN1D_L0402_2P

+5VS_PVDD

1

CC219

CC221

2

.1U_0402_16V7K

CC3 near Pin39 CC5 near Pin46

CC230

MONO_IN

1 2

.1U_0402_16V7K

1

CC232

100P_0402_50V8J

2

MIC_JD

MIC-2MIC2

MIC-1MIC1

2

3

D74

D74 PESD5V0U2BT_SOT23-3~D

PESD5V0U2BT_SOT23-3~D

1

HP_JD

HPRHP_R

HPL

2

3

D76

D76 PESD5V0U2BT_SOT23-3~D

PESD5V0U2BT_SOT23-3~D

1

JMIC1

5

4

3

6

2

1

SINGA_2SJ3013-010311F

CONN@

JHP1

5

4

3

6

2

1

SINGA_2SJ3013-010311F

CONN@

MICROPHONE IN JACK

G

9

G

8

G

7

HEADPHONE OUT JACK

G

9

G

8

G

7

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Codec ALC259

LA-7451P

1

31 51Thursday, July 28, 2011

1.0

5

4

3

2

1

GPU DDC Dongle SW for DP

U82

CAB_DET#

DP_DDC_CL K<3 5>

D D

DP_DDC_DAT A<35>

DP_DDC_CL K

DPB_GPU_AUX/DDC DP_DDC_CL K_C

CAB_DET# DP_DDC_DAT A

DPB_GPU_AUX#/DDC

U82

1 2

3

4 5

6

7

VCC

BE0

BE3

A0

B0

BE1 A1

BE2

B1

GND

PI3C3125LEX_TSS OP14~D

A3

B3

A2

B2

Dongle

C C

+3.3V_RUN_GFX

12

C370

0.1U_0402_ 16V4Z~D

14

CAB_DET

13

0.1U_0402_ 10V7K~D

12

11

CAB_DET

10

0.1U_0402_ 10V7K~D

DP_DDC_DAT A_C

9

8

DP_PCH_HPD<13>

VGA_DP_HPD<34>

Follow Intel HPD design rev 1.6

DP_DDC_CL K

C414

12

DP_DDC_DAT A

C598

12

Normal

12

R1238 10K _0402_5%R1 238 10K_0402_ 5%

12

R1234 10K _0402_5%R1 234 10K_0402_ 5%

R1235

100K_0402_ 5%~D

1 2

R1236

R1237

+5VS

S

12

Q110

Q110 BSS138_SOT2 3~D

BSS138_SOT2 3~D

DP_DDC_DAT A_C DP_DDC_CL K_C

100K_0402_ 5%~D

G

Vgs <=1.5 V

2

13

D

R469 100K_0402_5%~ DR469 100K_0402_5 %~D R470 100K_0402_5%~ DR470 100K_0402_5 %~D

DISP_A0N_VGA<35> DISP_A0P_VGA<35>

DISP_A1N_VGA<35> DISP_A1P_VGA<35>

DISP_A2N_VGA<35> DISP_A2P_VGA<35>

DISP_A3N_VGA<35> DISP_A3P_VGA<35>

DISP_HDD ISP_HD

12 12

Near to NV

+3.3V_RUN_GFX

C1069 0.1U_04 02_10V6K~DC1 069 0.1U_0402_10V6K ~D

12

C1070 0.1U_04 02_10V6K~DC1 070 0.1U_0402_10V6K ~D

12

C1071 0.1U_04 02_10V6K~DC1 071 0.1U_0402_10V6K ~D

12

C1073 0.1U_04 02_10V6K~DC1 073 0.1U_0402_10V6K ~D

12

C1072 0.1U_04 02_10V6K~DC1 072 0.1U_0402_10V6K ~D

12

C1074 0.1U_04 02_10V6K~DC1 074 0.1U_0402_10V6K ~D

12

C1075 0.1U_04 02_10V6K~DC1 075 0.1U_0402_10V6K ~D

12

C1076 0.1U_04 02_10V6K~DC1 076 0.1U_0402_10V6K ~D

12

DISP_C_A0N DISP_C_A0P

DISP_C_A1N DISP_C_A1P

DISP_C_A2N DISP_C_A2P

DISP_C_A3N DISP_C_A3P

+3VS

Co-lay

F2

1 2

1.5A_6V_1206L15 0PR~D

R923 0_1206_5%~ D@R923 0_1206 _5%~D@

+3VS_DP

12

C1068

0.1U_0402_16V4Z~D

C1068

0.1U_0402_16V4Z~D

C1067

10U_0805_10V4Z~D

C1067

10U_0805_10V4Z~D

1

2

JMDP1

1

GND

DISP_HD DISP_C_A0P CAB_DET

R937

@

12

1M_0402_5 %~D

12

R936

1M_0402_5 %~D

DISP_C_A0N

DISP_CEC

DISP_C_A1P DISP_C_A3P DISP_C_A1N DISP_C_A3N

DISP_C_A2P DPB_GPU_AUX/DDC DISP_C_A2N DPB_GPU_AUX#/DDC

C1080 0.1U_0402_10V6K~DC1080 0.1U_0402_10V6K~D

R933 1M_0402_5%~DR933 1M_0402_5%~D

C1081 22U_0805_6.3V6M~DC1081 22U_0805_6.3V6M~D

R932 5.1M_0402_5%R932 5.1M_0402_5%

12

1

2

B B

+3VS

12

R931

100K_0402_ 1%~D

CAB_DET#

Close connect

13

D

Q81

2

G

S

2N7002_SOT 23

A A

GND

2

HPD

3

LANE0_P

4

CONFIG1

5

LANE0_N

6

CONFIG2

7

GND

8

GND

9

LANE1_P

10

LANE3_P

11

LANE1_N

12

LANE3_N

13

GND

14

GND

15

LANE2_P

16

AUXCH_P

17

LANE2_N

18

AUXCH_N

19

GND

20

DP_PWR

21 22 23 24

GROUND

JAE_DP2R020JP C-1-CP

CONN@

DELL CONFIDENTIAL/PROPRIETARY

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, IN C.

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, IN C.

5

4

3

2009/07/25 2011/07/06

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Documen t Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

mini DP

LA-7451P

1

1.0

32 5 1Thursd ay, July 28, 2011

1.0

of

5

Zdiff = 100 ohm

PCIE_PTX_CARDRX_P4<14>

PCIE_PTX_CARDRX_N4<14>

CLK_PCIE_CD<14>

CLK_PCIE_CD#<14>

D D

PCIE_PRX_CARDTX_P4<14>

PCIE_PRX_CARDTX_N4<14>

10U_0603_6.3V6M~D

Removed CR17

5P_0402_50V8C @

C C

PCIE_PTX_CARDRX_P4

PCIE_PTX_CARDRX_N4

+ODR_PWR

1

12

CR28

CR19

0.1U_0402_10V7K~D

2

CR25

SD_CLK_R SD_CLK

1 2

Reserved

CLK_PCIE_CD

CLK_PCIE_CD#

CR24 4.7U_0603_6.3V6K~DCR 24 4.7U_0603_6.3V6K~D

1 2

PCIE_PRX_CARDTX_P4_CPCIE_PRX_CARDTX_P4

1 2

CR15 0.1U_0402_10V7K~D

PCIE_PRX_CARDTX_N4_CPCIE_PRX_CARDTX_N4

1 2

CR16 0.1U_0402_10V7K~D

1 2

CR22 0.1U_0402_10V7K~D

+3VS_CR

DV33_18

1

CR23

0.1U_0402_10V7K~D

SP1_SDD7_XDRDY

2

SP2_SDD6_XDRE#

SP3_SDD5_XDCE#

SP4_SDD4_XDWE#

@

1 2

RR23 0_0402_5%~D

SD_D1

SD_D3

XD_CD#

SD_D0

SD_CMD

AV12

DV12

1

HSIP

2

HSIN

3

REFCLKP

4

REFCLKN

5

AV12

6

HSOP

7

HSON

8

GND

9

DV12

10

Card1_3V3

11

3V3_IN

12

Card2_3V3

13

XD_CD#

14

DV33_18

15

GND

16

SP1

17

SP2

18

SP3

19

SP4

20

SD_D1

21

SD_D0

22

SD_CLK

23

SD_CMD

24

SD_D3

RTS5209-GR_LQFP48_7X7

R2017

U135

1 2

0_0805_5%~D

@

4

+3VS_CR

R1563

RREF

3V3_IN

CLK_REQ#

PERST#

EEDO

EECS

EESK

GPIO/EEDI

MS_INS#

SD_CD#

SP15

SP14

SP13

SP12

SP11

SP10

DV12_S

GND

SD_D2

RREF

48

47

CDCLK_REQ#

46

PLT_RST#

45

44

CARD_HPLUG_R CARD_HPLUG

43

42

41

MS_INS#

40

SD_CD#

39

SP15_SDWP_XDD7

38

SP14_MSCLK_XDD6

37

SP13_MSD7_XDD5

36

SP12_MSD3_XDD4

35

SP11_MSD6_XDD3

34

SP10_MSD2_XDD2

33

SP9_MSD0_XDD1

32

SP9

SP8_MSD4_XDD0

31

SP8

SP7_MSD1_XDWP#

30

SP7

SP6_MSD5_XDALE

29

SP6

SP5_MSBS_XDCLE

28

SP5

DV12_S

27

26

SD_D2

25

+3VS_CR+3VS_CR+3VS

12

6.2K_0402_1%~D

CDCLK_REQ# <14>

@

1 2

RR25 0_0402_5%~D

1

@

C288

2

100P_0402_50V8J~D

RR22 change to 0Ω

1 2

RR22 0_0402_5%~D

@

1 2

CR21

PLT_RST# <6,16,22,26,27,30>

SP14_MSCLK_XDD6_R

CR20

1 2

4.7U_0603_6.3V6K~D

0.1U_0402_10V7K~D

CR27

12

0.1U_0402_10V7K~D

2

CR26

CR26 5P_0402_50V8C

5P_0402_50V8C

1

@

3

CARD_HPLUG <16>

+ODR_PWR

12

RR3

For ver:ES2-B0

Place CR3 close to socket pin 22

Place CR4 close to socket pin 11

Place CR5 close to socket pin 11

Place CR6 close to socket pin 18

CR4

1

CR3

2

10K_0402_5%~D

0.1U_0402_10V7K~D

2

CR6

CR5

1

12

2

10U_0603_6.3V6M~D

0.1U_0402_10V7K~D

1

+ODR_PWR +ODR_PWR

SP8_MSD4_XDD0 SP9_MSD0_XDD1 SP10_MSD2_XDD2 SP11_MSD6_XDD3 SP12_MSD3_XDD4 SP13_MSD7_XDD5 SP14_MSCLK_XDD6 SP15_SDWP_XDD7

SP4_SDD4_XDWE# SP7_MSD1_XDWP# SP6_MSD5_XDALE XD_CD# SP1_SDD7_XDRDY SP2_SDD6_XDRE# SP3_SDD5_XDCE#

B B

A A

5

SP5_MSBS_XDCLE

JREAD

22

XD-VCC

30

XD10-D0

29

XD11-D1

28

XD12-D2

27

XD13-D3

26

XD14-D4

25

XD15-D5

24

XD16-D6

23

XD17-D7

33

XD07-WE

32

XD08-WP

34

XD06-ALE

39

XD01-CD

38

XD02-R/B

37

XD03-RE

36

XD04-CE

35

XD05-CLE

31

XD GND

40

XD GND

41

SD CD/WP GND

42

SD CD/WP GND

T-SOL_144-1300002600_NR

11

SD4-VDD

18

MS9-VCC

SD5-CLK SD7-DAT0 SD8-DAT1 SD9-DAT2 SD1-DAT3

SD2-CMD

SD-CD SD-WP

SD6-VSS

SD3-VSS

MS8-SCLK

MS4-DATA0 MS3-DATA1 MS5-DATA2 MS7-DATA3

MS6-INS

MS2-BS

MS1-VSS MS10-VSS

4

9 4 3 21 19 16 1 2

6 13

17 10 8 12 15 14 7 5 20

SD_CLK_R SD_D0 SD_D1 SD_D2 SD_D3 SD_CMD SD_CD# SP15_SDWP_XDD7

SP14_MSCLK_XDD6_R SP9_MSD0_XDD1 SP7_MSD1_XDWP# SP10_MSD2_XDD2 SP12_MSD3_XDD4 MS_INS# SP5_MSBS_XDCLE

Security Classification

Issued Date

THIS SHEET OF ENGINE ERING DRAW ING IS THE PROPRIETARY P ROPERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDEN TIAL

THIS SHEET OF ENGINE ERING DRAW ING IS THE PROPRIETARY P ROPERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDEN TIAL AND TRADE SE CRET INFORMATION. THIS SHE ET MAY NOT BE TRANS FERED FROM THE C USTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SE CRET INFORMATION. THIS SHE ET MAY NOT BE TRANS FERED FROM THE C USTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SE CRET INFORMATION. THIS SHE ET MAY NOT BE TRANS FERED FROM THE C USTODY OF THE COMPE TENT DIVISION OF R&D DEPARTMENT E XCEPT AS AUTHORIZE D BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT E XCEPT AS AUTHORIZE D BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2010/12/15 2011/12/15

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Card Reader RTS5209

LA-7451P

1

33 51Thursday, July 28, 2011

of

1.0

5

4

3

2

1

PEG_GTX_C_HRX_P[0..15]<5>

PEG_GTX_C_HRX_N[0..15]<5>

PEG_HTX_C_GRX_P[0..15]<5>

D D

C C

PEG_HTX_C_GRX_N[0..15]<5>

Differential signal

B B

DGPU_PWR_EN<16,28,37,50>

QV9

A A

PEG_A_CLKRQ#<14>

5

QV9

2N7002_SOT23-3

PEG_GTX_C_HRX_P[0..15]

PEG_GTX_C_HRX_N[0..15]

PEG_HTX_C_GRX_P[0..15]

PEG_HTX_C_GRX_N[0..15]

PEG_GTX_C_HRX_P0 PEG_GTX_C_HRX_N0 PEG_GTX_C_HRX_P1 PEG_GTX_C_HRX_N1 PEG_GTX_C_HRX_P2 PEG_GTX_C_HRX_N2 PEG_GTX_C_HRX_P3 PEG_GTX_C_HRX_N3 PEG_GTX_C_HRX_P4 PEG_GTX_C_HRX_N4 PEG_GTX_C_HRX_P5 PEG_GTX_C_HRX_N5 PEG_GTX_C_HRX_P6 PEG_GTX_C_HRX_N6 PEG_GTX_C_HRX_P7 PEG_GTX_C_HRX_N7 PEG_GTX_C_HRX_P8 PEG_GTX_C_HRX_N8 PEG_GTX_C_HRX_P9 PEG_GTX_C_HRX_N9 PEG_GTX_C_HRX_P10 PEG_GTX_C_HRX_N10 PEG_GTX_C_HRX_P11 PEG_GTX_C_HRX_N11 PEG_GTX_C_HRX_P12 PEG_GTX_C_HRX_N12 PEG_GTX_C_HRX_P13 PEG_GTX_C_HRX_N13 PEG_GTX_C_HRX_P14 PEG_GTX_C_HRX_N14 PEG_GTX_C_HRX_P15 PEG_GTX_C_HRX_N15

PLTRST_VGA#<16>

RV264

RV264 10K_0402_5%

10K_0402_5%

1 2 2

G

1 3

D

S

D

S

CV14 0.1U_0402_10V7K~DCV14 0.1U_040 2_10V7K~D

1 2

CV15 0.1U_0402_10V7K~DCV15 0.1U_040 2_10V7K~D

1 2

CV16 0.1U_0402_10V7K~DCV16 0.1U_040 2_10V7K~D

1 2

CV195 0.1U_0402_10V7K~DCV195 0.1U_0402_ 10V7K~D

1 2

CV17 0.1U_0402_10V7K~DCV17 0.1U_040 2_10V7K~D

1 2

CV18 0.1U_0402_10V7K~DCV18 0.1U_040 2_10V7K~D

1 2

CV19 0.1U_0402_10V7K~DCV19 0.1U_040 2_10V7K~D

1 2

CV20 0.1U_0402_10V7K~DCV20 0.1U_040 2_10V7K~D

1 2

CV21 0.1U_0402_10V7K~DCV21 0.1U_040 2_10V7K~D

1 2

CV22 0.1U_0402_10V7K~DCV22 0.1U_040 2_10V7K~D

1 2

CV23 0.1U_0402_10V7K~DCV23 0.1U_040 2_10V7K~D

1 2

CV24 0.1U_0402_10V7K~DCV24 0.1U_040 2_10V7K~D

1 2

CV25 0.1U_0402_10V7K~DCV25 0.1U_040 2_10V7K~D

1 2

CV26 0.1U_0402_10V7K~DCV26 0.1U_040 2_10V7K~D

1 2

CV27 0.1U_0402_10V7K~DCV27 0.1U_040 2_10V7K~D

1 2

CV28 0.1U_0402_10V7K~DCV28 0.1U_040 2_10V7K~D

1 2

CV31 0.1U_0402_10V7K~DCV31 0.1U_040 2_10V7K~D

1 2

CV32 0.1U_0402_10V7K~DCV32 0.1U_040 2_10V7K~D

1 2

CV33 0.1U_0402_10V7K~DCV33 0.1U_040 2_10V7K~D

1 2

CV36 0.1U_0402_10V7K~DCV36 0.1U_040 2_10V7K~D

1 2

CV85 0.1U_0402_10V7K~DCV85 0.1U_040 2_10V7K~D

1 2

CV86 0.1U_0402_10V7K~DCV86 0.1U_040 2_10V7K~D

1 2

CV100 0.1U_0402_10V7K~DCV100 0.1U_0402_ 10V7K~D

1 2

CV111 0.1U_0402_10V7K~DCV111 0.1U_0402_ 10V7K~D

1 2

CV115 0.1U_0402_10V7K~DCV115 0.1U_0402_ 10V7K~D

1 2

CV116 0.1U_0402_10V7K~DCV116 0.1U_0402_ 10V7K~D

1 2

CV117 0.1U_0402_10V7K~DCV117 0.1U_0402_ 10V7K~D

1 2

CV182 0.1U_0402_10V7K~DCV182 0.1U_0402_ 10V7K~D

1 2

CV183 0.1U_0402_10V7K~DCV183 0.1U_0402_ 10V7K~D

1 2

CV184 0.1U_0402_10V7K~DCV184 0.1U_0402_ 10V7K~D

1 2

CV193 0.1U_0402_10V7K~DCV193 0.1U_0402_ 10V7K~D

1 2

CV194 0.1U_0402_10V7K~DCV194 0.1U_0402_ 10V7K~D

1 2

RV13 200_0402_1%~D@RV13 200_0402_1%~D@

PLTRST_VGA#

+3.3V_RUN_GFX

@

1 2

RV266 0_0402_5%

RV267

10K_0402_5%

1 2

PEG_HTX_C_GRX_P0 PEG_HTX_C_GRX_N0 PEG_HTX_C_GRX_P1 PEG_HTX_C_GRX_N1 PEG_HTX_C_GRX_P2 PEG_HTX_C_GRX_N2 PEG_HTX_C_GRX_P3 PEG_HTX_C_GRX_N3 PEG_HTX_C_GRX_P4 PEG_HTX_C_GRX_N4 PEG_HTX_C_GRX_P5 PEG_HTX_C_GRX_N5 PEG_HTX_C_GRX_P6 PEG_HTX_C_GRX_N6 PEG_HTX_C_GRX_P7 PEG_HTX_C_GRX_N7 PEG_HTX_C_GRX_P8 PEG_HTX_C_GRX_N8 PEG_HTX_C_GRX_P9 PEG_HTX_C_GRX_N9 PEG_HTX_C_GRX_P10 PEG_HTX_C_GRX_N10 PEG_HTX_C_GRX_P11 PEG_HTX_C_GRX_N11 PEG_HTX_C_GRX_P12 PEG_HTX_C_GRX_N12 PEG_HTX_C_GRX_P13 PEG_HTX_C_GRX_N13 PEG_HTX_C_GRX_P14 PEG_HTX_C_GRX_N14 PEG_HTX_C_GRX_P15 PEG_HTX_C_GRX_N15

PEG_GTX_CRX_P0 PEG_GTX_CRX_N0 PEG_GTX_CRX_P1 PEG_GTX_CRX_N1 PEG_GTX_CRX_P2 PEG_GTX_CRX_N2 PEG_GTX_CRX_P3 PEG_GTX_CRX_N3 PEG_GTX_CRX_P4 PEG_GTX_CRX_N4 PEG_GTX_CRX_P5 PEG_GTX_CRX_N5 PEG_GTX_CRX_P6 PEG_GTX_CRX_N6 PEG_GTX_CRX_P7 PEG_GTX_CRX_N7 PEG_GTX_CRX_P8 PEG_GTX_CRX_N8 PEG_GTX_CRX_P9 PEG_GTX_CRX_N9 PEG_GTX_CRX_P10 PEG_GTX_CRX_N10 PEG_GTX_CRX_P11 PEG_GTX_CRX_N11 PEG_GTX_CRX_P12 PEG_GTX_CRX_N12 PEG_GTX_CRX_P13 PEG_GTX_CRX_N13 PEG_GTX_CRX_P14 PEG_GTX_CRX_N14 PEG_GTX_CRX_P15 PEG_GTX_CRX_N15

CLK_PEG_VGA<14>

CLK_PEG_VGA#<14>

1 2

RV15 2.49K_0402_1%~DRV15 2.49K_0402_1%~D

1 2

RV21 10K_0402_5%~DRV21 10K_0402_5%~D

don't connect to PCH

@

RV265

RV265 10K_0402_5%

10K_0402_5%

CLK_REQ#

4

PEX_TSTCLK_OUT PEX_TSTCLK_OUT# XTALSSIN

12

CLK_REQ#

UV1A

AE12

PEX_RX0

AF12

PEX_RX0_N

AG12

PEX_RX1

AG13

PEX_RX1_N

AF13

PEX_RX2

AE13

PEX_RX2_N

AE15

PEX_RX3

AF15

PEX_RX3_N

AG15

PEX_RX4

AG16

PEX_RX4_N

AF16

PEX_RX5

AE16

PEX_RX5_N

AE18

PEX_RX6

AF18

PEX_RX6_N

AG18

PEX_RX7

AG19

PEX_RX7_N

AF19

PEX_RX8

AE19

PEX_RX8_N

AE21

PEX_RX9

AF21

PEX_RX9_N

AG21

PEX_RX10

AG22

PEX_RX10_N

AF22

PEX_RX11

AE22

PEX_RX11_N

AE24

PEX_RX12

AF24

PEX_RX12_N

AG24

PEX_RX13

AF25

PEX_RX13_N

AG25

PEX_RX14

AG26

PEX_RX14_N

AF27

PEX_RX15

AE27

PEX_RX15_N

AD10

PEX_TX0

AD11

PEX_TX0_N

AD12

PEX_TX1

AC12

PEX_TX1_N

AB11

PEX_TX2

AB12

PEX_TX2_N

AD13

PEX_TX3

AD14

PEX_TX3_N

AD15

PEX_TX4

AC15

PEX_TX4_N

AB14

PEX_TX5

AB15

PEX_TX5_N

AC16

PEX_TX6

AD16

PEX_TX6_N

AD17

PEX_TX7

AD18

PEX_TX7_N

AC18

PEX_TX8

AB18

PEX_TX8_N

AB19

PEX_TX9

AB20

PEX_TX9_N

AD19

PEX_TX10

AD20

PEX_TX10_N

AD21

PEX_TX11

AC21

PEX_TX11_N

AB21

PEX_TX12

AB22

PEX_TX12_N

AC22

PEX_TX13

AD22

PEX_TX13_N

AD23

PEX_TX14

AD24

PEX_TX14_N

AE25

PEX_TX15

AE26

PEX_TX15_N

AB10

PEX_REFCLK

AC10

PEX_REFCLK_N

AF10

PEX_TSTCLK_OUT

AE10

PEX_TSTCLK_OUT_N

AG10

PEX_TERMP

AD9

PEX_RST_N

AE9

PEX_CLKREQ_N

N12P-GV-S-A1_BGA533~D

Part 1 of 5

GPIO

DACA_HSYNC DACA_VSYNC

DACA_GREEN

DACB_HSYNC DACB_VSYNC

DACB_GREEN

PCI EXPRESS

JTAG_TRST_N

TEST

I2C DACADACB

XTAL_OUTBUFF

CLK

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8

GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19

DACA_RED

DACA_BLUE

DACA_VREF DACA_RSET

DACB_RED

DACB_BLUE

DACB_VREF DACB_RSET

JTAG_TCK

JTAG_TDI JTAG_TDO JTAG_TMS

TESTMODE

I2CA_SCL

I2CA_SDA

I2CB_SCL

I2CB_SDA

I2CC_SCL I2CC_SDA

GPIO20 GPIO21

I2CS_SCL

I2CS_SDA

XTAL_SSIN

XTAL_OUT

XTAL_IN

N1

VGA_DP_HPD

G1 C1 M2 M3

GPU_VID_0

K3

GPU_VID_1

K2 J2

THERMTRIP_VGA#

C2

GPU_GPIO9

M1 D2 D1

GPU_CLKDWN_R

J3 J1 K1

DPE_GPU_HPD

F3 G3 G2 F1

DPD_GPU_HPD

F2

AD2 AD1

AE2 AD3 AE3

AF1 AE1

U6 U4

T5 R4 T4

R6 V6

AF3 AG4 AE4 AF4

GPU_JTAG_TRST#

AG3

GPU_TESTMODE

AD25

GPU_CRT_CLK_DDC

R1

GPU_CRT_DAT_DDC

T3

I2CB_SCL

R2

I2CB_SDA

R3

LDDC_CLK_GPU

A2

LDDC_DATA_GPU

B1

I2CH_SCL

A3

I2CH_SDA

A4

GPU_SMBCLK

T1

GPU_SMBDAT

T2

D11

XTALOUTBUFF

E9

E10

CLK_27M_IN

D10

YV1 27MHZ_10PF_X3S027000B A1H-U~D

CLK_27M_IN

CV34

22P_0402_50V8J~D

1 2

G1

1

2

G1

VGA_DP_HPD <32>

GPU_VID_0 <50> GPU_VID_1 <50>

THERMTRIP_VGA# <35>

1 2

RV9 1K_0402_1%~DRV 9 1K_0402_1%~D

GPU_SMBCLK <35>

GPU_SMBDAT <35>

1 2

RV12 10K_0402_5%~DRV12 10K_0402_5%~D

1 2

RV16 10K_0402_5%~DRV16 10K_0402_5%~D

1 2

RV19 0_0402_5%~D

3 4

G2

@

CV35

22P_0402_50V8J~D

NV_CLK_27M_OUT

1

2

+3.3V_RUN_GFX

12

FERMI Changed

+3.3V_RUN_GFX

2

RV10

RV10 10K_0402_5%~D

10K_0402_5%~D

DV3

@DV 3

@

2 1

CH751H-40PT_SOD323-2

CHANGE 0325

RV25 2.2K_0402_5%~DRV25 2.2K_0402_5%~D

RV26 2.2K_0402_5%~DRV26 2.2K_0402_5%~D

RV23 2.2K_0402_5%~DRV23 2.2K_0402_5%~D

RV24 2.2K_0402_5%~DRV24 2.2K_0402_5%~D

RV100 2.2K_0402_5%~DRV100 2.2K_0402_5%~D

RV101 2.2K_0402_5%~DRV101 2.2K_0402_5%~D

RV27 2.2K_0402_5%~DRV27 2.2K_0402_5%~D

RV28 2.2K_0402_5%~DRV28 2.2K_0402_5%~D

RV102 10K_0402_5%~DRV102 10K_0402_5%~D

RV108 2.2K_0402_5%~D

RV109 2.2K_0402_5%~D

12

1 2

@

12

@

12

Title

Size Document Number Rev

Date: Sheet

ACIN <26,43>

DPE_GPU_HPD

DPD_GPU_HPD

LDDC_CLK_GPU

LDDC_DATA_GPU

GPU_CRT_CLK_DDC

GPU_CRT_DAT_DDC

I2CH_SCL

I2CH_SDA

I2CB_SCL

I2CB_SDA

GPU_GPIO9

GPU_SMBCLK

GPU_SMBDAT

1 2

RV2 100K_0402_5%~DRV2 100K_0402_ 5%~D

1 2

RV1 100K_0402_5%~DRV1 100K_0402_ 5%~D

GPU_TESTMODE

Compal Electronics, Inc.

N12P PCIE,I2C,DAC,GPIO

LA-7451P

+3.3V_RUN_GFX

12

RV7

@ RV7

@

10K_0402_5%~D

12

RV8

RV8 10K_0402_5%~D

10K_0402_5%~D

FERMI Changed

1

1.0

34 51Thursday, July 28, 2011

1.0

of

5

AC4 AD4

V5

V4 AA5 AA4

W4

Y4

D D

DP_DDC_CLK<32> DP_DDC_DATA<32>

DISP_A0P_VGA<32>

DP

C C

+3.3V_RUN_GFX

RV49

RV50

B B

1 2

45.3K_0402_1%~D

RV55

RV56

@ RV55

@

1 2

4.99K_0402_1%~D

Hynix 64Mx16 DDR3 part stuff RV59=15K

**

Samsung 64Mx16 DDR3 part stuff RV59=20K

Decive ID change to 0x1056

RV51

RV52

@ RV51

@

1 2

45.3K_0402_1%~D

34.8K_0402_1%~D

RV57

RV58

1 2

34.8K_0402_1%~D

4.99K_0402_1%~D

@

DISP_A0N_VGA<32> DISP_A1P_VGA<32> DISP_A1N_VGA<32> DISP_A2P_VGA<32> DISP_A2N_VGA<32> DISP_A3P_VGA<32> DISP_A3N_VGA<32>

RV53

RV54

@ RV53

@

1 2

4.99K_0402_1%~D

1 2

@

4.99K_0402_1%~D

1 2

10K_0402_1%~D

4.99K_0402_1%~D

@

RV60

RV59

@ RV60

@

1 2

10K_0402_1%~D

34.8K_0402_1%~D

H@

DP_DDC_CLK DP_DDC_DATA

RV98

RV97

@ RV98

@

1 2

10K_0402_1%~D

34.8K_0402_1%~D

RV41

15K_0402_1%~D

STRAP0 STRAP1 STRAP2 STRAP3 STRAP4 ROM_SCLK_GPU ROM_SI_GPU ROM_SO_GPU

RV99

1 2

10K_0402_1%~D

AB4 AB5

AB3 AB2

W1

V1 W3 W2

AA2 AA3 AB1 AA1

G4 G5

P4

N4 M5 M4

L4

K4

H4

J4

D3 D4

F5

F4

E4

D5 C3 C4

B3

B4

F7

G6 D6 C6

A6

A7

B6

B7

E6

E7

Hynix 128Mx16 DDR3 part stuff RV59=35K

A A

Samsung 128Mx16 DDR3 part stuff RV59=45.3K

STRAP0

STRAP1

STRAP2

USER[3:0]

3GIO_PADCFG_LUT_ADR[3:0]

PCI_DEVID[3:0]

5

4

UV1C

IFPA_TXC IFPA_TXC_N IFPA_TXD0 IFPA_TXD0_N IFPA_TXD1 IFPA_TXD1_N IFPA_TXD2 IFPA_TXD2_N IFPA_TXD3 IFPA_TXD3_N

IFPB_TXC IFPB_TXC_N IFPB_TXD4 IFPB_TXD4_N IFPB_TXD5 IFPB_TXD5_N IFPB_TXD6 IFPB_TXD6_N IFPB_TXD7 IFPB_TXD7_N

IFPC_AUX_I2CW_SCL IFPC_AUX_I2CW_SDA_N IFPC_L0 IFPC_L0_N IFPC_L1 IFPC_L1_N IFPC_L2 IFPC_L2_N IFPC_L3 IFPC_L3_N

IFPD_AUX_I2CX_SCL IFPD_AUX_I2CX_SDA_N IFPD_L0 IFPD_L0_N IFPD_L1 IFPD_L1_N IFPD_L2 IFPD_L2_N IFPD_L3 IFPD_L3_N

IFPE_AUX_I2CY_SCL IFPE_AUX_I2CY_SDA_N IFPE_L0 IFPE_L0_N IFPE_L1 IFPE_L1_N IFPE_L2 IFPE_L2_N IFPE_L3 IFPE_L3_N

N12P-GV-S-A1_BGA533~D

Part 3 of 5

2.2K_0402_5%

VGA_SMB_CK2

VGA_SMB_DA2

Resistor Values

4

PGOOD

NCDBG

MULTI_STRAP_REF2_GND

DBG_DATA1 DBG_DATA2 DBG_DATA3 DBG_DATA4

STRAP0

STRAP1

STRAP2

BUFRST_N

LVDS / TMDS

THERMDN

THERMDP

STRAP4

GENERAL STRAPSERIAL

STRAP3

ROM_CS_N

ROM_SCLK

ROM_SI

ROM_SO

IFPAB_RSET

IFPC_RSET

IFPD_RSET

IFPE_RSET

+3.3V_RUN_GFX

RV22

RV29

2.2K_0402_5%

1 2

4

QV7B

2N7002DW-T/R7_SOT363-6

Pull-up to +3V

5K

10K

15K

20K

25K

30K

35K

45K

NC

PGOOD

J5

GB1B-64 : PGOOD

C15

NC

D15

GB1B-64 : MULTI_STRAP_REF2_GND

MULTI_STRAP_REF2_GND

T6 W6 Y6 AA6 N3

STRAP0

C7

STRAP1

B9

STRAP2

A9

N5

D8

D9

N2

F9

B10

C9

A10

C10

AB6

R5

M6

F8

+3.3V_RUN_GFX

5

2N7002DW-T/R7_SOT363-6

1

@CV37

@

100P_0402_50V8J~D

2

STRAP4

STRAP3

ROM_SCLK_GPU

ROM_SI_GPU

ROM_SO_GPU

RV32 1K_0402_1%~D@RV32 1K_0402_1%~D@

RV45 1K_0402_1%~DRV45 1K_0402_1%~D

RV47 1K_0402_1%~DRV47 1K_0402_1%~D

RV48 1K_0402_1%~DRV48 1K_0402_1%~D

2

61

QV7A

3

PU AT EC SIDE, +3VS AND 4.7K

Pull-down to Gnd

1000

1001

1010

1011

1100

1101

1110

1111

3

1 2

RV61 10K_0402_5%~DRV61 10K_0402_5%~D

RV62 40.2K_0402_1%~DRV62 40.2K_0402_1%~D

VGA_THERMDN

CV37

VGA_THERMDP

Fermi changed

1 2

add 0408

PCH_SMLCLK <14,26>

PCH_SMLDATA <14,26>

0000

0001

1 2

add 0408

VGA_THERMDP

VGA_THERMDN

RV106

1 2

0_0402_5%

@

External VGA Thermal Sensor

CV108 0.1U_0402_16V4Z

CV107

1 2

2200P_0402_50V7K

@

B2 B5

B8 B11 B14 B17 B20 B23 B26

E2

E5

E8 E11 E17 E20 E23 E26

H2

H5

J11 J14 J17

K9 K19

L2

L5

L11 L12 L13 L14 L15 L16

L17 M12 M13 M14 M15 M16

P2 P5

P9 P19 P23 P26

T12 T13

W16

E14

set to multi-level straps

+3.3V_RUN_GFX

@

12

0010

0011

0100

0101

0110

0111

ROM_SI

ROM_SO

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

PCIDEVID_EXT, SUB_VENDOR, SLOT_CLK, PEX_PLL_ENROM_SCLK

RAM_CFG[3:0]

XCLK_417, FB_0_BAR_SIZE, ALT_ADOOR, VGA_DEVICE

2

UV1E

N12P-GV-S-A1_BGA533~D

2

Part 5 of 5

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

GND_SENSE

MULTI_STRAP_REF0_GND

GND_SENSE

MULTI_STRAP_REF1_GND

UV2

1

VDD

2

D+

3

SDATA

ALERT#

D-

THERM#4GND

ADM1032ARMZ-2REEL_MS OP8

@

GND

FB_CAL_PU_GND

FB_CAL_TERM_GND

8

SCLK

7

6

5

1

U2

GND

U5

GND

U11

GND

U12

GND

U13

GND

U14

GND

U15

GND

U16

GND

U17

GND

U23

GND

U26

GND

V9

GND

V19

GND

W11

GND

W14

GND

W17

GND

Y2

GND

Y5

GND

Y23

GND

Y26

GND

AC2

GND

AC5

GND

AC6

GND

AC8

GND

AC11

GND

AC14

GND

AC17

GND

AC20

GND

AC23

GND

AC26

GND

AF2

GND

AF5

GND

AF8

GND

AF11

GND

AF14

GND

AF17

GND

AF20

GND

AF23

GND

AF26

GND

T16

GND

T15

GND

T14

GND

F6

GND

VGA_SMB_CK2

VGA_SMB_DA2

THERMTRIP_VGA#

Title

Size Document Number Rev

Date: Sheet

1 2

A15

RV42 40.2_0402_1%~DRV42 40.2_0402_1%~D

B16

1 2

RV43 60.4_0402_1%~DRV43 60.4_0402_1%~D

F11

1 2

RV44 40.2K_0402_1%~DRV44 40.2K_0402_1%~D

F10

1 2

RV46 40.2K_0402_1%~DRV46 40.2K_0402_1%~D

Internal Thermal Sensor

12

RV94

0_0402_5%

1 2

RV93 10K_0402_5%R V93 10K_0402_5%

RV105

0_0402_5%

Address: 0x9A H

@

THERMTRIP_VGA# <34 >

Compal Electronics, Inc.

N12P DP, STRAP, GND

LA-7451P

GPU_SMBCLK <34>

GPU_SMBDAT <34>

+3.3V_RUN_GFX

35 51Thursday, July 28, 2011

1

of

1.0

5

add for GB1b-64

22U_0805_6.3VAM~D

CV164

1

2

D D

NV DG for VDD Cap:

0.022uF 10% X7R x5

0.1uF 10% X7R x5 1uF 10% X7R x3 22uF 10% X5R x2

1U_0603_10V7K~D

CV163

CV162

1

2

0.1U_0402_10V7K~D

CV49

1

2

1U_0603_10V7K~D

CV160

CV161

1

2

0.1U_0402_10V7K~D

0.022U_0402_16V7K~D

CV40

CV50

1

2

4.7U_0603_6.3V6K~D

1

2

0.022U_0402_16V7K~D

CV41

1

2

under GPU

+3.3V_RUN_GFX

4.7U_0603_6.3V6K~D

1

CV74

C C

+3.3V_RUN_GFX

+1.05V_RUN_VTT_GFX

B B

+1.05V_RUN_VTT_GFX

220R 100MHZ

LV9 BLM18PG221SN1D_2P~DLV9 BLM18PG221SN1D_2P~D

12

1U_0402_6.3V6K~D

1

CV118

2

4.7U_0603_6.3V6K~D

1

2

CV74

2

1 2

RV30 0_0402_5%~D

1 2

@

RV31 0_0402_5%~D@RV31 0_0402_5%~D@

1 2

RV89 10K_0402_5%~DRV89 10K_0402_5%~D

1 2

RV103 10K_0402_5%~DR V103 10K_0402_5%~D

1 2

RV104 10K_0402_5%~DR V104 10K_0402_5%~D

1 2

RV107 10K_0402_5%~DR V107 10K_0402_5%~D

1U_0402_6.3V6K~D

CV119

1

CV120

2

220R 100MHZ

LV13

BLM18PG221SN1D_2P~D

1 2

1

2

+IFPAB_IOVDD

+IFPAB_PLLVDD

285mA

+IFPCD_IOVDD

0.1U_0402_10V7K~D

CV121

1

2

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D CV80

CV80

+IFPE_IOVDD

+IFPE_PLLVDD

0.1U_0402_10V7K~D

CV122

1

2

+3.3V_RUN_VDD33

1U_0402_6.3V6K~D

1

CV75

2

+PEX_SVDD_3V3

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D CV81

CV81

1

2

+3.3V_RUN_GFX

0.1U_0402_10V7K~D

CV123

4

+GPU_CORE

@CV159

@

CV159

0.022U_0402_16V7K~D

CV51

CV42

1

2

1

2

0.1U_0402_10V7K~D

1

2

4.7U_0603_6.3V6K~D

1

2

CV42

1

2

0.1U_0402_10V7K~D

CV58

CV59

1

2

0.1U_0402_10V7K~D

1

CV68

CV76

2

+IFPAB_IOVDD

285mA

220mA 220mA

TAI-TECH FCM1608CF-301T03_0603

1 2

CV94

+IFPCD_IOVDD

+IFPE_IOVDD

+IFPAB_PLLVDD

+IFPCD_PLLVDD

+IFPE_PLLVDD

LV6

4.7U_0805_10V7K~D

1

2

add for GB 1b-64

4.7U_0603_6.3V6K~D

@CV44

@

CV44

1

2

0.022U_0402_16V7K~D

CV43

1

2

0.1U_0402_10V7K~D

CV60

1

2

CV69

120mA

12

CV95

1U_0603_10V7K~D

CV96

J10 J12 J13

L9

M9 M11 M17

N9 N11 N12 N13 N14 N15 N16 N17 N19 P11 P12 P13 P14 P15 P16 P17

R9 R11 R12 R13 R14 R15 R16 R17

T9

T11 T17

U9 U19

W9 W10 W12 W13 W18 W19

A12 B12 C12 D12 E12

F12

AG9

V3

V2

H6

AD5

P6

N6

D7

220mA

+IFPCD_PLLVDD

0.1U_0402_10V7K~D

1

2

J9

J6

CV97

UV1D

N12P-GV-S-A1_BGA533~D

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDD33 VDD33 VDD33 VDD33 VDD33 VDD33

PEX_SVDD_3V3

IFPA_IOVDD

IFPB_IOVDD

IFPCD_IOVDD

IFPE_IOVDD

IFPAB_PLLVDD

IFPC_PLLVDD

IFPD_PLLVDD

IFPE_PLLVDD

0.1U_0402_10V7K~D

CV98

1

2

Part 4 of 5

POWER

2A

FB_CAL_PD_VDDQ

+1.05V_RUN_VTT_GFX

0.1U_0402_10V7K~D

CV99

FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ

PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ

PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD

PEX_PLLVDD

VID_PLLVDD

SP_PLLVDD

PLLVDD

FB_PLLAVDD

FB_DLLAVDD

DACA_VDD

DACB_VDD

VDD_SENSE

1U_0402_6.3V6K~D

1

2

3

A13

2.97A

B13 C13 D13 D14 E13 F13 F14 F15 F16 F17 F19 F22 H23 H26 J15 J16 J18 J19 L19 L23 L26 M19 N22 U22 Y22

AG6 AF6 AE6 AD6 AC13 AC7 AB17 AB16 AB13 AB9 AB8 AB7

AG7 AF7 AE7 AD8 AD7 AC9

+PEX_PLLVDD

AF9

+PLLVDD

K6

45mA

L6

60mA

K5

R19

100mA

AC19

T19

100mA

AG2

1 2

RV64 10K_0402_5%~DRV64 10K_0402_5%~D

W5

1 2

RV63 10K_0402_5%~DRV63 10K_0402_5%~D

+1.5V_MEM_VDDQ

B15

W15

E15

route as 5 0ohm

LV12

BLM18PG221SN1D_2P~D

12

CV84

2

Close to Pin C1747 to be close to the GPU

0.01U_0402_25V7K~D

1

2

0.047U_0402_10V7K~D

1

2

0.1U_0402_10V7K~D

1

2

PLACE CLOSE TO BALL PLACE NEAR GPU

0.1U_0402_10V7K~D

1

2

45mA

+FB_AVDD

+VGASENSE <50 >

0.01U_0402_25V7K~D

CV38

1

2

0.047U_0402_10V7K~D

CV52

1

2

0.1U_0402_10V7K~D

CV61

1

2

0.1U_0402_10V7K~D

CV70

1

2

120mA

RV65 40.2_0402_1%~DRV65 40.2_0402_1%~D

150mA , 10mil

0.1U_0402_10V7K~D

CV89

1

2

0.1U_0402_10V7K~D

CV87

CV88

1

2

CV45

CV53

CV62

CV71

12

1

2

20 mil

0.1U_0402_10V7K~D

CV179

1

2

1

2

1

2

1

2

+PLLVDD

22U_0603_6.3V6M~D

1

2

0.01U_0402_25V7K~D

0.047U_0402_10V7K~D

1U_0402_6.3V6K~D

CV180

add for GB 1b-64

1U_0402_6.3V6K~D

CV47

CV46

CV54

CV63

CV72

CV47

1

2

1U_0402_6.3V6K~D

CV55

1

2

1U_0402_6.3V6K~D

CV64

1

2

1U_0402_6.3V6K~D

CV73

1

2

PLACE NEAR GPU

+1.5V_MEM_GFX

10U_0805_6.3V7K

@CV181

@

CV181

1

2

0.1U_0402_10V7K~D

CV165

1

2

4.7U_0603_6.3V6K~D

1

2

4.7U_0603_6.3V6K~D

1

2

4.7U_0603_6.3V6K~D

1

2

4.7U_0603_6.3V6K~D

1

2

add for GB1b-64

CV48

@CV56

@

CV56

CV65

CV77

10U_0805_6.3V6M~D

+1.5V_MEM_GFX

CV39

1

2

N10M SPEC FBVDDQ TYP. 1.8V.

10U_0805_6.3V6M~D

+1.5V_MEM_GFX

CV57

1

2

+1.05V_RUN_VTT_GFX

10U_0805_4VAM~D

22U_0805_6.3VAM~D

CV66

CV67

1

2

22U_0805_6.3VAM~D

1

2

12

120mA

CV67

1

2

+1.05V_RUN_VTT_GFX

10U_0805_4VAM~D

CV79

CV78

1

2

10U_0805_4VAM~D

1U_0603_10V7K~D

CV83

1

CV82

2

add for GB 1b-64

+PEX_PLLVDD

0.1U_0402_10V7K~D

1U_0603_10V7K~D

CV90

1

12

CV92

2

4.7U_0805_10V7K~D

1

2

LV14

12

BLM18PG300SN1D_2P~D

30R 100MHZ

LV15

BLM18AG121SN1D_0603~D

CV93

1

+1.05V_RUN_VTT_GFX

12

4.7U_0603_6.3V6K~D

CV91

1

2

A A

Compal Electronics, Inc.

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

N12P Power

LA-7451P

36 51Thursday, July 28, 2011

1

1.0

of

5

4

3

2

1

FBAD[0..63]

FBA_CMD[0..30]

DQMA#[0..7]

DQSA_RN[0..7]

DQSA_WP[0..7]

D D

10K_0402_5%~D

12

10K_0402_5%~D

12

C C

10K_0402_5%~D

12

10K_0402_5%~D

12

10K_0402_5%~D

12

B B

+1.5V_MEM_GFX

1.1K_0402_1%~D

@RV77

@

12

RV77

1.1K_0402_1%~D

@RV78

1.1K_0402_1%~D

@

12

RV78

A A

FBA_CMD3

RV66

CKE_1

FBA_CMD19

RV68

ODT_2

FBA_CMD0

RV71

ODT_1

FBA_CMD16

RV72

CKE_2

FBA_CMD20

RV75

RST

+FB_VREF

1

2

FBAD[0..63] <38,39>

FBA_CMD[0..30] <38,39>

DQMA#[0..7] <38,39>

DQSA_RN[0..7] <38,39>

DQSA_WP[0..7] <38,39>

16mil

0.01U_0402_25V7K~D

@CV128

@

CV128

5

FBAD0 FBAD1 FBAD2 FBAD3 FBAD4 FBAD5 FBAD6 FBAD7 FBAD8 FBAD9 FBAD10 FBAD11 FBAD12 FBAD13 FBAD14 FBAD15 FBAD16 FBAD17 FBAD18 FBAD19 FBAD20 FBAD21 FBAD22 FBAD23 FBAD24 FBAD25 FBAD26 FBAD27 FBAD28 FBAD29 FBAD30 FBAD31 FBAD32 FBAD33 FBAD34 FBAD35 FBAD36 FBAD37 FBAD38 FBAD39 FBAD40 FBAD41 FBAD42 FBAD43 FBAD44 FBAD45 FBAD46 FBAD47 FBAD48 FBAD49 FBAD50 FBAD51 FBAD52 FBAD53 FBAD54 FBAD55 FBAD56 FBAD57 FBAD58 FBAD59 FBAD60 FBAD61 FBAD62 FBAD63

UV1B

D22

FBA_D0

E24

FBA_D1

E22

FBA_D2

D24

FBA_D3

D26

FBA_D4

D27

FBA_D5

C27

FBA_D6

B27

FBA_D7

A21

FBA_D8

B21

FBA_D9

C21

FBA_D10

C19

FBA_D11

C18

FBA_D12

D18

FBA_D13

B18

FBA_D14

C16

FBA_D15

E21

FBA_D16

F21

FBA_D17

D20

FBA_D18

F20

FBA_D19

D17

FBA_D20

F18

FBA_D21

D16

FBA_D22

E16

FBA_D23

A22

FBA_D24

C24

FBA_D25

D21

FBA_D26

B22

FBA_D27

C22

FBA_D28

A25

FBA_D29

B25

FBA_D30

A26

FBA_D31

U24

FBA_D32

V24

FBA_D33

V23

FBA_D34

R24

FBA_D35

T23

FBA_D36

R23

FBA_D37

P24

FBA_D38

P22

FBA_D39

AC24

FBA_D40

AB23

FBA_D41

AB24

FBA_D42

W24

FBA_D43

AA22

FBA_D44

W23

FBA_D45

W22

FBA_D46

V22

FBA_D47

AA25

FBA_D48

W27

FBA_D49

W26

FBA_D50

W25

FBA_D51

AB25

FBA_D52

AB26

FBA_D53

AD26

FBA_D54

AD27

FBA_D55

V25

FBA_D56

R25

FBA_D57

V26

FBA_D58

V27

FBA_D59

R26

FBA_D60

T25

FBA_D61

N25

FBA_D62

N26

FBA_D63

N12P-GV-S-A1_BGA533~D

Part 2 of 5

MEMORY INTERFACE

FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8

FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30

FBA_DQM0

FBA_DQM1

FBA_DQM2

FBA_DQM3

FBA_DQM4

FBA_DQM5

FBA_DQM6

FBA_DQM7

FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7

FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7

FB_VREF

FBA_CLK0

FBA_CLK0_N

FBA_CLK1

FBA_CLK1_N

FBA_DEBUG

4

FBA_CMD0

G24

FBA_CMD1

F27

FBA_CMD2

F25

FBA_CMD3

F26

FBA_CMD4

G26

FBA_CMD5

G27

FBA_CMD6

G25

FBA_CMD7

J25

FBA_CMD8

J24

FBA_CMD9

H24

FBA_CMD10

H22

FBA_CMD11

J26

FBA_CMD12

G22

FBA_CMD13

G23

FBA_CMD14

J22

FBA_CMD15

J27

FBA_CMD16

M24

FBA_CMD17

L24

FBA_CMD18

J23

FBA_CMD19

K23

FBA_CMD20

K22

FBA_CMD21

M23

FBA_CMD22

K24

FBA_CMD23

M27

FBA_CMD24

N27

FBA_CMD25

M26

FBA_CMD26

K26

FBA_CMD27

K27

FBA_CMD28

K25

FBA_CMD29

M25

FBA_CMD30

L22

DQMA#0

C26

DQMA#1

B19

DQMA#2

D19

DQMA#3

D23

DQMA#4

T24

DQMA#5

AA23

DQMA#6

AB27

DQMA#7

T26

DQSA_RN0

D25

DQSA_RN1

A18

DQSA_RN2

E18

DQSA_RN3

B24

DQSA_RN4

R22

DQSA_RN5

Y24

DQSA_RN6

AA27

DQSA_RN7

R27

DQSA_WP0

C25

DQSA_WP1

A19

DQSA_WP2

E19

DQSA_WP3

A24

DQSA_WP4

T22

DQSA_WP5

AA24

DQSA_WP6

AA26

DQSA_WP7

T27

+FB_VREF

A16

F24 F23

N24 N23

M22

RV76 10K_0402_5%~DRV76 10K_0402_5%~D

1 2

Mode E - Mirror Mode Mapping

TV6PAD~D @TV6PAD ~D @

TV5PAD~D @TV5PAD ~D @

CLKA0 <38> CLKA0# <38>

CLKA1 <39> CLKA1# <39>

+1.5V_MEM_GFX

Address

CMD0

CMD1

CMD2

CMD3

CMD4

CMD5

CMD6

CMD7

CMD8

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD16

CMD17

CMD18

CMD19

CMD20

CMD21

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

CMD30

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

0..31

ODT_L

CS1#_L

CS0#_L

CKE_L

A9

A6

A3

A0

A8

A12

A1

RAS#

A13

BA1

A14

CAS#CMD15

RST

A7

A4

A11

A2

A10

A5

BA2

WE#

BA0

A15

DATA Bus

32..63

A11

A7

BA1

A12

A8

A0

A2

RAS#

A14

A3

A13

CAS#

CKE_H

CS1#_H

CS0#_H

ODT_H

RST

A6

A5

A9

A1

WE#

A4

A15

A10

BA0

BA2

DGPU_PWR_EN<16,28,34,50>

DGPU_PWR_EN#<28>

DGPU_PWR_EN#

RV262

1 2

0_0402_5%

0.1U_0603_25V7K

@

RV257

1 2

10K_0402_5%

0.1U_0402_16V4Z~D

DGPU_PWR_EN#

1 2

0_0402_5%

0.1U_0603_25V7K

510K_0402_5%

CV376

1

2

+3VALW

RV92

100K_0402_5%

CV370

RV259

@

1 2

13

D

2

G

S

1

2

B+

RV67

330K_0402_5%

2

G

CV373

1

2

B+ +VCCP

12

RV73

13

D

2

G

S

QV4

2N7002_SOT23

+3.3V_RUN_GFX Source

+3VS +3.3V_RUN_GFX

QV5

QV5 SI7121DN-T1-GE3_POWERPAK8-5

SI7121DN-T1-GE3_POWERPAK8-5

1 2 3 5

RV256

RV256 1K_0402_5%

1K_0402_5%

12

QV6

SSM3K7002FU_SC70-3

+1.5V_MEM_GFX Source

10U_0805_10V4Z~D

+1.5VS

CV371

1

12

2

RV258 470_0402_5%RV258 470_0402_5%

D

QV2

PMF3800SN_SC70-3

S

1 2

13

60mil(1.4A)

4

3VS_Dgate

SSM3K7002FU_SC70-3

1

CV186

0.1U_0402_16V4Z~D

2

QV1

8 7

5

SI4634DY-T1-E3_SO8~D

12

RV260

2M_0402_5%~D

QV8

3 2 16

4

1

CV125

0.1U_0603_25V7K

2

RV90

470_0603_5%

1 2

13

D

2

G

S

+1.5V_MEM_GFX

10U_0805_6.3V6M~D

1

CV124

2

+1.05V_RUN_VTT_GFX Source

QV3

SI4634DY-T1-E3_SO8~D

8

1

CV374

2

Title

Size Document Number Rev

Date: Sheet

7

5

10U_0805_10V4Z

RV261

1 2

12

RV263

2M_0402_5%~D

4

0_0402_5%

1

@

2

Compal Electronics, Inc.

N12P Memory

LA-7451P

1 2 36

CV127

0.1U_0603_25V7K

1

+1.05V_RUN_VTT_GFX

10U_0805_6.3V6M~D

1

CV126

1

2

CV375

2

37 51Thursday, July 28, 2011

of

3VS_Dgate

1

CV372

2

0.1U_0402_16V4Z~D

1.0

5

4

3

2

1

Memory Partition A - Lower 32 bits

change to Hynix

D D

UV4

0.1U_0402_10V7K~D

1

CV132

2

UV4

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC#

T3

A13

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK#

K9

CKE

K1

ODT

J3

RAS#

L2

CS#

K3

CAS#

L3

WE#

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

M8

VREFCA

H1

VREFDQ

J1

NC

J9

NC

L1

NC

L9

NC

T7

NC

96-BALL

SDRAM DDR3

5TQ2G63BFR-11C_FBGA96

H

H@

0.1U_0402_10V7K~D

1

CV133

CV134

2

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

0.1U_0402_10V7K~D

1

CV135

2

FBAD6

F7

FBAD3

F2

FBAD4

F8

FBAD0

H3

FBAD5

H8

FBAD2

G2

FBAD7

H7

FBAD17

D7

FBAD21

C3

FBAD19

C8

FBAD20

C2

FBAD18

A7

FBAD22

A2

FBAD16

B8

FBAD23

A3

+1.5V_MEM_GFX +1.5V_MEM_GFX

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1 B9 D1 D8 E2 E8 F9 G1 G9

0.1U_0402_10V7K~D

1

CV136

2

Group2

+1.5V_MEM_GFX

1U_0402_6.3V6K~D

1

CV178

2

16mil

12

1U_0402_6.3V6K~D

1

CV188

2

243_0402_1%~D

RV83

1

2

FBA_CMD7 FBA_CMD10 FBA_CMD24 FBA_CMD6 FBA_CMD22 FBA_CMD26 FBA_CMD5 FBA_CMD21 FBA_CMD8 FBA_CMD4 FBA_CMD25 FBA_CMD23 FBA_CMD9 FBA_CMD12 FBA_CMD30

FBA_CMD29 FBA_CMD13 FBA_CMD27

CLKA0 CLKA0# FBA_CMD3

FBA_CMD0 FBA_CMD11 FBA_CMD2 FBA_CMD15 FBA_CMD28

DQSA_WP3 DQSA_WP1

DQMA#3 DQMA#1

DQSA_RN3 DQSA_RN1

FBA_CMD20

+FBA_VREF0

1U_0402_6.3V6K~D

CV137

1U_0402_6.3V6K~D

1

CV138

2

FBAD1

E3

+1.5V_MEM_GFX

1.1K_0402_1%~D

12

RV80

+FBA_VREF0

1.1K_0402_1%~D

0.01U_0402_25V7K~D

RV79

CV129

1

12

2

CLKA0

C C

B B

RV81

RV81 160_0402_1%~D

160_0402_1%~D

1 2

CLKA0#

+1.5V_MEM_GFX

16mil

FBA_CMD7 FBA_CMD10 FBA_CMD24 FBA_CMD6 FBA_CMD22 FBA_CMD26 FBA_CMD5 FBA_CMD21 FBA_CMD8 FBA_CMD4 FBA_CMD25 FBA_CMD23 FBA_CMD9 FBA_CMD12 FBA_CMD30

FBA_CMD29 FBA_CMD13 FBA_CMD27

CLKA0<37>

CLKA0#<37>

1U_0402_6.3V6K~D

1

CV176

2

FBA_CMD3

FBA_CMD0 FBA_CMD11 FBA_CMD2 FBA_CMD15 FBA_CMD28

DQSA_WP0 DQSA_WP2

DQMA#0 DQMA#2

DQSA_RN0 DQSA_RN2

FBA_CMD20

243_0402_1%~D

12

+FBA_VREF0

RV82

1U_0402_6.3V6K~D

CV177

1U_0402_6.3V6K~D

1

CV130

CV131

2

N3

P7 P3

N2

P8

P2 R8 R2

T8 R3

L7 R7 N7

T3 M7

M2 N8 M3

J7

K7

K9

K1

J3

L2

K3

L3

F3 C7

E7 D3

G3

B7

T2

L8

M8 H1

J1

J9

L1

L9

T7

0.1U_0402_10V7K~D

CV139

1

2

UV3

DQL0 DQL1

96-BALL

SDRAM DDR3

0.1U_0402_10V7K~D

CV141

1

2

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

0.1U_0402_10V7K~D

DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

CV142

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A15

BA0 BA1 BA2

CK CK# CKE

ODT RAS# CS# CAS# WE#

DQSL DQSU

DML DMU

DQSL DQSU

RESET

ZQ

VREFCA VREFDQ

NC NC NC NC NC

5TQ2G63BFR-11C_FBGA_96P

H

H@

0.1U_0402_10V7K~D

CV140

FBAD30

E3

FBAD24

F7

FBAD31

F2

FBAD28

F8

FBAD29

H3

FBAD26

H8

FBAD25

G2

FBAD27

H7

FBAD14

D7

FBAD10

C3

FBAD15

C8

FBAD11

C2

FBAD12

A7

FBAD8

A2

FBAD13

B8

FBAD9

A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

0.1U_0402_10V7K~D

CV143

1

2

Group3Group0

Mode E - Mirror Mode Mapping

Group1

FBA_CMD[0..30]

FBAD[0..63]

DQMA#[0..7]

DQSA_RN[0..7]

DQSA_WP[0..7]

Address

CMD0

CMD1

CMD2

CMD3

CMD4

CMD5

CMD6

CMD7

CMD8

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD16

CMD17

CMD18

CMD19

CMD20

CMD21

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

CMD30

0..31

ODT_L

CS1#_L

CS0#_L

CKE_L

A9

A6

A3

A0

A8

A12

A1

RAS#

A13

BA1

A14

CAS#CMD15

RST

A7

A4

A11

A2

A10

A5

BA2

WE#

BA0

A15

FBA_CMD[0..30] <37,39>

FBAD[0..63] <37,39>

DQMA#[0..7] <37,39>

DQSA_RN[0..7] <37,39>

DQSA_WP[0..7] <37,39>

DATA Bus

32..63

A11

A7

BA1

A12

A8

A0

A2

RAS#

A14

A3

A13

CAS#

CKE_H

CS1#_H

CS0#_H

ODT_H

RST

A6

A5

A9

A1

WE#

A4

A15

A10

BA0

BA2

A A

Compal Electronics, Inc.

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

VRAM A Lower

LA-7451P

38 51Thursday, July 28, 2011

1

1.0

of

5

4

Memory Partition A - Upper 32 bits

3

2

1

FBAD[0..63]

D D

UV5

96-BALL

SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

16mil

+1.5V_MEM_GFX

1.1K_0402_1%~D

RV84

12

+FBA_VREF1

1.1K_0402_1%~D

0.01U_0402_25V7K~D

12

RV85

CV144

1

2

C C

CLKA1<37>

CLKA1

RV86

RV86 160_0402_1%~D

160_0402_1%~D

1 2

CLKA1#

B B

CLKA1#<37>

12

+1.5V_MEM_GFX +1.5V_MEM_GFX

FBA_CMD9 FBA_CMD24 FBA_CMD10 FBA_CMD13 FBA_CMD26 FBA_CMD22 FBA_CMD21 FBA_CMD5 FBA_CMD8 FBA_CMD23 FBA_CMD28 FBA_CMD4 FBA_CMD7 FBA_CMD14 FBA_CMD27

FBA_CMD29 FBA_CMD6 FBA_CMD30

FBA_CMD16

FBA_CMD19 FBA_CMD11 FBA_CMD18 FBA_CMD15 FBA_CMD25

DQSA_WP4 DQSA_WP5

DQMA#4 DQMA#5

DQSA_RN4 DQSA_RN5

FBA_CMD20

243_0402_1%~D

+FBA_VREF1 +FBA_VREF1

RV87

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC#

T3

A13

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK#

K9

CKE

K1

ODT

J3

RAS#

L2

CS#

K3

CAS#

L3

WE#

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

M8

VREFCA

H1

VREFDQ

J1

NC

J9

NC

L1

NC

L9

NC

T7

NC

5TQ2G63BFR-11C_FBGA_96P

H

H@

FBAD35

E3

FBAD32

F7

FBAD38

F2

FBAD33

F8

FBAD37

H3

FBAD34

H8

FBAD39

G2

FBAD36

H7

FBAD42

D7

FBAD46

C3

FBAD40

C8

FBAD45

C2

FBAD44

A7

FBAD43

A2

FBAD41

B8

FBAD47

A3

+1.5V_MEM_GFX +1.5V_MEM_GFX

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1 B9 D1 D8 E2 E8 F9 G1 G9

Group4

Group5

16mil

12

FBA_CMD9 FBA_CMD24 FBA_CMD10 FBA_CMD13 FBA_CMD26 FBA_CMD22 FBA_CMD21 FBA_CMD5 FBA_CMD8 FBA_CMD23 FBA_CMD28 FBA_CMD4 FBA_CMD7 FBA_CMD14 FBA_CMD27

FBA_CMD29 FBA_CMD6 FBA_CMD30

CLKA1 CLKA1# FBA_CMD16

FBA_CMD19 FBA_CMD11 FBA_CMD18 FBA_CMD15 FBA_CMD25

DQSA_WP7 DQSA_WP6

DQMA#7 DQMA#6

DQSA_RN7 DQSA_RN6

FBA_CMD20

243_0402_1%~D

RV88

UV6

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC#

T3

A13

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK#

K9

CKE

K1

ODT

J3

RAS#

L2

CS#

K3

CAS#

L3

WE#

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

M8

VREFCA

H1

VREFDQ

J1

NC

J9

NC

L1

NC

L9

NC

T7

NC

96-BALL

SDRAM DDR3

5TQ2G63BFR-11C_FBGA_96P

H

H@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

FBAD61

E3

FBAD57

F7

FBAD58

F2

FBAD60

F8

FBAD56

H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

FBAD62 FBAD59 FBAD63

FBAD51 FBAD52 FBAD49 FBAD53 FBAD48 FBAD54 FBAD50 FBAD55

Group7

Mode E - Mirror Mode Mapping

Group6

FBA_CMD[0..30]

DQMA#[0..7]

DQSA_RN[0..7]

DQSA_WP[0..7]

Address

CMD0

CMD1

CMD2

CMD3

CMD4

CMD5

CMD6

CMD7

CMD8

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD16

CMD17

CMD18

CMD19

CMD20

CMD21

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

1U_0402_6.3V6K~D

1

CV189

2

1U_0402_6.3V6K~D

1

2

1

CV146

CV145

CV190

2

0.1U_0402_10V7K~D

1

CV147

2

0.1U_0402_10V7K~D

CV148

CV149

1

2

0.1U_0402_10V7K~D

CV151

CV150

1

2

1U_0402_6.3V6K~D

1

CV192

CV191

2

1U_0402_6.3V6K~D

1

CV153

CV152

2

0.1U_0402_10V7K~D

CV154

1

2

0.1U_0402_10V7K~D

CV155

CV156

1

2

0.1U_0402_10V7K~D

CV158

CV157

1

2

CMD30

DATA Bus

0..31

ODT_L

CS1#_L

CS0#_L

CKE_L

A9

A6

A3

A0

A8

A12

A1

RAS#

A13

BA1

A14

CAS#CMD15

RST

A7

A4

A11

A2

A10

A5

BA2

WE#

BA0

A15

FBAD[0..63] <37,38>

FBA_CMD[0..30] <37,38>

DQMA#[0..7] <37,38>

DQSA_RN[0..7] <37,38>

DQSA_WP[0..7] <37,38>

32..63

A11

A7

BA1

A12

A8

A0

A2

RAS#

A14

A3

A13

CAS#

CKE_H

CS1#_H

CS0#_H

ODT_H

RST

A6

A5

A9

A1

WE#

A4

A15

A10

BA0

BA2

A A

Compal Electronics, Inc.

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

VRAM A Upper

LA-7451P

39 51Thursday, July 28, 2011

1

1.0

of

5

4

3

2

Version change list (P.I.R. List) EE section Page 1 of 2

1

Item Reason for change PG# Modify List

SMbus signal Pull HIGH

1

SMbus signal Pull HIGH

2

vss pull low

3

hdmi HPD

D D

C C

4 5

PEG_A_CLKRQ# CONTROL Add RV264, RV265, RV266, RV267, QV9

6

sounds too small

7

protect HDMI plug in noise

8

Modify USB3.0 Solution

9

change Lan symbol

10

Power LED no light when S3 Change JBTN1 Pin1 from +5VS to +5VALW net

11

ESD request Add CC70

12

ESD request

13

ESD request

14

ESD request

15

ESD request

16

USB 3.0 Wake issue

17

USB 3.0 Wake issue

18

T Change BOM UV2,CV107,CV108,RV108,RV109 to remove

19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36

B B

37 38 39

15

25

35

29

34

31

29

30

22

21

30

Add R983,R984

Add RV22 ,RV29,QV7

Add RV106

Add R636

Add RV10GPU_CLKDWN_R PULL HIGH

Change RC134, RC137 from 47K to 560ohm

add CV101

JLAN1

Add CH101

Add CC71~CC75

Add CC76~CC80

Del CFG1,3,8,9,10,11,16,17

Del RI19,Add CI51

Change RI18 Pin1 to UI2 pin7

Change BOM C549 to SE124474K80LCD timing

Change BOM U48 to SA00003K80

Change BOM UV1 to SA00004Q40L

Date Phase

2011/04/07

2010/10/15

2010/10/17

2010/10/20

2010/10/22

2010/10/24

2010/10/26

2010/12/1

2010/12/6

2010/12/8

2010/12/9

PT

ST

PT

ST

40 41 42 43 44 45 46 47 48 49 50 51 52

A A

53 54

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/07/25 2010/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

HW Changed-List History-1

LA-6961P

1

of

40 51Thursday, July 28, 2011

of

40 51Thursday, July 28, 2011

of

40 51Thursday, July 28, 2011

1.0

5

D D

4

3

2

1

C C

RV59

1 2

45.3K_0402_1%~D

S@

B B

A A

5

S@

243_0402_1%~D

12

UV3

4

S@

243_0402_1%~D

12

UV4

S@

243_0402_1%~D

12

UV5

S@

243_0402_1%~D

12

UV6

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

3

Date: Sheet of

<Title>

LA-7451P 0.2

A

LA-7451P 0.2

A

LA-7451P 0.2

A

of

41 51Thursday, July 28, 2011

2

41 51Thursday, July 28, 2011

1

5

4

3

2

1

ADPIN

JDCIN1

@JDCIN1

D D

C C

B B

@

9

GND_6

8

GND_5

7

GND_4

6

GND_3

5

GND_2

4

GND_1

SINGA_2DC-S060-017F

DOCK_PSID PSID-3

V+

ID

2

1

3

2

1

3

@

PD3

PD3 SM24_SOT23

SM24_SOT23

12

PC1

100P_0402_50V8J

BLM18BD102SN1D_0603~D

PR8

PR8 0_0402_5%@

0_0402_5%@

1 2

D

1 3

G

2

PR11

1 2

100K_0402_1%

PSID-1

PR14

15K_0402_1%

1 2

PD7

LL4148_LL34-2

BATT+

LL4148_LL34-2

C

PQ5

2

B

MMST3904-7-F_SOT323~D

E

3 1

@

12

2

PL1

SMB3025500YA_2P

1 2

PC2

1000P_0402_50V7K

PL2

DOCK_PSIDPSID

12

PD2

PR10

33_0402_5%

S

1 2

PQ4

PQ4 FDV301N_NL_SOT23-3~D

FDV301N_NL_SOT23-3~D

PSID-2

PJP14

112

JUMP_43X39

12

PC3

100P_0402_50V8J

3

DA204U_SOT323~D

1

2

+5VALW

12

VIN

1 2

VS-1

12

PR20

68_1206_5%

VIN

12

PC4

1000P_0402_50V7K

PR12

10K_0402_1%

PR15

1 2

10K_0402_1%

PD5

PD5 LL4148_LL34-2

LL4148_LL34-2

PR21

12

68_1206_5%

+3VALW+5VALW

PR9

2.2K_0402_5%

1 2

+5VALW

2

3

PD4

@

DA204U_SOT323~D

1

PSID-5

VS

PS_ID <26>

Pre-V

12

PR27

0_0402_5%

1 2

PC9

12

0.22U_0603_25V7K

12

51ON#-1

PC11

PC11 10U_0603_6.3V6M

10U_0603_6.3V6M

@

4

PR22

100K_0402_5%

PR25

22K_0402_1%

51ON#<24>

1 2

+3VLP

A A

+CHGRTC

@

JRTC1

G1 G2

ACES_85204-02001

PD8

+

1 2

1

PR29

2

1K_0402_1%

3 4

5

2

RTC-1R TC

3

BAS40CW_SOT323-3

1

+RTCVCC

13

37.1

PQ6

2

TP0610K-T1-E3_SOT23-3

PU3

PU3 BIT3021A-ST9_SOT89-3@

BIT3021A-ST9_SOT89-3@

3

VOUT

GND

1

VIN

12

PC10

0.1U_0603_25V7K

12

N2

2

12

PR28

PR28 200_0603_5%@

200_0603_5%@

PC12

PC12 1U_0805_25V6K@

1U_0805_25V6K@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/12/24 2011/12/24

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

PWR-DCIN / Vin Detector

S

Size Document Number Rev

ize Document Number Rev

Custom

Date: Sheet

1

of

42 51Thursday, July 28, 2011

of

42 51Thursday, July 28, 2011

of

42 51Thursday, July 28, 2011

1.0

A

B

C

D

Iada=0~4.615A(90W/19.5V=4.615A)

ADP_I = 19.9*Iadapter*Rsense

PQ9

PQ9 AO4407A_SO8

VIN

1 1

12

PR32

PR32 200K_0402_1%

200K_0402_1%

2

V1

61

D

2

G

S

PQ16A

PQ16A SSM6N7002FU_US6

2 2

SSM6N7002FU_US6

PACIN

ACON

ACOFF<26>

8 7

5

47K

2

47K

BB-1

13

PQ13

PDTC115EU_SOT323-3

PACIN

1 2

ACOFF

AO4407A_SO8

1 3

PQ12

PQ12 PDTA144EU_SOT323-3

PDTA144EU_SOT323-3

PR51

47K_0402_1%

2

CP = 90%*Iada ; CP = 4.15A

PQ10

SI4459ADY-T1-GE3_SO8

1 2 3 6

4

PR36

PR36 200K_0402_1%

200K_0402_1%

BB-4

FSTCHG<26>

12

PR42

PR42 150K_0402_1%

150K_0402_1%

BB-2

34

D

PQ16B

S

SSM6N7002FU_US6

PR55

147K_0402_1%

PR57

100K_0402_1%

12

1 2 36

4

12

13

P2

12

PC18

0.1U_0603_25V7K

5

G

IREF<26>

PQ20

PDTC115EU_SOT323-3

8 7

5

1 2

PC14

5600P_0402_25V7K

1 2

PC28

0.01U_0402_25V7K

ADP_I<26,49>

12

6251VREF

PC32

0.01U_0402_25V7K

P3

PD11 1SS355_SOD323-2PD11 1S S355_SOD323-2

0.1U_0402_16V7K

PR46

PR46 47K_0402_5%

47K_0402_5%

6251VDD

6251COMP-1

PR49 10K_0402_1%PR49 10K_0402_1%

1 2

100P_0402_50V8J@

.1U_0402_16V7K

6251VREF 6251ACLIM

1 2

10K_0402_1%

1 2

PR41

10K_0402_5%

1 2

PC22

1 2

PC29

PC30

1 2

PR58

1

2

PR30

0.02_2512_1%

ACSETIN

12

PR43

PC26 6800P_0402_25V7KPC26 6800P_0402_25V7K

1 2

PR52

100_0402_1%

1 2

6251VREF

12

PR60

20.5K_0402_1%

PL17

1UH_PH041H-1R0MS_3.8A_20%

B+

4

3

6251VDD

RB751V-40_SOD323-2

12

PC19

2.2U_0603_6.3V6K

PU4

1

VDD

DCIN

2

ACSET

ACPRN

6251_EN CSON

6251ICM

6251VREF

6251VADJ

3

EN

CSON

4

CELLS

CSOP

5

ICOMP

CSIN

6

VCOMP

CSIP

7

PHASE

ICM

8

UGATE

VREF

9

CHLIM

BOOT

10

ACLIM

VDDP

11

VADJ

LGATE

12

PGND

GND

ISL6251AHAZ-T_QSOP24

100K_0402_1%

6251CELL

6251ICOMP

6251VCOMP

6251CHILM

1UH_PH041H-1R0MS_3.8A_20%

VIN

PR33

1 2

0_0402_5%

PD10

1 2

VIN-1

12

PC20

PR39

10_1206_5%

DCIN

24

ACPRN

23

6251CSON

22

6251CSOP

21

6251CSIN

20

6251CSIP

0.1U_0603_25V7K

19

1 2

LX_CHG

18

DH_CHG

17

BST_CHG

16

6251VDDP

15

DL_CHG

14

13

1 2

PJP2

2

@

JUMP_43X118

PRECHG-1

12

PR37

191K_0402_1%

12

1000P_0402_50V7K

PC23

0.1U_0603_25V7K

12

ACPRN <44>

PC25

0.047U_0603_16V7K

1 2

PR47

20_0402_5%

PC27

PR56

2.2_0603_5%

1 2

PC36

1 2

4.7U_0603_6.3V6M

@PJP2

@

112

CSIN

CSIP

ACSETIN

PR40

15K_0402_1%

PR44

20_0402_5%

1 2

12

PR48

PR48 20_0402_5%

20_0402_5%

1 2

PR50

2_0402_5%

0.1U_0603_25V7K

BST_CHGA

12

PD13

PD13 SD103AWS SOD323-2

SD103AWS SOD323-2

1 2

PC31

PR59

4.7_0603_5%

PC15

4.7U_0805_25V6-K

CSOP

12

6251VDD

12

PC16

4.7U_0805_25V6-K

AON7702L_DFN8-5

12

PC17

0.1U_0603_25V7K

AON7408L_DFN8-5

PQ19

CHG_B+

PC13

2200P_0402_25V7K

PQ18

4

PQ11

AO4407A_SO8

1 2 3 6

12

PR35

47K_0402_1%

PR45

100K_0402_1%

V1

PL3

10U_LF919AS-100M-P3_4.5A_20%

3 5

241

5

1 2

12

PR54

4.7_1206_5%

@

CHG_ANB

12

123

PC33

680P_0402_50V7K

@

4

BAT_DIS-3

1 2

BAT_DIS-2

13

ACPRN

8 7

5

PR31

200K_0402_1%

1 2

PQ14

PQ14 PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

2

12

PC21

2200P_0402_25V7K

2

G

12

SSM3K7002FU_SC70-3

CHGCHG

1

2

VIN

PD9

1 2

1SS355_SOD323-2@

200K_0402_1%@

BAT_DIS_G

PD12

BAT_DIS-1

1 2

1SS355_SOD323-2@

12

PC24

13

D

0.1U_0603_25V7K@

S

PQ17

@

PQ17

@

only BOM change 10/05

PR53

0.02_1206_1%

4

3

ACOFF

PR38

1 2

13

D

S

12

PC81

10U_0805_25V6K

@

VIN

@

PACIN

PQ15

2

G

SSM3K7002FU_SC70-3

12

PC34

PC125

10U_0805_25V6K

@

BATT+

12

PC35

10U_0805_25V6K

PR61

25.5K_0402_1%

CHGVADJ<26>

3 3

CP mode

Iinput=(1/0.02)(0.05*Vaclm/2.39+0.05) Vaclim=2.39*((20.5K//152K)/((10K//152K)+(20.5K//152K)))

CC=2.8A

IREF=1*Icharge

IREF=0.25V~3.3V

4 4

BATT Type Charging Voltage

CV mode

(0x15)

Normal 4S LI-ON Cells

14800mV

A

14.80V

CHGVADJ CV mode

0V

1.93V

3.3V

1 2

3.99V per cell

4.2V per cell

4.35V per cell

1 2

B

PR62

43.2K_0402_1%

PR63

47K_0402_1%

ACPRN

6251VDD

12

PR64

PR64 10K_0402_1%

10K_0402_1%

13

PQ21

PQ21 PDTC115EU_SOT323-3

2

PDTC115EU_SOT323-3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PR65

10K_0402_1%

1 2

PACIN

12

PR66

14.3K_0402_1%

2010/12/24 2011/12/24

ACIN <26,34>

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

PWR-CHARGER

Size Document Number Rev

Custom

Date: Sheet

D

of

43 51Thursday, July 28, 2011

of

43 51Thursday, July 28, 2011

of

43 51Thursday, July 28, 2011

1.0

5

3.3VALWP TDC 4.02 A Peak Current 5.7A OCP current 7.4 A

4

3

2

1

2VREF_51125

D D

PR67

13K_040 2_1%

1 2

PR69

110K_04 02_1%

BST_3V

UG_3V

LX_3V

LG_3V

PC53

100K_0402_1%

1U_0603_10V6K

PR69

20K_040 2_1%

1 2

PR71

1 2

PU5

25

P PAD

7

VO2

8

VREG3

9

BOOT2

10

UGATE2

11

PHASE2

12

LGATE2

3/5V_EN

3/5V_SKIPS EL

12

1 2

2VREF_51125

2010/12/ 24 2011/12/ 24

3

TPS51125_B+

PL4

HCB2012 KF-121T50_080 5

B+

1 2

12

PR85

4.7U_0805_25V6-K

12

2

12

PC40

4.7U_0805_25V6-K

1 2

PR84

PR84 100K_04 02_1%

100K_04 02_1%

3/5V_EN-3

PC41

2200P_0402_50V7K

PL5

4.7UH_PC MC063T-4R7MN_ 5.5A_20%

1 2

1

+

PC49

2

150U_B2_6.3VM_R35M

VL

PR83

1 2

0_0402_ 5%

13

D

2

G

S

13

S

PQ28

SSM3K70 02FU_SC70-3

PQ29

PQ29 PDTC115 EU_SOT323-3

PDTC115 EU_SOT323-3

12

PR75

4.7_1206_5%

SNB_3V

12

PC51

680P_0402_50V7K

PQ26A

SSM6N70 02FU_US6

100K_04 02_1%

3/5V_EN-2

12

PR86

40.2K_0402_1%

123

12

241

D

S

3 5

5

61

PR82

PC56

PQ35

PQ35 AON7408 L_DFN8-5

AON7408 L_DFN8-5

4

PQ36

AON7702 L_DFN8-5

G

12

2

2.2U_0603_10V6K

4

12

PC38

PC39

0.1U_0603_25V7K

C C

0.1U_0603_25V7K

+3VALWP

B B

+3VALW P + 3VALW

PJP3

2

112

JUMP_43 X118@

MAINPWON<49>

VS

A A

ACPRN<43>

EC_ON<24,26>

1 2

200K_04 02_1%

5

2

Typ: 175mA

B+

VS

5

G

3/5V_EN-1

13

PQ27

PQ27 PDTC115 EU_SOT323-3

PDTC115 EU_SOT323-3

+3VLP

12

PC46

4.7U_0805_10V6K

PR73

1 2

PC47

0.1U_040 2_16V7K

PR77

499K_04 02_1%

1 2

PR78

499K_04 02_1%

1 2

34

D

S

PR73

1 2

2.2_0603 _5%

@

12

PR80

ENTRIP2ENTRIP1

PQ26B

PQ26B SSM6N70 02FU_US6

SSM6N70 02FU_US6

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PC37

1U_0603_10V6K

3/5V_FB2

ENTRIP2

6

ENTRIP2

EN

13

1 2

PR79

0_0402_ 5%@

PR81

PR81 0_0402_ 5%

0_0402_ 5%

12

3

4

5

FB2

REF

TONSEL

VFB=2.0V

SKIPSEL

VIN16GND

14

15

12

PR68

30K_040 2_1%

3/5V_FB1

1 2

PR70

20K_040 2_1%

1 2

PR72

130K_04 02_1%

ENTRIP1

1 2

2

1

FB1

ENTRIP1

24

VO1

23

PGOOD

22

BOOT1

21

UGATE1

20

PHASE1

19

LGATE1

RT8205L ZQW_W QFN24_4X4

NC18VREG5

17

12

PC55

0.1U_060 3_25V7K

Compal Secret Data

Typ: 175mA

PC54

4.7U_0805_10V6K

Deciphered Date

VL

TPS51125_B+

BST_5V

UG_5V

LX_5V

LG_5V

TPS51125_B+

PC42

4.7U_0805_25V6-K

1 2

PR74

2.2_0603 _5%

12

PC43

4.7U_0805_25V6-K

SPOK <49>

BST_5V-1BS T_3V-1

1 2

2

12

PC45

PC44

0.1U_0603_25V7K

2200P_0402_50V7K

PC48

0.1U_040 2_16V7K

AON7702 L_DFN8-5

12

PQ51

AON7408 L_DFN8-5

PQ52

3 5

241

PL6

4.7UH_PC MC063T-4R7MN_ 5.5A_20%

1 2

12

5

PR76

4.7_1206_5%

4

+5VALW P + 5VALW

SNB_5V

12

PC52

123

680P_0402_50V7K

PJP4

2

112

JUMP_43 X118@

1

+

2

5VALWP TDC 4.9A Peak Current 7A OCP current 9.6 A

Compal Electronics, Inc.

Title

3VALWP/5VALWP

Size Do cument Number Rev

Custom

Date: Sheet

44 51Thursday, July 28, 2011

1

+5VALWP

PC50

150U_B2_6.3VM_R35M

of

1.0

A

1 1

PR88

1 2

57.6K_0402_1%

PC63

57.6K_0402_1%

12

PR89

SYSON<26,28>

1 2

0_0402_5%

@

0.1U_0402_16V7K

TRIP_1.5V

EN_1.5V

FB_1.5V

RF_1.5V

12

PR91

PR91 470K_0402_5%~D

470K_0402_5%~D

B

PU6

1

VBST

PGOOD

2

TRIP

DRVH

3

EN

VFB

RF

SW

V5IN

DRVL

TP

4

5

TPS51212DSCR_SON10_3X 3~D

C

PJ1

1.5_8209_B+

786

5

PQ30

4

AO4406AL_SO8

578

3 6

123

241

1UH_FDV0630-H-1R0M =P3_10.3A_20%

12

4.7_1206_5%

PQ31

AO4456_SO8

4.7_1206_5%

SNB_1.5V

12

680P_0402_50V7K

PR87

2.2_0603_5%

BST_1.5V

10

1 2

UG_1.5V

9

SW_1.5V

8

7

LG_1.5V

6

11

0.22U_0603_25V7K

BST_1.5V-1

+5VALW

1 2

PC62

1U_0603_6.3V6M~D

PC61

1 2

12

PC57

2200P_0402_50V7K

1 2

PR90

PC65

12

PC58

0.1U_0603_25V7K

PL7

PC60

PC59

4.7U_0805_25V6-K

PJ1

2

112

JUMP_43X118@

12

4.7U_0805_25V6-K

12

PC170

PC169

.1U_0402_16V7K

10U_0805_6.3V6M

D

+1.5VP

1

+

PC64

PC64 220U_D2_2VY_R15M

220U_D2_2VY_R15M

2

1.5VP

B+

TDC 12 A

PR93

PR92

2 2

1 2

21K_0402_1%~D

1 2

0.1U_0603_25V7K

@

PC66

PR93

24K_0402_1%

12

Peak Current 15.6 A OCP current 20.2 A

PJP5

2

112

JUMP_43X118@

PJP6

2

112

JUMP_43X118@

+1.5V+1.5VP

3 3

+1.5V

PU7

PC67

4.7U_0805_6.3V6K

1 2

PR95

10K_0402_1%

SUSP<28>

4 4

A

1 2

0.75V_EN

PC71

.1U_0402_16V7K

13

D

PQ32

2

SSM3K7002FU_SC70-3

G

12

S

B

PR94

1K_0402_1%

PR96

12

0.75VSP_VREF

12

PC69

.1U_0402_16V7K

1K_0402_1%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

VIN1VCNTL

2

GND

3

VREF

4

VOUT

APL5336

12

PC70

PC70 10U_0603_6.3V6M

10U_0603_6.3V6M

+0.75VSP

6

5

NC

7

NC

8

NC

9

TP

2009/12/01 2010/12/31

+3VALW

12

PC68

PC68 1U_0603_10V6K

1U_0603_10V6K

Compal Secret Data

Deciphered Date

C

+0.75VSP Thermal Design Current:0.7A Peak current:1A Vout=VDDQSNS/2=1.5V/2=0.75V

PJP18

2

112

JUMP_43X79@

+0.75VS+0.75VSP

Compal Electronics, Inc.

Title

PWR-+1.5VP/+0.75V

S

ize D ocument Number Rev

Size D ocument Number Rev

Custom

Date: Sheet

Date: Sheet of

D

45 51Thursday, J uly 28, 2011

of

1.0

5

4

3

2

1

VTTPW RGOOD<47>

D D

PR101

SUSP#<10,26,28>

C C

1 2

0_0402_ 5%

0.1U_040 2_16V7K

@

PC77

1 2

PR97

PR97 10K_040 2_1%

10K_040 2_1%

PR98

PR98 10K_040 2_1%@

10K_040 2_1%@

+5VALW

1U_0603 _6.3V6M~D

+3VS

12

80.6K_04 02_1%

+3VS

12

PC78

12

EN_VCCP

PR103

1 2

10K_040 2_1%

PR100

PU8

5

VCC

9

PGOOD

8

EN

11

G0

12

GND

10

CS

RT8240B ZQW_W QFN12_2X2

1 2

13

GND

BOOT

UGATE

PHASE

LGATE

VOUT

RGND

4

3

2

1

6

7

BST_VCC P

UG_VCCP

SW_ VCCP

LG_VCCP

PR99

0_0603_ 5%

1 2

0.1U_060 3_25V7K

BST_VCC P-1

PC76

1 2

0_0402_ 5%

PR105

0_0402_ 5%

PR108

12

AO4406A L_SO8

AO4456_ SO8

VCCIO_SEN SE <9>

VSSIO_SEN SE <9 >

PQ33

PQ34

5

4

578

10_0402 _5%

3 6

PR218

786

123

241

VCCP_B+

12

PC72

PC73

0.1U_0603_25V7K

2200P_0402_50V7K

PL8

1UH_FDV 0630-H-1R0M=P3 _10.3A_20%

12

PR102

4.7_1206 _5%

SNB_VCC P

12

PC80

680P_04 02_50V7K

12

PC74

4.7U_0805_25V6-K

12

PR104

10_0402 _5%

12

PC75

4.7U_0805_25V6-K

1 2

PJ2

2

112

JUMP_43 X118@

12

+VCCPP

12

PC171

.1U_0402_16V7K

1

12

+

PC79

PC79 220U_B2 _2.5VM_R15M

PC172

10U_0805_6.3V6M

220U_B2 _2.5VM_R15M

2

+VCCPP TDC 10 A Peak Current 13 A OCP current 16.9 A

PJP8

2

112

JUMP_43 X118@

PJP9

2

112

JUMP_43 X118@

B+

+VCCP+VCCPP

PL9

PJP10

+5VALW

B B

A A

5

2

112

JUMP_43 X79@

SUSP#<10,26,28>

12

1 2

PR110

PR110 10K_040 2_1%

10K_040 2_1%

PC83

PC83 10U_080 5_10V6K

10U_080 5_10V6K

EN_1.8V

1M_0402 _5%

4

VIN_1.8V

12

PC82

PC82 10U_080 5_10V6K

10U_080 5_10V6K

PR112

12

PC87

1 2

0.47U_0402_6.3V6K

Security Class ification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

10

PVIN

PG

9

PVIN

8

SVIN

5

EN

TP

NC

7

11

PU9

PU9 SY8033BDB C_DFN10_3X3

SY8033BDB C_DFN10_3X3

Issued Date

2

LX

3

LX

6

FB

NC

1

PR113

14.3K_04 02_1%

LX_1.8V

FB_1.8V

1 2

12

2010/12/ 24 2011/12/ 24

3

PL9

1UH_PH0 41H-1R0MS_3.8A _20%

1 2

PR109

4.7_1206 _5%

SNB_1.8V

1 2

PC84

PC84 680P_06 03_50V7K

680P_06 03_50V7K

1 2

PR111

28.7K_04 02_1%

12

PC88

PC88 22P_040 2_50V8J@

22P_040 2_50V8J@

Compal Secret Data

Deciphered Date

+1.8VSP

12

PC85

PC86

1.8VSP TDC 2 A Peak Current 3 A

22U_0805_6.3VAM

2

22U_0805_6.3VAM

PJP11

2

112

JUMP_43 X118@

Compal Electronics, Inc.

Title

+VCCP/+1.8VSP

Size Do cument Number Rev

Custom

Date: Sheet

46 51Thursday, July 28, 2011

1

+1.8VS+1.8 VSP

1.0

of

5

D D

PR116

VTTPWRGOOD<46>

C C

+3VS

PR122

VCCSA_SEL<10>

PR126

VCCSA_SEL-1

1 2

2

0_0402_5%

PR128

@PR128

@

10K_0402_5%

B B

10K_0402_5%

1 2

PR122 10K_0402_5%

10K_0402_5%

1 2

PR125

10K_0402_5%

1

3

1 2

12

PQ38

PR127

@

100K_0402_5%

PMBT2222A_SOT23-3

1 2

0_0402_5%

0.1U_0402_16V7K

12

PR123

PR123 20K_0402_1%

20K_0402_1%

VCCSA_SEL-4

13

D

VCCSA_SEL-3VCCSA_SEL-2

D

PQ37

2

SSM3K7002FU_SC70-3

G

S

12

PC100

0.047U_0402_16V7K

4

PR217

SA_PGOOD<26>

PR114

12

PR124

PR124 20K_0402_1%

20K_0402_1%

TRIP_VCCSA

EN_VCCSA

FB_VCCSA

RF_VCCSA

12

PR117

PR117 470K_0402_5%~D

470K_0402_5%~D

1 2

200K_0402_1%

12

@

PC93

PR217

1 2

10K_0402_1%

PR216

1 2

10K_0402_1%@

PU14

SA_PGOOD

1

PGOOD

2

TRIP

3

EN

4

VFB

5

RF

TPS51212DSCR_SON10_3X3~D

PR120

1 2

2.87K_0402_1%

PC99

0.1U_0603_25V7K

@

+3VS

2.2_0603_5%

BST_VCCSA

10

VBST

UG_VCCSA

9

DRVH

DRVL

VCCSA_SEL VCC SA Vout Requir ed on 2011 / 2012 Required 0 0 .9V Yes / Yes 1 0 .8V Yes / Yes

SW_VCCSA

8

SW

7

V5IN

LG_VCCSA

6

11

TP

PR115

1 2

3

0.22U_0603_25V7K

BST_VCCSA-1

1 2

PC94

1U_0603_6.3V6M~D

PC92

1 2

+5VALW

PQ53

AON7408L_DFN8-5

3 5

241

3 5

241

VCCSAP_IN

PQ54

AON7408L_DFN8-5

2.2UH_PCMC063T-2R2MN_8A_20%

12

SNB_VCCSA

12

PC89

2200P_0402_50V7K

PR118

4.7_1206_5%

PC98

680P_0402_50V7K

2

PJP12

2

112

JUMP_43X79@

12

PC90

PC91

0.1U_0603_25V7K

4.7U_0805_25V6-K

PL10

12

PC96

PC95

.1U_0402_16V7K

10U_0805_6.3V6M

PR215

PR215 10_0402_5%

10_0402_5%

1 2

+VCCSAP TDC 6A Peak Current 7. 2 A OCP current 9.3 6 A

+VCCSAP

1

+

2

PC97

220U_D2_2VY_R15M

1 2

PR121

PR121 0_0402_5%

0_0402_5%

PJP13

2

JUMP_43X118@

112

1

B+

VCCSA_SENSE <10>

+VCCSA+VCCSAP

A A

Security Classification

Issued Date

THIS SHEET OF ENGINE ERING DRAW ING IS THE PROPRIETARY P ROPERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDEN TIAL

THIS SHEET OF ENGINE ERING DRAW ING IS THE PROPRIETARY P ROPERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDEN TIAL AND TRADE SE CRET INFORMATION. THIS SHE ET MAY NOT BE TRANS FERED FROM THE C USTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SE CRET INFORMATION. THIS SHE ET MAY NOT BE TRANS FERED FROM THE C USTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SE CRET INFORMATION. THIS SHE ET MAY NOT BE TRANS FERED FROM THE C USTODY OF THE COMPE TENT DIVISION OF R&D DEPARTMENT E XCEPT AS AUTHORIZE D BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT E XCEPT AS AUTHORIZE D BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2010/12/24 2011/12/24

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

+VCCSAP

Size Document Number Rev

C

Date: Sheet

1

47 51Thursday, July 28, 2011

of

1.0

5

12

PR129

1K_0402_ 1%@

COMPG-4

12

150P_0402_50V8J

1 2

PC109

499_0402_1%@

1 2

NTCG-1

1 2

PR148

12

PR160

PC109

PR134

330P_040 2_50V7K@

294K_040 2_1%

+3VS

1 2

1.91K_040 2_1%

PR150

5

47P_0402 _50V8J

NTCG

1 2

PC117

VGATE<6,15,26>

PR156

27.4K_040 2_1%

3.83K_040 2_1%

D D

VR_HOT#<26,49>

C C

PH3

470KB_040 2_5%_ERTJ0EV474 J

2-ph: PR172=20.5K Vboot=0V, Iccmax=54A

2-ph: PR172=20.5K Vboot=0V, Iccmax=54A 2-ph: PR172=169K Vboot=1.1V, Iccmax=54A

2-ph: PR172=169K Vboot=1.1V, Iccmax=54A

B B

A A

+CPU_CORE Iocp=70A, IccMAX=53A Load line=1.9mohm DCR=1.1mohm

PC104

39P_0402_50V7K

12

COMPG-6 COMPG-2

12

PR132

475K_0402_1%

12

PC111

12

8.06K_0402_1%

8.06K_0402_1% PR140

PR140

PR147

54.9_0402_1%

12

PH2

NTC-1

12

470KB_040 2_5%_ERTJ0EV474 J

PR132

1 2

PR157

1 2

27.4K_040 2_1%

3.83K_040 2_1%

PC106

1000P_0402_50V7K

VR_SVID_DAT<9>

VR_SVID_CLK<9>

12

+GFX_CORE Iocp=40A, IccMAX=24A Load line=3.9mohm DCR=1.1mohm

PR154

330P_0402_50V7K

+VCCP

1 2

VR_SVID_ALRT#<9>

PR161

20.5K_040 2_1%

2.7K_0402_1%

422_0402_1%

12

PC107

1.91K_0402_1%

PR146

PR146 130_0402_1%

130_0402_1%

VR_ON<26>

12

PR158

8.06K_0402_1%

1 2

PR162

267K_040 2_1%

1 2

PC134

PC134 470P_0402_50V8J

470P_0402_50V8J

PR131

PR133

PR143

12

COMP-1

12

COMP-4

12

+3VS

1 2

0_0402_5%

comp

PC126

680P_040 2_50V7K

2K_0402_1%

PR165

@PR165

@

1 2

4

1 2

95835_VWG

GFX_CORE_PWRGD

SVID_ALERT#

SVID_SCLK

PR153

95835_VR_ON

NTC

95835_VW

12

PC120

12

PC131

47P_0402 _50V8J

1000P_0402_50V7K

1 2

FB

4

1000P_04 02_50V7K

PC133

1 2

3.48K_0402_1%

+VCC_CORE

PU11

1

VWG

2

PGOODG

3

SDA

4

ALERT#

5

SCLK

6

VR_ON

7

PGOOD

8

VR_HOT#

9

NTC

10

VW

PR166

COMP-2

1 2

PR170

PR177

@ PC105

@

330P_0402_50V7K

0.01U_0402_50V7K

ISPG

95835_FBG

95835_CO MPG

40

37

38

39

41

FBG

PAD

RTNG

COMPG

ISUMPG

ISL95835HRTZ-T_TQFN40_5X5

COMP11FB12ISEN3/ FB213ISEN214ISEN115RTN16ISUMN17ISUMP18VDD19VIN

FB

ISEN2

ISEN3

comp

12

PC119 1 0P_0402_50V8 JPC119 10 P_0402_50V8J

0.22U_040 2_6.3V6K

887_0402_1%

12

PC143

330P_040 2_50V7K

@

1 2

10_0402_ 1%

VCCSENSE

3

12

1 2

ISNG

36

ISUMNG

ISEN1

12

PC121

0.22U_040 2_6.3V6K

VSUM-

PC144

<9>

PC105

PC108

NTCG

35

PC122

0.01U_040 2_50V7K

12

NTCG

10_0402_1%

UGATEG

BOOTG

LGATEG

PHASEG

32

33

31

34

BOOTG

LGATEG

PHASEG

UGATEG

BOOT2

UGATE2

PHASE2

LGATE2

PWM3

LGATE1

PHASE1

UGATE1

BOOT1

20

ISUMN

12

ISUMN-1

12

1 2

VSSSENSE

95835_VIN

95835_VDD

@

12

PR171

PC135 330 P_0402_50V7K@PC135 330 P_0402_50V7K

1.62K_040 2_1%~N

PR174

100_0402 _1%

@

PROCP

PROCPPROCP

PR178

PR178 10_0402_1%

10_0402_1%

<9>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PR130

PR135

VCCP

12

3

12

30

29

28

27

26

25

24

23

22

21

+5VS

1 2

12

PC136

0.22U_040 2_16V7K

+VCC_GFXCORE_AXG

UGATEG

VCC_AXG_SENSE <10>

VSS_AXG_SENSE <10>

PR145

1_0603_5%

BOOT2

UGATE2

PHASE2

LGATE2

95831_VCCP

95831_PWM3

LGATE1

PHASE1

UGATE1

BOOT1

PR159

PR159 1_0603_5%

1_0603_5%

PC127

1U_0603_ 10V6K

12

PC137

0.022U_04 02_16V7K

1_0603_5%

CPU_B+

12

PR155

2.2_0603_5%

12

0.22U_0603_25V7K

0.22U_0603_25V7K PC118

PC118

VSUM+

12

PR167

2.61K_0402_1%

PR172

ISUMN-2

12

11K_0402 _1%

PH4

PH4 10K_0402_1%_ERTJ0EG103FA

10K_0402_1%_ERTJ0EG103FA

VSUM-

12

PC139

PC139 .1U_0402_16V7K

.1U_0402_16V7K

2010/12/24 2011/12/24

1 2

PHASEG

PR136

4.7_0603_5%

LGATEG

+5VS

12

PC116

1U_0603_10V6K

12

PR151

0_0402_5%

UGATE2

1 2

PR168

PR168 0_0603_5%

0_0603_5%

PHASE2

PR163

4.7_0603_5%

BOOT2

0.22U_0603_10V7K

LGATE2

UGATE1

1 2

PR181

PR181 0_0603_5%

0_0603_5%

PHASE1

PR179

4.7_0603_5%

BOOT1

LGATE1

12

0.22U_0603_10V7K

Compal Secret Data

Deciphered Date

PR141

0_0402_5%

0.22U_0603_10V7K

BOOTG-1BOOTG

12

UGATE2-1

BOOT2-1

12

PC132

UGATE1-1

BOOT1-1

PC145

12

UGATEG-1

PC110

4

2

5

4

5

12

4

PQ40

PQ40 TPCA8059-H_PPAK56-8-5

TPCA8059-H_PPAK56-8-5

5

PQ41

CSD17308Q3_SON8-5

123

5

123

5

PQ43

CSD17308Q3_SON8-5

123

5

PQ44

123

2

PQ39

CSD17308Q3_SON8-5

123

PC128

PQ42

TPCA8059-H _PPAK56-8-5

CPU_B+

TPCA8059-H _PPAK56-8-5

12

PC102

PC103

PC101

1 2

4.7U_0805 _25V6-K

12

PR137

4.7_1206 _5%

GPU_SNB

12

PC112

680P_060 3_50V7K

ISPG

+5VS

PC103

4.7U_0805 _25V6-K

PL11

0.36UH_FDU1040J-H-R36M=P3_33A_20%

4

3

PR138

3.65K_0402_1%

PR142

7.5K_0402_1%

10K_0402_1%_ERTJ0EG103FA

ISPG-2

1 2

PR144

11K_0402_1%

1 2

PC114

.1U_0402_16V7K

1 2

PC115

0.033U_0402_16V7K

12

PR152 0_0402_5%@ PR152 0_0402_5%@

GFX_B+

1

ISNG-2I SPG-1

2

12

1_0402_5%

PH1

.1U_0402_16V7K

1 2

ISNG-1

12

1.18K_0402_1%

ISNG

Connect to +5V can disable GFX portion

GFX_B+

CPU_B+

12

4.7U_0805 _25V6-K

12

PR164

CPU_SNB-2

12

PC138

PC140

4.7U_0805 _25V6-K

12

PR180

CPU_SNB-1

12

PC146

12

PC129

PC130

4.7U_0805 _25V6-K

4.7_1206 _5%

680P_060 3_50V7K

12

4.7_1206 _5%

680P_060 3_50V7K

PR169

3.65K_0402_1%

VSUM+

1 2

10K_0402_1%

ISEN2

PR173

1 2

VSUM- ISEN1

1 2

12

PC142

PC141

4.7U_0805 _25V6-K

PR182

3.65K_0402_1%

VSUM+

1 2

10K_0402_1%

ISEN1

PR183

1 2

1_0402_5%

VSUM-

PR184

1 2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

1

+

PC124

PC123

100U_25V_ M

2

PL13

0.36UH_FDU1040J-H-R36M=P3_33A_20%

4

3

ISEN2-1

PR175

1_0402_5%

PL14

0.36UH_FDU1040J-H-R36M=P3_33A_20%

4

3

ISEN1-1

CPU_CORE/GFX

1

PR139

PC113

PR149

2

PJ3

2

JUMP_43X39

@

1

1 2

PL12

HCB4532KF-800T90_1812

1

2

ISEN2-2

1

2

ISEN1-2

1

+VCC_GFXCORE_AXG

B+

+VCC_CORE

PR176

12

10K_0402_1%

+VCC_CORE

PR185

10K_0402_1%

ISEN2

12

1.0

of

48 51Thursday, July 28, 2011

5

4

3

2

1

D D

BATT+

12

PL15

SMB3025500YA_2P

1 2

PC147

0.01U_0402_25V7K

BATT++

12

PC148

PC148 1000P_0402_50V7K

1000P_0402_50V7K

BATT++

Battery Connect/OTP

Place clsoe to EC pin

PH3 under CPU botten side :

CPU thermal protection at 90 degree C

PJPB1 battery connector

JBATT1

@JBATT1

@

1

2

3

3 4 5 6 7 8

C C

+5VALWP

PR199

100K_0402_1%

SPOK<44>

100K_0402_1%

1 2

PR200

PR200 0_0402_5%

0_0402_5%

B B

10 11

MOLEX_87437-1173

SPOK1

12

PC152

@

9

4 5 6 7 8 9 10 11

2

G

0.1U_0402_16V7K

SMB_CK1 SMB_DA1

B+

PR198

22K_0402_1%

SPOK2

1 2

13

D

PQ47

PQ47 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

BATT_PRS

12

PR196

100K_0402_1%

12

@

PR187

PR187 100_0402_5%

100_0402_5%

TP0610K-T1-E3_SOT23-3

PC150

0.22U_1206_25V7K

SPOK3

PR188

PR188 100_0402_5%

100_0402_5%

1 2 1 2

PR191

100_0402_5%

1 2

PQ46

2

13

PR186

PR186 10K_0402_5%

10K_0402_5%

12

@ PC151

@

0.1U_0603_25V7K

EC_SMB_CK1 <2 6> EC_SMB_DA1 <2 6>

EC_BATT_PRS <26>

12

+3VALW

B+_BIAS

PC151

VR_HOT#<26,48>

MAINPWON<44>

0.1U_0603_25V7K

PQ45

SSM3K7002FU_SC70-3

Recovery at 50 degree C

+3VLP

12

VL

PC149

12

PR193

PR193 100K_0402_1%@

100K_0402_1%@

PR192

13

D

S

1 2

100K_0402_1%

2

G

G718_OT2

PU12

1

VCC

TMSNS1

2

GND

RHYST1

3

OT1

TMSNS2

4

RHYST2

OT2

G718TM1U_SOT23-8

8

7

6

5

G718_TMSN1

G718_RHYST1

G718_TMSN2

@

@ 1 2

G718_RHYST2

PR197

10K_0402_1%

PR189

1 2

12.1K_0402_1%

12

PH5

PH5 100K_0402_1%_TSM0B104F4251RZ

100K_0402_1%_TSM0B104F4251RZ

PR195

78.7K_0402_1%

1 2

ADP_I <26,43>

12

PR190

23.2K_0402_1%

PR194

PR194 10K_0402_1%

10K_0402_1%

1 2

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/12/24 2011/12/24

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

PWR-BATTERY CONN

S

Size Document Number Rev

ize Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

1

49 51Thursday, July 28, 2011

1.0

of

5

<34>

D D

4

3

VGA_B+

2

PJP15

PJP15 JUMP_43X118@

JUMP_43X118@

112

1

2

B+

12

PC153

2200P_04 02_50V7K~D

PR202

DGPU_PWROK<16,17>

PR204

1 2

64.9K_0402_1%

C C

B B

GPU_VID_1

+3.3V_RUN_GFX

PR223

@PR223

@

10K_0402_5%

PR219

100K_0402_5%

DGPU_PWR_EN<16,28,34,37>

12

PR220

12

10K_0402_5%

GVID1-1

2

12

G

12

PC168

0.01U_0402_25V7K

GPU_VID_0<34>

1 2

PR205

22.1K_0402_1%

0.1U_0402_16V7K

PR221

37.4K_0402_1%

1 2

GVID1-2

13

D

PQ55

S

SSM3K7002FU_SC70-3

+3.3V_RUN_GFX

PR222

@PR222

@

10K_0402_5%

PR214

100K_0402_5%

PC159

12

PR213

12

10K_0402_5%

64.9K_0402_1%

12

GVID0-1

12

2

G

12

PC167

0.01U_0402_25V7K

1 2

13

TRIP_VGA

EN_VGA

FB_VGA

RF_VGA

12

PR208

PR208 470K_0402_5%~D

470K_0402_5%~D

PR211

PR211 243K_0402_1%

243K_0402_1%

GVID0-2

D

PQ50

S

SSM3K7002FU_SC70-3

PR202

1 2

+3.3V_RUN_GFX

10K_0402_1%

PR201

1 2

10K_0402_1%

PU13

PG_VGA

1

VBST

PGOOD

2

TRIP

DRVH

3

EN

4

5

TPS51212DSCR_SON10_3X3~D

PR212

1 2

SW

V5IN

VFB

DRVL

RF

TP

PC166

1 2

37.4K_040 2_1%

@

0.1U_0603 _25V7K

10

9

8

7

6

11

1 2

PR203

2.2_0603_5%

BST_VGA

UG_VGA

SW_VGA

LG_VGA

PR209

8.06K_0402_1%

5

1 2

PC158

0.22U_0603_25V7K

+5VALW

1

PC160

PC160 1U_0603_6.3V6M~D

1U_0603_6.3V6M~D

2

12

VID[0] VID[1] VCCP Vout State 1 1 1.025V P0(Cold) 0 1 1.000V P0(Hot) 0 0 0.850V P8&Boost

4

PQ48

TPCA8065-H_PPAK56-8-5

123

5

PQ49

123

TPCA8059-H _PPAK56-8-5

0.36UH_FDU1040J-H-R36M=P3_33A_20%

1 2

12

PR206

4.7_1206_5%

12

PC165

PC165 680P_0603_50V_NPO

680P_0603_50V_NPO

PL16

12

PC154

PC155

0.1U_0603 _25V7K

4.7U_0805 _25V6K~D

PC173

@

10U_0805 _6.3V6M

1 2

PR210

PR210 0_0402_5%

0_0402_5%

12

PR207

PR207 10_0402_1%

10_0402_1%

+VGA_COREP

+VGA_CORE Thermal Design Current=15A Peak Current=15*1.3A OCP min=15*1.3*1.3A Fsw=290KHZ

Delta I=1.6269A L/S MOS Rds(on)=5.5m ohm (Typ) ; 6.7m ohm(Max)

12

PC157

PC156

4.7U_0805 _25V6K~D

+VGA_COREP

1

12

2

PC161

PC164

0.1U_0402 _10V7K~D

10U_0805 _6.3V6M~D

+VGASENSE <36>

PJP16

@PJP16

@

JUMP_43X118

112

PJP17

@PJP17

@

JUMP_43X118

112

1

+

2

PC162

PC163

330U_D2_ 2.5VY_R9M

2

+GPU_CORE

2

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/12/24 2011/12/24

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

VGA_CORE

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

2

Date: Sheet

50 51Thursday, July 28, 2011

1

1.0

of

5

4

3

2

1

D D

Version change list (P.I.R. List) Page 1 of 1 for PWR

Reason for change Rev. PG# Modify List Date PhaseItem

1

2

3

4

5

6

C C

7

8

9

B B

10

11

12

13 P43

14

15

A A

16

17

modify Vcore and GFX boost resistance change PR136,PR163,PR179 to 2.2 +-5% 0603.

modify VGA FB resistance

P48 2011.2.10 before SSI

P50

change PR211 to 243K +-1% 0402. PR221 to 37.4K +-1% 0402.

modify 1.5V Enable signal

modify ADP_I protection change PR189 to 12.1k +-5% 0402.

integrate mosfet

modify Vcore and GFX's loadline and OCP

P45

change PR81 connect to SYSON.

P49

P45

change PQ53 PQ54 to AON7408L

P48 change PR171 to 1.62K +-1% 0402

change PR170 to 3.48K +-1% 0402 change PR149 to 1.18K +1% 0402 change PR131 to 2.7K +-1% 0402 change PC115 to .033U 16V K X7R 0402

modify VGA for HW team suggest item

P50

add PR219 100K +-5% 0402 remove PR223 10K +-5% 0402 change PR205 to 22.1K +-1% 0402

integrate mosfet

add capacitance for RF team suggest item change PC81 PC125 to 10U 25V K X5R 0805 H1.25

P45

P47

P43 P45

change PQ32 to SSM3K7002FU 1N SC70-3

change PQ37 to SSM3K7002FU 1N SC70-3

change PC169 to .1U 16V K X7R 0402 change PC170 to 10U 6.3V M X5R 0805 H1.25 change PC171 to .1U 16V K X7R 0402 change PC172 to 10U 6.3V M X5R 0805 H1.25 change PC173 to 10U 6.3V M X5R 0805 H1.25

change PR88 to 57.6K +-1% 0402

change PR100 to 80.6K +-1% 0402

modify 1.5V OCP resistance

modify VCCP OCP resistance

P46

P50

P45

P46

modify choke footprint for DFX requirement change PL5,PL6,PL7,PL8,PL10 to TAI-T_VMPI0703AR-100M-Z01_2P

modify PQ11 Vgs resistance

change PR31 to 200K +-1% 0402 change PR35 to 47K +-1% 0402

modify the net name of SPOK-'

P49

change the net name of PQ47 pin2 to SPOK1 change the net name of PQ47 pin1 to SPOK2 change the net name of PQ46 pin2 to SPOK3

modify PU12 vcc power from +3VALW to +3VLP change PR190.1 to +3VLP

P49

change PR149.1 to +3VLP change PU12.1 to +3VLP

modify OTP resistance

P49

change PR190 to 23.2K +-1% 0402 change PR194 to 10K +-1% 0402

modify VCORE VCCP resistance change PR145 to 1 +-5% 0603

5

4

P48

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Deciphered Date

2

Title

Size Document Number Rev

Date: Sheet

2011.3.24 SSI

Compal Electronics, Inc.

1

1.0Custom

of

51 51Thursday, July 28, 2011

of

51 51Thursday, July 28, 2011

of

51 51Thursday, July 28, 2011

Compal LA-7451P PLW00, XPS 14z Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual