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LA-7441P
Schematics
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Compal LA-7441P Schematics

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5
D D
4
3
2
1
Compal Confidential
C C
PBL80 Project
LA-7441P
B B
SchematicREV 0.1
Intel Sandy Bridge/Cougar Point
N12P-GV/GS-Optimus Only
2011-01-21
A A
5
4
Rev. 0.1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Cover Page
Cover Page
Cover Page
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
Friday, January 21, 2011
Friday, January 21, 2011
Friday, January 21, 2011
1
1 58
1 58
1 58
0.1
0.1
0.1
5
Compal Confidential
Model Name : PBL80
File Name : LA-7441PR01
4
3
2
1
D D
PEG(DIS)
PCI-E 2.0x16 5GT/s PER LANE100MHz
133MHz
Mobile
Sandy Bridge
CPU
Dual Core/Quad Core
N12P GV/N12P GS Optimus Only 128*16 1GB/2GB
64*16 512MB/1GB
page 14~25
CRT
page 26
Socket-rPGA989
37.5mm*37.5mm
DMI X4
page 5,6,7,8,9,10,11
FDI X8
LVDS Conn.
page 27
C C
PCI-Express x 8 (PCIE2.0 2.5GT/s)
port 4
USB 3.0 conn x1
PCIe port 4
page 45
PCIeMini Card WLAN & BT Combo
port 2 port 1
USB port 13
PCIe port 2
page 39
HDMI Conn.
page 28
100MHz
RTL8105E 10/100M RTL8111E 1G
PCIe port 1
page 40
RJ45
ODD/B
B B
USB/B
page 38
page 39
page 40
TouchPad & Card Reader & LED/B
page 39
Intel Cougar Point
PCBGA989
page 29,30,31,32,33 ,34,35,36,37
ENE KB930
Touch Pad
page 39
25mm*25mm
LPC BUS
33MHz
page 43
Int.KBD
page 44
Fan Control
page 5
Memory BUS(DDRIII)
Dual Channel
1.5V DDRIII 1066/1333
USB Left X 1 (Co lay with USB3.0 Conn)
USB port 4
page 39
USB
5V 480Mbps
SATA port 0
5V 1.5GHz(150MB/s)
SATA port 1
5V 1.5GHz(150MB/s)
SATA port 2
5V 1.5GHz(150MB/s)
USB/B Right X 3
USB port 0,1,2
HD Audio
Bus switch
BIOS ROM
page 41
page 41
page 39
SATA HDD/ 3.5"
SATA HDD/ 2.5"
SATA ODD
204pin DDRIII-SO-DIMM X4
BANK 0, 1, 2, 3
Int. Camera 0.3M RTS5129 3IN1
USB port 10
page 38
page 38
page 38
3.3V 24.576MHz/48Mhz
page 27
page 12,13
USB port 11
HDA Codec
ALC269
page 42
MIC CONN
page 42
HP CONN
page 42
SPK CONN
page 39
page 42
EC ROM
Power/B
page 44
page 44
RTC CKT.
page 29
CPU XDP
A A
DC/DC Interface CKT.
page 46
Power Circuit DC/DC
page 47~58
5
page 5
PCH XDP
page 29
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Block Diagrams
Block Diagrams
Block Diagrams
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
2 58Friday, January 21, 2011
2 58Friday, January 21, 2011
2 58Friday, January 21, 2011
0.1
0.1
0.1
5
4
3
2
1
(ipeak=10A imax=7A
B+
+5VALW
D D
RT8205EGQW
+5VALW
+5VALW
+3VALW
+3VALW
C C
DRVON
AP4800BGM
SY8033BDBC
SY8035DBC
P-CHANNEL
AO3413
AP4800BGM
NCP5911MNTBG
SUSP#
TPS40210DRCR
SUSP
SUSP#
SUSP#
WOL_EN#
SUSP
SUSP#
P-CHANNEL
AO-3413
P-CHANNEL
AO-3413
TPS51218DSCR +VGA_CORE
DESIGN CURRENT 10A
DESIGN CURRENT 6A
DESIGN CURRENT 2A
DESIGN CURRENT 6A
ipeak=6A imax=4.2A
DESIGN CURRENT 170mA
DESIGN CURRENT 1.6A
DGPU_PWR_EN#
DESIGN CURRENT 700mA
VGA_ENVDD
DESIGN CURRENT 3A
Ipeak=94A, Imax(TDP)=56A
DESIGN CURRENT 2A
DESIGN CURRENT 35A
+5VALWP
+5VS
+1.8VSP
+VCCSAP
+3VALWP
+3V_LAN
+3VS
+3VS_DGPU
+LCD_VDD
+CPU_CORE
+12VS
+5VALW(PJP305,PJP306) +5VALW_PCH(PJ334)
+1.8VS(PJP401)
+VCCSA(PJP801)
+3VALW(PJP303)
+3V_EC(R715)
+3VALW_PCH(J1)
SUSP#
RT8209BGQW
B B
+1.05VS_VCCP
SYSON
RT8209BGQW
+1.5V
+1.5V
+1.5V
A A
+1.5V
5
N-CHANNEL
SI4856ADY
N-CHANNEL
SI4856ADY
APL5336KAI-TRL
TPCA8059
4
N-CHANNEL
AO3416
SUSP
RUN_ON_CPU1.5VS3
SUSP
VGA_PWROK#
DGPU_PWR_EN#
DESIGN CURRENT 18A
+1.05VS_VCCP
+1.05VS_PCH(JP2)
DESIGN CURRENT 3.66A
Ipeak = 30A Imax= 21A
DESIGN CURRENT 600mA
DESIGN CURRENT 10A
DESIGN CURRENT 2A
DESIGN CURRENT 11A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
+1.05VS_DGPU
+1.5VP
+1.5V(PJP501,PJP502.PJP503)
+1.5VS
+1.5V_CPU
+0.75VSP
+0.75VS(PJP601)
+VRAM_1.5VS
Compal Secret Data
Compal Secret Data
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Power Map
Power Map
Power Map
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
3 58Friday, January 21, 2011
3 58Friday, January 21, 2011
3 58Friday, January 21, 2011
0.1
0.1
0.1
5
Voltage Rails
power
D D
C C
S5 S4/ Battery only
S5 S4/AC & Battery don't exist
plane
State
S0
S1
S3
S5 S4/AC
( O MEANS ON X MEANS OFF )
+RTCVCC
O
O
O
O
O
O
B+
O
O
O
O
O
X
+5VL
+3VL
O
O
O
O
O
X
+5VALW
+3VALW
+5VALW_PCH
+3VALW_PCH
+3V_LAN
+3V_EC
+VSB
PCH SM Bus Address
HEX
Power
+3VS
B B
+3VS
+3VS
Device
DDR SO-DIMMA1
DDR SO-DIMMB1
WLAN
Address
1010 0000 bA0 H
1010 0010 bA0 HDDR SO-DIMMA2+3VS
1010 0100 bA4 H
1010 0110 bA0 HDDR SO-DIMMB2+3VS
4
+1.5V
+5VS
+3VS
+1.8VS
+1.5VS
+1.05VS_VCCP
+0.75VS
+CPU_CORE
+VGA_CORE
+GFX_CORE
+VCCSA
+VRAM_1.5VS
+3VS_DGPU
+1.05VS_DGPU
+12VS
STATE
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
G3 LOW LOWLOW
Function
description
O
O
O
O
X
X
O
X X
X
X X
OO
OO
X
X
explain
BTO
Function
description
explain
BTO
Function
description
explain
BTO
Function
description
explain
BTO
3
SIGNAL
SLP_S3# SLP_S4# SLP_S5#
HIGH HIGHHIGH
HIGH HIGHHIGH
LOW
LOW LOW
Samsung 64bits
VRAM
8PCS@ N12PGS@
Crisis recovery
BUS SWITCH
BUS SWITCH
Debug@
USB3.0/2.0 Colay
USB3.0
USB3.0
USB3@
SATA path
PCH
PCH
SATA@
PD 20K PD 15K PD 45.3K PD 34.8K
USB2.0
USB2.0
USB2@
Repeater
Repeater
SATARP@
HIGH
HIGH
HIGH
LOW LOWLOW
VRAM
Hynix 64bits
HDMI
HDMI
HDMI
HDMI@
WLAN+BT(BT pin 51)
WLAN+BT(BT pin 51)
BT@
SATA3.0 Repeater Chip
MAXIM
MAX4951
MAXIM@
SN75LVCP601
Samsung 128bits
TI
TI@
2
Hynix 128bits
WLAN+BT
WLAN+BT(BT pin 5)
WLAN+BT(BT pin 5)
COMBO@
SATA Preemphasis
Preemphasis
Enable
DEN@
Strap pin
N12P-GSVRAM
Disable
NDEN@
GPU
N12P-GV
Strap pinStrap pin Strap pin Strap pin Strap pin
N12PGV@
LAN
Giga LAN
Strap pin
8111E@
SATA Equalization
Equalization
Maximum
EQ@
1
Board ID
Adaptor
Adaptor
90W@, 120W@
10/100M LAN
Strap pin
8105E@
Normal
NEQ@
EC SM Bus1 Address
Device Address Address
+3VL
A A
HEX HEX
16 H
0001 0110 bSmart Battery
5
PowerPower
+3VS
+3VS
EC SM Bus2 Address
Device
96 H
1001 0110 bPCH
VGA Thermal Sensor 1001 1010 b
9A H
4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Notes List
Notes List
Notes List
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
4 58Friday, January 21, 2011
4 58Friday, January 21, 2011
4 58Friday, January 21, 2011
0.1
0.1
0.1
5
4
3
2
1
Support Dual Core/ Quad Core
JCPUB
JCPUB
C1
C1
@
@
H_PWRGOOD
12
220P_0402_25V8J
220P_0402_25V8J
D D
C2
C2
@
@
H_PROCHOT#
12
220P_0402_25V8J
220P_0402_25V8J
H_SNB_IVB#<33>
@
@
@
1 2
1 2
TP_SKTOCC#
H_CATERR#
H_PECI
H_PROCHOT#_R
H_THERMTRIP#_R
T1 PAD@T1 PAD
T2 PAD
T2 PAD
H_PECI<34,43>
H_PROCHOT#<43>
H_THERMTRIP#<34>
R6 56_0402_5%R6 56_0402_5%
R10 0_0402_5%R10 0_0402_5%
AN34
AL33
AN33
AL32
AN32
C26
SNB_IVB#
SKTOCC#
CATERR#
PECI
PROCHOT#
THERMTRIP#
MISCTHERMALPWR MANAGEMENT
MISCTHERMALPWR MANAGEMENT
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
CLOCKS
CLOCKS
SM_DRAMRST#
SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]
DDR3
MISC
DDR3
MISC
BCLK
BCLK#
A28 A27
A16 A15
R8
AK1 A5 A4
R3
R3
1 2
R4
R4
1 2
H_DRAMRST#
SM_RCOMP_0
R7 140_0402_1%R7 140_0402_1%
SM_RCOMP_1
R8 25.5_0402_1%R8 25.5_0402_1%
SM_RCOMP_2
R9 200_0402_1%R9 200_0402_1%
1K_0402_5%
1K_0402_5% 1K_0402_5%
1K_0402_5%
from DDR
H_DRAMRST# <7>
12 12 12
CLK_CPU_DMI <30> CLK_CPU_DMI# <30>
+1.05VS_VCCP
eDP
DDR3 Compensation Signals Layout Note:Please these
resistors near Processor
If motherboard only supports external graphics: Connect DPLL_REF_SSCLK on Processor to GND through 1K +/- 5% resistor. Connect DPLL_REF_SSCLK# on Processor to VCCP through 1K +/- 5% resistor
PRDY#
PREQ#
+1.05VS_VCCP
C C
Follow DG 0.71
DRAMPWROK<31>
B B
CHANGE U5 TO OPEN DRAIN MOS,OUTPUT=1.5V
Processor Pullups
R17 62_0402_5%R17 62_0402_5%
R23 10K_0402_5%R23 10K_0402_5%
PWROK<31>
12
12
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 2
R37 0_0402_5%R37 0_0402_5%
H_PROCHOT#
H_PWRGOOD
1
C3
C3
2
1
2
+3VALW
U1
U1 74AHC1G09GW_TSSOP5
74AHC1G09GW_TSSOP5
5
P
B
4
O
A
G
3
SUSP<46,53>
H_PM_SYNC<31>
H_PWRGOOD<34>
FIT 1.5V POWER PLANE OF CPU
PM_SYS_PWRGD_BUF
12
13
D
SUSP
D
2
G
G
S
S
+1.5V_CPU
@
@
R38
R38 39_0402_5%
39_0402_5%
@
@
Q1
Q1 2N7002_SOT23
2N7002_SOT23
12
R36
R36 200_0402_5%
200_0402_5%
H_PWRGOOD
PM_DRAM_PWRGD_RPM_SYS_PWRGD_BUF
1 2
R22 130_0402_5%R22 130_0402_5%
BUF_CPU_RST#
XDP Connector
Buffered reset to CPU
+3VS
1
C6
C6
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
5
U3
U3
1
P
NC
R55
A A
PLT_RST#<33,39>
R55
1 2
0_0402_5%
0_0402_5%
5
2
4
Y
A
G
SN74LVC1G07DCKR_SC70-5
SN74LVC1G07DCKR_SC70-5
3
+1.05VS_VCCP
12
R50
R50 75_0402_5%
75_0402_5%
R52
R52
43_0402_1%
BUFO_CPU_RST# BUF_CPU_RST#
43_0402_1%
1 2
12
@
@
R53
R53 0_0402_5%
0_0402_5%
4
PBTN_OUT#<29,31,43>
CFG0<10>
VGATE<31,43,55>
CLK_RES_ITP<10,30> CLK_RES_ITP#<10,30> +1.05VS_VCCP
0.1U_0402_10V6K
0.1U_0402_10V6K
AM34
PM_SYNC
AP33
UNCOREPWRGOOD
V8
SM_DRAMPWROK
JTAG & BPM
AR33
RESET#
Sandy Bridge_rPGA_Rev0p61
Sandy Bridge_rPGA_Rev0p61
CONN@
CONN@
XDP_PREQ# XDP_PRDY#
XDP_BPM#0 XDP_BPM#1
XDP_BPM#2
H_PWRGOOD XDP_CPU_HOOK0 PBTN_OUT# CFG0 VGATE
C8
C8
@
@
PLT_RST#
1
2
R44 1K_0402_5%@R44 1K_0402_5%@ R45 0_0402_5%@R45 0_0402_5%@ R46 1K_0402_5%@R46 1K_0402_5%@ R47 0_0402_5%@R47 0_0402_5%@
R48 1K_0402_5%
R48 1K_0402_5%
XDP_BPM#3
1 2 1 2 1 2 1 2
@
@
1 2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
JTAG & BPM
XDP_CPU_HOOK1 XDP_CPU_HOOK2 XDP_CPU_HOOK3
XDP_CPU_HOOK6 XDP_DBRESET#
XDP_TDO XDP_TRST# XDP_TDI XDP_TMS
XDP_TCK
3
TRST#
DBR#
BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]
JXDP1
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
ACES_87152-26051
ACES_87152-26051
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
AP27
AR26
TCK
AR27
TMS
AP30
AR28
TDI
AP26
TDO
AL35
AT28 AR29 AR30 AT30 AP32 AR31 AT31 AR32
@JXDP1
@
27 28
Compal Secret Data
Compal Secret Data
Compal Secret Data
XDP_PREQ#_R
XDP_TCK_R XDP_TMS_R XDP_TRST#_R
XDP_TDI_R XDP_TDO_R
XDP_DBRESET#_R
XDP_BPM#0_R XDP_BPM#1_R XDP_BPM#2_R XDP_BPM#3_R XDP_BPM#4_R XDP_BPM#5_R XDP_BPM#6_R XDP_BPM#7_R
EN_DFAN1<43>
XDP_PRDY#_R
AP29
+FAN_VCC
Deciphered Date
Deciphered Date
Deciphered Date
R11 0_0402_5%@R11 0_0402_5%@
1 2
R12 0_0402_5%@R12 0_0402_5%@
1 2
R13 0_0402_5%@R13 0_0402_5%@
1 2
R14 0_0402_5%@R14 0_0402_5%@
1 2
R15 0_0402_5%@R15 0_0402_5%@
1 2
R16 0_0402_5%@R16 0_0402_5%@
1 2
R18 0_0402_5%@R18 0_0402_5%@
1 2
R21 0_0402_5%@R21 0_0402_5%@
1 2
R24 0_0402_5%@R24 0_0402_5%@
1 2
R25 0_0402_5%@R25 0_0402_5%@
1 2
R26 0_0402_5%@R26 0_0402_5%@
1 2
R27 0_0402_5%@R27 0_0402_5%@
1 2
R28 0_0402_5%@R28 0_0402_5%@
1 2
R30 0_0402_5%@R30 0_0402_5%@
1 2
R32 0_0402_5%@R32 0_0402_5%@
1 2
R34 0_0402_5%@R34 0_0402_5%@
1 2
Close to CPU side
+5VS
1A
1 2
R49
R49 330_0402_5%
330_0402_5%
12
2
XDP_PRDY# XDP_PREQ#
XDP_TCK XDP_TMS XDP_TRST#
XDP_TDI XDP_TDO
XDP_DBRESET#
XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3
U2
U2
1
EN
GND
2
VIN
GND
3
VOUT
GND
4
VSET
GND
G996P11U SOP 8P
G996P11U SOP 8P
C7
C7
0.047U_0402_16V7K
0.047U_0402_16V7K
Routed as a single daisy chain
R20
R20
1 2
1K_0402_5%
1K_0402_5%
CFG12 <10> CFG13 <10> CFG14 <10> CFG15 <10>
+3VS
XDP_DBRESET# <29,31>
PU/PD for JTAG signals
XDP_TMS_R
XDP_TDI_R
XDP_TDO_R
XDP_TCK_R
XDP_TRST#_R
R39 51_0402_5%R39 51_0402_5%
R40 51_0402_5%R40 51_0402_5%
R41 51_0402_5%R41 51_0402_5%
R42 51_0402_5%R42 51_0402_5%
R43 51_0402_5%R43 51_0402_5%
FAN Control Circuit
2
C4
C4
10U_0805_10V4Z
10U_0805_10V4Z
1
2
C5
8 7 6 5
C5
@
@
1
Title
Title
Title
Sandy Bridge(1/6)-CLK/MISC/JTAG/XDP/FAN
Sandy Bridge(1/6)-CLK/MISC/JTAG/XDP/FAN
Sandy Bridge(1/6)-CLK/MISC/JTAG/XDP/FAN
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
20mil
+FAN_VCC
1000P_0402_50V7K
1000P_0402_50V7K
1
C9
0.01U_0402_25V7K
0.01U_0402_25V7K
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
+1.05VS_VCCP
12
12
12
12
12
JFAN
JFAN
1
1
2
2
3
3
4
GND
5
GND
CVILU_CI4403M1HRT-NH
CVILU_CI4403M1HRT-NH
@
@
R51 10K_0402_5%R51 10K_0402_5%
12
FAN_SPEED1 <43>
@C9
@
5 58Friday, January 21, 2011
5 58Friday, January 21, 2011
5 58Friday, January 21, 2011
+3VS
0.1
0.1
0.1
5
4
3
2
1
+1.05VS_VCCP
D D
24.9_0402_1%
JCPUA
JCPUA
DMI_PTX_CRX_N0<31> DMI_PTX_CRX_N1<31> DMI_PTX_CRX_N2<31> DMI_PTX_CRX_N3<31>
DMI_PTX_CRX_P0<31> DMI_PTX_CRX_P1<31> DMI_PTX_CRX_P2<31> DMI_PTX_CRX_P3<31>
DMI_CTX_PRX_N0<31> DMI_CTX_PRX_N1<31> DMI_CTX_PRX_N2<31> DMI_CTX_PRX_N3<31>
DMI_CTX_PRX_P0<31> DMI_CTX_PRX_P1<31> DMI_CTX_PRX_P2<31> DMI_CTX_PRX_P3<31>
FDI_CTX_PRX_N0<31>
C C
+1.05VS_VCCP
12
R56
R56
24.9_0402_1%
24.9_0402_1%
B B
FDI_CTX_PRX_N1<31> FDI_CTX_PRX_N2<31> FDI_CTX_PRX_N3<31> FDI_CTX_PRX_N4<31> FDI_CTX_PRX_N5<31> FDI_CTX_PRX_N6<31> FDI_CTX_PRX_N7<31>
FDI_CTX_PRX_P0<31> FDI_CTX_PRX_P1<31> FDI_CTX_PRX_P2<31> FDI_CTX_PRX_P3<31> FDI_CTX_PRX_P4<31> FDI_CTX_PRX_P5<31> FDI_CTX_PRX_P6<31> FDI_CTX_PRX_P7<31>
FDI_FSYNC0<31> FDI_FSYNC1<31>
FDI_INT<31>
FDI_LSYNC0<31> FDI_LSYNC1<31>
FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7
FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7
FDI_FSYNC0 FDI_FSYNC1
FDI_INT
FDI_LSYNC0 FDI_LSYNC1
EDP_COMP
B27
DMI_RX#[0]
B25
DMI_RX#[1]
A25
DMI_RX#[2]
B24
DMI_RX#[3]
B28
DMI_RX[0]
B26
DMI_RX[1]
A24
DMI_RX[2]
B23
DMI_RX[3]
G21
DMI_TX#[0]
E22
DMI_TX#[1]
F21
DMI_TX#[2]
D21
DMI_TX#[3]
G22
DMI_TX[0]
D22
DMI_TX[1]
F20
DMI_TX[2]
C21
DMI_TX[3]
A21
FDI0_TX#[0]
H19
FDI0_TX#[1]
E19
FDI0_TX#[2]
F18
FDI0_TX#[3]
B21
FDI1_TX#[0]
C20
FDI1_TX#[1]
D18
FDI1_TX#[2]
E17
FDI1_TX#[3]
A22
FDI0_TX[0]
G19
FDI0_TX[1]
E20
FDI0_TX[2]
G18
FDI0_TX[3]
B20
FDI1_TX[0]
C19
FDI1_TX[1]
D19
FDI1_TX[2]
F17
FDI1_TX[3]
J18
FDI0_FSYNC
J17
FDI1_FSYNC
H20
FDI_INT
J19
FDI0_LSYNC
H17
FDI1_LSYNC
A18
eDP_COMPIO
A17
eDP_ICOMPO
B16
eDP_HPD
C15
eDP_AUX
D15
eDP_AUX#
C17
eDP_TX[0]
F16
eDP_TX[1]
C16
eDP_TX[2]
G15
eDP_TX[3]
C18
eDP_TX#[0]
E16
eDP_TX#[1]
D16
eDP_TX#[2]
F15
eDP_TX#[3]
Sandy Bridge_rPGA_Rev0p61
Sandy Bridge_rPGA_Rev0p61
CONN@
CONN@
DMI
DMI
Intel(R) FDI
Intel(R) FDI
eDP
eDP
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]
PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]
PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]
PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]
PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]
PEG_TX#[10] PEG_TX#[11]
PCI EXPRESS* - GRAPHICS
PCI EXPRESS* - GRAPHICS
PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]
J22 J21 H22
PCIE_GTX_C_CRX_N15
K33
PCIE_GTX_C_CRX_N14
M35
PCIE_GTX_C_CRX_N13
L34
PCIE_GTX_C_CRX_N12
J35
PCIE_GTX_C_CRX_N11
J32
PCIE_GTX_C_CRX_N10
H34
PCIE_GTX_C_CRX_N9
H31
PCIE_GTX_C_CRX_N8
G33
PCIE_GTX_C_CRX_N7
G30
PCIE_GTX_C_CRX_N6
F35
PCIE_GTX_C_CRX_N5
E34
PCIE_GTX_C_CRX_N4
E32
PCIE_GTX_C_CRX_N3
D33
PCIE_GTX_C_CRX_N2
D31
PCIE_GTX_C_CRX_N1
B33
PCIE_GTX_C_CRX_N0
C32
PCIE_GTX_C_CRX_P15
J33
PCIE_GTX_C_CRX_P14
L35
PCIE_GTX_C_CRX_P13
K34
PCIE_GTX_C_CRX_P12
H35
PCIE_GTX_C_CRX_P11
H32
PCIE_GTX_C_CRX_P10
G34
PCIE_GTX_C_CRX_P9
G31
PCIE_GTX_C_CRX_P8
F33
PCIE_GTX_C_CRX_P7
F30
PCIE_GTX_C_CRX_P6
E35
PCIE_GTX_C_CRX_P5
E33
PCIE_GTX_C_CRX_P4
F32
PCIE_GTX_C_CRX_P3
D34
PCIE_GTX_C_CRX_P2
E31
PCIE_GTX_C_CRX_P1
C33
PCIE_GTX_C_CRX_P0
B32
PCIE_CTX_GRX_N15
M29
PCIE_CTX_GRX_N14
M32
PCIE_CTX_GRX_N13
M31
PCIE_CTX_GRX_N12
L32
PCIE_CTX_GRX_N11
L29
PCIE_CTX_GRX_N10
K31
PCIE_CTX_GRX_N9
K28
PCIE_CTX_GRX_N8
J30
PCIE_CTX_GRX_N7
J28
PCIE_CTX_GRX_N6
H29
PCIE_CTX_GRX_N5
G27
PCIE_CTX_GRX_N4
E29
PCIE_CTX_GRX_N3
F27
PCIE_CTX_GRX_N2
D28
PCIE_CTX_GRX_N1
F26
PCIE_CTX_GRX_N0
E25
PCIE_CTX_GRX_P15
M28
PCIE_CTX_GRX_P14
M33
PCIE_CTX_GRX_P13
M30
PCIE_CTX_GRX_P12
L31
PCIE_CTX_GRX_P11
L28
PCIE_CTX_GRX_P10
K30
PCIE_CTX_GRX_P9
K27
PCIE_CTX_GRX_P8
J29
PCIE_CTX_GRX_P7
J27
PCIE_CTX_GRX_P6
H28
PCIE_CTX_GRX_P5
G28
PCIE_CTX_GRX_P4
E28
PCIE_CTX_GRX_P3
F28
PCIE_CTX_GRX_P2
D27
PCIE_CTX_GRX_P1
E26
PCIE_CTX_GRX_P0
D25
PEG_COMP
24.9_0402_1%
Typ- suggest 220nF. The change in AC capacitor value from 100nF to 220nF is to enable compatibility with future platforms having PCIE Gen3 (8GT/s)
12
R54
R54
C10 0.22U_0402_10V6KC10 0.22U_0402_10V6K C11 0.22U_0402_10V6KC11 0.22U_0402_10V6K C12 0.22U_0402_10V6KC12 0.22U_0402_10V6K C13 0.22U_0402_10V6KC13 0.22U_0402_10V6K C14 0.22U_0402_10V6KC14 0.22U_0402_10V6K C15 0.22U_0402_10V6KC15 0.22U_0402_10V6K C16 0.22U_0402_10V6KC16 0.22U_0402_10V6K C17 0.22U_0402_10V6KC17 0.22U_0402_10V6K C18 0.22U_0402_10V6KC18 0.22U_0402_10V6K C19 0.22U_0402_10V6KC19 0.22U_0402_10V6K C20 0.22U_0402_10V6KC20 0.22U_0402_10V6K C21 0.22U_0402_10V6KC21 0.22U_0402_10V6K C22 0.22U_0402_10V6KC22 0.22U_0402_10V6K C23 0.22U_0402_10V6KC23 0.22U_0402_10V6K C24 0.22U_0402_10V6KC24 0.22U_0402_10V6K C25 0.22U_0402_10V6KC25 0.22U_0402_10V6K
C26 0.22U_0402_10V6KC26 0.22U_0402_10V6K C27 0.22U_0402_10V6KC27 0.22U_0402_10V6K C28 0.22U_0402_10V6KC28 0.22U_0402_10V6K C29 0.22U_0402_10V6KC29 0.22U_0402_10V6K C30 0.22U_0402_10V6KC30 0.22U_0402_10V6K C31 0.22U_0402_10V6KC31 0.22U_0402_10V6K C32 0.22U_0402_10V6KC32 0.22U_0402_10V6K C33 0.22U_0402_10V6KC33 0.22U_0402_10V6K C34 0.22U_0402_10V6KC34 0.22U_0402_10V6K C35 0.22U_0402_10V6KC35 0.22U_0402_10V6K C36 0.22U_0402_10V6KC36 0.22U_0402_10V6K C37 0.22U_0402_10V6KC37 0.22U_0402_10V6K C38 0.22U_0402_10V6KC38 0.22U_0402_10V6K C39 0.22U_0402_10V6KC39 0.22U_0402_10V6K C40 0.22U_0402_10V6KC40 0.22U_0402_10V6K C41 0.22U_0402_10V6KC41 0.22U_0402_10V6K
PEG_ICOMPI and RCOMPO signals should be shorted and routed with - max length = 500 mils - typical impedance = 43 mohms PEG_ICOMPO signals should be routed with ­max length = 500 mils
- typical impedance = 14.5 mohms
PCIE_GTX_C_CRX_N[0..15] <14>
PCIE_GTX_C_CRX_P[0..15] <14>
PAY ATTENTION ON PCIE SWAP WHEN REVIEW
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
PCIE_CTX_C_GRX_N15 PCIE_CTX_C_GRX_N14 PCIE_CTX_C_GRX_N13 PCIE_CTX_C_GRX_N12 PCIE_CTX_C_GRX_N11 PCIE_CTX_C_GRX_N10 PCIE_CTX_C_GRX_N9 PCIE_CTX_C_GRX_N8 PCIE_CTX_C_GRX_N7 PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_N5 PCIE_CTX_C_GRX_N4 PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_N1 PCIE_CTX_C_GRX_N0
PCIE_CTX_C_GRX_P15 PCIE_CTX_C_GRX_P14 PCIE_CTX_C_GRX_P13 PCIE_CTX_C_GRX_P12 PCIE_CTX_C_GRX_P11 PCIE_CTX_C_GRX_P10 PCIE_CTX_C_GRX_P9 PCIE_CTX_C_GRX_P8 PCIE_CTX_C_GRX_P7 PCIE_CTX_C_GRX_P6 PCIE_CTX_C_GRX_P5 PCIE_CTX_C_GRX_P4 PCIE_CTX_C_GRX_P3 PCIE_CTX_C_GRX_P2 PCIE_CTX_C_GRX_P1 PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_N[0..15] <14>
PCIE_CTX_C_GRX_P[0..15] <14>
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Sandy Bridge(2/6)-DMI/FDI/PEG/eDP
Sandy Bridge(2/6)-DMI/FDI/PEG/eDP
Sandy Bridge(2/6)-DMI/FDI/PEG/eDP
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
6 58Friday, January 21, 2011
6 58Friday, January 21, 2011
6 58Friday, January 21, 2011
0.1
0.1
0.1
5
JCPUC
AP11 AN11
AL12 AM12 AM11
AL11 AP12 AN12
AJ14 AH14
AL15 AK15
AL14 AK14
AJ15 AH15
AE10
AF10
G10
N10
M10
AG6 AG5 AK6 AK5 AH5 AH6
AK8
AK9 AH8 AH9 AL9 AL8
AE8 AD9 AF9
F10
AJ5 AJ6 AJ8
AJ9
C5 D5 D3 D2 D6 C6 C2 C3
F8
G9 F9 F7 G8 G7 K4 K5 K1
J1 J5 J4 J2
K2
M8
N8 N7
M9 N9 M7
V6
JCPUC
SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]
SA_BS[0] SA_BS[1] SA_BS[2]
SA_CAS# SA_RAS# SA_WE#
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
DDR_A_D[0..63]<12>
DDR_A_D0 DDR_A_D1 DDR_A_D2
D D
C C
B B
DDR_A_BS0<12> DDR_A_BS1<12> DDR_A_BS2<12>
DDR_A_CAS#<12> DDR_A_RAS#<12>
DDR_A_WE#<12>
DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
SA_CLK[0]
SA_CLK#[0]
SA_CKE[0]
SA_CLK[1]
SA_CLK#[1]
SA_CKE[1]
SA_CLK[2]
SA_CLK#[2]
SA_CKE[2]
SA_CLK[3]
SA_CLK#[3]
SA_CKE[3]
SA_CS#[0] SA_CS#[1] SA_CS#[2] SA_CS#[3]
SA_ODT[0]
SA_ODT[1] SA_ODT[2] SA_ODT[3]
SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]
SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]
SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]
SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]
4
DDR_B_D[0..63]<13>
AB6 AA6 V9
AA5 AB5 V10
AB4 AA4 W9
AB3 AA3 W10
AK3 AL3 AG1 AH1
AH3 AG3 AG2 AH2
C4 G6 J3 M6 AL6 AM8 AR12 AM15
D4 F6 K3 N6 AL5 AM9 AR11 AM14
AD10 W1 W2 W7 V3 V2 W3 W6 V1 W5 AD8 V4 W4 AF8 V5 V7
DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7
DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7
DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8
DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15
DDRA_CLK0 <12> DDRB_CLK0 <13> DDRA_CLK0# <12> DDRA_CKE0 <12> DDRB_CKE0 <13>
DDRA_CLK1 <12> DDRA_CLK1# <12> DDRB_CLK1# <13> DDRA_CKE1 <12>
DDRA_CLK2 <12> DDRA_CLK2# <12> DDRA_CKE2 <12>
DDRA_CLK3 <12> DDRA_CLK3# <12> DDRA_CKE3 <12>
DDRA_SCS0# <12> DDRA_SCS1# <12> DDRB_SCS1# <13> DDRA_SCS2# <12> DDRA_SCS3# <12>
DDRA_ODT0 <12> DDRB_ODT0 <13> DDRA_ODT1 <12> DDRB_ODT1 <13> DDRA_ODT2 <12> DDRA_ODT3 <12>
DDR_A_DQS#[0..7] <12>
DDR_A_DQS[0..7] <12>
DDR_A_MA[0..15] <12>
DDR_B_CAS#<13> DDR_B_RAS#<13>
DDR_B_WE#<13>
3
JCPUD
JCPUD
DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63
DDR_B_BS0<13> DDR_B_BS1<13> DDR_B_BS2<13>
AM5 AM6 AR3
AN3 AN2 AN1
AN9
AN8 AR6 AR5 AR9
AJ11
AH11
AR8
AJ12 AH12 AT11 AN14 AR14 AT14 AT12 AN15 AR15 AT15
AA10
C9
SB_DQ[0]
A7
SB_DQ[1]
D10
SB_DQ[2]
C8
SB_DQ[3]
A9
SB_DQ[4]
A8
SB_DQ[5]
D9
SB_DQ[6]
D8
SB_DQ[7]
G4
SB_DQ[8]
F4
SB_DQ[9]
F1
SB_DQ[10]
G1
SB_DQ[11]
G5
SB_DQ[12]
F5
SB_DQ[13]
F2
SB_DQ[14]
G2
SB_DQ[15]
J7
SB_DQ[16]
J8
SB_DQ[17]
K10
SB_DQ[18]
K9
SB_DQ[19]
J9
SB_DQ[20]
J10
SB_DQ[21]
K8
SB_DQ[22]
K7
SB_DQ[23]
M5
SB_DQ[24]
N4
SB_DQ[25]
N2
SB_DQ[26]
N1
SB_DQ[27]
M4
SB_DQ[28]
N5
SB_DQ[29]
M2
SB_DQ[30]
M1
SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34]
AP3
SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38]
AP2
SB_DQ[39]
AP5
SB_DQ[40] SB_DQ[41]
AT5
SB_DQ[42]
AT6
SB_DQ[43]
AP6
SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49]
AT8
SB_DQ[50]
AT9
SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]
AA9
SB_BS[0]
AA7
SB_BS[1]
R6
SB_BS[2]
SB_CAS#
AB8
SB_RAS#
AB9
SB_WE#
2
AE2
SB_CLK[0]
AD2
SB_CLK#[0]
R9
SB_CKE[0]
AE1
SB_CLK[1]
AD1
SB_CLK#[1]
R10
SB_CKE[1]
AB2
SB_CLK[2]
AA2
SB_CLK#[2]
T9
SB_CKE[2]
AA1
SB_CLK[3]
AB1
SB_CLK#[3]
T10
SB_CKE[3]
AD3
SB_CS#[0]
AE3
SB_CS#[1]
AD6
SB_CS#[2]
AE6
SB_CS#[3]
AE4
SB_ODT[0]
AD4
SB_ODT[1]
AD5
SB_ODT[2]
AE5
SB_ODT[3]
DDR_B_DQS#0
D7
SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]
SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6]
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_DQS[7]
SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]
SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]
F3 K6 N3 AN5 AP9 AK12 AP15
C7 G3 J6 M3 AN6 AP8 AK11 AP14
AA8 T7 R7 T6 T2 T4 T3 R2 T5 R3 AB7 R1 T1 AB10 R5 R4
DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7
DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7
DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8
DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15
DDRB_CLK0# <13>
DDRB_CLK1 <13>
DDRB_CKE1 <13>
DDRB_CLK2 <13> DDRB_CLK2# <13> DDRB_CKE2 <13>
DDRB_CLK3 <13> DDRB_CLK3# <13> DDRB_CKE3 <13>
DDRB_SCS0# <13>
DDRB_SCS2# <13> DDRB_SCS3# <13>
DDRB_ODT2 <13> DDRB_ODT3 <13>
DDR_B_DQS#[0..7] <13>
DDR_B_DQS[0..7] <13>
DDR_B_MA[0..15] <13>
1
Sandy Bridge_rPGA_Rev0p61
Sandy Bridge_rPGA_Rev0p61
R59
@R59
@
0_0402_5%
0_0402_5%
1 2
S
H_DRAMRST#<5>
A A
DRAMRST_CNTRL_PCH<30>
5
4.99K_0402_1%
4.99K_0402_1%
R63
R63
0_0402_5%
0_0402_5%
1 2
DRAMRST_CNTRL
S
G
G
R62
R62
2
1 2
1
2
CONN@
CONN@
D
D
DDR3_DRAMRST#_RH_DRAMRST#
13
Q2
Q2 BSS138_NL_SOT23-3
BSS138_NL_SOT23-3
C42
C42
0.047U_0402_16V4Z
0.047U_0402_16V4Z
+1.5V
R60
R60
1K_0402_5%
1K_0402_5%
12
R61
R61 1K_0402_5%
1K_0402_5%
1 2
WHY ADD THE IK SERISE RESISTOR?
4
SM_DRAMRST# <12,13>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Sandy Bridge_rPGA_Rev0p61
Sandy Bridge_rPGA_Rev0p61
CONN@
CONN@
Compal Secret Data
Compal Secret Data
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Sandy Bridge(3/6)-DDR III
Sandy Bridge(3/6)-DDR III
Sandy Bridge(3/6)-DDR III
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
7 58Friday, January 21, 2011
7 58Friday, January 21, 2011
7 58Friday, January 21, 2011
0.1
0.1
0.1
5
4
3
2
1
+CPU_CORE
JCPUF
JCPUF
POWER
POWER
94A 18A
D D
C C
B B
A A
5
AG35
VCC1
AG34
VCC2
AG33
VCC3
AG32
VCC4
AG31
VCC5
AG30
VCC6
AG29
VCC7
AG28
VCC8
AG27
VCC9
AG26
VCC10
AF35
VCC11
AF34
VCC12
AF33
VCC13
AF32
VCC14
AF31
VCC15
AF30
VCC16
AF29
VCC17
AF28
VCC18
AF27
VCC19
AF26
VCC20
AD35
VCC21
AD34
VCC22
AD33
VCC23
AD32
VCC24
AD31
VCC25
AD30
VCC26
AD29
VCC27
AD28
VCC28
AD27
VCC29
AD26
VCC30
AC35
VCC31
AC34
VCC32
AC33
VCC33
AC32
VCC34
AC31
VCC35
AC30
VCC36
AC29
VCC37
AC28
VCC38
AC27
VCC39
AC26
VCC40
AA35
VCC41
AA34
VCC42
AA33
VCC43
AA32
VCC44
AA31
VCC45
AA30
VCC46
AA29
VCC47
AA28
VCC48
AA27
VCC49
AA26
VCC50
Y35
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
Y31
VCC55
Y30
VCC56
Y29
VCC57
Y28
VCC58
Y27
VCC59
Y26
VCC60
V35
VCC61
V34
VCC62
V33
VCC63
V32
VCC64
V31
VCC65
V30
VCC66
V29
VCC67
V28
VCC68
V27
VCC69
V26
VCC70
U35
VCC71
U34
VCC72
U33
VCC73
U32
VCC74
U31
VCC75
U30
VCC76
U29
VCC77
U28
VCC78
U27
VCC79
U26
VCC80
R35
VCC81
R34
VCC82
R33
VCC83
R32
VCC84
R31
VCC85
R30
VCC86
R29
VCC87
R28
VCC88
R27
VCC89
R26
VCC90
P35
VCC91
P34
VCC92
P33
VCC93
P32
VCC94
P31
VCC95
P30
VCC96
P29
VCC97
P28
VCC98
P27
VCC99
P26
VCC100
Sandy Bridge_rPGA_Rev0p61
Sandy Bridge_rPGA_Rev0p61
CONN@
CONN@
CORE SUPPLY
CORE SUPPLY
SENSE LINES SVID
SENSE LINES SVID
4
AH13
VCCIO1
AH10
VCCIO2
AG10
VCCIO3
AC10
VCCIO4
Y10
VCCIO5
U10
VCCIO6
P10
VCCIO7
L10
VCCIO8
J14
VCCIO9
J13
VCCIO10
J12
VCCIO11
J11
VCCIO12
H14
VCCIO13
H12
VCCIO14
H11
VCCIO15
G14
VCCIO16
G13
VCCIO17
G12
VCCIO18
F14
VCCIO19
F13
VCCIO20
F12
VCCIO21
F11
VCCIO22
E14
VCCIO23
E12
VCCIO24
E11
VCCIO25
D14
VCCIO26
D13
VCCIO27
D12
VCCIO28
D11
VCCIO29
C14
VCCIO30 VCCIO31 VCCIO32 VCCIO33 VCCIO34 VCCIO35 VCCIO36 VCCIO37 VCCIO38 VCCIO39
VCCIO40
VIDALERT#
VIDSCLK VIDSOUT
C13 C12 C11 B14 B12 A14 A13 A12 A11
J23
AJ29 AJ30 AJ28
AJ35 AJ34
B10 A10
VCCSENSE_R VSSSENSE_R
H_CPU_SVIDALRT# H_CPU_SVIDCLK H_CPU_SVIDDAT
PEG AND DDR
PEG AND DDR
VCC_SENSE VSS_SENSE
VCCIO_SENSE VSSIO_SENSE
Material Note (+1.05VS_VCCP)
2 x 330 µF (3x 330 µF for 2012 capable designs) Top Socket Cavity 22U 0805 *7 Bottom Socket Cavity 22U 0805 *5
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1
1
2
1
2
C44
C44
C43
C43
2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C53
C53
C54
C54
2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1
1
2
C46
C46
C45
C45
2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1
1
2
C48
C48
C47
C47
2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1
1
2
C50
C50
C49
C49
2
330U_D2_2V_Y
330U_D2_2V_Y
1
1
C62
C62
+
+
2
2
Cap quantity follow 439028_HR_PDDG_R1_51
+1.05VS_VCCP+1.05VS_VCCP
12
R65
R65 130_0402_5%
130_0402_5%
R67
R67
43_0402_1%
43_0402_1%
1 2
R68 0_0402_5%R68 0_0402_5%
1 2
R69 0_0402_5%R69 0_0402_5%
1 2
Close to CPU
VCCSENSE
VSSSENSE
1 2
R70 100_0402_1%R70 100_0402_1%
1 2
R71 100_0402_1%R71 100_0402_1%
0_0402_5%
0_0402_5%
R72
R72
1 2 1 2
R73 0_0402_5%R73 0_0402_5%
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VCCSENSE VSSSENSE
VCCIO_SENSE <52>
3
12
R66
R66 75_0402_5%
75_0402_5%
VR_SVID_ALRT# <55> VR_SVID_CLK <55> VR_SVID_DAT <55>
Resistors close to CPU
+CPU_CORE
VCCSENSE <55> VSSSENSE <55>
R74
R74
1 2
10_0402_5%
10_0402_5%
Compal Secret Data
Compal Secret Data
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
+1.05VS_VCCP
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1
1
C51
C51
C52
C52
2
2
330U_D2_2V_Y
330U_D2_2V_Y
1
C63
C63
+
+
+
C64
@+C64
@
330U_D2_2V_Y
330U_D2_2V_Y
2
2
+1.05VS_VCCP
1
C83
C83
+
+
330U_2.5V_M_R17@
330U_2.5V_M_R17@
2
reserve for test please co-layout with C62,C63
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
C73
C73
+
+
330U_2.5V_M_R17@
330U_2.5V_M_R17@
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Sandy Bridge(4/6)-PWR
Sandy Bridge(4/6)-PWR
Sandy Bridge(4/6)-PWR
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
8 58Friday, January 21, 2011
8 58Friday, January 21, 2011
8 58Friday, January 21, 2011
0.1
0.1
0.1
Group1
5
4
3
2
1
Material Note (GFXCORE)
2 x 330 µF on Bottom socket edge
+GFX_CORE
D D
C C
B B
Material Note (+1.8VS_VCCPLL)
1 x 330 µF Bottom Socket Edge 1U 0402 *1 10U 0805 *1
Bottom Socket Cavity 22U 0805 *2 Bottom Socket Edge 22U 0805 *4 Top Socket Cavity 22U 0805 *2 Top Socket Edge 22U 0805 *4
C217
330U_D2_2V_Y+C217
330U_D2_2V_Y
1
2
22U_0805_6.3V6M
22U_0805_6.3V6M
1
2
22U_0805_6.3V6M
22U_0805_6.3V6M
C79
330U_D2_2V_Y
C79
330U_D2_2V_Y
@
@
C414
C414
C412
C412
1
2
1
2
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C285
C285
C284
C284
2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C364
C364
C365
C365
2
22U_0805_6.3V6M
22U_0805_6.3V6M
+1.8VS
R124
R124
0_0805_5%
0_0805_5%
1 2
1
+
2
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C286
C286
2
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C410
C410
2
1
+
+
2
C225
330U_D2_2V_Y+C225
330U_D2_2V_Y
+
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C415
C415
2
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C411
C411
2
C80
C80
1
2
1
C416
C416
2
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C413
C413
2
22U_0805_6.3V6M
22U_0805_6.3V6M
+1.8VS_VCCPLL
C81
1U_0402_6.3V6K
C81
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
2
POWER
JCPUG
JCPUG
26A
AT24
VAXG1
AT23
VAXG2
AT21
VAXG3
AT20
VAXG4
AT18
VAXG5
AT17
VAXG6
AR24
VAXG7
AR23
VAXG8
AR21
VAXG9
AR20
VAXG10
AR18
VAXG11
AR17
VAXG12
AP24
VAXG13
AP23
VAXG14
AP21
1
2
1
2
C82
C82
VAXG15
AP20
VAXG16
AP18
VAXG17
AP17
VAXG18
AN24
VAXG19
AN23
VAXG20
AN21
VAXG21
AN20
VAXG22
AN18
VAXG23
AN17
VAXG24
AM24
VAXG25
AM23
VAXG26
AM21
VAXG27
AM20
VAXG28
AM18
VAXG29
AM17
VAXG30
AL24
VAXG31
AL23
VAXG32
AL21
VAXG33
AL20
VAXG34
AL18
VAXG35
AL17
VAXG36
AK24
VAXG37
AK23
VAXG38
AK21
VAXG39
AK20
VAXG40
AK18
VAXG41
AK17
VAXG42
AJ24
VAXG43
AJ23
VAXG44
AJ21
VAXG45
AJ20
VAXG46
AJ18
VAXG47
AJ17
VAXG48
AH24
VAXG49
AH23
VAXG50
AH21
VAXG51
AH20
VAXG52
AH18
VAXG53
AH17
VAXG54
B6
VCCPLL1
A6
VCCPLL2
A2
VCCPLL3
Sandy Bridge_rPGA_Rev0p61
Sandy Bridge_rPGA_Rev0p61
CONN@
CONN@
POWER
GRAPHICS
GRAPHICS
1.8V RAIL
1.8V RAIL
Group2
SM_VREF
5A
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8
VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15
6A
VCCSA1 VCCSA2 VCCSA3 VCCSA4 VCCSA5 VCCSA6 VCCSA7 VCCSA8
FC_C22
AK35 AK34
AL1
AF7 AF4 AF1 AC7 AC4 AC1 Y7 Y4 Y1 U7 U4 U1 P7 P4 P1
M27 M26 L26 J26 J25 J24 H26 H25
H23
C22 C24
VAXG_SENSE
VSSAXG_SENSE
SENSE
LINES
SENSE
LINES
VREFMISC
VREFMISC
DDR3 -1.5V RAILS
DDR3 -1.5V RAILS
SA RAIL
SA RAIL
VCCSA_SENSE
VCCSA_VID1
1 2
100_0402_1%
100_0402_1%
R129
R129
1 2
100_0402_1%
100_0402_1%
+V_SM_VREF_CNT +V_SM_VREF
1
C65
C65
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+VCCSA
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C74
C74
2
H_FC_C22
1 2
R131
R131
0_0402_5%
0_0402_5%
2
10U_0603_6.3V6M
10U_0603_6.3V6M
1
C66
C66
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C75
C75
2
R79
R79 10K_0402_5%
10K_0402_5%
+GFX_CORE
VCC_AXG_SENSE <55> VSS_AXG_SENSE <55>
R76
R76
12
3
@
@
Q3
Q3
1
AP2302GN-HF_SOT23-3
AP2302GN-HF_SOT23-3
RUN_ON_CPU1.5VS3
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
C68
C68
C67
C67
2
2
+VCCSA
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C76
C76
2
12
R80
@R80
@
0_0402_5%
0_0402_5%
10U_0603_6.3V6M
10U_0603_6.3V6M
1
2
1 2
330U_D2_2V_Y+C78
330U_D2_2V_Y
1
+
2
R78
R78 0_0402_5%
0_0402_5%
+1.5V_CPU
12
R75
R75 1K_0402_1%
1K_0402_1%
12
R77
R77 1K_0402_1%
1K_0402_1%
10U_0603_6.3V6M
10U_0603_6.3V6M
1
C69
C69
C70
C70
2
C78
VCCSA_SENSE <54>
VCCSA_SEL <54>
+1.5V_CPU
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
C71
C71
2
2
VCCSA_SENSE
Follow DG V1.5 P.109
+V_SM_VREF should have 20 mil trace width
JP1
@ JP1
@
2
+1.5V
Material Note (VDDQ)
Bottom Socket Edge 1 x 330 µF 10U 0805 *6
+
+
330U_D2_2V_Y
330U_D2_2V_Y
C72
C72
112
JUMP_43X118
JUMP_43X118
Material Note (VCCSA)
1 x 330 µF Bottom Socket Cavity 10U 0805 *2 Bottom Socket Edge 10U 0805 *1
+1.5V_CPU Source
+1.5V +1.5V_CPU
+VSB
+3VALW
12
R83
R83 100K_0402_5%
A A
CPU1.5V_S3_GATE<43>
SUSP#<43,46,50,52,54,57,58>
R84
R84
0_0402_5%
0_0402_5%
1 2
R86
@R86
@
0_0402_5%
0_0402_5%
1 2
5
100K_0402_5%
RUN_ON_CPU1.5VS3#
61
Q35A
Q35A 2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
2
12
R81
R81 100K_0402_5%
100K_0402_5%
RUN_ON_CPU1.5VS3
3
Q35B
Q35B 2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
5
4
R85
R85
330K_0402_5%
330K_0402_5%
4
Q4
Q4 SI4634DY-T1-GE3_SO8
SI4634DY-T1-GE3_SO8
8 7 6 5
4
12
1
2
1 2 3
C86
C86
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R82
R82 470_0603_5%
470_0603_5%
1 2
13
D
D
S
S
G
G
RUN_ON_CPU1.5VS3#
2
Q6
Q6 2N7002H 1N SOT23-3
2N7002H 1N SOT23-3
Security Classification
Security Classification
Security Classification
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Issued Date
Issued Date
Compal Secret Data
Compal Secret Data
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
3
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Sandy Bridge(4/6)-PWR
Sandy Bridge(4/6)-PWR
Sandy Bridge(4/6)-PWR
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
9 58Friday, January 21, 2011
9 58Friday, January 21, 2011
9 58Friday, January 21, 2011
0.1
0.1
0.1
5
4
3
2
1
CFG Straps for Processor
CFG2
D D
JCPUE
JCPUE
L7
RSVD28
AG7
RSVD29 RSVD30 RSVD31 RSVD32
RSVD33 RSVD34 RSVD35
RSVD37 RSVD38 RSVD39 RSVD40
RSVD41 RSVD42 RSVD43 RSVD44 RSVD45
RSVD46 RSVD47 RSVD48 RSVD49 RSVD50
RSVD51 RSVD52
RSVD53
RSVD54 RSVD55
RSVD56 RSVD57 RSVD58
KEY
AE7 AK2 W8
AT26 AM33 AJ27
T8 J16 H16 G16
AR35 AT34 AT33 AP35 AR34
B34 A33 A34 B35 C35
AJ32 AK32
AH27
AN35 AM35
AT2 AT1 AR1
B1
T20PAD@ T20PAD@
CLK_RES_ITP <5,30> CLK_RES_ITP# <5,30>
T16 PAD @T16 PAD @ T17 PAD @T17 PAD @ T18 PAD @T18 PAD @ T19 PAD @T19 PAD @
CPU_RSVD6 CPU_RSVD7
12
12
R90
R90
1K_0402_1%
1K_0402_1%
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17
CFG0<5>
CFG12<5> CFG13<5> CFG14<5> CFG15<5>
C C
B B
T4 PAD @T4 PAD @ T5 PAD @T5 PAD @ T6 PAD @T6 PAD @ T7 PAD @T7 PAD @ T3 PAD @T3 PAD @ T8 PAD @T8 PAD @ T9 PAD @T9 PAD @ T10 PAD @T10 PAD @ T11 PAD @T11 PAD @ T12 PAD @T12 PAD @ T13 PAD @T13 PAD @
T14 PAD @T14 PAD @ T15 PAD @T15 PAD @
R89
R89
1K_0402_1%
1K_0402_1%
AK28
CFG[0]
AK29
CFG[1]
AL26
CFG[2]
AL27
CFG[3]
AK26
CFG[4]
AL29
CFG[5]
AL30
CFG[6]
AM31
CFG[7]
AM32
CFG[8]
AM30
CFG[9]
AM28
CFG[10]
AM26
CFG[11]
AN28
CFG[12]
AN31
CFG[13]
AN26
CFG[14]
AM27
CFG[15]
AK31
CFG[16]
AN29
CFG[17]
AJ31
RSVD1
AH31
RSVD2
AJ33
RSVD3
AH33
RSVD4
AJ26
RSVD5
B4
RSVD6
D1
RSVD7
F25
RSVD8
F24
RSVD9
F23
RSVD10
D24
RSVD11
G25
RSVD12
G24
RSVD13
E23
RSVD14
D23
RSVD15
C30
RSVD16
A31
RSVD17
B30
RSVD18
B29
RSVD19
D30
RSVD20
B31
RSVD21
A30
RSVD22
C29
RSVD23
J20
RSVD24
B18
RSVD25
A19
RSVD26
J15
RSVD27
Sandy Bridge_rPGA_Rev0p61
Sandy Bridge_rPGA_Rev0p61
CONN@
CONN@
RESERVED
RESERVED
PEG Static Lane Reversal - CFG2 is for the 16x
CFG2
*
Display Port Presence Strap
CFG4
*
PCIE Port Bifurcation Straps
11: (Default) x16 - Device 1 functions 1 and 2 disabled
*
CFG[6:5]
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
12
R87
R87 1K_0402_1%
1K_0402_1%
1: Normal Operation; Lane # definition matches socket pin map definition
0:Lane Reversed
CFG4
1K_0402_1%
1K_0402_1%
12
@
@
R88
R88 1K_0402_1%
1K_0402_1%
1 : Disabled; No Physical Display Port attached to Embedded Display Port
0 : Enabled; An external Display Port device is connected to the Embedded Display Port
CFG6
CFG5
CFG7
@R91
@
12
12
R92
@R92
12
@R93
@
@
1K_0402_1%
1K_0402_1%
R93 1K_0402_1%
1K_0402_1%
R91
PEG DEFER TRAINING
1: (Default) PEG Train immediately following xxRESETB
CFG7
de assertion
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
0: PEG Wait for BIOS for training
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Sandy Bridge(5/6) Reserve
Sandy Bridge(5/6) Reserve
Sandy Bridge(5/6) Reserve
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
0.1
0.1
10 58Friday, January 21, 2011
10 58Friday, January 21, 2011
10 58Friday, January 21, 2011
0.1
5
4
3
2
1
Material Note (+CPU_CORE)
4 x 330 µF Top Socket Cavity 22U 0805 *8
JCPUI
JCPUH
JCPUH
AT35
VSS1
AT32
VSS2
AT29
VSS3
AT27
VSS4
AT25
VSS5
AT22
VSS6
AT19
D D
C C
B B
VSS7
AT16
VSS8
AT13
VSS9
AT10
VSS10
AT7
VSS11
AT4
VSS12
AT3
VSS13
AR25
VSS14
AR22
VSS15
AR19
VSS16
AR16
VSS17
AR13
VSS18
AR10
VSS19
AR7
VSS20
AR4
VSS21
AR2
VSS22
AP34
VSS23
AP31
VSS24
AP28
VSS25
AP25
VSS26
AP22
VSS27
AP19
VSS28
AP16
VSS29
AP13
VSS30
AP10
VSS31
AP7
VSS32
AP4
VSS33
AP1
VSS34
AN30
VSS35
AN27
VSS36
AN25
VSS37
AN22
VSS38
AN19
VSS39
AN16
VSS40
AN13
VSS41
AN10
VSS42
AN7
VSS43
AN4
VSS44
AM29
VSS45
AM25
VSS46
AM22
VSS47
AM19
VSS48
AM16
VSS49
AM13
VSS50
AM10
VSS51
AM7
VSS52
AM4
VSS53
AM3
VSS54
AM2
VSS55
AM1
VSS56
AL34
VSS57
AL31
VSS58
AL28
VSS59
AL25
VSS60
AL22
VSS61
AL19
VSS62
AL16
VSS63
AL13
VSS64
AL10
VSS65
AL7
VSS66
AL4
VSS67
AL2
VSS68
AK33
VSS69
AK30
VSS70
AK27
VSS71
AK25
VSS72
AK22
VSS73
AK19
VSS74
AK16
VSS75
AK13
VSS76
AK10
VSS77
AK7
VSS78
AK4
VSS79
AJ25
VSS80
Sandy Bridge_rPGA_Rev0p61
Sandy Bridge_rPGA_Rev0p61
CONN@
CONN@
VSS
VSS
VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160
AJ22 AJ19 AJ16 AJ13 AJ10 AJ7 AJ4 AJ3 AJ2 AJ1 AH35 AH34 AH32 AH30 AH29 AH28 AH26 AH25 AH22 AH19 AH16 AH7 AH4 AG9 AG8 AG4 AF6 AF5 AF3 AF2 AE35 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE9 AD7 AC9 AC8 AC6 AC5 AC3 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 Y9 Y8 Y6 Y5 Y3 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 U9 U8 U6 U5 U3 U2
JCPUI
T35
VSS161
T34
VSS162
T33
VSS163
T32
VSS164
T31
VSS165
T30
VSS166
T29
VSS167
T28
VSS168
T27
VSS169
T26
VSS170
P9
VSS171
P8
VSS172
P6
VSS173
P5
VSS174
P3
VSS175
P2
VSS176
N35
VSS177
N34
VSS178
N33
VSS179
N32
VSS180
N31
VSS181
N30
VSS182
N29
VSS183
N28
VSS184
N27
VSS185
N26
VSS186
M34
VSS187
L33
VSS188
L30
VSS189
L27
VSS190
L9
VSS191
L8
VSS192
L6
VSS193
L5
VSS194
L4
VSS195
L3
VSS196
L2
VSS197
L1
VSS198
K35
VSS199
K32
VSS200
K29
VSS201
K26
VSS202
J34
VSS203
J31
VSS204
H33
VSS205
H30
VSS206
H27
VSS207
H24
VSS208
H21
VSS209
H18
VSS210
H15
VSS211
H13
VSS212
H10
VSS213
H9
VSS214
H8
VSS215
H7
VSS216
H6
VSS217
H5
VSS218
H4
VSS219
H3
VSS220
H2
VSS221
H1
VSS222
G35
VSS223
G32
VSS224
G29
VSS225
G26
VSS226
G23
VSS227
G20
VSS228
G17
VSS229
G11
VSS230
F34
VSS231
F31
VSS232
F29
VSS233
Sandy Bridge_rPGA_Rev0p61
Sandy Bridge_rPGA_Rev0p61
CONN@
CONN@
VSS
VSS
VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285
F22 F19 E30 E27 E24 E21 E18 E15 E13 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 D35 D32 D29 D26 D20 D17 C34 C31 C28 C27 C25 C23 C10 C1 B22 B19 B17 B15 B13 B11 B9 B8 B7 B5 B3 B2 A35 A32 A29 A26 A23 A20 A3
Top Socket Edge 22U 0805 *8 Bottom Socket Cavity 10U 0805 *10
+CPU_CORE
C87
10U_0805_10V7M
C87
+CPU_CORE
+CPU_CORE
10U_0805_10V7M
1
2
1
2
1
2
1
2
1
2
1
+
+
@
@
2
1
2
C92
10U_0805_10V7M
C92
10U_0805_10V7M
1
2
22U_0805_6.3V6M
22U_0805_6.3V6M
C98
22U_0805_6.3V6M
C98
22U_0805_6.3V6M
1
2
22U_0805_6.3V6M
22U_0805_6.3V6M
C103
22U_0805_6.3V6M
C103
22U_0805_6.3V6M
1
2
22U_0805_6.3V6M
22U_0805_6.3V6M
C108
22U_0805_6.3V6M
C108
22U_0805_6.3V6M
1
2
22U_0805_6.3V6M
22U_0805_6.3V6M
1
2
330U_D2_2V_Y+C117
330U_D2_2V_Y
C219
330U_D2_2V_Y
C219
330U_D2_2V_Y
1
+
2
10U_0805_10V7M
10U_0805_10V7M
C88
10U_0805_10V7M
C88
10U_0805_10V7M
1
2
10U_0805_10V7M
10U_0805_10V7M
C93
10U_0805_10V7M
C93
10U_0805_10V7M
1
2
C99
C99
C100
22U_0805_6.3V6M
C100
22U_0805_6.3V6M
1
2
C104
C104
C105
22U_0805_6.3V6M
C105
22U_0805_6.3V6M
1
2
C110
22U_0805_6.3V6M
C110
22U_0805_6.3V6M
C109
C109
1
2
C113
C113
C117
C118
330U_D2_2V_Y+C118
330U_D2_2V_Y
1
+
2
C90
10U_0805_10V7M
C90
10U_0805_10V7M
C89
C89
1
2
10U_0805_10V7M
10U_0805_10V7M
C94
C94
1
2
C101
22U_0805_6.3V6M
C101
22U_0805_6.3V6M
1
2
C106
22U_0805_6.3V6M
C106
22U_0805_6.3V6M
1
2
C111
22U_0805_6.3V6M
C111
22U_0805_6.3V6M
1
2
C119
330U_D2_2V_Y+C119
330U_D2_2V_Y
1
+
2
C91
10U_0805_10V7M
C91
10U_0805_10V7M
1
2
C95
C95
C96
10U_0805_10V7M
C96
10U_0805_10V7M
1
2
C102
22U_0805_6.3V6M
C102
22U_0805_6.3V6M
1
2
C107
22U_0805_6.3V6M
C107
22U_0805_6.3V6M
1
2
C112
22U_0805_6.3V6M
C112
22U_0805_6.3V6M
1
2
C120
330U_D2_2V_Y+C120
330U_D2_2V_Y
1
+
2
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet
Compal Electronics, Inc.
Sandy Bridge(6/6)-GND
Sandy Bridge(6/6)-GND
Sandy Bridge(6/6)-GND
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
11 58Friday, January 21, 2011
11 58Friday, January 21, 2011
11 58Friday, January 21, 2011
0.1
0.1
0.1
of
5
+1.5V
1K_0402_1%
1K_0402_1%
12
R94
R94
+VREFA_DQ
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
0.1U_0402_10V6K
0.1U_0402_10V6K C121
C121
C127
1K_0402_1%
1K_0402_1%
D D
C C
B B
Layout Note: Place near JDIMMA1.203,204
+0.75VS
A A
C127
1
1
12
R95
R95
1
2
2
2
DDRA_CKE0<7>
DDR_A_BS2<7>
DDRA_CLK0<7> DDRA_CLK0#<7>
DDR_A_BS0<7>
DDR_A_WE#<7> DDR_A_CAS#<7>
DDRA_SCS1#<7>
C135
1U_0402_6.3V6K
C135
1U_0402_6.3V6K
C136
1U_0402_6.3V6K
C136
1U_0402_6.3V6K
1
2
+3VS
1
2
5
+VREFA_DQ
DDR_A_D0 DDR_A_D1
DDR_A_D2 DDR_A_D3
DDR_A_D8 DDR_A_D9
DDR_A_DQS#1 DDR_A_DQS1
DDR_A_D10 DDR_A_D11
DDR_A_D16 DDR_A_D17
DDR_A_DQS#2 DDR_A_DQS2
DDR_A_D18 DDR_A_D19
DDR_A_D24 DDR_A_D25
DDR_A_D26 DDR_A_D27
DDRA_CKE0
DDR_A_BS2
DDR_A_MA12 DDR_A_MA9
DDR_A_MA8 DDR_A_MA5
DDR_A_MA3 DDR_A_MA1
DDRA_CLK0 DDRA_CLK0#
DDR_A_MA10 DDR_A_BS0
DDR_A_WE# DDR_A_CAS# DDRA_ODT0
DDR_A_MA13 DDRA_SCS1#
DDR_A_D32 DDR_A_D33
DDR_A_DQS#4 DDR_A_DQS4
DDR_A_D34 DDR_A_D35
DDR_A_D40 DDR_A_D41
DDR_A_D42 DDR_A_D43
DDR_A_D48 DDR_A_D49
DDR_A_DQS#6 DDR_A_DQS6
DDR_A_D50 DDR_A_D51
DDR_A_D56 DDR_A_D57
DDR_A_D58 DDR_A_D59
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
0.1U_0402_10V6K
0.1U_0402_10V6K
C143
C143
C144
C144
1
2
+1.5V +1.5V
R99
10K_0402_5%
R99
10K_0402_5%
R100
10K_0402_5%
R100
10K_0402_5%
12
12
3A@1.5V
3A@1.5V
3A@1.5V3A@1.5V
JDDR1
JDDR1
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1
9
VSS4
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
25
VSS9
27
DQS#1 DQS129RESET# VSS1131VSS12
33
DQ10
35
DQ11 VSS1337VSS14
39
DQ16
41
DQ17 VSS1543VSS16
45
DQS#2
47
DQS2
49
VSS18
51
DQ18
53
DQ19
55
VSS20
57
DQ24
59
DQ25 VSS2261DQS#3
63
DM3 VSS2365VSS24
67
DQ26
69
DQ27 VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
83
A12/BC#
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
99
VDD9
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
TYCO_2-2013289-1
TYCO_2-2013289-1
@
@
Standard:5.2mm <Address: SA1:SA0=00> BOT
DQ4 DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7 VSS8 DQ12 DQ13
VSS10
DM1
DQ14 DQ15
DQ20 DQ21
DM2
VSS17
DQ22 DQ23
VSS19
DQ28 DQ29
VSS21
DQS3
DQ30 DQ31
CKE1 VDD2
VDD4
VDD6
VDD8
VDD10
CK1 CK1#
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36 DQ37
VSS30
DM4
VSS31
DQ38 DQ39
VSS33
DQ44 DQ45
VSS35 DQS#5
DQS5
VSS38
DQ46 DQ47
VSS40
DQ52 DQ53
VSS42
DM6
VSS43
DQ54 DQ55
VSS45
DQ60 DQ61
VSS47 DQS#7
DQS7
VSS50
DQ62 DQ63
VSS52
EVENT#
SDA
SCL VTT2
4
Support SO DIMM X 4
2
DDR_A_D4
4
DDR_A_D5
6 8
DDR_A_DQS#0
10
DDR_A_DQS0
12 14
DDR_A_D6
16
DDR_A_D7
18 20
DDR_A_D12
22
DDR_A_D13
24 26 28
SM_DRAMRST#
30 32
DDR_A_D14
34
DDR_A_D15
36 38
DDR_A_D20
40
DDR_A_D21
42 44 46 48
DDR_A_D22
50
DDR_A_D23
52 54
DDR_A_D28
56
DDR_A_D29
58 60
DDR_A_DQS#3
62
DDR_A_DQS3
64 66
DDR_A_D30
68
DDR_A_D31
70 72
DDRA_CKE1
74 76
DDR_A_MA15
78
A15 A14
A11
A7
A6 A4
A2 A0
BA1
S0#
G2
DDR_A_MA14
80 82
DDR_A_MA11
84
DDR_A_MA7
86 88
DDR_A_MA6
90
DDR_A_MA4
92 94
DDR_A_MA2
96
DDR_A_MA0
98 100
DDRA_CLK1
102
DDRA_CLK1#
104 106
DDR_A_BS1
108
DDR_A_RAS#
110 112
DDRA_SCS0#
114 116 118
DDRA_ODT1
120 122 124
+VREF_CA
126 128
DDR_A_D36
130
DDR_A_D37
132 134 136 138
DDR_A_D38
140
DDR_A_D39
142 144
DDR_A_D44
146
DDR_A_D45
148 150
DDR_A_DQS#5
152
DDR_A_DQS5
154 156
DDR_A_D46
158
DDR_A_D47
160 162
DDR_A_D52
164
DDR_A_D53
166 168 170 172
DDR_A_D54
174
DDR_A_D55
176 178
DDR_A_D60
180
DDR_A_D61
182 184
DDR_A_DQS#7
186
DDR_A_DQS7
188 190
DDR_A_D62
192
DDR_A_D63
194 196 198
PM_SMBDATA
200
PM_SMBCLK
202 204
206
4
+0.75VS
0.65A@0.75V
0.65A@0.75V
0.65A@0.75V0.65A@0.75V
Support 1066/1333MHz
DDR_A_D[0..63]<7>
DDR_A_DQS[0..7]<7>
DDR_A_DQS#[0..7]<7>
DDR_A_MA[0..15]<7>
SM_DRAMRST# <7,13>
Layout Note: Place near JDIMMA
+1.5V
330U_B2_2.5VM_R15M
330U_B2_2.5VM_R15M
10U_0603_6.3V6M
10U_0603_6.3V6M
C128
C128
C122
C122
1
1
+
+
2
2
DDRA_CKE1 <7>
DDRA_CLK1 <7> DDRA_CLK1# <7>
DDR_A_BS1 <7> DDR_A_RAS# <7>
DDRA_SCS0# <7> DDRA_ODT0 <7>
DDRA_ODT1 <7>
0.1U_0402_10V6K
0.1U_0402_10V6K
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
C131
C131
C132
1
2
PM_SMBDATA <13,30,39> PM_SMBCLK <13,30,39>
C132
1
2
Layout Note: Place these 4 Caps near Command and Control signals of JDIMMA
+1.5V
3
+VREFA_DQ
DDR_A_D0 DDR_A_D1
DDR_A_D2 DDR_A_D3
DDR_A_D8 DDR_A_D9
DDR_A_DQS#1 DDR_A_DQS1
DDR_A_D10 DDR_A_D11
DDR_A_D16 DDR_A_D17
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
C129
C129
1
2
+1.5V
12
R96
R96 1K_0402_1%
1K_0402_1%
12
R97
R97 1K_0402_1%
1K_0402_1%
0.1U_0402_10V6K
0.1U_0402_10V6K C137
C137
1
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
10U_0603_6.3V6M
C123
C123
C124
C124
1
1
2
2
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K C138
C138
1
1
2
2
3
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
C125
C125
1
2
C139
C139
C130
47P_0402_50V8J
C130
47P_0402_50V8J
C126
C126
1
12
2
DDRA_CKE2<7>
DDRA_CLK2<7> DDRA_CLK2#<7>
DDRA_SCS3#<7>
0.1U_0402_10V6K
0.1U_0402_10V6K C140
C140
1
2
+3VS
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
1
C145
C145
2
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
DDR_A_DQS#2 DDR_A_DQS2
DDR_A_D18 DDR_A_D19
DDR_A_D24 DDR_A_D25
DDR_A_D26 DDR_A_D27
DDRA_CKE2
DDR_A_BS2
DDR_A_MA12 DDR_A_MA9
DDR_A_MA8 DDR_A_MA5
DDR_A_MA3 DDR_A_MA1
DDRA_CLK2 DDRA_CLK2#
DDR_A_MA10 DDR_A_BS0
DDR_A_WE# DDR_A_CAS# DDRA_ODT2
DDR_A_MA13 DDRA_SCS3#
DDR_A_D32 DDR_A_D33
DDR_A_DQS#4 DDR_A_DQS4
DDR_A_D34 DDR_A_D35
DDR_A_D40 DDR_A_D41
DDR_A_D42 DDR_A_D43
DDR_A_D48 DDR_A_D49
DDR_A_DQS#6 DDR_A_DQS6
DDR_A_D50 DDR_A_D51
DDR_A_D56 DDR_A_D57
DDR_A_D58 DDR_A_D59
1 2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C146
C146
2
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
+1.5V +1.5V
R9810K_0402_5% R9810K_0402_5%
R101
10K_0402_5%
R101
10K_0402_5%
12
3 5 7
9 11 13 15 17 19 21 23 25 27
33 35
39 41
45 47 49 51 53 55 57 59
63
67 69
73 75 77 79 81 83 85 87 89 91 93 95 97 99
101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203
205
2
3A@1.5V
3A@1.5V
3A@1.5V3A@1.5V
JDDR2
JDDR2
VREF_DQ1VSS1 VSS2 DQ0 DQ1 VSS4 DM0 VSS5 DQ2 DQ3 VSS7 DQ8 DQ9 VSS9 DQS#1 DQS129RESET# VSS1131VSS12 DQ10 DQ11 VSS1337VSS14 DQ16 DQ17 VSS1543VSS16 DQS#2 DQS2 VSS18 DQ18 DQ19 VSS20 DQ24 DQ25 VSS2261DQS#3 DM3 VSS2365VSS24 DQ26 DQ27 VSS2571VSS26
CKE0 VDD1 NC1 BA2 VDD3 A12/BC# A9 VDD5 A8 A5 VDD7 A3 A1 VDD9 CK0 CK0# VDD11 A10/AP BA0 VDD13 WE# CAS# VDD15 A13 S1# VDD17 NCTEST VSS27 DQ32 DQ33 VSS29 DQS#4 DQS4 VSS32 DQ34 DQ35 VSS34 DQ40 DQ41 VSS36 DM5 VSS37 DQ42 DQ43 VSS39 DQ48 DQ49 VSS41 DQS#6 DQS6 VSS44 DQ50 DQ51 VSS46 DQ56 DQ57 VSS48 DM7 VSS49 DQ58 DQ59 VSS51 SA0 VDDSPD SA1 VTT1
G1
TYCO_2-2013287-1
TYCO_2-2013287-1
@
@
VSS3
DQS#0
DQS0 VSS6
VSS8 DQ12 DQ13
VSS10
DQ14 DQ15
DQ20 DQ21
VSS17
DQ22 DQ23
VSS19
DQ28 DQ29
VSS21
DQS3
DQ30 DQ31
CKE1 VDD2
VDD4
VDD6
VDD8
VDD10
CK1#
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
VDD18
VREF_CA
VSS28
DQ36 DQ37
VSS30
VSS31
DQ38 DQ39
VSS33
DQ44
DQ45 VSS35 DQS#5
DQS5 VSS38
DQ46
DQ47 VSS40
DQ52
DQ53 VSS42
VSS43
DQ54
DQ55 VSS45
DQ60
DQ61 VSS47 DQS#7
DQS7 VSS50
DQ62
DQ63 VSS52
EVENT#
VTT2
1
2
DDR_A_D4
4
DQ4 DQ5
DQ6 DQ7
DM1
DM2
CK1
BA1
NC2
DM4
DM6
SDA SCL
A15 A14
A11
A7
A6 A4
A2 A0
S0#
G2
DDR_A_D5
6 8
DDR_A_DQS#0
10
DDR_A_DQS0
12 14
DDR_A_D6
16
DDR_A_D7
18 20
DDR_A_D12
22
DDR_A_D13
24 26 28
SM_DRAMRST#
30 32
DDR_A_D14
34
DDR_A_D15
36 38
DDR_A_D20
40
DDR_A_D21
42 44 46 48
DDR_A_D22
50
DDR_A_D23
52 54
DDR_A_D28
56
DDR_A_D29
58 60
DDR_A_DQS#3
62
DDR_A_DQS3
64 66
DDR_A_D30
68
DDR_A_D31
70 72
DDRA_CKE3
74 76
DDR_A_MA15
78
DDR_A_MA14
80 82
DDR_A_MA11
84
DDR_A_MA7
86 88
DDR_A_MA6
90
DDR_A_MA4
92 94
DDR_A_MA2
96
DDR_A_MA0
98 100
DDRA_CLK3
102
DDRA_CLK3#
104 106
DDR_A_BS1
108
DDR_A_RAS#
110 112
DDRA_SCS2#
114 116 118
DDRA_ODT3
120 122 124 126 128
DDR_A_D36
130
DDR_A_D37
132 134 136 138
DDR_A_D38
140
DDR_A_D39
142 144
DDR_A_D44
146
DDR_A_D45
148 150
DDR_A_DQS#5
152
DDR_A_DQS5
154 156
DDR_A_D46
158
DDR_A_D47
160 162
DDR_A_D52
164
DDR_A_D53
166 168 170 172
DDR_A_D54
174
DDR_A_D55
176 178
DDR_A_D60
180
DDR_A_D61
182 184
DDR_A_DQS#7
186
DDR_A_DQS7
188 190
DDR_A_D62
192
DDR_A_D63
194 196 198
PM_SMBDATA
200
PM_SMBCLK
202 204
206
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
+0.75VS
0.65A@0.75V
0.65A@0.75V
0.65A@0.75V0.65A@0.75V
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
DDRA_CKE3 <7>
DDRA_CLK3 <7> DDRA_CLK3# <7>
DDRA_SCS2# <7> DDRA_ODT2 <7>
DDRA_ODT3 <7>
0.1U_0402_10V6K
0.1U_0402_10V6K C133
C133
1
2
Layout Note: Place near JDIMMA2.203,204
+0.75VS
Reverse:4mm <Address: SA1:SA0=01> TOP
DDRIII-DIMMA
DDRIII-DIMMA
DDRIII-DIMMA
1
+VREF_CA
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z C134
C134
1
2
C141
1U_0402_6.3V6K
C141
1U_0402_6.3V6K
1
2
12 58Friday, January 21, 2011
12 58Friday, January 21, 2011
12 58Friday, January 21, 2011
C142
1U_0402_6.3V6K
C142
1U_0402_6.3V6K
1
2
0.1
0.1
0.1
of
5
+1.5V
1K_0402_1%
1K_0402_1%
12
R102
R102
+VREFB_DQ
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
0.1U_0402_10V6K
0.1U_0402_10V6K C148
C148
C147
1K_0402_1%
1K_0402_1%
D D
C C
B B
Layout Note: Place near JDIMMB1.203,204
+0.75VS
A A
C147
1
1
12
R103
R103
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
2
+3VS
2
DDRB_CKE0<7>
DDR_B_BS2<7>
DDRB_CLK0<7> DDRB_CLK0#<7>
DDR_B_BS0<7>
DDR_B_WE#<7> DDR_B_CAS#<7>
DDRB_SCS1#<7>
C161
C161
C162
1U_0402_6.3V6K
C162
1U_0402_6.3V6K
1
2
C171
2.2U_0603_6.3V4Z
C171
2.2U_0603_6.3V4Z
1
2
+VREFB_DQ
DDR_B_D0 DDR_B_D1
DDR_B_D2 DDR_B_D3
DDR_B_D8 DDR_B_D9
DDR_B_DQS#1 DDR_B_DQS1
DDR_B_D10 DDR_B_D11
DDR_B_D16 DDR_B_D17
DDR_B_DQS#2 DDR_B_DQS2
DDR_B_D18 DDR_B_D19
DDR_B_D24 DDR_B_D25
DDR_B_D26 DDR_B_D27
DDRB_CKE0
DDR_B_BS2
DDR_B_MA12 DDR_B_MA9
DDR_B_MA8 DDR_B_MA5
DDR_B_MA3 DDR_B_MA1
DDRB_CLK0 DDRB_CLK0#
DDR_B_MA10 DDR_B_BS0
DDR_B_WE# DDR_B_CAS# DDRB_ODT0
DDR_B_MA13 DDRB_SCS1#
DDR_B_D32 DDR_B_D33
DDR_B_DQS#4 DDR_B_DQS4
DDR_B_D34 DDR_B_D35
DDR_B_D40 DDR_B_D41
DDR_B_D42 DDR_B_D43
DDR_B_D48 DDR_B_D49
DDR_B_DQS#6 DDR_B_DQS6
DDR_B_D50 DDR_B_D51
DDR_B_D56 DDR_B_D57
DDR_B_D58 DDR_B_D59
R107
R107
1 2
10K_0402_5%
10K_0402_5%
C172
0.1U_0402_10V6K
C172
0.1U_0402_10V6K
1
R109 10K_0402_5%R109 10K_0402_5%
2
5
+1.5V +1.5V
3A@1.5V
3A@1.5V
3A@1.5V3A@1.5V
JDDR3
JDDR3
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1
9
VSS4
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
25
VSS9
27
DQS#1 DQS129RESET# VSS1131VSS12
33
DQ10
35
DQ11 VSS1337VSS14
39
DQ16
41
DQ17 VSS1543VSS16
45
DQS#2
47
DQS2
49
VSS18
51
DQ18
53
DQ19
55
VSS20
57
DQ24
59
DQ25 VSS2261DQS#3
63
DM3 VSS2365VSS24
67
DQ26
69
DQ27 VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
83
A12/BC#
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
99
VDD9
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
1 2
SA1
203
VTT1
205
G1
TYCO_2-2013310-1
TYCO_2-2013310-1
@
@
Standard:9.2mm <Address: SA1:SA0=10> BOT
VSS3
DQS#0
DQS0
VSS6
VSS8 DQ12 DQ13
VSS10
DQ14 DQ15
DQ20 DQ21
VSS17
DQ22 DQ23
VSS19
DQ28 DQ29
VSS21
DQS3
DQ30 DQ31
CKE1 VDD2
VDD4
VDD6
VDD8
VDD10
CK1#
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
VDD18
VREF_CA
VSS28
DQ36 DQ37
VSS30
VSS31
DQ38 DQ39
VSS33
DQ44 DQ45
VSS35 DQS#5
DQS5
VSS38
DQ46 DQ47
VSS40
DQ52 DQ53
VSS42
VSS43
DQ54 DQ55
VSS45
DQ60 DQ61
VSS47 DQS#7
DQS7
VSS50
DQ62 DQ63
VSS52
EVENT#
VTT2
DQ4 DQ5
DQ6 DQ7
DM1
DM2
CK1
BA1
NC2
DM4
DM6
SDA SCL
A15 A14
A11
A7
A6 A4
A2 A0
S0#
G2
4
DDR_B_DQS#[0..7]<7>
0.65A@0.75V
0.65A@0.75V
0.65A@0.75V0.65A@0.75V
DDR_B_D[0..63]<7>
DDR_B_DQS[0..7]<7>
DDR_B_MA[0..15]<7>
SM_DRAMRST# <7,12>
+1.5V
330U_B2_2.5VM_R15M
330U_B2_2.5VM_R15M
C149
C149
1
+
+
2
DDRB_CKE1 <7>
DDRB_CLK1 <7> DDRB_CLK1# <7>
DDR_B_BS1 <7> DDR_B_RAS# <7>
DDRB_SCS0# <7> DDRB_ODT0 <7>
DDRB_ODT1 <7>
0.1U_0402_10V6K
0.1U_0402_10V6K C157
C157
1
2
PM_SMBDATA <12,30,39> PM_SMBCLK <12,30,39>
+0.75VS
Layout Note: Place near JDIMMB
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
C150
C150
C151
C151
1
1
2
2
+1.5V
12
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z C158
C158
12
1
2
Layout Note: Place these 4 Caps near Command and Control signals of JDIMMB
+1.5V
0.1U_0402_10V6K
0.1U_0402_10V6K C163
C163
1
2
2
DDR_B_D4
4
DDR_B_D5
6 8
DDR_B_DQS#0
10
DDR_B_DQS0
12 14
DDR_B_D6
16
DDR_B_D7
18 20
DDR_B_D12
22
DDR_B_D13
24 26 28
SM_DRAMRST#
30 32
DDR_B_D14
34
DDR_B_D15
36 38
DDR_B_D20
40
DDR_B_D21
42 44 46 48
DDR_B_D22
50
DDR_B_D23
52 54
DDR_B_D28
56
DDR_B_D29
58 60
DDR_B_DQS#3
62
DDR_B_DQS3
64 66
DDR_B_D30
68
DDR_B_D31
70 72
DDRB_CKE1
74 76
DDR_B_MA15
78
DDR_B_MA14
80 82
DDR_B_MA11
84
DDR_B_MA7
86 88
DDR_B_MA6
90
DDR_B_MA4
92 94
DDR_B_MA2
96
DDR_B_MA0
98 100
DDRB_CLK1
102
DDRB_CLK1#
104 106
DDR_B_BS1
108
DDR_B_RAS#
110 112
DDRB_SCS0#
114 116 118
DDRB_ODT1
120 122 124
+VREF_CB
126 128
DDR_B_D36
130
DDR_B_D37
132 134 136 138
DDR_B_D38
140
DDR_B_D39
142 144
DDR_B_D44
146
DDR_B_D45
148 150
DDR_B_DQS#5
152
DDR_B_DQS5
154 156
DDR_B_D46
158
DDR_B_D47
160 162
DDR_B_D52
164
DDR_B_D53
166 168 170 172
DDR_B_D54
174
DDR_B_D55
176 178
DDR_B_D60
180
DDR_B_D61
182 184
DDR_B_DQS#7
186
DDR_B_DQS7
188 190
DDR_B_D62
192
DDR_B_D63
194 196 198
PM_SMBDATA
200
PM_SMBCLK
202 204
206
4
3
+1.5V +1.5V
+VREFB_DQ
DDR_B_D0 DDR_B_D1
DDR_B_D2 DDR_B_D3
DDR_B_D8 DDR_B_D9
DDR_B_DQS#1 DDR_B_DQS1
DDR_B_D10 DDR_B_D11
DDR_B_D16 DDR_B_D17
DDR_B_DQS#2 DDR_B_DQS2
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
C152
C152
1
2
R104
R104 1K_0402_1%
1K_0402_1%
R105
R105 1K_0402_1%
1K_0402_1%
0.1U_0402_10V6K
0.1U_0402_10V6K C164
C164
1
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
C153
C153
1
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
2
3
10U_0603_6.3V6M
10U_0603_6.3V6M
C156
47P_0402_50V8J
C156
C154
C154
1
2
C165
C165
1
2
47P_0402_50V8J
C155
C155
1
12
2
DDRB_CKE2<7>
DDRB_CLK2<7> DDRB_CLK2#<7>
DDRB_SCS3#<7>
0.1U_0402_10V6K
0.1U_0402_10V6K C166
C166
+3VS
C169
2.2U_0603_6.3V4Z
C169
2.2U_0603_6.3V4Z
1
2
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
DDR_B_D18 DDR_B_D19
DDR_B_D24 DDR_B_D25
DDR_B_D26 DDR_B_D27
DDRB_CKE2
DDR_B_BS2
DDR_B_MA12 DDR_B_MA9
DDR_B_MA8 DDR_B_MA5
DDR_B_MA3 DDR_B_MA1
DDRB_CLK2 DDRB_CLK2#
DDR_B_MA10 DDR_B_BS0
DDR_B_WE# DDR_B_CAS# DDRB_ODT2
DDR_B_MA13 DDRB_SCS3#
DDR_B_D32 DDR_B_D33
DDR_B_DQS#4 DDR_B_DQS4
DDR_B_D34 DDR_B_D35
DDR_B_D40 DDR_B_D41
DDR_B_D42 DDR_B_D43
DDR_B_D48 DDR_B_D49
DDR_B_DQS#6 DDR_B_DQS6
DDR_B_D50 DDR_B_D51
DDR_B_D56 DDR_B_D57
DDR_B_D58 DDR_B_D59
R10610K_0402_5% R10610K_0402_5%
1 2
1 2
C170
0.1U_0402_10V6K
C170
0.1U_0402_10V6K R108 10K_0402_5%R108 10K_0402_5%
1
2
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
3A@1.5V
3A@1.5V
3A@1.5V3A@1.5V
JDDR4
JDDR4
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1
9
VSS4
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
25
VSS9
27
DQS#1 DQS129RESET# VSS1131VSS12
33
DQ10
35
DQ11 VSS1337VSS14
39
DQ16
41
DQ17 VSS1543VSS16
45
DQS#2
47
DQS2
49
VSS18
51
DQ18
53
DQ19
55
VSS20
57
DQ24
59
DQ25 VSS2261DQS#3
63
DM3 VSS2365VSS24
67
DQ26
69
DQ27 VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
83
A12/BC#
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
99
VDD9
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
TYCO 2-1932323-1
TYCO 2-1932323-1
@
@
2
VSS3
DQS#0
DQS0
VSS6
VSS8 DQ12 DQ13
VSS10
DQ14 DQ15
DQ20 DQ21
VSS17
DQ22 DQ23
VSS19
DQ28 DQ29
VSS21
DQS3
DQ30 DQ31
CKE1 VDD2
VDD4
VDD6
VDD8
VDD10
CK1#
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
VDD18
VREF_CA
VSS28
DQ36 DQ37
VSS30
VSS31
DQ38 DQ39
VSS33
DQ44 DQ45
VSS35 DQS#5
DQS5
VSS38
DQ46 DQ47
VSS40
DQ52 DQ53
VSS42
VSS43
DQ54 DQ55
VSS45
DQ60 DQ61
VSS47 DQS#7
DQS7
VSS50
DQ62 DQ63
VSS52
EVENT#
VTT2
DQ4 DQ5
DQ6 DQ7
DM1
DM2
CK1
BA1
NC2
DM4
DM6
SDA SCL
A15 A14
A11
A7
A6 A4
A2 A0
S0#
G2
1
2
DDR_B_D4
4
DDR_B_D5
6 8
DDR_B_DQS#0
10
DDR_B_DQS0
12 14
DDR_B_D6
16
DDR_B_D7
18 20
DDR_B_D12
22
DDR_B_D13
24 26 28
SM_DRAMRST#
30 32
DDR_B_D14
34
DDR_B_D15
36 38
DDR_B_D20
40
DDR_B_D21
42 44 46 48
DDR_B_D22
50
DDR_B_D23
52 54
DDR_B_D28
56
DDR_B_D29
58 60
DDR_B_DQS#3
62
DDR_B_DQS3
64 66
DDR_B_D30
68
DDR_B_D31
70 72
DDRB_CKE3
74 76
DDR_B_MA15
78
DDR_B_MA14
80 82
DDR_B_MA11
84
DDR_B_MA7
86 88
DDR_B_MA6
90
DDR_B_MA4
92 94
DDR_B_MA2
96
DDR_B_MA0
98 100
DDRB_CLK3
102
DDRB_CLK3#
104 106
DDR_B_BS1
108
DDR_B_RAS#
110 112
DDRB_SCS2#
114 116 118
DDRB_ODT3
120 122 124
+VREF_CB
126 128
DDR_B_D36
130
DDR_B_D37
132 134 136 138
DDR_B_D38
140
DDR_B_D39
142 144
DDR_B_D44
146
DDR_B_D45
148 150
DDR_B_DQS#5
152
DDR_B_DQS5
154 156
DDR_B_D46
158
DDR_B_D47
160 162
DDR_B_D52
164
DDR_B_D53
166 168 170 172
DDR_B_D54
174
DDR_B_D55
176 178
DDR_B_D60
180
DDR_B_D61
182 184
DDR_B_DQS#7
186
DDR_B_DQS7
188 190
DDR_B_D62
192
DDR_B_D63
194 196 198
PM_SMBDATA
200
PM_SMBCLK
202 204
206
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DDRB_CKE3 <7>
DDRB_CLK3 <7> DDRB_CLK3# <7>
DDRB_SCS2# <7> DDRB_ODT2 <7>
DDRB_ODT3 <7>
0.1U_0402_10V6K
0.1U_0402_10V6K C159
C159
1
2
Layout Note: Place near JDIMMB2.203,204
+0.75VS
+0.75VS
0.65A@0.75V
0.65A@0.75V
0.65A@0.75V0.65A@0.75V
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
Reverse:8mm <Address: SA1:SA0=11> TOP
DDRIII-DIMMB
DDRIII-DIMMB
DDRIII-DIMMB
1
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
2
+VREF_CB
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z C160
C160
C167
C167
13 58Friday, January 21, 2011
13 58Friday, January 21, 2011
13 58Friday, January 21, 2011
C168
1U_0402_6.3V6K
C168
1U_0402_6.3V6K
1
2
0.1
0.1
0.1
5
N12PGS@
N12PGS@
UV1
UV1 N12P-GS-A1_BGA_973P
N12P-GS-A1_BGA_973P
D D
Under GPU(below 150mils) Near GPU
BLM18PG330SN1D_0603
BLM18PG330SN1D_0603
+1.05VS_DGPU
C C
B B
A A
1 2
LV1
LV1
1 2
RV24 10M_0402_5%RV24 10M_0402_5%
XTALIN XTAL_OUT
27MHZ_16PF_X5H027000FG1H
27MHZ_16PF_X5H027000FG1H
1
CV46
CV46 18P_0402_50V8J
18P_0402_50V8J
2
CLK_REQ_VGA#<30>
2N7002_SOT23-3
2N7002_SOT23-3
YV1
YV1
1 2
QV4
QV4
DGPU_PWR_EN<17,33>
@
@
D
D
S
S
5
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CV1
CV1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CV47
CV47 18P_0402_50V8J
18P_0402_50V8J
2
13
RV115 0_0402_5%
RV115 0_0402_5%
2
G
G
1 2
10U_0603_6.3V6M
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3VS_DGPU
10U_0603_6.3V6M
1
CV4
CV4
2
PLTRST_VGA#<33>
RV118
RV118 10K_0402_5%
10K_0402_5%
1 2
CLK_REQ_GPU#
RV123
RV123 10K_0402_5%
10K_0402_5%
@
@
1 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CV2
CV2
CV3
CV3
2
PCIE_GTX_C_CRX_P0 PCIE_GTX_C_CRX_N0 PCIE_GTX_C_CRX_P1 PCIE_GTX_C_CRX_N1 PCIE_GTX_C_CRX_P2 PCIE_GTX_C_CRX_N2 PCIE_GTX_C_CRX_P3 PCIE_GTX_C_CRX_N3 PCIE_GTX_C_CRX_P4 PCIE_GTX_C_CRX_N4 PCIE_GTX_C_CRX_P5 PCIE_GTX_C_CRX_N5 PCIE_GTX_C_CRX_P6 PCIE_GTX_C_CRX_N6 PCIE_GTX_C_CRX_P7 PCIE_GTX_C_CRX_N7 PCIE_GTX_C_CRX_P8 PCIE_GTX_C_CRX_N8 PCIE_GTX_C_CRX_P9 PCIE_GTX_C_CRX_N9 PCIE_GTX_C_CRX_P10 PCIE_GTX_C_CRX_N10 PCIE_GTX_C_CRX_P11 PCIE_GTX_C_CRX_N11 PCIE_GTX_C_CRX_P12 PCIE_GTX_C_CRX_N12 PCIE_GTX_C_CRX_P13 PCIE_GTX_C_CRX_N13 PCIE_GTX_C_CRX_P14 PCIE_GTX_C_CRX_N14 PCIE_GTX_C_CRX_P15 PCIE_GTX_C_CRX_N15
RV19 stuff per NV request. 12/17
RV124
RV124 10K_0402_5%
10K_0402_5%
1 2 2
G
G
QV2
QV2
1 3
D
S
D
S
2N7002_SOT23-3
2N7002_SOT23-3
@
@
1 2
+3VS_DGPU
RV128
RV128 10K_0402_5%
10K_0402_5%
@
@
2
CV5
CV5
1
CV6 0.22U_0402_10V6KCV6 0.22U_0402_10V6K CV7 0.22U_0402_10V6KCV7 0.22U_0402_10V6K CV8 0.22U_0402_10V6KCV8 0.22U_0402_10V6K CV9 0.22U_0402_10V6KCV9 0.22U_0402_10V6K CV10 0.22U_0402_10V6KCV10 0.22U_0402_10V6K CV11 0.22U_0402_10V6KCV11 0.22U_0402_10V6K CV12 0.22U_0402_10V6KCV12 0.22U_0402_10V6K CV13 0.22U_0402_10V6KCV13 0.22U_0402_10V6K CV14 0.22U_0402_10V6KCV14 0.22U_0402_10V6K CV15 0.22U_0402_10V6KCV15 0.22U_0402_10V6K CV16 0.22U_0402_10V6KCV16 0.22U_0402_10V6K CV17 0.22U_0402_10V6KCV17 0.22U_0402_10V6K CV18 0.22U_0402_10V6KCV18 0.22U_0402_10V6K CV19 0.22U_0402_10V6KCV19 0.22U_0402_10V6K CV20 0.22U_0402_10V6KCV20 0.22U_0402_10V6K CV21 0.22U_0402_10V6KCV21 0.22U_0402_10V6K CV22 0.22U_0402_10V6KCV22 0.22U_0402_10V6K CV23 0.22U_0402_10V6KCV23 0.22U_0402_10V6K CV24 0.22U_0402_10V6KCV24 0.22U_0402_10V6K CV25 0.22U_0402_10V6KCV25 0.22U_0402_10V6K CV26 0.22U_0402_10V6KCV26 0.22U_0402_10V6K CV27 0.22U_0402_10V6KCV27 0.22U_0402_10V6K CV28 0.22U_0402_10V6KCV28 0.22U_0402_10V6K CV29 0.22U_0402_10V6KCV29 0.22U_0402_10V6K CV30 0.22U_0402_10V6KCV30 0.22U_0402_10V6K CV31 0.22U_0402_10V6KCV31 0.22U_0402_10V6K CV32 0.22U_0402_10V6KCV32 0.22U_0402_10V6K CV33 0.22U_0402_10V6KCV33 0.22U_0402_10V6K CV34 0.22U_0402_10V6KCV34 0.22U_0402_10V6K CV35 0.22U_0402_10V6KCV35 0.22U_0402_10V6K CV36 0.22U_0402_10V6KCV36 0.22U_0402_10V6K CV37 0.22U_0402_10V6KCV37 0.22U_0402_10V6K
RV27 10K_0402_5%RV27 10K_0402_5%
1 2
150mA
+PLLVDD
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
CLK_PCIE_VGA<30>
CLK_PCIE_VGA#<30>
4
PCIE_CTX_C_GRX_P0 PCIE_CTX_C_GRX_N0 PCIE_CTX_C_GRX_P1 PCIE_CTX_C_GRX_N1 PCIE_CTX_C_GRX_P2 PCIE_CTX_C_GRX_N2 PCIE_CTX_C_GRX_P3 PCIE_CTX_C_GRX_N3 PCIE_CTX_C_GRX_P4 PCIE_CTX_C_GRX_N4 PCIE_CTX_C_GRX_P5 PCIE_CTX_C_GRX_N5 PCIE_CTX_C_GRX_P6 PCIE_CTX_C_GRX_N6 PCIE_CTX_C_GRX_P7 PCIE_CTX_C_GRX_N7 PCIE_CTX_C_GRX_P8 PCIE_CTX_C_GRX_N8 PCIE_CTX_C_GRX_P9 PCIE_CTX_C_GRX_N9 PCIE_CTX_C_GRX_P10 PCIE_CTX_C_GRX_N10 PCIE_CTX_C_GRX_P11 PCIE_CTX_C_GRX_N11 PCIE_CTX_C_GRX_P12 PCIE_CTX_C_GRX_N12 PCIE_CTX_C_GRX_P13 PCIE_CTX_C_GRX_N13 PCIE_CTX_C_GRX_P14 PCIE_CTX_C_GRX_N14 PCIE_CTX_C_GRX_P15 PCIE_CTX_C_GRX_N15
PCIE_GTX_CRX_P0 PCIE_GTX_CRX_N0 PCIE_GTX_CRX_P1 PCIE_GTX_CRX_N1 PCIE_GTX_CRX_P2 PCIE_GTX_CRX_N2 PCIE_GTX_CRX_P3 PCIE_GTX_CRX_N3 PCIE_GTX_CRX_P4 PCIE_GTX_CRX_N4 PCIE_GTX_CRX_P5 PCIE_GTX_CRX_N5 PCIE_GTX_CRX_P6 PCIE_GTX_CRX_N6 PCIE_GTX_CRX_P7 PCIE_GTX_CRX_N7 PCIE_GTX_CRX_P8 PCIE_GTX_CRX_N8 PCIE_GTX_CRX_P9 PCIE_GTX_CRX_N9 PCIE_GTX_CRX_P10 PCIE_GTX_CRX_N10 PCIE_GTX_CRX_P11 PCIE_GTX_CRX_N11 PCIE_GTX_CRX_P12 PCIE_GTX_CRX_N12 PCIE_GTX_CRX_P13 PCIE_GTX_CRX_N13 PCIE_GTX_CRX_P14 PCIE_GTX_CRX_N14 PCIE_GTX_CRX_P15 PCIE_GTX_CRX_N15
CLK_PCIE_VGA CLK_PCIE_VGA# CLK_REQ_GPU#
1 2
RV19 200_0402_1%RV19 200_0402_1%
1 2
RV22 0_0402_5%RV22 0_0402_5%
1 2
RV23 2.49K_0402_1%RV23 2.49K_0402_1%
+PLLVDD
Internal Thermal Sensor
SMB_CLK_GPU<15> SMB_DATA_GPU<15>
4
PEX_TSTCLK_OUT PEX_TSTCLK_OUT#
XTALIN XTAL_OUT
RV26 10K_0402_5%RV26 10K_0402_5%
PLTRST_VGA_R#
60mA
45mA
45mA
XTALOUT XTALSSIN
12
SMB_CLK_GPU SMB_DATA_GPU
VGA_EDID_CLK VGA_EDID_DATA
I2CB_SCL I2CB_SDA
I2CA_SCL I2CA_SDA
HDCP_SCL HDCP_SDA
UV1A
UV1A
AP17
PEX_RX0
AN17
PEX_RX0_N
AN19
PEX_RX1
AP19
PEX_RX1_N
AR19
PEX_RX2
AR20
PEX_RX2_N
AP20
PEX_RX3
AN20
PEX_RX3_N
AN22
PEX_RX4
AP22
PEX_RX4_N
AR22
PEX_RX5
AR23
PEX_RX5_N
AP23
PEX_RX6
AN23
PEX_RX6_N
AN25
PEX_RX7
AP25
PEX_RX7_N
AR25
PEX_RX8
AR26
PEX_RX8_N
AP26
PEX_RX9
AN26
PEX_RX9_N
AN28
PEX_RX10
AP28
PEX_RX10_N
AR28
PEX_RX11
AR29
PEX_RX11_N
AP29
PEX_RX12
AN29
PEX_RX12_N
AN31
PEX_RX13
AP31
PEX_RX13_N
AR31
PEX_RX14
AR32
PEX_RX14_N
AR34
PEX_RX15
AP34
PEX_RX15_N
AL17
PEX_TX0
AM17
PEX_TX0_N
AM18
PEX_TX1
AM19
PEX_TX1_N
AL19
PEX_TX2
AK19
PEX_TX2_N
AL20
PEX_TX3
AM20
PEX_TX3_N
AM21
PEX_TX4
AM22
PEX_TX4_N
AL22
PEX_TX5
AK22
PEX_TX5_N
AL23
PEX_TX6
AM23
PEX_TX6_N
AM24
PEX_TX7
AM25
PEX_TX7_N
AL25
PEX_TX8
AK25
PEX_TX8_N
AL26
PEX_TX9
AM26
PEX_TX9_N
AM27
PEX_TX10
AM28
PEX_TX10_N
AL28
PEX_TX11
AK28
PEX_TX11_N
AK29
PEX_TX12
AL29
PEX_TX12_N
AM29
PEX_TX13
AM30
PEX_TX13_N
AM31
PEX_TX14
AM32
PEX_TX14_N
AN32
PEX_TX15
AP32
PEX_TX15_N
AR16
PEX_REFCLK
AR17
PEX_REFCLK_N
AR13
PEX_CLKREQ_N
AJ17
PEX_TSTCLK_OUT
AJ18
PEX_TSTCLK_OUT_N
AM16
PEX_RST_N
AG21
PEX_TERMP
AE9
PLLVDD
AF9
SP_PLLVDD
AD9
VID_PLLVDD
B1
XTAL_IN
B2
XTAL_OUT
D1
XTAL_OUTBUFF
D2
XTAL_SSIN
E2
I2CS_SCL
E1
I2CS_SDA
E3
I2CC_SCL
E4
I2CC_SDA
G3
I2CB_SCL
G2
I2CB_SDA
G1
I2CA_SCL
G4
I2CA_SDA
F6
I2CH_SCL
G6
I2CH_SDA
N12P-GV-A1_BGA_973P
N12P-GV-A1_BGA_973P
N12PGV@
N12PGV@
3
Part 1 of 7
Part 1 of 7
GPIO
GPIO
MIOA_D0_NC MIOA_D1_NC MIOA_D2_NC MIOA_D3_NC MIOA_D4_NC MIOA_D5_NC MIOA_D6_NC MIOA_D7_NC MIOA_D8_NC
MIOA_D9_NC MIOA_D10_NC MIOA_D11_NC MIOA_D12_NC MIOA_D13_NC MIOA_D14_NC
DVO
DVO
MIOB_D0_NC
MIOB_D1_NC
MIOB_D2_NC
PCI EXPRESS
PCI EXPRESS
MIOB_D3_NC
MIOB_D4_NC
MIOB_D5_NC
MIOB_D6_NC
MIOB_D7_NC
MIOB_D8_NC
MIOB_D9_NC MIOBD_10_NC MIOB_D11_NC MIOB_D12_NC MIOB_D13_NC MIOB_D14_NC
MIOA_HSYNC_NC MIOA_VSYNC_NC
MIOB_HSYNC_NC MIOB_VSYNC_NC
MIOA_DE_NC
MIOA_CTL3_NC
MIOA_VREF_NC
MIOB_DE_NC
MIOB_CTL3_NC
MIOB_VREF_NC
MIOA_CLKIN_NC
MIOA_CLKOUT_NC
MIOB_CLKIN_NC
MIOB_CLKOUT_NC
MIOA_CLKOUT_NC_N MIOB_CLKOUT_NC_N
MIOACAL_PD_VDDQ_NC
MIOACAL_PU_GND_NC
MIOBCAL_PD_VDDQ_NC
MIOBCAL_PU_GND_NC
CLK
CLK
DACA_GREEN
DACA_BLUE
DACA_HSYNC
DACA_VSYNC
DACA_VREF DACA_RSET
DACB_GREEN
DACB_BLUE
DACs
DACs
DACB_HSYNC
I2C
I2C
DACB_VSYNC
DACB_VREF DACB_RSET
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
K1
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8
GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 GPIO23 GPIO24
DACA_RED
DACA_VDD
DACB_RED
DACB_VDD
VGA_GPIO1
K2 K3 H3 H2
GPU_VID0
H1
GPU_VID1
H4 H5
GPIO8
H6
THERM#_VGA
J7 K4 K5
GPIO12
H7 J4 J6
VGA_HDMI_HPD
L1 L2 L4 M4 L7 L5 K6 L6 M6 M7
N1 P4 P1 P2 P3 T3 T2 T1 U4 U1 U2 U3 R6 T6 N6
Y1 Y2 Y3 AB3 AB2 AB1 AC4 AC1 AC2 AC3 AE3 AE2 U6 W6 Y6
N3 L3
W1 W2
N2 P5 N5
Y5 W3 AF1
1 2
N4
RV18 10K_0402_5%RV18 10K_0402_5%
R4
1 2
AE1
RV21 10K_0402_5%RV21 10K_0402_5%
V4
T4 W4
U5 T5
AA7 AA6
AM15 AM14 AL14
AM13
+3VS_DGPU
AL13
AJ12 AK12 AK13
AK4 AL4 AJ4
AM1 AM2
+DACB_VDD
AG7 AK6 AH7
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
GPU_VID0 <57> GPU_VID1 <57>
THERM#_VGA <15>
@
TV1@TV1
1
C880
C880
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
12
RV32 10K_0402_5%RV32 10K_0402_5%
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
VGA_PWROK<33,34,46,57>
2
PCIE_GTX_C_CRX_P[0..15]<6>
PCIE_GTX_C_CRX_N[0..15]<6>
PCIE_CTX_C_GRX_P[0..15]<6>
PCIE_CTX_C_GRX_N[0..15]<6>
+3VS_DGPU
R1430
R1430
0_0402_5%
0_0402_5%
12
1
HDMI_HPD<28>
2
2
SN74AHC1G08DCKR_SC70-5
SN74AHC1G08DCKR_SC70-5
1 2
5
U55
U55
P
IN1
IN2
G
3
0_0402_5%
0_0402_5%
@
@
R1431
R1431
1
PCIE_GTX_C_CRX_P[0..15]
PCIE_GTX_C_CRX_N[0..15]
PCIE_CTX_C_GRX_P[0..15]
PCIE_CTX_C_GRX_N[0..15]
C879
C879
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 2
VGA_HDMI_HPD
4
O
GPIO8
GPIO12
VGA_EDID_CLK
VGA_EDID_DATA
SMB_CLK_GPU
SMB_DATA_GPU
THERM#_VGA
HDCP_SCL
HDCP_SDA
I2CA_SDA
I2CA_SCL
I2CB_SCL
I2CB_SDA
VGA_GPIO1
VGA_HDMI_HPD
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
VGA(1/12)-PCIE/DAC/GPIO
VGA(1/12)-PCIE/DAC/GPIO
VGA(1/12)-PCIE/DAC/GPIO
1 2
RV1 10K_0402_5%RV1 10K_0402_5%
1 2
RV2 10K_0402_5%RV2 10K_0402_5%
1 2
RV3 2.2K_0402_5%RV3 2.2K_0402_5%
1 2
RV4 2.2K_0402_5%RV4 2.2K_0402_5%
1 2
RV5 2.2K_0402_5%RV5 2.2K_0402_5%
1 2
RV6 2.2K_0402_5%RV6 2.2K_0402_5%
1 2
RV7 100K_0402_5%RV7 100K_0402_5%
1 2
RV8 2.2K_0402_5%RV8 2.2K_0402_5%
1 2
RV9 2.2K_0402_5%RV9 2.2K_0402_5%
1 2
RV10 2.2K_0402_5%RV10 2.2K_0402_5%
1 2
RV11 2.2K_0402_5%RV11 2.2K_0402_5%
1 2
RV12 2.2K_0402_5%RV12 2.2K_0402_5%
1 2
RV13 2.2K_0402_5%RV13 2.2K_0402_5%
1 2
RV17 100K_0402_5%RV17 100K_0402_5%
1 2
RV20 100K_0402_5%RV20 100K_0402_5%
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
14 58Friday, January 21, 2011
14 58Friday, January 21, 2011
14 58Friday, January 21, 2011
+3VS_DGPU
0.1
0.1
0.1
5
AM11 AM12
AM8
D D
C C
VGA_HDMI_TX2+<28>
VGA_HDMI_TX2-<28>
VGA_HDMI_TX1+<28>
VGA_HDMI_TX1-<28>
VGA_HDMI_TX0+<28>
VGA_HDMI_TX0-<28> VGA_HDMI_CLK+<28> VGA_HDMI_CLK-<28>
+3VS_DGPU
1 2
RV40 4.7K_0402_5%RV40 4.7K_0402_5%
1 2
RV43 4.7K_0402_5%RV43 4.7K_0402_5%
B B
HDMI
VGA_HDMI_CLK
VGA_HDMI_DATA
VGA_HDMI_CLK<28> VGA_HDMI_DATA<28>
STRAP0<25> STRAP1<25> STRAP2<25>
VGA_HDMI_TX2+ VGA_HDMI_TX2­VGA_HDMI_TX1+ VGA_HDMI_TX1­VGA_HDMI_TX0+ VGA_HDMI_TX0­VGA_HDMI_CLK+ VGA_HDMI_CLK-
VGA_HDMI_CLK VGA_HDMI_DATA
+3VS_DGPU
RV44
RV44 10K_0402_5%
10K_0402_5%
1 2
STRAP0 STRAP1 STRAP2
AM10
AM9
AK10
AL10
AK11
AL11
AP13 AN13
AP10 AN10 AR11 AR10 AN11 AP11
AM7 AM6
AM5 AM3 AM4
AN8 AP8
AP1 AR2
AR8 AR7 AP7 AN7 AN5 AP5 AR5 AR4
AH6 AH5 AH4 AG4 AF4 AF5 AE6 AE5
AH1 AH2 AH3
AP2 AN3
AP4 AN4
AE4 AD4
AF3 AF2
AB5
UV1D
UV1D
IFPA_TXC IFPA_TXC_N IFPA_TXD0
AL8
IFPA_TXD0_N IFPA_TXD1 IFPA_TXD1_N IFPA_TXD2 IFPA_TXD2_N IFPA_TXD3 IFPA_TXD3_N
IFPB_TXC IFPB_TXC_N IFPB_TXD4 IFPB_TXD4_N IFPB_TXD5 IFPB_TXD5_N IFPB_TXD6 IFPB_TXD6_N IFPB_TXD7 IFPB_TXD7_N
IFPC_L0 IFPC_L0_N
AL5
IFPC_L1 IFPC_L1_N IFPC_L2 IFPC_L2_N IFPC_L3 IFPC_L3_N
IFPD_L0 IFPD_L0_N IFPD_L1 IFPD_L1_N IFPD_L2 IFPD_L2_N IFPD_L3 IFPD_L3_N
IFPE_L0 IFPE_L0_N IFPE_L1 IFPE_L1_N IFPE_L2 IFPE_L2_N IFPE_L3 IFPE_L3_N
AL2
IFPF_L0
AL3
IFPF_L0_N
AJ3
IFPF_L1
AJ2
IFPF_L1_N
AJ1
IFPF_L2 IFPF_L2_N IFPF_L3 IFPF_L3_N
IFPC_AUX_I2CW_SCL IFPC_AUX_I2CW_SDA_N
IFPD_AUX_I2CX_SCL IFPD_AUX_I2CX_SDA_N
IFPE_AUX_I2CY_SCL IFPE_AUX_I2CY_SDA_N
IFPF_AUX_I2CZ_SCL IFPF_AUX_I2CZ_SDA_N
A4
BUFRST_N
CEC
W5
STRAP0
W7
STRAP1
V7
STRAP2
4
Part 4 of 7
Part 4 of 7
LVDS/TMDS
LVDS/TMDS
GENERAL
GENERAL
MULTI_STRAP_REF0_GND
MULTI_STRAP_REF1_GND
NC_0 NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 NC_7 NC_8
NC_9 NC_10 NC_11 NC_12 NC_13 NC_14 NC_15 NC_16 NC_17 NC_18 NC_19 NC_20 NC_21 NC_22 NC_23 NC_24 NC_25 NC_26
NC
NC
NC_27 NC_28 NC_29
VDD_SENSE_0 VDD_SENSE_1 VDD_SENSE_2
GND_SENSE_0 GND_SENSE_1 GND_SENSE_2
TEST
TEST
TESTMODE
JTAG_TCK
JTAG_TDI JTAG_TDO JTAG_TMS
JTAG_TRST_N
SERIAL
SERIAL
ROM_CS_N
ROM_SI
ROM_SO
ROM_SCLK
NC/SPDIF_NC
THERMDP THERMDN
A2 A7 B7 C5
STRAP4
C7 D5 D6
STRAP3
D7 E5
PGOOD
E7 F4 G5 H32 J25 J26
Strap_Ref2_GND
P6 U7 V6 Y4 AA4 AB4 AB7 AC5 AD6
Add C7,D7,E7,P6 for support GV
AF6 AG6 AG20 AJ5 AK15 AL7
VDD_SENSE
D35 P7 AD20
AD19 E35 R7
TESTMODE
AP35 AP14 AN14 AN16 AR14 AP16
RV42 10K_0402_5%RV42 10K_0402_5%
C3
ROM_SI
D3
ROM_SO
C4
ROM_SCLK
D4
A5
RV45 36K_0402_5%RV45 36K_0402_5%
N9
RV46 40.2K_0402_1%RV46 40.2K_0402_1%
M9
RV47 40.2K_0402_1%RV47 40.2K_0402_1%
THERM_D+
B5
THERM_D-
B4
1 2
1 2
1 2
1 2
STRAP4 <25>
STRAP3 <25>
12
RV107
RV107
40.2K_0402_1%
40.2K_0402_1%
N12PGV@
N12PGV@
VDD_SENSE <57>
TV2@TV2 TV3@TV3 TV4@TV4 TV5@TV5
@ @ @ @
ROM_SI <25> ROM_SO <25> ROM_SCLK <25>
3
N12PGV@
N12PGV@
12
10K_0402_5%
10K_0402_5% RV102
RV102
12
10K_0402_5%
10K_0402_5% RV41
RV41
THERM_D+
THERM_D-
2
External VGA Thermal Sensor
+3VS_DGPU
@
@
12
CV49 0.1U_0402_16V4Z
CV49 0.1U_0402_16V4Z
CV50
@CV50
@
1 2
2200P_0402_50V7K
2200P_0402_50V7K
RV25
RV25
2.2K_0402_5%
2.2K_0402_5%
VGA_SMB_CK2
VGA_SMB_DA2
UV4
1
VDD
2
D+
3
D-
THERM#4GND
ADM1032ARMZ-2REEL_MSOP8
ADM1032ARMZ-2REEL_MSOP8
+3VS_DGPU
RV28
RV28
2.2K_0402_5%
2.2K_0402_5%
1 2
1 2
QV3A
QV3A
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
@UV4
@
2
8
SCLK
7
SDATA
6
ALERT#
5
+3VS_DGPU
5
QV3B
QV3B
4
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
61
3
Internal Thermal Sensor
12
12
RV35
0_0402_5%
0_0402_5%
VGA_SMB_CK2
VGA_SMB_DA2
THERM#_VGA
RV35
RV36
RV36
0_0402_5%
0_0402_5%
THERM#_VGA <14>
Address: 0x9A H 0x9E H
EC_SMB_CK2 <30,43>
EC_SMB_DA2 <30,43>
1
SMB_CLK_GPU <14>
SMB_DATA_GPU <14>
N12P-GV-A1_BGA_973P
N12P-GV-A1_BGA_973P
N12PGV@
A A
5
N12PGV@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
VGA(2/12)-LVDS/HDMI/DP/THM
VGA(2/12)-LVDS/HDMI/DP/THM
VGA(2/12)-LVDS/HDMI/DP/THM
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
15 58Friday, January 21, 2011
15 58Friday, January 21, 2011
15 58Friday, January 21, 2011
0.1
0.1
0.1
5
4
3
2
1
VDD_56 VDD_57 VDD_58 VDD_59 VDD_60 VDD_61 VDD_62 VDD_63 VDD_64 VDD_65 VDD_66 VDD_67 VDD_68 VDD_69 VDD_70 VDD_71 VDD_72 VDD_73 VDD_74 VDD_75 VDD_76 VDD_77 VDD_78 VDD_79 VDD_80 VDD_81 VDD_82 VDD_83 VDD_84 VDD_85 VDD_86 VDD_87 VDD_88 VDD_89 VDD_90 VDD_91 VDD_92 VDD_93 VDD_94 VDD_95 VDD_96 VDD_97 VDD_98
VDD_99 VDD_100 VDD_101 VDD_102 VDD_103 VDD_104 VDD_105 VDD_106 VDD_107 VDD_108 VDD_109 VDD_110
N12P-GV
0.85V
P21 P23 P25 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 T12 T14 T16 T18 T20 T22 T24 V11 V13 V15 V17 V19 V21 V23 V25 W11 W12 W13 W14 W15 W16 W17 W18 W19 W20 W21 W22 W23 W24 W25 Y12 Y14 Y16 Y18 Y20 Y22 Y24
1V0
+VGA_CORE+VGA_CORE
GS EDP Peak is 35.32A GV EDP Peak is 21.56A
CV57
CV57
47U_0805_4V6
47U_0805_4V6
CV65
CV65
0.1U_0402_16V7K
0.1U_0402_16V7K
CV73
CV73
0.01U_0402_25V7K
0.01U_0402_25V7K
+VGA_CORE
1
2
+VGA_CORE
1
2
+VGA_CORE
1
2
+VGA_CORE
1
+
+
CV51
CV51
2
470U_D2_2VM_R4M
470U_D2_2VM_R4M
1
+
+
CV52
CV52
2
470U_D2_2VM_R4M
470U_D2_2VM_R4M
+VGA_CORE
22U_0603_6.3V6M
22U_0603_6.3V6M
CV53
CV53
Near GPU Under GPU(below 150mils)
10U_0603_6.3V6M
2
CV56
CV56
1
22U_0603_6.3V6M
22U_0603_6.3V6M
10U_0603_6.3V6M
2
CV58
CV58
1
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
CV59
CV59
1
10U_0603_6.3V6M
10U_0603_6.3V6M
CV60
CV60
1
2
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
1
CV61
CV61
2
1U_0402_6.3V6K
1U_0402_6.3V6K
CV62
CV62
12
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
Under GPU(below 150mils)
0.022U_0402_25V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
1
CV66
CV66
2
1
CV74
CV74
2
0.01U_0402_25V7K
0.01U_0402_25V7K
0.047U_0402_25V6K
0.047U_0402_25V6K
1
CV67
CV67
2
0.047U_0402_25V6K
0.047U_0402_25V6K
0.01U_0402_25V7K
0.01U_0402_25V7K
1
CV75
CV75
2
0.01U_0402_25V7K
0.01U_0402_25V7K
CV68
CV68
CV76
CV76
1
CV69
CV69
2
0.047U_0402_25V6K
0.047U_0402_25V6K
0.01U_0402_25V7K
0.01U_0402_25V7K
1
CV77
CV77
2
0.022U_0402_25V7K
1
CV70
CV70
2
1
CV78
CV78
2
0.01U_0402_25V7K
0.01U_0402_25V7K
1
2
1
2
0.022U_0402_25V7K
0.022U_0402_25V7K
1
CV71
CV71
2
0.022U_0402_25V7K
0.022U_0402_25V7K
0.01U_0402_25V7K
0.01U_0402_25V7K
1
CV79
CV79
2
22U_0603_6.3V6M
22U_0603_6.3V6M
2
CV54
CV54
@
@
@
@
1
22U_0603_6.3V6M
22U_0603_6.3V6M
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
12
CV63
CV63
CV64
CV64
1
CV72
CV72
2
1
CV80
CV80
2
0.01U_0402_25V7K
0.01U_0402_25V7K
2
2
CV55
CV55
@
@
1
1
12
0
1
1
Part 7 of 7
Part 7 of 7
N12P-GS
0.825V
0.975V
1V
POWER
POWER
Pstate
P8-P12
P0(Hot)
D D
P0(cold) 1.025V
C C
B B
GPU_VID0 GPU_VID1
0
1
0
1
UV1G
UV1G
AB11
VDD_0
AB13
VDD_1
AB15
VDD_2
AB17
VDD_3
AB19
VDD_4
AB21
VDD_5
AB23
VDD_6
AB25
VDD_7
AC11
VDD_8
AC12
VDD_9
AC13
VDD_10
AC14
VDD_11
AC15
VDD_12
AC16
VDD_13
AC17
VDD_14
AC18
VDD_15
AC19
VDD_16
AC20
VDD_17
AC21
VDD_18
AC22
VDD_19
AC23
VDD_20
AC24
VDD_21
AC25
VDD_22
AD12
VDD_23
AD14
VDD_24
AD16
VDD_25
AD18
VDD_26
AD22
VDD_27
AD24
VDD_28
L11
VDD_29
L12
VDD_30
L13
VDD_31
L14
VDD_32
L15
VDD_33
L16
VDD_34
L17
VDD_35
L18
VDD_36
L19
VDD_37
L20
VDD_38
L21
VDD_39
L22
VDD_40
L23
VDD_41
L24
VDD_42
L25
VDD_43
M12
VDD_44
M14
VDD_45
M16
VDD_46
M18
VDD_47
M20
VDD_48
M22
VDD_49
M24
VDD_50
P11
VDD_51
P13
VDD_52
P15
VDD_53
P17
VDD_54
P19
VDD_55
N12P-GV-A1_BGA_973P
N12P-GV-A1_BGA_973P
N12PGV@
N12PGV@
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
VGA(3/12)-VGA CORE
VGA(3/12)-VGA CORE
VGA(3/12)-VGA CORE
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
16 58Friday, January 21, 2011
16 58Friday, January 21, 2011
16 58Friday, January 21, 2011
0.1
0.1
0.1
5
Near GPU
4.7U_0603_6.3V6K
+VRAM_1.5VS
CV82
CV82
4.7U_0603_6.3V6K
D D
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
2
Under GPU(below 150mils)
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+VRAM_1.5VS
C C
B B
A A
1
2
CV101
CV101
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CV102
CV102
2
1
CV103
CV103
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CV104
CV104
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CV105
CV105
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4
GS is 5.49A GV is 2.99A
1
1
CV83
CV83
CV84
CV84
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
RV116 10K_0402_5%RV116 10K_0402_5%
RV50 1K_0402_1%
RV50 1K_0402_1%
RV53 1K_0402_1%
RV53 1K_0402_1%
CV107
CV107
CV106
CV106
2
+IFPAB_PLLVDD
12
RV117 10K_0402_5%RV117 10K_0402_5%
RV49 10K_0402_5%RV49 10K_0402_5%
@
@
1 2
RV51 10K_0402_5%RV51 10K_0402_5%
@
@
RV52 10K_0402_5%RV52 10K_0402_5%
1 2
RV55 10K_0402_5%RV55 10K_0402_5%
1 2
RV56 1K_0402_1%RV56 1K_0402_1%
1U_0402_6.3V6K
1U_0402_6.3V6K
1
CV81
CV81
2
1
CV108
CV108
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
@
@
1 2
RV48 1K_0402_1%
RV48 1K_0402_1%
+IFPAB_IOVDD
12
+IFPC_PLLVDD
12
+IFPC_IOVDD
12
+IFPD_PLLVDD
12
+IFPD_IOVDD
12
+IFPEF_PLLVDD
+IFPE_IOVDD
+3VS_DGPU
LV4
LV4
BLM18PG181SN1D_0603
BLM18PG181SN1D_0603
1
CV120
CV120
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
+1.05VS_DGPU
LV6
LV6
BLM18PG181SN1D_0603
BLM18PG181SN1D_0603
1
CV130
CV130
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
J23 J24
J29 AA27 AA29 AA31 AB27 AB29 AC27 AD27 AE27
AJ28
B18 E21 G17 G18 G22
G8 G9
H29
J14
J15
J16
J17
J20
J21
J22
N27 P27 R27
T27
U27 U29 V27 V29 V34
W27
Y27
AK9
AJ11
AG9
AG10
AJ9
AK7
AJ8
AC6 AB6
AK8
AJ6
AL1
AE7 AD7
N12PGV@
N12PGV@
Near GPU
12
1
CV121
CV121
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
12
1
CV131
CV131
2
UV1E
UV1E
FBVDDQ_0 FBVDDQ_1 FBVDDQ_2 FBVDDQ_3 FBVDDQ_4 FBVDDQ_5 FBVDDQ_6 FBVDDQ_7 FBVDDQ_8 FBVDDQ_9 FBVDDQ_10 FBVDDQ_11 FBVDDQ_12 FBVDDQ_13 FBVDDQ_14 FBVDDQ_15 FBVDDQ_16 FBVDDQ_17 FBVDDQ_18 FBVDDQ_19 FBVDDQ_20 FBVDDQ_21 FBVDDQ_22 FBVDDQ_23 FBVDDQ_24 FBVDDQ_25 FBVDDQ_26 FBVDDQ_27 FBVDDQ_28 FBVDDQ_29 FBVDDQ_30 FBVDDQ_31 FBVDDQ_32 FBVDDQ_33 FBVDDQ_34 FBVDDQ_35 FBVDDQ_36 FBVDDQ_37
IFPAB_PLLVDD IFPAB_RSET
IFPA_IOVDD IFPB_IOVDD
IFPC_PLLVDD IFPC_RSET
IFPC_IOVDD
IFPD_PLLVDD IFPD_RSET
IFPD_IOVDD
IFPEF_PLLVDD IFPEF_RSET
IFPE_IOVDD IFPF_IOVDD
1U_0402_6.3V6K
1U_0402_6.3V6K
1
2
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
3
Part 5 of 7
Part 5 of 7
PEX_IOVDDQ_0 PEX_IOVDDQ_1 PEX_IOVDDQ_2 PEX_IOVDDQ_3 PEX_IOVDDQ_4 PEX_IOVDDQ_5 PEX_IOVDDQ_6 PEX_IOVDDQ_7 PEX_IOVDDQ_8
PEX_IOVDDQ_9 PEX_IOVDDQ_10 PEX_IOVDDQ_11 PEX_IOVDDQ_12 PEX_IOVDDQ_13 PEX_IOVDDQ_14 PEX_IOVDDQ_15 PEX_IOVDDQ_16 PEX_IOVDDQ_17 PEX_IOVDDQ_18 PEX_IOVDDQ_19 PEX_IOVDDQ_20 PEX_IOVDDQ_21 PEX_IOVDDQ_22 PEX_IOVDDQ_23 PEX_IOVDDQ_24
PEX_IOVDD_0 PEX_IOVDD_1 PEX_IOVDD_2 PEX_IOVDD_3 PEX_IOVDD_4
POWER
POWER
PEX_PLLVDD
PEX_SVDD_3V3
PEX_SVDD_3V3_NC
VDD33_0 VDD33_1 VDD33_2 VDD33_3 VDD33_4
MIOA_VDDQ_NC_0 MIOA_VDDQ_NC_1 MIOA_VDDQ_NC_2 MIOA_VDDQ_NC_3
MIOB_VDDQ_NC_0 MIOB_VDDQ_NC_1 MIOB_VDDQ_NC_2 MIOB_VDDQ_NC_3
N12P-GV-A1_BGA_973P
N12P-GV-A1_BGA_973P
Under GPU(below 150mils)
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
CV122
CV122
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CV132
CV132
2
CV123
CV123
CV133
CV133
CV124
CV124
2
1
CV134
CV134
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
GS is 2.95A GV is 3.51A
Under GPU(below 150mils) Near GPU
0.1U_0402_16V4Z
0.1U_0402_16V4Z
AG11 AG12 AG13 AG15 AG16 AG17 AG18 AG22 AG23 AG24 AG25 AG26 AJ14 AJ15 AJ19 AJ21 AJ22 AJ24 AJ25 AJ27 AK18 AK20 AK23 AK26 AL16
AK16 AK17 AK21 AK24 AK27
AG14
AG19 F7
J10 J11 J12 J13 J9
P9 R9 T9 U9
AA9 AB9 W9 Y9
1
CV125
CV125
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
570mA
+IFPE_IOVDD
+PEX_PLLVDD
10K_0402_5%
10K_0402_5%
220mA
+IFPEF_PLLVDD
1
1
CV85
CV85
CV86
CV86
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
CV93
CV93
CV94
CV94
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Under GPU(below 150mils)
120mA
0.1U_0402_16V4Z
0.1U_0402_16V4Z
240mA (120mA each)
120mA(12~16mils)
RV54
RV54
1 2
1 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
CV116
CV116
CV115
CV115
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Under GPU(below 150mils)
RV57
RV57 10K_0402_5%
10K_0402_5%
DGPU_PWR_EN#<46>
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
2
1
CV88
CV88
2
1
CV96
CV96
2
1
CV109
CV109
2
Near GPU
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV117
CV117
2
DGPU_PWR_EN<14,33>
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
2
Near GPU
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
2
+3VS_DGPU
1
CV118
CV118
2
DGPU_PWR_EN#
10U_0603_6.3V6M
10U_0603_6.3V6M
1
CV89
CV89
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
CV97
CV97
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
CV110
CV110
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CV119
CV119
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
CV90
CV90
CV98
CV98
CV111
CV111
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
CV91
CV91
2
10U_0603_6.3V6M
10U_0603_6.3V6M
1
CV99
CV99
2
LV3
LV3
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
Near GPU
1
CV113
CV113
2
12
+3VS_DGPU
1
2
+3VS to +3VS_DGPU
+3VALW
R445
R445 100K_0402_5%
100K_0402_5%
1 2
R444
R444
1 2
47K_0402_5%
47K_0402_5%
61
Q206A
Q206A
2
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
1
CV92
CV92
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
CV100
CV100
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
CV112
CV112
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
CV114
CV114
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
C491
C491
0.1U_0402_16V7K
0.1U_0402_16V7K
1
AO3413_SOT23
AO3413_SOT23
2
C492
C492
0.01U_0402_25V7K
0.01U_0402_25V7K
1
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1
+1.05VS_DGPU
+1.05VS_DGPU
+1.05VS_DGPU
+3VS
Vgs=-4.5V,Id=3A,Rds<97mohm
12
S
S
Q54
C683
C683
Q54
G
G
2
@
@
R128
R128 0_0805_5%
0_0805_5%
@
@
D
D
1 3
1
1
C684
C684 1U_0402_6.3V6K
1U_0402_6.3V6K
2
2
+3VS_DGPU
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
VGA(4/12)-POWER
VGA(4/12)-POWER
VGA(4/12)-POWER
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
17 58Friday, January 21, 2011
17 58Friday, January 21, 2011
17 58Friday, January 21, 2011
0.1
0.1
0.1
5
D D
C C
B B
4
UV1F
UV1F
B3
GND_0
B6
GND_1
B9
GND_2
B12
GND_3
B15
GND_4
B21
GND_5
B24
GND_6
B27
GND_7
B30
GND_8
B33
GND_9
C2
GND_10
C34
GND_11
E6
GND_12
E9
GND_13
E12
GND_14
E15
GND_15
E18
GND_16
E24
GND_17
E27
GND_18
E30
GND_19
F2
GND_20
F31
GND_21
F34
GND_22
F5
GND_23
J2
GND_24
J5
GND_25
J31
GND_26
J34
GND_27
K9
GND_28
L9
GND_29
M2
GND_30
M5
GND_31
M11
GND_32
M13
GND_33
M15
GND_34
M17
GND_35
M19
GND_36
M21
GND_37
M23
GND_38
M25
GND_39
M31
GND_40
M34
GND_41
N11
GND_42
N12
GND_43
N13
GND_44
N14
GND_45
N15
GND_46
N16
GND_47
N17
GND_48
N18
GND_49
N19
GND_50
N20
GND_51
N21
GND_52
N22
GND_53
N23
GND_54
N24
GND_55
N25
GND_56
P12
GND_57
P14
GND_58
P16
GND_59
P18
GND_60
P20
GND_61
P22
GND_62
P24
GND_63
R2
GND_64
R5
GND_65
R31
GND_66
R34
GND_67
T11
GND_68
T13
GND_69
T15
GND_70
T17
GND_71
T19
GND_72
T21
GND_73
T23
GND_74
T25
GND_75
U11
GND_76
U12
GND_77
U13
GND_78
U14
GND_79
U15
GND_80
U16
GND_81
U17
GND_82
U18
GND_83
U19
GND_84
U20
GND_85
U21
GND_86
U22
GND_87
U23
GND_88
U24
GND_89
U25
GND_90
V2
GND_91
V5
GND_92
V9
GND_93
V12
GND_94
V14
GND_95
V16
GND_96
Part 6 of 7
Part 6 of 7
GND
GND
GND_97 GND_98
GND_99 GND_100 GND_101 GND_102 GND_103 GND_104 GND_105 GND_106 GND_107 GND_108 GND_109 GND_110 GND_111 GND_112 GND_113 GND_114 GND_115 GND_116 GND_117 GND_118 GND_119 GND_120 GND_121 GND_122 GND_123 GND_124 GND_125 GND_126 GND_127 GND_128 GND_129 GND_130 GND_131 GND_132 GND_133 GND_134 GND_135 GND_136 GND_137 GND_138 GND_139 GND_140 GND_141 GND_142 GND_143 GND_144 GND_145 GND_146 GND_147 GND_148 GND_149 GND_150 GND_151 GND_152 GND_153 GND_154 GND_155 GND_156 GND_157 GND_158 GND_159 GND_160 GND_161 GND_162 GND_163 GND_164 GND_165 GND_166 GND_167 GND_168 GND_169 GND_170 GND_171 GND_172 GND_173 GND_174 GND_175 GND_176 GND_177 GND_178 GND_179 GND_180 GND_181 GND_182 GND_183 GND_184 GND_185 GND_186 GND_187 GND_188 GND_189 GND_190 GND_191 GND_192
V18 V20 V22 V24 V31 Y11 Y13 Y15 Y17 Y19 Y21 Y23 Y25 AA2 AA5 AA11 AA12 AA13 AA14 AA15 AA16 AA17 AA18 AA19 AA20 AA21 AA22 AA23 AA24 AA25 AA34 AB12 AB14 AB16 AB18 AB20 AB22 AB24 AC9 AD2 AD5 AD11 AD13 AD15 AD17 AD21 AD23 AD25 AD31 AD34 AE11 AE12 AE13 AE14 AE15 AE16 AE17 AE18 AE19 AE20 AE21 AE22 AE23 AE24 AE25 AG2 AG5 AG31 AG34 AK2 AK5 AK14 AK31 AK34 AL6 AL9 AL12 AL15 AL18 AL21 AL24 AL27 AL30 AN2 AN34 AP3 AP6 AP9 AP12 AP15 AP18 AP21 AP24 AP27 AP30 AP33
3
2
1
N12P-GV-A1_BGA_973P
N12P-GV-A1_BGA_973P
N12PGV@
N12PGV@
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
VGA(5/12)-GND
VGA(5/12)-GND
VGA(5/12)-GND
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
18 58Friday, January 21, 2011
18 58Friday, January 21, 2011
18 58Friday, January 21, 2011
0.1
0.1
0.1
5
Near GPU
200mA
10U_0603_6.3V6M
10U_0603_6.3V6M
1
CV143
CV143
2
200mA
10U_0603_6.3V6M
10U_0603_6.3V6M
1
CV147
CV147
2
MDA[0..63]
+FB_VREF
2
CV144
CV144
1
2
CV148
CV148
1
+FB_AVDD
+VRAM_1.5VS
+FB_AVDD_NC
+VRAM_1.5VS
RV58
RV58
@
@
RV59
RV59
@
@
1
2
1
2
MDA[0..63]<21,22>
12
12
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CV258
CV258
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CV259
CV259
2
12mil
CV140
CV140
0.01U_0402_25V7K
0.01U_0402_25V7K
@
@
CV142
CV142
1U_0402_6.3V6K
1U_0402_6.3V6K
CV146
CV146
1U_0402_6.3V6K
1U_0402_6.3V6K
D D
C C
1.1K_0402_1%
1.1K_0402_1%
1.1K_0402_1%
1.1K_0402_1%
+1.05VS_DGPU
BLM18PG330SN1D_0603
B B
BLM18PG330SN1D_0603
2
CV141
CV141
10U_0603_6.3V6M
10U_0603_6.3V6M
1
+1.05VS_DGPU
BLM18PG330SN1D_0603
BLM18PG330SN1D_0603
2
CV145
CV145
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1 2
LV8
LV8
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 2
LV9
LV9
0.1U_0402_16V4Z
0.1U_0402_16V4Z
MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8
MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63
+FB_AVDD_NC
+FB_VREF
60.4_0402_1%
60.4_0402_1%
RV60
RV60
4
12
12
L32 N33 L33 N34 N35 P35 P33 P34 K35 K33 K34 H33 G34 G33 E34 E33 G31 F30 G30 G32 K30 K32 H30 K31 L31
L30 M32 N30 M30
P31 R32 R30
AG30 AG32 AH31
AF31
AF30 AE30 AC32 AD30 AN33
AL31 AM33
AL33 AK30 AK32
AJ30 AH30 AH33 AH35 AH34 AH32
AJ33
AL35 AM34 AM35
AF33 AE32
AF34 AE35 AE34 AE33 AB32 AC35
AG27
AF27
J19 J18
J27 T30 T29
RV61
RV61 10K_0402_5%
10K_0402_5%
UV1B
UV1B
N12P-GV-A1_BGA_973P
N12P-GV-A1_BGA_973P
N12PGV@
N12PGV@
FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8 FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63
FB_DLLAVDD_0 FB_PLLAVDD_0
FB_DLLAVDD_1 FB_PLLAVDD_1
FB_VREF_NC FBA_DEBUG0 FBA_DEBUG1
Part 2 of 7
Part 2 of 7
MEMORY INTERFACE
MEMORY INTERFACE
FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8
FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
FBA_DQS_RN0
A
A
FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7
FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7
FBA_WCK0
FBA_WCK0_N
FBA_WCK1
FBA_WCK1_N
FBA_WCK2
FBA_WCK2_N
FBA_WCK3
FBA_WCK3_N
FBA_CLK0_N
FBA_CLK1_N
FBA_CLK0
FBA_CLK1
U30 V30 U31 V32 T35 U33 W32 W33 W31 W34 U34 U35 U32 T34 T33 W30 AB30 AA30 AB31 AA32 AB33 Y32 Y33 AB34 AB35 Y35 W35 Y34 Y31 Y30 W29 Y29
P32 H34 J30 P30 AF32 AL32 AL34 AF35
L35 G35 H31 N32 AD32 AJ31 AJ35 AC34
L34 H35 J32 N31 AE31 AJ32 AJ34 AC33
P29 R29 L29 M29 AG29 AH29 AD29 AE29
T32 T31
AC31 AC30
DQMA0 DQMA1 DQMA2 DQMA3 DQMA4 DQMA5 DQMA6 DQMA7
DQSA#0 DQSA#1 DQSA#2 DQSA#3 DQSA#4 DQSA#5 DQSA#6 DQSA#7
DQSA0 DQSA1 DQSA2 DQSA3 DQSA4 DQSA5 DQSA6 DQSA7
CLKA0 CLKA0#
CLKA1 CLKA1#
3
CMDA0
CMDA2 CMDA3 CMDA4 CMDA5 CMDA6 CMDA7 CMDA8 CMDA9 CMDA10 CMDA11 CMDA12 CMDA13 CMDA14 CMDA15 CMDA16
CMDA18 CMDA19 CMDA20 CMDA21 CMDA22 CMDA23 CMDA24 CMDA25 CMDA26 CMDA27 CMDA28 CMDA29 CMDA30
CMDA0 <21>
CMDA2 <21> CMDA3 <21> CMDA4 <21,22> CMDA5 <21,22> CMDA6 <21,22> CMDA7 <21,22> CMDA8 <21,22> CMDA9 <21,22> CMDA10 <21,22> CMDA11 <21,22> CMDA12 <21,22> CMDA13 <21,22> CMDA14 <21,22> CMDA15 <21,22> CMDA16 <22>
CMDA18 <22> CMDA19 <22> CMDA20 <21,22> CMDA21 <21,22> CMDA22 <21,22> CMDA23 <21,22> CMDA24 <21,22> CMDA25 <21,22> CMDA26 <21,22> CMDA27 <21,22> CMDA28 <21,22> CMDA29 <21,22> CMDA30 <21,22>
CLKA0 <21> CLKA0# <21>
CLKA1 <22> CLKA1# <22>
DQMA[7..0] <21,22>
DQSA#[7..0] <21,22>
DQSA[7..0] <21,22>
2
Mode E - Mirror Mode Mapping
0..31
CKE_L
A8
CS0#_L
A7
A2
A11
A5
A0
CAS#CMD15
BA1
A9
BA0
BA2
A3
A4
A13
WE#
A1
A10
A12
CS1#_L
RAS#
ODT_L
A6
RST
A14
A15
DATA Bus
32..63
A8
A6
A1
A9
A4
A12
CAS#
A3
A11
CS0#_H
BA0
A15
BA1
CS1#_H
ODT_H
A5
A14
A10
A2
WE#
A0
RAS#
A7
CKE_H
RST
A13
BA2
Address
CMD3
CMD8
CMD2
CMD21
CMD24
CMD23
CMD26
CMD7
CMD13
CMD4
CMD18
CMD29
CMD27
CMD6
CMD17
CMD19
CMD22
CMD12
CMD28
CMD10
CMD25
CMD9
CMD1
CMD11
CMD0
CMD5
CMD16
CMD20
CMD14
CMD30
1
Under GPU(below 150mils)
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
VGA(6/12)-MEM Interface A
VGA(6/12)-MEM Interface A
VGA(6/12)-MEM Interface A
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
0.1
0.1
19 58Friday, January 21, 2011
19 58Friday, January 21, 2011
19 58Friday, January 21, 2011
0.1
5
MDB[0..63]<23,24>
D D
C C
+VRAM_1.5VS
B B
MDB[0..63]
1 2
RV62 40.2_0402_1%RV62 40.2_0402_1%
1 2
RV63 40.2_0402_1%RV63 40.2_0402_1%
1 2
RV64 60.4_0402_1%RV64 60.4_0402_1%
+VRAM_1.5VS
MDB0 MDB1 MDB2 MDB3 MDB4 MDB5 MDB6 MDB7 MDB8
MDB9 MDB10 MDB11 MDB12 MDB13 MDB14 MDB15 MDB16 MDB17 MDB18 MDB19 MDB20 MDB21 MDB22 MDB23 MDB24 MDB25 MDB26 MDB27 MDB28 MDB29 MDB30 MDB31 MDB32 MDB33 MDB34 MDB35 MDB36 MDB37 MDB38 MDB39 MDB40 MDB41 MDB42 MDB43 MDB44 MDB45 MDB46 MDB47 MDB48 MDB49 MDB50 MDB51 MDB52 MDB53 MDB54 MDB55 MDB56 MDB57 MDB58 MDB59 MDB60 MDB61 MDB62 MDB63
RV66 10K_0402_5%RV66 10K_0402_5%
4
UV1C
UV1C
B13 D13 A13 A14 C16 B16 A17 D16 C13 B11 C11 A11 C10
C8 B8 A8 E8 F8
F10
F9
F12
D8 D11 E11 D12 E13 F13 F14 F15 E16 F16 F17 D29 F27 F28 E28 D26 F25 D24 E25 E32 F32 D33 E31 C33 F29 D30 E29 B29 C31 C29 B31 C32 B32 B35 B34 A29 B28 A28 C28 C26 D25 B25 A25
K27
L27
M27
RV6560.4_0402_1% RV6560.4_0402_1%
G19
12
G16
12
Part 3 of 7
Part 3 of 7
FBC_D0 FBC_D1 FBC_D2 FBC_D3 FBC_D4 FBC_D5 FBC_D6 FBC_D7 FBC_D8 FBC_D9 FBC_D10 FBC_D11 FBC_D12 FBC_D13 FBC_D14 FBC_D15 FBC_D16 FBC_D17 FBC_D18 FBC_D19 FBC_D20 FBC_D21 FBC_D22 FBC_D23 FBC_D24 FBC_D25 FBC_D26 FBC_D27 FBC_D28 FBC_D29 FBC_D30 FBC_D31 FBC_D32 FBC_D33 FBC_D34 FBC_D35 FBC_D36 FBC_D37 FBC_D38 FBC_D39 FBC_D40 FBC_D41 FBC_D42 FBC_D43 FBC_D44 FBC_D45 FBC_D46 FBC_D47 FBC_D48 FBC_D49 FBC_D50 FBC_D51 FBC_D52 FBC_D53 FBC_D54 FBC_D55 FBC_D56 FBC_D57 FBC_D58 FBC_D59 FBC_D60 FBC_D61 FBC_D62 FBC_D63
FBCAL_PD_VDDQ
FBCAL_PU_GND
FBCAL_TERM_GND
FBC_DEBUG0 FBB_DEBUG1
N12P-GV-A1_BGA_973P
N12P-GV-A1_BGA_973P
N12PGV@
N12PGV@
FBC_DQS_RN0 FBC_DQS_RN1 FBC_DQS_RN2
MEMORY INTERFACE C
MEMORY INTERFACE C
FBC_DQS_RN3 FBC_DQS_RN4 FBC_DQS_RN5 FBC_DQS_RN6 FBC_DQS_RN7
FBC_DQS_WP0 FBC_DQS_WP1 FBC_DQS_WP2 FBC_DQS_WP3 FBC_DQS_WP4 FBC_DQS_WP5 FBC_DQS_WP6 FBC_DQS_WP7
FBC_CMD0 FBC_CMD1 FBC_CMD2 FBC_CMD3 FBC_CMD4 FBC_CMD5 FBC_CMD6 FBC_CMD7 FBC_CMD8
FBC_CMD9 FBC_CMD10 FBC_CMD11 FBC_CMD12 FBC_CMD13 FBC_CMD14 FBC_CMD15 FBC_CMD16 FBC_CMD17 FBC_CMD18 FBC_CMD19 FBC_CMD20 FBC_CMD21 FBC_CMD22 FBC_CMD23 FBC_CMD24 FBC_CMD25 FBC_CMD26 FBC_CMD27 FBC_CMD28 FBC_CMD29 FBC_CMD30 FBC_CMD31
FBC_DQM0 FBC_DQM1 FBC_DQM2 FBC_DQM3 FBC_DQM4 FBC_DQM5 FBC_DQM6 FBC_DQM7
FBC_WCK0
FBC_WCK0_N
FBC_WCK1
FBC_WCK1_N
FBC_WCK2
FBC_WCK2_N
FBC_WCK3
FBC_WCK3_N
FBC_CLK0
FBC_CLK0_N
FBC_CLK1
FBC_CLK1_N
CMDB0
F18 E19
CMDB2
D18
CMDB3
C17
CMDB4
F19
CMDB5
C19
CMDB6
B17
CMDB7
E20
CMDB8
B19
CMDB9
D20
CMDB10
A19
CMDB11
D19
CMDB12
C20
CMDB13
F20
CMDB14
B20
CMDB15
G21
CMDB16
F22 F24
CMDB18
F23
CMDB19
C25
CMDB20
C23
CMDB21
F21
CMDB22
E22
CMDB23
D21
CMDB24
A23
CMDB25
D22
CMDB26
B23
CMDB27
C22
CMDB28
B22
CMDB29
A22
CMDB30
A20 G20
DQMB0
A16
DQMB1
D10
DQMB2
F11
DQMB3
D15
DQMB4
D27
DQMB5
D34
DQMB6
A34
DQMB7
D28
DQSB#0
B14
DQSB#1
B10
DQSB#2
D9
DQSB#3
E14
DQSB#4
F26
DQSB#5
D31
DQSB#6
A31
DQSB#7
A26
DQSB0
C14
DQSB1
A10
DQSB2
E10
DQSB3
D14
DQSB4
E26
DQSB5
D32
DQSB6
A32
DQSB7
B26
G14 G15 G11 G12 G27 G28 G24 G25
CLKB0
E17
CLKB0#
D17
CLKB1
D23
CLKB1#
E23
3
CMDB0 <23>
CMDB2 <23> CMDB3 <23> CMDB4 <23,24> CMDB5 <23,24> CMDB6 <23,24> CMDB7 <23,24> CMDB8 <23,24> CMDB9 <23,24> CMDB10 <23,24> CMDB11 <23,24> CMDB12 <23,24> CMDB13 <23,24> CMDB14 <23,24> CMDB15 <23,24> CMDB16 <24>
CMDB18 <24> CMDB19 <24> CMDB20 <23,24> CMDB21 <23,24> CMDB22 <23,24> CMDB23 <23,24> CMDB24 <23,24> CMDB25 <23,24> CMDB26 <23,24> CMDB27 <23,24> CMDB28 <23,24> CMDB29 <23,24> CMDB30 <23,24>
CLKB0 <23> CLKB0# <23>
CLKB1 <24> CLKB1# <24>
DQMB[7..0] <23,24>
DQSB#[7..0] <23,24>
DQSB[7..0] <23,24>
2
Mode E - Mirror Mode Mapping
0..31
CKE_L
A8
CS0#_L
A7
A2
A11
A5
A0
CAS#CMD15
BA1
A9
BA0
BA2
A3
A4
A13
WE#
A1
A10
A12
CS1#_L
RAS#
ODT_L
A6
RST
A14
A15
DATA Bus
32..63
A8
A6
A1
A9
A4
A12
CAS#
A3
A11
CS0#_H
BA0
A15
BA1
CS1#_H
ODT_H
A5
A14
A10
A2
WE#
A0
RAS#
A7
CKE_H
RST
A13
BA2
Address
CMD3
CMD8
CMD2
CMD21
CMD24
CMD23
CMD26
CMD7
CMD13
CMD4
CMD18
CMD29
CMD27
CMD6
CMD17
CMD19
CMD22
CMD12
CMD28
CMD10
CMD25
CMD9
CMD1
CMD11
CMD0
CMD5
CMD16
CMD20
CMD14
CMD30
1
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
VGA(7/12)-MEM Interface C
VGA(7/12)-MEM Interface C
VGA(7/12)-MEM Interface C
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
20 58Friday, January 21, 2011
20 58Friday, January 21, 2011
20 58Friday, January 21, 2011
0.1
0.1
0.1
5
4
3
2
1
Memory Partition A - Lower 32 bits
D D
+VRAM_1.5VS
12
RV67
RV67
1.1K_0402_1%
1.1K_0402_1%
RV68
RV68
1.1K_0402_1%
1.1K_0402_1%
RV69
RV69 160_0402_1%
C C
B B
160_0402_1%
1 2
CLKA0#
CLKA0
12
+FBA_VREF0
1
CV149
CV149
0.01U_0402_25V7K
0.01U_0402_25V7K
2
10K_0402_5%
10K_0402_5%
RV72
RV72
+FBA_VREF0 +FBA_VREF0
CMDA7 CMDA10 CMDA24 CMDA6 CMDA22 CMDA26 CMDA5 CMDA21 CMDA8 CMDA4 CMDA25 CMDA23 CMDA9 CMDA12 CMDA14 CMDA30
CMDA29 CMDA13 CMDA27
12
243_0402_1%
243_0402_1%
RV73
RV73
CLKA0 CLKA0# CMDA3
CMDA0 CMDA2 CMDA11 CMDA15 CMDA28
DQSA0 DQSA3
DQMA0 DQMA3
DQSA#0 DQSA#3
CMDA20
CLKA0<19> CLKA0#<19>
Under UV5(below 150mils) Under UV6(below 150mils)
+VRAM_1.5VS +VRAM_1.5VS
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
1
CV150
CV150
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV151
CV151
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CV152
CV152
2
1
CV153
CV153
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CV154
CV154
2
1
CV155
CV155
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
12
M8 H1
N3
P7 P3
N2
P8
P2 R8 R2
T8 R3
L7 R7 N7
T3
T7 M7
M2 N8 M3
K7
K9
K1
L2
K3
L3
F3 C7
E7 D3
G3
B7
T2
L8
L1
L9
1
CV156
CV156
2
J7
J3
J1
J9
1U_0402_6.3V4Z
1U_0402_6.3V4Z
UV5
UV5
96-BALL
96-BALL SDRAM DDR3
SDRAM DDR3
1
CV157
CV157
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV158
CV158
1
2
VREFCA VREFDQ
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3
BA0 BA1 BA2
CK CK CKE/CKE0
ODT/ODT0 CS/CS0 RAS CAS WE
DQSL DQSU
DML DMU
DQSL DQSU
RESET
ZQ/ZQ0
NC/ODT1 NC/CS1 NC/CE1 NCZQ1
H5TQ2G63BFR-11C FBGA 96P
H5TQ2G63BFR-11C FBGA 96P
@
@
1
2
MDA3
E3
MDA4
F7
MDA2
F2
MDA7
F8
MDA0
H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
CV159
CV159
1U_0402_6.3V4Z
1U_0402_6.3V4Z
Group0
MDA5 MDA1 MDA6
MDA29 MDA26 MDA31 MDA25 MDA27 MDA28 MDA30 MDA24
+VRAM_1.5VS +VRAM_1.5VS
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
1
CV160
CV160
CV161
CV161
2
2
RV74
RV74
243_0402_1%
243_0402_1%
CMDA7 CMDA10 CMDA24 CMDA6 CMDA22 CMDA26 CMDA5 CMDA21 CMDA8 CMDA4 CMDA25 CMDA23 CMDA9 CMDA12 CMDA14 CMDA30
CMDA29 CMDA13 CMDA27
CLKA0 CLKA0# CMDA3
CMDA0 CMDA2 CMDA11 CMDA15 CMDA28
DQSA2 DQSA1
DQMA2 DQMA1
DQSA#2 DQSA#1
CMDA20
1U_0402_6.3V4Z
1U_0402_6.3V4Z
12
1
CV162
CV162
2
M8 H1
N3
P7 P3
N2
P8
P2 R8 R2
T8 R3
L7 R7 N7
T3
T7 M7
M2 N8 M3
J7 K7 K9
K1 L2
J3 K3 L3
F3
C7
E7
D3
G3
B7
T2
L8
J1 L1
J9 L9
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
2
UV6
UV6
96-BALL
96-BALL SDRAM DDR3
SDRAM DDR3
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CV164
CV164
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
VDD VDD VDD VDD VDD VDD VDD VDD VDD
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
1
CV165
CV165
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
VREFCA VREFDQ
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3
BA0 BA1 BA2
CK CK CKE/CKE0
ODT/ODT0 CS/CS0 RAS CAS WE
DQSL DQSU
DML DMU
DQSL DQSU
RESET
ZQ/ZQ0
NC/ODT1 NC/CS1 NC/CE1 NCZQ1
H5TQ2G63BFR-11C FBGA 96P
H5TQ2G63BFR-11C FBGA 96P
@
@
CV163
CV163
E3 F7 F2 F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
1
2
Support N12P-GV/GS Support Max VRAM 2G
MDA18 MDA19 MDA23 MDA17
Group2
MDA21 MDA16 MDA20 MDA22
MDA14 MDA11 MDA15 MDA8 MDA13
Group1Group3
MDA10 MDA12 MDA9
CMDA0
CMDA3
RV70
RV70
10K_0402_5%
10K_0402_5%
1U_0402_6.3V4Z
1
CV168
CV168
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1U_0402_6.3V4Z
1
CV169
CV169
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CV166
CV166
2
CV167
CV167
1 2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV170
CV170
RV71
RV71
10K_0402_5%
10K_0402_5%
1 2
1
CV171
CV171
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV172
CV172
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV173
CV173
2
Mode E - Mirror Mode Mapping
Address
CMD3
CMD8
CMD2
CMD21
CMD24
CMD23
CMD26
CMD7
CMD13
CMD4
CMD18
CMD29
CMD27
CMD6
CMD17
CMD19
CMD22
CMD12
CMD28
CMD10
CMD25
CMD9
CMD1
CMD11
CMD0
CMD5
CMD16
CMD20
CMD14
CMD30
MDA[0..63] <19,22>
CMDA[30..0] <19,22>
DQMA[7..0] <19,22>
DQSA[7..0] <19,22>
DQSA#[7..0] <19,22>
DATA Bus
0..31
32..63
CKE_L
A8
CS0#_L
A7
A2
A11
A5
A0
CAS#CMD15
BA1
A9
CS0#_H
BA0
BA2
A3
CS1#_H
ODT_H
A4
A13
WE#
A1
A10
A12
CS1#_L
RAS#
ODT_L
A6
CKE_H
RST
A14
A15
A8
A6
A1
A9
A4
A12
CAS#
A3
A11
BA0
A15
BA1
A5
A14
A10
A2
WE#
A0
RAS#
A7
RST
A13
BA2
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
VGA(8/12)-VRAM A Lower
VGA(8/12)-VRAM A Lower
VGA(8/12)-VRAM A Lower
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
21 58Friday, January 21, 2011
21 58Friday, January 21, 2011
21 58Friday, January 21, 2011
0.1
0.1
0.1
5
4
3
2
1
Memory Partition A - Upper 32 bits
MDA[0..63] <19,21>
UV8
12
1
2
CV181
CV181
M8
H1
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7
M7
M2
N8
M3
J7 K7 K9
K1 L2
J3 K3 L3
F3 C7
E7 D3
G3
B7
T2
L8
J1 L1
J9 L9
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
2
UV8
96-BALL
96-BALL SDRAM DDR3
SDRAM DDR3
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV183
CV183
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
1
CV184
CV184
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VREFCA VREFDQ
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3
BA0 BA1 BA2
CK CK CKE/CKE0
ODT/ODT0 CS/CS0 RAS CAS WE
DQSL DQSU
DML DMU
DQSL DQSU
RESET
ZQ/ZQ0
NC/ODT1 NC/CS1 NC/CE1 NCZQ1
H5TQ2G63BFR-11C FBGA 96P
H5TQ2G63BFR-11C FBGA 96P
@
@
CV182
CV182
MDA39
E3
MDA35
F7
MDA37
F2
MDA33
F8
MDA38
H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
1
2
Group4
MDA32 MDA36 MDA34
MDA42 MDA45 MDA40 MDA44 MDA41
Group5
MDA47 MDA43 MDA46
+VRAM_1.5VS +VRAM_1.5VS
CV186
CV186
+VRAM_1.5VS
1
CV187
CV187
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV188
CV188
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CV189
CV189
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV185
CV185
1
2
243_0402_1%
243_0402_1%
1
CV190
CV190
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
RV81
RV81
1
2
CMDA9 CMDA24 CMDA10 CMDA13 CMDA26 CMDA22 CMDA21 CMDA5 CMDA8 CMDA23 CMDA28 CMDA4 CMDA7 CMDA14 CMDA12 CMDA27
CMDA29 CMDA6 CMDA30
CLKA1 CLKA1# CMDA16
CMDA19 CMDA18 CMDA11 CMDA15 CMDA25
DQSA7 DQSA6
DQMA7 DQMA6
DQSA#7 DQSA#6
CV191
CV191
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+VRAM_1.5VS
D D
1.1K_0402_1%
1.1K_0402_1%
1.1K_0402_1%
1.1K_0402_1%
C C
CMDA16
CMDA19
B B
RV76
RV76
RV75
RV75
RV77
RV77 160_0402_1%
160_0402_1%
1 2
12
12
CLKA1
CLKA1#
RV78
RV78
10K_0402_5%
10K_0402_5%
1 2
+FBA_VREF1
1
CV174
CV174
0.01U_0402_25V7K
0.01U_0402_25V7K
2
RV79
RV79 10K_0402_5%
10K_0402_5%
1 2
+FBA_VREF1 +FBA_VREF1
CMDA9 CMDA24 CMDA10 CMDA13 CMDA26 CMDA22 CMDA21 CMDA5 CMDA8 CMDA23 CMDA28 CMDA4 CMDA7 CMDA14 CMDA12 CMDA27
CMDA29 CMDA6 CMDA30
CLKA1<19> CLKA1#<19>
CLKA1 CLKA1# CMDA16
CMDA19 CMDA18 CMDA11 CMDA15 CMDA25
DQSA4 DQSA5
DQMA4 DQMA5
DQSA#4 DQSA#5
CMDA20 CMDA20
RV80
RV80
243_0402_1%
243_0402_1%
Under UV8(below 150mils) Under UV7(below 150mils)
+VRAM_1.5VS
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV175
CV175
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
2
CV176
CV176
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CV177
CV177
2
1
CV178
CV178
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CV179
CV179
2
1
CV180
CV180
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
12
M8
H1
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7
M7
M2
N8
M3
J7 K7 K9
K1 L2
J3 K3
L3
F3 C7
E7 D3
G3
B7
T2
L8
J1 L1
J9 L9
1
CV192
CV192
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
UV7
UV7
96-BALL
96-BALL SDRAM DDR3
SDRAM DDR3
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV193
CV193
2
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
CV194
CV194
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
2
VREFCA VREFDQ
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3
BA0 BA1 BA2
CK CK CKE/CKE0
ODT/ODT0 CS/CS0 RAS CAS WE
DQSL DQSU
DML DMU
DQSL DQSU
RESET
ZQ/ZQ0
NC/ODT1 NC/CS1 NC/CE1 NCZQ1
H5TQ2G63BFR-11C FBGA 96P
H5TQ2G63BFR-11C FBGA 96P
@
@
1
2
E3 F7 F2 F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV195
CV195
MDA58 MDA59 MDA56 MDA63 MDA57 MDA61 MDA60 MDA62
MDA49 MDA53 MDA51 MDA55 MDA48 MDA54 MDA50 MDA52
1
2
CV196
CV196
Group7
Group6
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV197
CV197
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
Mode E - Mirror Mode Mapping
Address
CMD3
CMD8
CMD2
CMD21
CMD24
CMD23
CMD26
CMD7
CMD13
CMD4
CMD18
CMD29
CMD27
CMD6
CMD17
CMD19
CMD22
CMD12
CMD28
CMD10
CMD25
CMD9
CMD1
CMD11
CMD0
CMD5
CMD16
CMD20
CMD14
CV198
CV198
CMD30
1
2
CMDA[30..0] <19,21>
DQMA[7..0] <19,21>
DQSA[7..0] <19,21>
DQSA#[7..0] <19,21>
DATA Bus
0..31
CKE_L
A8
CS0#_L
A7
A2
A11
A5
A0
CAS#CMD15
BA1
A9
BA0
BA2
A3
A4
A13
WE#
A1
A10
A12
CS1#_L
RAS#
ODT_L
A6
RST
A14
A15
32..63
A8
A6
A1
A9
A4
A12
CAS#
A3
A11
CS0#_H
BA0
A15
BA1
CS1#_H
ODT_H
A5
A14
A10
A2
WE#
A0
RAS#
A7
CKE_H
RST
A13
BA2
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
VGA(9/12)-VRAM A Upper
VGA(9/12)-VRAM A Upper
VGA(9/12)-VRAM A Upper
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
22 58Friday, January 21, 2011
22 58Friday, January 21, 2011
22 58Friday, January 21, 2011
0.1
0.1
0.1
5
4
3
2
1
Memory Partition C - Lower 32 bits
+VRAM_1.5VS
D D
1.1K_0402_1%
1.1K_0402_1%
1.1K_0402_1%
1.1K_0402_1%
C C
B B
RV82
RV82
8PCS@
8PCS@
RV83
RV83
8PCS@
8PCS@
1 2
12
12
CLKB0
RV84
RV84 160_0402_1%
160_0402_1%
8PCS@
8PCS@
CLKB0#
+FBB_VREF0
1
CV199
CV199
0.01U_0402_25V7K
0.01U_0402_25V7K
8PCS@
8PCS@
2
10K_0402_5%
10K_0402_5%
RV87
RV87
8PCS@
8PCS@
CLKB0<20> CLKB0#<20>
12
243_0402_1%
243_0402_1%
+FBB_VREF0
CMDB7 CMDB10 CMDB24 CMDB6 CMDB22 CMDB26 CMDB5 CMDB21 CMDB8 CMDB4 CMDB25 CMDB23 CMDB9 CMDB12 CMDB14 CMDB30
CMDB29 CMDB13 CMDB27
CLKB0 CLKB0# CMDB3
CMDB0 CMDB2 CMDB11 CMDB15 CMDB28
DQSB0 DQSB3
DQMB0 DQMB3
DQSB#0 DQSB#3
CMDB20
RV88
RV88
8PCS@
8PCS@
Under UV9(below 150mils) Under UV10(below 150mils)
+VRAM_1.5VS +VRAM_1.5VS
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV200
CV200
8PCS@
8PCS@
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
2
CV201
CV201
8PCS@
8PCS@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CV202
CV202
8PCS@
8PCS@
2
1
2
1
CV203
CV203
8PCS@
8PCS@
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CV204
CV204
8PCS@
8PCS@
2
1
CV205
CV205
8PCS@
8PCS@
8PCS@
8PCS@ 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CV206
CV206
M8
H1
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7
M7
M2
N8
M3
K7 K9
K1 L2
K3 L3
F3 C7
E7 D3
G3
B7
T2
L8
12
L1
L9
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV207
CV207
8PCS@
8PCS@
2
J7
J3
J1
J9
UV9
UV9
96-BALL
96-BALL SDRAM DDR3
SDRAM DDR3
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV208
CV208
8PCS@
8PCS@
2
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
1
CV209
CV209
8PCS@
8PCS@
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VREFCA VREFDQ
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3
BA0 BA1 BA2
CK CK CKE/CKE0
ODT/ODT0 CS/CS0 RAS CAS WE
DQSL DQSU
DML DMU
DQSL DQSU
RESET
ZQ/ZQ0
NC/ODT1 NC/CS1 NC/CE1 NCZQ1
H5TQ2G63BFR-11C FBGA 96P
H5TQ2G63BFR-11C FBGA 96P
@
@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
MDB0
E3
MDB7
F7
MDB1
F2
MDB4
F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
1
2
CV210
CV210
8PCS@
8PCS@
Group0
MDB3 MDB6 MDB2 MDB5
MDB28 MDB25 MDB31 MDB24 MDB29
Group3
MDB27 MDB30 MDB26
+VRAM_1.5VS +VRAM_1.5VS
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV211
CV211
8PCS@
8PCS@
2
+FBB_VREF0
RV89
RV89
243_0402_1%
243_0402_1%
8PCS@
8PCS@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CMDB7 CMDB10 CMDB24 CMDB6 CMDB22 CMDB26 CMDB5 CMDB21 CMDB8 CMDB4 CMDB25 CMDB23 CMDB9 CMDB12 CMDB14 CMDB30
CMDB29 CMDB13 CMDB27
CLKB0 CLKB0# CMDB3
CMDB0 CMDB2 CMDB11 CMDB15 CMDB28
DQSB2 DQSB1
DQMB2 DQMB1
DQSB#2 DQSB#1
CMDB20
1
CV212
CV212
8PCS@
8PCS@
2
M8 H1
N3
P7 P3
N2
P8
P2 R8 R2
T8 R3
L7 R7 N7
T3
T7 M7
M2 N8 M3
K7
K9
K1
L2
K3
F3 C7
E7 D3
G3
B7
T2
L8
12
L1
L9
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV213
CV213
8PCS@
8PCS@
2
J7
J3
L3
J1
J9
UV10
UV10
96-BALL
96-BALL SDRAM DDR3
SDRAM DDR3
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CV214
CV214
8PCS@
8PCS@
2
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
1
CV215
CV215
8PCS@
8PCS@
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
VREFCA VREFDQ
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3
BA0 BA1 BA2
CK CK CKE/CKE0
ODT/ODT0 CS/CS0 RAS CAS WE
DQSL DQSU
DML DMU
DQSL DQSU
RESET
ZQ/ZQ0
NC/ODT1 NC/CS1 NC/CE1 NCZQ1
H5TQ2G63BFR-11C FBGA 96P
H5TQ2G63BFR-11C FBGA 96P
@
@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
E3 F7 F2 F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CV216
CV216
8PCS@
8PCS@
2
MDB22 MDB16 MDB18 MDB21 MDB23 MDB19 MDB20 MDB17
MDB13 MDB11 MDB14 MDB9 MDB12 MDB8 MDB15 MDB10
1
CV217
CV217
8PCS@
8PCS@
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Group2
Group1
1
2
CMDB0
CMDB3
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV218
CV218
8PCS@
8PCS@
1
2
CV219
CV219
8PCS@
8PCS@
10K_0402_5%
10K_0402_5%
RV85
RV85
8PCS@
8PCS@
1 2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV220
CV220
8PCS@
8PCS@
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
RV86
RV86
10K_0402_5%
10K_0402_5%
8PCS@
8PCS@
1 2
1
CV221
CV221
8PCS@
8PCS@
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV222
CV222
8PCS@
8PCS@
2
1
2
Mode E - Mirror Mode Mapping
Address
CMD3
CMD8
CMD2
CMD21
CMD24
CMD23
CMD26
CMD7
CMD13
CMD4
CMD18
CMD29
CMD27
CMD6
CMD17
CMD19
CMD22
CMD12
CMD28
CMD10
CMD25
CMD9
CMD1
CMD11
CMD0
CMD5
CMD16
CMD20
CMD14
CMD30
CV223
CV223
8PCS@
8PCS@
MDB[0..63] <20,24>
CMDB[30..0] <20,24>
DQMB[7..0] <20,24>
DQSB[7..0] <20,24>
DQSB#[7..0] <20,24>
DATA Bus
0..31
CKE_L
A8
CS0#_L
A7
A2
A11
A5
A0
CAS#CMD15
BA1
A9
BA0
BA2
A3
A4
A13
WE#
A1
A10
A12
CS1#_L
RAS#
ODT_L
A6
RST
A14
A15
32..63
A8
A6
A1
A9
A4
A12
CAS#
A3
A11
CS0#_H
BA0
A15
BA1
CS1#_H
ODT_H
A5
A14
A10
A2
WE#
A0
RAS#
A7
CKE_H
RST
A13
BA2
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
VGA(10/12)-VRAM C Lower
VGA(10/12)-VRAM C Lower
VGA(10/12)-VRAM C Lower
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
23 58Friday, January 21, 2011
23 58Friday, January 21, 2011
23 58Friday, January 21, 2011
0.1
0.1
0.1
5
4
3
2
1
Memory Partition C - Upper 32 bits
UV12
UV11
12
CV233
CV233
8PCS@
8PCS@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
M8
H1
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7
M7
M2
N8
M3
J7 K7 K9
K1 L2
J3 K3 L3
F3 C7
E7 D3
G3
B7
T2
L8
J1 L1
J9 L9
1
2
CV234
CV234
8PCS@
8PCS@
UV11
96-BALL
96-BALL SDRAM DDR3
SDRAM DDR3
1
CV235
CV235
8PCS@
8PCS@
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
1
2
CV236
CV236
8PCS@
8PCS@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VREFCA VREFDQ
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3
BA0 BA1 BA2
CK CK CKE/CKE0
ODT/ODT0 CS/CS0 RAS CAS WE
DQSL DQSU
DML DMU
DQSL DQSU
RESET
ZQ/ZQ0
NC/ODT1 NC/CS1 NC/CE1 NCZQ1
H5TQ2G63BFR-11C FBGA 96P
H5TQ2G63BFR-11C FBGA 96P
@
@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV239
CV239
8PCS@
8PCS@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+FBB_VREF1
RV96
RV96
243_0402_1%
243_0402_1%
8PCS@
8PCS@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CV240
CV240
8PCS@
8PCS@
2
CMDB9 CMDB24 CMDB10 CMDB13 CMDB26 CMDB22 CMDB21 CMDB5 CMDB8 CMDB23 CMDB28 CMDB4 CMDB7 CMDB14 CMDB12 CMDB27
CMDB29 CMDB6 CMDB30
CLKB1 CLKB1# CMDB16
CMDB19 CMDB18 CMDB11 CMDB15 CMDB25
DQSB7 DQSB6
DQMB7 DQMB6
DQSB#7 DQSB#6
CMDB20
1
CV241
CV241
8PCS@
8PCS@
2
MDB39
E3
MDB33
F7
MDB38
F2
MDB32
F8
MDB36
H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
+VRAM_1.5VS +VRAM_1.5VS
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
1
CV237
CV237
8PCS@
8PCS@
2
MDB34 MDB37 MDB35
MDB42 MDB43 MDB41 MDB46 MDB40 MDB45 MDB44 MDB47
Group4
Group5
+VRAM_1.5VS
+VRAM_1.5VS
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
+
+
CV225
CV225 330U_B2_2.5VM_R15M
330U_B2_2.5VM_R15M
8PCS@
8PCS@
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV238
CV238
8PCS@
8PCS@
2
1
2
+VRAM_1.5VS
D D
1.1K_0402_1%
1.1K_0402_1%
1.1K_0402_1%
1.1K_0402_1%
C C
B B
RV90
RV90
8PCS@
8PCS@
RV91
RV91
8PCS@
8PCS@
CMDB16
CMDB19
12
12
RV92
RV92 160_0402_1%
160_0402_1%
8PCS@
8PCS@
1 2
+FBB_VREF1
1
CV224
CV224
0.01U_0402_25V7K
0.01U_0402_25V7K
8PCS@
8PCS@
2
CLKB1
CLKB1#
RV93
RV93
10K_0402_5%
10K_0402_5%
8PCS@
8PCS@
1 2
RV94
RV94
10K_0402_5%
10K_0402_5%
8PCS@
8PCS@
1 2
CLKB1<20> CLKB1#<20>
+FBB_VREF1
RV95
RV95
243_0402_1%
243_0402_1%
8PCS@
8PCS@
CMDB9 CMDB24 CMDB10 CMDB13 CMDB26 CMDB22 CMDB21 CMDB5 CMDB8 CMDB23 CMDB28 CMDB4 CMDB7 CMDB14 CMDB12 CMDB27
CMDB29 CMDB6 CMDB30
CLKB1 CLKB1# CMDB16
CMDB19 CMDB18 CMDB11 CMDB15 CMDB25
DQSB4 DQSB5
DQMB4 DQMB5
DQSB#4 DQSB#5
CMDB20
Under UV11(below 150mils) Under UV12(below 150mils)
+VRAM_1.5VS
1
CV226
CV226
8PCS@
8PCS@
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
2
CV227
CV227
8PCS@
8PCS@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CV228
CV228
8PCS@
8PCS@
2
1
CV229
CV229
8PCS@
8PCS@
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CV230
CV230
8PCS@
8PCS@
2
1
CV231
CV231
8PCS@
8PCS@
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
CV232
CV232
8PCS@
8PCS@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
2
M8 H1
N3
P7 P3
N2
P8
P2 R8 R2
T8 R3
L7 R7 N7
T3
T7 M7
M2 N8 M3
J7 K7 K9
K1 L2
J3 K3
L3
F3
C7
E7
D3
G3
B7
T2
L8
12
J1 L1
J9 L9
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CV242
CV242
8PCS@
8PCS@
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
UV12
96-BALL
96-BALL SDRAM DDR3
SDRAM DDR3
1
CV243
CV243
8PCS@
8PCS@
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
CV244
CV244
8PCS@
8PCS@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VREFCA VREFDQ
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3
BA0 BA1 BA2
CK CK CKE/CKE0
ODT/ODT0 CS/CS0 RAS CAS WE
DQSL DQSU
DML DMU
DQSL DQSU
RESET
ZQ/ZQ0
NC/ODT1 NC/CS1 NC/CE1 NCZQ1
H5TQ2G63BFR-11C FBGA 96P
H5TQ2G63BFR-11C FBGA 96P
@
@
E3 F7 F2 F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
1
2
CV245
CV245
8PCS@
8PCS@
MDB56 MDB63 MDB57 MDB60 MDB59 MDB61 MDB58 MDB62
MDB48 MDB55 MDB49 MDB52 MDB51 MDB54 MDB50 MDB53
1
CV246
CV246
8PCS@
8PCS@
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
Group7
Group6
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV247
CV247
8PCS@
8PCS@
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
Mode E - Mirror Mode Mapping
Address
CMD3
CMD8
CMD2
CMD21
CMD24
CMD23
CMD26
CMD7
CMD13
CMD4
CMD18
CMD29
CMD27
CMD6
CMD17
CMD19
CMD22
CMD12
CMD28
CMD10
CMD25
CMD9
CMD1
CMD11
CMD0
CMD5
CMD16
CMD20
1
2
CV249
CV249
8PCS@
8PCS@
CMD14
CMD30
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV248
CV248
8PCS@
8PCS@
2
MDB[0..63] <20,23>
CMDB[30..0] <20,23>
DQMB[7..0] <20,23>
DQSB[7..0] <20,23>
DQSB#[7..0] <20,23>
DATA Bus
0..31
CKE_L
A8
CS0#_L
A7
A2
A11
A5
A0
CAS#CMD15
BA1
A9
BA0
BA2
A3
A4
A13
WE#
A1
A10
A12
CS1#_L
RAS#
ODT_L
A6
RST
A14
A15
32..63
A8
A6
A1
A9
A4
A12
CAS#
A3
A11
CS0#_H
BA0
A15
BA1
CS1#_H
ODT_H
A5
A14
A10
A2
WE#
A0
RAS#
A7
CKE_H
RST
A13
BA2
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
VGA(11/12)-VRAM C Upper
VGA(11/12)-VRAM C Upper
VGA(11/12)-VRAM C Upper
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
24 58Friday, January 21, 2011
24 58Friday, January 21, 2011
24 58Friday, January 21, 2011
0.1
0.1
0.1
5
@
1 2
1 2
N12PGS@
N12PGS@
RV103
RV103
24.9K 0402_1%
24.9K 0402_1%
@
RV99
RV99 15K_0402_1%
15K_0402_1%
RV103
RV103
4.99K_0402_1%
4.99K_0402_1%
N12PGV@
N12PGV@
RV105
RV105 10K_0402_1%
10K_0402_1%
N12PGV@
N12PGV@
1 2
RV109
RV109 10K_0402_1%
10K_0402_1%
N12PGS@
N12PGS@
1 2
@
ROM_SI ROM_SO ROM_SCLK
X76
@
RV98
RV98
34.8K_0402_1%
34.8K_0402_1%
1 2
RV101
RV101
34.8K_0402_1%
34.8K_0402_1%
1 2
@RV104
@
4.99K_0402_1%
4.99K_0402_1%
1 2
RV108
RV108
@
@
45.3K_0402_1%
45.3K_0402_1%
1 2
RV104
RV97
RV97
45.3K_0402_1%
ROM_SCLK<15>
ROM_SI<15>
ROM_SO<15>
45.3K_0402_1%
1 2
@
@
RV100
RV100
45.3K_0402_1%
45.3K_0402_1%
1 2
D D
STRAP0<15> STRAP1<15> STRAP2<15> STRAP3<15> STRAP4<15>
C C
STRAP0 STRAP1 STRAP2 STRAP3 STRAP4
See below Table
4
@
@
RV131
RV131
4.99K_0402_1%
4.99K_0402_1%
1 2
RV130
RV130
4.99K_0402_1%
4.99K_0402_1%
N12PGV@
N12PGV@
1 2
+3VS
RV106
RV106
4.99K_0402_1%
4.99K_0402_1%
N12PGV@
N12PGV@
1 2
@
@
RV110
RV110 15K_0402_1%
15K_0402_1%
1 2
+3VS_DGPU
@
@
RV120
RV120
34.8K_0402_1%
34.8K_0402_1%
1 2
RV119
RV119 10K_0402_1%
10K_0402_1%
N12PGV@
N12PGV@
1 2
N12PGS@
N12PGS@
RV106
RV106 15K +-1% 0402
15K +-1% 0402
3
Physical Strapping pin
ROM_SO FB_0_BAR_SIZE
ROM_SCLK
ROM_SI
STRAP2
STRAP1
STRAP0
Power Rail
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
Resistor Values
5K
10K
15K
20K
25K
30K
35K
45K
Logical Strapping Bit3
XCLK_417
PCI_DEVID[4]
PCI_DEVID[3]
3GIO_PADCFG[3]
USER[3]
Pull-up to +3VS
1000
1001
1010
1011
1100
1101
1110
1111
Pull-down to Gnd
0000
0001
0010
0011
0100
0101
0110
0111
2
Logical Strapping Bit2
SUB_VENDOR
SUB_VENDOR
0
No VBIOS ROM
1
BIOS ROM is present (Default)
Logical Strapping Bit1
SLOT_CLK_CFG
RAMCFG[1]RAMCFG[3] RAMCFG[2]
XCLK_417
0
277MHz (Default)
1
Reserved
1
Logical Strapping Bit0
VGA_DEVICESMB_ALT_ADDR
PEX_PLLEN_TERM
RAMCFG[0]
PCI_DEVID[0]PCI_DEVID[1]PCI_DEVID[2]
3GIO_PADCFG[0]3GIO_PADCFG[1]3GIO_PADCFG[2]
USER[0]USER[1]USER[2]
GPU
N12P-GS 0x0DF4
N12P-GV 0x1050
B B
GPU
N12P-GS 0x0DF4
N12P-GV 0x1050 Pull down 10K
DeviceID ROM_SCLK STRAP0
DeviceID STRAP4
ROM_SI
Below Table
Below Table Pull up 45K
STRAP1
Pull down 35K
Pull down 35K
Pull up 15K Pull up 45K
Pull up 5K Pull up 10K
STRAP2
Pull down 25K
Pull down 5K
ROM_SO
Pull down 10K
STRAP3
Pull down 5K
FB_0_BAR_SIZE
0
256MB (Default)
1
Reserved
3GIO_PADCFG
3GIO_PADCFG[3:0]
0110
Notebook Default
USER Straps
User[3:0]
1000-1100
PEX_PLL_EN_TERM
0
Disable (Default)
1
Enable
Customer defined
SLOT_CLK_CFG
DDR3 Type
GPU
Hynix H5TQ1G63DFR-11C
64M16 900MHz
N12P-GS
Samsung K4W1G1646E-HC11
Hynix H5TQ2G63BFR-11C
128M16 900MHz
A A
Samsung K4W2G1646C-HC11
Hynix H5TQ1G63DFR-12C
64M16 800MHz
N12P-GV
Samsung K4W1G1646G-BC12
Hynix H5TQ2G63BFR-12C
128M16 800MHz
Samsung K4W2G1646C-HC12
5
VRAM
SA000041S20
SA000041T00
SA00003YO00
SA000047Q00
SA0000324C0
SA00004HS00
SA00003VS00
SA00003MQ40
512MB
1GB
512MB
1GB
1GB
2GB
1GB
2GB
512MB
512MB
1GB
1GB
RAMCFG[3..0] RV108
0010 PD 15K SD034154280
0010
0011
0011
0110
0110
0111
0111
0010 PD 15K SD034154280
0011
0110
0111
PD 15K
PD 20K
PD 20K
PD 34.8K
PD 34.8K
PD 45.3K
PD 45.3K
PD 20K
PD 34.8K
PD 45.3K
4
SD034154280
SD034200280
SD034200280
SD034348280
SD034348280
SD034453280
SD034453280
SD034200280
SD034348280
SD034453280
0
GPU and MCH don't share a common reference clock
1
GPU and MCH share a common reference clock (Default)
SMBUS_ALT_ADDR
0
0x9E (Default)
1
0x9C (Multi-GPU usage)
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
VGA_DEVICE
0
3D Device
1
VGA Device (Default)
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
VGA(12/12)-MISC
VGA(12/12)-MISC
VGA(12/12)-MISC
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
25 58Friday, January 21, 2011
25 58Friday, January 21, 2011
25 58Friday, January 21, 2011
0.1
0.1
0.1
5
D D
4
3
D1
CRT_B_L
CRT_G_L
CRT_R_L
+CRT_VCC
D1
2
3
YSDA0502C 3P C/A SOT-23
YSDA0502C 3P C/A SOT-23
@
@
D2
D2
2
3
YSDA0502C 3P C/A SOT-23
YSDA0502C 3P C/A SOT-23
@
@
2
1
1
HSYNC
VSYNC
CRT_DDC_DAT
CRT_DDC_CK
1
D4
D4
2
1
3
@
@
YSDA0502C 3P C/A SOT-23
YSDA0502C 3P C/A SOT-23
D11
D11
2
1
3
YSDA0502C 3P C/A SOT-23
YSDA0502C 3P C/A SOT-23
@
@
ESD
L1
L1
VGA_CRT_R<32>
VGA_CRT_G<32>
VGA_CRT_B<32>
1
R110
R110
12
12
R111
R111
R112
R112
150_0402_1%
150_0402_1%
150_0402_1%
150_0402_1%
1
12
150_0402_1%
150_0402_1%
C173
C173
C174
C174
2
2
2.2P_0402_50V8C
2.2P_0402_50V8C
FBMA-10-100505-121T
FBMA-10-100505-121T
L2
L2
FBMA-10-100505-121T
FBMA-10-100505-121T
L3
L3
FBMA-10-100505-121T
FBMA-10-100505-121T
1
C175
C175
2
2.2P_0402_50V8C
2.2P_0402_50V8C
1 2
1 2
1 2
2.2P_0402_50V8C
2.2P_0402_50V8C
C176
C176
CRT_R_L
CRT_G_L
CRT_B_L
1
1
1
2
C177
C177
2.2P_0402_50V8C
2.2P_0402_50V8C
C178
C178
2
2
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
+3VS
C C
2
Q31A
VGA_CRT_DATA<32>
VGA_CRT_CLK<32>
33P_0402_50V8K
33P_0402_50V8K
C180
@C180
@
1
2
1
C181
@C181
@
33P_0402_50V8K
33P_0402_50V8K
2
5
Q31B
Q31B
4
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
Q31A
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
3
470P_0402_50V8J
470P_0402_50V8J
61
R113
R113
C182
@ C182
@
+CRT_VCC
4.7K_0402_5%
4.7K_0402_5%
1 2
1 2
1
1
2
2
R114
R114
4.7K_0402_5%
4.7K_0402_5%
CRT_DDC_DAT
CRT_DDC_CK
C183
@C183
@
470P_0402_50V8J
470P_0402_50V8J
+5VS
+CRT_VCC_R +CRT_VCC
D3
2
3
D3
If=1A
RB491D_SOT23-3
RB491D_SOT23-3
F1
F1
1
1.1A_6V_MINISMDC110F-2
1.1A_6V_MINISMDC110F-2
40mil
21
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C179
1
@C179
@
2
CRT CONNECTOR
B B
VGA_CRT_HSYNC<32>
VGA_CRT_VSYNC<32>
1 2
C184
C184
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+CRT_VCC
1 2
C185
C185
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+CRT_VCC
R115 10K_0402_5%R115 10K_0402_5%
1
5
P
4
OE#
A2Y
G
U4
U4
SN74AHCT1G125GW_SOT353-5
SN74AHCT1G125GW_SOT353-5
3
5
1
P
4
OE#
A2Y
G
U5
U5
SN74AHCT1G125GW_SOT353-5
SN74AHCT1G125GW_SOT353-5
3
12
D_CRT_VSYNC
1 2
L4 10_0402_5%L4 10_0402_5%
1 2
L5 10_0402_5%L5 10_0402_5%
@C186
@
C186
T21@T21
CRT_R_L
@
HSYNCD_CRT_HSYNC
+CRT_VCC
VSYNC
1
1
C187
@C187
@
2
2
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
40mil
CRT_DDC_DAT CRT_G_L
HSYNC CRT_B_L
VSYNC
T22@T22
@
CRT_DDC_CK
JCRT
JCRT
6
11
1 7
12
2 8
13
3 9
14
4
10
16
G
G
15
17
G
G
5
SUYIN_070546HR015M22BZR
SUYIN_070546HR015M22BZR
@
@
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
CRT
CRT
CRT
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
26 58Friday, January 21, 2011
26 58Friday, January 21, 2011
26 58Friday, January 21, 2011
0.1
0.1
0.1
5
D20
@D20
RB751V40_SC76-2
RB751V40_SC76-2
R118
R118
BKOFF#
@
LCD_BL_PWM
12
12
0_0402_5%
0_0402_5%
4.7K_0402_5% @
4.7K_0402_5% @
D19
D19
RB751V40_SC76-2
RB751V40_SC76-2
R120
R120
12
12
R122
R122 10K_0402_5%
10K_0402_5%
D D
C C
INVT_PWM<43>
VGA_BL_PWM<32>
BKOFF#<43>
Dual Channel LVDS
Support 18.4" HD/FHD 16:9
B B
R117 4.7K_0402_5%R117 4.7K_0402_5%
1
12
2
4
12
C188
C188 180P_0402_50V8J
180P_0402_50V8J
BKOFF#_R
+3VS
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
VGA_ENVDD<32>
DMIC_CLK<42> DMIC_DATA<42>
LCD_TXOUT0+<32> LCD_TXOUT0-<32> LCD_TXOUT1+<32> LCD_TXOUT1-<32> LCD_TXOUT2+<32> LCD_TXOUT2-<32>
LCD_TZOUT0+<32> LCD_TZOUT0-<32> LCD_TZOUT1+<32> LCD_TZOUT1-<32> LCD_TZOUT2+<32> LCD_TZOUT2-<32>
+LCD_VDD
Q32A
Q32A
3
12
R119
R119 300_0603_5%
300_0603_5%
61
2
12
0.1U_0402_16V4Z
0.1U_0402_16V4Z
USB20_N10_R USB20_P10_R DMIC_CLK DMIC_DATA
+3VS
12
R121
R121 100K_0402_5%
100K_0402_5%
0.1U_0402_16V7K
0.1U_0402_16V7K
1 2
R123 47K_0402_5%R123 47K_0402_5%
Q32B
Q32B
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
0.01U_0402_25V7K
0.01U_0402_25V7K
W=20mils
JLVDS
JLVDS
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
GMD
GND
ACES_87242-4001-09
ACES_87242-4001-09
@
@
1 3 5 7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
5
R130
R130 100K_0402_5%
100K_0402_5%
+3VS
C195
C195
1 2
3
4
LCD/PANEL BD. Conn.
2
C189
C189
1
2
C190
C190
1
@C193
@
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41
+3VS
G
G
2
C193
LCD_BL_PWM
BKOFF#_R
S
S
Q7
Q7 AO3413_SOT23
AO3413_SOT23
D
D
1 3
W=120mils
1
2
W=120mils
2
Vds=-20V Id=-3A Rds=130m ohm Vgs=-4.5 Vth=-1
+LCD_VDD
1
C194
C194
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
LCD_TXCLK+ <32>
LCD_TXCLK- <32>
LCD_TZCLK- <32>
LCD_TZCLK+ <32>
LCD_EDID_CLK <32>
LCD_EDID_DATA <32>
+LCD_VDD
C198
C198
68P_0402_50V8J
68P_0402_50V8J
Close to JLVDS
+LCD_INV
W=60mils
1
2
L6
L6
1
C199
C199
0.1U_0402_25V4K
0.1U_0402_25V4K
2
1
2
1
C191
C191
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
C192
C192
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
@
@
2
C306
C306
1U_0603_10V6K
1U_0603_10V6K
B+
12
1
C200
@C200
@
680P_0402_50V7K
680P_0402_50V7K
2
1
1
12
2
C197
C197
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3VS
R127
R127
100K_0402_5%
100K_0402_5%
Rated Current MAX:3000mA
USB20_P10_R
R137
R137
USB20_P10<33>
USB20_N10<33>
A A
1 2
1
1
L7
@L7
@
4
4
WCM-2012-121T_0805
WCM-2012-121T_0805
1 2
0_0402_5%
0_0402_5%
2
3
R142
R142
0_0402_5%
0_0402_5%
2
3
USB20_N10_R
D17
DMIC_DATA USB20_P10_R
+3VS
DMIC_CLK
D17
6
I/O4
I/O2
5
VDD
GND
4
I/O3
AZC099-04S.R7G_SOT23-6
AZC099-04S.R7G_SOT23-6
@
@
I/O1
3
2
USB20_N10_R
1
ESD
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
LVDS
LVDS
LVDS
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
27 58Friday, January 21, 2011
27 58Friday, January 21, 2011
27 58Friday, January 21, 2011
0.1
0.1
0.1
5
4
3
2
1
D D
+5VS_HDMI
40mil
1.1A_6V_MINISMDC110F-2
1.1A_6V_MINISMDC110F-2 F2
D5RB161M-20_SOD123-2 D5RB161M-20_SOD123-2
2 1
+5VS +HDMI_5V_OUT
C C
VGA_HDMI_CLK-<15>
VGA_HDMI_TX0-<15> VGA_HDMI_TX1-<15> VGA_HDMI_TX2-<15>
VGA_HDMI_CLK+<15>
VGA_HDMI_TX0+<15> VGA_HDMI_TX1+<15> VGA_HDMI_TX2+<15>
B B
+5VS
+HDMI_5V_OUT
D12
HDMI_R_CK-
A A
HDMI_R_CK+
HDMI_R_D0-
HDMI_R_D0+
D12
1
1
1
2
2
2
4
4
4
5
3
3
3
8
8
L15ESDL5V0NA-4 SLP2510P8
L15ESDL5V0NA-4 SLP2510P8
@
@
5
VGA_HDMI_CLK<15>
VGA_HDMI_DATA<15>
VGA_HDMI_CLK­VGA_HDMI_TX0­VGA_HDMI_TX1­VGA_HDMI_TX2-
VGA_HDMI_CLK+ VGA_HDMI_TX0+ VGA_HDMI_TX1+ VGA_HDMI_TX2+ VGA_DVI_TXD2+
HDMI_HPD_C HDMI_SDATA
HDMI_R_CK-
10
10
9
HDMI_R_CK+
9
9
8
HDMI_R_D0-
7
7
7
HDMI_R_D0+
65
65
6
CV251 0.1U_0402_16V7KCV251 0.1U_0402_16V7K
1 2
CV253 0.1U_0402_16V7KCV253 0.1U_0402_16V7K
1 2
CV255 0.1U_0402_16V7KCV255 0.1U_0402_16V7K
1 2
CV257 0.1U_0402_16V7KCV257 0.1U_0402_16V7K
1 2
D16
D16
6
I/O4
I/O2
5
VDD
GND
4
I/O3
AZC099-04S.R7G_SOT23-6
AZC099-04S.R7G_SOT23-6
@
@
I/O1
For ESD request.
2 1
3 1
Q10
Q10
BSH111_SOT23-3
BSH111_SOT23-3
3
2
HDMI_SCLK
1
HDMI_R_D1-
HDMI_R_D1+
HDMI_R_D2-
HDMI_R_D2+
F2
1
C201
C201
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
+3VS_DGPU
2
3 1
SGD
SGD
2
Q9
Q9 BSH111_SOT23-3
BSH111_SOT23-3
SGD
SGD
CV250 0.1U_0402_16V7KCV250 0.1U_0402_16V7K
CV252 0.1U_0402_16V7KCV252 0.1U_0402_16V7K
CV254 0.1U_0402_16V7KCV254 0.1U_0402_16V7K
CV256 0.1U_0402_16V7KCV256 0.1U_0402_16V7K
D13
D13
1
1
1
2
2
2
4
4
4
5
3
3
3
8
8
L15ESDL5V0NA-4 SLP2510P8
L15ESDL5V0NA-4 SLP2510P8
@
@
4
12
R150
R150
4.7K_0402_5%
4.7K_0402_5%
1 2
1 2
1 2
1 2
10
10
9
9
9
8
7
7
7
65
65
6
For ESD request.
+HDMI_5V_OUT
12
R151
R151
4.7K_0402_5%
4.7K_0402_5%
HDMI_SCLK
HDMI_SDATA
HDMI_R_D1-
HDMI_R_D1+
HDMI_R_D2-
HDMI_R_D2+
VGA_DVI_TXC­VGA_DVI_TXD0­VGA_DVI_TXD1­VGA_DVI_TXD2-
VGA_DVI_TXC+ VGA_DVI_TXD0+ VGA_DVI_TXD1+
NV review, request for LC filter at HPD at 12/17.
L88
R979
R979
10K_0402_5%
10K_0402_5%
HDMI_HPD<14>
12
R980
R980
100K_0402_5%
100K_0402_5%
1
2
3
1 2
D34
D34 BAV99_SOT23-3
BAV99_SOT23-3
+3VS_DGPU
L88
BLM18PG181SN1D_0603
BLM18PG181SN1D_0603
12
S
S
2N7002E-T1-GE3_SOT23-3
2N7002E-T1-GE3_SOT23-3
G
G
2
13
D
D
HDMI_HPD_C
Q65
Q65
HDMI Connector
HDMI_HPD_C
+HDMI_5V_OUT
HDMI_SDATA HDMI_SCLK
VGA_DVI_TXC+
VGA_DVI_TXC-
VGA_DVI_TXD0+
VGA_DVI_TXD0-
VGA_DVI_TXD1+
VGA_DVI_TXD1-
VGA_DVI_TXD2+
VGA_DVI_TXD2-
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
1 2
0_0402_5%@
0_0402_5%@
L8
L8
1
1
4
4
WCM-2012-900T
WCM-2012-900T
1 2
0_0402_5%@
0_0402_5%@
1 2
0_0402_5%
0_0402_5%
@
@
L9
L9
1
1
4
4
WCM-2012-900T
WCM-2012-900T
1 2
0_0402_5%@
0_0402_5%@
1 2
0_0402_5%@
0_0402_5%@
L10
L10
1
1
4
4
WCM-2012-900T
WCM-2012-900T
1 2
0_0402_5%@
0_0402_5%@
1 2
0_0402_5%@
0_0402_5%@
L11
L11
1
1
4
4
WCM-2012-900T
WCM-2012-900T
1 2
0_0402_5%@
0_0402_5%@
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
HDMI_R_CK+
R152
R152
2
2
3
3
HDMI_R_CK-
R153
R153
HDMI_R_D0+
R154
R154
2
2
3
3
HDMI_R_D0-
R156
R156
HDMI_R_D1+
R159
R159
2
2
3
3
HDMI_R_D1-
R165
R165
HDMI_R_D2+
R166
R166
2
2
3
3
HDMI_R_D2-
R168
R168
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
HDMI_R_CK-
HDMI_R_CK+
HDMI_R_D0-
HDMI_R_D0+
HDMI_R_D1-
HDMI_R_D1+
HDMI_R_D2-
HDMI_R_D2+
HDMI_R_CK+
HDMI_R_CK-
HDMI_R_D1-
HDMI_R_D1+
HDMI_R_D0-
HDMI_R_D0+
HDMI_R_D2+
HDMI_R_D2-
+5VS
DGPU_HPD_INT# <34>
JHDMI
JHDMI
19
HP_DET
18
+5V
17
DDC/CEC_GND
16
SDA
15
SCL
14
Reserved
13
CEC
12
CK-
11
CK_shield
10
CK+
9
D0-
8
D0_shield
7
D0+
6
D1-
5
D1_shield
4
D1+
3
D2-
2
D2_shield
1
D2+
LOTES_ABA-HDM-022-K01
LOTES_ABA-HDM-022-K01
@
@
1 2
R155 499_0402_1%R155 499_0402_1%
1 2
R157 499_0402_1%R157 499_0402_1%
1 2
R158 499_0402_1%R158 499_0402_1%
1 2
R160 499_0402_1%R160 499_0402_1%
1 2
R161 499_0402_1%R161 499_0402_1%
1 2
R162 499_0402_1%R162 499_0402_1%
1 2
R163 499_0402_1%R163 499_0402_1%
1 2
R164 499_0402_1%R164 499_0402_1%
1 2
R167 100K_0402_5%R167 100K_0402_5%
1
C203
C203
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
G
G
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
20
GND
21
GND
22
GND
23
GND
13
D
D
Q11
Q11
2N7002_SOT23-3
2N7002_SOT23-3
S
S
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
HDMI Connector
HDMI Connector
HDMI Connector
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
0.1
0.1
0.1
of
28 58Friday, January 21, 2011
28 58Friday, January 21, 2011
28 58Friday, January 21, 2011
5
CMOS Setting, near DDR Door
R169
+RTCVCC
D D
R169 20K_0402_5%
20K_0402_5%
iME Setting.
R173
R173 20K_0402_5%
20K_0402_5%
1 2
1 2
PCH_RTCRST#
PCH_SRTCRST#
SHORT PADS
SHORT PADS
C206
C206
1U_0402_6.3V4Z
1U_0402_6.3V4Z
SHORT PADS
SHORT PADS
C205
C205
1U_0402_6.3V4Z
1U_0402_6.3V4Z
JCMOS
1 2
1 2
JME
1 2
1 2
@JCMOS
@
@JME
@
Integrated SUS 1.05V VRM Enable
PCH_INTVRMEN
+RTCVCC
R175
R175
R176
R176
+3VS
R412 1K_0402_5%@R412 1K_0402_5%@
PCH_SPKR
C C
+3VS
R178 1K_0402_5%@R178 1K_0402_5%@
ITPM Enabled
SPI_MOSI
HDA_SYNC
This signal has a weak internal pull down. H=>On Die PLL is supplied by 1.5V
*
L=>On Die PLL is supplied by 1.8V
+3VALW_PCH
B B
AZ_SYNC_HD<42>
0604 CHANG AZ_SYNC AND AZ_SDOUT TO FIT INTEL SPEC
A A
High - Enable Internal VRs (must be always pulled high)
1 2
1M_0402_5%
1M_0402_5%
1 2
330K_0402_5%
330K_0402_5%
1 2
High = Enable ( No Reboot ) Low = Disabled (Default)
1 2
Internal: Pull down 20k
High = Enabled Low = Disabled (Default)
BSS138_NL_SOT23-3
BSS138_NL_SOT23-3
R188
R188 33_0402_5%
33_0402_5%
AZ_SYNC_R
1 2
R193
R193 1M_0402_5%
1M_0402_5%
+3VALW_PCH +3VALW_PCH +3VALW_PCH
12
12
5
SM_INTRUDER#
PCH_INTVRMEN
PCH_SPKR
*
PCH_SPI_MOSI
*
HDA_SDO
This signal has a weak internal pull down.
This signal can't PU
AZ_SYNC
12
R186 1K_0402_5%R186 1K_0402_5%
R198
R198 200_0402_5%
200_0402_5%
R201
R201 100_0402_1%
100_0402_1%
+3VS
G
G
2
Q12
Q12
13
D
S
D
S
1 2
12
R194
@R194
@
0_0402_5%
0_0402_5%
PCH_JTAG_TMS PCH_JTAG_TDO PCH_JTAG_TDI
1 2
R205 51_0402_1%R205 51_0402_1%
12
R199
R199 200_0402_5%
200_0402_5%
12
R202
R202 100_0402_1%
100_0402_1%
PCH_JTAG_TCK
+3VALW_PCH
AZ_SDOUT_HD<42>
AZ_SDO<43>
200_0402_5%
200_0402_5% R200
R200
1 2
100_0402_1%
100_0402_1% R203
R203
1 2
4
R187
@R187
@
1K_0402_5%
1K_0402_5%
1 2
33_0402_5%
33_0402_5%
0_0402_5%
0_0402_5%
4
AZ_SDOUT
12
R189
R189
R191
R191
32.768KHZ_12.5PF_Q13MC14610002
32.768KHZ_12.5PF_Q13MC14610002
AZ_BITCLK_HD<42>
AZ_RST_HD#<42>
AZ_SDIN0_HD<42>
12
C204 18P_0402_50V8JC204 18P_0402_50V8J
12
Y1
Y1
2
3
C207 18P_0402_50V8JC207 18P_0402_50V8J
1
OSC
NC
4
OSC
NC
12
R172 33_0402_5%R172 33_0402_5%
1 2
R174 33_0402_5%R174 33_0402_5%
1 2
PCH_JTAG_TCK_R
PCH_JTAG_TMS_R
PCH_JTAG_TDI_R
PCH_JTAG_TDO_R
PCH_SPI_CS0#<41>
PCH_SPI_MOSI<41>
PCH_SPI_MISO<41>
PCH_RSMRST#<31,43> PBTN_OUT#<5,31,43>
+1.05VS_VCCP
+3VS
XDP_DBRESET#<5,31>
3
UPCHA
PCH_RTCX1
PCH_RTCX2
12
PCH_RTCRST#
10M_0402_5%
10M_0402_5%
12
12
12
12
R195
R195 0_0402_5%
0_0402_5%
1 2
1 2
Issued Date
Issued Date
Issued Date
PCH_SRTCRST#
SM_INTRUDER#
PCH_INTVRMEN
AZ_BITCLK
AZ_SYNC
PCH_SPKR
AZ_RST#
AZ_SDIN0_HD
AZ_SDOUT
@
@
12
@
@
@
@
3
PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_MOSI
PCH_SPI_MISO
XDP_PCH_RSMRST# XDP_PCH_HOOK1
XDP_DBRESET#
PCH_JTAG_TDO_R
PCH_JTAG_TDI_R PCH_JTAG_TMS_R
PCH_JTAG_TCK_R
R170
R170
R177 0_0402_5%R177 0_0402_5%
R179 0_0402_5%R179 0_0402_5%
R180 0_0402_5%R180 0_0402_5%
R182 0_0402_5%R182 0_0402_5%
PCH_SPI_CLK<41>
R196 0_0402_5%
R196 0_0402_5%
R197 0_0402_5%
R197 0_0402_5%
Security Classification
Security Classification
Security Classification
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
UPCHA
A20
RTCX1
C20
RTCX2
D20
RTCRST#
G22
SRTCRST#
K22
INTRUDER#
C17
INTVRMEN
N34
HDA_BCLK
L34
HDA_SYNC
T10
SPKR
K34
HDA_RST#
E34
HDA_SDIN0
G34
HDA_SDIN1
C34
HDA_SDIN2
A34
HDA_SDIN3
A36
HDA_SDO
C36
HDA_DOCK_EN# / GPIO33
N32
HDA_DOCK_RST# / GPIO13
J3
JTAG_TCK
H7
JTAG_TMS
K5
JTAG_TDI
H1
JTAG_TDO
T3
SPI_CLK
Y14
SPI_CS0#
T1
SPI_CS1#
V4
SPI_MOSI
U3
SPI_MISO
COUGARPOINT_FCBGA989~D
COUGARPOINT_FCBGA989~D
HM65@
HM65@
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
RTCIHDA
RTCIHDA
JTAG
JTAG
SPI
SPI
JXDP2
@ JXDP2
@
1
1
2
2
3
3
4
4
5
5
6
XDP Connector
6
7
7
8
8
9
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
27
25
G1
28
26
G2
ACES_87152-26051
ACES_87152-26051
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3
LPC
LPC
FWH4 / LFRAME#
LDRQ0#
LDRQ1# / GPIO23
SERIRQ
SATA0RXN SATA0RXP SATA0TXN SATA0TXP
SATA1RXN
SATA 6G
SATA 6G
SATA1RXP SATA1TXN SATA1TXP
SATA2RXN SATA2RXP SATA2TXN SATA2TXP
SATA3RXN SATA3RXP SATA3TXN SATA3TXP
SATA4RXN SATA4RXP SATA4TXN
SATA
SATA
SATA4TXP
SATA5RXN SATA5RXP SATA5TXN SATA5TXP
SATAICOMPO
SATAICOMPI
SATA3RCOMPO
SATA3COMPI
SATA3RBIAS
SATALED#
SATA0GP / GPIO21
SATA1GP / GPIO19
2
C38 A38 B37 C37
D36
E36 K36
V5
AM3 AM1 AP7 AP5
AM10 AM8 AP11 AP10
AD7 AD5 AH5 AH4
AB8 AB10 AF3 AF1
Y7 Y5 AD3 AD1
Y3 Y1 AB3 AB1
Y11
Y10
AB12
AB13
AH1
P3
V14
P1
SATAICOMP
SATA3_COMP
1 2
R184 10K_0402_5%R184 10K_0402_5%
R185 10K_0402_5%R185 10K_0402_5%
12
RH9 750_0402_1%RH9 750_0402_1%
R171 10K_0402_5%R171 10K_0402_5%
SATA_PRX_C_DTX_N0 SATA_PRX_C_DTX_P0 SATA_PTX_DRX_N0 SATA_PTX_DRX_P0
SATA_PRX_C_DTX_N1 SATA_PRX_C_DTX_P1 SATA_PTX_DRX_N1 SATA_PTX_DRX_P1
SATA_PRX_C_DTX_N2 SATA_PRX_C_DTX_P2 SATA_PTX_DRX_N2 SATA_PTX_DRX_P2
RBIAS_SATA3
PCH_GPIO21
BBS_BIT0_RBBS_BIT0_R
Place near PCH
W=20mils
C209
C209
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
LPC_AD0 <43> LPC_AD1 <43> LPC_AD2 <43> LPC_AD3 <43>
LPC_FRAME# <43>
+3VS
SERIRQ <43>
NB HDD 3.5"
NB HDD 2.5"
NB ODD
LOTES_AAA-BAT-054-K01
LOTES_AAA-BAT-054-K01
12
R190 10K_0402_5%R190 10K_0402_5%
12
R192 10K_0402_5%@ R192 10K_0402_5%@
JRTC
JRTC
+RTCBATT
@
@
+3VS
R181
R181
37.4_0402_1%
37.4_0402_1%
1 2
RH8
RH8
49.9_0402_1%
49.9_0402_1%
1 2
1 2
12
SATA_PRX_C_DTX_N0 <38> SATA_PRX_C_DTX_P0 <38> SATA_PTX_DRX_N0 <38> SATA_PTX_DRX_P0 <38>
SATA_PRX_C_DTX_N1 <38> SATA_PRX_C_DTX_P1 <38> SATA_PTX_DRX_N1 <38> SATA_PTX_DRX_P1 <38>
SATA_PRX_C_DTX_N2 <38> SATA_PRX_C_DTX_P2 <38> SATA_PTX_DRX_N2 <38> SATA_PTX_DRX_P2 <38>
+1.05VS_VCC_SATA
+1.05VS_SATA3
+3VS
SATA_LED# <39>
+3VS
PCH_GPIO21
W=20mils
+RTCBATT_R
1
+RTCVCC
3
1
2
Title
Title
Title
Cougar Point(1/9)-HDA/SATA/XDP/RTC/SPI
Cougar Point(1/9)-HDA/SATA/XDP/RTC/SPI
Cougar Point(1/9)-HDA/SATA/XDP/RTC/SPI
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
R204
R204
1 2
1K_0402_5%
1K_0402_5%
D6
D6 BAS40-04_SOT23-3
BAS40-04_SOT23-3
2
W=10mils
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
+CHGRTC
1
+RTCBATT
29 58Friday, January 21, 2011
29 58Friday, January 21, 2011
29 58Friday, January 21, 2011
1
+
-
2
0.1
0.1
0.1
of
5
4
3
2
1
UPCHB
UPCHB
PCH_GPIO45
PCH_GPIO46
BG34
PERN1
BJ34
PERP1
AV32
PETN1
AU32
PETP1
BE34
PERN2
BF34
PERP2
BB32
PETN2
AY32
PETP2
BG36
PERN3
BJ36
PERP3
AV34
PETN3
AU34
PETP3
BF36
PERN4
BE36
PERP4
AY34
PETN4
BB34
PETP4
BG37
PERN5
BH37
PERP5
AY36
PETN5
BB36
PETP5
BJ38
PERN6
BG38
PERP6
AU36
PETN6
AV36
PETP6
BG40
PERN7
BJ40
PERP7
AY40
PETN7
BB40
PETP7
BE38
PERN8
BC38
PERP8
AW38
PETN8
AY38
PETP8
Y40
CLKOUT_PCIE0N
Y39
CLKOUT_PCIE0P
J2
PCIECLKRQ0# / GPIO73
AB49
CLKOUT_PCIE1N
AB47
CLKOUT_PCIE1P
M1
PCIECLKRQ1# / GPIO18
AA48
CLKOUT_PCIE2N
AA47
CLKOUT_PCIE2P
V10
PCIECLKRQ2# / GPIO20
Y37
CLKOUT_PCIE3N
Y36
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
Y43
CLKOUT_PCIE4N
Y45
CLKOUT_PCIE4P
L12
PCIECLKRQ4# / GPIO26
V45
CLKOUT_PCIE5N
V46
CLKOUT_PCIE5P
L14
PCIECLKRQ5# / GPIO44
AB42
CLKOUT_PEG_B_N
AB40
CLKOUT_PEG_B_P
E6
PEG_B_CLKRQ# / GPIO56
V40
CLKOUT_PCIE6N
V42
CLKOUT_PCIE6P
T13
PCIECLKRQ6# / GPIO45
V38
CLKOUT_PCIE7N
V37
CLKOUT_PCIE7P
K12
PCIECLKRQ7# / GPIO46
AK14
CLKOUT_BCLK0_N / CLKOUT_PCIE8N
AK13
CLKOUT_BCLK0_P / CLKOUT_PCIE8P
COUGARPOINT_FCBGA989~D
COUGARPOINT_FCBGA989~D
HM65@
HM65@
4
SMBUSController
SMBUSController
SML1ALERT# / PCHHOT# / GPIO74
PCI-E*
PCI-E*
CLOCKS
CLOCKS
CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P
LID_SW_OUT#
SMBCLK
SMBDATA
SML0CLK
SML0DATA
CL_CLK1
CL_DATA1
CL_RST1#
REFCLK14IN
XTAL25_IN
E12
H14
C9
A12
C8
G12
C13
E14
M16
M7
T11
P10
M10
AB37 AB38
AV22 AU22
AM12 AM13
BF18 BE18
BJ30 BG30
G24 E24
AK7 AK5
K45
H45
V47 V49
Y47
K43
F47
H47
K49
3
PCH_SMBCLK
PCH_SMBDATA
DRAMRST_CNTRL_PCH
PCH_SML0CLK
PCH_SML0DATA
PCH_GPIO74
PCH_SML1CLK
PCH_SML1DATA
PCH_GPIO47
CLK_CPU_DMI# CLK_CPU_DMI
CLK_CPU_DPLL# CLK_CPU_DPLL
PCH_CLK_DMI# PCH_CLK_DMI
CLKIN_DMI2# CLKIN_DMI2
CLK_DOT# CLK_DOT
CLK_SATA# CLK_SATA
CLK_14M_PCH
CLK_PCILOOP
XTAL25_IN XTAL25_OUT
XCLK_RCOMP
CLK_FLEX0
CLK_FLEX1
CLK_FLEX2
CLK_FLEX3
R237 90.9_0402_1%R237 90.9_0402_1%
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
SMBALERT# / GPIO11
SML0ALERT# / GPIO60
SML1CLK / GPIO58
SML1DATA / GPIO75
Link
Link
PEG_A_CLKRQ# / GPIO47
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_DMI2_N CLKIN_DMI2_P
CLKIN_DOT_96N CLKIN_DOT_96P
CLKIN_SATA_N / CKSSCD_N
CLKIN_SATA_P / CKSSCD_P
CLKIN_PCILOOPBACK
XTAL25_OUT
XCLK_RCOMP
CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67
FLEX CLOCKS
FLEX CLOCKS
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1 2
LID_SW_OUT# <43>
DRAMRST_CNTRL_PCH <7>
CLK_CPU_DMI# <5> CLK_CPU_DMI <5>
T23PAD@ T23PAD@
@
T24PAD@T24PAD
CLK_PCILOOP <33>
+1.05VS_VCCDIFFCLKN
T25PAD@ T25PAD@
T66PAD@ T66PAD@
T67PAD@ T67PAD@
T68PAD@ T68PAD@
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
+3VS
LID_SW_OUT#
DRAMRST_CNTRL_PCH
PCH_GPIO74
PCH_GPIO47
PCH_SML0CLK
PCH_SML0DATA
PCH_SMBCLK
PCH_SMBDATA
R206 10K_0402_5%R206 10K_0402_5%
1 2
R207 1K_0402_5%R207 1K_0402_5%
1 2
R208 10K_0402_5%R208 10K_0402_5%
1 2
R213 10K_0402_5%R213 10K_0402_5%
1 2
R209 10K_0402_5%R209 10K_0402_5%
1 2
R210 10K_0402_5%R210 10K_0402_5%
1 2
R211 2.2K_0402_5%R211 2.2K_0402_5%
1 2
R212 2.2K_0402_5%R212 2.2K_0402_5%
1 2
Close to PCH1
PCH_CLK_DMI# PCH_CLK_DMI
CLKIN_DMI2# CLKIN_DMI2
CLK_DOT# CLK_DOT
CLK_SATA# CLK_SATA
CLK_14M_PCH
XTAL25_IN
XTAL25_OUT
C288
C288 18P_0402_50V8J
18P_0402_50V8J
RH10 10K_0402_5%RH10 10K_0402_5%
1 2
RH11 10K_0402_5%RH11 10K_0402_5%
1 2
RH12 10K_0402_5%RH12 10K_0402_5%
1 2
RH13 10K_0402_5%RH13 10K_0402_5%
1 2
RH14 10K_0402_5%RH14 10K_0402_5%
1 2
RH15 10K_0402_5%RH15 10K_0402_5%
1 2
RH16 10K_0402_5%RH16 10K_0402_5%
1 2
RH17 10K_0402_5%RH17 10K_0402_5%
1 2
RH18 10K_0402_5%RH18 10K_0402_5%
1 2
1 2
R255 1M_0402_5%R255 1M_0402_5%
Y3
Y3
25MHZ_20PF_7A25000012
25MHZ_20PF_7A25000012
1
2
FROM CLK GEN FOR: 133/100/96/14.318 MHZ
Q34A
2N7002DW T/R7_SOT-363-6
2N7002DW T/R7_SOT-363-6
PM_SMBCLK<12,13,39>
PM_SMBDATA<12,13,39>
PM_SMBCLK
R2384.7K_0402_5% R2384.7K_0402_5%
R2394.7K_0402_5% R2394.7K_0402_5%
PM_SMBDATA
2N7002DW T/R7_SOT-363-6
2N7002DW T/R7_SOT-363-6
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Q34A
61
12
12
2
+3VS
5
3
4
Q34B
Q34B
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Cougar Point(2/9)-PCI-E/SMBUS/CLK
Cougar Point(2/9)-PCI-E/SMBUS/CLK
Cougar Point(2/9)-PCI-E/SMBUS/CLK
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
LAN
WLAN
D D
USB3.0
C C
B B
CLK_PCIE_VGA#<14>
CLK_PCIE_VGA<14>
CLK_REQ_VGA#<14>
+3VALW_PCH
R245 2.2K_0402_5%R245 2.2K_0402_5%
A A
R246 2.2K_0402_5%R246 2.2K_0402_5%
PCIE_PRX_C_LANTX_N1<40> PCIE_PRX_C_LANTX_P1<40> PCIE_PTX_C_LANRX_N1<40> PCIE_PTX_C_LANRX_P1<40>
PCIE_PRX_WLANTX_N2<39> PCIE_PRX_WLANTX_P2<39> PCIE_PTX_C_WLANRX_N2<39> PCIE_PTX_C_WLANRX_P2<39>
PCIE_PRX_C_USB30TX_N4<45> PCIE_PRX_C_USB30TX_P4<45> PCIE_PTX_C_USB30RX_N4<45> PCIE_PTX_C_USB30RX_P4<45>
+3VS
1 2
+3VALW_PCH
R215 10K_0402_5%R215 10K_0402_5%
1 2
R217 10K_0402_5%R217 10K_0402_5%
1 2
R219 10K_0402_5%R219 10K_0402_5%
1 2
R220 10K_0402_5%R220 10K_0402_5%
1 2
R221 10K_0402_5%R221 10K_0402_5%
PUT ALL REQ# PU AT PCH SIDE
WLAN
USB3.0
LAN
CLK_RES_ITP#<5,10> CLK_RES_ITP<5,10>
CLK_WLAN#<39> CLK_WLAN<39>
CLKREQ_WLAN#<39>
CLK_USB30#<45> CLK_USB30<45>
CLKREQ_USB30#<45>
CLK_LAN#<40> CLK_LAN<40>
CLKREQ_LAN#<40>
CLK_PCIE_VGA# CLK_PCIE_VGA
CLK_REQ_VGA#
2N7002DW T/R7_SOT-363-6
2N7002DW T/R7_SOT-363-6
PCH_SML1CLK
12
12
+3VS
PCH_SML1DATA EC_SMB_DA2
2N7002DW T/R7_SOT-363-6
2N7002DW T/R7_SOT-363-6
5
C210 0.1U_0402_16V7KC210 0.1U_0402_16V7K
1 2
C215 0.1U_0402_16V7KC215 0.1U_0402_16V7K
1 2
C211 0.1U_0402_16V7KC211 0.1U_0402_16V7K
1 2
C212 0.1U_0402_16V7KC212 0.1U_0402_16V7K
1 2
C213 0.1U_0402_16V7KC213 0.1U_0402_16V7K
1 2
C214 0.1U_0402_16V7KC214 0.1U_0402_16V7K
1 2
CLKREQ_WLAN#
CLKREQ_USB30#
PCH_GPIO46
CLKREQ_LAN#
CLK_REQ_VGA#
+3VALW_PCH
R225 0_0402_5%R225 0_0402_5%
1 2
R226 0_0402_5%R226 0_0402_5%
1 2
R227 0_0402_5%R227 0_0402_5%
1 2
R228 0_0402_5%R228 0_0402_5%
1 2
R230 0_0402_5%R230 0_0402_5%
1 2
R231 0_0402_5%R231 0_0402_5%
1 2
+3VALW_PCH
+3VALW_PCH
R234 0_0402_5%R234 0_0402_5%
1 2
R235 0_0402_5%R235 0_0402_5%
1 2
+3VALW_PCH
RH19 0_0402_5%@RH19 0_0402_5%@ RH20 0_0402_5%@RH20 0_0402_5%@
Q33A
Q33A
EC_SMB_CK2
6 1
PU AT EC SIDE, +3VS AND 4.7K
2
5
3
4
Q33B
Q33B
1 2
R223 10K_0402_5%R223 10K_0402_5%
1 2
R232 10K_0402_5%R232 10K_0402_5%
1 2
R233 10K_0402_5%R233 10K_0402_5%
1 2
R240 10K_0402_5%R240 10K_0402_5%
12 12
EC_SMB_CK2 <15,43>
EC_SMB_DA2 <15,43>
PCIE_PTX_LANRX_N1 PCIE_PTX_LANRX_P1
PCIE_PTX_WLANRX_N2 PCIE_PTX_WLANRX_P2
PCIE_PTX_USB30RX_N4 PCIE_PTX_USB30RX_P4
PCH_GPIO73
CLK_R_WLAN# CLK_R_WLAN
CLKREQ_WLAN#
CLK_R_USB30# CLK_R_USB30
CLKREQ_USB30#
CLK_R_LAN# CLK_R_LAN
PCH_GPIO26
PCH_GPIO44
CLK_VGA# CLK_VGA
CLK_BCLK_ITP# CLK_BCLK_ITP
+3VALW_PCH
12
R236 0_0402_5%R236 0_0402_5%
R241 0_0402_5%R241 0_0402_5%
1
1 2
1 2
1
C243
C243 18P_0402_50V8J
18P_0402_50V8J
2
PCH_SMBCLK
PCH_SMBDATA
30 58Friday, January 21, 2011
30 58Friday, January 21, 2011
30 58Friday, January 21, 2011
0.1
0.1
0.1
5
4
3
2
1
D D
DMI_CTX_PRX_N0<6> DMI_CTX_PRX_N1<6> DMI_CTX_PRX_N2<6> DMI_CTX_PRX_N3<6>
DMI_CTX_PRX_P0<6> DMI_CTX_PRX_P1<6> DMI_CTX_PRX_P2<6> DMI_CTX_PRX_P3<6>
DMI_PTX_CRX_N0<6> DMI_PTX_CRX_N1<6> DMI_PTX_CRX_N2<6> DMI_PTX_CRX_N3<6>
DMI_PTX_CRX_P0<6> DMI_PTX_CRX_P1<6> DMI_PTX_CRX_P2<6>
+1.05VS_PCH
SUSACK#<43>
DRAMPWROK<5>
SUSWARN#<43>
PBTN_OUT#<5,29,43>
ACIN<43,48>
DMI_PTX_CRX_P3<6>
1 2
R249 49.9_0402_1%R249 49.9_0402_1%
1 2
RH21 750_0402_1%RH21 750_0402_1%
4mil width and place within 500mil of the PCH
XDP_DBRESET#
R251 0_0402_5%R251 0_0402_5%
PM_PWROK
R257 0_0402_5%R257 0_0402_5%
RB751V-40 SOD-323
RB751V-40 SOD-323
PCH_RSMRST#
R247 10K_0402_5%R247 10K_0402_5%
R248 10K_0402_5%R248 10K_0402_5%
R250 10K_0402_5%R250 10K_0402_5%
C C
B B
+3VALW_PCH
12
12
12
PWROK<5>
VGATE<5,43,55>
PM_PWROK<43>
VGATE
12
C220 180P_0402_50V8J@C220 180P_0402_50V8J@
RH28
RH28
0_0402_5%
0_0402_5%
SUSWARN#_RSUSACK#_R
12
@
@
DRAMPWROK
R261 200_0402_5%R261 200_0402_5%
R262 10K_0402_5%R262 10K_0402_5%
R263 330K_0402_5%R263 330K_0402_5%
R264 10K_0402_5%R264 10K_0402_5%
R265 10K_0402_5%R265 10K_0402_5%
12
12
12
12
12
SUSWARN#_R
PCH_ACIN
RI#
PCH_GPIO72
PM_PWROK
PWROK
+3VS
2
B
1
A
5
P
G
3
U6
U6
Y
NC7SZ08P5X_NL_SC70-5
NC7SZ08P5X_NL_SC70-5
XDP_DBRESET#<5,29>
PWROK
4
PCH_RSMRST#<29,43>
DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3
DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3
DMI_PTX_CRX_N0 DMI_PTX_CRX_N1 DMI_PTX_CRX_N2 DMI_PTX_CRX_N3
DMI_PTX_CRX_P0 DMI_PTX_CRX_P1 DMI_PTX_CRX_P2 DMI_PTX_CRX_P3
DMI_COMP
RBIAS_CPY
SUSACK#_R
@
@
1 2
RH23 0_0402_5%
RH23 0_0402_5%
XDP_DBRESET#_PCH_R
1 2
R253 0_0402_5%R253 0_0402_5%
1 2
DRAMPWROK
PCH_RSMRST#
SUSWARN#_R
1 2
D8
D8
PCH_ACIN
21
PCH_GPIO72
RI#
APWROK
UPCHC
UPCHC
BC24
DMI0RXN
BE20
DMI1RXN
BG18
DMI2RXN
BG20
DMI3RXN
BE24
DMI0RXP
BC20
DMI1RXP
BJ18
DMI2RXP
BJ20
DMI3RXP
AW24
DMI0TXN
AW20
DMI1TXN
BB18
DMI2TXN
AV18
DMI3TXN
AY24
DMI0TXP
AY20
DMI1TXP
AY18
DMI2TXP
AU18
DMI3TXP
BJ24
DMI_ZCOMP
BG25
DMI_IRCOMP
BH21
DMI2RBIAS
C12
SUSACK#
K3
SYS_RESET#
P12
SYS_PWROK
L22
PWROK
L10
APWROK
B13
DRAMPWROK
C21
RSMRST#
K16
SUSWARN# / SUS_PWR_DN_ACK / GPIO30
E20
PWRBTN#
H20
ACPRESENT / GPIO31
E10
BATLOW# / GPIO72
A10
RI#
COUGARPOINT_FCBGA989~D
COUGARPOINT_FCBGA989~D
HM65@
HM65@
FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7
FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5
DMI
DMI
System Power Management
System Power Management
FDI_RXP6
FDI
FDI
FDI_RXP7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWVRMEN
DPWROK
WAKE#
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
SLP_S4#
SLP_S3#
SLP_A#
SLP_SUS#
PMSYNCH
SLP_LAN# / GPIO29
AY14 BE14 BH13 BC12 BJ12 BG10 BG9
BG14 BB14 BF14 BG13 BE12 BG12 BJ10 BH9
AW16
AV12
BC10
AV14
BB10
A18
E22
B9
N3
G8
N14
D10
H4
F4
G10
G16
AP14
K14
FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7
FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWODVREN
PCH_DPWROK
EC_SWI#
PCH_GPIO32
SUS_STAT#
SUSCLK
PM_SLP_S5#
PM_SLP_S4#
PM_SLP_S3#
PM_SLP_SUS#
H_PM_SYNC
PCH_GPIO29
FDI_CTX_PRX_N0
BJ14
FDI_CTX_PRX_N0 <6> FDI_CTX_PRX_N1 <6> FDI_CTX_PRX_N2 <6> FDI_CTX_PRX_N3 <6> FDI_CTX_PRX_N4 <6> FDI_CTX_PRX_N5 <6> FDI_CTX_PRX_N6 <6> FDI_CTX_PRX_N7 <6>
FDI_CTX_PRX_P0 <6> FDI_CTX_PRX_P1 <6> FDI_CTX_PRX_P2 <6> FDI_CTX_PRX_P3 <6> FDI_CTX_PRX_P4 <6> FDI_CTX_PRX_P5 <6> FDI_CTX_PRX_P6 <6> FDI_CTX_PRX_P7 <6>
FDI_INT <6>
FDI_FSYNC0 <6>
FDI_FSYNC1 <6>
FDI_LSYNC0 <6>
FDI_LSYNC1 <6>
RH22
RH22
0_0402_5%
0_0402_5%
PCH_RSMRST#
1 2
EC_SWI# <40,45>
T69 PAD@ T69 PAD@
SUSCLK <43>
PM_SLP_S5# <43>
PM_SLP_S4# <43>
PM_SLP_S3# <43>
PM_SLP_SUS# <43>
H_PM_SYNC <5>
Muxed with SLP_LAN#:PU--> DISABLE
If strap is sampled high, the Integrated Deep S4/S5 Well (DSW) On-Die VR mode is enabled.
DSWODVREN
*
0608 CHANGE PM_CLKRUN# FROM NOT PD OR PU TO PU
PCH_GPIO32
EC_SWI#
PCH_GPIO29
RH25 330K_0402_5%RH25 330K_0402_5%
RH26 330K_0402_5%@RH26 330K_0402_5%@
DSWODVREN - On Die DSW VR Enable H：Enable L：Disable
R256 8.2K_0402_5%R256 8.2K_0402_5%
R259 10K_0402_5%R259 10K_0402_5%
R260 10K_0402_5%@R260 10K_0402_5%@
12
12
1 2
1 2
1 2
+3VALW_PCH
+RTCVCC
+3VS
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Cougar Point(3/9)-DMI/FDI/PWM
Cougar Point(3/9)-DMI/FDI/PWM
Cougar Point(3/9)-DMI/FDI/PWM
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
31 58Friday, January 21, 2011
31 58Friday, January 21, 2011
31 58Friday, January 21, 2011
0.1
0.1
0.1
5
4
3
2
1
D D
ENBKL<43>
+3VS
R363 2.2K_0402_5%R363 2.2K_0402_5%
1 2
R364 2.2K_0402_5%R364 2.2K_0402_5%
1 2
R373 2.2K_0402_5%R373 2.2K_0402_5%
1 2
R376 2.2K_0402_5%R376 2.2K_0402_5%
1 2
C C
+3VS
RH291 2.2K_0402_5%RH291 2.2K_0402_5%
1 2
RH292 2.2K_0402_5%RH292 2.2K_0402_5%
1 2
RH131 150_0402_1%RH131 150_0402_1%
1 2
RH132 150_0402_1%RH132 150_0402_1%
1 2
RH133 150_0402_1%RH133 150_0402_1%
1 2
B B
VGA_CRT_DATA
ENBKL
CTRL_CLK
CTRL_DATA
LCD_EDID_CLK
LCD_EDID_DATA
VGA_CRT_CLK
VGA_CRT_B
VGA_CRT_G
VGA_CRT_R
R362
R362 100K_0402_5%
100K_0402_5%
1 2
Pull high at LVDS conn side.
VGA_ENVDD<27>
VGA_BL_PWM<27>
LCD_EDID_CLK<27> LCD_EDID_DATA<27>
2.37K_0402_1%
2.37K_0402_1%
RH244
RH244
0_0402_5%
0_0402_5%
RH290
RH290
LCD_TXCLK-<27> LCD_TXCLK+<27>
LCD_TXOUT0-<27> LCD_TXOUT1-<27> LCD_TXOUT2-<27>
LCD_TXOUT0+<27> LCD_TXOUT1+<27> LCD_TXOUT2+<27>
LCD_TZCLK-<27> LCD_TZCLK+<27>
LCD_TZOUT0-<27> LCD_TZOUT1-<27> LCD_TZOUT2-<27>
LCD_TZOUT0+<27> LCD_TZOUT1+<27> LCD_TZOUT2+<27>
VGA_CRT_B<26> VGA_CRT_G<26> VGA_CRT_R<26>
VGA_CRT_CLK<26>
VGA_CRT_DATA<26>
VGA_CRT_HSYNC<26> VGA_CRT_VSYNC<26>
ENBKL
CTRL_CLK CTRL_DATA
LVDS_IBG
12
LVD_VREF
12
LCD_TXCLK­LCD_TXCLK+
LCD_TXOUT0­LCD_TXOUT1­LCD_TXOUT2-
LCD_TXOUT0+ LCD_TXOUT1+ LCD_TXOUT2+
LCD_TZCLK-
LCD_TZCLK+
LCD_TZOUT0­LCD_TZOUT1­LCD_TZOUT2-
LCD_TZOUT0+ LCD_TZOUT1+ LCD_TZOUT2+
VGA_CRT_B VGA_CRT_G VGA_CRT_R
VGA_CRT_CLK VGA_CRT_DATA
VGA_CRT_HSYNC VGA_CRT_VSYNC
CRT_IREF
12
R1250 1K_0402_1%R1250 1K_0402_1%
UPCHD
UPCHD
J47
L_BKLTEN
M45
L_VDD_EN
P45
L_BKLTCTL
T40
L_DDC_CLK
K47
L_DDC_DATA
T45
L_CTRL_CLK
P39
L_CTRL_DATA
AF37
LVD_IBG
AF36
LVD_VBG
AE48
LVD_VREFH
AE47
LVD_VREFL
AK39
LVDSA_CLK#
AK40
LVDSA_CLK
AN48
LVDSA_DATA#0
AM47
LVDSA_DATA#1
AK47
LVDSA_DATA#2
AJ48
LVDSA_DATA#3
AN47
LVDSA_DATA0
AM49
LVDSA_DATA1
AK49
LVDSA_DATA2
AJ47
LVDSA_DATA3
AF40
LVDSB_CLK#
AF39
LVDSB_CLK
AH45
LVDSB_DATA#0
AH47
LVDSB_DATA#1
AF49
LVDSB_DATA#2
AF45
LVDSB_DATA#3
AH43
LVDSB_DATA0
AH49
LVDSB_DATA1
AF47
LVDSB_DATA2
AF43
LVDSB_DATA3
N48
CRT_BLUE
P49
CRT_GREEN
T49
CRT_RED
T39
CRT_DDC_CLK
M40
CRT_DDC_DATA
M47
CRT_HSYNC
M49
CRT_VSYNC
T43
DAC_IREF
T42
CRT_IRTN
COUGARPOINT_FCBGA989~D
COUGARPOINT_FCBGA989~D
HM65@
HM65@
SDVO_INTN SDVO_INTP
DDPB_HPD
DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P
DDPC_HPD
DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P
DDPD_HPD
DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P
AP43 AP45
AM42 AM40
AP39 AP40
P38 M39
AT49 AT47 AT40
AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49
P46 P42
AP47 AP49 AT38
AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49
M43 M36
AT45 AT43 BH41
BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42
SDVO_TVCLKINN SDVO_TVCLKINP
SDVO_STALLN SDVO_STALLP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPB_AUXN
DDPB_AUXP
LVDS
LVDS
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN DDPC_AUXP
Digital Display Interface
Digital Display Interface
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN
CRT
CRT
DDPD_AUXP
R266 100K_0402_5%@R266 100K_0402_5%@
1 2
R267 100K_0402_5%
R267 100K_0402_5%
@
@
1 2
100K_0402_5%
@
@
100K_0402_5%
12
R268
R268
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Cougar Point(4/9)-CRT/LVDS/HDMI/DP
Cougar Point(4/9)-CRT/LVDS/HDMI/DP
Cougar Point(4/9)-CRT/LVDS/HDMI/DP
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
32 58Friday, January 21, 2011
32 58Friday, January 21, 2011
32 58Friday, January 21, 2011
0.1
0.1
0.1
5
+3VS
RP1
RP1
18 27 36
8.2K_0804_8P4R_5%
8.2K_0804_8P4R_5%
D D
8.2K_0804_8P4R_5%
8.2K_0804_8P4R_5%
8.2K_0804_8P4R_5%
8.2K_0804_8P4R_5%
R271 8.2K_0402_5%
R271 8.2K_0402_5%
R273 8.2K_0402_5%
R273 8.2K_0402_5%
R399 1K_0402_5%R399 1K_0402_5%
C C
PLT_RST#
B B
CLK_PCILOOP<30> CLK_PCI_EC<43>
45
RP2
RP2
18 27 36 45
RP3
RP3
18 27 36 45
@
@
1 2
@
@
1 2
1 2
PLT_RST#
1 2
R395 0_0402_5%R395 0_0402_5%
+3VS
5
2
P
B
Y
1
A
G
3
U11
@U11
@
NC7SZ08P5X_NL_SC70-5
NC7SZ08P5X_NL_SC70-5
PLT_RST#<5,39>
R275
R275
1 2
100K_0402_5%
100K_0402_5%
4
ODD_DA#<38>
PCH_GPIO4 PCI_PIRQC# PCI_PIRQA# PCH_GPIO2
PCH_GPIO52 PCH_GPIO53 ODD_DA#_R PCH_GPIO51
PCH_GPIO5 PCI_PIRQB# PCI_PIRQD# PCH_GPIO55
DGPU_RST#
DGPU_PWR_EN
DGPU_PWR_EN
PCH_PLT_RST#PCH_PLT_RST#
R396
R396 100K_0402_5%
100K_0402_5%
@
@
1 2
For ESD request
C509
C509
0.1U_0402_16V4Z
0.1U_0402_16V4Z
PLT_RST#
DGPU_RST# PCH_GPIO52
R397
R28522_0402_5% R28522_0402_5% R28622_0402_5% R28622_0402_5%
T65 PAD@T65 PAD T27 PAD@T27 PAD T28 PAD@T28 PAD
DGPU_PWR_EN
PCH_GPIO51 PCH_GPIO53 PCH_GPIO55
PCH_GPIO2 ODD_DA#_R PCH_GPIO4 PCH_GPIO5
T26 PAD@T26 PAD
CLK_PCH
12
CLK_PCI_EC_R
12
CLK_PCI2 CLK_PCI3 CLK_PCI4
DGPU_PWR_EN<14,17>
@R397
@
1 2
0_0402_5%
0_0402_5%
2
@
@
1
@ @ @
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#
@
4
UPCHE
UPCHE
BG26
TP1
BJ26
TP2
BH25
TP3
BJ16
TP4
BG16
TP5
AH38
TP6
AH37
TP7
AK43
TP8
AK45
TP9
C18
TP10
N30
TP11
H3
TP12
AH12
TP13
AM4
TP14
AM5
TP15
Y13
TP16
K24
TP17
L24
TP18
AB46
TP19
AB45
TP20
B21
TP21
M20
TP22
AY16
TP23
BG46
TP24
BE28
TP25
BC30
TP26
BE32
TP27
BJ32
TP28
BC28
TP29
BE30
TP30
BF32
TP31
BG32
TP32
AV26
TP33
BB26
TP34
AU28
TP35
AY30
TP36
AU26
TP37
AY26
TP38
AV28
TP39
AW30
TP40
K40
PIRQA#
K38
PIRQB#
H38
PIRQC#
G38
PIRQD#
C46
REQ1# / GPIO50
C44
REQ2# / GPIO52
E40
REQ3# / GPIO54
D47
GNT1# / GPIO51
E42
GNT2# / GPIO53
F46
GNT3# / GPIO55
G42
PIRQE# / GPIO2
G40
PIRQF# / GPIO3
C42
PIRQG# / GPIO4
D44
PIRQH# / GPIO5
K10
PME#
C6
PLTRST#
H49
CLKOUT_PCI0
H43
CLKOUT_PCI1
J48
CLKOUT_PCI2
K42
CLKOUT_PCI3
H40
CLKOUT_PCI4
COUGARPOINT_FCBGA989~D
COUGARPOINT_FCBGA989~D
HM65@
HM65@
RSVD
RSVD
PCI
PCI
NV_DQ0 / NV_IO0 NV_DQ1 / NV_IO1 NV_DQ2 / NV_IO2 NV_DQ3 / NV_IO3 NV_DQ4 / NV_IO4 NV_DQ5 / NV_IO5 NV_DQ6 / NV_IO6 NV_DQ7 / NV_IO7 NV_DQ8 / NV_IO8 NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NVRAM
NVRAM
NV_DQ11 / NV_IO11 NV_DQ12 / NV_IO12 NV_DQ13 / NV_IO13 NV_DQ14 / NV_IO14 NV_DQ15 / NV_IO15
NV_RCOMP
NV_RE#_WRB0 NV_RE#_WRB1
NV_WE#_CK0 NV_WE#_CK1
USB
USB
USBRBIAS#
OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43
OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14
NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3
NV_DQS0 NV_DQS1
NV_ALE NV_CLE
NV_RB#
USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS
3
AY7 AV7 AU3 BG4
AT10 BC8
AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6
AV5
NV_CLE
AY1
AV10
AT8
AY5 BA2
AT12 BF3
C24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32
C33
B33
A14 K20 B17 C16 L16 A16 D14 C14
R272 1K_0402_5%R272 1K_0402_5%
USB20_N0 USB20_P0 USB20_N1 USB20_P1 USB20_N2 USB20_P2
R287 0_0402_5%
R287 0_0402_5%
USB20_N4_R USB20_P4_R
USB2@
USB2@
1 2
USB2@
USB2@
1 2
R448 0_0402_5%
R448 0_0402_5%
USB port6 and port7 are disabled on HM65
USB20_N10 USB20_P10
USB20_P11
USB20_N13 USB20_P13
USBBIAS
Within 500 mils
USB_OC0# USB_OC1# USB_OC2# PCH_GPIO42 PCH_GPIO43 PCH_GPIO9 PCH_GPIO10 PCH_GPIO14
+1.8VS
12
R270
R270
2.2K_0402_5%
2.2K_0402_5%
12
USB20_N0 <39> USB20_P0 <39> USB20_N1 <39> USB20_P1 <39> USB20_N2 <39> USB20_P2 <39>
USB20_N10 <27> USB20_P10 <27> USB20_N11 <39> USB20_P11 <39>
USB20_N13 <39> USB20_P13 <39>
1 2
R281 22.6_0402_1%R281 22.6_0402_1%
USB_OC0# <39> USB_OC1# <39> USB_OC2# <45>
R-CONN
R-CONN
R-CONN
USB20_N4 <45> USB20_P4 <45>PCH_PLT_RST# <40,43,45>
Int. Camera
Card Reader
BT IN WLAN
H_SNB_IVB# <5>
VGA_PWROK<14,34,46,57>
L-CONN
2
PLT_RST#
R531 0_0402_5%
R531 0_0402_5%
DGPU_RST#
1K_0402_5%
1K_0402_5%
1
12
+3VS
R533
R533 0_0402_5%
0_0402_5%
@
@
R532
R532
1
12
2
SN74AHC1G08DCKR_SC70-5
SN74AHC1G08DCKR_SC70-5
1 2
1 2
C508 0.1U_0402_16V4ZC508 0.1U_0402_16V4Z
5
U20
U20
P
IN1
4
O
R528 0_0402_5%R528 0_0402_5%
IN2
G
3
USB_OC0#
USB_OC1#USB20_N11
PCH_GPIO9
PCH_GPIO14
PCH_GPIO10
USB_OC2#
PCH_GPIO43
PCH_GPIO42
12
R530
R530
100K_0402_5%
100K_0402_5%
1 2
R276 10K_0402_5%R276 10K_0402_5%
1 2
R277 10K_0402_5%R277 10K_0402_5%
1 2
R278 10K_0402_5%R278 10K_0402_5%
1 2
R279 10K_0402_5%R279 10K_0402_5%
1 2
R280 10K_0402_5%R280 10K_0402_5%
1 2
R282 10K_0402_5%R282 10K_0402_5%
1 2
R283 10K_0402_5%R283 10K_0402_5%
1 2
R284 10K_0402_5%R284 10K_0402_5%
12
PLTRST_VGA# <14>
+3VALW_PCH
Boot BIOS Strap bit1 BBS1
Boot BIOS Destination
Bit10
Bit11
0
1
GNT1#/
A A
GPIO51
1
1
0
5
Reserved
0
PCI
1
SPI
0
LPC
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Cougar Point(5/9)-USB/PCI/NAND/STRAP
Cougar Point(5/9)-USB/PCI/NAND/STRAP
Cougar Point(5/9)-USB/PCI/NAND/STRAP
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
33 58Friday, January 21, 2011
33 58Friday, January 21, 2011
33 58Friday, January 21, 2011
0.1
0.1
0.1
5
+3VALW_PCH
R2881K_0402_5% R2881K_0402_5%
R28910K_0402_5% R28910K_0402_5%
R29410K_0402_5% R29410K_0402_5%
R29010K_0402_5% R29010K_0402_5%
1 2
D D
C C
B B
+3VS
R29210K_0402_5% R29210K_0402_5%
R29610K_0402_5% R29610K_0402_5%
R29710K_0402_5% R29710K_0402_5%
R29310K_0402_5% R29310K_0402_5%
1 2
R29810K_0402_5% R29810K_0402_5%
1 2
R30010K_0402_5% R30010K_0402_5%
R30110K_0402_5% R30110K_0402_5%
1 2
R30210K_0402_5% R30210K_0402_5%
R30310K_0402_5% R30310K_0402_5%
1 2
R30510K_0402_5% R30510K_0402_5%
R30610K_0402_5% R30610K_0402_5%
R30710K_0402_5% R30710K_0402_5%
R30810K_0402_5% R30810K_0402_5%
1 2
R30910K_0402_5% R30910K_0402_5%
1 2
R31010K_0402_5% R31010K_0402_5%
@
1 2
R31110K_0402_5%@R31110K_0402_5%
1 2
R31410K_0402_5% R31410K_0402_5%
R31310K_0402_5% R31310K_0402_5%
GPIO28
On-Die PLL Voltage Regulator This signal has a weak internal pull up
H：On-Die voltage regulator enabl e
*
L：On-Die PLL Volt age Regulator d isable
R315 1K_0402_5%@R315 1K_0402_5%@
1 2
GPIO8
Integrated Clock Chip Enable
H ; Disable L ; Enable
*
R316 1K_0402_5%@R316 1K_0402_5%@
1 2
USB30_SMI#
12
PCH_GPIO57
12
EC_SMI#
12
PCH_GPIO12
12
PCH_GPIO28
R29510K_0402_5% R29510K_0402_5%
PCH_GPIO0
12
PCH_GPIO1
12
KB_RST#
12
ODD_EN#
12
PCH_GPIO22
PCH_GPIO34
PCH_GPIO16
12
ODD_DETECT#
DGPU_HPD_INT#
12
PCH_GPIO24
PCH_GPIO38
12
EC_SCI#
12
PCH_GPIO39
12
PCH_GPIO48
PCH_GPIO49
VGA_PWROK
PCH_GPIO27
PCH_GPIO37
12
PCH_GPIO28
EC_SMI#
4
UPCHF
PCH_GPIO0
PCH_GPIO1
DGPU_HPD_INT#<28>
EC_SCI#<43>
EC_SMI#<43>
USB30_SMI#<45>
VGA_PWROK<14,33,46,57>
T70PAD @T70PAD @
ODD_DETECT#<38>
DGPU_HPD_INT#
EC_SCI#
EC_SMI#
PCH_GPIO12
USB30_SMI#
PCH_GPIO16
PCH_GPIO22
PCH_GPIO24
PCH_GPIO27
PCH_GPIO28
PCH_GPIO34
PCH_GPIO35
ODD_DETECT#
PCH_GPIO37
PCH_GPIO38
PCH_GPIO39
PCH_GPIO48
PCH_GPIO49
PCH_GPIO57
UPCHF
T7
BMBUSY# / GPIO0
A42
TACH1 / GPIO1
H36
TACH2 / GPIO6
E38
TACH3 / GPIO7
C10
GPIO8
C4
LAN_PHY_PWR_CTRL / GPIO12
G2
GPIO15
U2
SATA4GP / GPIO16
D40
TACH0 / GPIO17
T5
SCLOCK / GPIO22
E8
GPIO24 / MEM_LED
E16
GPIO27
P8
GPIO28
K1
STP_PCI# / GPIO34
K4
GPIO35
V8
SATA2GP / GPIO36
M5
SATA3GP / GPIO37
N2
SLOAD / GPIO38
M3
SDATAOUT0 / GPIO39
V13
SDATAOUT1 / GPIO48
V3
SATA5GP / GPIO49
D6
GPIO57
A4
VSS_NCTF_1
A44
VSS_NCTF_2
A45
VSS_NCTF_3
A46
VSS_NCTF_4
A5
VSS_NCTF_5
A6
VSS_NCTF_6
B3
VSS_NCTF_7
B47
VSS_NCTF_8
BD1
VSS_NCTF_9
BD49
VSS_NCTF_10
BE1
VSS_NCTF_11
BE49
VSS_NCTF_12
BF1
VSS_NCTF_13
BF49
VSS_NCTF_14
COUGARPOINT_FCBGA989~D
COUGARPOINT_FCBGA989~D
HM65@
HM65@
3
ODD_EN#
A20GATE
PECI
RCIN#
THRMTRIP#
INIT3_3V#
NC_1
NC_2
NC_3
NC_4
NC_5
C40
B41
C41
A40
P4
AU16
P5
AY11
AY10
T14
AH8
AK11
AH10
AK10
P37
BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49
PCH_GPIO69
PCH_GPIO70
PCH_GPIO71
PCH_PECI_R
KB_RST#
H_PWRGOOD
PCH_THRMTRIP#
R299 390_0402_5%R299 390_0402_5%
GPIO
GPIO
NCTF
NCTF
TACH4 / GPIO68
TACH5 / GPIO69
TACH6 / GPIO70
TACH7 / GPIO71
PROCPWRGD
CPU/MISC
CPU/MISC
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32
2
ODD_EN# <38>
T29 PAD@ T29 PAD@
T31 PAD@ T31 PAD@
T30 PAD@ T30 PAD@
@
1 2
RH290_0402_5%@RH290_0402_5%
1 2
+3VS
12
R291
R291 10K_0402_5%
10K_0402_5%
H_PECI <5,43>
KB_RST# <43>
H_PWRGOOD <5>
H_THERMTRIP# <5>
GATEA20 <43>
INIT3_3V
This signal has weak internal PU, can't pull low
Intel schematic review recommand.
1
....
Reserv e
Reserv e for
for I CC
ICC e nable
forfor
ICCICC
5
enable
enablee nable
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Cougar Point(6/9)-CPU/GPIO/MISC
Cougar Point(6/9)-CPU/GPIO/MISC
Cougar Point(6/9)-CPU/GPIO/MISC
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
34 58Friday, January 21, 2011
34 58Friday, January 21, 2011
34 58Friday, January 21, 2011
0.1
0.1
0.1
Reserv eReserve
A A
5
+1.05VS_VCCP +1.05VS_PCH +3VS
D D
+1.05VS_PCH
C C
B B
+1.05VS_PCH
+3VS
+1.05VS_PCH
JP2
@JP2
@
12
C221
10U_0603_6.3V6M
C221
10U_0603_6.3V6M
PAD-OPEN 4x4m
PAD-OPEN 4x4m
R320
R320
0_0805_5%
0_0805_5%
1 2
0_0603_5%
0_0603_5%
1U_0402_6.3V6K
1U_0402_6.3V6K
@R325
@
1
2
R317 0_0603_5%R317 0_0603_5%
This pin can be left as no connect in On-Die VR enabled mode (default).
+1.05VS_VCC_EXP
1U_0402_6.3V6K
1U_0402_6.3V6K
C227
10U_0603_6.3V6M
C227
10U_0603_6.3V6M
1
1
2
2
R323
R323
0_0805_5%
0_0805_5%
1 2
R325
12
+1.05VS_PCH
1
C236
@C236
@
2
1
2
C228
C228
C224
1U_0402_6.3V6K
C224
1U_0402_6.3V6K
1
2
12
T64PAD @T64PAD @
C229
1U_0402_6.3V6K
C229
1U_0402_6.3V6K
1
2
1
C234
C234
0.1U_0402_10V7K
0.1U_0402_10V7K
2
+VCCAFDI_VRM
R327
R327
1 2
0_0805_5%
0_0805_5%
+VCCP_VCCDMI
+1.05VS_PCH +VCCADAC
C222
1U_0402_6.3V6K
C222
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
2
+1.05VS_VCCDPLLEXP
+VCCAPLLEXP
C230
1U_0402_6.3V6K
C230
1U_0402_6.3V6K
1
1
2
2
+3VS_VCCA3GBG
+1.05VS_VCCAPLL_FDI
+1.05VS_VCCDPLL_FDI
4
POWER
2925mA
POWER
VCC CORE
VCC CORE
VCCIO
VCCIO
FDI
FDI
1mA
CRTLVDS
CRTLVDS
1mA
VCCTX_LVDS[1]
VCCTX_LVDS[2]
60mA
VCCTX_LVDS[3]
VCCTX_LVDS[4]
DMI
DMI
20mA
190mA
NAND / SPI HVCMOS
NAND / SPI HVCMOS
20mA
VCCADAC
VSSADAC
VCCALVDS
VSSALVDS
VCC3_3[6]
VCC3_3[7]
VCCVRM[3]
VCCDMI[1]
VCCIO[1]
VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCSPI
UPCHG
UPCHG
1300mA
AA23
VCCCORE[1]
C223
C223
C231
1U_0402_6.3V6K
C231
1U_0402_6.3V6K
AC23
VCCCORE[2]
AD21
VCCCORE[3]
AD23
VCCCORE[4]
AF21
VCCCORE[5]
AF23
VCCCORE[6]
AG21
VCCCORE[7]
AG23
VCCCORE[8]
AG24
VCCCORE[9]
AG26
VCCCORE[10]
AG27
VCCCORE[11]
AG29
VCCCORE[12]
AJ23
VCCCORE[13]
AJ26
VCCCORE[14]
AJ27
VCCCORE[15]
AJ29
VCCCORE[16]
AJ31
VCCCORE[17]
AN19
VCCIO[28]
BJ22
VCCAPLLEXP
AN16
VCCIO[15]
AN17
VCCIO[16]
AN21
VCCIO[17]
AN26
VCCIO[18]
AN27
VCCIO[19]
AP21
VCCIO[20]
AP23
VCCIO[21]
AP24
VCCIO[22]
AP26
VCCIO[23]
AT24
VCCIO[24]
AN33
VCCIO[25]
AN34
VCCIO[26]
BH29
VCC3_3[3]
AP16
VCCVRM[2]
BG6
VCCFDIPLL
AP17
VCCIO[27]
AU20
VCCDMI[2]
COUGARPOINT_FCBGA989~D
COUGARPOINT_FCBGA989~D
HM65@
HM65@
U48
U47
+VCCALVDS
AK36
AK37
AM37
AM38
AP36
AP37
+3VS_VCC3_3_6
V33
V34
+VCCAFDI_VRM
AT16
+VCCP_VCCDMI
AT20
+1.05VS_VCC_DMI_CCI
AB36
AG16
AG17
AJ16
AJ17
+3V_VCCPSPI
V1
3
1
2
+VCCTX_LVDS
1
C296
C296
0.01U_0402_16V7K
0.01U_0402_16V7K
2
1
2
+VCCPNAND
1
2
1
2
0.1U_0402_10V7K
0.1U_0402_10V7K
C287
0.01U_0402_16V7K
C287
0.01U_0402_16V7K
1
2
R318
R318
1 2
0_0805_5%
0_0805_5%
C226
C226
0.1U_0402_10V7K
0.1U_0402_10V7K
+VCCAFDI_VRM
1
C233
C233 1U_0402_6.3V6K
1U_0402_6.3V6K
2
C235
C235
0.1U_0402_10V7K
0.1U_0402_10V7K
R326
R326
0_0805_5%
0_0805_5%
1 2
C237
C237 1U_0402_6.3V6K
1U_0402_6.3V6K
C294
C294
1
C289
C289 10U_0603_6.3V6M
10U_0603_6.3V6M
2
1
C297
C297
0.01U_0402_16V7K
0.01U_0402_16V7K
2
+3VS
R322
R322 0_0805_5%
0_0805_5%
1 2
R324
R324 0_0805_5%
0_0805_5%
1 2
+3VS
L12
L12
MBK1608221YZF_2P
MBK1608221YZF_2P
12
R332
R332 0_0603_5%
0_0603_5%
1 2
0.1UH_MLF1608DR10KT_10%_1608
0.1UH_MLF1608DR10KT_10%_1608
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C295
C295
2
R319
R319 0_0603_5%
0_0603_5%
1 2
+VCCP_VCCDMI
+1.05VS_PCH
+1.8VS
2
+3VS
L21
L21
0.1uH inductor, 200mA
R321
R321 0_0805_5%
0_0805_5%
1 2
1
C232
C232 1U_0402_6.3V6K
1U_0402_6.3V6K
2
+1.8VS
12
+1.5VS
+1.05VS_PCH
PCH Power Rail Table
Voltage Rail
V_PROC_IO
V5REF
V5REF_Sus
Vcc3_3
VccADAC
VccADPLLA
VccADPLLB
VccCore
VccDMI
Voltage
1.05
5
3.3
3.3
1.05
1.05
1.05
1.05
S0 Iccmax Current (A)
0.001
0.001
5
0.001
0.266
0.001
0.08
0.08
1.3
0.042
1.05VccIO 2.925
1.05VccASW 1.01
3.3VccSPI 0.02
3.3VccDSW 0.003
1.8 0.19VccpNAND
3.3VccRTC 6 uA
3.3VccSus3_3
3.3 / 1.5VccSusHDA
0.119
0.01
VccVRM 1.8 / 1.5 0.16
1.05VccCLKDMI
VccSSC 1.05
VccDIFFCLKN 1.05
VccALVDS 3.3
0.02
0.095
0.055
0.001
1
1.8VccTX_LVDS 0.06
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Cougar Point(7/9)-PWR1
Cougar Point(7/9)-PWR1
Cougar Point(7/9)-PWR1
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
0.1
0.1
35 58Friday, January 21, 2011
35 58Friday, January 21, 2011
35 58Friday, January 21, 2011
0.1
5
+3VS
D D
+1.05VS_PCH
C C
+1.05VS_PCH
R344
R344 0_0805_5%
0_0805_5%
1 2
+1.05VS_PCH
B B
A A
+1.05VS_PCH
+1.05VS_PCH
+1.05VS_PCH
R328
@R328
@
0_0805_5%
0_0805_5%
1 2
L13
L13
10UH_LB2012T100MR_20%
10UH_LB2012T100MR_20%
1 2
R335
@R335
@
0_0603_5%
0_0603_5%
+VCCAPLL_CPY
1 2
+VCCA_DPLL_L
10UH_LB2012T100MR_20%
10UH_LB2012T100MR_20%
R348
R348
0_0603_5%
0_0603_5%
12
R350
R350
0_0603_5%
0_0603_5%
12
R352
R352
0_0603_5%
0_0603_5%
12
R354
@R354
@
0_0603_5%
0_0603_5%
12
+3VS_VCC_CLKF33
C238
10U_0603_6.3V6M
C238
10U_0603_6.3V6M
1
2
L14
@L14
@
10UH_LB2012T100MR_20%
10UH_LB2012T100MR_20%
1 2
C245
@ C245
@
10U_0603_6.3V6M
10U_0603_6.3V6M
L15
L15
10UH_LB2012T100MR_20%
10UH_LB2012T100MR_20%
1 2
1 2
L16
L16
+VCCDIFFCLK
1
C264
C264 1U_0402_6.3V6K
1U_0402_6.3V6K
2
+1.05VS_VCCDIFFCLKN
1
C267
C267 1U_0402_6.3V6K
1U_0402_6.3V6K
2
+1.05VS_SSCVCC
1
C269
C269 1U_0402_6.3V6K
1U_0402_6.3V6K
2
+1.05VM_VCCSUS
1
C272
C272 1U_0402_6.3V6K
1U_0402_6.3V6K
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
2
1
+1.05VS_PCH
2
C258
220U_B2_2.5VM_R35+C258
220U_B2_2.5VM_R35
1
1
+
2
2
+1.05VS_VCCP
C239
C239
+1.05VS_VCCA_A_DPL
+1.05VS_PCH
+3VALW_PCH
R338 0_0603_5%R338 0_0603_5%
+1.05VS_PCH
+1.05VS_VCCA_B_DPL
1U_0402_6.3V6K
1U_0402_6.3V6K
C259
C259
R357
R357
0_0603_5%
0_0603_5%
1 2
R341
R341
0_0805_5%
0_0805_5%
1 2
220U_B2_2.5VM_R35+C260
220U_B2_2.5VM_R35
1
+
2
0.1U_0402_10V7K
0.1U_0402_10V7K
+1.05VS_VCCDIFFCLKN
0.1U_0402_10V7K
0.1U_0402_10V7K
C260
4
Have internal VRM
R329
@R329
@
0_0603_5%
0_0603_5%
R378
R378
0_0603_5%
0_0603_5%
1 2
C242
@C242
@
0.1U_0402_10V7K
0.1U_0402_10V7K
12
1 2
C252
1U_0402_6.3V6K
C252
1U_0402_6.3V6K
1
2
C261
1U_0402_6.3V6K
C261
1U_0402_6.3V6K
1
2
1
C266
C266
2
1
C271
C271
2
C274
0.1U_0402_10V7K
C274
0.1U_0402_10V7K
C273
4.7U_0603_6.3V6K
C273
4.7U_0603_6.3V6K
1
1
2
2
12
1
C240
C240
0.1U_0402_10V7K
0.1U_0402_10V7K
2
1
@C247
@
1U_0402_6.3V6K
1U_0402_6.3V6K
2
+1.05VM_VCCASW
C249
22U_0805_6.3V6M
C249
22U_0805_6.3V6M
1
2
C253
1U_0402_6.3V6K
C253
1U_0402_6.3V6K
1
2
+VCCRTCEXT
+VCCAFDI_VRM
+1.05VS_VCCA_A_DPL
+1.05VS_VCCA_B_DPL
+VCCDIFFCLK
+1.05VS_SSCVCC
+VCCSST
+1.05VM_VCCSUS
C275
0.1U_0402_10V7K
C275
0.1U_0402_10V7K
1
2
+VCCACLK
+VCCPDSW
+PCH_VCCDSW
+3VS_VCC_CLKF33
+VCCAPLL_CPY_PCH
+VCCDPLL_CPY
+VCCSUS1
C247
C250
22U_0805_6.3V6M
C250
22U_0805_6.3V6M
1
2
C254
1U_0402_6.3V6K
C254
1U_0402_6.3V6K
1
2
+V_CPU_IO
+RTCVCC
C276
1U_0402_6.3V6K
C276
1U_0402_6.3V6K
0.1U_0402_10V7K
0.1U_0402_10V7K
1
1
2
2
3
2
1
VCC3_3 = 266mA detal waiting for newest spec
VCCDMI = 42mA detal waiting for newest spec
POWER
1010mA
55mA
95mA
1mA
POWER
3mA
Clock and Miscellaneous
Clock and Miscellaneous
80mA
80mA
CPURTC
CPURTC
119mA
PCI/GPIO/LPCMISC
PCI/GPIO/LPCMISC
SATA USB
SATA USB
HDA
HDA
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[6]
1mA
VCCSUS3_3[1]
1mA
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCAPLLSATA
VCCASW[22]
VCCASW[23]
VCCASW[21]
10mA
VCCSUSHDA
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCIO[34]
V5REF_SUS
DCPSUS[4]
V5REF
VCC3_3[1]
VCC3_3[8]
VCC3_3[4]
VCC3_3[2]
VCCIO[5]
VCCIO[12]
VCCIO[13]
VCCIO[6]
VCCVRM[1]
VCCIO[2]
VCCIO[3]
VCCIO[4]
N26
P26
P28
T27
T29
T23
T24
V23
V24
P24
T26
M26
AN23
AN24
P34
N20
N22
P20
P22
AA16
W16
T34
AJ2
AF13
AH13
AH14
AF14
AK1
AF11
AC16
AC17
AD17
T21
V21
T19
P32
+1.05VS_VCCUSBCORE
1
2
1
2
+1.05VS_VCCAUPLL
+PCH_V5REF_SUS
+VCCA_USBSUS
+3V_VCCPSUS
+PCH_V5REF_RUN
+3V_VCCPSUS
+3VS_VCCPCORE
+3VS_VCCPPCI
+VCC3_3_2
+VCCAFDI_VRM
+1.05VS_VCC_SATA
+VCCME_22
+VCCME_23
+VCCME_21
+VCCSUSHDA
1
C279
C279
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
0_0603_5%
0_0603_5%
C241
C241 1U_0402_6.3V6K
1U_0402_6.3V6K
+3V_VCCPUSB
C244
0.1U_0402_10V7K
C244
0.1U_0402_10V7K
+3V_VCCAUBG
1
C246
C246
0.1U_0402_10V7K
0.1U_0402_10V7K
2
C251 1U_0402_6.3V6K
C251 1U_0402_6.3V6K
R347
R347
0_0603_5%
0_0603_5%
1
C2630.1U_0402_10V7K C2630.1U_0402_10V7K
2
+1.05VS_SATA3
+1.05VS_SATA3
+VCCSATAPLL
+VCCAFDI_VRM
+1.05VS_VCC_SATA
R355 0_0603_5%R355 0_0603_5%
R356 0_0603_5%R356 0_0603_5%
R358 0_0603_5%R358 0_0603_5%
R359 0_0603_5%R359 0_0603_5%
UPCHJ
UPCHJ
AD49
VCCACLK
T16
VCCDSW3_3
V12
DCPSUSBYP
T38
VCC3_3[5]
BH23
VCCAPLLDMI2
AL29
VCCIO[14]
AL24
DCPSUS[3]
AA19
VCCASW[1]
AA21
VCCASW[2]
AA24
VCCASW[3]
AA26
VCCASW[4]
AA27
VCCASW[5]
AA29
VCCASW[6]
AA31
VCCASW[7]
AC26
VCCASW[8]
AC27
VCCASW[9]
AC29
VCCASW[10]
AC31
VCCASW[11]
AD29
VCCASW[12]
AD31
VCCASW[13]
W21
VCCASW[14]
W23
VCCASW[15]
W24
VCCASW[16]
W26
VCCASW[17]
W29
VCCASW[18]
W31
VCCASW[19]
W33
VCCASW[20]
N16
DCPRTC
Y49
VCCVRM[4]
BD47
VCCADPLLA
BF47
VCCADPLLB
AF17
VCCIO[7]
AF33
VCCIO[8]
AF34
VCCIO[9]
AG34
VCCIO[11]
AG33
VCCIO[10]
V16
DCPSST
T17
DCPSUS[1]
V19
DCPSUS[2]
BJ8
V_PROC_IO
A22
VCCRTC
C278
0.1U_0402_10V7K
C278
0.1U_0402_10V7K
C277
C277
1
COUGARPOINT_FCBGA989~D
COUGARPOINT_FCBGA989~D
HM65@
HM65@
2
R331
R331
R336
R336 0_0603_5%
0_0603_5%
0_0603_5%
0_0603_5%
0_0603_5%
0_0603_5%
@
@
1 2
+3VS
12
1
C270
C270 1U_0402_6.3V6K
1U_0402_6.3V6K
2
12
12
12
12
+1.05VS_PCH
12
+3VALW_PCH
12
R337
R337
R340
R340
R353
R353
0_0805_5%
0_0805_5%
+3VALW_PCH
12
+1.05VS_PCH
12
1
C255
C255 1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
1
C257
C257
0.1U_0402_10V7K
0.1U_0402_10V7K
2
1
C262
C262
0.1U_0402_10V7K
0.1U_0402_10V7K
2
1
C265
C265 1U_0402_6.3V6K
1U_0402_6.3V6K
2
+1.05VS_PCH
12
+1.05VS_PCH
+3VALW_PCH
R342
R342 0_0603_5%
0_0603_5%
R345
R345 0_0805_5%
0_0805_5%
+3VALW_PCH
12
+3VS
12
R346
R346 0_0603_5%
0_0603_5%
0_0805_5%
0_0805_5%
+3VS
12
+1.05VS_PCH
R349
R349
12
L17
@L17
@
10UH_LB2012T100MR_20%
10UH_LB2012T100MR_20%
1 2
1
C268
@C268
@
10U_0603_6.3V6M
10U_0603_6.3V6M
Place C296 Near AK1 pin
2
+5VALW +5VALW_PCH
2
100_0402_5%
100_0402_5%
100_0402_5%
100_0402_5%
+VCCSATAPLL_R
JUMP_43X39
JUMP_43X39
PJ334
@ PJ334
@
R339
R339
R343
R343
112
12
12
R351
@R351
@
0_0805_5%
0_0805_5%
1
C305
C305
0.1U_0402_10V7K
0.1U_0402_10V7K
2
+3VALW_PCH+5VALW_PCH
21
D9
D9 RB751V-40 SOD-323
RB751V-40 SOD-323
+PCH_V5REF_SUS
1
C248
C248
0.1U_0603_25V7K
0.1U_0603_25V7K
2
+3VS+5VS
21
D10
D10 RB751V-40 SOD-323
RB751V-40 SOD-323
+PCH_V5REF_RUN
1
C256
C256 1U_0603_10V6K
1U_0603_10V6K
2
+1.05VS_PCH
12
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet
Compal Electronics, Inc.
Cougar Point(8/9)-PWR2
Cougar Point(8/9)-PWR2
Cougar Point(8/9)-PWR2
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
0.1
0.1
0.1
of
36 58Friday, January 21, 2011
36 58Friday, January 21, 2011
36 58Friday, January 21, 2011
5
UPCHH
UPCHH
H5
VSS[0]
AA17
VSS[1]
AA2
D D
C C
B B
A A
VSS[2]
AA3
VSS[3]
AA33
VSS[4]
AA34
VSS[5]
AB11
VSS[6]
AB14
VSS[7]
AB39
VSS[8]
AB4
VSS[9]
AB43
VSS[10]
AB5
VSS[11]
AB7
VSS[12]
AC19
VSS[13]
AC2
VSS[14]
AC21
VSS[15]
AC24
VSS[16]
AC33
VSS[17]
AC34
VSS[18]
AC48
VSS[19]
AD10
VSS[20]
AD11
VSS[21]
AD12
VSS[22]
AD13
VSS[23]
AD19
VSS[24]
AD24
VSS[25]
AD26
VSS[26]
AD27
VSS[27]
AD33
VSS[28]
AD34
VSS[29]
AD36
VSS[30]
AD37
VSS[31]
AD38
VSS[32]
AD39
VSS[33]
AD4
VSS[34]
AD40
VSS[35]
AD42
VSS[36]
AD43
VSS[37]
AD45
VSS[38]
AD46
VSS[39]
AD8
VSS[40]
AE2
VSS[41]
AE3
VSS[42]
AF10
VSS[43]
AF12
VSS[44]
AD14
VSS[45]
AD16
VSS[46]
AF16
VSS[47]
AF19
VSS[48]
AF24
VSS[49]
AF26
VSS[50]
AF27
VSS[51]
AF29
VSS[52]
AF31
VSS[53]
AF38
VSS[54]
AF4
VSS[55]
AF42
VSS[56]
AF46
VSS[57]
AF5
VSS[58]
AF7
VSS[59]
AF8
VSS[60]
AG19
VSS[61]
AG2
VSS[62]
AG31
VSS[63]
AG48
VSS[64]
AH11
VSS[65]
AH3
VSS[66]
AH36
VSS[67]
AH39
VSS[68]
AH40
VSS[69]
AH42
VSS[70]
AH46
VSS[71]
AH7
VSS[72]
AJ19
VSS[73]
AJ21
VSS[74]
AJ24
VSS[75]
AJ33
VSS[76]
AJ34
VSS[77]
AK12
VSS[78]
AK3
VSS[79]
COUGARPOINT_FCBGA989~D
COUGARPOINT_FCBGA989~D
HM65@
HM65@
4
VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]
VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158]
AK38 AK4 AK42 AK46 AK8 AL16 AL17 AL19 AL2 AL21 AL23 AL26 AL27 AL31 AL33 AL34 AL48 AM11 AM14 AM36 AM39 AM43 AM45 AM46 AM7 AN2 AN29 AN3 AN31 AP12 AP19 AP28 AP30 AP32 AP38 AP4 AP42 AP46 AP8 AR2 AR48 AT11 AT13 AT18 AT22 AT26 AT28 AT30 AT32 AT34 AT39 AT42 AT46 AT7 AU24 AU30 AV16 AV20 AV24 AV30 AV38 AV4 AV43 AV8 AW14 AW18 AW2 AW22 AW26 AW28 AW32 AW34 AW36 AW40 AW48 AV11 AY12 AY22 AY28
3
AY4 AY42 AY46
AY8
B11
B15
B19
B23
B27
B31
B35
B39
B7
F45 BB12 BB16 BB20 BB22 BB24 BB28 BB30 BB38
BB4 BB46 BC14 BC18
BC2 BC22 BC26 BC32 BC34 BC36 BC40 BC42 BC48 BD46
BD5 BE22 BE26 BE40 BF10 BF12 BF16 BF20 BF22 BF24 BF26 BF28
BD3 BF30 BF38 BF40
BF8 BG17 BG21 BG33 BG44
BG8 BH11 BH15 BH17 BH19
H10 BH27 BH31 BH33 BH35 BH39 BH43
BH7
D3 D12 D16 D18 D22 D24 D26 D30 D32 D34 D38 D42
D8 E18 E26 G18 G20 G26 G28 G36 G48 H12 H18 H22 H24 H26 H30 H32 H34
F3
UPCHI
UPCHI
VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198] VSS[199] VSS[200] VSS[201] VSS[202] VSS[203] VSS[204] VSS[205] VSS[206] VSS[207] VSS[208] VSS[209] VSS[210] VSS[211] VSS[212] VSS[213] VSS[214] VSS[215] VSS[216] VSS[217] VSS[218] VSS[219] VSS[220] VSS[221] VSS[222] VSS[223] VSS[224] VSS[225] VSS[226] VSS[227] VSS[228] VSS[229] VSS[230] VSS[231] VSS[232] VSS[233] VSS[234] VSS[235] VSS[236] VSS[237] VSS[238] VSS[239] VSS[240] VSS[241] VSS[242] VSS[243] VSS[244] VSS[245] VSS[246] VSS[247] VSS[248] VSS[249] VSS[250] VSS[251] VSS[252] VSS[253] VSS[254] VSS[255] VSS[256] VSS[257] VSS[258]
COUGARPOINT_FCBGA989~D
COUGARPOINT_FCBGA989~D
HM65@
HM65@
VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[328] VSS[329] VSS[330] VSS[331] VSS[333] VSS[334] VSS[335] VSS[337] VSS[338] VSS[340] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352]
H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28
2
1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Cougar Point(9/9)-GND
Cougar Point(9/9)-GND
Cougar Point(9/9)-GND
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
37 58Friday, January 21, 2011
37 58Friday, January 21, 2011
37 58Friday, January 21, 2011
0.1
0.1
0.1
5
SATA HDD 2.5" Conn.
+5VS
60mil
Place component's closely HDD CONN.
1
C298
C298 10U_0805_10V4Z
10U_0805_10V4Z
2
D D
C C
HDD
Reserved
24
GND
23
GND
SUYIN_127043HR022M25HZR
SUYIN_127043HR022M25HZR
JHDD2
JHDD2
@
@
GND
GND
GND
GND GND GND
GND
GND
A+
A-
B-
B+
V33 V33 V33
V5 V5 V5
V12 V12 V12
1 2 3 4 5 6 7
8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
1
C299
C299
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
SATA_PTX_C_DRX_P1 SATA_PTX_C_DRX_N1
SATA_PRX_DTX_N1 SATA_PRX_DTX_P1
+5VS
1
C300
C300
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C290 0.01U_0402_25V7KC290 0.01U_0402_25V7K
1 2
C291 0.01U_0402_25V7KC291 0.01U_0402_25V7K
1 2
C292 0.01U_0402_25V7KC292 0.01U_0402_25V7K
1 2
C293 0.01U_0402_25V7KC293 0.01U_0402_25V7K
1 2
1
C301
C301
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
60mil
4
SATA_PTX_DRX_P1 <29> SATA_PTX_DRX_N1 <29>
SATA_PRX_C_DTX_N1 <29>
SATA_PRX_C_DTX_P1 <29>
3
ODD small board conn
SATA_PTX_DRX_P2<29>
SATA_PTX_DRX_N2<29>
SATA_PRX_C_DTX_N2<29>
SATA_PRX_C_DTX_P2<29>
ODD_DETECT#<34>
ODD_DA#<33>
80mil
+5VS_ODD
JODD
JODD
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
GND1
14
14
GND2
E-T_6905-Q14N-00R
E-T_6905-Q14N-00R
@
@
2
+5VS
+VSB
R383
R383
470K_0402_5%
470K_0402_5%
ODD_EN#<34>
15 16
2
G
G
1
2
1 2
ODD_EN
13
D
D
Q16
Q16 SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
S
S
R388
@R388
@
0_0805_5%
0_0805_5%
1 2
6
CS1
1U_0402_6.3V6K
CS1
1U_0402_6.3V6K
2 1
D
D
S
S
45
Q15
Q15 SI3456BDV-T1-E3 1N TSOP6
SI3456BDV-T1-E3 1N TSOP6
G
G
3
R380
1.5M_0402_5%
R380
1.5M_0402_5%
1 2
1
+5VS_ODD
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C304
C304
SATA HDD 3.5" Conn.
+5VS
60mil
Place component's closely HDD CONN.
1
C280
C280 10U_0805_10V4Z
10U_0805_10V4Z
2
1
C281
C281
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C282
C282
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C283
C283
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
+12VS
1
C303
C303 10U_0805_10V4Z
10U_0805_10V4Z
2
80mil
1
C302
C302
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
MAXIM@: MAX4951BECTP+TGH7 (Defult) TI@: SN75LVCP601TJR DEN@: Preemphasis Enable (Defult) NDEN@: Standard SATA putput EQ@: Equalization maximum NEQ@: Equalization normal (Defult)
HDD Repeater
+3VS
DEN@
DEN@
DEN@
DEN@
0_0402_5%
0_0402_5%
R493
0_0402_5%
R493
0_0402_5%
20mil
+3VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.01U_0402_25V7K
0.01U_0402_25V7K
C309
C309
1
2
+HDD_EQ1
C417
C417
2
+HDD_EQ2 +HDD_DEW1 +HDD_DEW2
1
DE1 DE2
1 2
1 2
R494
R494
MAXIM@
MAXIM@
0_0402_5%
0_0402_5%
1 2
MAXIM@
MAXIM@
R496
0_0402_5%
R496
0_0402_5%
R503
0_0402_5%
R503
0_0402_5%
R504
R504
1 2
1 2 NEQ@
NEQ@
0_0402_5%
0_0402_5%
1 2 NEQ@
NEQ@
R495
R495
All close to JHDD1
TI@
TI@
TI@
HDD
JHDD1
B B
A A
JHDD1
1
GND
2
A+
3
A-
4
GND
5
B-
6
B+
7
GND
8
V33
9
V33
10
V33
11
GND
12
GND
13
GND
14
V5
15
V5
16
V5
17
GND
18
Reserved
19
GND
20
V12 GND GND
21
V12
22
V12
@
@
24 23
SUYIN_127043HR022M25HZR
SUYIN_127043HR022M25HZR
SATA_PTX_C_DRX_P0 SATA_PTX_C_DRX_N0
SATA_PRX_DTX_N0 SATA_PRX_DTX_P0
60mil
+5VS
80mil
+12VS
C398 0.01U_0402_25V7KC398 0.01U_0402_25V7K
1 2
C344 0.01U_0402_25V7KC344 0.01U_0402_25V7K
1 2
C339 0.01U_0402_25V7KC339 0.01U_0402_25V7K
1 2
C348 0.01U_0402_25V7KC348 0.01U_0402_25V7K
1 2
PSATA_PTX_DRX_P0_RP PSATA_PTX_DRX_N0_RP
PSATA_PRX_DTX_N0_RP PSATA_PRX_DTX_P0_RP
PSATA_PTX_DRX_P0_RP PSATA_PTX_DRX_N0_RP
PSATA_PRX_DTX_N0_RP PSATA_PRX_DTX_P0_RP
SATA_PRX_C_DTX_N0<29>
SATA_PRX_C_DTX_P0<29>
R505 0_0402_5%SATA@R505 0_0402_5%SATA@
12
R506 0_0402_5%SATA@R506 0_0402_5%SATA@
12
R507 0_0402_5%SATA@R507 0_0402_5%SATA@
12
R508 0_0402_5%SATA@R508 0_0402_5%SATA@
12
0.01U_0402_25V7K
0.01U_0402_25V7K
SATA_PTX_DRX_P0<29>
SATA_PTX_DRX_N0<29>
C418 C391
C389 0.01U_0402_25V7K
C389 0.01U_0402_25V7K
C392
0.01U_0402_25V7K
0.01U_0402_25V7K
SATA_PTX_DRX_P0 <29> SATA_PTX_DRX_N0 <29>
SATA_PRX_C_DTX_N0 <29>
SATA_PRX_C_DTX_P0 <29>
1 2 1 2
1 2 1 2
SATARP@C418
SATARP@ SATARP@C391
SATARP@
0.01U_0402_25V7K
0.01U_0402_25V7K
SATARP@
SATARP@ SATARP@C392
SATARP@
PSATA_PTX_DRX_P0 PSATA_PTX_DRX_N0
PSATA_PRX_DTX_N0 PSATA_PRX_DTX_P0
+HDD_EQ1 +HDD_EQ2
Note: +HDD_DEW1, +HDD_DEW2, +HDD_EQ1, +HDD_EQ2 need to route 10 mils
U25
U25
7
EN
18
CAD
1
AINP
2
AINM
4
BOUTM
5
BOUTP
AOUTP
3
AOUTM
GND
13
GND
17
GND
19
GND
21
EP
MAX4951BECTP+TGH7_TQFN20_4X4~D
MAX4951BECTP+TGH7_TQFN20_4X4~D
MAXIM@
MAXIM@
VCC VCC VCC VCC
BINP BINM
6 10 16 20
9
PA
8
PB
15 14
11 12
+HDD_DEW2
+HDD_DEW1
PSATA_PRX_DTX_P0_RP PSATA_PRX_DTX_N0_RP
DE1 DE2
PSATA_PTX_DRX_P0_RP PSATA_PTX_DRX_N0_RP
NDEN@
NDEN@
0_0402_5%
0_0402_5%
R499
0_0402_5%
R499
0_0402_5%
1 2
1 2
NDEN@
NDEN@
TI@
R334
10K_0402_5%
R334
10K_0402_5%
R361
10K_0402_5%
R361
R500
R500
10K_0402_5%
1 2
1 2
U25
U25
SN75LVCP601RTJR_QFN20_4X4
SN75LVCP601RTJR_QFN20_4X4
TI@
TI@
EQ@
EQ@
0_0402_5%
0_0402_5%
1 2
EQ@
EQ@
R501
0_0402_5%
R501
0_0402_5%
R502
R502
1 2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
SATA-HDD&ODD/B
SATA-HDD&ODD/B
SATA-HDD&ODD/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
0.1
0.1
38 58Friday, January 21, 2011
38 58Friday, January 21, 2011
1
38 58Friday, January 21, 2011
0.1
5
4
3
2
1
USB/B Right USB X 3
D D
+5VALW +5VALW
W=120mils
USB_OC1#<33> USB_OC0#<33>
USB_EN#<43,45>
USB20_N2<33> USB20_P2<33>
USB20_N1<33> USB20_P1<33>
USB20_N0<33> USB20_P0<33>
C C
USB_EN#
USB20_N2 USB20_P2
USB20_N1 USB20_P1
USB20_N0 USB20_P0
ACES_85203-2002
ACES_85203-2002
21
1
21
22
2
22
23
3
23
24
4
24
25
5
25
26
6
26
27
7
27
28
8
28
29
9
29
30
10
30
31
11
31
32
12
32
33
13
33
34
14
34
35
15
35
36
16
36
37
17
37
38
18
38
39
19
39
40
20
40
JUSB
@JUSB
@
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
W=120mils
USB_OC1# USB_OC0#
USB_EN#
USB20_N2 USB20_P2
USB20_N1 USB20_P1
USB20_N0 USB20_P0
Slot 1 Half PCIe Mini Card-WLAN & BT3.0
WLAN/ WiFi
JWLAN
JWLAN
1
1
3
3
5
5
7
7 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152
GND153GND2
BELLW_80003-1121
BELLW_80003-1121
@
@
CLKREQ_WLAN#<30>
PCIE_PRX_WLANTX_N2<30> PCIE_PRX_WLANTX_P2<30>
PCIE_PTX_C_WLANRX_N2<30> PCIE_PTX_C_WLANRX_P2<30>
E51_TXD<43>
E51_RXD<43>
Debug card using
100K_0402_5%
100K_0402_5%
COMBO@
COMBO@
BT_PWRON_R
BT_PWRON<43>
CLK_WLAN#<30> CLK_WLAN<30>
+3VS
12
R367
R367
1 2
RH31 0_0402_5%
RH31 0_0402_5%
R366
Debug@R366
Debug@
0_0402_5%
0_0402_5%
1 2 1 2
R365
Debug@R365
Debug@
0_0402_5%
0_0402_5%
BT_PWRON
BT@
BT@
1 2
RW3 1.1K_0402_1%2_5%
RW3 1.1K_0402_1%2_5%
Support Intel rainbow peak combo module. Defult is BT@, COMBO@ is no stuff.
+1.5VS +3VS
2
2
4
4
6
6
8
8
10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52
54
W=60mils
1 2
RH32 0_0402_5%RH32 0_0402_5%
CM1
CM1
47P_0402_50V8J
47P_0402_50V8J
For SED request For SED request
PLT_RST#
0.1U_0402_16V4Z
0.1U_0402_16V4Z
12
CM2
CM2
WL_OFF# <43>
PLT_RST# <5,33>
PM_SMBCLK <12,13,30> PM_SMBDATA <12,13,30>
USB20_N13 <33> USB20_P13 <33>
1
2
1
CM3
CM3
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
Bluetooth 3.0
+1.5VS+3VS
12
CM4
CM4
47P_0402_50V8J
47P_0402_50V8J
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CM5
CM5
2
1
CM6
CM6
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
B B
Touch pad & LID &
Lid SW
Card Reader & LED small board Connector
1 2
+3VALW
JFUN
JFUN
1
1
TP_CLK<43>
TP_DATA<43>
A A
5
1
1
@
@
C404
100P_0402_50V8J@C404
100P_0402_50V8J
C403
100P_0402_50V8J@C403
100P_0402_50V8J
2
2
USB20_N11<33>
USB20_P11<33>
PWR_ON_LED#<43,44>
BATT_CHG_LOW_LED#<43>
BATT_FULL_LED#<43>
WL_BT_LED#<43>
SATA_LED#<29> NUM_LED#<43> CAPS_LED#<43>
+5VS
+3VS
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
G1
22
G2
ACES_85201-2005N
ACES_85201-2005N
@
@
4
+3VL+5VALW
R400
R400
0_0603_5%
0_0603_5%
1 2
R401
@R401
@
0_0402_5%
0_0402_5%
1
C331
C331
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
3
U10
U10 APX9132HAI-TRG SOT23
APX9132HAI-TRG SOT23
VDD
OUTPUT
GND
1
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
LID_SW# <43>
1
C332
C332
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
USB/B&TP/LED/CR/B&LID&PCIe-WLAN
USB/B&TP/LED/CR/B&LID&PCIe-WLAN
USB/B&TP/LED/CR/B&LID&PCIe-WLAN
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
Friday, January 21, 2011
Friday, January 21, 2011
Friday, January 21, 2011
1
39 58
39 58
39 58
0.1
0.1
0.1
A
B
C
D
E
0.1U_0402_16V7K
0.1U_0402_16V7K
CL1
CL1
PCIE_PRX_C_LANTX_P1<30>
CL23
CL23
PCIE_PRX_C_LANTX_N1<30>
PCIE_PTX_C_LANRX_P1<30> PCIE_PTX_C_LANRX_N1<30>
1
2
+3V_LAN
1 1
Pin14
Pin15
Pin38
27P_0402_50V8J
27P_0402_50V8J
2 2
@
@
1 2
RL4 100K_0402_5%
RL4 100K_0402_5%
RTL8105E
EC_SWI#
RTL8111E
NC
NC 10K ohm PD
1K ohm Pull-high
YL1
YL1
1 2
25MHZ_20PF_7A25000012
25MHZ_20PF_7A25000012
1
CL22
CL22
2
1K_0402_1%
1K_0402_1%
15K_0402_5%
15K_0402_5%
27P_0402_50V8J
27P_0402_50V8J
+3VS
12
RL5
RL5
ISOLATEB
RL6
RL6
NC
LAN_X2LAN_X1
1 2
CL2
CL2
1 2
PCIE_PTX_C_LANRX_P1 PCIE_PTX_C_LANRX_N1
CLKREQ_LAN#<30>
PCH_PLT_RST#<33,43,45>
CLK_LAN<30> CLK_LAN#<30>
EC_SWI#<31,45>
+3V_LAN
0.1U_0402_16V7K
0.1U_0402_16V7K
RL7 10K_0402_5%8111E@RL7 10K_0402_5%8111E@ RL8 1K_0402_5%8111E@RL8 1K_0402_5%8111E@
+LAN_VDDREG
PCIE_PRX_LANTX_P1
PCIE_PRX_LANTX_N1
RL3 0_0402_5%RL3 0_0402_5%
CLK_LAN CLK_LAN#
LAN_X1
LAN_X2
EC_SWI#
ISOLATEB
1 2
ENSWREG
1 2
RL9 2.49K_0402_1%RL9 2.49K_0402_1%
12
UL1
22
HSOP
23
HSON
17
HSIP
18
HSIN
16
CLKREQB
25
PERSTB
19
REFCLK_P
20
REFCLK_N
43
CKXTAL1
44
CKXTAL2
28
LANWAKEB
26
ISOLATEB
14
NC/SMBCLK
15
NC/SMBDATA
38
GPO/SMBALERT
33
ENSWREG
34
VDDREG
35
VDDREG
46
RSET
24
GND
49
PGND
RTL8111E-GR_QFN48_6X6
RTL8111E-GR_QFN48_6X6
+3VALW TO +3V_LAN
@
@
2
AO3413_SOT23
AO3413_SOT23
CL681
CL681
+LAN_IO
+LAN_IO
QL51
QL51
+3VALW
G
G
@
@
S
S
D
D
1 3
1
2
LAN_MDI1+
LAN_MDI1-
LAN_MDI3+
LAN_MDI3-
2
PJ4
PJ4
2
JUMP_43X79
JUMP_43X79
@
@
1
1
1
CL682
CL682 1U_0402_6.3V6K
1U_0402_6.3V6K
2
DL1
DL1
6
I/O4
5
VDD
4
I/O3
AZC099-04S.R7G_SOT23-6
AZC099-04S.R7G_SOT23-6
DL2
DL2
6
I/O4
5
VDD
4
I/O3
AZC099-04S.R7G_SOT23-6
AZC099-04S.R7G_SOT23-6
<BOM Structure>
<BOM Structure>
+3V_LAN
GND
GND
LAN_MDI3­LAN_MDI3+
LAN_MDI2­LAN_MDI2+
LAN_MDI1­LAN_MDI1+
LAN_MDI0­LAN_MDI0+
0.1U_0402_25V4K
0.1U_0402_25V4K
Place CL31 close to LAN chip
LAN_MDI0+
3
I/O2
2
LAN_MDI0-
1
I/O1
LAN_MDI2+
3
I/O2
2
LAN_MDI2-
1
I/O1
B
CL31
CL31
1
2
+3VALW
12
RL147
RL147 100K_0402_5%
100K_0402_5%
@
@
RL432
@RL432
@
WOL_EN#<43>
1 2
47K_0402_5%
47K_0402_5%
Vgs=-4.5V,Id=3A,Rds<97mohm
3 3
2
CL483
CL483
@
@
0.1U_0402_16V7K
0.1U_0402_16V7K
1
2
@
@
CL482
CL482
0.01U_0402_25V7K
0.01U_0402_25V7K
1
4.7U_0805_10V4Z
4.7U_0805_10V4Z
+3V_LAN rising time (10%~90%) need > 1ms and <100ms.
For P/N and footprint Please place them to ISPD page
UL1
UL1
8111E_VL
8111E_VL
8111EVL@
8111EVL@
UL1
UL1
4 4
8105E 10/100M
8105E 10/100M
8105E@
8105E@
UL2
UL2
10/100M transformer
10/100M transformer
8105E@
8105E@
A
8111EVB@UL1
8111EVB@
31
LED3/EEDO
37
LED1/EESK
40
LED0
30
EECS/SCL
32
EEDI/SDA
1
MDIP0
2
MDIN0
4
MDIP1
5
MDIN1
7
NC/MDIP2
8
NC/MDIN2
10
NC/MDIP3
11
NC/MDIN3
13
DVDD10
29
DVDD10
41
DVDD10
27
DVDD33
39
DVDD33
12
AVDD33
42
AVDD33
47
AVDD33
48
AVDD33
21
EVDD10
3
AVDD10
6
AVDD10
9
AVDD10
45
AVDD10
36
REGOUT
UL2
8111E@UL2
8111E@
1
TCT1
2
TD1+
3
TD1-
4
TCT2
5
TD2+ TD2-6MX2-
7
TCT3
8
TD3+
9
TD3-
10
TCT4
11
TD4+
12
TD4-
SUPERWORLD_SWG150401
SUPERWORLD_SWG150401
24
MCT1
23
MX1+
22
MX1-
21
MCT2
20
MX2+
19
18
MCT3
17
MX3+
16
MX3-
15
MCT4
14
MX4+
13
MX4-
Security Classification
Security Classification
Security Classification
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
RL1 10K_0402_5%RL1 10K_0402_5%
12
RL2 10K_0402_5%RL2 10K_0402_5%
12
LAN_MDI0+ LAN_MDI0­LAN_MDI1+ LAN_MDI1­LAN_MDI2+ LAN_MDI2­LAN_MDI3+ LAN_MDI3-
+LAN_VDD10
+3V_LAN
+LAN_EVDD10
+LAN_VDD10
+LAN_REGOUT
60 mils
RJ45_MIDI3-
RJ45_MIDI3+
RJ45_MIDI2-
RJ45_MIDI2+
RJ45_MIDI1-
RJ45_MIDI1+
RJ45_MIDI0-
RJ45_MIDI0+
Issued Date
Issued Date
Issued Date
C
LL1
+LAN_REGOUT
Layout Note: LL1 must be within 200mil to Pin36, CL3,CL4 must be within 200mil to LL1
LL1
1 2
2.2UH +-5% NLC252018T-2R2J-N
2.2UH +-5% NLC252018T-2R2J-N
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
CL3
CL3
2
Close to Pin 21
CL10
CL10
+LAN_EVDD10
1
2
+3V_LAN
+LAN_VDD10
12
LL20_0603_5% LL20_0603_5%
1U_0402_6.3V4Z
1U_0402_6.3V4Z
Using Switch Regulator
+3V_LAN
12
LL30_0603_5% LL30_0603_5%
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
CL24 1000P_0402_50V7K
CL24 1000P_0402_50V7K
8111E@
8111E@
CL25 1000P_0402_50V7K
CL25 1000P_0402_50V7K
8111E@
8111E@
CL26 1000P_0402_50V7KCL26 1000P_0402_50V7K
CL27 1000P_0402_50V7KCL27 1000P_0402_50V7K
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
8111E@
8111E@
12
1 2
RL14 75_0402_1%
RL14 75_0402_1%
8111E@
8111E@
12
1 2
RL15 75_0402_1%
RL15 75_0402_1%
1 2
12
RL16 75_0402_1%RL16 75_0402_1%
12
1 2
RL17 75_0402_1%RL17 75_0402_1%
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
RJ45_GND
CL18
CL18
D
1
2
+3V_LAN
+LAN_VDDREG
RL12
RL12 0_0402_5%
0_0402_5%
ENSWREG
RL13
RL13 0_0402_5%
0_0402_5%
@
@
RJ45_MIDI3-
RJ45_MIDI3+
RJ45_MIDI1-
RJ45_MIDI2-
RJ45_MIDI2+
RJ45_MIDI1+
RJ45_MIDI0-
RJ45_MIDI0+
+LAN_VDD10
2
CL4
CL4
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
CL11
CL11
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
CL19
CL19
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
Close to Pin 27,39,12,47,48,42
CL5,CL6,CL7,CL8,CL9 close to Pin 27,39,42,47,48
Close to Pin 3,6,9,13,29,41,45
CL12,CL13,CL14,CL15 close to Pin 3,13,29,45
LAN Conn.
JLAN
JLAN
12
12
11
11
8
PR4-
7
PR4+
6
PR2-
5
PR3-
4
PR3+
3
PR2+
2
PR1-
1
PR1+
10
10
9
9
SANTA_130452-044
SANTA_130452-044
@
@
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
14
SHLD2
13
SHLD1
1000P_1808_3KV7K
1000P_1808_3KV7K
RJ45_GND LANGND
CL28
CL28
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
PCIe-LAN-RTL8105E/8111E
PCIe-LAN-RTL8105E/8111E
PCIe-LAN-RTL8105E/8111E
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
DL7 AZC199-02SPR7G_SOT23-3
DL7 AZC199-02SPR7G_SOT23-3
1
@
@
223
3
3
223
@
@
1
DL8 AZC199-02SPR7G_SOT23-3
DL8 AZC199-02SPR7G_SOT23-3
1
1 2
1
CL29
CL29
2
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
E
1 2
1 2
1 2
1 2
1 2
1 2
CL210.1U_0402_16V4Z 8111E@CL210.1U_0402_16V4Z 8111E@
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1
CL30
CL30
2
40 58Friday, January 21, 2011
40 58Friday, January 21, 2011
40 58Friday, January 21, 2011
+3V_LAN
CL50.1U_0402_16V4Z CL50.1U_0402_16V4Z
CL60.1U_0402_16V4Z CL60.1U_0402_16V4Z
CL70.1U_0402_16V4Z CL70.1U_0402_16V4Z
CL80.1U_0402_16V4Z CL80.1U_0402_16V4Z
CL90.1U_0402_16V4Z CL90.1U_0402_16V4Z
+LAN_VDD10
CL120.1U_0402_16V4Z CL120.1U_0402_16V4Z
CL130.1U_0402_16V4Z CL130.1U_0402_16V4Z
CL140.1U_0402_16V4Z CL140.1U_0402_16V4Z
CL150.1U_0402_16V4Z CL150.1U_0402_16V4Z
CL160.1U_0402_16V4Z 8111E@CL160.1U_0402_16V4Z 8111E@
CL170.1U_0402_16V4Z 8111E@CL170.1U_0402_16V4Z 8111E@
CL200.1U_0402_16V4Z 8111E@CL200.1U_0402_16V4Z 8111E@
of
0.1
0.1
0.1
5
BIOS Bus switch
SPI ROM For Basic ME ROM size 4MByte
4
3
2
1
D D
C C
B B
1. When Flash EC ROM. KSO2 to Low (Test mode) KSO3 to Low (ISP mode)---------FDA mode EC_ON->Low, BUS_EN#->Low U11 : Y->A0, PCH to BIOS ROM. KSI4,5,6,7 direct to EC_SPI
2. When Flash BIOS ROM. KSO2 to High KSO3 to Low (ISP mode) EC_ON->High, BUS_EN#->High. U11 : Y->A1, KSI4,5,6,7 to BIOS ROM. +3V_SPI from +3VALW Set EC pin KSI4,5,6,7 to HiZ.
+3VALW
+3VS
+3VALW
PCH_SPI_CS0# PCH_SPI_CLK PCH_SPI_MOSI PCH_SPI_MISO
KSI4 KSI5 KSI6 KSI7
FLASH_EN
R1552 0_0402_5%R1552 0_0402_5%
PCH_SPI_CS0#<29>
PCH_SPI_CLK<29>
PCH_SPI_MOSI<29>
PCH_SPI_MISO<29>
KSI4<43,44> KSI5<43,44> KSI6<43,44> KSI7<43,44>
R31 10K_0402_5%R31 10K_0402_5%
12
BUS_EN#<43>
12
3.When normal operation. EC_ON->High , BUS_EN#->Low. U11 : Y->A0, PCH direct to BIOS ROM. +3V_SPI from +3VS.
4. When enter S3,4 EC_ON->High, BUS_EN#->Low. U11 : Y->A1, PCH direct to BIOS ROM. But +3V_SPI from +3VS is no power.
** BUS_EN# only high when test mode. And must make sure it's low when FDA mode. Or HW use 10K pull down to GND.
EC_ON<43,44,49>
NC7SZ08P5X_NL_SC70-5
NC7SZ08P5X_NL_SC70-5
+3V_SPI
EC_ON
U12
U12
1
VDD
4
VDD
9
VDD
19
VDD
24
A0
22
B0
18
C0
17
D0
14
E0
23
A1
21
B1
16
C1
15
D1
13
E1
PI3V512QE_QSOP24
PI3V512QE_QSOP24
SEL
YA YB YC
YD YE
GND GND GND GND
FLASH_EN
FLASH_EN
12
2 5 6
8 11
3 7 10 20
PCH_SPI_CS0#_R
PCH_SPI_CLK_R
PCH_SPI_MOSI_R PCH_SPI_MISO_R
1
C419
C419
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
FLASH
+3VALW
100K_0402_5%
100K_0402_5%
@
@
R439
+3VALW
5
U8
U8
2
P
B
1
A
FLASH_EN
4
Y
G
@
@
3
SYSON<43,45,46,51,58>
FLASH
R439
2
G
G
1 2
Q27
Q27
13
D
D
2N7002_SOT23-3
2N7002_SOT23-3
S
S
@
@
BIOS SPI Flash (4MByte*1)
U59
U59
5
SO
PCH_SPI_CLK_R
PCH_SPI_CS0#_R
A A
5
+3V_SPI
1
2
SI
6
SCLK
1
CS
7
HOLD
3
WP
8
VCC
GND
MX25L3205AZMC-20G_SON8
MX25L3205AZMC-20G_SON8
C405
C405
0.1U_0402_16V4Z
0.1U_0402_16V4Z
P/N: SA00003K800
PCH_SPI_MISO_RPCH_SPI_MOSI_R
2
C361
@C361
4
4
@
6P_0402_25V
6P_0402_25V
R419
@R419
@
12
PCH_SPI_CLK_R
12
10_0402_5%
10_0402_5%
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Bus switch&BIOSROM
Bus switch&BIOSROM
Bus switch&BIOSROM
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
41 58Friday, January 21, 2011
41 58Friday, January 21, 2011
41 58Friday, January 21, 2011
0.1
0.1
0.1
5
RA30_0603_5% RA30_0603_5%
1 2
+3VS
D D
RA20_0603_5% RA20_0603_5%
1 2
+3VS
10U_0805_10V4Z
10U_0805_10V4Z
CA5
CA5
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
+DVDD_IO
1
CA9
CA9
10U_0805_10V4Z
10U_0805_10V4Z
2
+3VS_DVDD
CA6
CA6
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
place close to chip
35 mA
1
2
CA7
CA7
place close to chip
23 24
14
MIC1_LINE1_R_L MIC1_LINE1_R_R
C C
DMIC_CLK<27>
DMIC_DATA DMIC_DATA_CODEC
place close to chip
+3VS
12
@
@
AZ_RST_HD#
1
C196
@ C196
@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
R125
R125
4.7K_0402_5%
4.7K_0402_5%
RA19 20K_0402_1%RA19 20K_0402_1%
1 2 1 2
RA20 39.2K_0402_1%RA20 39.2K_0402_1%
MIC_PLUG# HP_PLUG#
B B
CA14 4.7U_0603_6.3V6KCA14 4.7U_0603_6.3V6K
1 2
CA13 4.7U_0603_6.3V6KCA13 4.7U_0603_6.3V6K
1 2
R1543 0_0402_5%R1543 0_0402_5%
1 2
1 2
R15440_0603_5% R15440_0603_5%
EC_MUTE#<43>
AZ_RST_HD#<29> EAPD <43>
SENSE_A
ESD
DMIC_CLK_CODECDMIC_CLK
AZ_RST_HD# EAPD
1 2
CA32 2.2U_0603_16V6KCA32 2.2U_0603_16V6K
+MIC1_VREFO_L
MIC1_C_L MIC1_C_R
EC_MUTE#
15
21 22
16 17
11
12
13
18
36
35
31
43 42 49
4
+PVDD2
+PVDD1
9
1
DVDD
PVDD139PVDD2
DVDD_IO
LINE1_L LINE1_R
LINE2_L LINE2_R
MIC1_L MIC1_R
MIC2_L MIC2_R
2
GPIO0/DMIC_DATA
3
GPIO1/DMIC_CLK
4
PD#
RESET#
PCBEEP
SENSE A
SENSE B
CBP
CBN
MIC1_VREFO_L
PVSS2 PVSS1 DVSS2
7
DVSS1
ALC269Q-VB5-GR_QFN48_7X7
ALC269Q-VB5-GR_QFN48_7X7
SPK_OUT_L+
SPK_OUT_R+
SPK_OUT_R-
MIC2_VREFO
MIC1_VREFO_R
46
AVDD125AVDD2
SPK_OUT_L-
HP_OUT_L HP_OUT_R
SYNC
BCLK
SDATA_OUT
SDATA_IN
EAPD
SPDIFO
MONO_OUT
LDO_CAP
VREF
JDREF
CPVEE
AVSS1 AVSS2
Sense Pin Impedance
SENSE A
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CA15
CA15
CA20
CA20
38
U7
U7
2
10U_0805_10V4Z
10U_0805_10V4Z
place close to chip
40 41
45 44
32 33
10
6
AZ_SDOUT_HD
5
AZ_SDIN0_HD_R
8
47
48
20
29
30 28
27
19
34
26 37
SPKL+ SPKL-
SPKR+ SPKR-
RA15 75_0402_1%RA15 75_0402_1% RA14 75_0402_1%RA14 75_0402_1%
AZ_SYNC_HD
AZ_BITCLK_HD
+MIC1_VREFO_R
AC97_VREF
AC_JDREF
RA17
RA17
1 2
20K_0402_1%
20K_0402_1%
1 2
CA30
CA30
2.2U_0603_16V6K
2.2U_0603_16V6K
AGNDDGND
39.2K
20K
+AVDD
68 mA
1
1
CA17
CA17
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
AZ_SYNC_HD <29>
AZ_BITCLK_HD <29>DMIC_DATA<27>
AZ_SDOUT_HD <29>
12
RA16 33_0402_5%RA16 33_0402_5%
3
Codec Signals
PORT-I (PIN 32, 33)
PORT-B (PIN 21, 22)
RA8
RA8
12
AZ_SDIN0_HD <29>
0.1U_0402_16V7K
0.1U_0402_16V7K
1
CA31
CA31
2
+5VS
1
2
0_0603_1%
0_0603_1%
HP_L HP_R
@
@
CA29
CA29
10U_0805_10V6K
10U_0805_10V6K
Function
Headphone out
Ext. MIC
1
CA28
CA28
10U_0805_10V6K
10U_0805_10V6K
2
2
+PVDD1
JA1
JA1
JUMP_43X39
JUMP_43X39
@
@
+PVDD2
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CA8
CA8
2
AZ_BITCLK_HD
12
R370
R370 10_0402_5%
10_0402_5%
@
@
1
C310
C310 10P_0402_50V8J
10P_0402_50V8J
2
@
@
SPEAKER CONN
0.1U_0402_16V4Z
0.1U_0402_16V4Z
600 mA
2
2
1
1
1
CA1
CA1
2
10U_0805_10V4Z
10U_0805_10V4Z
place close to chip
10U_0805_10V4Z
10U_0805_10V4Z
SPKL+
SPKL-
SPKR+
SPKR-
DA1
DA1
1
PESD5V0U2BT_SOT23-3
PESD5V0U2BT_SOT23-3
SPK_L1 SPK_L2 SPK_R1 SPK_R2
DA2
DA2
1
PESD5V0U2BT_SOT23-3
PESD5V0U2BT_SOT23-3
1
RA1
RA1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
12
0_0603_1%
0_0603_1%
1
CA2
CA2
2
RA4
RA4
0_0603_1%
0_0603_1%
1
@
@
CA10
CA10
@
@
2
CA3
CA3
0.1U_0402_16V4Z
0.1U_0402_16V4Z
12
CA11
CA11
@
@
1
1
2
2
10U_0805_10V4Z
10U_0805_10V4Z
1
1
2
2
10U_0805_10V4Z
10U_0805_10V4Z
placement near Audio Codec
RA9
RA9
12
0_0603_1%
0_0603_1%
RA12
RA12
0_0603_1%
0_0603_1%
RA13
RA13
0_0603_1%
0_0603_1%
RA18
RA18 0_0603_1%
0_0603_1%
2
3
2
3
12
12
@
@
12
1
CA21
CA21
10U_0805_10V4Z@
10U_0805_10V4Z@
2
1
CA23
CA23
10U_0805_10V4Z@
10U_0805_10V4Z@
2
1
CA25
CA25
10U_0805_10V4Z
10U_0805_10V4Z
2
1
CA27
CA27
10U_0805_10V4Z@
10U_0805_10V4Z@
2
JSPK
@JSPK
@
4
4
3
3
2
2
1
1
ACES_85205-0400
ACES_85205-0400
+5VS
CA4
CA4
+5VS
CA12
CA12
@
@
SPK_L1
2
CA22
CA22 1U_0402_6.3V4Z
1U_0402_6.3V4Z
@
@
1
SPK_L2
SPK_R1
2
CA26
CA26 1U_0402_6.3V4Z
1U_0402_6.3V4Z
@
@
1
SPK_R2
JHP
JHP
1 2 6 3
4
5
SUYIN_010188FR006G109ZL
SUYIN_010188FR006G109ZL
@
@
JMIC
JMIC
1 2 6 3
4
5
SUYIN_010188FR006G109ZL
SUYIN_010188FR006G109ZL
@
@
DA3
DA3
1
PESD5V0U2BT_SOT23-3
PESD5V0U2BT_SOT23-3
@
@
4
GND
GND
GND
GND
GND
GND
GND
GND
HP_PLUG#
2
MIC_PLUG#
3
7
8
HP CONN & MIC CONN
7
8
Security Classification
Security Classification
Security Classification
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Issued Date
Issued Date
Ext.MIC/LINE IN JACK
RA25
RA25
1 2
2.2K_0402_5%
MIC1_LINE1_R_R
MIC1_LINE1_R_L
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
3
RA27
RA27
1 2
1K_0402_5%
1K_0402_5%
RA29
RA29
1 2
1K_0402_5%
1K_0402_5%
Compal Secret Data
Compal Secret Data
Compal Secret Data
2.2K_0402_5%
RA30
RA30
1 2
2.2K_0402_5%
2.2K_0402_5%
Deciphered Date
Deciphered Date
Deciphered Date
MIC1_R
MIC1_L
2
+MIC1_VREFO_R
+MIC1_VREFO_L
Date: Sheet of
Date: Sheet of
Date: Sheet
CA34 0.1U_0603_50V7KCA34 0.1U_0603_50V7K
1 2
CA35 0.1U_0603_50V7KCA35 0.1U_0603_50V7K
1 2
CA36 0.1U_0603_50V7KCA36 0.1U_0603_50V7K
1 2
CA37 0.1U_0603_50V7KCA37 0.1U_0603_50V7K
1 2
1 2
RA28 0_0603_5%RA28 0_0603_5%
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Compal Electronics, Inc.
HD CODEC ALC269
HD CODEC ALC269
HD CODEC ALC269
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
Friday, January 21, 2011
Friday, January 21, 2011
Friday, January 21, 2011
1
of
42 58
42 58
42 58
0.1
0.1
0.1
1
2
1
2
68P_0402_50V8J
68P_0402_50V8J
MIC1_L_L
MIC1_R_LMIC1_R
100P_0402_50V8J
100P_0402_50V8J
HP_L_1
HP_R_1
HP_PLUG#
MIC_PLUG#
HP_L
R451
R451
1 2
0_0603_5%
R452
R452
1 2
SM05T1G_SOT23-3
SM05T1G_SOT23-3
R453
R453
1 2
R454
R454
1 2
SM05T1G_SOT23-3
SM05T1G_SOT23-3
5
0_0603_5%
0_0603_5%
0_0603_5%
D21
@D21
@
0_0603_5%
0_0603_5%
0_0603_5%
0_0603_5%
D25
@D25
@
@
@
@
@
1
2
3
C311
C311
C399
C399
2
68P_0402_50V8J
1
3
1
68P_0402_50V8J
@
@
@
@
1
2
C400
C400
C401
C401
2
100P_0402_50V8J
100P_0402_50V8J
HP_R
MIC1_L
A A
5
4
3
2
1
ID BRD ID3Ra Rb Vab
+3VALW
+3V_EC
R371
R371
12
2
G
G
Q17
Q17
R377
R377 47K_0402_5%
47K_0402_5%
12
ACIN <31,48>
100K
100K
100K
100K
13
D
D
S
S
R01 SR
+3V_EC
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C313
C313
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
D D
LPC_FRAME#<29>
CLK_PCI_EC<33>
PCH_PLT_RST#<33,40,45>
EC_SCI#<34>
+3V_EC
R379 47K_0402_5%R379 47K_0402_5%
C320 0.1U_0402_16V4ZC320 0.1U_0402_16V4Z
C C
ECRST#
12
12
+3V_EC
@
@
1 2
R381 47K_0402_5%
R381 47K_0402_5%
@
@
1 2
R382 47K_0402_5%
R382 47K_0402_5%
to avoid EC entry ENE test mode
1 2
1 2
1 2
1 2
KSI[0..7]
KSO[0..15]
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
EC_SMB_CK1<47,48> EC_SMB_DA1<47,48> EC_SMB_CK2<15,30> EC_SMB_DA2<15,30>
PM_SLP_S3#<31> PM_SLP_S5#<31>
EC_SMI#<34>
BUS_EN#<41>
WL_BT_LED#<39>
PM_SLP_SUS#<31>
SUSWARN#<31>
INVT_PWM<27>
FAN_SPEED1<5>
E51_TXD<39>
E51_RXD<39>
EAPD<42>
NUM_LED#<39>
SUSCLK<31>
R389 0_0402_5%R389 0_0402_5%
KSI[0..7]<41,44>
KSO[0..15]<44>
+3VS
R384 2.2K_0402_5%R384 2.2K_0402_5%
R385 2.2K_0402_5%R385 2.2K_0402_5%
R386 2.2K_0402_5%R386 2.2K_0402_5%
R387 2.2K_0402_5%R387 2.2K_0402_5%
+3V_EC
B B
C314
C314
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
GATEA20<34> KB_RST#<34>
SERIRQ<29>
LPC_AD3<29> LPC_AD2<29> LPC_AD1<29> LPC_AD0<29>
KSO3
KSO2
WL_BT_LED# PM_SLP_SUS# SUSWARN# INVT_PWM FAN_SPEED1
E51_TXD E51_RXD EAPD
1 2
20P_0402_50V8J
20P_0402_50V8J
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C315
C315
2
GATEA20 KB_RST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0
CLK_PCI_EC
PCH_PLT_RST#
ECRST#
EC_SCI#
KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15
EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2
PM_SLP_S3# PM_SLP_S5# EC_SMI# BUS_EN#
NUM_LED#
CRY2
1
C1206
C1206
2
C316
C316
2
1
10
12 13 37 20 38
55 56 57 58 59 60 61 62 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82
77 78 79 80
14 15 16 17 18 19 25 28 29 30 31 32 34 36
122 123
12
R390
R390 100K_0402_5%
100K_0402_5%
2
C318
C317
C317 1000P_0402_50V7K
1000P_0402_50V7K
1 2 3 4 5 7 8
6
C318 1000P_0402_50V7K
1000P_0402_50V7K
1
UE1
UE1
GA20/GPIO00 KBRST#/GPIO01 SERIRQ# LFRAME# LAD3 LAD2 LAD1
LPC & MISC
LPC & MISC
LAD0
PCICLK PCIRST#/GPIO05 ECRST# SCI#/GPIO0E CLKRUN#/GPIO1D
KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24
Int. K/B
Int. K/B
KSO5/GPIO25
Matrix
Matrix
KSO6/GPIO26 KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49
SCL1/GPIO44 SDA1/GPIO45 SCL2/GPIO46 SDA2/GPIO47
PM_SLP_S3#/GPIO04 PM_SLP_S5#/GPIO07 EC_SMI#/GPIO08 LID_SW#/GPIO0A SUSP#/GPIO0B PBTN_OUT#/GPIO0C EC_PME#/GPIO0D EC_THERM#/GPIO11 FAN_SPEED1/FANFB1/GPIO14 FANFB2/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 ON_OFF/GPIO18 PWR_LED#/GPIO19 NUMLED#/GPIO1A
XCLK1 XCLK0
SM Bus
SM Bus
+3V_EC
9
22
33
96
111
125
VCC
VCC
VCC
VCC
VCC
VCC
INVT_PWM/PWM1/GPIO0F
ACOFF/FANPWM2/GPIO13
PWM Output
PWM Output
AD Input
AD Input
DA Output
DA Output
PS2 Interface
PS2 Interface
TP_DATA/PSDAT3/GPIO4F
SPI Device Interface
SPI Device Interface
SPI Flash ROM
SPI Flash ROM
GPIO
GPIO
GPO
GPO
GPIO
GPIO
GPI
GPI
GND
GND
GND
GND
GND
11
24
35
94
113
C312 0.1U_0402_16V4ZC312 0.1U_0402_16V4Z
1 2
67
AVCC
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
AD3/GPIO3B AD4/GPIO42
SELIO2#/AD5/GPIO43
DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F
PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
SDICS#/GPXOA00 SDICLK/GPXOA01
SDIDO/GPXOA02
SDIDI/GPXID0
SPIDI/RD#
SPIDO/WR#
SPICLK/GPIO58
SPICS#
CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
SUSP_LED#/GPIO55
SYSON/GPIO56
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59
EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10 GPXO11
PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3 GPXID4 GPXID5 GPXID6 GPXID7
V18R
AGND
KB930QF A1 LQFP 128P
KB930QF A1 LQFP 128P
69
CPU1.5V_S3_GATE
21 23 26 27
BATT_TEMP
63 64
ADP_I
65
ADAPTER_ID
66
BRDID
75 76
68
EN_DFAN1
70 71 72
EC_MUTE#
83
USB_EN#
84 85
WOL_EN#
86
TP_CLK
87
TP_DATA
88
SUSACK#
97
WL_OFF#
98
AZ_SDO
99
VGATE
109
EC_SI_SPI_SO
119
EC_SO_SPI_SI
120
SPI_CLK
126
SPI_CS#
128
PM_PWROK
73
EC_PECI
74 89
BATT_FULL_LED#
90
CAPS_LED#
91
BATT_CHG_LOW_LED#
92
PWR_ON_LED#
93
SYSON
95
VR_ON
121
PM_SLP_S4#
127
PCH_RSMRST#
100
LID_SW_OUT#
101 102
BT_PWRON
103
H_PROCHOT#_EC
104
BKOFF#
105
ENBKL
106 107
SA_PGOOD
108
ACIN_D
110
EC_ON
112
ON/OFFBTN#
114
LID_SW#
115
SUSP#
116
PBTN_OUT#
117 118
+EC_V18R
124
CPU1.5V_S3_GATE <9>
ACOFF <47>
BATT_TEMP <47>
ADP_I <47,48>
EN_DFAN1 <5>
EC_MUTE# <42>
USB_EN# <39,45>
WOL_EN# <40>
TP_CLK <39>
TP_DATA <39>
SUSACK# <31>
WL_OFF# <39>
AZ_SDO <29>
VGATE <5,31,55>
EC_SI_SPI_SO <44>
EC_SO_SPI_SI <44>
SPI_CLK <44>
SPI_CS# <44>
RE2 43_0402_1%RE2 43_0402_1%
1 2
BATT_FULL_LED# <39>
CAPS_LED# <39>
BATT_CHG_LOW_LED# <39>
PWR_ON_LED# <39,44>
SYSON <41,45,46,51,58>
VR_ON <55>
PM_SLP_S4# <31>
PCH_RSMRST# <29,31>
LID_SW_OUT# <30>
BT_PWRON <39>
BKOFF# <27> ENBKL <32>
SA_PGOOD <54>
EC_ON <41,44,49>
ON/OFFBTN# <44>
LID_SW# <39> SUSP# <9,46,50,52,54,57,58> PBTN_OUT# <5,29,31>
C326
C326
4.7U_0805_10V4Z
4.7U_0805_10V4Z
PM_PWROK <31> H_PECI <5,34>
+3V_EC
1 2
R392 100K_0402_5%R392 100K_0402_5%
ACIN_D
BRDID
VR_HOT#<47,55>
BKOFF#
TP_CLK
TP_DATA
LID_SW#
2 1
RB751V-40 SOD-323
RB751V-40 SOD-323
0
R02 ER
1
R03 PR
2
R10 MP
Ra
R1603 100K_0402_5%R1603 100K_0402_5%
1 2
R1606 0_0402_5%R1606 0_0402_5%
1 2
Rb
1 2
R19 100K_0402_5%
R19 100K_0402_5%
120W@
120W@
1 2
R29 100K_0402_5%
R29 100K_0402_5%
90W@
90W@
VR_HOT#
H_PROCHOT#_EC
R372 10K_0402_5%R372 10K_0402_5%
R374 4.7K_0402_5%R374 4.7K_0402_5%
R375 4.7K_0402_5%R375 4.7K_0402_5%
BATT_TEMP
ACIN_D
PCH_PLT_RST#
D14
D14
ADAPTER_ID
0_0402_5%
0_0402_5%
2N7002_SOT23
2N7002_SOT23
1 2
1 2
1 2
1 2
1 2
C321 100P_0402_50V8JC321 100P_0402_50V8J
1 2
C322 100P_0402_50V8JC322 100P_0402_50V8J
C325 0.1U_0402_16V4ZC325 0.1U_0402_16V4Z
H_PROCHOT# <5>
+3VS
+5VS
+3V_EC
0
8.2K
18K
33K
0V
0.25V
0.5V
0.82V
+3V_EC
R715
R715
0_0805_5% 3VALW@
0_0805_5% 3VALW@
1 2
R714
A A
R714
0_0805_5%
0_0805_5%
1 2
3VL@
3VL@
EC Power : +3VALW(default)
5
4
+3VALW
+3VL
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
Compal Electronics, Inc.
ENE-KB930
ENE-KB930
ENE-KB930
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
Friday, January 21, 2011
Friday, January 21, 2011
Friday, January 21, 2011
1
of
43 58
43 58
43 58
0.1
0.1
0.1
5
SPI Flash (1MByte*1)
+3VALW
20mils
1
C330
C330
0.1U_0402_16V4Z
D D
0.1U_0402_16V4Z
2
SPI_CS#<43>
SPI_CLK<43>
EC_SO_SPI_SI<43>
P/N :SA00003GK00 & SA00003GM10
R406
@R406
@
C333
@C333
@
6P_0402_25V
6P_0402_25V
12
12
10_0402_5%
10_0402_5%
8
3
7
1
6
5
SPI_CLK
MX25L1005AMC-12G SOP 8P
MX25L1005AMC-12G SOP 8P
U9
U9
VCC
W
HOLD
S
C
D
VSS
4
3
2
1
Power Button/ PWR/B
+3VALW +3VL
@
51_ON#
13
D
D
Q18
Q18 2N7002_SOT23-3
2N7002_SOT23-3
S
S
@
R408
R408
100K_0402_5%
100K_0402_5%
1 2
ON/OFFBTN# <43>
51_ON# <47>
R407
R411
R411
2
3
R407
100K_0402_5%
100K_0402_5%
1 2
2
G
G
1 2
4
2
Q
EC_SI_SPI_SO <43>
TOP Side
R409 10K_0603_5%@R409 10K_0603_5%@
R410 10K_0603_5%@R410 10K_0603_5%@
Bottom Side
C366
@C366
@
PWR_ON_LED#
12
220P_0402_25V8J
220P_0402_25V8J
D15
12
12
ON/OFFBTN#_R
D15
1
ROW BAV70W 3P C/C SOT-323 PANJIT
ROW BAV70W 3P C/C SOT-323 PANJIT
EC_ON<41,43,49>
10K_0402_5%
10K_0402_5%
For ESD Request
R1584 300_0402_5%R1584 300_0402_5%
H2
H2
H_3P0
H_3P0
1
@
@
H11
H11
H_4P2
H_4P2
1
@
@
H19
H19
H_2P9X3P9
H_2P9X3P9
1
@
@
1 2
H3
H3
H_3P0
H_3P0
1
@
@
H13
H13
H_4P2X4P7
H_4P2X4P7
1
@
@
H18
H18
@
@
PWR_ON_LED# ON/OFFBTN#_R
H4
H4
H_3P0
H_3P0
1
@
@
H_2P9X3P9
H_2P9X3P9
1
H14
H14
H_4P2X4P7
H_4P2X4P7
1
@
@
+5VALW
PWR_ON_LED#<39,43>
C C
B B
KEYBOARD CONN.
KSO10
KSO11
KSO12
KSO15
KSI7
KSI2
KSI3
KSI4
KSI0
KSI5
KSI6
KSI1
KSO2
KSO1
KSO0
KSO4
KSO3
KSO5
KSO14
KSO6
KSO7
KSO13
KSO8
KSO9
For EMC
1 2
C334 100P_0402_50V8JC334 100P_0402_50V8J
1 2
C335 100P_0402_50V8JC335 100P_0402_50V8J
1 2
C336 100P_0402_50V8JC336 100P_0402_50V8J
1 2
C337 100P_0402_50V8JC337 100P_0402_50V8J
1 2
C340 100P_0402_50V8JC340 100P_0402_50V8J
1 2
C341 100P_0402_50V8JC341 100P_0402_50V8J
1 2
C338 100P_0402_50V8JC338 100P_0402_50V8J
1 2
C342 100P_0402_50V8JC342 100P_0402_50V8J
1 2
C343 100P_0402_50V8JC343 100P_0402_50V8J
1 2
C345 100P_0402_50V8JC345 100P_0402_50V8J
1 2
C346 100P_0402_50V8JC346 100P_0402_50V8J
1 2
C347 100P_0402_50V8JC347 100P_0402_50V8J
1 2
C349 100P_0402_50V8JC349 100P_0402_50V8J
1 2
C350 100P_0402_50V8JC350 100P_0402_50V8J
1 2
C351 100P_0402_50V8JC351 100P_0402_50V8J
1 2
C352 100P_0402_50V8JC352 100P_0402_50V8J
1 2
C353 100P_0402_50V8JC353 100P_0402_50V8J
1 2
C354 100P_0402_50V8JC354 100P_0402_50V8J
1 2
C355 100P_0402_50V8JC355 100P_0402_50V8J
1 2
C356 100P_0402_50V8JC356 100P_0402_50V8J
1 2
C357 100P_0402_50V8JC357 100P_0402_50V8J
1 2
C358 100P_0402_50V8JC358 100P_0402_50V8J
1 2
C359 100P_0402_50V8JC359 100P_0402_50V8J
1 2
C360 100P_0402_50V8JC360 100P_0402_50V8J
KSO7 KSO0 KSI1 KSI7 KSO9 KSI6 KSI5 KSO3 KSI4 KSI2 KSO1 KSI3 KSI0 KSO13 KSO5 KSO2 KSO4 KSO8 KSO6 KSO11 KSO10 KSO12 KSO14 KSO15
JKB
JKB
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
GND1
26
GND2
ACES_85201-24051
ACES_85201-24051
@
@
Screw Hole
H1
H1
H_3P0
H_3P0
1
@
@
CPU
H12
H12
H_4P7
H_4P7
1
@
@
VGA
H20
H20
H_2P9
H_2P9
1
@
@
WLAN
H5
H5
H_3P0
H_3P0
1
@
@
JPWR
JPWR
1
1
2
2
3
3
4
4
5
G1
6
G2
E-T_6905K-Q04N-00R
E-T_6905K-Q04N-00R
@
@
H6
H6
H7
H7
H_3P0
H_3P0
H_3P0
H_3P0
1
1
@
@
@
@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C362
C362
@
@
C363
C363
@
@
C397
C397
@
@
H8
H8
@
@
H_3P0
H_3P0
1
+3VALW
1
Close to H3
2
+5VS
1
Close to H5
2
+1.5V
1
Close to H1
2
PWR_ON_LED#
3
3
1
1
ON/OFFBTN#_R
2
2
D18
D18
YSOT24C 3P C/A SOT23
YSOT24C 3P C/A SOT23
H15
H15
H21
H9
H9
H10
H10
H_3P0
H_3P0
H_3P0
H_3P0
1
1
@
@
@
@
H21
H_3P0N
H_3P0N
H_3P0X3P5N
H_3P0X3P5N
1
1
@
@
@
@
H22
H22
H_3P0X3P5N
H_3P0X3P5N
1
@
@
ISPD
ZZZ
ZZZ
PCB
PCB LA-7441P REV01
PCB LA-7441P REV01
PJPDC1
PJPDC1
DC-IN
PJPDC1
PJPDC1
45@
45@
ESD
PCB Fedical Mark PAD
FD1@FD1
H16
H16
H17
H17
A A
KSI[0..7]
KSO[0..15]
KSI[0..7] <41,43>
KSO[0..15] <43>
H_3P3
H_3P3
H_3P3
H_3P3
1
1
@
@
@
@
FD2@FD2
@
@
1
1
FD4@FD4
FD3@FD3
@
@
1
1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
ECROM/KB/PWR/B/SCREW
ECROM/KB/PWR/B/SCREW
ECROM/KB/PWR/B/SCREW
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
Friday, January 21, 2011
Friday, January 21, 2011
Friday, January 21, 2011
1
44 58
44 58
44 58
0.1
0.1
0.1
5
USB30_POK
RU1
RU1
+1.5V to +1.05V Transfer
+5VALW+1.5V+5VALW +1.5V +1.05V
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0603_10V6K
1U_0603_10V6K
CU2
CU2
CU1
CU1
1
1
2
USB3@
USB3@
D D
Vout=0.8(1+10K/32.4K)
1.042 ~ 1.0469 ~ 1.0519V Spec: 0.9975 ~ 1.05 ~ 1.1025
USB3@
USB3@
USB30_POK
2
+3V
+3VALW to +3V Transfer
SYSON<41,43,46,51,58>
+3V +3VA
USB3@
USB3@
LU1
LU1
1 2
C C
BLM18AG601SN1D_2P
BLM18AG601SN1D_2P
10U_0805_6.3V6K
10U_0805_6.3V6K
+1.05V
USB3@
USB3@
USB3@
USB3@
CU19 0.1U_0402_16V7K
CU19 0.1U_0402_16V7K
CU35 0.1U_0402_16V7K
CU35 0.1U_0402_16V7K
CU18 0.01U_0402_25V7K
CU18 0.01U_0402_25V7K
CU20 0.01U_0402_25V7K
CU20 0.01U_0402_25V7K
1
1
2
2
2
1
USB3@
USB3@
USB3@
USB3@
+3V
USB3@
USB3@
USB3@
USB3@
CU26 0.01U_0402_25V7K
CU26 0.01U_0402_25V7K
CU25 0.01U_0402_25V7K
CU25 0.01U_0402_25V7K
CU38 0.01U_0402_25V7K
CU38 0.01U_0402_25V7K
CU27 0.01U_0402_25V7K
CU27 0.01U_0402_25V7K
2
2
2
B B
1
1
1
USB3@
USB3@
USB3@
USB3@
A A
USB30_SMI#_IC
2
1
USB3@
USB3@
CU14
CU14
2
USB3@
USB3@
USB3@
USB3@
CU23 0.01U_0402_25V7K
CU23 0.01U_0402_25V7K
CU22 0.01U_0402_25V7K
CU22 0.01U_0402_25V7K
CU21 0.01U_0402_25V7K
CU21 0.01U_0402_25V7K
CU36 0.1U_0402_16V7K
CU36 0.1U_0402_16V7K
2
2
2
1
1
1
1
2
USB3@
USB3@
USB3@
USB3@
USB3@
USB3@
CU28 0.1U_0402_16V7K
CU28 0.1U_0402_16V7K
CU29 0.01U_0402_25V7K
CU29 0.01U_0402_25V7K
1
2
2
2
1
1
USB3@
USB3@
Place as close as possibile to UU2.N14 and UU2.M14
USB3@
USB3@
10K_0402_5%
10K_0402_5% RT43
RT43
+3V
UU1
UU1
5
VIN
9
VIN
6
VCNTL
7
POK
8
EN
APL5930KAI-TRG_SO8
APL5930KAI-TRG_SO8
USB3@
USB3@
+3VALW
RU4
RU4 100K_0402_5%USB3@
100K_0402_5%USB3@
1 2
1 2
RU6 47K_0402_5%
RU6 47K_0402_5%
13
D
D
0.01U_0402_25V7K
0.01U_0402_25V7K
G
G
QU2 2N7002_SOT23-3
QU2 2N7002_SOT23-3
S
S
USB3@
USB3@
+3V & +1.05V has power sequence timing:
0.1*VDD(+3V) ~ 0.9*VDD(+1.05V) < 100ms
CLK_USB30<30> CLK_USB30#<30>
PCIE_PRX_C_USB30TX_P4<30> PCIE_PRX_C_USB30TX_N4<30>
PCIE_PTX_C_USB30RX_P4<30> PCIE_PTX_C_USB30RX_N4<30>
PCH_PLT_RST#<33,40,43>
CLKREQ_USB30#<30>
CU24 0.01U_0402_25V7K
CU24 0.01U_0402_25V7K
2
2
1
1
USB3@
USB3@
0_0402_5%@RU21
0_0402_5%
@
1 2
+3V
12
G
G
2
S
S
1 2
RU31 0_0402_5%
RU31 0_0402_5%
VOUT VOUT
CU10
CU10
0.1U_0402_16V7K
0.1U_0402_16V7K
USB3@
USB3@
USB3@
USB3@
EC_SWI#<31,40>
24MHZ_12PF_X5H024000DC1H
24MHZ_12PF_X5H024000DC1H
RU21
2N7002_SOT23-3
2N7002_SOT23-3 QU4
QU4
13
D
D
USB3@
USB3@
@
@
+5VALW
FB
GND
CU12
CU12
USB3@
USB3@
1
2
3 4
2
1
2
USB3@
USB3@
1
2
1
1 2
12P_0402_50V8J
12P_0402_50V8J
1 2
4.7K_0402_5%
4.7K_0402_5%
1A
USB3@ RU3
USB3@
+3VALW
S
S
G
G
2
D
D
1 3
CU15
CU15 CU13
CU13
USB30_SMI#_IC
+3V
USB3@
USB3@
YU1
YU1
CU31
CU31
UPD720200A: SMIB Low active
USB3@
USB3@
12
RU2
RU2
12
10K_0402_1%
10K_0402_1%
USB3@
USB3@
RU3
32.4K_0402_1%
32.4K_0402_1%
USB3@
USB3@
CU11
CU11
0.1U_0402_16V4Z
0.1U_0402_16V4Z
QU1
QU1 AO3413_SOT23
AO3413_SOT23
USB3@
USB3@
+3V
USB3@
USB3@
0.1U_0402_16V7K
0.1U_0402_16V7K
12
0.1U_0402_16V7K
0.1U_0402_16V7K
12
USB3@
USB3@
USB3@
USB3@
RU12 0_0402_5%
RU12 0_0402_5%
1 2
RU9 10K_0402_5%USB3@RU9 10K_0402_5%USB3@
+3V
RU14 100_0402_1%@RU14 100_0402_1%@ RU10 10K_0402_5%USB3@RU10 10K_0402_5%USB3@
+3V
USB3@
USB3@
1 2
RU29 10K_0402_5%
RU29 10K_0402_5%
USB3@
USB3@
1 2
RU15 10K_0402_5%
RU15 10K_0402_5%
1SS355TE-17_SOD323-2
1SS355TE-17_SOD323-2
1
221
DU1
USB3@ DU1
USB3@
12
RU19
RU19 100_0402_5%
100_0402_5%
USB3@
USB3@
12P_0402_50V8J
12P_0402_50V8J
1
CU39
CU39
USB3@
USB3@
2
USB30_SMI# <34>
Close to U102.D7 Close to U102.P13
10U_0603_6.3V6M
10U_0603_6.3V6M
0.1U_0402_16V7K
0.1U_0402_16V7K
CU9
CU9
CU3
CU3
1
USB3@
USB3@
2
+3VS
JP3
@JP3
@
PAD-OPEN 2x2m
PAD-OPEN 2x2m
2 1
+3V
PCIE_PRX_USBTX_P4 PCIE_PRX_USBTX_N4
USB30_WAKE#
1 2 1 2 1 2
USB30_SMI_R USB30PWRON USB30_SMI#_R
SPI_CLK_USB
1U_0603_10V6K
1U_0603_10V6K
SPI_CS_USB#
CU37
CU37
SPI_SI_USB
1
SPI_SO_USB
USB3@
USB3@
2
CLK_48M_USB
USB3@
USB3@
1 2
RU20
RU20
2010/09/17 Add Level shift to avoid +3V leakage from +3VALW_PCH
5
4
+3VA +3VA
8P_0402_50V8D
8P_0402_50V8D
CU5
CU5
@
@
1
1
1
2
2
2
CU4
CU4
0.01U_0402_25V7K
0.01U_0402_25V7K
USB3@
USB3@
USB3@
USB3@
Follow Vendor recommend.
+3V +1.05V
UU2
UU2
D10
F13
F14
VDD33
VDD33
VDD33
B2
PECLKP
B1
PECLKN
D2
PETXP
D1
PETXN
F2
PERXP
F1
PERXN
H2
PERSTB
K1
PEWAKEB
K2
PECREQB
J2
AUXDET
J1
PSEL
H1
SMI
P4
SMIB
P5
PONRSTB
M2
SPISCK
N2
SPISCB
N1
SPISI
M1
SPISO
K13
GND
K14
GND
J13
GND
C14
GND
N14
XT1
M14
XT2
P6
CSEL
CSEL=0 CSEL=1
A1
GND
A2
GND
A3
GND
A4
GND
A5 A7
A9 A11 A13 A14
B3
B4
B5
B7
B9 B11 B13 B14
C1
C2
C3 C10 C11
USB3@
USB3@
USB30_SMI#_IC
QU3
QU3
@
@
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
GND
GND
C12
C13
For UPD720200: SMI high active
13
D
D
2
G
G
2N7002_SOT23-3
2N7002_SOT23-3
S
S
4
GNDD3GNDD4GND
1 2
1 2
0_0402_5%
0_0402_5%
1
0.1U_0402_16V7K
0.1U_0402_16V7K CU6
CU6
2
0.01U_0402_25V7K
0.01U_0402_25V7K
USB3@
USB3@
L10
VDD33F3VDD33G3VDD33G4VDD33L9VDD33
+3V:200mA
+1.05V:800mA
：：：：
24MHz XTAL
：：：：
48MHz Clock
GND
GND
GND
GNDE1GNDE2GND
D11
D12
D13
D14
USB30_SMI_R
@
@
RU16 0_0402_5%
RU16 0_0402_5%
USB30_SMI#_R
@
@
RU17 0_0402_5%
RU17 0_0402_5%
8P_0402_50V8D
8P_0402_50V8D
CU8
CU8
@
@
1
1
2
2
CU7
CU7
USB3@
USB3@
L13
L14
VDD33
VDD33
VDD33N4VDD33N5VDD33N6VDD33P3VDD10C4VDD10C5VDD10C6VDD10C7VDD10D5VDD10C8VDD10C9VDD10D8VDD10D9VDD10E3VDD10E4VDD10
GND
GNDG1GNDG2GNDG6GNDG7GNDG8GND
GNDF4GNDF6GNDF7GNDF8GNDF9GND
GND
F11
F12
E13
E14
3
+5VALW +USB_VCCB
2.5A
UU3
UU3
1
8
GND
USB3@
USB3@
0_0402_5%
0_0402_5%
USB30PWRON
1 2
RU24
RU24
USB2@
USB2@
USB30_PS_EN
VDD10H3VDD10H4VDD10L5VDD10
J11
3
H11
K11
GND
GNDK3GNDK4GNDL1GNDL2GNDL3GND
J12
1 2
RU26
RU26 0_0402_5%
0_0402_5%
+3VA
K12
L8
P13
D7
VDD10
VDD10
VDD10
U2AVDD10
U3AVDO33
B6
U3TXDP2
A6
U3TXDN2
N8
U2DM2
P8
U2DP2
B8
U3RXDP2
A8
U3RXDN2
U3TXDP1
U3TXDN1
U3RXDP1
U3RXDN1
OCL2#
G14
OCI2B
USB30_OCL1#
H13
OCI1B
H14
PPON2
J14
PPON1
U3TX_C_DP1
B10
U3TX_C_DN1
A10
U2D_DN1_R
N10
U2DM1
U2D_DP1_R
P10
U2DP1
U3RXDP1_R
B12
U3RXDN1_R
A12
RU18 1.6K_0402_1%USB3@RU18 1.6K_0402_1%USB3@
P12
RREF
N12
U2AVSS
N11
U2PVSS
D6
U3AVSS
P14
GND
P11
GND
P9
GND
P7
GND
P2
GND
P1
GND
N13
GND
N9
GND
N7
GND
N3
GND
M13
GND
M12
GND
M11
GND
M10
GND
M9
GND
M8
GND
M7
GND
M6
GND
M5
GND
M4
GND
M3
GND
L12
GND
L11
GND
L7
GND
L6
GND
L4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
USB_EN#<39,43>
E11
E12
VDD10
GND
GNDH6GND
GND
GNDH7GNDH8GNDH9GND
G9
G11
GNDJ3GNDJ4GNDJ6GNDJ7GNDJ8GNDJ9GND
H12
G13
G12
UPD720200AF1-DAP-A FBGA USB3.0
UPD720200AF1-DAP-A FBGA USB3.0
VOUT
2
VOUT7VIN
6
VIN3VOUT
5
4
FLG
EN
AP2301SG-13
AP2301SG-13
USB2@
USB2@
UU3
UU3 RT9715AGS_SO8
RT9715AGS_SO8
USB3@
USB3@
47K_0402_5%
47K_0402_5%
USB3@
USB3@
SPI_CS_USB# SPI_SO_USB
RU13
RU13
10K_0402_5%USB3@
10K_0402_5%USB3@
1 2
USB3@
USB3@
1 2
RU30 10K_0402_5%
RU30 10K_0402_5%
CU16 0.1U_0402_16V4Z
CU16 0.1U_0402_16V4Z
CU17 0.1U_0402_16V4Z
CU17 0.1U_0402_16V4Z
must to close to JUSB30
1 2
OCL1#
2 1
USB3@
USB3@
DU2 RB751V-40 SOD-323
DU2 RB751V-40 SOD-323
USB3@
USB3@
12
12
USB3@
USB3@
U3RXDP1_R
U3RXDN1_R
U2D_DN1_R U2D_DN1_R_L
U2D_DP1_R
USB20_N4<33>
USB20_P4<33>
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
USB2@
USB2@
1 2
R446 0_0402_5%
R446 0_0402_5%
1 2
R447 0_0402_5%
R447 0_0402_5%
USB3@
USB3@
+3V
12
RU23
RU23
RU22
RU22
10K_0402_5%
10K_0402_5%
USB3@
USB3@
1 2
+3V +3V
U3TXDP1
U3TXDN1
1 2
WCM-2012-121T_0805
WCM-2012-121T_0805
4
4
@
@
1
1
L19
L19
1 2
R881
R881
1 2
R883
R883
1 2
R882
R882
1 2
R884
R884
1 2
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
W=80mils
1
CU32
CU32
4.7U_0805_10V4Z
4.7U_0805_10V4Z
@
@
2
OCL1#
35mA
UU4
UU4
1
CS#
2
SO
3
WP#
4
GND
MX25L5121EMC-20G SOP 8P
MX25L5121EMC-20G SOP 8P
USB3@
USB3@
U2D_DP1_R_L
KINGCORE WCM-2012-900T
KINGCORE WCM-2012-900T
U2D_DN1_R_L
R415
USB3@ R415
USB3@
0_0402_5%
0_0402_5%
3
2
R416
R416
0_0402_5%USB3@
0_0402_5%USB3@
0_0402_5%USB3@
0_0402_5%USB3@
0_0402_5%USB3@
0_0402_5%USB3@
0_0402_5%USB2@
0_0402_5%USB2@
0_0402_5%USB2@
0_0402_5%USB2@
2
USB_OC2# <33>
VCC
HOLD#
SCK
SI
U3RXDP1_R_L
3
2
U3RXDN1_R_L
+USB_VCCB
U3RXDN1_R_L U3RXDP1_R_L U3TXDN1_L U3TXDP1_L
1
C368
C368
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
USB3@
USB3@
8 7
1 2 1 2
6 5
R413
R413
0_0402_5% @
0_0402_5% @
3
2
R414
R414
0_0402_5% @
0_0402_5% @
U2D_DP1_R_L
1
+
+
C369
C369
2
C367
C367
150U_B_6.3VM_R40M
150U_B_6.3VM_R40M
USB3@
USB3@
CU34
USB3@CU34
USB3@
USB3@
RU27 10K_0402_5%
RU27 10K_0402_5% RU28 0_0402_5%
RU28 0_0402_5%
USB3@
USB3@
3
2
U3TXDP1_L
U3TXDN1_L U2DP2_L
U2DN2_L USB30_GND U3RXDP1_R_L
U3RXDN1_R_L
1 2 3 4
LXES4XBAA6-027_MSOP8
LXES4XBAA6-027_MSOP8
USB3@
0.1U_0402_16V7K
0.1U_0402_16V7K
1 2
SPI_CLK_USB SPI_SI_USB
U2DP2_L
12
4
4
1
1
L18
L18
U2DN2_L
12
U3TXDP1
4
@
@
1
U3TXDN1
JUSB2
JUSB2
9
SSTX+
1
VBUS
8
SSTX-
3
D+
7
GND
2
D-
6
SSRX+
4
GND
5
SSRX-
ACON_TAR20-9V1393
ACON_TAR20-9V1393
@
@
D23
D23
R­R+ T­T+
8
VCC
7
GND
6
D-
5
D+
@
@
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
USB3@
USB3@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C370
C370
2
2
1000P_0402_50V7K
1000P_0402_50V7K
USB3@
USB3@
SPI_CLK_USB
Close to UU4.6
1 2
WCM-2012-121T_0805
WCM-2012-121T_0805
4
1
L20
L20
1 2
RU25
RU25
1 2
0_0402_5%
0_0402_5%
2
@
@
1
U3TXDP1_L
R417
USB3@ R417
USB3@
0_0402_5%
0_0402_5%
3
3
2
2
U3TXDN1_L
R418
R418
0_0402_5%USB3@
0_0402_5%USB3@
10
GND
USB30_GND
11
GND
USB30_GND
12
GND
USB30_GND
13
GND
1 2
+5VALW
U2DN2_L U2DP2_L
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
PCIe-USB3.0
PCIe-USB3.0
PCIe-USB3.0
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
1
CU33
CU33
0.1U_0402_16V7K
0.1U_0402_16V7K
@
@
R1512
R1512 0_0603_5%
0_0603_5%
0.1
0.1
45 58Friday, January 21, 2011
45 58Friday, January 21, 2011
45 58Friday, January 21, 2011
0.1
5
+3VALW TO +3VS
Vgs=-0V,Id=9A,Rds=18.5mohm
+3VALW +3VS
Q19
Q19
8
S
D
7
S
D
6
S
D D
2
C377
C377
1
0.1U_0402_16V7K
0.1U_0402_16V7K
D
5
D
AP4800BGM-HF 1N SO-8
AP4800BGM-HF 1N SO-8
1
C378
C378
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
G
C371
C371
1 2 3 4
1
2
0.022U_0402_25V7K
0.022U_0402_25V7K
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
12
C380
C380
R425
R425 330K_0402_5%
330K_0402_5%
1
C372 4.7U_0805_10V4ZC372 4.7U_0805_10V4Z
2
R423
R423
1 2
47K_0402_5%
47K_0402_5%
61
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
+VSB
Q40A
Q40A
SUSP
2
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
+5VALW TO +5VS
+5VALW
Q22
Q22
8
D
7
D
6
D
5
D
AP4800BGM-HF 1N SO-8
AP4800BGM-HF 1N SO-8
1
2
C3860.1U_0402_16V7K C3860.1U_0402_16V7K
C387
C387
2
C C
B B
1
4.7U_0805_10V4Z
4.7U_0805_10V4Z
+1.5V to +1.5VS
Vgs=10V,Id=14.5A,Rds=6mohm
+1.5V
Q25
Q25
8
S
D
7
S
D
6
S
D
5
G
D
SI4856ADY_SO8
SI4856ADY_SO8
1
FDS6676AS
C395
C395
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
S
2
S
3
S
4
G
1
C388
C388
2
0.1U_0603_25V7K
0.1U_0603_25V7K
+1.5VS
1
C393
C393
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
2
3 4
1
C396
C396
2
0.1U_0603_25V7K
0.1U_0603_25V7K
RUN_ON
12
12
R437
R437 820K_0402_5%
820K_0402_5%
+5VS
1
C382
C382
2
R430
R430 330K_0402_5%
330K_0402_5%
61
1
C383
C383
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
R429
R429
1 2
47K_0402_5%
47K_0402_5%
61
Q37A
Q37A
2
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
1
C394
C394
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
R436
R436
1 2
220K_0402_5%
220K_0402_5%
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
+VSB
Q39A
Q39A
SUSP
2
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
+VSB
SUSP
R435
R435
R428
R428
5
1 2 3
Q39B
Q39B
5
4
470_0805_5%
470_0805_5%
R421
R421
5
1 2 3
4
Q37B
Q37B
4
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
470_0805_5%
470_0805_5%
1 2 3
Q40B
Q40B
4
2
C385
C385
0.1U_0402_16V7K
0.1U_0402_16V7K
1
470_0805_5%
470_0805_5%
3
+1.5V
TPCA8059-H 1N PPAK56-8
TPCA8059-H 1N PPAK56-8 Q20
C374
C374
Q20
1
C379
C379
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
2
C373
C373
1
1
+1.5V to +VRAM_1.5VS
+VRAM_1.5VS
C375
C375
1 2 35
1U_0402_6.3V4Z
1
C381
C381
2
1U_0402_6.3V4Z
0.1U_0402_25V6
0.1U_0402_25V6
4
Vgs=10V,Id=16A,Rds=3.8 mohm
1
2
12
R426
R426 820K_0402_5%
820K_0402_5%
61
1
2
R424
R424
1 2
220K_0402_5%
220K_0402_5%
Q36AQ36A
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
C376
C376
4.7U_0805_10V4Z
4.7U_0805_10V4Z
VGA_PWROK#
2
+VSB
R422
R422
5
470_0805_5%
470_0805_5%
1 2 3
Q36B
Q36B
4
+1.05VS_VCCP to +1.05VS_DGPU
+1.05VS_VCCP
2
C384
C384
0.1U_0402_16V7K
0.1U_0402_16V7K
1
JUMP_43X118
JUMP_43X118
+1.05VS_DGPU
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
Vgs=4.5V,Id=3A,Rds<22mohm
1
13
D
C685
C685
@
@
1
2
AO3416_SOT23-3
AO3416_SOT23-3
2
1
2
D
S
S
1
2
PJ33
PJ33
@
@
Q56
Q56
2
G
G
1
2
C686
C686 1U_0402_6.3V6K
1U_0402_6.3V6K
+5VALW
R457
R457 47K_0402_5%
47K_0402_5%
1 2
C493
C493
0.1U_0402_25V6
0.1U_0402_25V6
61
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
Q209A
Q209A
DGPU_PWR_EN#
2
+1.05VS_DGPU
R460
R460
470_0805_5%
470_0805_5%
1 2
3
5
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
4
DGPU_PWR_EN# <17>
Q209B
Q209B
2
SYSON#
SYSON<41,43,45,51,58>
R432
R432
10K_0402_5%
10K_0402_5%
VTTPWRGOOD<52,54>
SYSON#
Q24
Q24
2
G
G
12
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
+5VALW
R427
R427
100K_0402_5%
100K_0402_5%
1 2
13
D
D
S
S
2N7002_SOT23-3
2N7002_SOT23-3
0.75VR_EN#<53>
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
0.75VR_EN
12
R1442
R1442
100K_0402_5%
100K_0402_5%
SUSP
Q207A
Q207A
2
1
+5VALW
R420
R420 100K_0402_5%
100K_0402_5%
VGA_PWROK#
VGA_PWROK<14,33,34,57>
+3VALW
12
R1443
R1443 100K_0402_5%
100K_0402_5%
3
Q207B
Q207B
5
4
61
SUSP#<9,43,50,52,54,57,58>
4.7K_0402_5%
4.7K_0402_5%
1 2
13
D
D
Q21
Q21
2
G
G
2N7002_SOT23-3
2N7002_SOT23-3
S
S
+5VALW
100K_0402_5%
100K_0402_5%
R434
R434
SUSP
1 2
1 2
Q26
Q26
13
D
D
2N7002_SOT23-3
2N7002_SOT23-3
2
G
G
S
S
SUSP<5,53>
R438
R438
+3VALW TO +3VALW(PCH AUX Power)
A A
Short J1 for PCH VCCSUS3.3
+3VALW
JUMP_43X39
JUMP_43X39
2
1U_0402_6.3V6K
1U_0402_6.3V6K
5
@ J1
@
J1
+3VALW_PCH
112
C687
C687
1
1
2
2
40mil
C390
10U_0603_6.3V6M
C390
10U_0603_6.3V6M
+3VS_DGPU
R458
R458
470_0805_5%
470_0805_5%
1 2 3
Q206B
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Q206B
3
DGPU_PWR_EN#
5
4
2010/12/03 2011/12/03
2010/12/03 2011/12/03
2010/12/03 2011/12/03
+VGA_CORE
R459
R459
470_0805_5%
470_0805_5%
1 2
13
D
D
2
G
G
S
S
Compal Secret Data
Compal Secret Data
Compal Secret Data
Q55
Q55 2N7002_SOT23-3
2N7002_SOT23-3
Deciphered Date
Deciphered Date
Deciphered Date
+1.05VS_VCCP
R440
R440
470_0805_5%
470_0805_5%
1 2
+1.05VS_VCCP_R
2N7002_SOT23-3
2N7002_SOT23-3
13
D
D
SUSP SYSON#
2
G
G
Q28
Q28
S
S
2
+1.5V
12
R441
R441 470_0805_5%
470_0805_5%
+1.5V_R
2N7002_SOT23-3
2N7002_SOT23-3
13
D
D
2
G
G
Q29
Q29
S
S
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Friday, January 21, 2011
Friday, January 21, 2011
Friday, January 21, 2011
Date: Sheet of
Date: Sheet of
Date: Sheet
+0.75VS
12
R442
R442 22_0603_5%
22_0603_5%
+0.75VS_R
2N7002_SOT23-3
2N7002_SOT23-3
13
D
SUSP
D
2
G
G
Q30
Q30
S
S
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
DC-DC INTERFACE
DC-DC INTERFACE
DC-DC INTERFACE
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
PBL80 LA-7441P M/B
SUSP
1
+1.8VS
12
+0.75VS_R
2N7002_SOT23-3
2N7002_SOT23-3
13
2
G
G
Q38
Q38
of
46 58
46 58
46 58
R443
R443 22_0603_5%
22_0603_5%
D
D
S
S
0.1
0.1
0.1
A
DCIN jack P/N:DC301008L00, need doble confirm P/N with ME
ADPIN
SINGA_4TRJWT-R2513
SINGA_4TRJWT-R2513
@
@
1
1
2
2
PJPDC1
PJPDC1
3
3
4
4
1 1
12
PC1
PC1
1000P_0402_50V7K
1000P_0402_50V7K
HCB2012KF-121T50_0805
HCB2012KF-121T50_0805
1 2
HCB2012KF-121T50_0805
HCB2012KF-121T50_0805
1 2
12
PC2
PC2
100P_0402_50V8J
100P_0402_50V8J
need confirm: ME give us battery connector P/N is DC040000800
@SUYIN_200275MR009G10PZR
@SUYIN_200275MR009G10PZR
11
GND
10
GND
9
9
8
8
7
7
B/I
6
6
EC_SMCA
5
5
EC_SMDA
4
PJP2
PJP2
4
TS_A
3
3
2
2
1
1
PD1
PD1
1
2
3
@PJSOT24CW_SOT323-3
@PJSOT24CW_SOT323-3
PR28
PR28
100_0402_1%
100_0402_1%
1 2
1 2
PR31
PR31
100_0402_1%
100_0402_1%
PR30
PR30
1 2
1K_0402_1%
1K_0402_1%
PR27
PR27
1K_0402_1%
1K_0402_1%
1 2
PD2
PD2
2
1
3
@PJSOT24CW_SOT323-3
@PJSOT24CW_SOT323-3
PR29
PR29
1 2
100K_0402_5%
100K_0402_5%
2 2
3 3
B
PL1
PL1
PL2
PL2
12
PC3
PC3
1000P_0402_50V7K
1000P_0402_50V7K
VMB
12
PC6
PC6 1000P_0402_50V7K
1000P_0402_50V7K
+3VALW
BATT_TEMP <43>
VIN
12
PL3
PL3
HCB2012KF-121T50_0805
HCB2012KF-121T50_0805
1 2
PL4
PL4
HCB2012KF-121T50_0805
HCB2012KF-121T50_0805
1 2
EC_SMB_CK1 <43,48>
EC_SMB_DA1 <43,48>
+CHGRTC
PC4
PC4
100P_0402_50V8J
100P_0402_50V8J
VR_HOT#<43,55>
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
12
2
PQ4
PQ4
BATT+
PC7
PC7
0.01U_0402_25V7K
0.01U_0402_25V7K
PJ3
PJ3
112
JUMP_43X39
JUMP_43X39
0.1U_0603_16V7K
0.1U_0603_16V7K
X7R type
13
D
D
2
G
G
S
S
+3VL
3.3V
PC5
PC5
VL
PR23
PR23
1 2
ADP_OCP_1
C
PH1 under CPU botten side :
CPU thermal protection at 93 +-3 degree C Recovery at 56 +-3 degree C
VL
12
PU1
PU1
1
VCC
TMSNS1
2
GND
RHYST1
3
OT1
TMSNS2
4
RHYST2
OT2
G718TM1U_SOT23-8
100K_0402_1%
100K_0402_1%
OTP_N_003
PR3 @0_0402_5%PR3 @0_0402_5%
PR4 0_0402_5%PR4 0_0402_5%
G718TM1U_SOT23-8
12
12
ADP_I<43,48>
OTP_N_001
8
OTP_N_002
7
ADP_OCP_3
6
ADP_OCP_2
5
EN0 <49>
VS_ON <49>
1 2
PR24 309K_0402_1%PR24 309K_0402_1%
If EC use 3VL and can not detect VGATE, must connect EN0
B+
100K_0402_1%
100K_0402_1%
POK<49>
VL
PR13
PR13
PR16
PR16
1 2
0_0402_5%
0_0402_5%
VSB_N_002
1 2
12
PC10
PC10
PJ2
PJ2
+VSBP +VSB
2
JUMP_43X39
JUMP_43X39
(120mA,40mils ,Via NO.= 1)
2
G
G
.1U_0402_16V7K
.1U_0402_16V7K
112
22K_0402_1%
22K_0402_1%
VSB_N_003
13
D
D
S
S
PR12
PR12
1 2
PQ2
PQ2 SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
D
PR26
PR26
47.5K_0402_1%
47.5K_0402_1%
1 2
12
PR2 10K_0402_1%PR2 10K_0402_1%
12
PH1
PH1
100K_0402_1%_NCP15WF104F03RC
100K_0402_1%_NCP15WF104F03RC
PC8
PC8
2
TP0610K-T1-E3_SOT23-3
TP0610K-T1-E3_SOT23-3
0.22U_0603_25V7K
0.22U_0603_25V7K
PQ1
PQ1
13
12
PR10
PR10
PR25
PR25 100K_0402_1%
100K_0402_1%
1 2
12
100K_0402_1%
100K_0402_1%
VSB_N_001
Reserve when EC use +3VL. Install when EC use +3VALW.
VIN
12
PR1
PR1
21.5K_0402_1%
21.5K_0402_1%
+VSBP
12
PC9
PC9
0.1U_0603_25V7K
0.1U_0603_25V7K
PD3
PD3 RLS4148_LL34-2
RLS4148_LL34-2
1 2
VS_N_001
12
12
PR18
PR18 68_1206_5%
68_1206_5%
12
PC12
PC12
0.1U_0603_25V7K
0.1U_0603_25V7K
13
PR17
PR17
NCL61 LA-6321P M/B
D
VS
0.1
0.1
47 58Friday, January 21, 2011
47 58Friday, January 21, 2011
47 58Friday, January 21, 2011
0.1
PR6
0_0402_5%
0_0402_5%
PR19
PR19
PR6
1K_1206_5%
1K_1206_5%
1 2
PR7
PR7
1K_1206_5%
1K_1206_5%
1 2
PR11
PR11
1K_1206_5%
1K_1206_5%
1 2
PR14
PR14
1K_1206_5%
1K_1206_5%
1 2
PD20
PD20
12
2
3
BAS40CW_SOT323-3
BAS40CW_SOT323-3
A
VIN
4 4
ACOFF<43>
+5VALW
1
LL4148_LL34-2
LL4148_LL34-2
2
PD5
PD5
12
PR8
PR8
Pre_chg
12
12
PR9
PR9
100K_0402_5%
100K_0402_5%
1
PQ5
PQ5
3
PDTC115EU_SOT323-3
PDTC115EU_SOT323-3
PQ7
PQ7
TP0610K-T1-E3_SOT23-3
TP0610K-T1-E3_SOT23-3
3
100K_0402_5%
100K_0402_5%
2
12
1
2
3
1
@
@
12
PR15
PR15 100K_0402_5%
100K_0402_5%
PQ6
PQ6 PDTC115EU_SOT323-3
PDTC115EU_SOT323-3
B+
@
@
@
@
12
12
PC81
PC81
PC80
PC80
0.1U_0402_25V6
0.1U_0402_25V6
PC128
PC128
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
C
BATT+
RLS4148_LL34-2
RLS4148_LL34-2
51_ON#<44>
PD4
PD4
PR21
PR21
100K_0402_1%
100K_0402_1%
1 2
PR22
PR22
22K_0402_1%
22K_0402_1%
2010/01/232009/01/23
2010/01/232009/01/23
2010/01/232009/01/23
12
PQ3
PQ3
TP0610K-T1-E3_SOT23-3
12
TP0610K-T1-E3_SOT23-3
N1
12
PC11
PC11
0.22U_0603_25V7K
0.22U_0603_25V7K
VS_N_002
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
68_1206_5%
68_1206_5%
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
DCIN / BATT CONN / OTP
DCIN / BATT CONN / OTP
DCIN / BATT CONN / OTP
A
B
C
D
for reverse input protection
1
D
D
PQ106
PQ106
2
G
G
SI1304BDL-T1-E3_SC70-3
SI1304BDL-T1-E3_SC70-3
S
S
PR104
PR103
PR103
1 2
1M_0402_5%
8 7 6 5
12
PC112
PC112
3.3_1210_5%
3.3_1210_5%
@
@
@
@
3.3_1210_5%
3.3_1210_5%
1M_0402_5%
AO4466L_SO8
AO4466L_SO8
PQ101
PQ101
2200P_0402_50V7 K
2200P_0402_50V7 K
PR112
PR112
PR113
PR113
4
BQ24725_ACDRV_1
VIN
12
12
12
1 1
2 2
3 3
1 2
1 2 3
PC120
PC120
@
@
2.2U_0805_25V6K
2.2U_0805_25V6K
PR104
3M_0402_5%
3M_0402_5%
Vin Dectector
Min. Typ Max.
3
@HCB2012KF-121T50_0805
@HCB2012KF-121T50_0805
PL103
PL103
12
8 7 6 5
+3VALW
P2
0.02_2512_1%
0.02_2512_1%
1
2
1 2
PC113
PC113
0.1U_0402_25V6
0.1U_0402_25V6
12
PC117
PC117
0.1U_0603_25V7K
0.1U_0603_25V7K
BQ24725_CMSRC
BQ24725_ACDRV
PR117
PR117
1 2
10K_0402_1%
10K_0402_1%
PR118
PR118
1 2
10K_0402_1%
10K_0402_1%
PR120
PR120
VIN
1 2
255K_0402_1%
255K_0402_1%
PR101
PR101
BQ24725_ACP
BQ24725_ACOK
BQ24725_ACN
4
3
12
PC115
PC115
PC118
PC118
1 2
1U_0603_25V6K
1U_0603_25V6K
21
1
2
3
4
5
Pre_chg
12
12
PR122
PR122
154K_0402_1%
154K_0402_1%
12
VIN
2
3
PD101
PD101 BAS40CW_SOT323-3
BAS40CW_SOT323-3
0.047U_0402_25V7K
0.047U_0402_25V7K
1 12
PC116
0.1U_0402_25V6
0.1U_0402_25V6
PU101
PU101
PAD
ACN
ACP
BQ24725RGRR_VQFN20_3P5X3P5
BQ24725RGRR_VQFN20_3P5X3P5
CMSRC
ACDRV
ACOK
PD7
PD7
RB751V-40_SOD323-2
RB751V-40_SOD323-2
1 2
PR110
PR110
10_1206_1%
10_1206_1%
BQ24725_VCC
BQ24725_LX
19
20
VCC
PHASE
IOUT7SDA8SCL9ILIM
ACDET
6
BQ24725_ACDET
PC116
PL102 0.56UH_1127AS-R56N_3.3A_30%PL102 0.56UH_1127AS-R56N_3.3A_30%
1 2
12
12
PC104
PC111
PC111
10U_0805_25V6K
10U_0805_25V6K
DH_CHG
18
HIDRV
PC105
PC105
12
12
PR111
PR111
0_0603_5%
0_0603_5%
BQ24725_REGN
BQ24725_BST
17
16
BTST
REGN LODRV
BATDRV
10
12
PC104
10U_0805_25V6K
10U_0805_25V6K
PD102
PD102 RB751V-40_SOD323-2
RB751V-40_SOD323-2
PC119
PC119
1 2
1U_0603_25V6K
1U_0603_25V6K
DL_CHG
15
14
GND
SRP
13
SRP
SRN
12
SRN
BQ24725_BATDRV
11
BQ24725_ILIM
12
PC125
PC125
PR121
PR121
100K_0402_1%
100K_0402_1%
12
10U_0805_25V6K
10U_0805_25V6K
10_0603_5%
10_0603_5%
1 2
6.8_0603_5%
6.8_0603_5%
1 2
1 2
316K_0402_1%
316K_0402_1%
0.01U_0402_25V7K
0.01U_0402_25V7K
PC103
PC103
PR115
PR115
PR116
PR116
PR119
PR119
DH_CHG
12
PC102
PC102
10U_0805_25V6K
10U_0805_25V6K
AO4468L_SO8
AO4468L_SO8
CSOP1
CSON1
12
@0.1U_0402_25V6
@0.1U_0402_25V6
PQ105
PQ105
+3VALW
CHG_B+
PC101
PC101
2200P_0402_50V7 K
2200P_0402_50V7 K
3 5
5
4
12
PC124
PC124
2.2U_0603_16V6K
2.2U_0603_16V6K
BQ24725_BATDRV
PQ104
PQ104 AON7408L_DFN8-5
AON7408L_DFN8-5
PL101
12
@
@
12
PL101
1 2
PR114
PR114
4.7_1206_5%
4.7_1206_5%
PC123
PC123
@
@
680P_0402_50V7K
680P_0402_50V7K
4.7U_LF919AS-4R7M-P3_5.2A_20%
4.7U_LF919AS-4R7M-P3_5.2A_20%
241
BQ24725_LX CHG
786
123
1 2
PR107
PR107
4.12K_0603_1%
4.12K_0603_1%
CSOP1
12
AO4466L_SO8
AO4466L_SO8
8 7 6 5
0.01_1206_1%
0.01_1206_1%
1
2
PC121
PC121
0.1U_0402_25V6
0.1U_0402_25V6
PQ103
PQ103
4
BQ24725_BATDRV_1
PR102
PR102
4
3
CSON1
12
1 2 3
12
PC122
PC122
0.1U_0402_25V6
0.1U_0402_25V6
@
@
12
PR106
PR106
0_0402_5%
PC114
PC114
0.01U_0402_50V7K
0.01U_0402_50V7K
12
0_0402_5%
BATT+
12
12
12
PC108
PC108
PC109
PC107
PC107
PC106
PC106
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
PC109
0.01U_0402_50V7K
0.01U_0402_50V7K
2200P_0402_50V7 K
2200P_0402_50V7 K
P1 B+VIN
@
@
12
12
PR105
PR105
0_0402_5%
0_0402_5%
PC110
PC110
0.1U_0402_25V6
0.1U_0402_25V6
12
12
PR108
PR108
4.12K_0603_1%
4.12K_0603_1%
PR109
PR109
1 2 3
4.12K_0603_1%
4.12K_0603_1%
AO4466L_SO8
AO4466L_SO8
PQ102
PQ102
4
ACIN<31,43>
H-->L 17.23V L--> H 17.63V
ILIM and external DPM
4 4
3.97A
12
12
PC126
PC126
PR123
PR123
0.1U_0402_25V6
0.1U_0402_25V6
66.5K_0402_1%
66.5K_0402_1%
PC127
PC127
12
100P_0402_50V8J
100P_0402_50V8J
EC_SMB_CK1 <43,47>
EC_SMB_DA1 <43,47>
ADP_I <43,47>
Security Classification
Security Classification
Security Classification
2010/01/25
2010/01/25
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
2010/01/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
C
2010/12/31
2010/12/31
2010/12/31
Compal Electronics, Inc.
Title
Title
Title
PWR DCIN / Pre-charge
PWR DCIN / Pre-charge
PWR DCIN / Pre-charge
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-7221P
LA-7221P
LA-7221P
Date: Sheet of
Friday, January 21, 2011
Date: Sheet of
Friday, January 21, 2011
Date: Sheet of
Friday, January 21, 2011
D
48
48
48
58
58
58
0.1
0.1
0.1
A
B
C
D
E
2VREF_8205
1 1
1U_0603_16V6K
1U_0603_16V6K
PR301
PR301
13.7K_0402_1%
13.7K_0402_1%
1 2
PR302
12
PC309
PC309
0.1U_0402_25V6
0.1U_0402_25V6
+3VALWP
B++
12
PC310
PC310
2200P_0402_50V7K
2200P_0402_50V7K
12
PC303
PC303
220U_6.3VM_R15
220U_6.3VM_R15
PC304
PC304
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PL303
PL303
4.7UH_VMPI0703AR-4R7M-Z01_5.5A_20%
4.7UH_VMPI0703AR-4R7M-Z01_5.5A_20%
1
+
+
2
12
+3VLP
PQ303
PQ303 AON7408L_DFN8-5
AON7408L_DFN8-5
10U_0805_6.3V6M
10U_0805_6.3V6M
3 5
241
786
12
PR312
PR312
@4.7_1206_5%
@4.7_1206_5%
SNUB_3V
12
5
PQ304
PQ304
AO4468L_SO8
AO4468L_SO8
123
PC316
PC316
@680P_0402_50V7K
@680P_0402_50V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
4
PC313
PC313
PC314
PC314
1 2
LX_3V
B++
12
EN0<47>
PR308
PR308
1 2
0_0402_5%
0_0402_5%
LG_3V
PR314
PR314
499K_0402_1%
499K_0402_1%
1 2
PR315
PR315
95.3K_0402_1%
95.3K_0402_1%
B+
2 2
3 3
PL301
PL301
HCB2012KF-121T50_0805
HCB2012KF-121T50_0805
1 2
105K_0402_1%
105K_0402_1%
BST_3V
UG_3V
12
PR302
20K_0402_1%
20K_0402_1%
1 2
PR303
PR303
1 2
PU301
PU301
25
P PAD
7
VO2
8
VREG3
9
BOOT2
10
UGATE2
11
PHASE2
12
LGATE2
12
PC320
PC320 @1U_0603_10V6K
@1U_0603_10V6K
2VREF_8205
PC308
PC308
FB_3V
ENTRIP2
6
13
12
PR305
PR305
30.9K_0402_1%
30.9K_0402_1%
1 2
PR306
PR306 20K_0402_1%
20K_0402_1%
FB_5V
1 2
PR307
PR307 105K_0402_1%
105K_0402_1%
ENTRIP1
1 2
1
3
4
2
5
FB1
FB2
REF
TONSEL
ENTRIP2
SKIPSEL
EN
14
ENTRIP1
24
VO1
23
PGOOD
BOOT1
UGATE1
PHASE1
LGATE1
NC18VREG5
VIN16GND
17
15
BST_5V
22
UG_5V
21
LX_5V
20
LG_5V
19
S IC RT8205EGQW WQFN 24P PWM
S IC RT8205EGQW WQFN 24P PWM
VL
12
PC318
PC318
4.7U_0805_10V6K
4.7U_0805_10V6K
12
B++
PC319
PC319
0.1U_0603_25V7K
0.1U_0603_25V7K
PR309
PR309
2.2_0402_5%
2.2_0402_5%
1 2
B++
12
12
12
PC312
PC312
PC311
PC311
0.1U_0402_25V6
0.1U_0402_25V6
BST1_5VBST1_3V
2200P_0402_50V7K
2200P_0402_50V7K
PC315
PC315
0.1U_0402_10V7K
0.1U_0402_10V7K
1 2
POK <47>
PC306
PC306
10U_0805_25V6K
10U_0805_25V6K
AO4726L_SO8
AO4726L_SO8
PQ306
PQ306
PQ305
PQ305 AON7408L_DFN8-5
AON7408L_DFN8-5
3 5
241
678
35241
PL305
PL305
4.7UH_VMPI0703AR-4R7M-Z01_5.5A_20%
4.7UH_VMPI0703AR-4R7M-Z01_5.5A_20%
1 2
12
PR313
PR313
@4.7_1206_5%
@4.7_1206_5%
SNUB_5V
12
PC317
PC317
@680P_0402_50V7K
@680P_0402_50V7K
1
+
+
PC305
PC305 220U_6.3VM_R15
220U_6.3VM_R15
2
+5VALWP
PQ307A
SSM6N7002FU_US6
SSM6N7002FU_US6
12
PR320
PR320
402K_0402_1%
402K_0402_1%
1 2
EC_ON<41,43,44>
VS_ON<47>
1 2
VS
PR319
PR319
316K_0402_1%
316K_0402_1%
PD301
PD301
1M_0402_1%
12
1 2
1M_0402_1% PR322
PR322
LL4148_LL34-2
4 4
LL4148_LL34-2
VIN
EC:+3VL, reserve PR319, install PR318, PR320 100K EC:+3VALW, reserve PR318, install PR319, PR320 40.2K
A
S
S
PR318
PR318
@10K_0402_1%
@10K_0402_1%
12
PC321
PC321
N_3_5V_001
2
G
G
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
ENTRIP1ENTRIP1
61
D
D
PQ307A
5
G
G
13
DTC115EUA_SC70-3
DTC115EUA_SC70-3
B
ENTRIP2
34
D
D
S
S
1 2
PR317
PR317
100K_0402_5%
100K_0402_5%
PQ308
PQ308
PQ307B
PQ307B
SSM6N7002FU_US6
SSM6N7002FU_US6
PJP306
PJP306
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
PJP305
PJP305
+5VALWP
VL
+3VALWP
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m PJP303
PJP303
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
C
2007/08/02 2008/08/02
2007/08/02 2008/08/02
2007/08/02 2008/08/02
(ipeak=10A imax=7A,400mils ,Via NO.= 20)
+5VALW
(ipeak=6A imax=4.2A,240mils ,Via NO.= 12)
+3VALW
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
+3VLP
2 1
PAD-OPEN 2x2m
PAD-OPEN 2x2m
VL
2 1
PAD-OPEN 2x2m
PAD-OPEN 2x2m
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+3VL
PJP302
PJP302
+5VL
PJP301
PJP301
3.3VALWP/5VALWP
3.3VALWP/5VALWP
3.3VALWP/5VALWP
PBL21 LA6771P M/B
PBL21 LA6771P M/B
PBL21 LA6771P M/B
E
0.1
0.1
49 58Friday, January 21, 2011
49 58Friday, January 21, 2011
49 58Friday, January 21, 2011
0.1
A
1 1
PL402
PL402
HCB1608KF-121T30_0603
HCB1608KF-121T30_0603
+5VALW
2 2
SUSP#<9,43,46,52,54,57,58>
1 2
12
1 2
PR404 0_0402_5%PR404 0_0402_5%
PC403
PC403 22U_0805_6.3VAM
22U_0805_6.3VAM
EN_1.8VSP
@47K_0402_5%
@47K_0402_5%
1.8VSP_VIN
PR405
PR405
12
12
B
PL401
PU401
PU401
4
10
PVIN
PG
9
PVIN
8
SVIN
5
EN
TP
NC
7
11
SY8033BDBC_DFN10_3X3
PC405
PC405
@0.1U_0402_10V7K
@0.1U_0402_10V7K
SY8033BDBC_DFN10_3X3
1.8VSP_LX
2
LX
3
LX
1.8VSP_FB
6
FB
NC
1
PL401
1UH_VMPI0703AR-1R0M-Z01_11A_20%
1UH_VMPI0703AR-1R0M-Z01_11A_20%
1 2
12
20K_0402_1%
20K_0402_1%
PR403
PR403
4.7_1206_5%
4.7_1206_5%
10K_0402_1%
10K_0402_1%
SNUB_1.8VSP
12
PC406
PC406
PR401
PR401
PR402
PR402
12
12
C
<Vo=1.8V> VFB=0.6V
+1.8VSP
12
PC404
PC404
68P_0402_50V8J
68P_0402_50V8J
12
12
PC402
PC402
PC401
PC401
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
Vo=VFB*(1+PR401/PR402)=0.6*(1+20K/10K)=1.8V
D
680P_0402_50V7K
680P_0402_50V7K
PJP401
PJP401
+1.8VSP
3 3
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1 2
PAD-OPEN 3x3m
PAD-OPEN 3x3m
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
C
(2A, 80mils, Via NO.= 4)
+1.8VS
2010/01/232009/01/23
2010/01/232009/01/23
2010/01/232009/01/23
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+1.8VSP
+1.8VSP
+1.8VSP
NCL61 LA-6321P M/B
D
50 58Friday, January 21, 2011
50 58Friday, January 21, 2011
50 58Friday, January 21, 2011
0.1
0.1
0.1
5
(Ipeak = 30A Imax= 21A , 1200mils ,Via NO.= 60)
D D
4
3
2
1
4
1.5V_B+
6
578
678
35241
12
PL501
PL501
1 2
PJP503
PJP503
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
12
12
PC503
PC503
PC504
PC504
10U_0805_25V6K
10U_0805_25V6K
@4.7U_0805_25V6-K
@4.7U_0805_25V6-K
123
1UH_VMPI0703AR-1R0M-Z01_11A_20%
1UH_VMPI0703AR-1R0M-Z01_11A_20%
12
PR509
PR509 @4.7_1206_5%
@4.7_1206_5%
SNUB_1.5V
12
PC511
PC511
@680P_0402_50V7K
@680P_0402_50V7K
PR503
PR503
SYSON<41,43,45,46,58>
C C
+5VALW
B B
+1.5VP
1 2
PR507
PR507
100_0402_1%
100_0402_1%
PC509
PC509
4.7U_0603_10V6K
4.7U_0603_10V6K
0_0402_5%
0_0402_5%
V5FILT_1.5V+5VALW
12
12
PC505
PC505
12
@0.1U_0402_10V7K
@0.1U_0402_10V7K
PR506
PR506
255K_0402_1%
255K_0402_1%
1 2
PR501
PR501
1 2
2.21K_0402_1%
2.21K_0402_1%
2.15K_0402_1%
2.15K_0402_1%
PR502
PR502
TON_1.5V
FB_1.5V
12
EN_1.5V
2
3
4
5
6
PU501
PU501
TON
VOUT
VDD
FB
PGOOD
1
15
14
NC
BOOT
EN/DEM
UGATE
PHASE
LGATE
GND7PGND
RT8209BGQW_WQFN14_3P5X3P5
RT8209BGQW_WQFN14_3P5X3P5
8
VDDP
CS
PR504
PR504
2.2_0402_5%
2.2_0402_5%
1 2
UG_1.5V
13
LX_1.5V
12
TRIP_1.5V
11
10
LG_1.5V
9
BST1_1.5VBST_1.5V
0.1U_0402_10V7K
0.1U_0402_10V7K
PR508
PR508
1 2
+5VALW
1 2
PC508
PC508
15K_0402_1%
15K_0402_1%
+5VALW+1.5VP
12
PC510
PC510
4.7U_0805_10V6K
4.7U_0805_10V6K
PQ501
PQ501
AO4466L_SO8
AO4466L_SO8
PQ502
PQ502 AO4726L_SO8
AO4726L_SO8
PL502
PL502
HCB1608KF-121T30_0603
HCB1608KF-121T30_0603
12
PC507
PC507
PC506
PC506
0.1U_0402_25V6
0.1U_0402_25V6
2200P_0402_50V7K
2200P_0402_50V7K
+
+
PC501
PC501
+1.5VP
1
2
B+
12
220U_6.3VM_R15
220U_6.3VM_R15
PJP502
PJP502
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
PJP501
PJP501
2
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
+1.5VP
A A
Security Classification
Security Classification
5
Security Classification
2007/05/29 2008/05/29
2007/05/29 2008/05/29
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2007/05/29 2008/05/29
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
+1.5V
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+1.5VP
+1.5VP
+1.5VP
PBL21 LA6771P M/B
PBL21 LA6771P M/B
PBL21 LA6771P M/B
51 58Friday, January 21, 2011
51 58Friday, January 21, 2011
51 58Friday, January 21, 2011
1
0.1
0.1
0.1
5
D D
4
3
2
1
PQ702
PQ702
4
VCCP_B+
6
578
578
3 6
PQ701
PQ701
AO4466L_SO8
AO4466L_SO8
123
241
12
PC711
PC711
12
PC704
PC704
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PL701
PL701
1 2
12
PC702
PC702
10U_0805_25V6K
10U_0805_25V6K
0.68UH_PCMC063T-R68MN_15.5A_20%
0.68UH_PCMC063T-R68MN_15.5A_20%
12
PR709
PR709 @4.7_1206_5%
@4.7_1206_5%
SNUB_VCCP
12
@680P_0402_50V7K
@680P_0402_50V7K
PL702
PL702
HCB1608KF-121T30_0603
HCB1608KF-121T30_0603
12
PC707
PC707
PC706
PC706
0.1U_0402_25V6
0.1U_0402_25V6
2200P_0402_50V7K
2200P_0402_50V7K
+1.05VS_VCCP
1
+
+
PC701
PC701
2
220U_6.3VM_R15
220U_6.3VM_R15
(18A,340mils ,Via NO.= 17)
PR703
PR703
SUSP#<9,43,46,50,54,57,58>
+5VALW
C C
B B
+5VALW
1 2
PR707
PR707
100_0402_1%
100_0402_1%
PC709
PC709
4.7U_0603_10V6K
4.7U_0603_10V6K
12
0_0402_5%
0_0402_5%
+1.05VS_VCCP
V5FILT_VCCP
12
PR711
PR711
0_0402_5%
0_0402_5%
PC705
PC705
12
@0.1U_0402_10V7K
@0.1U_0402_10V7K
1 2
1 2
4.12K_0402_1%
4.12K_0402_1%
10.2K_0402_1%
10.2K_0402_1%
FB_VCCP1
+3VS
PR712
PR712
10_0402_5%
10_0402_5%
1 2
1 2
+1.05VS_VCCP
PR705
PR705
255K_0402_1%
255K_0402_1%
PR701
PR701
PR702
PR702
1 2
10K_0402_5%
10K_0402_5%
TON_VCCP
FB_VCCP
12
PR710
PR710
VCCIO_SENSE <8>
EN_VCCP
2
3
4
5
6
1
PU701
PU701
TON
EN/DEM
VOUT
VDD
FB
PGOOD
GND7PGND
VTTPWRGOOD <46,54>
PR704
PR704
2.2_0402_5%
2.2_0402_5%
BST_VCCP
1 2
15
14
NC
13
BOOT UGATE
12
PHASE
11
CS
10
VDDP
9
LGATE
RT8209BGQW_WQFN14_3P5X3P5
RT8209BGQW_WQFN14_3P5X3P5
8
BST1_VCCP
UG_VCCP
LX_VCCP
TRIP_VCCP
+5VALW
LG_VCCP
1 2
PC708
PC708
0.1U_0402_10V7K
0.1U_0402_10V7K
PR708
PR708
1 2
+5VALW
12
PC710
PC710
4.7U_0805_10V6K
4.7U_0805_10V6K
13.7K_0402_1%
13.7K_0402_1%
S TR AO4726L 1N SO8
S TR AO4726L 1N SO8
B+
12
VSSIO_SENSE connect to GND directly.
A A
Security Classification
Security Classification
Security Classification
2009/12/01 2010/12/31
2009/12/01 2010/12/31
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2009/12/01 2010/12/31
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Title
Title
Title
PWR+1.05VSP/+VCCPP
PWR+1.05VSP/+VCCPP
PWR+1.05VSP/+VCCPP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
PBL21 LA6771P M/B
PBL21 LA6771P M/B
PBL21 LA6771P M/B
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
52 58Friday, January 21, 2011
52 58Friday, January 21, 2011
52 58Friday, January 21, 2011
1
0.1
0.1
0.1
5
D D
0.75VR_EN#<46>
SUSP<5,46>
C C
PR605
PR605
12
@0_0402_5%
@0_0402_5%
PR604
PR604
12
0_0402_5%
0_0402_5%
+0.75VSP
4
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
0.75VS_N_002
12
PC606
PC606 @0.1U_0402_10V7K
@0.1U_0402_10V7K
PJP601
PJP601
1 2
PAD-OPEN 3x3m
PAD-OPEN 3x3m
PC601
PC601
+1.5V
PQ602
PQ602
2
3
PU601
PU601
1
12
13
D
D
G
G
S
S
12
PR601
PR601 1K_0402_1%
1K_0402_1%
VREF_G2992
12
PR602
PR602 1K_0402_1%
1K_0402_1%
(2A,80mils ,Via NO.= 4)
+0.75VS
2
3
4
APL5336KAI-TRL_SOP8P8
APL5336KAI-TRL_SOP8P8
12
12
PC605
PC605 10U_0805_6.3V6M
10U_0805_6.3V6M
0.1U_0402_16V7K
0.1U_0402_16V7K
PC604
PC604
VIN
GND
VREF
VOUT
NC
NC
VCNTL
NC
TP
+0.75VSP
8
7
6
5
9
12
PC603
PC603 1U_0603_10V6K
1U_0603_10V6K
+3VALW
2
1
B B
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2006/11/23 2007/11/23
2006/11/23 2007/11/23
2006/11/23 2007/11/23
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
0.75VSP/1.2VSP
0.75VSP/1.2VSP
0.75VSP/1.2VSP
PBL21 LA6771P M/B
PBL21 LA6771P M/B
PBL21 LA6771P M/B
1
53 58Friday, January 21, 2011
53 58Friday, January 21, 2011
53 58Friday, January 21, 2011
0.1
0.1
0.1
5
D D
PL802
PL802
HCB1608KF-121T30_0603
+5VALW
SUSP#<9,43,46,50,52,57,58>
HCB1608KF-121T30_0603
1 2
PR806 0_0402_5%PR806 0_0402_5%
VTTPWRGOOD<46,52>
C C
PQ802
PQ802
PMBT2222A_SOT23-3
VCCSA_SEL <9>
B B
12
PR814
PR814 @10K_0402_5%
@10K_0402_5%
PR812
PR812
0_0402_5%
0_0402_5%
PMBT2222A_SOT23-3
VCCSA_SEL_0
12
2
4
12
1 2
1 2
PR815 @0_0402_5%PR815 @0_0402_5%
VCCSA_SEL0
1
3
PC803
PC803 22U_0805_6.3VAM
22U_0805_6.3VAM
EN_VCCSA
@47K_0402_5%
@47K_0402_5%
+3VS
1 2
VCCSA_B+
PR807
PR807
PR810
PR810 10K_0402_5%
10K_0402_5%
PR811
PR811
10K_0402_5%
10K_0402_5%
3
10K_0402_5%
10
PU801
PU801
9
8
5
PC807
PC807
PVIN
PVIN
SVIN
EN
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
4
TP
11
10K_0402_5%
PR804
PR804
2
LX
PG
3
LX
6
FB
SS
LX
SY8035DBC_DFN10_3X3
SY8035DBC_DFN10_3X3
7
1
12
PC808
PC808
@0.1U_0402_10V7K
@0.1U_0402_10V7K
15K_0402_1%
15K_0402_1%
PQ801
PQ801
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
G
G
2
FB_VCCSA2
13
D
S
D
S
12
FB_VCCSA
PR802
PR802
+3VS
LX_VCCSA
12
PR803
PR803
1 2
29.4K_0402_1%
29.4K_0402_1%
PR801
PR801
12
4.99K_0402_1%
4.99K_0402_1%
PC805
PC805
12
68P_0402_50V8J
68P_0402_50V8J
0_0402_5%
0_0402_5%
FB_VCCSA
PR808
PR808
1 2
FB_VCCSA_A
PR809
PR809 10_0402_5%
10_0402_5%
1 2
+VCCSAP
SA_PGOOD<43>
12
12
PC804
PC804
@0.1U_0402_10V7K
@0.1U_0402_10V7K
VCCSA_SEL1
12
1
12
PR813
PR813
2
@100K_0402_5%
@100K_0402_5%
2
PL801
PL801
1UH_VMPI0703AR-1R0M-Z01_11A_20%
1UH_VMPI0703AR-1R0M-Z01_11A_20%
1 2
12
PR805
PR805
4.7_1206_5%
4.7_1206_5%
SNUB_VCCSA
12
PC806
PC806
680P_0402_50V7K
680P_0402_50V7K
VCCSA_SENSE <9>
12
PC801
PC801
1
+VCCSAP
12
PC802
PC802
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
PJP801
PJP801
VCCSA_SEL VCCSA Vout
+VCCSAP
0 0.9V 1 0.8V
A A
Security Classification
Security Classification
Security Classification
2009/12/01 2010/12/31
2009/12/01 2010/12/31
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2009/12/01 2010/12/31
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
Compal Electronics, Inc.
Title
Title
Title
PWR+VCCSAP
PWR+VCCSAP
PWR+VCCSAP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
PBL21 LA6771P M/B
PBL21 LA6771P M/B
PBL21 LA6771P M/B
Date: Sheet of
Date: Sheet of
Date: Sheet of
(6A,240mils ,Via NO.= 12)
+VCCSA
1
0.1
0.1
0.1
54 58Friday, January 21, 2011
54 58Friday, January 21, 2011
54 58Friday, January 21, 2011
A
B
C
D
E
F
G
H
12
12
12
12
12
12
CSN2
CSP2
CSN3
CSP3
CSN1
PC229
PC229
0.047U_0402_16V7K
0.047U_0402_16V7K
1 2
PR233 6.98K_0402_1%PR233 6.98K_0402_1%
PWM1 <56>
PWM3 <56>
PWM2 <56>
PWMA <56>
CSNA <56>
CSPA <56>
12
CSP1
CSP2
CSP3
CSN1
CSN2
CSN3
CSP1
CSP3 <56>
CSN1 <56>
CSP1 <56>
CSP2 <56>
CSN3 <56>
CSN2 <56>
PWM3 PWMA
VCORE VBOOT SET AT 0V
PWM ADDRESS
(CPU Ipeak=94A, Imax(TDP)=56A ) (CFX Ipeak=33A, Imax(TDP)=21.5 A)
12
PR243
PR243
10K_0402_1%
10K_0402_1%
PWM1 IMAX
12
PR264
PR264 10K_0402_1%
10K_0402_1%
V_GT IMAX SET AT 33A
VCORE IMAX SET AT 94A
12
PR244
PR244
26.1K_0402_1%
26.1K_0402_1%
12
PR265
PR265
73.2K_0402_1%
73.2K_0402_1%
PR202
CSSUM
PR203 75K_0402_1%PR203 75K_0402_1%
CSCOMP
220K_0402_5%_ERTJ0EV224J
PC217
1 2
PR208
PR208
1 2
22P_0402_50V8J
22P_0402_50V8J
1 2
412_0402_1%
412_0402_1%
12
12
412_0402_1%
412_0402_1%
12
PC217
3300P_0402_50V7K
3300P_0402_50V7K
1 2
PC219
PC219
4700P_0402_25V7K
4700P_0402_25V7K
PR215
PR215
1 2
22K_0402_1%
22K_0402_1%
PC223
PC223
PR220
PR220
4700P_0402_25V7K
4700P_0402_25V7K
DIFFOUT
53
PU201
PU201
GND
1
VSP
2
TSENSE
3
VRHOT#
4
SDIO
5
SCLK
6
ALERT#
7
VR_RDY
8
VR_RDYA
9
ENABLE
10
VCC
11
ROSC
12
VRMP
13
TSENSEA
PR248
PR248 2K_0402_1%
2K_0402_1%
UMA@
UMA@
UMA@
UMA@
PR258
PR258
4700P_0402_25V7K
4700P_0402_25V7K
1 2
PR259
PR259
1 2
8.06K_0402_1%
8.06K_0402_1%
UMA@
UMA@
PC242
PC242 4700P_0402_25V7K
4700P_0402_25V7K
UMA@
UMA@
PC216
PC216
100P_0402_50V8J
100P_0402_50V8J
PR207
PR207
PR213
PR213 1K_0402_1%
1K_0402_1%
12
PC226
PC226 1000P_0402_50V8-J
1000P_0402_50V8-J
VR_SVID_DAT<8>
VR_SVID_CLK<8>
VGATE<5,31,43>
1 2
PR236 9.09K_0402_1%PR236 9.09K_0402_1%
12
12
DIS@
DIS@
UMA@
UMA@
1 2
6.04K_0402_1%
6.04K_0402_1%
12
1 2
2K_0402_1%
2K_0402_1%
PR219
PR219
TSENSE
1 2
TSENSEA
PC236
PC236 1000P_0402_50V8-J
1000P_0402_50V8-J
1 2
24.9_0402_1%
1 1
0_0402_5%
0_0402_5% PR223
PR223
+1.05VS_VCCP
+1.05VS_VCCP
VR_SVID_ALRT#<8>
PC231 1U_0603_6.3V6MPC231 1U_0603_6.3V6M
PC232 0.01U_0402_50V7KPC232 0.01U_0402_50V7K
1 2
PR224 0_0402_5%PR224 0_0402_5%
1 2
+3VS
1 2
1 2
PR230 54.9_0402_1%PR230 54.9_0402_1%
VR_ON<43>
VSSSENSE<8>
VCCSENSE<8>
For VR_SVID_DAT and CLK
12
PC259
PC259 1U_0402_16V6K
1U_0402_16V6K
PC230
PC230
0.1U_0402_25V6
0.1U_0402_25V6
+5VALW
PR235 2.2_0603_5%PR235 2.2_0603_5%
CPU_B+
PC233
0.1U_0402_25V6
0.1U_0402_25V6
UMA@ PC233
UMA@
VCC_AXG_SENSE<9>
12
PC260
PC260 1U_0402_16V6K
1U_0402_16V6K
1 2
VSS_AXG_SENSE<9>
1 2
PR238 1K_0402_1%PR238 1K_0402_1%
1 2
1 2
UMA@
UMA@
PR231
PR231
8.25K_0402_1%
8.25K_0402_1%
PR239
PR239
8.25K_0402_1%
8.25K_0402_1%
PR239
PR239
DIS@
DIS@
0_0402_5%
0_0402_5%
+1.05VS_VCCP
TSENSE
12
12
UMA@
UMA@
12
TSENSEATSENSEA
12
2 2
PH203
PH203
100K_0402_1%_NCP15WF104F03RC
100K_0402_1%_NCP15WF104F03RC
PH204
PH204
100K_0402_1%_NCP15WF104F03RC
100K_0402_1%_NCP15WF104F03RC
3 3
4 4
24.9_0402_1%
VR_HOT#<43,47>
PR227 130_0402_1%PR227 130_0402_1%
1 2
PR229 110_0402_1%PR229 110_0402_1%
1 2
1 2
1 2
PR234 10K_0402_1%PR234 10K_0402_1%
PR201 0_0402_5%PR201 0_0402_5%
PR247
PR247
0_0402_5%
0_0402_5%
1 2
0_0402_5%
0_0402_5%
PR251
PR251
1 2
PR252
PR252
0_0402_5%
0_0402_5%
UMA@
UMA@
220K_0402_5%_ERTJ0EV224J
PR209 34.8K_0402_1%PR209 34.8K_0402_1%
1 2
PC221
PC221
DIFFOUT
52
50
49
51
FB
VSN
TRBST
DIFFOUT
NCP6131S52MNR2G_QFN52_6X6
NCP6131S52MNR2G_QFN52_6X6
FBA16VSNA
15
14
FBA
DIFFOUTA
12
UMA@
UMA@
PC239
PC239
12
PR254 0_0402_5%DIS@ PR254 0_0402_5%DIS@
FBA
UMA@
UMA@
47
48
ILIM
COMP
COMPA19DIFFOUTA17VSPA
18
UMA@
UMA@
12
PC237
PC237
3300P_0402_50V7K
3300P_0402_50V7K
1 2
PR260
4.02K_0402_1%
4.02K_0402_1%
UMA@ PR260
UMA@
PC244
PC244
1 2
UMA@
UMA@
100P_0402_50V8J
100P_0402_50V8J
1 2
PR270
PR270
47_0402_1%
47_0402_1%
DIFFOUTA
PH201
PH201
12
12
PR210
PR210
1 2
1K_0402_1%
1K_0402_1%
1 2
PC222
PC222
820P_0402_50V7K
820P_0402_50V7K
CSCOMP
CSSUM
46
44
45
43
IOUT
CSSUM
DROOP
CSCOMP
CSCOMPA
DROOPA21IOUTA
ILIMA20TRBSTA
22
23
CSCOMOA
1 2
22P_0402_50V8J
22P_0402_50V8J
12
PC238
PC241 470P_0402_50V7KPC241 470P_0402_50V7K
UMA@ PC238
UMA@
1 2
20K_0402_1%
20K_0402_1%
PR261
PR261
PR262
1 2
1K_0402_1%
1K_0402_1%
UMA@ PR262
UMA@
1 2
PR269 1K_0402_1%UMA@ PR269 1K_0402_1%UMA@
220K_0402_5%_ERTJ0EV224J
220K_0402_5%_ERTJ0EV224J
PR263
PR263
DIS@
DIS@
0_0402_5%
0_0402_5%
PR211 4.7K_0402_1%PR211 4.7K_0402_1%
1 2
CSREF
42
24
CSSUMA
1 2
CSCOMOA
12
12
PR212
PR212
10_0402_1%
10_0402_1%
8.2K_0402_1%
8.2K_0402_1%
1 2
PR221 24.3K_0402_1%PR221 24.3K_0402_1%
PC225
PC225 1000P_0402_50V8-J
1000P_0402_50V8-J
41
40
NC
NC
CSN2
CSREF
CSP2
CSN3
CSP3
CSN1
CSP1
DRON
PWM1/ADDR
PWM3/VBOOT
PWM2
IMAX
PWMA/IMAXA
VBOOTA
CSSUMA
CSPA25CSNA
26
UMA@
UMA@
12
PC235
PC235
0.047U_0402_16V7K
0.047U_0402_16V7K
24K_0402_1%
24K_0402_1%
.1U_0402_16V7K
.1U_0402_16V7K
UMA@
UMA@
PR266
PR266
10_0402_1%
10_0402_1%
PR263 1.82K_0402_1%UMA@ PR263 1.82K_0402_1%UMA@
6.19K_0402_1%
6.19K_0402_1%
PR271
75K_0402_1%
75K_0402_1%
PH202
PH202
UMA@
UMA@
1 2
PR204 165K_0402_1%PR204 165K_0402_1%
12
1 2
PC215 330P_0402_50V7KPC215 330P_0402_50V7K
1 2
PC218 1200P_0402_50V7KPC218 1200P_0402_50V7K
820P_0402_50V7K
820P_0402_50V7K
12
1 2
PC220
PC220
PR217
PR217
12
PC224
PC224
0.1U_0402_25V6K
0.1U_0402_25V6K
1 2
39
38
37
36
35
34
33
32
31
30
29
28
27
1 2
PR240
PR240
PR241
PR241
10K_0402_1% UMA@
10K_0402_1% UMA@
0_0402_5%
0_0402_5%
DIS@
DIS@
1 2
PC234
PC234 1000P_0402_50V8-J
1000P_0402_50V8-J
1 2
UMA@
UMA@
12
0_0402_5%
0_0402_5% PR249
PR249
DIS@
DIS@
1 2
PR255 6.98K_0402_1%
PR255 6.98K_0402_1%
PR256
PR256
12
12
PC240
PC240
UMA@
UMA@
PC243
UMA@PC243
UMA@
820P_0402_50V7K
820P_0402_50V7K
1 2
12
PR268
PR268
12
UMA@
UMA@
UMA@PR271
UMA@
PR272
PR272
12
165K_0402_1%
165K_0402_1%
12
1 2
PC245
330P_0402_50V7K
330P_0402_50V7K
1 2
PC246
PC246
1200P_0402_50V7K
1200P_0402_50V7K
UMA@
UMA@
PR275
PR275
0_0402_5%
0_0402_5%
DIS@
DIS@
DIS@
DIS@
12
PR202
82.5K_0603_1%
82.5K_0603_1%
PR205
PR205
82.5K_0603_1%
82.5K_0603_1% PR206
PR206
82.5K_0603_1%
82.5K_0603_1%
PR214 10_0402_1%PR214 10_0402_1%
10_0402_1%
10_0402_1%
PR216
PR216
10_0402_1%
10_0402_1%
PR218
PR218
12
0.047U_0402_16V7K
0.047U_0402_16V7K PC227
PC227
1 2
PR225 6.98K_0402_1%PR225 6.98K_0402_1%
12
0.047U_0402_16V7K
0.047U_0402_16V7K PC228
PC228
1 2
PR228 6.98K_0402_1%PR228 6.98K_0402_1%
12
DRVON <56>
IMAX
12
+5VALW
PR2370_0402_5%
PR2370_0402_5%
PR246
PR246
0_0402_5%
0_0402_5%
1 2
UMA@
UMA@
UMA@
UMA@
CSSUMA CSPA
10_0402_1%
10_0402_1%
UMA@
UMA@
UMA@PC245
UMA@
CSPA
PR256
PR256
DIS@
DIS@
0_0402_5%
0_0402_5%
PR267
PR267
CSNA
12
PR273
PR273
51.1K_0603_1%
51.1K_0603_1%
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
E
2010/01/25 2009/04/28
2010/01/25 2009/04/28
2010/01/25 2009/04/28
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
F
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
G
CPU_CORE_1
CPU_CORE_1
CPU_CORE_1
PCA60/70 LA-7001P M/B
55 58Friday, January 21, 2011
55 58Friday, January 21, 2011
55 58Friday, January 21, 2011
H
of
of
of
0.1
0.1
0.1
5
4
3
2
1
CPU_B+
12
12
12
PC204
PC204
PC205
PC210
PC210
PL203
PL203
PC205
10U_0805_25V6K
10U_0805_25V6K
4
+CPU_CORE
3
12
PC211
PC211
10U_0805_25V6K
10U_0805_25V6K
4
3
PC203
PC203
1U_0603_25V6K
1U_0603_25V6K
PL201
0.36UH_PCMC104T-R36MN1R15_30A_20%
0.36UH_PCMC104T-R36MN1R15_30A_20%
CSP1<55>
CSN1<55>
CSP3<55>
CSN3<55>
PL201
1
2
12
PC209
PC209
1U_0603_25V6K
1U_0603_25V6K
0.36UH_PCMC104T-R36MN1R15_30A_20%
0.36UH_PCMC104T-R36MN1R15_30A_20%
1
2
10U_0805_25V6K
10U_0805_25V6K
DRVON<55>
+5VALW
12
10U_0805_25V6K
10U_0805_25V6K
+CPU_CORE
PWM2<55>
PR282
PR282
2.2_0603_1%
2.2_0603_1%
1 2
PWM2_EN LX_CPU2
PR281 2K_0402_1%PR281 2K_0402_1%
12
1 2
12
0_0402_5%
0_0402_5%
PR293
PR293
12
PC250
PC250 1U_0603_25V6K
1U_0603_25V6K
PR277
PR277
4.7_0603_5%
4.7_0603_5%
PC248
PC248
1 2
0.22U_0603_25V7K
0.22U_0603_25V7K
PU203
PU203
1
BST
FLAG
2
PWM
DRVH
3
EN
SW
4
VCC
GND
DRVL
NCP5911MNTBG_DFN8-9
NCP5911MNTBG_DFN8-9
4
PR297
PR297
9
2.2_0603_1%
2.2_0603_1%
DH_CPU2
1 2
8
7
6
DL_CPU2
5
4
4
4
4
4
5
PQ201
PQ201
CSD17308Q3_SON8-5
CSD17308Q3_SON8-5
123
5
PQ202
PQ202
TPCA8057-H_PPAK56-8-5
TPCA8057-H_PPAK56-8-5
123
5
PQ205
PQ205
CSD17308Q3_SON8-5
CSD17308Q3_SON8-5
123
5
PQ206
PQ206
TPCA8057-H_PPAK56-8-5
TPCA8057-H_PPAK56-8-5
123
CPU_B+
12
PR280
PR280
4.7_1206_5%
4.7_1206_5%
12
PC251
PC251
680P_0402_50V7K
680P_0402_50V7K
12
PR287
PR287
4.7_1206_5%
4.7_1206_5%
12
PC254
PC254
680P_0402_50V7K
680P_0402_50V7K
PC247
D D
PR276
PR276
4.7_0603_5%
4.7_0603_5%
1 2
PWM1
+5VALW
PR279
PR279
2.2_0603_1%
2.2_0603_1%
DRVON <55>
C C
PWM3
+5VALW
PR286
PR286
2.2_0603_1%
2.2_0603_1%
DRVON <55>
B B
PWM1_EN LX_CPU1
PR278 2K_0402_1%PR278 2K_0402_1%
12
1 2
12
0_0402_5%
0_0402_5%
PR292
PR292
12
PC249
PC249 1U_0603_25V6K
1U_0603_25V6K
PR284
PR284
4.7_0603_5%
4.7_0603_5%
1 2
PR285
PR285
PWM3_EN LX_CPU3
2K_0402_1%
2K_0402_1%
12
1 2
12
0_0402_5%
0_0402_5%
PR294
PR294
12
PC255
PC255 1U_0603_25V6K
1U_0603_25V6K
PC247
1 2
0.22U_0603_25V7K
0.22U_0603_25V7K
PU202
PU202
1
BST
FLAG
2
PWM
DRVH
3
EN
SW
4
VCC
GND
DRVL
NCP5911MNTBG_DFN8-9
NCP5911MNTBG_DFN8-9
PC253
PC253
1 2
0.22U_0603_25V7K
0.22U_0603_25V7K
PU204
PU204
1
BST
FLAG
2
PWM
DRVH
3
EN
SW
4
VCC
GND
DRVL
NCP5911MNTBG_DFN8-9
NCP5911MNTBG_DFN8-9
PR296
PR296
9
2.2_0603_1%
2.2_0603_1%
DH_CPU1
8
1 2
7
6
DL_CPU1
5
PR298
2.2_0603_1%
2.2_0603_1%
DH_CPU3
1 2
DL_CPU3
PR298
9
8
7
6
5
CPU_B+
5
PQ203
PQ203
CSD17308Q3_SON8-5
CSD17308Q3_SON8-5
123
5
PQ204
PQ204
TPCA8057-H_PPAK56-8-5
TPCA8057-H_PPAK56-8-5
123
12
PR283
PR283
4.7_1206_5%
4.7_1206_5%
12
PC252
PC252
680P_0402_50V7K
680P_0402_50V7K
12
PC207
PC207
PC206
PC206
1U_0603_25V6K
1U_0603_25V6K
PL202
0.36UH_PCMC104T-R36MN1R15_30A_20%
0.36UH_PCMC104T-R36MN1R15_30A_20%
CSP2<55>
CSN2<55>
PL202
1
2
4
3
12
12
PC208
PC208
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
+CPU_CORE
CPU_B+
12
12
12
PC213
PC213
PC214
PC212
PC212
1
2
PC214
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
1U_0603_25V6K
1U_0603_25V6K
10U_0805_25V6K
PL204
PL204
4
+GFX_CORE
3
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B+
2010/01/25 2009/04/28
2010/01/25 2009/04/28
2010/01/25 2009/04/28
3
PL205
PL205
HCB2012KF-121T50_0805
HCB2012KF-121T50_0805
PL206
PL206
HCB2012KF-121T50_0805
HCB2012KF-121T50_0805
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
12
12
1
+
+
PC201
PC201
100U_25V_M
100U_25V_M
2
1
+
+
PC202
PC202
100U_25V_M
100U_25V_M
2
2
CPU_B+
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
CPU_CORE_2
CPU_CORE_2
CPU_CORE_2
56 58Friday, January 21, 2011
56 58Friday, January 21, 2011
56 58Friday, January 21, 2011
1
0.1
0.1
0.1
4
4
5
PQ207
PQ207
CSD17308Q3_SON8-5
CSD17308Q3_SON8-5
123
5
PQ208
PQ208
TPCA8057-H_PPAK56-8-5
TPCA8057-H_PPAK56-8-5
123
12
PR291
PR291
4.7_1206_5%
4.7_1206_5%
12
680P_0402_50V7K
680P_0402_50V7K
4
0.36UH_PCMC104T-R36MN1R15_30A_20%
0.36UH_PCMC104T-R36MN1R15_30A_20%
PC258
PC258
CSPA<55>
CSNA<55>
PC256
PC256
1 2
0.22U_0603_25V7K
PR288
PR288
4.7_0603_5%
4.7_0603_5%
PWMA
+5VALW
PR290
PR290
2.2_0603_1%
2.2_0603_1%
A A
DRVON <55>
1 2
PR289
PR289
PWMA_EN LX_GFX
2K_0402_1%
2K_0402_1%
12
12
1 2
0_0402_5%
0_0402_5%
PR295
PR295
12
PC257
PC257 1U_0603_25V6K
1U_0603_25V6K
5
0.22U_0603_25V7K
PU205
PU205
1
BST
FLAG
2
PWM
DRVH
3
EN
SW
4
VCC
GND
DRVL
NCP5911MNTBG_DFN8-9
NCP5911MNTBG_DFN8-9
PR299
2.2_0603_1%
2.2_0603_1%
DH_GFX
1 2
DL_GFX
PR299
9
8
7
6
5
A
1 1
VGA_PWROK<14,33,34,46>
PR905
PR905
20K_0402_1%
20K_0402_1%
1 2
PC907
PC907
PR903
PR903
8.87K_0402_1%
8.87K_0402_1%
GVID0-2
1 2
PQ905A
PQ905A
SSM6N7002FU_US6
SSM6N7002FU_US6
S
S
EN_VGA
12
SUSP#<9,43,46,50,52,54,58>
2 2
GPU_VID0<14>
+3VS_DGPU
PR912
PR912
10K_0402_1%
10K_0402_1%
PR915
PR915
@10K_0402_5%
@10K_0402_5%
12
PR913
PR913
12
10K_0402_1%
10K_0402_1%
1 2
0_0402_5%
0_0402_5%
GVID0-1
12
12
PC911
PC911
0.022U_0402_16V7K
0.022U_0402_16V7K
2
PR908
PR908
G
G
61
D
D
@0.1U_0402_10V7K
@0.1U_0402_10V7K
+3VALW
VGA_TRIP
FB_VGA
PR906
PR906 10K_0402_5%
10K_0402_5%
1 2
VGA_RF
12
PR910
PR910 470K_0402_1%
470K_0402_1%
1
2
3
4
5
B
PL902
PL902
HCB2012KF-121T50_0805
HCB2012KF-121T50_0805
1 2
B+
PU901
PU901
PGOOD
TRIP
EN
VFB
RF
TPS51218DSCR_SON10_3X3
TPS51218DSCR_SON10_3X3
VBST
DRVH
SW
V5IN
DRVL
TP
12
PR902
PR902
10.5K_0402_1%
10.5K_0402_1%
10
9
8
7
6
11
1 2
PR901
PR901
1.8K_0402_1%
1.8K_0402_1%
VGA_B+
12
PC904
PC904
2200P_0402_50V7K
2200P_0402_50V7K
PC906
PC906
0.1U_0603_16V7K
0.1U_0603_16V7K
1 2
PR9092.2_0603_5% PR9092.2_0603_5%
PC910
PC910
1 2
0.1U_0402_10V7K
0.1U_0402_10V7K
1 2
PR914
PR914 100_0402_1%
100_0402_1%
12
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
PC905
PC905
PC902
PC902
4
+VGA_CORE+VGA_COREP1
VDD_SENSE <15>
12
12
PC903
PC903
0.1U_0402_25V6
0.1U_0402_25V6
PR907
PR907
2.2_0603_5%
2.2_0603_5%
BST_VGA
1 2
DH_VGA DH_VGA_1
LX_VGA
DL_VGA
BST_VGA1
1 2
+5VALW
12
PC908
PC908
1U_0603_10V6K
1U_0603_10V6K
4
5
123
PQ902
PQ902
5
C
PQ901
PQ901
<BOM Structure>
<BOM Structure>
CSD17308Q3_SON8-5
CSD17308Q3_SON8-5
123
TPCA8059-H_PPAK56-8-5
TPCA8059-H_PPAK56-8-5
D
5
PQ904
PQ904
4
123
@CSD17308Q3_SON8-5
@CSD17308Q3_SON8-5
5
PQ903
PQ903
4
123
12
SNUB_VGA
1 2
TPCA8059-H_PPAK56-8-5
TPCA8059-H_PPAK56-8-5
PL901
PL901
0.36UH_PCMC104T-R36MN1R105_37A_20%
0.36UH_PCMC104T-R36MN1R105_37A_20%
1 2
PR911
PR911
@4.7_1206_5%
@4.7_1206_5%
PC909
PC909 @680P_0402_50V7K
@680P_0402_50V7K
1
+
+
PC901
PC901 330U_D_2VM
330U_D_2VM
2
+VGA_CORE
PR904
PR904
54.9K_0402_1%
54.9K_0402_1%
1 2
3 3
GPU_VID1<14>
+3VS_DGPU
PR916
PR916
@10K_0402_1%
@10K_0402_1%
PR918
PR918
10K_0402_5%
10K_0402_5%
12
12
PR917
PR917 10K_0402_1%
10K_0402_1%
GVID1-1
12
12
PC912
PC912
0.022U_0402_16V7K
0.022U_0402_16V7K
GVID1-2
34
D
D
PQ905B
PQ905B
SSM6N7002FU_US6
5
G
G
SSM6N7002FU_US6
S
S
0
0
1 1
GPU_VID0
0 0.825V
1
GPU_VID0
0
0
0 0.85V
1
1 1
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
2008/09/15 2009/09/15
2008/09/15 2009/09/15
2008/09/15 2009/09/15
N12P-GS
+VGA_CORE PR902PR901GPU_VID1
0.975V
1.0V
N12P-GV
+VGA_CORE PR902PR901GPU_VID1
1.0V
1.025V
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Ipeak=35.32A
1.8K 10.5K 8.87K 54.9K
Ipeak=21.56A
1.8K 10.5K 8.87K 54.9K
C
PL901PR903 PR904
0.36uH
PL901PR903 PR904
0.36uH
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+VGA_COREP
+VGA_COREP
+VGA_COREP
PBL21 LA6771P M/B
PBL21 LA6771P M/B
PBL21 LA6771P M/B
D
57 58Friday, January 21, 2011
57 58Friday, January 21, 2011
57 58Friday, January 21, 2011
0.1
0.1
0.1
5
D D
+3VL
PR1213
PR1213
100K_0402_1%
100K_0402_1%
1 2
PQ1202
SSM3K7002FU_SC70-3
C C
@100P_0402_50V8J
@100P_0402_50V8J
PR1212
PR1211
PR1211 0_0402_5%
0_0402_5%
1 2
PR1212 @0_0402_5%
@0_0402_5%
1 2
SSM3K7002FU_SC70-3
PC1211
PC1211
PQ1202
13
D
D
2
G
G
S
S
1 2
PC1208
PC1208
100P_0402_50V8J
100P_0402_50V8J
24.9K_0402_1%
24.9K_0402_1%
1 2
+12V_COMP1
1 2
4
PL1203
PL1203
HCB2012KF-121T50_0805
HCB2012KF-121T50_0805
1 2
B+ +12VSP
12
12
PC1203
PC1203
10U_0805_25V6K
10U_0805_25V6K
+5VALW
PC1204 100P_0402_50V8JPC1204 100P_0402_50V8J
1 2
PC1206
PC1206
0.1U_0402_10V7K
0.1U_0402_10V7K
1 2
PR1209
PR1209
+12V_RC
+12V_SS
+12V_EN
+12V_FB
TPS40210DRCR_SON10_3X3
TPS40210DRCR_SON10_3X3
PU1201
PU1201
1
RC
2
SS
3
DIS/EN#
4
COMP
5
FB
11
TP
1 2
VDD
BP
GDRV
ISNS
GND
10UH_VMPI0703AR-100M-Z01_3.5A_20%
10UH_VMPI0703AR-100M-Z01_3.5A_20%
PC1220
PC1220
10U_0805_25V6K
10U_0805_25V6K
PC1205
PC1205
0.22U_0603_10V7K
0.22U_0603_10V7K
10
0.1U_0402_10V7K
0.1U_0402_10V7K
+12V_BP
9
+12V_GATE
8
+12V_ISNS+12V_COMP
7
6
PL1201
PL1201
1 2
PC1207
PC1207
1 2
1 2
0_0402_5%
0_0402_5%
1 2
100_0402_1%
100_0402_1%
1 2
PC1209
PC1209
100P_0402_50V8J
100P_0402_50V8J
3
PR1208
PR1208
PR1210
PR1210
PR1203
PR1203
0.01_1206_1%
0.01_1206_1%
+12V_GATE1
+12V_ISNS1
1 2
+12V_SW
PC1216 10U_0805_25V6KPC1216 10U_0805_25V6K
PC1217 10U_0805_25V6KPC1217 10U_0805_25V6K
PC1218 @10U_0805_25V6KPC1218 @10U_0805_25V6K
PQ1201
PQ1201
3 5
241
PC1215
PC1215
10U_0805_25V6K
10U_0805_25V6K
1 2
1 2
1 2
1 2
AON7408L_DFN8-5
AON7408L_DFN8-5
+12V_SW1+12V_B+
PL1202
PL1202
2 1
1 2
10UH_VMPI0703AR-100M-Z01_3.5A_20%
10UH_VMPI0703AR-100M-Z01_3.5A_20%
2
PD1201
PD1201
B540C-13-F_SMC2
B540C-13-F_SMC2
PC1219
PC1219
@100P_0402_50V8J
@100P_0402_50V8J
PC1210
PC1210
@100P_0402_50V8J
@100P_0402_50V8J
PR1201
12
PR1201
48.7K_0402_1%
48.7K_0402_1%
1 2
1
+
+
2
PC1201
PC1201 100U_16V
100U_16V
must create part number
12
PR1202
PR1202
1 2
3.01K_0402_1%
3.01K_0402_1%
1
+
+
2
1
PC1202
PC1202 100U_16V
100U_16V
SUSP#
SYSON <41,43,45,46,51>
B B
PJP120
PJP120
2
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
Custom
Custom
Custom
+12VSP
A A
Security Classification
Security Classification
Security Classification
2009/12/01 2010/12/31
2009/12/01 2010/12/31
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2009/12/01 2010/12/31
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
(2A,80mils ,Via NO.= 4)
+12VS
Compal Electronics, Inc.
Title
Title
Title
PWR+12V_SEPIC
PWR+12V_SEPIC
PWR+12V_SEPIC
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
PBL21 LA6771P M/B
PBL21 LA6771P M/B
PBL21 LA6771P M/B
Date: Sheet of
Date: Sheet of
Date: Sheet of
58 58Friday, January 21, 2011
58 58Friday, January 21, 2011
58 58Friday, January 21, 2011
1
0.1
0.1
0.1
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